diff --git a/README.md b/README.md new file mode 100644 index 0000000..5de4bf3 --- /dev/null +++ b/README.md @@ -0,0 +1,14 @@ +# abc + +[ABC](https://people.eecs.berkeley.edu/~alanmi/abc/abc.htm) is a growing +software system for synthesis and verification of binary sequential logic +circuits appearing in synchronous hardware designs. ABC combines scalable +logic optimization based on And-Inverter Graphs (AIGs), optimal-delay +DAG-based technology mapping for look-up tables and standard cells, and +innovative algorithms for sequential synthesis and verification. + +ABC provides an experimental implementation of these algorithms and a +programming environment for building similar applications. Future development will +focus on improving the algorithms and making most of the packages stand-alone. +This will allow the user to customize ABC for their needs as if it were a toolbox +rather than a complete tool. diff --git a/abc-format.patch b/abc-format.patch index 5e8dc15..2db66ba 100644 --- a/abc-format.patch +++ b/abc-format.patch @@ -1,26 +1,5 @@ ---- src/aig/miniaig/ndr.h.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/aig/miniaig/ndr.h 2021-03-31 09:29:26.418031142 -0600 -@@ -496,8 +496,16 @@ static inline void Ndr_WriteVerilog( cha - { - Ndr_Data_t * p = (Ndr_Data_t *)pDesign; int Mod; - -- FILE * pFile = pFileName ? fopen( pFileName, "wb" ) : stdout; -- if ( pFile == NULL ) { printf( "Cannot open file \"%s\" for writing.\n", pFileName ); return; } -+ FILE * pFile; -+ if (pFileName) -+ { -+ pFile = fopen( pFileName, "wb" ); -+ if ( pFile == NULL ) { printf( "Cannot open file \"%s\" for writing.\n", pFileName ); return; } -+ } -+ else -+ { -+ pFile = stdout; -+ } - - Ndr_DesForEachMod( p, Mod ) - Ndr_WriteVerilogModule( pFile, p, Mod, pNames ); ---- src/aig/saig/saigIoa.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/aig/saig/saigIoa.c 2021-03-31 09:36:36.926608970 -0600 +--- src/aig/saig/saigIoa.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/aig/saig/saigIoa.c 2022-01-17 08:22:16.506371575 -0700 @@ -47,15 +47,15 @@ char * Saig_ObjName( Aig_Man_t * p, Aig_ { static char Buffer[16]; @@ -42,9 +21,9 @@ else assert( 0 ); return Buffer; ---- src/base/abci/abc.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/abci/abc.c 2021-03-31 09:33:02.855819044 -0600 -@@ -30623,7 +30623,7 @@ int Abc_CommandAbc9Put( Abc_Frame_t * pA +--- src/base/abci/abc.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/base/abci/abc.c 2022-01-17 08:22:16.510371570 -0700 +@@ -30577,7 +30577,7 @@ int Abc_CommandAbc9Put( Abc_Frame_t * pA else { assert( i >= Abc_NtkPoNum(pNtk) ); @@ -53,7 +32,7 @@ Abc_ObjAssignName( pObj, (char *)Vec_PtrEntry(pAbc->pGia->vNamesOut, i), pSuffix ); } } -@@ -42868,7 +42868,7 @@ int Abc_CommandAbc9Cone( Abc_Frame_t * p +@@ -43889,7 +43889,7 @@ int Abc_CommandAbc9Cone( Abc_Frame_t * p Gia_ManForEachPo( pAbc->pGia, pObj, i ) { Gia_Man_t * pOne = Gia_ManDupDfsCone( pAbc->pGia, pObj ); @@ -62,20 +41,9 @@ Gia_AigerWrite( pOne, Buffer, 0, 0, 0 ); Gia_ManStop( pOne ); } ---- src/base/abci/abcMiter.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/abci/abcMiter.c 2021-03-31 09:29:26.419031141 -0600 -@@ -863,7 +863,7 @@ void Abc_NtkAddFrame( Abc_Ntk_t * pNtkFr - { - int fVerbose = 0; - int NodeBef = Abc_NtkNodeNum(pNtkFrames); -- char Buffer[10]; -+ char Buffer[12]; - Abc_Obj_t * pNode, * pLatch; - int i; - // create the prefix to be added to the node names ---- src/base/io/ioReadBlifMv.c.orig 2021-03-31 09:51:35.257716654 -0600 -+++ src/base/io/ioReadBlifMv.c 2021-03-31 09:51:55.691695924 -0600 -@@ -1626,7 +1626,7 @@ static int Io_MvParseLineMv( Io_MvMod_t +--- src/base/io/ioReadBlifMv.c.orig 2022-01-17 08:21:48.617409341 -0700 ++++ src/base/io/ioReadBlifMv.c 2022-01-17 08:22:16.511371568 -0700 +@@ -1627,7 +1627,7 @@ static int Io_MvParseLineMv( Io_MvMod_t ***********************************************************************/ static int Io_MvWriteValues( Abc_Obj_t * pNode, Vec_Str_t * vFunc ) { @@ -84,17 +52,8 @@ Abc_Obj_t * pFanin; int i; // add the fanin number of values -@@ -1656,7 +1656,7 @@ static int Io_MvWriteValues( Abc_Obj_t * - ***********************************************************************/ - static int Io_MvParseLiteralMv( Io_MvMod_t * p, Abc_Obj_t * pNode, char * pToken, Vec_Str_t * vFunc, int iLit ) - { -- char Buffer[10]; -+ char Buffer[12]; - Io_MvVar_t * pVar; - Abc_Obj_t * pFanin, * pNet; - char * pCur, * pNext; ---- src/base/io/ioReadPla.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/io/ioReadPla.c 2021-03-31 09:32:18.454862614 -0600 +--- src/base/io/ioReadPla.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/base/io/ioReadPla.c 2022-01-17 08:22:16.511371568 -0700 @@ -448,7 +448,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_Fil nDigits = Abc_Base10Log( nInputs ); for ( i = 0; i < nInputs; i++ ) @@ -113,19 +72,8 @@ Io_ReadCreatePo( pNtk, Buffer ); } } ---- src/base/wlc/wlcNdr.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/wlc/wlcNdr.c 2021-03-31 09:29:26.420031140 -0600 -@@ -487,7 +487,7 @@ Wlc_Ntk_t * Wlc_NtkFromNdr( void * pData - pNtk->pManName = Abc_NamStart( NameIdMax+1, 10 ); - for ( i = 1; i <= NameIdMax; i++ ) - { -- char pName[20]; sprintf( pName, "s%0*d", nDigits, i ); -+ char pName[20]; snprintf( pName, 20U, "s%0*d", nDigits, i ); - NameId = Abc_NamStrFindOrAdd( pNtk->pManName, pName, &fFound ); - assert( !fFound && i == NameId ); - } ---- src/base/wlc/wlcNtk.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/wlc/wlcNtk.c 2021-03-31 09:34:20.110743240 -0600 +--- src/base/wlc/wlcNtk.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/base/wlc/wlcNtk.c 2022-01-17 08:22:16.512371567 -0700 @@ -1300,7 +1300,7 @@ void Wlc_NtkShortNames( Wlc_Ntk_t * p ) { if ( Wlc_ObjIsPo(pObj) ) @@ -169,19 +117,8 @@ NameId = Abc_NamStrFindOrAdd( p->pManName, pBuffer, &fFound ); Wlc_ObjSetNameId( p, Wlc_ObjId(p, pObj), NameId ); } ---- src/base/wln/wlnNdr.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/base/wln/wlnNdr.c 2021-03-31 09:29:26.420031140 -0600 -@@ -256,7 +256,7 @@ Wln_Ntk_t * Wln_NtkFromNdr( void * pData - pNtk->pManName = Abc_NamStart( NameIdMax+1, 10 ); - for ( i = 1; i <= NameIdMax; i++ ) - { -- char pName[20]; sprintf( pName, "s%0*d", nDigits, i ); -+ char pName[20]; snprintf( pName, 20U, "s%0*d", nDigits, i ); - NameId = Abc_NamStrFindOrAdd( pNtk->pManName, pName, &fFound ); - assert( !fFound && i == NameId ); - } ---- src/map/mio/mioUtils.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/map/mio/mioUtils.c 2021-03-31 09:34:48.486715391 -0600 +--- src/map/mio/mioUtils.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/map/mio/mioUtils.c 2022-01-17 08:22:16.513371566 -0700 @@ -1711,7 +1711,7 @@ void Mio_LibraryShortNames( Mio_Library_ Mio_LibraryForEachGate( pLib, pGate ) { @@ -191,8 +128,8 @@ pGate->pName = Abc_UtilStrsav( Buffer ); // update formula Mio_LibraryShortFormula( pGate, pGate->pForm, Buffer ); ---- src/map/scl/sclLibUtil.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/map/scl/sclLibUtil.c 2021-03-31 09:35:12.574691754 -0600 +--- src/map/scl/sclLibUtil.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/map/scl/sclLibUtil.c 2022-01-17 08:22:16.513371566 -0700 @@ -203,7 +203,7 @@ void Abc_SclShortNames( SC_Lib * p ) SC_RingForEachCell( pClass, pCell, k ) { @@ -202,8 +139,8 @@ pCell->pName = Abc_UtilStrsav( Buffer ); // formula SC_CellForEachPinOut( pCell, pPin, n ) ---- src/opt/dau/dauMerge.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/opt/dau/dauMerge.c 2021-03-31 09:29:26.421031139 -0600 +--- src/opt/dau/dauMerge.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/opt/dau/dauMerge.c 2022-01-17 08:22:16.513371566 -0700 @@ -715,7 +715,7 @@ Dau_DsdMergeStorePrintDefs( pS ); // create new function @@ -213,8 +150,8 @@ pTruth = Dau_DsdToTruth( pS->pOutput, nVarsTotal ); Status = Dau_DsdDecompose( pTruth, nVarsTotal, 0, 1, pS->pOutput ); //printf( "%d ", Status ); ---- src/proof/fra/fraCore.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/proof/fra/fraCore.c 2021-03-31 09:29:26.421031139 -0600 +--- src/proof/fra/fraCore.c.orig 2021-12-29 14:08:32.000000000 -0700 ++++ src/proof/fra/fraCore.c 2022-01-17 08:22:16.513371566 -0700 @@ -163,7 +163,7 @@ static inline void Fra_FraigNodeSpeculat // create manager with the logic for these two nodes pTemp = Aig_ManExtractMiter( p->pManFraig, pObjFraig, pObjReprFraig ); diff --git a/abc-strict-aliasing.patch b/abc-strict-aliasing.patch deleted file mode 100644 index ad2673b..0000000 --- a/abc-strict-aliasing.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- src/aig/gia/giaUtil.c.orig 2021-03-28 19:40:27.000000000 -0600 -+++ src/aig/gia/giaUtil.c 2021-03-31 09:24:59.453286422 -0600 -@@ -2109,11 +2109,13 @@ void Gia_AigerWriteLut( Gia_Man_t * p, c - Gia_ManForEachObj( p, pObj, i ) - if ( i && Gia_ObjIsLut(p, i) ) - { -+ word truth; - pLuts[iLut].Type = 3; - Gia_LutForEachFanin( p, i, iFan, k ) - pLuts[iLut].pFans[k] = Gia_ManObj(p, iFan)->Value; - pLuts[iLut].nFans = k; -- *(word *)pLuts[iLut].pTruth = Gia_LutComputeTruth6(p, i, vTruths); -+ truth = Gia_LutComputeTruth6(p, i, vTruths); -+ memcpy( pLuts[iLut].pTruth, &truth, sizeof(word) ); - pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 ); - iLut++; - } diff --git a/abc.rpmlintrc b/abc.rpmlintrc deleted file mode 100644 index 735aa47..0000000 --- a/abc.rpmlintrc +++ /dev/null @@ -1,5 +0,0 @@ -# THIS FILE IS FOR WHITELISTING RPMLINT ERRORS AND WARNINGS IN TASKOTRON -# https://fedoraproject.org/wiki/Taskotron/Tasks/dist.rpmlint#Whitelisting_errors - -# There is no documentation to include -addFilter(r'^abc-(devel|libs)\.[^:]+: W: no-documentation') diff --git a/abc.spec b/abc.spec index 746b09e..26c4d00 100644 --- a/abc.spec +++ b/abc.spec @@ -1,8 +1,8 @@ # Upstream doesn't make releases. We have to check the code out of git. %global owner berkeley-abc -%global gittag 9145a5c20d5fe85523364d7fe2727b8d83c90aaa +%global gittag 48498af8189ef321ee876065d8947875cf711294 %global shorttag %(cut -b -7 <<< %{gittag}) -%global gitdate 20210328 +%global gitdate 20211229 # WARNING: When updating to a newer snapshot, because upstream doesn't do # shared library versioning, run abipkgdiff (from libabigail) against the @@ -22,11 +22,11 @@ Name: abc Version: 1.01 -Release: 31.git%{gitdate}%{?dist} +Release: 32.git%{gitdate}%{?dist} Summary: Sequential logic synthesis and formal verification License: MIT -URL: http://www.eecs.berkeley.edu/~alanmi/abc/abc.htm +URL: https://people.eecs.berkeley.edu/~alanmi/abc/abc.htm Source0: https://github.com/%{owner}/%{name}/archive/%{gittag}/%{name}-%{shorttag}.tar.gz # Man page created by Jerry James using upstream text; hence, it is covered by # the same copyright and license as the code. @@ -44,10 +44,8 @@ Patch4: %{name}-format.patch # Fix an out-of-bounds array access in the gia code # https://github.com/berkeley-abc/abc/pull/89 Patch5: %{name}-gia.patch -# Fix some code that violates strict aliasing rules -Patch6: %{name}-strict-aliasing.patch # Prevent a possible buffer overflow -Patch7: %{name}-overflow.patch +Patch6: %{name}-overflow.patch BuildRequires: cmake BuildRequires: gcc-c++ @@ -103,7 +101,7 @@ touch -r %{SOURCE1} %{name}.1 sed -i 's/ -O//' Makefile %build -export CFLAGS="%{optflags} -DNDEBUG" +export CFLAGS="%{build_cflags} -DNDEBUG" %ifarch s390x CFLAGS="$CFLAGS -DEPD_BIG_ENDIAN" %endif @@ -151,6 +149,10 @@ install -p -m 0644 %{name}.1 %{buildroot}%{_mandir}/man1 %{_libdir}/lib%{name}.so %changelog +* Mon Jan 17 2022 Jerry James - 1.01-32.git20211229 +- Update to latest git snapshot +- Drop upstreamed -strict-aliasing patch + * Wed Jul 21 2021 Fedora Release Engineering - 1.01-31.git20210328 - Rebuilt for https://fedoraproject.org/wiki/Fedora_35_Mass_Rebuild diff --git a/sources b/sources index 5176329..462ab38 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (abc-9145a5c.tar.gz) = 9390afee0dadee8947114e0927a77a43d6d0e8dca2eb2d15390079db39ff32ca6685c20d60e7cb60f5e695f683a3ccb7e6420dc1e6755aa4deb7f2a1272570e5 +SHA512 (abc-48498af.tar.gz) = 97e143e981b2503854b9d5de6a7292060bcb36f374879a58909a7f385a371647a8b46f4a400f54f72be83499bef5d63fb173ae57387e83d103766da8e2362af5