Rebase to commit 48c933a69a8.

Fix logic to enable and disable gold linker
Rebase to bring in commits d9ab6e42e739fe826b02a5f868586132ea2d893a and - 0f9faaebc91bc1886a563bde6c178601b4be743b, thus fixing CVE-2026-19548.
2026-09-01 11:34:23 +01:00 · 2026-08-25 09:22:43 +02:00 · 2026-08-19 13:25:44 +01:00 · 2026-08-13 14:09:50 +01:00 · 2026-08-13 10:00:35 +01:00 · 2026-08-12 11:22:10 +01:00
38 changed files with 1482 additions and 166596 deletions
--- a/.gitignore
+++ b/.gitignore
@ -1,6 +1,8 @@
 *.diff
 *.orig
 *.rej
+*.sed
+*.xz

 *~
 .#*
@ -61,13 +63,8 @@ stamp-*
 /mpc*
 /gmp*
 /isl*
-/binutils-2.34.0-5dfc0c955dbe912cd328fc2688e5fceb3239ac2a.tar.xz
 /binutils-2.19.50.0.1-output-format.sed
-/binutils-2.35.tar.xz
-/binutils-2.35.1.tar.xz
-/binutils-2.36.1.tar.xz
-/binutils-2.37.tar.xz
-/binutils-2.38.tar.xz
-/binutils-2.39.tar.xz
-/binutils-2.40.tar.xz
-/binutils-2.41.tar.xz
+/binutils-2.44.50-13.fc43.src.rpm
+/binutils-with-gold-2.45.50-be970c68891.tar.gz
+/binutils-with-gold-2.45.50-ba5838a98fb.tar.gz
+/binutils-2.47.50-1.fc46.src.rpm
--- a/binutils-BPF-reloc-4.patch
+++ b/binutils-BPF-reloc-4.patch
@ -1,38 +0,0 @@
-diff -rup binutils.orig/bfd/bpf-reloc.def binutils-2.41/bfd/bpf-reloc.def
--- binutils.orig/bfd/bpf-reloc.def	2023-10-30 10:41:59.114273359 +0000
-+++ binutils-2.41/bfd/bpf-reloc.def	2023-10-30 11:09:41.316109162 +0000
-@@ -72,3 +72,20 @@
-         0xffffffff,            /* src_mask */
-         0xffffffff,            /* dst_mask */
-         true)                  /* pcrel_offset */
-+
-+  /* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
-+     We provide an entry here so that tools like strip can safely handle BPF
-+     binaries generated by other tools.  */
-+  BPF_HOWTO (R_BPF_64_NODYLD32,	/* type */
-+	 0,			/* rightshift */
-+	 0,			/* size */
-+	 0,			/* bitsize */
-+	 false,			/* pc_relative */
-+	 0,			/* bitpos */
-+	 complain_overflow_dont, /* complain_on_overflow */
-+	 bpf_elf_generic_reloc, /* special_function */
-+	 "R_BPF_64_NODYLD32",	/* name */
-+	 false,			/* partial_inplace */
-+	 0,			/* src_mask */
-+	 0,			/* dst_mask */
-+	 false)			/* pcrel_offset */
-diff -rup binutils.orig/include/elf/bpf.h binutils-2.41/include/elf/bpf.h
--- binutils.orig/include/elf/bpf.h	2023-10-30 10:41:59.332273599 +0000
-+++ binutils-2.41/include/elf/bpf.h	2023-10-30 10:59:44.475368448 +0000
-@@ -30,8 +30,8 @@ START_RELOC_NUMBERS (elf_bpf_reloc_type)
-   RELOC_NUMBER (R_BPF_64_64,       		1)
-   RELOC_NUMBER (R_BPF_64_ABS64,    		2)
-   RELOC_NUMBER (R_BPF_64_ABS32,    		3)
-/* R_BPF_64_NODYLD32 is not used by GNU tools.
- * It is kept in this file to remind that the value is already taken. */
-+/* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
-+   It is kept in this file to remind that the value is already taken.  */
-   RELOC_NUMBER (R_BPF_64_NODYLD32, 		4)
-   RELOC_NUMBER (R_BPF_64_32,      		10)
- END_RELOC_NUMBERS (R_BPF_max)
--- a/binutils-Intel-APX-part-1-fixes.patch
+++ b/binutils-Intel-APX-part-1-fixes.patch
@ -1,871 +0,0 @@
-diff -rupN binutils.orig/opcodes/i386-dis.c binutils-2.41/opcodes/i386-dis.c
--- binutils.orig/opcodes/i386-dis.c	2024-02-12 15:55:21.578572835 +0000
-+++ binutils-2.41/opcodes/i386-dis.c	2024-02-12 15:56:38.828623964 +0000
-@@ -8824,6 +8824,8 @@ get_valid_dis386 (const struct dis386 *d
-       break;
- 
-     case USE_3BYTE_TABLE:
-+      if (ins->last_rex2_prefix >= 0)
-+	return &err_opcode;
-       if (!fetch_code (ins->info, ins->codep + 2))
- 	return &err_opcode;
-       vindex = *ins->codep++;
-@@ -9540,8 +9542,6 @@ print_insn (bfd_vma pc, disassemble_info
-   /* REX2.M in rex2 prefix represents map0 or map1.  */
-   if (ins.last_rex2_prefix < 0 ? *ins.codep == 0x0f : (ins.rex2 & REX2_M))
-     {
-      unsigned char threebyte;
-
-       if (!ins.rex2)
- 	{
- 	  ins.codep++;
-@@ -9549,17 +9549,15 @@ print_insn (bfd_vma pc, disassemble_info
- 	    goto fetch_error_out;
- 	}
- 
-      threebyte = *ins.codep;
-      dp = &dis386_twobyte[threebyte];
-      ins.need_modrm = twobyte_has_modrm[threebyte];
-      ins.codep++;
-+      dp = &dis386_twobyte[*ins.codep];
-+      ins.need_modrm = twobyte_has_modrm[*ins.codep];
-     }
-   else
-     {
-       dp = &dis386[*ins.codep];
-       ins.need_modrm = onebyte_has_modrm[*ins.codep];
-      ins.codep++;
-     }
-+  ins.codep++;
- 
-   /* Save sizeflag for printing the extra ins.prefixes later before updating
-      it for mnemonic and operand processing.  The prefix names depend
-diff -rupN binutils.orig/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
--- binutils.orig/opcodes/i386-opc.tbl	2024-02-12 15:55:21.578572835 +0000
-+++ binutils-2.41/opcodes/i386-opc.tbl	2024-02-12 15:56:28.955616704 +0000
-@@ -1586,7 +1586,9 @@ vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Ve
- vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vbroadcastf128, 0x661a, AVX, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
- vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
- vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
- vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1614,7 +1616,9 @@ vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex
- vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vextractf128, 0x6619, AVX, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
- vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
- vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
- vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1622,6 +1626,8 @@ vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|
- vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-+// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
- vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
- vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
-@@ -1792,8 +1798,8 @@ vroundp<sd>, 0x6608 | <sd:opc>, AVX, Mod
- vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- // These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
- // 512-bit operand size, and register sources dropped.
-vroundp<sd>, 0x6608 | <sd:opc>, APX_F, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
-vrounds<sd>, 0x660a | <sd:opc>, APX_F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-+vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
-+vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
- vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
- vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1828,7 +1834,9 @@ vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|
- 
- // New AVX2 instructions.
- 
-vbroadcasti128, 0x665A, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
- vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
- vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1840,8 +1848,12 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex2
- vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
- vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
- vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
-vextracti128, 0x6639, AVX2, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
- vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-+// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
- vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
- vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
- vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-@@ -2115,12 +2127,12 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|Re
- xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
- 
- // Multy-precision Add Carry, rdseed instructions.
-adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
- adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
- adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
- rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
- 
- // SMAP instructions.
-@@ -3098,11 +3110,11 @@ rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoS
- saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {}
- rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
- wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
-wrssd, 0x66, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
-+wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
- wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex }
- wrssq, 0x66, SHSTK&APX_F, Modrm|NoSuf|Size64|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
- wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
-wrussd, 0x6665, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
-+wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
- wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
- wrussq, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
- setssbsy, 0xf30f01e8, SHSTK, NoSuf, {}
-@@ -3152,7 +3164,7 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anys
- // MOVDIR[I,64B] instructions.
- 
- movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
- movdir64b, 0x66f8, MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
- 
-@@ -3459,13 +3471,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, {
- // RAO-INT instructions.
- 
- aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aadd, 0xfc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+aadd, 0xfc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aand, 0x66fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+aand, 0x66fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aor, 0xf2fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+aor, 0xf2fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-axor, 0xf3fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+axor, 0xf3fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- 
- // RAO-INT instructions end.
- 
-diff -rupN binutils.orig/opcodes/i386-tbl.h binutils-2.41/opcodes/i386-tbl.h
--- binutils.orig/opcodes/i386-tbl.h	2024-02-12 15:55:21.578572835 +0000
-+++ binutils-2.41/opcodes/i386-tbl.h	2024-02-12 16:42:52.494835094 +0000
-@@ -15372,6 +15372,16 @@ static const insn_template i386_optab[]
- 	  1, 0, 0, 0, 1, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 1, 0, 0, 0, 0 } } } },
-+  { MN_vbroadcastf128, 0x1a, 2, SPACE_0F38, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } } } },
-   { MN_vbroadcastsd, 0x19, 2, SPACE_0F38, None,
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
-@@ -20804,6 +20814,18 @@ static const insn_template i386_optab[]
- 	  0, 1, 0, 0, 0, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
- 	  1, 0, 0, 0, 1, 0 } } } },
-+  { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 0, 0, 0, 0, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } },
-+      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } } } },
-   { MN_vextractps, 0x17, 3, SPACE_0F3A, None,
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-@@ -20890,6 +20912,20 @@ static const insn_template i386_optab[]
- 	  0, 1, 0, 0, 0, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 1, 0, 0, 0, 0 } } } },
-+  { MN_vinsertf128, 0x18, 4, SPACE_0F3A, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 0, 0, 0, 0, 0 } },
-+      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } } } },
-   { MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
-@@ -25296,7 +25332,7 @@ static const insn_template i386_optab[]
-     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
-       0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 0, 0, 0, 0, 0 } },
-@@ -25320,7 +25356,7 @@ static const insn_template i386_optab[]
-     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
-       0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 0, 0, 0, 0, 0 } },
-@@ -25346,7 +25382,7 @@ static const insn_template i386_optab[]
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-       0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
-     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 0, 0, 0, 0, 0 } },
-@@ -25374,7 +25410,7 @@ static const insn_template i386_optab[]
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 1, 2, 1, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-       0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
-     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 0, 0, 0, 0, 0 } },
-@@ -25884,6 +25920,16 @@ static const insn_template i386_optab[]
- 	  1, 0, 0, 0, 1, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 1, 0, 0, 0, 0 } } } },
-+  { MN_vbroadcasti128, 0x5a, 2, SPACE_0F38, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } } } },
-   { MN_vpblendd, 0x02, 4, SPACE_0F3A, None,
-     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
-@@ -26106,6 +26152,18 @@ static const insn_template i386_optab[]
- 	  0, 1, 0, 0, 0, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
- 	  1, 0, 0, 0, 1, 0 } } } },
-+  { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 0, 0, 0, 0, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } },
-+      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } } } },
-   { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
-     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
-@@ -26120,6 +26178,20 @@ static const insn_template i386_optab[]
- 	  0, 1, 0, 0, 0, 0 } },
-       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 1, 0, 0, 0, 0 } } } },
-+  { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+      0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-+      0 },
-+    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 0, 0, 0, 0, 0 } },
-+      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+	  1, 0, 0, 0, 1, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } },
-+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+	  0, 1, 0, 0, 0, 0 } } } },
-   { MN_vpmaskmovd, 0x8e, 3, SPACE_0F38, None,
-     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
-@@ -30933,7 +31005,7 @@ static const insn_template i386_optab[]
-     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 	  0, 0, 0, 0, 0, 0 } } } },
-   { MN_adcx, 0x66, 3, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 2, 0, 1, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -30955,7 +31027,7 @@ static const insn_template i386_optab[]
-       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 0, 0 } } } },
-   { MN_adcx, 0x66, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -30965,7 +31037,7 @@ static const insn_template i386_optab[]
-       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 0, 0 } } } },
-   { MN_adox, 0x66, 3, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 2, 0, 2, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -30987,7 +31059,7 @@ static const insn_template i386_optab[]
-       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 0, 0 } } } },
-   { MN_adox, 0x66, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -37497,7 +37569,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_wrssd, 0x66, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -37537,7 +37609,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_wrussd, 0x65, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -37697,7 +37769,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_movdiri, 0xf9, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 120, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -41093,7 +41165,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_aadd, 0xfc, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -41113,7 +41185,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_aand, 0xfc, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -41133,7 +41205,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_aor, 0xfc, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -41153,7 +41225,7 @@ static const insn_template i386_optab[]
-       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
- 	  0, 0, 0, 0, 1, 0 } } } },
-   { MN_axor, 0xfc, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       0 },
-     { { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-@@ -41398,203 +41470,203 @@ static const i386_op_off_t i386_op_sets[
-   1540, 1541, 1542, 1544, 1546, 1548, 1550, 1552,
-   1554, 1556, 1558, 1560, 1562, 1564, 1566, 1568,
-   1570, 1572, 1574, 1576, 1578, 1579, 1580, 1582,
-  1584, 1586, 1588, 1589, 1590, 1591, 1592, 1593,
-  1596, 1598, 1600, 1602, 1604, 1606, 1608, 1610,
-  1612, 1614, 1616, 1618, 1620, 1622, 1624, 1626,
-  1628, 1630, 1632, 1634, 1636, 1638, 1640, 1642,
-  1644, 1646, 1648, 1650, 1652, 1654, 1656, 1658,
-  1660, 1662, 1664, 1666, 1668, 1670, 1672, 1674,
-  1676, 1678, 1680, 1682, 1684, 1686, 1688, 1690,
-  1692, 1694, 1696, 1698, 1700, 1702, 1704, 1706,
-  1708, 1710, 1712, 1714, 1716, 1718, 1720, 1722,
-  1724, 1726, 1728, 1730, 1732, 1734, 1736, 1738,
-  1740, 1742, 1744, 1746, 1748, 1750, 1752, 1754,
-  1756, 1758, 1760, 1762, 1764, 1766, 1768, 1770,
-  1772, 1774, 1776, 1778, 1780, 1782, 1784, 1786,
-  1788, 1790, 1792, 1794, 1796, 1798, 1800, 1802,
-  1804, 1806, 1808, 1810, 1812, 1814, 1816, 1818,
-  1820, 1822, 1824, 1826, 1828, 1830, 1832, 1834,
-  1836, 1838, 1840, 1842, 1844, 1846, 1848, 1850,
-  1852, 1854, 1856, 1858, 1860, 1862, 1864, 1866,
-  1868, 1870, 1872, 1874, 1876, 1878, 1880, 1882,
-  1884, 1886, 1888, 1890, 1892, 1894, 1896, 1898,
-  1900, 1902, 1904, 1906, 1908, 1910, 1912, 1914,
-  1916, 1918, 1920, 1922, 1924, 1926, 1928, 1930,
-  1932, 1934, 1936, 1938, 1940, 1942, 1944, 1946,
-  1948, 1950, 1952, 1954, 1956, 1958, 1960, 1962,
-  1964, 1966, 1968, 1970, 1972, 1974, 1976, 1978,
-  1983, 1985, 1990, 1992, 1994, 1999, 2001, 2003,
-  2005, 2010, 2012, 2014, 2016, 2020, 2026, 2028,
-  2033, 2035, 2037, 2039, 2041, 2043, 2045, 2047,
-  2049, 2051, 2052, 2053, 2054, 2056, 2057, 2058,
-  2059, 2060, 2061, 2063, 2064, 2065, 2066, 2068,
-  2070, 2072, 2074, 2076, 2078, 2080, 2082, 2084,
-  2086, 2088, 2090, 2092, 2096, 2097, 2098, 2100,
-  2104, 2108, 2110, 2114, 2118, 2119, 2120, 2122,
-  2124, 2126, 2128, 2133, 2137, 2141, 2143, 2145,
-  2147, 2149, 2150, 2152, 2154, 2156, 2158, 2160,
-  2162, 2164, 2166, 2168, 2170, 2172, 2174, 2176,
-  2178, 2180, 2182, 2184, 2186, 2188, 2190, 2192,
-  2194, 2195, 2196, 2198, 2200, 2201, 2202, 2205,
-  2208, 2211, 2214, 2216, 2218, 2220, 2222, 2224,
-  2226, 2227, 2228, 2229, 2231, 2235, 2237, 2239,
-  2245, 2249, 2250, 2251, 2252, 2253, 2254, 2255,
-  2256, 2260, 2262, 2264, 2268, 2270, 2272, 2274,
-  2276, 2278, 2280, 2282, 2284, 2286, 2288, 2290,
-  2292, 2294, 2296, 2297, 2300, 2303, 2308, 2313,
-  2316, 2319, 2322, 2325, 2330, 2335, 2338, 2341,
-  2343, 2345, 2347, 2349, 2351, 2353, 2355, 2356,
-  2358, 2360, 2362, 2364, 2366, 2367, 2368, 2369,
-  2373, 2377, 2379, 2383, 2387, 2391, 2395, 2399,
-  2401, 2405, 2407, 2409, 2411, 2413, 2415, 2417,
-  2419, 2421, 2422, 2424, 2426, 2428, 2430, 2432,
-  2434, 2436, 2438, 2439, 2440, 2441, 2443, 2445,
-  2447, 2449, 2450, 2451, 2453, 2455, 2457, 2459,
-  2461, 2463, 2464, 2466, 2468, 2470, 2472, 2473,
-  2474, 2476, 2478, 2480, 2482, 2484, 2486, 2488,
-  2490, 2491, 2492, 2493, 2494, 2497, 2500, 2502,
-  2505, 2506, 2507, 2509, 2510, 2512, 2513, 2514,
-  2516, 2518, 2519, 2520, 2521, 2522, 2523, 2526,
-  2531, 2536, 2541, 2546, 2549, 2554, 2559, 2561,
-  2563, 2565, 2567, 2568, 2569, 2571, 2573, 2575,
-  2577, 2579, 2581, 2583, 2584, 2585, 2586, 2587,
-  2588, 2589, 2594, 2599, 2600, 2601, 2602, 2603,
-  2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611,
-  2612, 2613, 2614, 2615, 2616, 2617, 2618, 2619,
-  2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627,
-  2628, 2629, 2630, 2631, 2632, 2633, 2634, 2635,
-  2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643,
-  2644, 2645, 2646, 2647, 2648, 2649, 2650, 2651,
-  2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659,
-  2660, 2661, 2662, 2663, 2664, 2665, 2666, 2667,
-  2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675,
-  2676, 2677, 2678, 2679, 2680, 2681, 2682, 2683,
-  2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691,
-  2692, 2693, 2694, 2695, 2696, 2697, 2698, 2699,
-  2700, 2701, 2702, 2703, 2704, 2705, 2706, 2707,
-  2708, 2709, 2710, 2711, 2712, 2713, 2714, 2715,
-  2716, 2717, 2718, 2719, 2720, 2721, 2722, 2723,
-  2724, 2725, 2726, 2727, 2728, 2729, 2730, 2731,
-  2732, 2733, 2734, 2735, 2736, 2737, 2738, 2739,
-  2740, 2741, 2742, 2743, 2744, 2745, 2746, 2747,
-  2748, 2749, 2750, 2751, 2752, 2753, 2754, 2755,
-  2756, 2757, 2758, 2759, 2760, 2761, 2762, 2763,
-  2764, 2765, 2766, 2767, 2768, 2769, 2770, 2771,
-  2772, 2773, 2774, 2775, 2776, 2777, 2778, 2779,
-  2780, 2781, 2782, 2783, 2784, 2785, 2786, 2787,
-  2788, 2789, 2790, 2791, 2792, 2793, 2794, 2795,
-  2796, 2797, 2798, 2799, 2800, 2802, 2804, 2805,
-  2806, 2807, 2808, 2809, 2810, 2811, 2812, 2813,
-  2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821,
-  2822, 2823, 2824, 2825, 2826, 2827, 2828, 2829,
-  2830, 2831, 2832, 2834, 2836, 2838, 2840, 2841,
-  2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849,
-  2850, 2851, 2852, 2853, 2855, 2856, 2857, 2858,
-  2859, 2860, 2861, 2862, 2863, 2864, 2865, 2866,
-  2867, 2868, 2869, 2870, 2871, 2872, 2873, 2874,
-  2875, 2876, 2877, 2878, 2879, 2880, 2881, 2882,
-  2883, 2884, 2885, 2886, 2887, 2888, 2889, 2890,
-  2891, 2892, 2893, 2894, 2895, 2896, 2897, 2898,
-  2899, 2900, 2902, 2904, 2905, 2906, 2908, 2909,
-  2911, 2913, 2914, 2915, 2917, 2919, 2920, 2921,
-  2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929,
-  2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
-  2940, 2943, 2944, 2945, 2946, 2947, 2948, 2949,
-  2951, 2953, 2955, 2956, 2957, 2959, 2961, 2963,
-  2965, 2969, 2971, 2973, 2974, 2975, 2976, 2977,
-  2978, 2979, 2980, 2981, 2982, 2983, 2984, 2985,
-  2986, 2987, 2988, 2989, 2990, 2991, 2994, 2997,
-  2998, 2999, 3000, 3001, 3002, 3003, 3004, 3005,
-  3006, 3007, 3008, 3009, 3010, 3011, 3012, 3013,
-  3014, 3015, 3016, 3017, 3018, 3019, 3020, 3021,
-  3022, 3023, 3024, 3025, 3026, 3027, 3028, 3029,
-  3030, 3031, 3032, 3033, 3034, 3035, 3036, 3037,
-  3038, 3039, 3040, 3041, 3042, 3043, 3044, 3045,
-  3046, 3047, 3048, 3049, 3050, 3051, 3054, 3056,
-  3059, 3062, 3064, 3067, 3070, 3073, 3076, 3077,
-  3080, 3081, 3082, 3083, 3084, 3085, 3089, 3091,
-  3094, 3095, 3096, 3097, 3098, 3099, 3100, 3101,
-  3102, 3103, 3104, 3105, 3106, 3107, 3108, 3109,
-  3110, 3111, 3112, 3113, 3114, 3115, 3116, 3117,
-  3118, 3119, 3120, 3121, 3122, 3123, 3124, 3125,
-  3126, 3127, 3128, 3129, 3130, 3131, 3132, 3133,
-  3134, 3135, 3136, 3137, 3138, 3139, 3140, 3141,
-  3142, 3143, 3144, 3145, 3146, 3147, 3148, 3149,
-  3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158,
-  3159, 3160, 3161, 3162, 3163, 3164, 3165, 3166,
-  3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174,
-  3175, 3176, 3177, 3178, 3179, 3180, 3181, 3182,
-  3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190,
-  3193, 3196, 3199, 3202, 3205, 3208, 3211, 3214,
-  3217, 3220, 3223, 3226, 3229, 3232, 3235, 3236,
-  3237, 3238, 3239, 3241, 3242, 3243, 3244, 3245,
-  3246, 3247, 3248, 3249, 3250, 3251, 3252, 3253,
-  3254, 3255, 3256, 3257, 3258, 3259, 3260, 3261,
-  3262, 3263, 3264, 3265, 3266, 3267, 3268, 3269,
-  3270, 3271, 3272, 3273, 3274, 3275, 3276, 3277,
-  3278, 3279, 3280, 3281, 3282, 3283, 3284, 3285,
-  3286, 3287, 3288, 3289, 3290, 3291, 3292, 3293,
-  3294, 3295, 3296, 3297, 3298, 3299, 3300, 3301,
-  3302, 3305, 3308, 3309, 3310, 3311, 3312, 3313,
-  3314, 3315, 3316, 3317, 3318, 3319, 3320, 3321,
-  3322, 3323, 3324, 3325, 3326, 3327, 3328, 3329,
-  3330, 3331, 3332, 3333, 3334, 3335, 3336, 3337,
-  3338, 3339, 3340, 3341, 3342, 3343, 3344, 3345,
-  3346, 3347, 3348, 3349, 3350, 3351, 3352, 3353,
-  3354, 3355, 3356, 3357, 3358, 3359, 3360, 3361,
-  3362, 3363, 3364, 3365, 3366, 3367, 3368, 3369,
-  3370, 3373, 3376, 3379, 3380, 3381, 3382, 3383,
-  3384, 3385, 3386, 3387, 3388, 3389, 3390, 3391,
-  3392, 3393, 3394, 3395, 3398, 3401, 3402, 3403,
-  3406, 3407, 3408, 3409, 3410, 3413, 3416, 3419,
-  3420, 3421, 3422, 3423, 3424, 3425, 3426, 3427,
-  3428, 3429, 3431, 3433, 3434, 3435, 3436, 3437,
-  3438, 3439, 3440, 3441, 3442, 3443, 3444, 3445,
-  3446, 3447, 3448, 3449, 3450, 3451, 3452, 3453,
-  3454, 3455, 3456, 3457, 3458, 3460, 3462, 3463,
-  3464, 3465, 3466, 3467, 3468, 3469, 3470, 3471,
-  3472, 3473, 3474, 3475, 3476, 3477, 3478, 3479,
-  3480, 3481, 3482, 3483, 3484, 3485, 3486, 3487,
-  3489, 3491, 3493, 3495, 3496, 3497, 3498, 3499,
-  3500, 3501, 3502, 3503, 3504, 3505, 3506, 3507,
-  3508, 3509, 3510, 3512, 3513, 3515, 3518, 3520,
-  3521, 3522, 3524, 3526, 3527, 3528, 3529, 3530,
-  3531, 3532, 3534, 3536, 3538, 3540, 3541, 3542,
-  3543, 3544, 3545, 3546, 3547, 3548, 3549, 3551,
-  3553, 3554, 3556, 3558, 3559, 3564, 3566, 3568,
-  3569, 3570, 3571, 3572, 3573, 3574, 3575, 3577,
-  3579, 3580, 3581, 3582, 3584, 3587, 3590, 3593,
-  3595, 3596, 3597, 3598, 3599, 3600, 3601, 3602,
-  3603, 3604, 3605, 3606, 3607, 3608, 3609, 3610,
-  3611, 3612, 3613, 3614, 3615, 3617, 3619, 3621,
-  3623, 3625, 3627, 3629, 3631, 3633, 3635, 3636,
-  3637, 3638, 3639, 3640, 3641, 3642, 3643, 3644,
-  3645, 3646, 3647, 3648, 3649, 3650, 3651, 3652,
-  3653, 3654, 3655, 3656, 3657, 3658, 3659, 3660,
-  3661, 3662, 3663, 3664, 3665, 3666, 3667, 3668,
-  3669, 3670, 3671, 3672, 3673, 3674, 3675, 3676,
-  3677, 3678, 3679, 3680, 3681, 3682, 3683, 3684,
-  3685, 3686, 3687, 3688, 3689, 3690, 3691, 3692,
-  3693, 3694, 3695, 3696, 3697, 3698, 3699, 3700,
-  3701, 3702, 3703, 3704, 3705, 3706, 3707, 3708,
-  3709, 3710, 3711, 3712, 3713, 3714, 3715, 3716,
-  3717, 3718, 3719, 3720, 3721, 3722, 3723, 3724,
-  3725, 3726, 3727, 3728, 3729, 3730, 3731, 3732,
-  3733, 3734, 3735, 3736, 3737, 3738, 3739, 3740,
-  3741, 3742, 3743, 3744, 3745, 3746, 3747, 3750,
-  3751, 3752, 3755, 3756, 3757, 3759, 3760, 3761,
-  3762, 3764, 3765, 3766, 3767, 3769, 3770, 3771,
-  3772, 3775, 3776, 3777, 3778, 3779, 3782, 3785,
-  3788, 3791, 3794, 3795, 3796, 3797, 3798, 3800,
-  3802, 3803, 3804, 3805, 3808, 3811, 3814, 3817,
-  3820, 3821, 3822, 3823, 3825, 3826, 3827, 3828,
-  3830, 3831, 3832, 3833, 3834, 3835, 3836, 3837,
-  3838, 3839, 3840, 3841, 3842, 3843, 3844, 3845,
-  3846, 3847, 3848, 3849, 3850, 3851, 3852, 3853,
-  3854, 3855, 3856, 3857, 3858, 3859, 3860, 3861,
-  3862, 3863, 3864, 3865, 3866, 3867, 3868, 3869,
-  3871, 3873, 3875, 3877, 3879, 3880, 3881, 3884,
-  3887, 3888, 3889, 3890, 3891
-+  1584, 1586, 1588, 1589, 1590, 1591, 1592, 1594,
-+  1597, 1599, 1601, 1603, 1605, 1607, 1609, 1611,
-+  1613, 1615, 1617, 1619, 1621, 1623, 1625, 1627,
-+  1629, 1631, 1633, 1635, 1637, 1639, 1641, 1643,
-+  1645, 1647, 1649, 1651, 1653, 1655, 1657, 1659,
-+  1661, 1663, 1665, 1667, 1669, 1671, 1673, 1675,
-+  1677, 1679, 1681, 1683, 1685, 1687, 1689, 1691,
-+  1693, 1695, 1697, 1699, 1701, 1703, 1705, 1707,
-+  1709, 1711, 1713, 1715, 1717, 1719, 1721, 1723,
-+  1725, 1727, 1729, 1731, 1733, 1735, 1737, 1739,
-+  1741, 1743, 1745, 1747, 1749, 1751, 1753, 1755,
-+  1757, 1759, 1761, 1763, 1765, 1767, 1769, 1771,
-+  1773, 1775, 1777, 1779, 1781, 1783, 1785, 1787,
-+  1789, 1791, 1793, 1795, 1797, 1799, 1801, 1803,
-+  1805, 1807, 1809, 1811, 1813, 1815, 1817, 1819,
-+  1821, 1823, 1825, 1827, 1829, 1831, 1833, 1835,
-+  1837, 1839, 1841, 1843, 1845, 1847, 1849, 1851,
-+  1853, 1855, 1857, 1859, 1861, 1863, 1865, 1867,
-+  1869, 1871, 1873, 1875, 1877, 1879, 1881, 1883,
-+  1885, 1887, 1889, 1891, 1893, 1895, 1897, 1899,
-+  1901, 1903, 1905, 1907, 1909, 1911, 1913, 1915,
-+  1917, 1919, 1921, 1923, 1925, 1927, 1929, 1931,
-+  1933, 1935, 1937, 1939, 1941, 1943, 1945, 1947,
-+  1949, 1951, 1953, 1955, 1957, 1959, 1961, 1963,
-+  1965, 1967, 1969, 1971, 1973, 1975, 1977, 1979,
-+  1984, 1986, 1991, 1993, 1995, 2000, 2002, 2004,
-+  2006, 2011, 2013, 2015, 2017, 2021, 2027, 2029,
-+  2034, 2036, 2038, 2040, 2042, 2044, 2046, 2048,
-+  2050, 2052, 2053, 2054, 2056, 2058, 2059, 2060,
-+  2061, 2062, 2064, 2066, 2067, 2068, 2069, 2071,
-+  2073, 2075, 2077, 2079, 2081, 2083, 2085, 2087,
-+  2089, 2091, 2093, 2095, 2099, 2100, 2101, 2103,
-+  2107, 2111, 2113, 2117, 2121, 2122, 2123, 2125,
-+  2127, 2129, 2131, 2136, 2140, 2144, 2146, 2148,
-+  2150, 2152, 2153, 2155, 2157, 2159, 2161, 2163,
-+  2165, 2167, 2169, 2171, 2173, 2175, 2177, 2179,
-+  2181, 2183, 2185, 2187, 2189, 2191, 2193, 2195,
-+  2197, 2198, 2199, 2201, 2203, 2204, 2205, 2208,
-+  2211, 2214, 2217, 2219, 2221, 2223, 2225, 2227,
-+  2229, 2230, 2231, 2232, 2234, 2238, 2240, 2242,
-+  2248, 2252, 2253, 2254, 2255, 2256, 2257, 2258,
-+  2259, 2263, 2265, 2267, 2271, 2273, 2275, 2277,
-+  2279, 2281, 2283, 2285, 2287, 2289, 2291, 2293,
-+  2295, 2297, 2299, 2300, 2303, 2306, 2311, 2316,
-+  2319, 2322, 2325, 2328, 2333, 2338, 2341, 2344,
-+  2346, 2348, 2350, 2352, 2354, 2356, 2358, 2359,
-+  2361, 2363, 2365, 2367, 2369, 2370, 2371, 2372,
-+  2376, 2380, 2382, 2386, 2390, 2394, 2398, 2402,
-+  2404, 2408, 2410, 2412, 2414, 2416, 2418, 2420,
-+  2422, 2424, 2425, 2427, 2429, 2431, 2433, 2435,
-+  2437, 2439, 2441, 2442, 2443, 2444, 2446, 2448,
-+  2450, 2452, 2453, 2454, 2456, 2458, 2460, 2462,
-+  2464, 2466, 2467, 2469, 2471, 2473, 2475, 2476,
-+  2477, 2479, 2481, 2483, 2485, 2487, 2489, 2491,
-+  2493, 2494, 2495, 2497, 2498, 2501, 2504, 2506,
-+  2509, 2510, 2511, 2513, 2514, 2516, 2518, 2520,
-+  2522, 2524, 2525, 2526, 2527, 2528, 2529, 2532,
-+  2537, 2542, 2547, 2552, 2555, 2560, 2565, 2567,
-+  2569, 2571, 2573, 2574, 2575, 2577, 2579, 2581,
-+  2583, 2585, 2587, 2589, 2590, 2591, 2592, 2593,
-+  2594, 2595, 2600, 2605, 2606, 2607, 2608, 2609,
-+  2610, 2611, 2612, 2613, 2614, 2615, 2616, 2617,
-+  2618, 2619, 2620, 2621, 2622, 2623, 2624, 2625,
-+  2626, 2627, 2628, 2629, 2630, 2631, 2632, 2633,
-+  2634, 2635, 2636, 2637, 2638, 2639, 2640, 2641,
-+  2642, 2643, 2644, 2645, 2646, 2647, 2648, 2649,
-+  2650, 2651, 2652, 2653, 2654, 2655, 2656, 2657,
-+  2658, 2659, 2660, 2661, 2662, 2663, 2664, 2665,
-+  2666, 2667, 2668, 2669, 2670, 2671, 2672, 2673,
-+  2674, 2675, 2676, 2677, 2678, 2679, 2680, 2681,
-+  2682, 2683, 2684, 2685, 2686, 2687, 2688, 2689,
-+  2690, 2691, 2692, 2693, 2694, 2695, 2696, 2697,
-+  2698, 2699, 2700, 2701, 2702, 2703, 2704, 2705,
-+  2706, 2707, 2708, 2709, 2710, 2711, 2712, 2713,
-+  2714, 2715, 2716, 2717, 2718, 2719, 2720, 2721,
-+  2722, 2723, 2724, 2725, 2726, 2727, 2728, 2729,
-+  2730, 2731, 2732, 2733, 2734, 2735, 2736, 2737,
-+  2738, 2739, 2740, 2741, 2742, 2743, 2744, 2745,
-+  2746, 2747, 2748, 2749, 2750, 2751, 2752, 2753,
-+  2754, 2755, 2756, 2757, 2758, 2759, 2760, 2761,
-+  2762, 2763, 2764, 2765, 2766, 2767, 2768, 2769,
-+  2770, 2771, 2772, 2773, 2774, 2775, 2776, 2777,
-+  2778, 2779, 2780, 2781, 2782, 2783, 2784, 2785,
-+  2786, 2787, 2788, 2789, 2790, 2791, 2792, 2793,
-+  2794, 2795, 2796, 2797, 2798, 2799, 2800, 2801,
-+  2802, 2803, 2804, 2805, 2806, 2808, 2810, 2811,
-+  2812, 2813, 2814, 2815, 2816, 2817, 2818, 2819,
-+  2820, 2821, 2822, 2823, 2824, 2825, 2826, 2827,
-+  2828, 2829, 2830, 2831, 2832, 2833, 2834, 2835,
-+  2836, 2837, 2838, 2840, 2842, 2844, 2846, 2847,
-+  2848, 2849, 2850, 2851, 2852, 2853, 2854, 2855,
-+  2856, 2857, 2858, 2859, 2861, 2862, 2863, 2864,
-+  2865, 2866, 2867, 2868, 2869, 2870, 2871, 2872,
-+  2873, 2874, 2875, 2876, 2877, 2878, 2879, 2880,
-+  2881, 2882, 2883, 2884, 2885, 2886, 2887, 2888,
-+  2889, 2890, 2891, 2892, 2893, 2894, 2895, 2896,
-+  2897, 2898, 2899, 2900, 2901, 2902, 2903, 2904,
-+  2905, 2906, 2908, 2910, 2911, 2912, 2914, 2915,
-+  2917, 2919, 2920, 2921, 2923, 2925, 2926, 2927,
-+  2928, 2929, 2930, 2931, 2932, 2933, 2934, 2935,
-+  2936, 2937, 2938, 2939, 2940, 2941, 2942, 2943,
-+  2946, 2949, 2950, 2951, 2952, 2953, 2954, 2955,
-+  2957, 2959, 2961, 2962, 2963, 2965, 2967, 2969,
-+  2971, 2975, 2977, 2979, 2980, 2981, 2982, 2983,
-+  2984, 2985, 2986, 2987, 2988, 2989, 2990, 2991,
-+  2992, 2993, 2994, 2995, 2996, 2997, 3000, 3003,
-+  3004, 3005, 3006, 3007, 3008, 3009, 3010, 3011,
-+  3012, 3013, 3014, 3015, 3016, 3017, 3018, 3019,
-+  3020, 3021, 3022, 3023, 3024, 3025, 3026, 3027,
-+  3028, 3029, 3030, 3031, 3032, 3033, 3034, 3035,
-+  3036, 3037, 3038, 3039, 3040, 3041, 3042, 3043,
-+  3044, 3045, 3046, 3047, 3048, 3049, 3050, 3051,
-+  3052, 3053, 3054, 3055, 3056, 3057, 3060, 3062,
-+  3065, 3068, 3070, 3073, 3076, 3079, 3082, 3083,
-+  3086, 3087, 3088, 3089, 3090, 3091, 3095, 3097,
-+  3100, 3101, 3102, 3103, 3104, 3105, 3106, 3107,
-+  3108, 3109, 3110, 3111, 3112, 3113, 3114, 3115,
-+  3116, 3117, 3118, 3119, 3120, 3121, 3122, 3123,
-+  3124, 3125, 3126, 3127, 3128, 3129, 3130, 3131,
-+  3132, 3133, 3134, 3135, 3136, 3137, 3138, 3139,
-+  3140, 3141, 3142, 3143, 3144, 3145, 3146, 3147,
-+  3148, 3149, 3150, 3151, 3152, 3153, 3154, 3155,
-+  3157, 3158, 3159, 3160, 3161, 3162, 3163, 3164,
-+  3165, 3166, 3167, 3168, 3169, 3170, 3171, 3172,
-+  3173, 3174, 3175, 3176, 3177, 3178, 3179, 3180,
-+  3181, 3182, 3183, 3184, 3185, 3186, 3187, 3188,
-+  3189, 3190, 3191, 3192, 3193, 3194, 3195, 3196,
-+  3199, 3202, 3205, 3208, 3211, 3214, 3217, 3220,
-+  3223, 3226, 3229, 3232, 3235, 3238, 3241, 3242,
-+  3243, 3244, 3245, 3247, 3248, 3249, 3250, 3251,
-+  3252, 3253, 3254, 3255, 3256, 3257, 3258, 3259,
-+  3260, 3261, 3262, 3263, 3264, 3265, 3266, 3267,
-+  3268, 3269, 3270, 3271, 3272, 3273, 3274, 3275,
-+  3276, 3277, 3278, 3279, 3280, 3281, 3282, 3283,
-+  3284, 3285, 3286, 3287, 3288, 3289, 3290, 3291,
-+  3292, 3293, 3294, 3295, 3296, 3297, 3298, 3299,
-+  3300, 3301, 3302, 3303, 3304, 3305, 3306, 3307,
-+  3308, 3311, 3314, 3315, 3316, 3317, 3318, 3319,
-+  3320, 3321, 3322, 3323, 3324, 3325, 3326, 3327,
-+  3328, 3329, 3330, 3331, 3332, 3333, 3334, 3335,
-+  3336, 3337, 3338, 3339, 3340, 3341, 3342, 3343,
-+  3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351,
-+  3352, 3353, 3354, 3355, 3356, 3357, 3358, 3359,
-+  3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367,
-+  3368, 3369, 3370, 3371, 3372, 3373, 3374, 3375,
-+  3376, 3379, 3382, 3385, 3386, 3387, 3388, 3389,
-+  3390, 3391, 3392, 3393, 3394, 3395, 3396, 3397,
-+  3398, 3399, 3400, 3401, 3404, 3407, 3408, 3409,
-+  3412, 3413, 3414, 3415, 3416, 3419, 3422, 3425,
-+  3426, 3427, 3428, 3429, 3430, 3431, 3432, 3433,
-+  3434, 3435, 3437, 3439, 3440, 3441, 3442, 3443,
-+  3444, 3445, 3446, 3447, 3448, 3449, 3450, 3451,
-+  3452, 3453, 3454, 3455, 3456, 3457, 3458, 3459,
-+  3460, 3461, 3462, 3463, 3464, 3466, 3468, 3469,
-+  3470, 3471, 3472, 3473, 3474, 3475, 3476, 3477,
-+  3478, 3479, 3480, 3481, 3482, 3483, 3484, 3485,
-+  3486, 3487, 3488, 3489, 3490, 3491, 3492, 3493,
-+  3495, 3497, 3499, 3501, 3502, 3503, 3504, 3505,
-+  3506, 3507, 3508, 3509, 3510, 3511, 3512, 3513,
-+  3514, 3515, 3516, 3518, 3519, 3521, 3524, 3526,
-+  3527, 3528, 3530, 3532, 3533, 3534, 3535, 3536,
-+  3537, 3538, 3540, 3542, 3544, 3546, 3547, 3548,
-+  3549, 3550, 3551, 3552, 3553, 3554, 3555, 3557,
-+  3559, 3560, 3562, 3564, 3565, 3570, 3572, 3574,
-+  3575, 3576, 3577, 3578, 3579, 3580, 3581, 3583,
-+  3585, 3586, 3587, 3588, 3590, 3593, 3596, 3599,
-+  3601, 3602, 3603, 3604, 3605, 3606, 3607, 3608,
-+  3609, 3610, 3611, 3612, 3613, 3614, 3615, 3616,
-+  3617, 3618, 3619, 3620, 3621, 3623, 3625, 3627,
-+  3629, 3631, 3633, 3635, 3637, 3639, 3641, 3642,
-+  3643, 3644, 3645, 3646, 3647, 3648, 3649, 3650,
-+  3651, 3652, 3653, 3654, 3655, 3656, 3657, 3658,
-+  3659, 3660, 3661, 3662, 3663, 3664, 3665, 3666,
-+  3667, 3668, 3669, 3670, 3671, 3672, 3673, 3674,
-+  3675, 3676, 3677, 3678, 3679, 3680, 3681, 3682,
-+  3683, 3684, 3685, 3686, 3687, 3688, 3689, 3690,
-+  3691, 3692, 3693, 3694, 3695, 3696, 3697, 3698,
-+  3699, 3700, 3701, 3702, 3703, 3704, 3705, 3706,
-+  3707, 3708, 3709, 3710, 3711, 3712, 3713, 3714,
-+  3715, 3716, 3717, 3718, 3719, 3720, 3721, 3722,
-+  3723, 3724, 3725, 3726, 3727, 3728, 3729, 3730,
-+  3731, 3732, 3733, 3734, 3735, 3736, 3737, 3738,
-+  3739, 3740, 3741, 3742, 3743, 3744, 3745, 3746,
-+  3747, 3748, 3749, 3750, 3751, 3752, 3753, 3756,
-+  3757, 3758, 3761, 3762, 3763, 3765, 3766, 3767,
-+  3768, 3770, 3771, 3772, 3773, 3775, 3776, 3777,
-+  3778, 3781, 3782, 3783, 3784, 3785, 3788, 3791,
-+  3794, 3797, 3800, 3801, 3802, 3803, 3804, 3806,
-+  3808, 3809, 3810, 3811, 3814, 3817, 3820, 3823,
-+  3826, 3827, 3828, 3829, 3831, 3832, 3833, 3834,
-+  3836, 3837, 3838, 3839, 3840, 3841, 3842, 3843,
-+  3844, 3845, 3846, 3847, 3848, 3849, 3850, 3851,
-+  3852, 3853, 3854, 3855, 3856, 3857, 3858, 3859,
-+  3860, 3861, 3862, 3863, 3864, 3865, 3866, 3867,
-+  3868, 3869, 3870, 3871, 3872, 3873, 3874, 3875,
-+  3877, 3879, 3881, 3883, 3885, 3886, 3887, 3890,
-+  3893, 3894, 3895, 3896, 3897
- };
- 
- /* i386 mnemonics table.  */
-diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d	2024-02-12 15:55:20.792572349 +0000
-+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d	2024-02-12 15:56:07.355601128 +0000
-@@ -158,6 +158,12 @@ Disassembly of section \.text:
- [	 ]*[a-f0-9]+:[	 ]*62 da 7f 08 4b b4 87 23 01 00 00[	 ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
- [	 ]*[a-f0-9]+:[	 ]*62 da 7d 08 4b b4 87 23 01 00 00[	 ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\]
- [	 ]*[a-f0-9]+:[	 ]*62 da 7e 08 4b b4 87 23 01 00 00[	 ]+tilestored[	 ]+\[r31\+rax\*4\+0x123\],tmm6
-+[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 1a 18[	 ]+vbroadcastf32x4 ymm3,XMMWORD PTR \[r16\]
-+[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 5a 18[	 ]+vbroadcasti32x4 ymm3,XMMWORD PTR \[r16\]
-+[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 19 18 01[	 ]+vextractf32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
-+[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 39 18 01[	 ]+vextracti32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
-+[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 18 00 01[	 ]+vinsertf32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
-+[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 38 00 01[	 ]+vinserti32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
- [	 ]*[a-f0-9]+:[	 ]*62 db fd 08 09 30 01[	 ]+vrndscalepd xmm6,XMMWORD PTR \[r24\],(0x)?1
- [	 ]*[a-f0-9]+:[	 ]*62 db 7d 08 08 30 02[	 ]+vrndscaleps xmm6,XMMWORD PTR \[r24\],(0x)?2
- [	 ]*[a-f0-9]+:[	 ]*62 db cd 08 0b 18 03[	 ]+vrndscalesd xmm3,xmm6,QWORD PTR \[r24\],(0x)?3
-diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d	2024-02-12 15:55:20.792572349 +0000
-+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d	2024-02-12 15:56:07.355601128 +0000
-@@ -158,6 +158,12 @@ Disassembly of section \.text:
- [	 ]*[a-f0-9]+:[	 ]*62 da 7f 08 4b b4 87 23 01 00 00[	 ]+tileloadd[	 ]+0x123\(%r31,%rax,4\),%tmm6
- [	 ]*[a-f0-9]+:[	 ]*62 da 7d 08 4b b4 87 23 01 00 00[	 ]+tileloaddt1[	 ]+0x123\(%r31,%rax,4\),%tmm6
- [	 ]*[a-f0-9]+:[	 ]*62 da 7e 08 4b b4 87 23 01 00 00[	 ]+tilestored[	 ]+%tmm6,0x123\(%r31,%rax,4\)
-+[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 1a 18[	 ]+vbroadcastf32x4 \(%r16\),%ymm3
-+[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 5a 18[	 ]+vbroadcasti32x4 \(%r16\),%ymm3
-+[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 19 18 01[	 ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
-+[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 39 18 01[	 ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
-+[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 18 00 01[	 ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
-+[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 38 00 01[	 ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
- [	 ]*[a-f0-9]+:[	 ]*62 db fd 08 09 30 01[	 ]+vrndscalepd \$0x1,\(%r24\),%xmm6
- [	 ]*[a-f0-9]+:[	 ]*62 db 7d 08 08 30 02[	 ]+vrndscaleps \$0x2,\(%r24\),%xmm6
- [	 ]*[a-f0-9]+:[	 ]*62 db cd 08 0b 18 03[	 ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
-diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s	2024-02-12 15:55:20.792572349 +0000
-+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s	2024-02-12 15:56:07.356601129 +0000
-@@ -152,6 +152,12 @@ _start:
- 	tileloadd	0x123(%r31,%rax,4),%tmm6
- 	tileloaddt1	0x123(%r31,%rax,4),%tmm6
- 	tilestored	%tmm6,0x123(%r31,%rax,4)
-+	vbroadcastf128	(%r16),%ymm3
-+	vbroadcasti128	(%r16),%ymm3
-+	vextractf128	$1,%ymm3,(%r16)
-+	vextracti128	$1,%ymm3,(%r16)
-+	vinsertf128	$1,(%r16),%ymm3,%ymm8
-+	vinserti128	$1,(%r16),%ymm3,%ymm8
- 	vroundpd $1,(%r24),%xmm6
- 	vroundps $2,(%r24),%xmm6
- 	vroundsd $3,(%r24),%xmm6,%xmm3
--- a/binutils-Intel-APX-part-1.patch
+++ b/binutils-Intel-APX-part-1.patch
--- a/binutils-LTO-restore-wrapper-symbol.patch
+++ b/binutils-LTO-restore-wrapper-symbol.patch
@ -0,0 +1,154 @@
+From 3221c470f0765886a49a1a3d2ec602e4104a377b Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Fri, 2 Aug 2024 19:52:00 -0700
+Subject: [PATCH] LTO: Restore the wrapper symbol check for standard function
+
+Call unwrap_hash_lookup to restore the wrapper symbol check for standard
+function since reference to standard function may not show up in LTO
+symbol table:
+
+[hjl@gnu-tgl-3 pr31956-3]$ nm foo.o
+00000000 T main
+         U __real_malloc
+00000000 T __wrap_malloc
+[hjl@gnu-tgl-3 pr31956-3]$  lto-dump -list foo.o
+Type   Visibility  Size  Name
+function  default     0  malloc
+function  default     0  __real_malloc
+function  default     3  main
+function  default     5  __wrap_malloc
+[hjl@gnu-tgl-3 pr31956-3]$ make
+gcc -O2 -flto -Wall   -c -o foo.o foo.c
+gcc -Wl,--wrap=malloc -O2 -flto -Wall -o x foo.o
+/usr/local/bin/ld: /tmp/ccsPW0a9.ltrans0.ltrans.o: in function `main':
+<artificial>:(.text.startup+0xa): undefined reference to `__wrap_malloc'
+collect2: error: ld returned 1 exit status
+make: *** [Makefile:22: x] Error 1
+[hjl@gnu-tgl-3 pr31956-3]$
+
+Also add a test to verify that the unused wrapper is removed.
+
+	PR ld/31956
+	* plugin.c (get_symbols): Restore the wrapper symbol check for
+	standard function.
+	* testsuite/ld-plugin/lto.exp: Run the malloc test and the
+	unused test.
+	* testsuite/ld-plugin/pr31956c.c: New file.
+	* testsuite/ld-plugin/pr31956d.c: New file.
+	* testsuite/ld-plugin/pr31956d.d: New file.
+
+Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
+---
+ ld/plugin.c                       | 14 ++++++++++++--
+ ld/testsuite/ld-plugin/lto.exp    | 16 ++++++++++++++++
+ ld/testsuite/ld-plugin/pr31956c.c | 19 +++++++++++++++++++
+ ld/testsuite/ld-plugin/pr31956d.c |  7 +++++++
+ ld/testsuite/ld-plugin/pr31956d.d |  4 ++++
+ 5 files changed, 58 insertions(+), 2 deletions(-)
+ create mode 100644 ld/testsuite/ld-plugin/pr31956c.c
+ create mode 100644 ld/testsuite/ld-plugin/pr31956d.c
+ create mode 100644 ld/testsuite/ld-plugin/pr31956d.d
+
+diff --git a/ld/plugin.c b/ld/plugin.c
+index 03ee9880d10..51c4765cc5b 100644
+--- a/ld/plugin.c
+++ b/ld/plugin.c
+@@ -778,8 +778,18 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms,
+ 	{
+ 	  blhe = h;
+ 	  /* Check if a symbol is a wrapper symbol.  */
+-	  if (blhe && blhe->wrapper_symbol)
+-	    wrap_status = wrapper;
+	  if (blhe)
+	    {
+	      if (blhe->wrapper_symbol)
+		wrap_status = wrapper;
+	      else if (link_info.wrap_hash != NULL)
+		{
+		  struct bfd_link_hash_entry *unwrap
+		    = unwrap_hash_lookup (&link_info, (bfd *) abfd, blhe);
+		  if (unwrap != NULL && unwrap != h)
+		    wrap_status = wrapper;
+		}
+	    }
+ 	}
+       else
+ 	{
+diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
+index ad59e2abd61..1a8c3736307 100644
+--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
+@@ -546,6 +546,22 @@ set lto_link_elf_tests [list \
+    {} \
+    "pr31956b" \
+   ] \
+  [list \
+   "PR ld/31956 (malloc)" \
+   "-Wl,--wrap=malloc" \
+   "-O2 -flto" \
+   {pr31956c.c} \
+   {} \
+   "pr31956c" \
+  ] \
+  [list \
+   "PR ld/31956 (unused)" \
+   "-Wl,--wrap=parse_line" \
+   "-O2 -flto" \
+   {pr31956d.c} \
+   {{"nm" {} "pr31956d.d"}} \
+   "pr31956d" \
+  ] \
+   [list \
+    "Build pr30281.so" \
+    "-shared -Wl,--version-script,pr30281.t \
+diff --git a/ld/testsuite/ld-plugin/pr31956c.c b/ld/testsuite/ld-plugin/pr31956c.c
+new file mode 100644
+index 00000000000..4a46b2b49a8
+--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956c.c
+@@ -0,0 +1,19 @@
+#include <stdlib.h>
+
+extern void *__real_malloc (size_t);
+
+void *
+__wrap_malloc (size_t n)
+{
+  if (n == 0)
+    return NULL;
+  else
+    return __real_malloc (n);
+};
+
+int
+main (void)
+{
+  void *ptr = malloc (30);
+  return ptr == NULL ? 1 : 0;
+}
+diff --git a/ld/testsuite/ld-plugin/pr31956d.c b/ld/testsuite/ld-plugin/pr31956d.c
+new file mode 100644
+index 00000000000..cb7f2d50643
+--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956d.c
+@@ -0,0 +1,7 @@
+void __wrap_parse_line(void) {};
+
+int
+main (void)
+{
+  return 0;
+}
+diff --git a/ld/testsuite/ld-plugin/pr31956d.d b/ld/testsuite/ld-plugin/pr31956d.d
+new file mode 100644
+index 00000000000..b579cdc7353
+--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956d.d
+@@ -0,0 +1,4 @@
+#failif
+#...
+[0-9a-f]+ T .*parse_line
+#...
+-- 
+2.45.2
+
--- a/binutils-aarch64-big-bti-programs.patch
+++ b/binutils-aarch64-big-bti-programs.patch
@ -1,139 +0,0 @@
-diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
-index 4592bd6da27..4faf642b422 100644
--- a/bfd/elfnn-aarch64.c
-+++ b/bfd/elfnn-aarch64.c
-@@ -3675,7 +3675,7 @@ group_sections (struct elf_aarch64_link_hash_table *htab,
- /* True if the inserted stub does not break BTI compatibility.  */
- 
- static bool
-aarch64_bti_stub_p (bfd *input_bfd,
-+aarch64_bti_stub_p (struct bfd_link_info *info,
- 		    struct elf_aarch64_stub_hash_entry *stub_entry)
- {
-   /* Stubs without indirect branch are BTI compatible.  */
-@@ -3685,12 +3685,22 @@ aarch64_bti_stub_p (bfd *input_bfd,
- 
-   /* Return true if the target instruction is compatible with BR x16.  */
- 
-+  struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
-   asection *section = stub_entry->target_section;
-   bfd_byte loc[4];
-   file_ptr off = stub_entry->target_value;
-   bfd_size_type count = sizeof (loc);
- 
-  if (!bfd_get_section_contents (input_bfd, section, loc, off, count))
-+  /* PLT code is not generated yet, so treat it specially.
-+     Note: Checking elf_aarch64_obj_tdata.plt_type & PLT_BTI is not
-+     enough because it only implies BTI in the PLT0 and tlsdesc PLT
-+     entries. Normal PLT entries don't have BTI in a shared library
-+     (because such PLT is normally not called indirectly and adding
-+     the BTI when a stub targets a PLT would change the PLT layout
-+     and it's too late for that here).  */
-+  if (section == globals->root.splt)
-+    memcpy (loc, globals->plt_entry, count);
-+  else if (!bfd_get_section_contents (section->owner, section, loc, off, count))
-     return false;
- 
-   uint32_t insn = bfd_getl32 (loc);
-@@ -4637,11 +4647,24 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
- 
- 	      /* A stub with indirect jump may break BTI compatibility, so
- 		 insert another stub with direct jump near the target then.  */
-	      if (need_bti && !aarch64_bti_stub_p (input_bfd, stub_entry))
-+	      if (need_bti && !aarch64_bti_stub_p (info, stub_entry))
- 		{
-+		  id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
-+
-+		  /* If the stub with indirect jump and the BTI stub are in
-+		     the same stub group: change the indirect jump stub into
-+		     a BTI stub since a direct branch can reach the target.
-+		     The BTI landing pad is still needed in case another
-+		     stub indirectly jumps to it.  */
-+		  if (id_sec_bti == id_sec)
-+		    {
-+		      stub_entry->stub_type = aarch64_stub_bti_direct_branch;
-+		      goto skip_double_stub;
-+		    }
-+
- 		  stub_entry->double_stub = true;
- 		  htab->has_double_stub = true;
-		  id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
-+
- 		  stub_name_bti =
- 		    elfNN_aarch64_stub_name (id_sec_bti, sym_sec, hash, irela);
- 		  if (!stub_name_bti)
-@@ -4653,33 +4676,41 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
- 		  stub_entry_bti =
- 		    aarch64_stub_hash_lookup (&htab->stub_hash_table,
- 					      stub_name_bti, false, false);
-		  if (stub_entry_bti == NULL)
-		    stub_entry_bti =
-		      _bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
-							    sym_sec, htab);
-		  if (stub_entry_bti == NULL)
-+		  if (stub_entry_bti != NULL)
-+		    BFD_ASSERT (stub_entry_bti->stub_type
-+				== aarch64_stub_bti_direct_branch);
-+		  else
- 		    {
-		      free (stub_name);
-		      free (stub_name_bti);
-		      goto error_ret_free_internal;
-		    }
-
-		  stub_entry_bti->target_value = sym_value + irela->r_addend;
-		  stub_entry_bti->target_section = sym_sec;
-		  stub_entry_bti->stub_type = aarch64_stub_bti_direct_branch;
-		  stub_entry_bti->h = hash;
-		  stub_entry_bti->st_type = st_type;
-+		      stub_entry_bti =
-+			_bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
-+							      sym_sec, htab);
-+		      if (stub_entry_bti == NULL)
-+			{
-+			  free (stub_name);
-+			  free (stub_name_bti);
-+			  goto error_ret_free_internal;
-+			}
- 
-		  len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
-		  stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd, len);
-		  if (stub_entry_bti->output_name == NULL)
-		    {
-		      free (stub_name);
-		      free (stub_name_bti);
-		      goto error_ret_free_internal;
-+		      stub_entry_bti->target_value =
-+			sym_value + irela->r_addend;
-+		      stub_entry_bti->target_section = sym_sec;
-+		      stub_entry_bti->stub_type =
-+			aarch64_stub_bti_direct_branch;
-+		      stub_entry_bti->h = hash;
-+		      stub_entry_bti->st_type = st_type;
-+
-+		      len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
-+		      stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd,
-+							       len);
-+		      if (stub_entry_bti->output_name == NULL)
-+			{
-+			  free (stub_name);
-+			  free (stub_name_bti);
-+			  goto error_ret_free_internal;
-+			}
-+		      snprintf (stub_entry_bti->output_name, len,
-+				BTI_STUB_ENTRY_NAME, sym_name);
- 		    }
-		  snprintf (stub_entry_bti->output_name, len,
-			    BTI_STUB_ENTRY_NAME, sym_name);
- 
- 		  /* Update the indirect call stub to target the BTI stub.  */
- 		  stub_entry->target_value = 0;
-@@ -4688,7 +4719,7 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
- 		  stub_entry->h = NULL;
- 		  stub_entry->st_type = STT_FUNC;
- 		}
-
-+skip_double_stub:
- 	      *stub_changed = true;
- 	    }
- 
--- a/binutils-aarch64-small-plt0.patch
+++ b/binutils-aarch64-small-plt0.patch
@ -0,0 +1,12 @@
+--- binutils.orig/bfd/elfnn-aarch64.c	2025-02-07 13:42:20.961333141 +0000
+++ binutils-with-gold-2.44/bfd/elfnn-aarch64.c	2025-02-07 13:42:29.781353740 +0000
+@@ -10162,7 +10162,8 @@ elfNN_aarch64_init_small_plt0_entry (bfd
+   /* PR 26312: Explicitly set the sh_entsize to 0 so that
+      consumers do not think that the section contains fixed
+      sized objects.  */
+-  elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
+  if (elf_section_data (htab->root.splt->output_section) != NULL)
+    elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
+ 
+   plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
+ 		  + htab->root.sgotplt->output_offset
--- a/binutils-big-merge.patch
+++ b/binutils-big-merge.patch
@ -1,29 +0,0 @@
--- binutils.orig/bfd/merge.c	2023-11-07 09:49:56.923358543 +0000
-+++ binutils-2.41/bfd/merge.c	2023-11-07 09:51:47.031552039 +0000
-@@ -167,7 +167,7 @@ static bool
- sec_merge_maybe_resize (struct sec_merge_hash *table, unsigned added)
- {
-   struct bfd_hash_table *bfdtab = &table->table;
-  if (bfdtab->count + added > table->nbuckets * 2 / 3)
-+  if (bfdtab->count + added > table->nbuckets / 3 * 2)
-     {
-       unsigned i;
-       unsigned long newnb = table->nbuckets * 2;
-@@ -175,7 +175,7 @@ sec_merge_maybe_resize (struct sec_merge
-       uint64_t *newl;
-       unsigned long alloc;
- 
-      while (bfdtab->count + added > newnb * 2 / 3)
-+      while (bfdtab->count + added > newnb / 3 * 2)
- 	{
- 	  newnb *= 2;
- 	  if (!newnb)
-@@ -240,7 +240,7 @@ sec_merge_hash_insert (struct sec_merge_
-   hashp->u.suffix = NULL;
-   hashp->next = NULL;
-   // We must not need resizing, otherwise _index is wrong
-  BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets * 2 / 3);
-+  BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets / 3 * 2);
-   bfdtab->count++;
-   table->key_lens[_index] = (hash << 32) | (uint32_t)len;
-   table->values[_index] = hashp;
--- a/binutils-demangler-updates.patch
+++ b/binutils-demangler-updates.patch
@ -1,374 +0,0 @@
--- binutils.orig/include/demangle.h	2024-01-17 09:54:10.945686323 +0000
-+++ binutils-2.41/include/demangle.h	2024-01-17 09:54:55.696760281 +0000
-@@ -1,5 +1,5 @@
- /* Defs for interface to demanglers.
-   Copyright (C) 1992-2023 Free Software Foundation, Inc.
-+   Copyright (C) 1992-2024 Free Software Foundation, Inc.
- 
-    This program is free software; you can redistribute it and/or
-    modify it under the terms of the GNU Library General Public License
-@@ -448,6 +448,8 @@ enum demangle_component_type
-   DEMANGLE_COMPONENT_TRANSACTION_SAFE,
-   /* A cloned function.  */
-   DEMANGLE_COMPONENT_CLONE,
-+  /* A member-like friend function.  */
-+  DEMANGLE_COMPONENT_FRIEND,
-   DEMANGLE_COMPONENT_NOEXCEPT,
-   DEMANGLE_COMPONENT_THROW_SPEC,
- 
-@@ -464,6 +466,8 @@ enum demangle_component_type
-   DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM,
-   DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM,
- 
-+  DEMANGLE_COMPONENT_CONSTRAINTS,
-+
-   /* A builtin type with argument.  This holds the builtin type
-      information.  */
-   DEMANGLE_COMPONENT_EXTENDED_BUILTIN_TYPE
-diff -rup binutils.orig/libiberty/cp-demangle.c binutils-2.41/libiberty/cp-demangle.c
--- binutils.orig/libiberty/cp-demangle.c	2024-01-17 09:54:11.323686947 +0000
-+++ binutils-2.41/libiberty/cp-demangle.c	2024-01-17 09:54:42.468738420 +0000
-@@ -1,5 +1,5 @@
- /* Demangler for g++ V3 ABI.
-   Copyright (C) 2003-2023 Free Software Foundation, Inc.
-+   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-    Written by Ian Lance Taylor <ian@wasabisystems.com>.
- 
-    This file is part of the libiberty library, which is part of GCC.
-@@ -993,6 +993,7 @@ d_make_comp (struct d_info *di, enum dem
-     case DEMANGLE_COMPONENT_VECTOR_TYPE:
-     case DEMANGLE_COMPONENT_CLONE:
-     case DEMANGLE_COMPONENT_MODULE_ENTITY:
-+    case DEMANGLE_COMPONENT_CONSTRAINTS:
-       if (left == NULL || right == NULL)
- 	return NULL;
-       break;
-@@ -1036,6 +1037,7 @@ d_make_comp (struct d_info *di, enum dem
-     case DEMANGLE_COMPONENT_TEMPLATE_NON_TYPE_PARM:
-     case DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM:
-     case DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM:
-+    case DEMANGLE_COMPONENT_FRIEND:
-       if (left == NULL)
- 	return NULL;
-       break;
-@@ -1344,6 +1346,22 @@ is_ctor_dtor_or_conversion (struct deman
-     }
- }
- 
-+/* [ Q <constraint-expression> ] */
-+
-+static struct demangle_component *
-+d_maybe_constraints (struct d_info *di, struct demangle_component *dc)
-+{
-+  if (d_peek_char (di) == 'Q')
-+    {
-+      d_advance (di, 1);
-+      struct demangle_component *expr = d_expression (di);
-+      if (expr == NULL)
-+	return NULL;
-+      dc = d_make_comp (di, DEMANGLE_COMPONENT_CONSTRAINTS, dc, expr);
-+    }
-+  return dc;
-+}
-+
- /* <encoding> ::= <(function) name> <bare-function-type>
-               ::= <(data) name>
-               ::= <special-name>
-@@ -1397,21 +1415,21 @@ d_encoding (struct d_info *di, int top_l
- 	      struct demangle_component *ftype;
- 
- 	      ftype = d_bare_function_type (di, has_return_type (dc));
-	      if (ftype)
-		{
-		  /* If this is a non-top-level local-name, clear the
-		     return type, so it doesn't confuse the user by
-		     being confused with the return type of whaever
-		     this is nested within.  */
-		  if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
-		      && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
-		    d_left (ftype) = NULL;
-+	      if (!ftype)
-+		return NULL;
- 
-		  dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
-				    dc, ftype);
-		}
-	      else
-		dc = NULL;
-+	      /* If this is a non-top-level local-name, clear the
-+		 return type, so it doesn't confuse the user by
-+		 being confused with the return type of whaever
-+		 this is nested within.  */
-+	      if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
-+		  && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
-+		d_left (ftype) = NULL;
-+
-+	      ftype = d_maybe_constraints (di, ftype);
-+
-+	      dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
-+				dc, ftype);
- 	    }
- 	}
-     }
-@@ -1681,6 +1699,7 @@ d_maybe_module_name (struct d_info *di,
- /* <unqualified-name> ::= [<module-name>] <operator-name> [<abi-tags>]
-                       ::= [<module-name>] <ctor-dtor-name> [<abi-tags>]
-                       ::= [<module-name>] <source-name> [<abi-tags>]
-+		      ::= [<module-name>] F <source-name> [<abi-tags>]
- 		      ::= [<module-name>] <local-source-name>  [<abi-tags>]
-                       ::= [<module-name>] DC <source-name>+ E [<abi-tags>]
-     <local-source-name>	::= L <source-name> <discriminator> [<abi-tags>]
-@@ -1692,11 +1711,18 @@ d_unqualified_name (struct d_info *di, s
- {
-   struct demangle_component *ret;
-   char peek;
-+  int member_like_friend = 0;
- 
-   if (!d_maybe_module_name (di, &module))
-     return NULL;
- 
-   peek = d_peek_char (di);
-+  if (peek == 'F')
-+    {
-+      member_like_friend = 1;
-+      d_advance (di, 1);
-+      peek = d_peek_char (di);
-+    }
-   if (IS_DIGIT (peek))
-     ret = d_source_name (di);
-   else if (IS_LOWER (peek))
-@@ -1773,6 +1799,8 @@ d_unqualified_name (struct d_info *di, s
-     ret = d_make_comp (di, DEMANGLE_COMPONENT_MODULE_ENTITY, ret, module);
-   if (d_peek_char (di) == 'B')
-     ret = d_abi_tags (di, ret);
-+  if (member_like_friend)
-+    ret = d_make_comp (di, DEMANGLE_COMPONENT_FRIEND, ret, NULL);
-   if (scope)
-     ret = d_make_comp (di, DEMANGLE_COMPONENT_QUAL_NAME, scope, ret);
- 
-@@ -3012,7 +3040,7 @@ d_parmlist (struct d_info *di)
-       struct demangle_component *type;
- 
-       char peek = d_peek_char (di);
-      if (peek == '\0' || peek == 'E' || peek == '.')
-+      if (peek == '\0' || peek == 'E' || peek == '.' || peek == 'Q')
- 	break;
-       if ((peek == 'R' || peek == 'O')
- 	  && d_peek_next_char (di) == 'E')
-@@ -3248,7 +3276,7 @@ d_template_args (struct d_info *di)
-   return d_template_args_1 (di);
- }
- 
-/* <template-arg>* E  */
-+/* <template-arg>* [Q <constraint-expression>] E  */
- 
- static struct demangle_component *
- d_template_args_1 (struct d_info *di)
-@@ -3284,13 +3312,17 @@ d_template_args_1 (struct d_info *di)
- 	return NULL;
-       pal = &d_right (*pal);
- 
-      if (d_peek_char (di) == 'E')
-	{
-	  d_advance (di, 1);
-	  break;
-	}
-+      char peek = d_peek_char (di);
-+      if (peek == 'E' || peek == 'Q')
-+	break;
-     }
- 
-+  al = d_maybe_constraints (di, al);
-+
-+  if (d_peek_char (di) != 'E')
-+    return NULL;
-+  d_advance (di, 1);
-+
-   di->last_name = hold_last_name;
- 
-   return al;
-@@ -4431,6 +4463,7 @@ d_count_templates_scopes (struct d_print
-     case DEMANGLE_COMPONENT_PACK_EXPANSION:
-     case DEMANGLE_COMPONENT_TAGGED_NAME:
-     case DEMANGLE_COMPONENT_CLONE:
-+    case DEMANGLE_COMPONENT_CONSTRAINTS:
-     recurse_left_right:
-       /* PR 89394 - Check for too much recursion.  */
-       if (dpi->recursion > DEMANGLE_RECURSION_LIMIT)
-@@ -4459,6 +4492,7 @@ d_count_templates_scopes (struct d_print
-     case DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS:
-     case DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS:
-     case DEMANGLE_COMPONENT_MODULE_ENTITY:
-+    case DEMANGLE_COMPONENT_FRIEND:
-       d_count_templates_scopes (dpi, d_left (dc));
-       break;
- 
-@@ -5189,6 +5223,22 @@ d_print_comp_inner (struct d_print_info
- 	    dpt.next = dpi->templates;
- 	    dpi->templates = &dpt;
- 	    dpt.template_decl = typed_name;
-+
-+	    /* Constraints are mangled as part of the template argument list,
-+	       so they wrap the _TEMPLATE_ARGLIST.  But
-+	       d_lookup_template_argument expects the RHS of _TEMPLATE to be
-+	       the _ARGLIST, and constraints need to refer to these args.  So
-+	       move the _CONSTRAINTS out of the _TEMPLATE and onto the type.
-+	       This will result in them being printed after the () like a
-+	       trailing requires-clause, but that seems like our best option
-+	       given that we aren't printing a template-head.  */
-+	    struct demangle_component *tnr = d_right (typed_name);
-+	    if (tnr->type == DEMANGLE_COMPONENT_CONSTRAINTS)
-+	      {
-+		d_right (typed_name) = d_left (tnr);
-+		d_left (tnr) = d_right (dc);
-+		d_right (dc) = tnr;
-+	      }
- 	  }
- 
- 	d_print_comp (dpi, options, d_right (dc));
-@@ -6197,6 +6247,11 @@ d_print_comp_inner (struct d_print_info
-       d_append_char (dpi, ']');
-       return;
- 
-+    case DEMANGLE_COMPONENT_FRIEND:
-+      d_print_comp (dpi, options, d_left (dc));
-+      d_append_string (dpi, "[friend]");
-+      return;
-+
-     case DEMANGLE_COMPONENT_TEMPLATE_HEAD:
-       {
- 	d_append_char (dpi, '<');
-@@ -6231,6 +6286,12 @@ d_print_comp_inner (struct d_print_info
-       d_append_string (dpi, "...");
-       return;
- 
-+    case DEMANGLE_COMPONENT_CONSTRAINTS:
-+      d_print_comp (dpi, options, d_left (dc));
-+      d_append_string (dpi, " requires ");
-+      d_print_comp (dpi, options, d_right (dc));
-+      return;
-+
-     default:
-       d_print_error (dpi);
-       return;
--- binutils.orig/include/demangle.h	2024-01-17 11:06:11.111229985 +0000
-+++ binutils-2.41/include/demangle.h	2024-01-17 11:06:21.281242709 +0000
-@@ -314,6 +314,8 @@ enum demangle_component_type
-   /* C++11: An rvalue reference modifying a member function.  The one
-      subtree is the type which is being referenced.  */
-   DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS,
-+  /* C++23: A member function with explict object parameter.  */
-+  DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
-   /* A vendor qualifier.  The left subtree is the type which is being
-      qualified, and the right subtree is the name of the
-      qualifier.  */
--- binutils.orig/libiberty/cp-demangle.c	2024-01-17 11:06:11.246230153 +0000
-+++ binutils-2.41/libiberty/cp-demangle.c	2024-01-17 11:06:21.282242710 +0000
-@@ -581,6 +581,7 @@ static char *d_demangle (const char *, i
-     case DEMANGLE_COMPONENT_CONST_THIS:			\
-     case DEMANGLE_COMPONENT_REFERENCE_THIS:		\
-     case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:	\
-+    case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:	\
-     case DEMANGLE_COMPONENT_TRANSACTION_SAFE:		\
-     case DEMANGLE_COMPONENT_NOEXCEPT:			\
-     case DEMANGLE_COMPONENT_THROW_SPEC
-@@ -749,6 +750,9 @@ d_dump (struct demangle_component *dc, i
-     case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
-       printf ("rvalue reference this\n");
-       break;
-+    case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
-+      printf ("explicit object parameter\n");
-+      break;
-     case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
-       printf ("transaction_safe this\n");
-       break;
-@@ -1547,6 +1551,8 @@ d_name (struct d_info *di, int substable
- 
- /* <nested-name> ::= N [<CV-qualifiers>] [<ref-qualifier>] <prefix> <unqualified-name> E
-                  ::= N [<CV-qualifiers>] [<ref-qualifier>] <template-prefix> <template-args> E
-+                 ::= N H <prefix> <unqualified-name> E
-+                 ::= N H <template-prefix> <template-args> E
- */
- 
- static struct demangle_component *
-@@ -1559,13 +1565,24 @@ d_nested_name (struct d_info *di)
-   if (! d_check_char (di, 'N'))
-     return NULL;
- 
-  pret = d_cv_qualifiers (di, &ret, 1);
-  if (pret == NULL)
-    return NULL;
-+  if (d_peek_char (di) == 'H')
-+    {
-+      d_advance (di, 1);
-+      di->expansion += sizeof "this";
-+      pret = &ret;
-+      rqual = d_make_comp (di, DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
-+			   NULL, NULL);
-+    }
-+  else
-+    {
-+      pret = d_cv_qualifiers (di, &ret, 1);
-+      if (pret == NULL)
-+	return NULL;
- 
-  /* Parse the ref-qualifier now and then attach it
-     once we have something to attach it to.  */
-  rqual = d_ref_qualifier (di, NULL);
-+      /* Parse the ref-qualifier now and then attach it
-+	 once we have something to attach it to.  */
-+      rqual = d_ref_qualifier (di, NULL);
-+    }
- 
-   *pret = d_prefix (di, 1);
-   if (*pret == NULL)
-@@ -4427,6 +4444,7 @@ d_count_templates_scopes (struct d_print
-     case DEMANGLE_COMPONENT_CONST_THIS:
-     case DEMANGLE_COMPONENT_REFERENCE_THIS:
-     case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
-+    case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
-     case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
-     case DEMANGLE_COMPONENT_NOEXCEPT:
-     case DEMANGLE_COMPONENT_THROW_SPEC:
-@@ -6521,6 +6539,8 @@ d_print_mod (struct d_print_info *dpi, i
-     case DEMANGLE_COMPONENT_RVALUE_REFERENCE:
-       d_append_string (dpi, "&&");
-       return;
-+    case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
-+      return;
-     case DEMANGLE_COMPONENT_COMPLEX:
-       d_append_string (dpi, " _Complex");
-       return;
-@@ -6559,11 +6579,13 @@ d_print_function_type (struct d_print_in
- {
-   int need_paren;
-   int need_space;
-+  int xobj_memfn;
-   struct d_print_mod *p;
-   struct d_print_mod *hold_modifiers;
- 
-   need_paren = 0;
-   need_space = 0;
-+  xobj_memfn = 0;
-   for (p = mods; p != NULL; p = p->next)
-     {
-       if (p->printed)
-@@ -6586,7 +6608,8 @@ d_print_function_type (struct d_print_in
- 	  need_space = 1;
- 	  need_paren = 1;
- 	  break;
-	FNQUAL_COMPONENT_CASE:
-+	case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
-+	  xobj_memfn = 1;
- 	  break;
- 	default:
- 	  break;
-@@ -6617,6 +6640,8 @@ d_print_function_type (struct d_print_in
-     d_append_char (dpi, ')');
- 
-   d_append_char (dpi, '(');
-+  if (xobj_memfn)
-+    d_append_string (dpi, "this ");
- 
-   if (d_right (dc) != NULL)
-     d_print_comp (dpi, options, d_right (dc));
--- a/binutils-do-not-link-with-static-libstdc++.patch
+++ b/binutils-do-not-link-with-static-libstdc++.patch
@ -51,10 +51,9 @@ diff -rup binutils.orig/configure binutils-2.40/configure
 
 
 if test -n "$ac_tool_prefix"; then
-diff -rup binutils.orig/configure.ac binutils-2.40/configure.ac
--- binutils.orig/configure.ac	2023-02-13 14:43:00.728877170 +0000
-+++ binutils-2.40/configure.ac	2023-02-13 14:43:13.671864892 +0000
-@@ -1435,26 +1435,6 @@ if test -z "$LD"; then
+--- binutils.orig/configure.ac	2024-11-26 15:08:50.162328683 +0000
+++ binutils-2.43.50-1686dc7079f/configure.ac	2024-11-26 15:08:56.929374527 +0000
+@@ -1410,26 +1410,6 @@ if test -z "$LD"; then
   fi
 fi
 
@ -80,6 +79,4 @@ diff -rup binutils.orig/configure.ac binutils-2.40/configure.ac
 -
 ACX_PROG_GNAT
 ACX_PROG_GDC
- ACX_PROG_CMP_IGNORE_INITIAL
-Only in binutils-2.40: configure.ac.orig
-Only in binutils-2.40: configure.orig
+ ACX_PROG_CARGO
--- a/binutils-execstack-error.patch
+++ b/binutils-execstack-error.patch
--- a/binutils-fix-ar-test.patch
+++ b/binutils-fix-ar-test.patch
@ -0,0 +1,11 @@
+--- binutils.orig/binutils/testsuite/binutils-all/ar.exp	2024-02-07 13:02:23.490031197 +0000
+++ binutils-2.42/binutils/testsuite/binutils-all/ar.exp	2024-02-07 13:03:10.285034069 +0000
+@@ -1017,7 +1017,7 @@ symbol_table
+ argument_parsing
+ deterministic_archive
+ replacing_deterministic_member
+-replacing_non_deterministic_member
+# replacing_non_deterministic_member
+ replacing_sde_deterministic_member
+ delete_an_element
+ move_an_element
--- a/binutils-gold-powerpc.patch
+++ b/binutils-gold-powerpc.patch
@ -1,71 +0,0 @@
-diff -rup binutils.orig/gold/powerpc.cc binutils-2.41/gold/powerpc.cc
--- binutils.orig/gold/powerpc.cc	2023-08-25 11:21:08.882071604 +0100
-+++ binutils-2.41/gold/powerpc.cc	2023-08-25 11:21:26.050081034 +0100
-@@ -3714,12 +3714,7 @@ Target_powerpc<size, big_endian>::do_rel
-   unsigned int prev_brlt_size = 0;
-   if (pass == 1)
-     {
-      bool thread_safe
-	= this->abiversion() < 2 && parameters->options().plt_thread_safe();
-      if (size == 64
-	  && this->abiversion() < 2
-	  && !thread_safe
-	  && !parameters->options().user_set_plt_thread_safe())
-+      if (size == 64 && this->abiversion() < 2)
- 	{
- 	  static const char* const thread_starter[] =
- 	    {
-@@ -3747,29 +3742,37 @@ Target_powerpc<size, big_endian>::do_rel
- 	      /* libgo */
- 	      "__go_go",
- 	    };
-+	  bool thread_safe = parameters->options().plt_thread_safe();
- 
-	  if (parameters->options().shared())
-	    thread_safe = true;
-	  else
-+	  if (!thread_safe
-+	      && !parameters->options().user_set_plt_thread_safe())
- 	    {
-	      for (unsigned int i = 0;
-		   i < sizeof(thread_starter) / sizeof(thread_starter[0]);
-		   i++)
-+	      if (parameters->options().shared())
-+		thread_safe = true;
-+	      else
- 		{
-		  Symbol* sym = symtab->lookup(thread_starter[i], NULL);
-		  thread_safe = (sym != NULL
-				 && sym->in_reg()
-				 && sym->in_real_elf());
-		  if (thread_safe)
-		    break;
-+		  for (unsigned int i = 0;
-+		       i < sizeof(thread_starter) / sizeof(thread_starter[0]);
-+		       i++)
-+		    {
-+		      Symbol* sym = symtab->lookup(thread_starter[i], NULL);
-+		      thread_safe = (sym != NULL
-+				     && sym->in_reg()
-+				     && sym->in_real_elf());
-+		      if (thread_safe)
-+			break;
-+		    }
- 		}
- 	    }
-+	  this->plt_thread_safe_ = thread_safe;
- 	}
-      this->plt_thread_safe_ = thread_safe;
- 
-      if (parameters->options().output_is_position_independent())
-	this->rela_dyn_size_
-	  = this->rela_dyn_section(layout)->current_data_size();
-+      if (size == 64
-+	  && parameters->options().output_is_position_independent())
-+	{
-+	  gold_assert (this->rela_dyn_);
-+	  this->rela_dyn_size_ = this->rela_dyn_->current_data_size();
-+	}
- 
-       this->stub_group_size_ = parameters->options().stub_group_size();
-       bool no_size_errors = true;
--- a/binutils-gold-s390-configure.patch
+++ b/binutils-gold-s390-configure.patch
@ -0,0 +1,40 @@
+# The gold linker does not build if the target list includes s390x-linux
+# but does not include s390-linux.  ie it needs the 32-bit target to be
+# enabled in order for the 64-bit target to work.  On the other hand the
+# BFD library does not support the 32-bit s390 target.  So this patch
+# "enhances" the gold configure script so that if s390x is listed, the
+# s390 target will automatically be added to the list as well.
+
+diff -upr orig/gold/configure binutils-2.47/gold/configure
+--- orig/gold/configure	2026-07-27 09:38:54.907192013 +0100
+++ binutils-2.47/gold/configure	2026-07-27 10:12:02.759629540 +0100
+@@ -5223,7 +5223,12 @@ if test -n "$enable_targets"; then
+   for targ in `echo $enable_targets | sed -e 's/,/ /g'`; do
+     result=`$ac_config_sub $targ 2>/dev/null`
+     if test -n "$result"; then
+-      canon_targets="$canon_targets $result"
+      canon_targets="$canon_targets $result" ;
+      case "$result" in
+      s390x-*)
+            canon_targets="$canon_targets s390-gnu-linux"
+	    ;;
+      esac
+     else
+       # Permit unrecognized target names, like "all".
+       canon_targets="$canon_targets $targ"
+diff -upr orig/gold/configure.ac binutils-2.47/gold/configure.ac
+--- orig/gold/configure.ac	2026-07-27 09:38:54.907192013 +0100
+++ binutils-2.47/gold/configure.ac	2026-07-27 10:18:18.480766140 +0100
+@@ -133,6 +133,12 @@ if test -n "$enable_targets"; then
+     result=`$ac_config_sub $targ 2>/dev/null`
+     if test -n "$result"; then
+       canon_targets="$canon_targets $result"
+      # Hack: Enable the s390-linux target if s390x-linux is enabled.
+      case "$result" in
+      s390x-*)
+            canon_targets="$canon_targets s390-gnu-linux"
+	    ;;
+      esac
+     else
+       # Permit unrecognized target names, like "all".
+       canon_targets="$canon_targets $targ"
--- a/binutils-gold-warn-unsupported.patch
+++ b/binutils-gold-warn-unsupported.patch
@ -24,26 +24,6 @@ diff -rup binutils.orig/gold/configure.ac binutils-2.34/gold/configure.ac
     else
       targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)"
       if test "$targ_extra_obj" != ""; then
--- binutils.orig/ld/configure.tgt	2020-04-20 12:35:12.465301359 +0100
-+++ binutils-2.34/ld/configure.tgt	2020-04-20 14:17:52.123066333 +0100
-@@ -220,7 +220,7 @@ bfin-*-linux-uclibc*)	targ_emul=elf32bfi
- 			targ_extra_emuls="elf32bfin"
- 			targ_extra_libpath=$targ_extra_emuls
- 			;;
-bpf-*-*)		targ_emul=elf64bpf
-+bpf-* | bpf-*-*)	targ_emul=elf64bpf
- 			;;
- cr16-*-elf*)		targ_emul=elf32cr16
- 			;;
-@@ -1026,7 +1026,7 @@ z8k-*-coff)		targ_emul=z8002
- 			targ_extra_ofiles=
- 			;;
- *)
-  echo 2>&1 "*** ld does not support target ${targ}"
-+  echo 2>&1 "*** ld does not support target '${targ}' NO REALLY"
-   echo 2>&1 "*** see ld/configure.tgt for supported targets"
-   exit 1
- 
 --- binutils.orig/bfd/config.bfd	2020-04-20 12:35:13.038297375 +0100
 +++ binutils-2.34/bfd/config.bfd	2020-04-20 14:25:26.452869193 +0100
@@ -473,7 +473,7 @@ case "${targ}" in
@ -55,12 +35,14 @@ diff -rup binutils.orig/gold/configure.ac binutils-2.34/gold/configure.ac
     targ_defvec=bpf_elf64_le_vec
     targ_selvecs=bpf_elf64_be_vec
     targ_underscore=yes
-@@ -1427,7 +1427,7 @@ case "${targ}" in
-     ;;
- 
-   *)
-    echo 1>&2 "*** BFD does not support target ${targ}."
-+    echo 1>&2 "*** BFD does not support target '${targ}'.  Honest."
-     echo 1>&2 "*** Look in bfd/config.bfd for supported targets."
-     exit 1
-     ;;
+--- binutils.orig/ld/configure.tgt	2026-01-05 08:51:02.908224792 +0000
+++ binutils-with-gold-2.45.50-be970c68891/ld/configure.tgt	2026-01-05 08:51:55.852677409 +0000
+@@ -255,7 +255,7 @@ bfin-*-uclinux*)	targ_emul=elf32bfin;
+ bfin-*-linux-uclibc*)	targ_emul=elf32bfinfd;
+ 			targ_extra_libpath=elf32bfin
+ 			;;
+-bpf-*-*)		targ_emul=elf64bpf
+bpf-* | bpf-*-*)	targ_emul=elf64bpf
+ 			;;
+ cr16-*-elf*)		targ_emul=elf32cr16
+ 			;;
--- a/binutils-handle-corrupt-version-info.patch
+++ b/binutils-handle-corrupt-version-info.patch
@ -1,29 +0,0 @@
--- binutils.orig/bfd/elf.c	2023-10-13 11:38:25.159530287 +0100
-+++ binutils-2.41/bfd/elf.c	2023-10-13 11:41:23.290898228 +0100
-@@ -9479,6 +9479,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
- 	  if (elf_use_dt_symtab_p (abfd))
- 	    iverneed->vn_filename
- 	      = elf_tdata (abfd)->dt_strtab + iverneed->vn_file;
-+	  else if (hdr == NULL)
-+	    goto error_return_bad_verref;
- 	  else
- 	    iverneed->vn_filename
- 	      = bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
-@@ -9516,6 +9518,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
- 	      if (elf_use_dt_symtab_p (abfd))
- 		ivernaux->vna_nodename
- 		  = elf_tdata (abfd)->dt_strtab + ivernaux->vna_name;
-+	      else if (hdr == NULL)
-+		goto error_return_bad_verref;
- 	      else
- 		ivernaux->vna_nodename
- 		  = bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
-@@ -9546,7 +9550,7 @@ _bfd_elf_slurp_version_tables (bfd *abfd
- 	  iverneed->vn_nextref = NULL;
- 	  if (iverneed->vn_next == 0)
- 	    break;
-	  if (i + 1 < hdr->sh_info)
-+	  if (hdr != NULL && (i + 1 < hdr->sh_info))
- 	    iverneed->vn_nextref = iverneed + 1;
- 
- 	  if (iverneed->vn_next
--- a/binutils-ld-default-z-text.patch
+++ b/binutils-ld-default-z-text.patch
@ -0,0 +1,52 @@
+diff -rup binutils.orig/bfd/elflink.c binutils-with-gold-2.45.50-be970c68891/bfd/elflink.c
+--- binutils.orig/bfd/elflink.c	2026-01-14 09:21:14.835847967 +0000
+++ binutils-with-gold-2.45.50-be970c68891/bfd/elflink.c	2026-01-14 09:23:48.780495205 +0000
+@@ -13786,7 +13786,7 @@ _bfd_elf_final_link (bfd *abfd, struct b
+ 		{
+ 		  if (info->textrel_check == textrel_check_error)
+ 		    info->callbacks->einfo
+-		      (_("%P%X: read-only segment has dynamic relocations\n"));
+		      (_("%P%X: error: read-only segment has dynamic relocations\n"));
+ 		  else if (bfd_link_dll (info))
+ 		    info->callbacks->einfo
+ 		      (_("%P: warning: creating DT_TEXTREL in a shared object\n"));
+diff -rup binutils.orig/ld/testsuite/ld-aarch64/dt-memtag-mode.d binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/dt-memtag-mode.d
+--- binutils.orig/ld/testsuite/ld-aarch64/dt-memtag-mode.d	2026-01-14 09:21:15.248851537 +0000
+++ binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/dt-memtag-mode.d	2026-01-14 09:22:24.603416270 +0000
+@@ -1,5 +1,5 @@
+ #source: dt-memtag.s
+-#ld: -shared -z memtag-mode=async
+#ld: -shared -z memtag-mode=async -z notext
+ #readelf: -d
+ 
+ #...
+diff -rup binutils.orig/ld/testsuite/ld-aarch64/dt-memtag-stack.d binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/dt-memtag-stack.d
+--- binutils.orig/ld/testsuite/ld-aarch64/dt-memtag-stack.d	2026-01-14 09:21:15.248851537 +0000
+++ binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/dt-memtag-stack.d	2026-01-14 09:24:19.594780414 +0000
+@@ -1,5 +1,5 @@
+ #source: dt-memtag.s
+-#ld: -shared -z memtag-stack
+#ld: -shared -z memtag-stack -z notext
+ #readelf: -d
+ 
+ #...
+diff -rup binutils.orig/ld/testsuite/ld-aarch64/relr-text-pie.d binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/relr-text-pie.d
+--- binutils.orig/ld/testsuite/ld-aarch64/relr-text-pie.d	2026-01-14 09:21:15.246851520 +0000
+++ binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/relr-text-pie.d	2026-01-14 09:24:45.363485698 +0000
+@@ -1,5 +1,5 @@
+ #source: relr-text.s
+-#ld: -pie -z pack-relative-relocs -T relocs.ld
+#ld: -pie -z pack-relative-relocs -T relocs.ld -z notext
+ #readelf: -drW
+ 
+ #...
+diff -rup binutils.orig/ld/testsuite/ld-aarch64/relr-text-shared.d binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/relr-text-shared.d
+--- binutils.orig/ld/testsuite/ld-aarch64/relr-text-shared.d	2026-01-14 09:21:15.246851520 +0000
+++ binutils-with-gold-2.45.50-be970c68891/ld/testsuite/ld-aarch64/relr-text-shared.d	2026-01-14 09:25:06.651664713 +0000
+@@ -1,5 +1,5 @@
+ #source: relr-text.s
+-#ld: -shared -z pack-relative-relocs -T relocs.ld
+#ld: -shared -z pack-relative-relocs -T relocs.ld -z notext
+ #readelf: -drW
+ 
+ #...
--- a/binutils-multilib.am.patch
+++ b/binutils-multilib.am.patch
@ -1,49 +0,0 @@
-diff -rupN binutils.orig/multilib.am binutils-2.41/multilib.am
--- binutils.orig/multilib.am	1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.41/multilib.am	2024-02-12 16:41:56.899838085 +0000
-@@ -0,0 +1,45 @@
-+## automake - create Makefile.in from Makefile.am
-+
-+## Copyright (C) 1994-2017 Free Software Foundation, Inc.
-+## This Makefile.in is free software; the Free Software Foundation
-+## gives unlimited permission to copy and/or distribute it,
-+## with or without modifications, as long as this notice is preserved.
-+
-+## This program is distributed in the hope that it will be useful,
-+## but WITHOUT ANY WARRANTY; without even the implied warranty of
-+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+## GNU General Public License for more details.
-+
-+MULTISRCTOP =
-+MULTIBUILDTOP =
-+MULTIDIRS =
-+MULTISUBDIR =
-+MULTIDO = true
-+MULTICLEAN = true
-+
-+# GNU Make needs to see an explicit $(MAKE) variable in the command it
-+# runs to enable its job server during parallel builds.  Hence the
-+# comments below.
-+all-multi:
-+	$(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE)
-+install-multi:
-+	$(MULTIDO) $(AM_MAKEFLAGS) DO=install multi-do # $(MAKE)
-+mostlyclean-multi:
-+	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=mostlyclean multi-clean # $(MAKE)
-+clean-multi:
-+	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=clean multi-clean # $(MAKE)
-+distclean-multi:
-+	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=distclean multi-clean # $(MAKE)
-+maintainer-clean-multi:
-+	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=maintainer-clean multi-clean # $(MAKE)
-+
-+.MAKE .PHONY: all-multi clean-multi distclean-multi install-am \
-+	      install-multi maintainer-clean-multi mostlyclean-multi
-+
-+install-exec-local: install-multi
-+
-+all-local: all-multi
-+mostlyclean-local: mostlyclean-multi
-+clean-local: clean-multi
-+distclean-local: distclean-multi
-+maintainer-clean-local: maintainer-clean-multi
--- a/binutils-power-11.patch
+++ b/binutils-power-11.patch
@ -1,83 +0,0 @@
-diff -rup binutils,orig/binutils/doc/binutils.texi binutils-2.41/binutils/doc/binutils.texi
--- binutils,orig/binutils/doc/binutils.texi	2024-02-12 10:03:46.609677213 +0000
-+++ binutils-2.41/binutils/doc/binutils.texi	2024-02-12 10:03:55.976681219 +0000
-@@ -2651,11 +2651,12 @@ rather than @code{li}.  All of the @opti
- @option{e300}, @option{e500}, @option{e500mc}, @option{e500mc64},
- @option{e500x2}, @option{e5500}, @option{e6500}, @option{efs},
- @option{power4}, @option{power5}, @option{power6}, @option{power7},
-@option{power8}, @option{power9}, @option{power10}, @option{ppc},
-@option{ppc32}, @option{ppc64}, @option{ppc64bridge}, @option{ppcps},
-@option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5}, @option{pwr5x},
-@option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9}, @option{pwr10},
-@option{pwrx}, @option{titan}, @option{vle}, and @option{future}.
-+@option{power8}, @option{power9}, @option{power10}, @option{power11},
-+@option{ppc}, @option{ppc32}, @option{ppc64}, @option{ppc64bridge},
-+@option{ppcps}, @option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5},
-+@option{pwr5x}, @option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9},
-+@option{pwr10}, @option{pwr11}, @option{pwrx}, @option{titan}, @option{vle},
-+and @option{future}.
- @option{32} and @option{64} modify the default or a prior CPU
- selection, disabling and enabling 64-bit insns respectively.  In
- addition, @option{altivec}, @option{any}, @option{lsp}, @option{htm},
-Only in binutils-2.41/binutils/doc: binutils.texi.orig
-diff -rup binutils,orig/gas/config/tc-ppc.c binutils-2.41/gas/config/tc-ppc.c
--- binutils,orig/gas/config/tc-ppc.c	2024-02-12 10:03:46.742677270 +0000
-+++ binutils-2.41/gas/config/tc-ppc.c	2024-02-12 10:03:55.977681219 +0000
-@@ -1392,6 +1392,8 @@ PowerPC options:\n"));
-   fprintf (stream, _("\
- -mpower10, -mpwr10      generate code for Power10 architecture\n"));
-   fprintf (stream, _("\
-+-mpower11, -mpwr11      generate code for Power11 architecture\n"));
-+  fprintf (stream, _("\
- -mlibresoc              generate code for Libre-SOC architecture\n"));
-   fprintf (stream, _("\
- -mfuture                generate code for 'future' architecture\n"));
-diff -rup binutils,orig/gas/doc/c-ppc.texi binutils-2.41/gas/doc/c-ppc.texi
--- binutils,orig/gas/doc/c-ppc.texi	2024-02-12 10:03:46.783677288 +0000
-+++ binutils-2.41/gas/doc/c-ppc.texi	2024-02-12 10:03:55.977681219 +0000
-@@ -156,6 +156,9 @@ Generate code for Power9 architecture.
- @item -mpower10, -mpwr10
- Generate code for Power10 architecture.
- 
-+@item -mpower11, -mpwr11
-+Generate code for Power11 architecture.
-+
- @item -mfuture
- Generate code for 'future' architecture.
- 
-diff -rup binutils,orig/opcodes/ppc-dis.c binutils-2.41/opcodes/ppc-dis.c
--- binutils,orig/opcodes/ppc-dis.c	2024-02-12 10:03:47.836677739 +0000
-+++ binutils-2.41/opcodes/ppc-dis.c	2024-02-12 10:03:55.977681219 +0000
-@@ -208,6 +208,11 @@ struct ppc_mopt ppc_opts[] = {
- 		| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
- 		| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
-     0 },
-+  { "power11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
-+		| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
-+		| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
-+		| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
-+    0 },
-   { "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
- 		| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
- 		| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
-@@ -267,6 +272,11 @@ struct ppc_mopt ppc_opts[] = {
- 		| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
- 		| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
-     0 },
-+  { "pwr11",   (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
-+		| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
-+		| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
-+		| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
-+    0 },
-   { "pwrx",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
-     0 },
-   { "raw",     PPC_OPCODE_PPC,
-@@ -396,7 +406,7 @@ powerpc_init_dialect (struct disassemble
-       break;
-     default:
-       if (info->arch == bfd_arch_powerpc)
-	dialect = ppc_parse_cpu (dialect, &sticky, "power10") | PPC_OPCODE_ANY;
-+	dialect = ppc_parse_cpu (dialect, &sticky, "power11") | PPC_OPCODE_ANY;
-       else
- 	dialect = ppc_parse_cpu (dialect, &sticky, "pwr");
-       break;
--- a/binutils-ppc-dt_relr-relocs.patch
+++ b/binutils-ppc-dt_relr-relocs.patch
@ -1,114 +0,0 @@
--- binutils.orig/bfd/elf64-ppc.c	2024-01-16 10:39:26.903071936 +0000
-+++ binutils-2.41/bfd/elf64-ppc.c	2024-01-16 10:39:38.650127903 +0000
-@@ -4749,6 +4749,21 @@ is_8byte_reloc (enum elf_ppc64_reloc_typ
- 	  || r_type == R_PPC64_PLTCALL);
- }
- 
-+/* The RELR encoding doesn't allow odd addresses, so RELR_ALIGN must
-+   be at least 1.  R_PPC64_RELATIVE relocs require alignment of 2**3.
-+   We use 3 here to avoid complexity in relocate_section.  PR30824.  */
-+#define RELR_ALIGN 3
-+
-+static bool
-+maybe_relr (enum elf_ppc64_reloc_type r_type,
-+	    const Elf_Internal_Rela *rel,
-+	    const asection *sec)
-+{
-+  return ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
-+	  && (rel->r_offset & ((1 << RELR_ALIGN) - 1)) == 0
-+	  && sec->alignment_power >= RELR_ALIGN);
-+}
-+
- /* Like bfd_reloc_offset_in_range but without a howto.  Return true
-    iff a field of SIZE bytes at OFFSET is within SEC limits.  */
- 
-@@ -5401,9 +5416,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
- 		  p->count += 1;
- 		  if (!must_be_dyn_reloc (info, r_type))
- 		    p->pc_count += 1;
-		  if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
-		      && rel->r_offset % 2 == 0
-		      && sec->alignment_power != 0)
-+		  if (maybe_relr (r_type, rel, sec))
- 		    p->rel_count += 1;
- 		}
- 	      else
-@@ -5438,9 +5451,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
- 		      p->ifunc = is_ifunc;
- 		    }
- 		  p->count += 1;
-		  if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
-		      && rel->r_offset % 2 == 0
-		      && sec->alignment_power != 0)
-+		  if (maybe_relr (r_type, rel, sec))
- 		    p->rel_count += 1;
- 		}
- 	    }
-@@ -7291,9 +7302,7 @@ dec_dynrel_count (const Elf_Internal_Rel
- 	    {
- 	      if (!must_be_dyn_reloc (info, r_type))
- 		p->pc_count -= 1;
-	      if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
-		  && rel->r_offset % 2 == 0
-		  && sec->alignment_power != 0)
-+	      if (maybe_relr (r_type, rel, sec))
- 		p->rel_count -= 1;
- 	      p->count -= 1;
- 	      if (p->count == 0)
-@@ -7326,9 +7335,7 @@ dec_dynrel_count (const Elf_Internal_Rel
- 	{
- 	  if (p->sec == sec && p->ifunc == is_ifunc)
- 	    {
-	      if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
-		  && rel->r_offset % 2 == 0
-		  && sec->alignment_power != 0)
-+	      if (maybe_relr (r_type, rel, sec))
- 		p->rel_count -= 1;
- 	      p->count -= 1;
- 	      if (p->count == 0)
-@@ -13869,6 +13876,9 @@ ppc64_elf_size_stubs (struct bfd_link_in
- 		  switch (r_type)
- 		    {
- 		    default:
-+		      if (info->enable_dt_relr
-+			  && maybe_relr (r_type, irela, section))
-+			break;
- 		      continue;
- 
- 		    case R_PPC64_REL24:
-@@ -13880,14 +13890,6 @@ ppc64_elf_size_stubs (struct bfd_link_in
- 		      if ((section->flags & SEC_CODE) != 0)
- 			break;
- 		      continue;
-
-		    case R_PPC64_ADDR64:
-		    case R_PPC64_TOC:
-		      if (info->enable_dt_relr
-			  && irela->r_offset % 2 == 0
-			  && section->alignment_power != 0)
-			break;
-		      continue;
- 		    }
- 
- 		  /* Now determine the call target, its name, value,
-@@ -15272,7 +15274,7 @@ ppc64_elf_build_stubs (struct bfd_link_i
-       while (i < htab->relr_count)
- 	{
- 	  bfd_vma base = relr_addr[i];
-	  BFD_ASSERT (base % 2 == 0);
-+	  BFD_ASSERT ((base & ((1 << RELR_ALIGN) - 1)) == 0);
- 	  bfd_put_64 (htab->elf.dynobj, base, loc);
- 	  loc += 8;
- 	  i++;
-@@ -17510,9 +17512,8 @@ ppc64_elf_relocate_section (bfd *output_
- 
- 	      if (!(info->enable_dt_relr
- 		    && ELF64_R_TYPE (outrel.r_info) == R_PPC64_RELATIVE
-		    && rel->r_offset % 2 == 0
-		    && input_section->alignment_power != 0
-		    && ELF64_R_TYPE (orig_rel.r_info) != R_PPC64_UADDR64))
-+		    && maybe_relr (ELF64_R_TYPE (orig_rel.r_info),
-+				   rel, input_section)))
- 		{
- 		  sreloc = elf_section_data (input_section)->sreloc;
- 		  if (h != NULL
--- a/binutils-remove-ld-protected-func-2-test.patch
+++ b/binutils-remove-ld-protected-func-2-test.patch
@ -0,0 +1,33 @@
+diff -rup binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp binutils-with-gold-2.45.50-96b8a8a633a/ld/testsuite/ld-x86-64/x86-64.exp
+--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp	2025-11-20 12:02:23.738336155 +0000
+++ binutils-with-gold-2.45.50-96b8a8a633a/ld/testsuite/ld-x86-64/x86-64.exp	2025-11-20 12:03:17.894485264 +0000
+@@ -1413,14 +1413,6 @@ if { [isnative] && [check_compiler_avail
+ 	    "libprotected-func-2b.so" \
+ 	] \
+ 	[list \
+-	    "Build protected-func-2 without PIE" \
+-	    "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2b.so" \
+-	    "$DIRECT_EXTERN_ACCESS_CFLAGS $NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
+-	    { protected-func-1b.c } \
+-	    {} \
+-	    "protected-func-2" \
+-	] \
+-	[list \
+ 	    "Build libprotected-func-2c.so" \
+ 	    "-shared" \
+ 	    "-fPIC -Wa,-mx86-used-note=yes" \
+@@ -1429,14 +1421,6 @@ if { [isnative] && [check_compiler_avail
+ 	    "libprotected-func-2c.so" \
+ 	] \
+ 	[list \
+-	    "Build protected-func-2a without PIE" \
+-	    "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2c.so" \
+-	    "$DIRECT_EXTERN_ACCESS_CFLAGS $NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
+-	    { protected-func-1b.c } \
+-	    {} \
+-	    "protected-func-2a" \
+-	] \
+-	[list \
+ 	    "Build libprotected-data-1a.so" \
+ 	    "-shared -z noindirect-extern-access" \
+ 	    "-fPIC -Wa,-mx86-used-note=yes" \
--- a/binutils-riscv-SUB_ULEB128.patch
+++ b/binutils-riscv-SUB_ULEB128.patch
@ -1,239 +0,0 @@
-diff -rupN binutils.orig/bfd/elfnn-riscv.c binutils-2.41/bfd/elfnn-riscv.c
--- binutils.orig/bfd/elfnn-riscv.c	2024-01-02 17:35:07.412218130 +0000
-+++ binutils-2.41/bfd/elfnn-riscv.c	2024-01-02 17:36:52.274311071 +0000
-@@ -1737,7 +1737,10 @@ perform_relocation (const reloc_howto_ty
- {
-   if (howto->pc_relative)
-     value -= sec_addr (input_section) + rel->r_offset;
-  value += rel->r_addend;
-+
-+  /* PR31179, ignore the non-zero addend of R_RISCV_SUB_ULEB128.  */
-+  if (ELFNN_R_TYPE (rel->r_info) != R_RISCV_SUB_ULEB128)
-+    value += rel->r_addend;
- 
-   switch (ELFNN_R_TYPE (rel->r_info))
-     {
-@@ -1818,10 +1821,7 @@ perform_relocation (const reloc_howto_ty
- 	value = ENCODE_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value));
-       break;
- 
-    /* SUB_ULEB128 must be applied after SET_ULEB128, so we only write the
-       value back for SUB_ULEB128 should be enough.  */
-    case R_RISCV_SET_ULEB128:
-      break;
-+    /* R_RISCV_SET_ULEB128 won't go into here.  */
-     case R_RISCV_SUB_ULEB128:
-       {
- 	unsigned int len = 0;
-@@ -2514,7 +2514,7 @@ riscv_elf_relocate_section (bfd *output_
- 	  else
- 	    {
- 	      msg = ("Mismatched R_RISCV_SET_ULEB128, it must be paired with"
-		     "and applied before R_RISCV_SUB_ULEB128");
-+		     " and applied before R_RISCV_SUB_ULEB128");
- 	      r = bfd_reloc_dangerous;
- 	    }
- 	  break;
-@@ -2523,14 +2523,40 @@ riscv_elf_relocate_section (bfd *output_
- 	  if (uleb128_set_rel != NULL
- 	      && uleb128_set_rel->r_offset == rel->r_offset)
- 	    {
-	      relocation = uleb128_set_vma - relocation;
-+	      relocation = uleb128_set_vma - relocation
-+			   + uleb128_set_rel->r_addend;
- 	      uleb128_set_vma = 0;
- 	      uleb128_set_rel = NULL;
-+
-+	      /* PR31179, the addend of SUB_ULEB128 should be zero if using
-+		 .uleb128, but we make it non-zero by accident in assembler,
-+		 so just ignore it in perform_relocation, and make assembler
-+		 continue doing the right thing.  Don't reset the addend of
-+		 SUB_ULEB128 to zero here since it will break the --emit-reloc,
-+		 even though the non-zero addend is unexpected.
-+
-+		 We encourage people to rebuild their stuff to get the
-+		 non-zero addend of SUB_ULEB128, but that might need some
-+		 times, so report warnings to inform people need to rebuild
-+		 if --check-uleb128 is enabled.  However, since the failed
-+		 .reloc cases for ADD/SET/SUB/ULEB128 are rarely to use, it
-+		 may acceptable that stop supproting them until people rebuld
-+		 their stuff, maybe half-year or one year later.  I believe
-+		 this might be the least harmful option that we should go.
-+
-+		 Or maybe we should teach people that don't write the
-+		 .reloc R_RISCV_SUB* with non-zero constant, and report
-+		 warnings/errors in assembler.  */
-+	      if (htab->params->check_uleb128
-+		  && rel->r_addend != 0)
-+		_bfd_error_handler (_("%pB: warning: R_RISCV_SUB_ULEB128 with"
-+				      " non-zero addend, please rebuild by"
-+				      " Fedora 40 binutils or up"), input_bfd);
- 	    }
- 	  else
- 	    {
- 	      msg = ("Mismatched R_RISCV_SUB_ULEB128, it must be paired with"
-		     "and applied after R_RISCV_SET_ULEB128");
-+		     " and applied after R_RISCV_SET_ULEB128");
- 	      r = bfd_reloc_dangerous;
- 	    }
- 	  break;
-@@ -5123,7 +5149,13 @@ _bfd_riscv_relax_section (bfd *abfd, ase
- 	  if (h != NULL && h->type == STT_GNU_IFUNC)
- 	    continue;
- 
-+	  /* Maybe we should check UNDEFWEAK_NO_DYNAMIC_RELOC here?  But that
-+	     will break the undefweak relaxation testcases, so just make sure
-+	     we won't do relaxations for linker_def symbols in short-term.  */
- 	  if (h->root.type == bfd_link_hash_undefweak
-+	      /* The linker_def symbol like __ehdr_start that may be undefweak
-+		 for now, but will be guaranteed to be defined later.  */
-+	      && !h->root.linker_def
- 	      && (relax_func == _bfd_riscv_relax_lui
- 		  || relax_func == _bfd_riscv_relax_pc))
- 	    {
-diff -rupN binutils.orig/bfd/elfxx-riscv.h binutils-2.41/bfd/elfxx-riscv.h
--- binutils.orig/bfd/elfxx-riscv.h	2024-01-02 17:35:07.412218130 +0000
-+++ binutils-2.41/bfd/elfxx-riscv.h	2024-01-02 17:35:24.252233056 +0000
-@@ -31,6 +31,8 @@ struct riscv_elf_params
- {
-   /* Whether to relax code sequences to GP-relative addressing.  */
-   bool relax_gp;
-+  /* Whether to check if SUB_ULEB128 relocation has non-zero addend.  */
-+  bool check_uleb128;
- };
- 
- extern void riscv_elf32_set_options (struct bfd_link_info *,
-diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS
--- binutils.orig/ld/NEWS	2024-01-02 17:35:08.012218662 +0000
-+++ binutils-2.41/ld/NEWS	2024-01-02 17:35:56.139261318 +0000
-@@ -1,5 +1,10 @@
- -*- text -*-
- 
-+* On RISC-V, add ld target option --[no-]check-uleb128.  Should rebuild the
-+  objects by binutils 2.42 and up if enabling the option and get warnings,
-+  since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128
-+  directives.
-+
- * Added --warn-execstack-objects to warn about executable stacks only when an
-   input object file requests one.  Also added --error-execstack and
-   --error-rxw-segments options to convert warnings about executable stacks and
-diff -rupN binutils.orig/ld/emultempl/riscvelf.em binutils-2.41/ld/emultempl/riscvelf.em
--- binutils.orig/ld/emultempl/riscvelf.em	2024-01-02 17:35:07.699218385 +0000
-+++ binutils-2.41/ld/emultempl/riscvelf.em	2024-01-02 17:35:24.252233056 +0000
-@@ -25,7 +25,8 @@ fragment <<EOF
- #include "elf/riscv.h"
- #include "elfxx-riscv.h"
- 
-static struct riscv_elf_params params = { .relax_gp = 1 };
-+static struct riscv_elf_params params = { .relax_gp = 1,
-+					  .check_uleb128 = 0};
- EOF
- 
- # Define some shell vars to insert bits of code into the standard elf
-@@ -35,17 +36,23 @@ enum risccv_opt
- {
-   OPTION_RELAX_GP = 321,
-   OPTION_NO_RELAX_GP,
-+  OPTION_CHECK_ULEB128,
-+  OPTION_NO_CHECK_ULEB128,
- };
- '
- 
- PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
-     { "relax-gp", no_argument, NULL, OPTION_RELAX_GP },
-     { "no-relax-gp", no_argument, NULL, OPTION_NO_RELAX_GP },
-+    { "check-uleb128", no_argument, NULL, OPTION_CHECK_ULEB128 },
-+    { "no-check-uleb128", no_argument, NULL, OPTION_NO_CHECK_ULEB128 },
- '
- 
- PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
-   fprintf (file, _("  --relax-gp                  Perform GP relaxation\n"));
-   fprintf (file, _("  --no-relax-gp               Don'\''t perform GP relaxation\n"));
-+  fprintf (file, _("  --check-uleb128             Check if SUB_ULEB128 has non-zero addend\n"));
-+  fprintf (file, _("  --no-check-uleb128          Don'\''t check if SUB_ULEB128 has non-zero addend\n"));
- '
- 
- PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
-@@ -56,6 +63,14 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI
-     case OPTION_NO_RELAX_GP:
-       params.relax_gp = 0;
-       break;
-+
-+    case OPTION_CHECK_ULEB128:
-+      params.check_uleb128 = 1;
-+      break;
-+
-+    case OPTION_NO_CHECK_ULEB128:
-+      params.check_uleb128 = 0;
-+      break;
- '
- 
- fragment <<EOF
-diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
--- binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp	2024-01-02 17:35:07.942218600 +0000
-+++ binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp	2024-01-02 17:35:24.252233056 +0000
-@@ -173,6 +173,8 @@ if [istarget "riscv*-*-*"] {
-     run_dump_test "attr-phdr"
-     run_dump_test "relax-max-align-gp"
-     run_dump_test "uleb128"
-+    run_dump_test "pr31179"
-+    run_dump_test "pr31179-r"
-     run_ld_link_tests [list \
- 	[list "Weak reference 32" "-T weakref.ld -m[riscv_choose_ilp32_emul]" "" \
- 	    "-march=rv32i -mabi=ilp32" {weakref32.s} \
-diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d	1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d	2024-01-02 17:35:24.252233056 +0000
-@@ -0,0 +1,10 @@
-+#source: pr31179.s
-+#as:
-+#readelf: -Wr
-+
-+Relocation section '.rela.text' at .*
-+[ 	]+Offset[ 	]+Info[ 	]+Type[ 	]+.*
-+[0-9a-f]+[ 	]+[0-9a-f]+[ 	]+R_RISCV_SET_ULEB128[ 	]+[0-9a-f]+[ 	]+bar \+ 1
-+[0-9a-f]+[ 	]+[0-9a-f]+[ 	]+R_RISCV_SUB_ULEB128[ 	]+[0-9a-f]+[ 	]+foo \+ 0
-+[0-9a-f]+[ 	]+[0-9a-f]+[ 	]+R_RISCV_SET_ULEB128[ 	]+[0-9a-f]+[ 	]+bar \+ 1
-+[0-9a-f]+[ 	]+[0-9a-f]+[ 	]+R_RISCV_SUB_ULEB128[ 	]+[0-9a-f]+[ 	]+foo \+ 1
-diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d	1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d	2024-01-02 17:35:24.252233056 +0000
-@@ -0,0 +1,11 @@
-+#source: pr31179.s
-+#as:
-+#ld: --check-uleb128
-+#objdump: -sj .text
-+#warning: .*R_RISCV_SUB_ULEB128 with non-zero addend, please rebuild by Fedora 40 binutils or up
-+
-+.*:[ 	]+file format .*
-+
-+Contents of section .text:
-+
-+[ 	]+[0-9a-f]+[ 	]+00000303[ 	]+.*
-diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s	1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s	2024-01-02 17:35:24.252233056 +0000
-@@ -0,0 +1,13 @@
-+.globl _start
-+_start:
-+
-+foo:
-+.2byte 0
-+bar:
-+
-+.uleb128 bar - foo + 1
-+
-+reloc:
-+.reloc reloc, R_RISCV_SET_ULEB128, bar + 1
-+.reloc reloc, R_RISCV_SUB_ULEB128, foo + 1
-+.byte 0x0
--- binutils.orig/gas/config/tc-riscv.c	2024-01-03 13:08:16.588286420 +0000
-+++ binutils-2.41/gas/config/tc-riscv.c	2024-01-03 13:08:32.749297812 +0000
-@@ -4949,6 +4949,7 @@ riscv_insert_uleb128_fixes (bfd *abfd AT
-       fix_new_exp (fragP, fragP->fr_fix, 0,
- 		   exp_dup, 0, BFD_RELOC_RISCV_SET_ULEB128);
-       exp_dup->X_add_symbol = exp->X_op_symbol;
-+      exp_dup->X_add_number = 0; /* Set addend of SUB_ULEB128 to zero.  */
-       fix_new_exp (fragP, fragP->fr_fix, 0,
- 		   exp_dup, 0, BFD_RELOC_RISCV_SUB_ULEB128);
-     }
--- a/binutils-riscv-testsuite-fixes.patch
+++ b/binutils-riscv-testsuite-fixes.patch
@ -30,8 +30,8 @@ diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d binutils-2.40/
@@ -11,5 +11,5 @@ Disassembly of section .text:
 [0-9a-f]+ <_start>:
 .*:[ 	]+[0-9a-f]+[ 	]+auipc[ 	]+a1.*
- .*:[ 	]+[0-9a-f]+[ 	]+addi?[ 	]+a0,gp.*<data_a>
-.*:[ 	]+[0-9a-f]+[ 	]+addi?[ 	]+a1,a1.*<data_b>
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,gp.*<data_a>
+-.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a1,a1.*<data_b>
 +.*:[ 	]+[0-9a-f]+[ 	]+mv[ 	]+a1,a1
 #pass
 diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d
@ -134,3 +134,136 @@ diff -rup binutils.orig/ld/testsuite/ld-elf/tls.exp binutils-2.40/ld/testsuite/l
 
 objcopy_test_without_global_symbol
 
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d	2024-10-03 15:21:47.926570551 +0100
+++ binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d	2024-10-03 15:24:26.152502612 +0100
+@@ -8,10 +8,10 @@
+ Disassembly of section \.text:
+ 
+ 0+[0-9a-f]+ <_start>:
+-.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,a0,\-[0-9]+
+.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,a0,.*
+ .*:[ 	]+[0-9a-f]+[ 	]+jal[ 	        ]+ra,[0-9a-f]+ <_start>
+ .*:[ 	]+[0-9a-f]+[ 	]+auipc[ 	]+a1,0x[0-9a-f]+
+-.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a1,a1,\-[0-9]+ # [0-9a-f]+ <data_g>
+.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a1,a1,.*
+ .*:[ 	]+[0-9a-f]+[ 	]+lui[ 	        ]+a2,0x[0-9a-f]+
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a2,a2,[0-9]+ # [0-9a-f]+ <data_g>
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a3,tp,0 # 0 <data_t>
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d	2024-10-03 15:21:47.926570551 +0100
+++ binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d	2024-10-03 15:23:54.512530979 +0100
+@@ -8,7 +8,7 @@
+ Disassembly of section \.text:
+ 
+ 0+[0-9a-f]+ <_start>:
+-.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,a0,\-[0-9]+
+.*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,a0,.*
+ .*:[ 	]+[0-9a-f]+[ 	]+jal[ 	]+ra,[0-9a-f]+ <_start>
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a1,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a2,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d	2024-10-03 15:21:47.926570551 +0100
+++ binutils-2.43.50-1f4aee70ed1/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d	2024-10-03 15:25:01.687468496 +0100
+@@ -11,5 +11,5 @@ Disassembly of section .text:
+ [0-9a-f]+ <_start>:
+ .*:[ 	]+[0-9a-f]+[ 	]+auipc[ 	]+a1.*
+ .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+a0,gp.*<data_a>
+-.*:[ 	]+[0-9a-f]+[ 	]+mv[ 	]+a1,a1
+.*:[ 	]+[0-9a-f]+[ 	]+.*
+ #pass
+--- binutils-with-gold-2.45.50-79b2b564fec.orig/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d	2025-09-09 15:52:30.684689609 +0100
+++ binutils-with-gold-2.45.50-79b2b564fec/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d	2025-09-09 15:53:12.837859447 +0100
+@@ -30,6 +30,6 @@ Disassembly of section \.plt:
+ 
+ [0-9a-f]+ <bar@plt>:
+ .*:[ 	]+[0-9a-f]+[ 	]+lpad[ 	]+0x0
+-.*:[ 	]+[0-9a-f]+[ 	]+auipc[ 	]+t3,0x1
+.*:[ 	]+[0-9a-f]+[ 	]+auipc[ 	]+t3,0x[0-9a-f]+
+ .*:[ 	]+[0-9a-f]+[ 	]+ld[ 	]+t3,[0-9]+\(t3\) # [0-9a-f]+ <bar>
+ .*:[ 	]+[0-9a-f]+[ 	]+jalr[ 	]+t1,t3
+diff -rup binutils-with-gold-2.45.50-beab972c07d,orig/binutils/testsuite/binutils-all/objcopy.exp binutils-with-gold-2.45.50-beab972c07d/binutils/testsuite/binutils-all/objcopy.exp
+--- binutils-with-gold-2.45.50-beab972c07d,orig/binutils/testsuite/binutils-all/objcopy.exp	2025-12-02 12:47:19.063123207 +0000
+++ binutils-with-gold-2.45.50-beab972c07d/binutils/testsuite/binutils-all/objcopy.exp	2025-12-04 12:39:26.079989597 +0000
+@@ -602,14 +602,19 @@ proc strip_test { } {
+     set exec_output [binutils_run $STRIP "$STRIPFLAGS $objfile"]
+     set exec_output [prune_warnings $exec_output]
+     if ![string equal "" $exec_output] {
+-	fail $test
+	fail "$test (warnings in linker output)"
+	verbose $exec_output
+ 	return
+     }
+ 
+     set exec_output [binutils_run $NM "-a $NMFLAGS $objfile"]
+     set exec_output [prune_warnings $exec_output]
+     if ![string match "*: no symbols*" $exec_output] {
+-	fail $test
+
+	# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
+	setup_xfail riscv*-*-* 
+
+	fail "$test (symbols in nm output)"
+ 	return
+     }
+ 
+@@ -659,6 +664,9 @@ proc strip_test_with_saving_a_symbol { }
+     pass $test
+ }
+ 
+# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
+setup_xfail riscv*-*-* 
+
+ strip_test_with_saving_a_symbol
+ 
+ # Test stripping an archive.
+@@ -1503,7 +1519,7 @@ proc objcopy_test_without_global_symbol
+ # in object files, so they will fail this test.
+ setup_xfail aarch64*-*-* arm*-*-*
+ # The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
+-# setup_xfail riscv*-*-* 
+setup_xfail riscv*-*-* 
+ 
+ objcopy_test_without_global_symbol
+ 
+diff -rup binutils-with-gold-2.45.50-beab972c07d,orig/ld/testsuite/lib/ld-lib.exp binutils-with-gold-2.45.50-beab972c07d/ld/testsuite/lib/ld-lib.exp
+--- binutils-with-gold-2.45.50-beab972c07d,orig/ld/testsuite/lib/ld-lib.exp	2025-12-02 12:47:19.201090894 +0000
+++ binutils-with-gold-2.45.50-beab972c07d/ld/testsuite/lib/ld-lib.exp	2025-12-03 09:30:07.184360005 +0000
+@@ -1633,6 +1633,12 @@ proc compile_one_cc { src output additio
+ proc check_ctf_available { } {
+     global ctf_available_saved
+ 
+    # Skip CTF tests for the Risc-V target for now, as the
+    # tests have not been tweaked to support the riscv format.
+    if { [istarget "riscv*-*-linux*"] } {
+	return 0
+    }
+    
+     if {![info exists ctf_available_saved]} {
+ 	set ctf_available_saved 0
+ 
+--- fred/binutils/testsuite/lib/binutils-common.exp	2026-03-16 09:18:37.205413649 +0000
+++ binutils-with-gold-2.46.50-d712202846b/binutils/testsuite/lib/binutils-common.exp	2026-03-16 09:18:49.559358668 +0000
+@@ -803,6 +803,9 @@ proc prune_warnings_extra { text } {
+     # Ignore warnings about linking objects with an old sframe format
+     regsub -all {(^|\n)([^\n]* unexpected SFrame format version [^\n]*\n[^\n]* SFrame section ignored\n?)+} $text {\1} text
+ 
+    # Skip warnings about the LTO plugin being needed.
+    regsub -all "(^|\n)(\[^\n\]*:\[^\n\]*plugin needed to handle lto object\[^\n\]*\n?)+" $text "\\1" text
+    
+     return $text
+ }
+ 
+--- binutils.orig/ld/testsuite/ld-elf/shared.exp	2026-06-10 15:32:21.012274073 +0100
+++ binutils-with-gold-2.46.50-48997323b0f/ld/testsuite/ld-elf/shared.exp	2026-06-10 15:34:41.397899263 +0100
+@@ -1859,6 +1859,10 @@ run_cc_link_tests [list \
+ 	"pr29655.so" \
+     ] \
+ ]
+
+# FIXME: Find out why the Risc-V fails this test.
+setup_xfail "riscv64-*-*"
+
+ # PR 29655 (cont.): Check that in PIC code linked as PDE taking the address
+ # of a function defined in a DSO results in the function address (from GOT)
+ # and not the "canonical PLT" address from the PDE.
--- a/binutils-special-sections-in-groups.patch
+++ b/binutils-special-sections-in-groups.patch
@ -1,27 +0,0 @@
--- binutils.orig/bfd/elf.c	2018-10-19 11:42:10.107277490 +0100
-+++ binutils-2.31.1/bfd/elf.c	2018-10-19 11:44:33.607105801 +0100
-@@ -830,7 +830,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd
- 	}
-     }
- 
-  if (elf_group_name (newsect) == NULL)
-+  if (elf_group_name (newsect) == NULL
-+      /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section)
-+	 but they will not have been added to the group because they do not
-+	 have contents that the ELF code in the BFD library knows how to
-+	 process.  This is OK though - we rely upon the target backends to
-+	 handle these sections for us.  */
-+      && hdr->sh_type < SHT_LOOS)
-     {
-       /* xgettext:c-format */
-       _bfd_error_handler (_("%pB: no group info for section '%pA'"),
-@@ -936,7 +942,8 @@ _bfd_elf_setup_sections (bfd *abfd)
- 	  else if (idx->shdr->bfd_section)
- 	    elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section;
- 	  else if (idx->shdr->sh_type != SHT_RELA
-		   && idx->shdr->sh_type != SHT_REL)
-+		   && idx->shdr->sh_type != SHT_REL
-+		   && idx->shdr->sh_type < SHT_LOOS)
- 	    {
- 	      /* There are some unknown sections in the group.  */
- 	      _bfd_error_handler
--- a/binutils-testsuite-fixes.patch
+++ b/binutils-testsuite-fixes.patch
@ -27,17 +27,6 @@
     if ![regexp $want $got] then {
 	fail "$testname -s option $got\n"
     } else {
--- binutils.orig/binutils/testsuite/binutils-all/objdump.exp	2023-08-03 13:09:07.631503783 +0100
-+++ binutils-2.41/binutils/testsuite/binutils-all/objdump.exp	2023-08-03 14:51:54.621295727 +0100
-@@ -921,7 +921,7 @@ proc test_objdump_S { } {
-     }
- }
- 
-test_objdump_S
-+# test_objdump_S
- 
- # Test objdump --private
- proc test_objdump_P {} {
 --- binutils.orig/ld/testsuite/ld-scripts/ld-version.d	2023-08-03 13:09:07.949504208 +0100
 +++ binutils-2.41/ld/testsuite/ld-scripts/ld-version.d	2023-08-03 15:13:01.374590134 +0100
@@ -4,4 +4,4 @@
@ -74,7 +63,7 @@
 +++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp	2023-08-03 15:46:29.537416942 +0100
@@ -1386,7 +1386,7 @@ if { [isnative] && [check_compiler_avail
 	    "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2b.so" \
- 	    "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
+ 	    "$DIRECT_EXTERN_ACCESS_CFLAGS $NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
 	    { protected-func-1b.c } \
 -	    {{error_output "pr28875-func.err"}} \
 +	    {} \
@ -83,21 +72,13 @@
 	[list \
@@ -1402,7 +1402,7 @@ if { [isnative] && [check_compiler_avail
 	    "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2c.so" \
- 	    "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
+ 	    "$DIRECT_EXTERN_ACCESS_CFLAGS $NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
 	    { protected-func-1b.c } \
 -	    {{error_output "pr28875-func.err"}} \
 +	    {} \
 	    "protected-func-2a" \
 	] \
 	[list \
-@@ -2155,7 +2155,6 @@ if { [isnative] && [check_compiler_avail
- 	}
-     }
- 
-    undefined_weak "$NOPIE_CFLAGS" "$NOPIE_LDFLAGS"
-     undefined_weak "-fPIE" ""
-     undefined_weak "-fPIE" "-pie"
-     undefined_weak "-fPIE" "-Wl,-z,nodynamic-undefined-weak"
 --- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp	2023-08-04 14:00:37.692356718 +0100
 +++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp	2023-08-04 14:04:32.627697316 +0100
@@ -39,9 +39,9 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
@ -189,31 +170,6 @@
    {pr29086.c} \
    {} \
    "pr29086" \
-diff -rup binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d
--- binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d	2023-08-15 09:03:21.676463687 +0100
-+++ binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d	2023-08-15 09:17:56.751533569 +0100
-@@ -12,8 +12,8 @@ Disassembly of section \.plt:
- [0-9a-f]+ <.*>:
- .*:	d503245f 	bti	c
- .*:	a9bf7bf0 	stp	x16, x30, \[sp, #-16\]!
-.*:	90000090 	adrp	x16, 410000 <.*>
-.*:	f9...... 	ldr	x17, \[x16, #....\]
-+.*:	90000090 	adrp	x16, 4.0000 <.*>
-+.*:	f9...... 	ldr	x17, \[x16, #.*\]
- .*:	91...... 	add	x16, x16, #0x...
- .*:	d61f0220 	br	x17
- .*:	d503201f 	nop
-@@ -21,8 +21,8 @@ Disassembly of section \.plt:
- 
- [0-9a-f]+ <.*>:
- .*:	d503245f 	bti	c
-.*:	90000090 	adrp	x16, 410000 <.*>
-.*:	f9...... 	ldr	x17, \[x16, #....\]
-+.*:	90000090 	adrp	x16, 4.0000 <.*>
-+.*:	f9...... 	ldr	x17, \[x16, #.*\]
- .*:	91...... 	add	x16, x16, #0x...
- .*:	d61f0220 	br	x17
- .*:	d503201f 	nop
 diff -rup binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d
 --- binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d	2023-08-15 09:03:21.683463694 +0100
 +++ binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d	2023-08-15 09:05:41.549608111 +0100
@ -767,25 +723,6 @@ diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.d binutils-2.41/ld/testsui
     [list "pr26580-4" \
      "" "" \
      {pr26580-a.c} "pr26580-4" "pr26580-4.out" "-fcommon" "c" "" \
-@@ -1579,18 +1575,6 @@ if { [istarget *-*-linux*]
- 	    "pr22393-2-static" \
- 	    "pass.out" \
- 	] \
-	[list \
-	    "Run pr21964-4" \
-	    "" \
-	    "" \
-	    {pr21964-4.c} \
-	    "pr21964-4" \
-	    "pass.out" \
-	    "" \
-	    "" \
-	    "" \
-	    "-ldl" \
-	] \
-     ]
- }
- 
 --- binutils.orig/ld/testsuite/ld-s390/s390.exp	2023-08-15 14:30:13.292890888 +0100
 +++ binutils-2.41/ld/testsuite/ld-s390/s390.exp	2023-08-15 14:48:38.327360916 +0100
@@ -35,6 +35,8 @@ if { !([istarget "s390-*-*"] || [istarge
@ -836,19 +773,6 @@ diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.d binutils-2.41/ld/testsui
 # Check cross references for ld -r
 
 if { ![ld_compile "$CC_FOR_TARGET $NOSANITIZE_CFLAGS $NOLTO_CFLAGS" "$srcdir/$subdir/cross4.c" tmpdir/cross4.o] } {
--- binutils.orig/ld/testsuite/ld-shared/shared.exp	2023-08-15 14:30:13.309890913 +0100
-+++ binutils-2.41/ld/testsuite/ld-shared/shared.exp	2023-08-15 15:00:31.929701875 +0100
-@@ -204,6 +204,10 @@ if { [istarget mips*-*-*] && ! [at_least
- }
- verbose "Using $picflag to compile PIC code"
- 
-+if { [istarget "i686-*-*"] } {
-+    return
-+}
-+
- # Compile the main program.
- if ![ld_compile "$CC_FOR_TARGET $SHCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] {
-     unsupported "shared (non PIC)"
 --- binutils.orig/ld/testsuite/ld-srec/srec.exp	2023-08-15 14:30:13.315890922 +0100
 +++ binutils-2.41/ld/testsuite/ld-srec/srec.exp	2023-08-15 15:01:24.104806404 +0100
@@ -442,6 +442,9 @@ setup_xfail "csky*-*-*"
@ -984,3 +908,242 @@ diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.g binutils-2.41/ld/tests
 - 1810154 (0+01 f+8020 f+9030 0+01|010+ 2080f+ 3090f+ 010+)  .*
 - 1810164 0+ 0+ 0+ 0+0  .*
 +#pass
+diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.42.50/ld/testsuite/ld-plugin/lto.exp
+--- binutils.orig/ld/testsuite/ld-plugin/lto.exp	2024-04-02 16:57:57.645534485 +0100
+++ binutils-2.42.50/ld/testsuite/ld-plugin/lto.exp	2024-04-02 17:03:44.467994669 +0100
+@@ -617,9 +617,6 @@ set lto_run_tests [list \
+   [list "LTO 14" \
+    "-O2 -flto -fuse-linker-plugin tmpdir/lto-14a.o -Wl,--whole-archive tmpdir/liblto-14.a -Wl,--no-whole-archive tmpdir/lto-14b.o" "" \
+    {dummy.c} "lto-14.exe" "lto-14.out" "" "c"] \
+-  [list "LTO 15" \
+-   "-O2 -flto -fuse-linker-plugin -Wl,--start-group tmpdir/liblto-15.a tmpdir/lto-15a.o -Wl,--end-group" "" \
+-   {dummy.c} "lto-15.exe" "lto-15.out" "" "c"] \
+   [list "PR ld/13066" \
+    "-O2 -flto -fuse-linker-plugin" "" \
+    {pr13066.cc} "pr13066.exe" "pr13066.out" "" "c++"] \
+--- binutils.orig/ld/testsuite/ld-plugin/lto.exp	2024-04-15 10:14:55.231310539 +0100
+++ binutils-2.42.50/ld/testsuite/ld-plugin/lto.exp	2024-04-15 10:17:20.777735046 +0100
+@@ -645,12 +645,6 @@ set lto_run_tests [list \
+   [list "LTO 11" \
+    "-O -flto -fuse-linker-plugin tmpdir/liblto-11.a" "" \
+    {dummy.c} "lto-11.exe" "lto-11.out" "" "c"] \
+-  [list "LTO 12a" \
+-   "-O -flto -fuse-linker-plugin tmpdir/lto-12a.o tmpdir/liblto-12.a tmpdir/lto-12b.o" "" \
+-   {dummy.c} "lto-12a.exe" "lto-12.out" "" "c"] \
+-  [list "LTO 12b" \
+-   "-O -flto -fuse-linker-plugin tmpdir/lto-12a.o tmpdir/lto-12b.o tmpdir/liblto-12.a" "" \
+-   {dummy.c} "lto-12b.exe" "lto-12.out" "" "c"] \
+   [list "LTO 13" \
+    "-O -flto -fuse-linker-plugin tmpdir/lto-13a.o tmpdir/liblto-13.a tmpdir/lto-13b.o" "" \
+    {dummy.c} "lto-13.exe" "lto-13.out" "" "c"] \
+diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.d binutils-2.42.50-6b19a26ee12/ld/testsuite/ld-powerpc/tls32.d
+--- binutils.orig/ld/testsuite/ld-powerpc/tls32.d	2024-06-14 15:00:11.382013143 +0100
+++ binutils-2.42.50-6b19a26ee12/ld/testsuite/ld-powerpc/tls32.d	2024-06-14 15:09:06.405840085 +0100
+@@ -12,7 +12,7 @@ Disassembly of section \.text:
+ 0+18[0-9a-f]+ <_start>:
+ .*:	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.* <_start\+0x4>
+ .*:	(7f c8 02 a6|a6 02 c8 7f) 	mflr    r30
+-.*:	(3f de 00 02|02 00 de 3f) 	addis   r30,r30,2
+.*:	(3f de 00 0.|0. 00 de 3f) 	addis   r30,r30,.
+ .*:	(3b de 80 a0|.. 80 de 3b) 	addi    r30,r30,.*
+ .*:	(60 00 00 00|00 00 00 60) 	nop
+ .*:	(38 62 90 3c|3c 90 62 38) 	addi    r3,r2,-28612
+diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.d binutils-2.42.50-6b19a26ee12/ld/testsuite/ld-powerpc/tls32no.d
+--- binutils.orig/ld/testsuite/ld-powerpc/tls32no.d	2024-06-14 15:00:11.382013143 +0100
+++ binutils-2.42.50-6b19a26ee12/ld/testsuite/ld-powerpc/tls32no.d	2024-06-14 15:08:54.270817909 +0100
+@@ -12,7 +12,7 @@ Disassembly of section \.text:
+ 0+18..... <_start>:
+ .*:	(42 9f 00 05|05 00 9f 42) 	bcl     .*
+ .*:	(7f c8 02 a6|a6 02 c8 7f) 	mflr    r30
+-.*:	(3f de 00 02|02 00 de 3f) 	addis   r30,r30,2
+.*:	(3f de 00 0.|0. 00 de 3f) 	addis   r30,r30,.
+ .*:	(3b de 80 a0|.. 80 de 3b) 	addi    r30,r30,-[0-9]+
+ .*:	(38 7f ff e4|e4 ff 7f 38) 	addi    r3,r31,-28
+ .*:	(48 00 00 6d|6d 00 00 48) 	bl      .*
+720,725d719
+<   [list "Run pr20267a" \
+<    "-O2 -flto -fcommon tmpdir/pr20267a.o tmpdir/libpr20267a.a" "" \
+<    {dummy.c} "pr20267a" "pass.out" "-flto -O2 -fcommon" "c"] \
+<   [list "Run pr20267b" \
+<    "-O2 -flto -fcommon tmpdir/pr20267a.o tmpdir/libpr20267b.a" "" \
+<    {dummy.c} "pr20267b" "pass.out" "-flto -O2 -fcommon" "c"] \
+diff -rup bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-1.d binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-1.d
+--- bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-1.d	2024-11-04 13:34:33.522976068 +0000
+++ binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-1.d	2024-11-04 13:37:17.985526186 +0000
+@@ -23,6 +23,6 @@ Contents of the SFrame section .sframe:
+ 
+     func idx \[1\]: pc = 0x1010, size = 64 bytes
+     STARTPC\[m\] +CFA +FP +RA +
+-    0+0000 +sp\+16 +u +f +
+    0+0000 +sp\+[0-9]+ +u +f +
+ 
+ #...
+diff -rup bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-2.d binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-2.d
+--- bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-2.d	2024-11-04 13:34:33.522976068 +0000
+++ binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-2.d	2024-11-04 13:37:43.874611190 +0000
+@@ -23,6 +23,6 @@ Contents of the SFrame section .sframe:
+ 
+     func idx \[1\]: pc = 0x1010, size = 32 bytes
+     STARTPC\[m\] +CFA +FP +RA +
+-    0+0000 +sp\+16 +u +f +
+    0+0000 +sp\+[0-9]+ +u +f +
+ 
+ #...
+diff -rup bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-2.d binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-2.d
+--- bin.orig/ld/testsuite/ld-x86-64/sframe-pltgot-2.d	2024-11-04 14:26:07.983307843 +0000
+++ binutils-2.43.50-55e32b3c682/ld/testsuite/ld-x86-64/sframe-pltgot-2.d	2024-11-04 14:26:18.781353913 +0000
+@@ -21,7 +21,7 @@ Contents of the SFrame section .sframe:
+     0+1000 +sp\+16 +u +f +
+     0+1006 +sp\+24 +u +f +
+ 
+-    func idx \[1\]: pc = 0x1010, size = 32 bytes
+    func idx \[1\]: pc = 0x1010, size = [0-9]+ bytes
+     STARTPC\[m\] +CFA +FP +RA +
+     0+0000 +sp\+[0-9]+ +u +f +
+ 
+--- binutils.orig/ld/testsuite/ld-bootstrap/bootstrap.exp	2025-02-03 11:13:50.829608207 +0000
+++ binutils-with-gold-2.44/ld/testsuite/ld-bootstrap/bootstrap.exp	2025-02-03 11:17:34.589136290 +0000
+@@ -29,6 +29,12 @@ if ![isnative] {
+     return
+ }
+ 
+# FIXME: The AArch64 rawhide libz and libjanson libraries are built
+# without GCS support and so cannot be linked.
+if {[istarget "aarch64*-*-*"] } {
+    return
+}
+
+ # Skip if OFILES aren't provided, it can happen when lauching
+ # the testsuites outside the build directory.
+ if {![info exists OFILES]} {
+--- binutils.orig/ld/testsuite/ld-vsb/vsb.exp	2025-02-07 11:24:06.084525843 +0000
+++ binutils-with-gold-2.44/ld/testsuite/ld-vsb/vsb.exp	2025-02-07 11:26:34.984041584 +0000
+@@ -366,7 +366,6 @@ proc visibility_run {visibility} {
+ 		 || [ string match $visibility "protected_weak" ]
+ 		 || [ string match $visibility "normal" ] } {
+ 		setup_xfail "powerpc-*-linux*"
+-		setup_xfail "s390x-*-linux*"
+ 		if { [istarget sparc*-*-linux*] && [is_elf64 $tmpdir/mainnp.o] } {
+ 		    setup_xfail "sparc*-*-linux*"
+ 		}
+--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp	2025-03-31 09:24:34.260146421 +0100
+++ binutils-with-gold-2.44.50-7109ea04ac7/ld/testsuite/ld-x86-64/x86-64.exp	2025-03-31 09:25:38.951438172 +0100
+@@ -2167,7 +2167,6 @@ if { [isnative] && [check_compiler_avail
+ 	}
+     }
+ 
+-    undefined_weak "$DIRECT_EXTERN_ACCESS_CFLAGS $NOPIE_CFLAGS" "$NOPIE_LDFLAGS"
+     undefined_weak "-fPIE" "$NOPIE_LDFLAGS"
+     undefined_weak "-fPIE" "-pie"
+     undefined_weak "-fPIE" "$NOPIE_LDFLAGS -Wl,-z,nodynamic-undefined-weak"
+--- binutils.orig/ld/testsuite/ld-shared/shared.exp	2025-03-31 11:25:50.792541423 +0100
+++ binutils-with-gold-2.44.50-7109ea04ac7/ld/testsuite/ld-shared/shared.exp	2025-03-31 11:27:36.680868036 +0100
+@@ -205,6 +205,10 @@ if { [istarget mips*-*-*] && ! [at_least
+ }
+ verbose "Using $picflag to compile PIC code"
+ 
+if { [istarget "i686-*-*"] } {
+    return
+}
+
+ # Compile the main program.
+ global PLT_CFLAGS NOPIE_CFLAGS NOPIE_LDFLAGS
+ verbose "Using $NOPIE_CFLAGS to compile and $NOPIE_LDFLAGS to link non PIC code"
+--- binutils.orig/ld/testsuite/ld-elf/shared.exp	2025-03-31 11:25:50.643275417 +0100
+++ binutils-with-gold-2.44.50-7109ea04ac7/ld/testsuite/ld-elf/shared.exp	2025-03-31 11:28:38.353212702 +0100
+@@ -1612,18 +1612,6 @@ if { [istarget *-*-linux*]
+ 	    "pr22393-2-static" \
+ 	    "pass.out" \
+ 	] \
+-	[list \
+-	    "Run pr21964-4" \
+-	    "$NOPIE_LDFLAGS" \
+-	    "" \
+-	    {pr21964-4.c} \
+-	    "pr21964-4" \
+-	    "pass.out" \
+-	    "$NOPIE_CFLAGS" \
+-	    "" \
+-	    "" \
+-	    "-ldl" \
+-	] \
+     ]
+ }
+ 
+--- fred/binutils/testsuite/binutils-all/objdump.exp	2026-02-16 09:03:27.457277379 +0000
+++ binutils-with-gold-2.46.50-2d306bf8a70/binutils/testsuite/binutils-all/objdump.exp	2026-02-16 09:03:30.592967621 +0000
+@@ -957,7 +957,7 @@ proc test_objdump_S { } {
+     }
+ }
+ 
+-test_objdump_S
+# test_objdump_S
+ 
+ # Test objdump --map-global-vars on file containing dwarf-2 encoding information.
+ 
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d	2026-03-20 13:05:31.155200130 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+-#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d	2026-03-20 13:05:52.846252771 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1
+-#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d	2026-03-20 13:06:01.427273593 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+-#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d	2026-03-20 13:04:07.601997355 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+-#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d	2026-03-20 13:04:57.106117494 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1
+-#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
+diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d
+--- binutils.orig/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d	2026-03-20 13:02:05.468700958 +0000
+++ binutils-with-gold-2.46/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d	2026-03-20 13:05:14.650160073 +0000
+@@ -1,6 +1,6 @@
+ #source: data-reloc.s
+ #as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+-#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic -z notext
+ #objdump: -dR
+ 
+ .*:[ 	]+file format .*
--- a/binutils-update-linker-manual.patch
+++ b/binutils-update-linker-manual.patch
@ -1,36 +0,0 @@
-diff -rup binutils.orig/ld/ld.1 binutils-2.41/ld/ld.1
--- binutils.orig/ld/ld.1	2023-08-03 12:47:14.427004953 +0100
-+++ binutils-2.41/ld/ld.1	2023-08-03 12:49:10.672145873 +0100
-@@ -2669,7 +2669,7 @@ systems may not understand them. If you
- \&\fB\-\-enable\-new\-dtags\fR, the new dynamic tags will be created as needed
- and older dynamic tags will be omitted.
- If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
-created. By default, the new dynamic tags are not created. Note that
-+created. By default, the new dynamic tags are created. Note that
- those options are only available for ELF systems.
- .IP \fB\-\-hash\-size=\fR\fInumber\fR 4
- .IX Item "--hash-size=number"
-diff -rup binutils.orig/ld/ld.info binutils-2.41/ld/ld.info
--- binutils.orig/ld/ld.info	2023-08-03 12:47:14.427004953 +0100
-+++ binutils-2.41/ld/ld.info	2023-08-03 12:49:58.829204257 +0100
-@@ -2366,7 +2366,7 @@ GNU linker:
-      ‘--enable-new-dtags’, the new dynamic tags will be created as
-      needed and older dynamic tags will be omitted.  If you specify
-      ‘--disable-new-dtags’, no new dynamic tags will be created.  By
-     default, the new dynamic tags are not created.  Note that those
-+     default, the new dynamic tags are created.  Note that those
-      options are only available for ELF systems.
- 
- ‘--hash-size=NUMBER’
-diff -rup binutils.orig/ld/ld.texi binutils-2.41/ld/ld.texi
--- binutils.orig/ld/ld.texi	2023-08-03 12:50:58.176276215 +0100
-+++ binutils-2.41/ld/ld.texi	2023-08-03 12:41:11.902610960 +0100
-@@ -2946,7 +2946,7 @@ systems may not understand them. If you
- @option{--enable-new-dtags}, the new dynamic tags will be created as needed
- and older dynamic tags will be omitted.
- If you specify @option{--disable-new-dtags}, no new dynamic tags will be
-created. By default, the new dynamic tags are not created. Note that
-+created. By default, the new dynamic tags are created. Note that
- those options are only available for ELF systems.
- 
- @kindex --hash-size=@var{number}
--- a/binutils-x86-64-v3.patch
+++ b/binutils-x86-64-v3.patch
@ -1,33 +0,0 @@
-diff --git a/ld/testsuite/ld-x86-64/property-3.r b/ld/testsuite/ld-x86-64/property-3.r
-index 1bdb47c7b6b..1e4a24c6fbe 100644
--- a/ld/testsuite/ld-x86-64/property-3.r
-+++ b/ld/testsuite/ld-x86-64/property-3.r
-@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
-   GNU                  0x[0-9a-f]+	NT_GNU_PROPERTY_TYPE_0
-       Properties: stack size: 0x800000
- #...
-	x86 ISA needed: x86-64-baseline, x86-64-v2
-+	x86 ISA needed: x86-64-baseline, x86-64-v2.*
- #pass
-diff --git a/ld/testsuite/ld-x86-64/property-4.r b/ld/testsuite/ld-x86-64/property-4.r
-index 8cc618cbfad..031a1d280ad 100644
--- a/ld/testsuite/ld-x86-64/property-4.r
-+++ b/ld/testsuite/ld-x86-64/property-4.r
-@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
-   GNU                  0x[0-9a-f]+	NT_GNU_PROPERTY_TYPE_0
-       Properties: stack size: 0x800000
- #...
-	x86 ISA needed: x86-64-baseline, x86-64-v2, x86-64-v4
-+	x86 ISA needed: x86-64-baseline, x86-64-v2,.*x86-64-v4
- #pass
-diff --git a/ld/testsuite/ld-x86-64/property-5.r b/ld/testsuite/ld-x86-64/property-5.r
-index e3ba4f659b9..58b274b9772 100644
--- a/ld/testsuite/ld-x86-64/property-5.r
-+++ b/ld/testsuite/ld-x86-64/property-5.r
-@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
-   GNU                  0x[0-9a-f]+	NT_GNU_PROPERTY_TYPE_0
-       Properties: stack size: 0x900000
- #...
-	x86 ISA needed: x86-64-baseline, x86-64-v2, x86-64-v4
-+	x86 ISA needed: x86-64-baseline, x86-64-v2,.*x86-64-v4
- #pass
--- a/binutils.spec
+++ b/binutils.spec
--- a/i686-AVX10.1-part-1.patch
+++ b/i686-AVX10.1-part-1.patch
@ -1,209 +0,0 @@
-From e30e95759268ce5a5a1f752b3c9fa3e4a182db99 Mon Sep 17 00:00:00 2001
-From: Jan Beulich <jbeulich@suse.com>
-Date: Fri, 1 Sep 2023 12:28:57 +0200
-Subject: [PATCH] x86: correct source used for two non-AVX512 VEXWIG tests
-
-These shouldn't wrongly include the AVX512VL sources. Obviously the
-expectations therefore also need to change.
---
- gas/testsuite/gas/i386/vaes-wig1.d       | 118 ++++-------------------
- gas/testsuite/gas/i386/vpclmulqdq-wig1.d |  44 +++------
- 2 files changed, 32 insertions(+), 130 deletions(-)
-
-diff --git a/gas/testsuite/gas/i386/vaes-wig1.d b/gas/testsuite/gas/i386/vaes-wig1.d
-index 8e8567e01df..9d37e52b49e 100644
--- a/gas/testsuite/gas/i386/vaes-wig1.d
-+++ b/gas/testsuite/gas/i386/vaes-wig1.d
-@@ -1,7 +1,7 @@
- #as: -mvexwig=1
- #objdump: -dw
- #name: i386 AVX/VAES wig insns
-#source: avx512vl_vaes.s
-+#source: vaes.s
- 
- .*: +file format .*
- 
-@@ -9,100 +9,24 @@
- Disassembly of section \.text:
- 
- 00000000 <_start>:
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:	c4 e2 cd dc d4       	vaesenc %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd de d4       	vaesdec %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd dc d4       	vaesenc %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd de d4       	vaesdec %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
-+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
-+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
- #pass
-diff --git a/gas/testsuite/gas/i386/vpclmulqdq-wig1.d b/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
-index 843bf56bc21..52bb1651201 100644
--- a/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
-+++ b/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
-@@ -1,7 +1,7 @@
- #as: -mvexwig=1
- #objdump: -dw
- #name: i386 AVX/VPCLMULQDQ wig insns
-#source: avx512vl_vpclmulqdq.s
-+#source: vpclmulqdq.s
- 
- .*: +file format .*
- 
-@@ -9,36 +9,14 @@
- Disassembly of section \.text:
- 
- 00000000 <_start>:
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 e9 44 da ab[ 	]*vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 e9 44 9c f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 e9 44 9a f0 07 00 00 7b[ 	]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 e1 ab[ 	]*vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 a4 f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 a2 e0 0f 00 00 7b[ 	]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 08 44 da ab[ 	]*\{evex\} vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 08 44 5a 7f 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 28 44 e1 ab[ 	]*\{evex\} vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 28 44 62 7f 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 65 08 44 e2 11[ 	]*\{evex\} vpclmulhqhqdq %xmm2,%xmm3,%xmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 5d 08 44 eb 01[ 	]*\{evex\} vpclmulhqlqdq %xmm3,%xmm4,%xmm5
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 08 44 f4 10[ 	]*\{evex\} vpclmullqhqdq %xmm4,%xmm5,%xmm6
-[ 	]*[a-f0-9]+:[ 	]*62 f3 4d 08 44 fd 00[ 	]*\{evex\} vpclmullqlqdq %xmm5,%xmm6,%xmm7
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 28 44 d9 11[ 	]*\{evex\} vpclmulhqhqdq %ymm1,%ymm2,%ymm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 65 28 44 e2 01[ 	]*\{evex\} vpclmulhqlqdq %ymm2,%ymm3,%ymm4
-[ 	]*[a-f0-9]+:[ 	]*62 f3 5d 28 44 eb 10[ 	]*\{evex\} vpclmullqhqdq %ymm3,%ymm4,%ymm5
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 28 44 f4 00[ 	]*\{evex\} vpclmullqlqdq %ymm4,%ymm5,%ymm6
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d1 44 db ab[ 	]*vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d1 44 9c f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 d1 44 9a f0 07 00 00 7b[ 	]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 ed 44 d2 ab[ 	]*vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 ed 44 94 f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2
-[ 	]*[a-f0-9]+:[ 	]*c4 e3 ed 44 92 e0 0f 00 00 7b[ 	]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 08 44 db ab[ 	]*\{evex\} vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 55 08 44 5a 7f 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 28 44 d2 ab[ 	]*\{evex\} vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2
-[ 	]*[a-f0-9]+:[ 	]*62 f3 6d 28 44 52 7f 7b[ 	]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 f4 ab[ 	]*vpclmulqdq \$0xab,%ymm4,%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 b4 f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 b2 e0 0f 00 00 7b[ 	]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 ed 44 d9 11[ 	]*vpclmulhqhqdq %ymm1,%ymm2,%ymm3
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 e5 44 e2 01[ 	]*vpclmulhqlqdq %ymm2,%ymm3,%ymm4
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 dd 44 eb 10[ 	]*vpclmullqhqdq %ymm3,%ymm4,%ymm5
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 f4 00[ 	]*vpclmullqlqdq %ymm4,%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 f4 ab[ 	]*vpclmulqdq \$0xab,%ymm4,%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 b4 f4 c0 1d fe ff 7b[ 	]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-+[ 	]*[a-f0-9]+:[ 	]*c4 e3 d5 44 b2 e0 0f 00 00 7b[ 	]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm6
- #pass
-- 
-2.43.0
-
--- a/i686-AVX10.1-part-2.patch
+++ b/i686-AVX10.1-part-2.patch
@ -1,379 +0,0 @@
-From dfab07b9ead66f08661325c03175e1df9210ccd7 Mon Sep 17 00:00:00 2001
-From: Jan Beulich <jbeulich@suse.com>
-Date: Fri, 1 Sep 2023 12:29:44 +0200
-Subject: [PATCH] x86: unindent most of set_cpu_arch()
-
-Inverting the initial if()'s condition allows to move out the bulk of
-the function by a level, improving readability at least a bit. While
-doing that also pull the push/pop handling up first, such that "else if"
-after "return" isn't needed anymore; the order in which special cases
-are checked doesn't really matter.
---
- gas/config/tc-i386.c | 305 ++++++++++++++++++++++---------------------
- 1 file changed, 154 insertions(+), 151 deletions(-)
-
-diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
-index 19a5f2d61e5..00abfc78264 100644
--- a/gas/config/tc-i386.c
-+++ b/gas/config/tc-i386.c
-@@ -2793,29 +2793,134 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
-     bool no_cond_jump_promotion;
-   } arch_stack_entry;
-   static const arch_stack_entry *arch_stack_top;
-+  char *s;
-+  int e;
-+  const char *string;
-+  unsigned int j = 0;
-+  i386_cpu_flags flags;
- 
-   SKIP_WHITESPACE ();
- 
-  if (!is_end_of_line[(unsigned char) *input_line_pointer])
-+  if (is_end_of_line[(unsigned char) *input_line_pointer])
-+    {
-+      as_bad (_("missing cpu architecture"));
-+      input_line_pointer++;
-+      return;
-+    }
-+
-+  e = get_symbol_name (&s);
-+  string = s;
-+
-+  if (strcmp (string, "push") == 0)
-+    {
-+      arch_stack_entry *top = XNEW (arch_stack_entry);
-+
-+      top->name = cpu_arch_name;
-+      if (cpu_sub_arch_name)
-+	top->sub_name = xstrdup (cpu_sub_arch_name);
-+      else
-+	top->sub_name = NULL;
-+      top->flags = cpu_arch_flags;
-+      top->isa = cpu_arch_isa;
-+      top->isa_flags = cpu_arch_isa_flags;
-+      top->flag_code = flag_code;
-+      top->stackop_size = stackop_size;
-+      top->no_cond_jump_promotion = no_cond_jump_promotion;
-+
-+      top->prev = arch_stack_top;
-+      arch_stack_top = top;
-+
-+      (void) restore_line_pointer (e);
-+      demand_empty_rest_of_line ();
-+      return;
-+    }
-+
-+  if (strcmp (string, "pop") == 0)
-     {
-      char *s;
-      int e = get_symbol_name (&s);
-      const char *string = s;
-      unsigned int j = 0;
-      i386_cpu_flags flags;
-+      const arch_stack_entry *top = arch_stack_top;
- 
-      if (strcmp (string, "default") == 0)
-+      if (!top)
-+	as_bad (_(".arch stack is empty"));
-+      else if (top->flag_code != flag_code
-+	       || top->stackop_size != stackop_size)
-+	{
-+	  static const unsigned int bits[] = {
-+	    [CODE_16BIT] = 16,
-+	    [CODE_32BIT] = 32,
-+	    [CODE_64BIT] = 64,
-+	  };
-+
-+	  as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"),
-+		  bits[top->flag_code],
-+		  top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : "");
-+	}
-+      else
-+	{
-+	  arch_stack_top = top->prev;
-+
-+	  cpu_arch_name = top->name;
-+	  free (cpu_sub_arch_name);
-+	  cpu_sub_arch_name = top->sub_name;
-+	  cpu_arch_flags = top->flags;
-+	  cpu_arch_isa = top->isa;
-+	  cpu_arch_isa_flags = top->isa_flags;
-+	  no_cond_jump_promotion = top->no_cond_jump_promotion;
-+
-+	  XDELETE (top);
-+	}
-+
-+      (void) restore_line_pointer (e);
-+      demand_empty_rest_of_line ();
-+      return;
-+    }
-+
-+  if (strcmp (string, "default") == 0)
-+    {
-+      if (strcmp (default_arch, "iamcu") == 0)
-+	string = default_arch;
-+      else
- 	{
-	  if (strcmp (default_arch, "iamcu") == 0)
-	    string = default_arch;
-+	  static const i386_cpu_flags cpu_unknown_flags = CPU_UNKNOWN_FLAGS;
-+
-+	  cpu_arch_name = NULL;
-+	  free (cpu_sub_arch_name);
-+	  cpu_sub_arch_name = NULL;
-+	  cpu_arch_flags = cpu_unknown_flags;
-+	  if (flag_code == CODE_64BIT)
-+	    {
-+	      cpu_arch_flags.bitfield.cpu64 = 1;
-+	      cpu_arch_flags.bitfield.cpuno64 = 0;
-+	    }
- 	  else
- 	    {
-	      static const i386_cpu_flags cpu_unknown_flags = CPU_UNKNOWN_FLAGS;
-+	      cpu_arch_flags.bitfield.cpu64 = 0;
-+	      cpu_arch_flags.bitfield.cpuno64 = 1;
-+	    }
-+	  cpu_arch_isa = PROCESSOR_UNKNOWN;
-+	  cpu_arch_isa_flags = cpu_arch[flag_code == CODE_64BIT].enable;
-+	  if (!cpu_arch_tune_set)
-+	    {
-+	      cpu_arch_tune = cpu_arch_isa;
-+	      cpu_arch_tune_flags = cpu_arch_isa_flags;
-+	    }
-+
-+	  j = ARRAY_SIZE (cpu_arch) + 1;
-+	}
-+    }
-+
-+  for (; j < ARRAY_SIZE (cpu_arch); j++)
-+    {
-+      if (strcmp (string + (*string == '.'), cpu_arch[j].name) == 0
-+	  && (*string == '.') == (cpu_arch[j].type == PROCESSOR_NONE))
-+	{
-+	  if (*string != '.')
-+	    {
-+	      check_cpu_arch_compatible (string, cpu_arch[j].enable);
- 
-	      cpu_arch_name = NULL;
-+	      cpu_arch_name = cpu_arch[j].name;
- 	      free (cpu_sub_arch_name);
- 	      cpu_sub_arch_name = NULL;
-	      cpu_arch_flags = cpu_unknown_flags;
-+	      cpu_arch_flags = cpu_arch[j].enable;
- 	      if (flag_code == CODE_64BIT)
- 		{
- 		  cpu_arch_flags.bitfield.cpu64 = 1;
-@@ -2826,173 +2931,71 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
- 		  cpu_arch_flags.bitfield.cpu64 = 0;
- 		  cpu_arch_flags.bitfield.cpuno64 = 1;
- 		}
-	      cpu_arch_isa = PROCESSOR_UNKNOWN;
-	      cpu_arch_isa_flags = cpu_arch[flag_code == CODE_64BIT].enable;
-+	      cpu_arch_isa = cpu_arch[j].type;
-+	      cpu_arch_isa_flags = cpu_arch[j].enable;
- 	      if (!cpu_arch_tune_set)
- 		{
- 		  cpu_arch_tune = cpu_arch_isa;
- 		  cpu_arch_tune_flags = cpu_arch_isa_flags;
- 		}
-
-	      j = ARRAY_SIZE (cpu_arch) + 1;
-+	      pre_386_16bit_warned = false;
-+	      break;
- 	    }
-	}
-      else if (strcmp (string, "push") == 0)
-	{
-	  arch_stack_entry *top = XNEW (arch_stack_entry);
- 
-	  top->name = cpu_arch_name;
-	  if (cpu_sub_arch_name)
-	    top->sub_name = xstrdup (cpu_sub_arch_name);
-	  else
-	    top->sub_name = NULL;
-	  top->flags = cpu_arch_flags;
-	  top->isa = cpu_arch_isa;
-	  top->isa_flags = cpu_arch_isa_flags;
-	  top->flag_code = flag_code;
-	  top->stackop_size = stackop_size;
-	  top->no_cond_jump_promotion = no_cond_jump_promotion;
-+	  if (cpu_flags_all_zero (&cpu_arch[j].enable))
-+	    continue;
- 
-	  top->prev = arch_stack_top;
-	  arch_stack_top = top;
-+	  flags = cpu_flags_or (cpu_arch_flags, cpu_arch[j].enable);
- 
-	  (void) restore_line_pointer (e);
-	  demand_empty_rest_of_line ();
-	  return;
-	}
-      else if (strcmp (string, "pop") == 0)
-	{
-	  const arch_stack_entry *top = arch_stack_top;
-
-	  if (!top)
-	    as_bad (_(".arch stack is empty"));
-	  else if (top->flag_code != flag_code
-		   || top->stackop_size != stackop_size)
-+	  if (!cpu_flags_equal (&flags, &cpu_arch_flags))
- 	    {
-	      static const unsigned int bits[] = {
-	        [CODE_16BIT] = 16,
-	        [CODE_32BIT] = 32,
-	        [CODE_64BIT] = 64,
-	      };
-
-	      as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"),
-		      bits[top->flag_code],
-		      top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : "");
-+	      extend_cpu_sub_arch_name (string + 1);
-+	      cpu_arch_flags = flags;
-+	      cpu_arch_isa_flags = flags;
- 	    }
- 	  else
-	    {
-	      arch_stack_top = top->prev;
-
-	      cpu_arch_name = top->name;
-	      free (cpu_sub_arch_name);
-	      cpu_sub_arch_name = top->sub_name;
-	      cpu_arch_flags = top->flags;
-	      cpu_arch_isa = top->isa;
-	      cpu_arch_isa_flags = top->isa_flags;
-	      no_cond_jump_promotion = top->no_cond_jump_promotion;
-
-	      XDELETE (top);
-	    }
-+	    cpu_arch_isa_flags
-+	      = cpu_flags_or (cpu_arch_isa_flags, cpu_arch[j].enable);
- 
- 	  (void) restore_line_pointer (e);
- 	  demand_empty_rest_of_line ();
- 	  return;
- 	}
-+    }
- 
-      for (; j < ARRAY_SIZE (cpu_arch); j++)
-	{
-	  if (strcmp (string + (*string == '.'), cpu_arch[j].name) == 0
-	     && (*string == '.') == (cpu_arch[j].type == PROCESSOR_NONE))
-	    {
-	      if (*string != '.')
-		{
-		  check_cpu_arch_compatible (string, cpu_arch[j].enable);
-
-		  cpu_arch_name = cpu_arch[j].name;
-		  free (cpu_sub_arch_name);
-		  cpu_sub_arch_name = NULL;
-		  cpu_arch_flags = cpu_arch[j].enable;
-		  if (flag_code == CODE_64BIT)
-		    {
-		      cpu_arch_flags.bitfield.cpu64 = 1;
-		      cpu_arch_flags.bitfield.cpuno64 = 0;
-		    }
-		  else
-		    {
-		      cpu_arch_flags.bitfield.cpu64 = 0;
-		      cpu_arch_flags.bitfield.cpuno64 = 1;
-		    }
-		  cpu_arch_isa = cpu_arch[j].type;
-		  cpu_arch_isa_flags = cpu_arch[j].enable;
-		  if (!cpu_arch_tune_set)
-		    {
-		      cpu_arch_tune = cpu_arch_isa;
-		      cpu_arch_tune_flags = cpu_arch_isa_flags;
-		    }
-		  pre_386_16bit_warned = false;
-		  break;
-		}
-
-	      if (cpu_flags_all_zero (&cpu_arch[j].enable))
-	        continue;
-
-	      flags = cpu_flags_or (cpu_arch_flags,
-				    cpu_arch[j].enable);
-
-	      if (!cpu_flags_equal (&flags, &cpu_arch_flags))
-		{
-		  extend_cpu_sub_arch_name (string + 1);
-		  cpu_arch_flags = flags;
-		  cpu_arch_isa_flags = flags;
-		}
-	      else
-		cpu_arch_isa_flags
-		  = cpu_flags_or (cpu_arch_isa_flags,
-				  cpu_arch[j].enable);
-	      (void) restore_line_pointer (e);
-	      demand_empty_rest_of_line ();
-	      return;
-	    }
-	}
-
-      if (startswith (string, ".no") && j >= ARRAY_SIZE (cpu_arch))
-	{
-	  /* Disable an ISA extension.  */
-	  for (j = 0; j < ARRAY_SIZE (cpu_arch); j++)
-	    if (cpu_arch[j].type == PROCESSOR_NONE
-	        && strcmp (string + 3, cpu_arch[j].name) == 0)
-+  if (startswith (string, ".no") && j >= ARRAY_SIZE (cpu_arch))
-+    {
-+      /* Disable an ISA extension.  */
-+      for (j = 0; j < ARRAY_SIZE (cpu_arch); j++)
-+	if (cpu_arch[j].type == PROCESSOR_NONE
-+	    && strcmp (string + 3, cpu_arch[j].name) == 0)
-+	  {
-+	    flags = cpu_flags_and_not (cpu_arch_flags, cpu_arch[j].disable);
-+	    if (!cpu_flags_equal (&flags, &cpu_arch_flags))
- 	      {
-		flags = cpu_flags_and_not (cpu_arch_flags,
-					   cpu_arch[j].disable);
-		if (!cpu_flags_equal (&flags, &cpu_arch_flags))
-		  {
-		    extend_cpu_sub_arch_name (string + 1);
-		    cpu_arch_flags = flags;
-		    cpu_arch_isa_flags = flags;
-		  }
-		(void) restore_line_pointer (e);
-		demand_empty_rest_of_line ();
-		return;
-+		extend_cpu_sub_arch_name (string + 1);
-+		cpu_arch_flags = flags;
-+		cpu_arch_isa_flags = flags;
- 	      }
-	}
-
-      if (j == ARRAY_SIZE (cpu_arch))
-	as_bad (_("no such architecture: `%s'"), string);
- 
-      *input_line_pointer = e;
-+	    (void) restore_line_pointer (e);
-+	    demand_empty_rest_of_line ();
-+	    return;
-+	  }
-     }
-  else
-    as_bad (_("missing cpu architecture"));
-+
-+  if (j == ARRAY_SIZE (cpu_arch))
-+    as_bad (_("no such architecture: `%s'"), string);
-+
-+  *input_line_pointer = e;
- 
-   no_cond_jump_promotion = 0;
-   if (*input_line_pointer == ','
-       && !is_end_of_line[(unsigned char) input_line_pointer[1]])
-     {
-      char *string;
-      char e;
-
-       ++input_line_pointer;
-      e = get_symbol_name (&string);
-+      e = get_symbol_name (&s);
-+      string = s;
- 
-       if (strcmp (string, "nojumps") == 0)
- 	no_cond_jump_promotion = 1;
-- 
-2.43.0
-
--- a/i686-AVX10.1-part-3.patch
+++ b/i686-AVX10.1-part-3.patch
@ -1,160 +0,0 @@
-diff -rup fred/gas/config/tc-i386.c binutils-2.41/gas/config/tc-i386.c
--- fred/gas/config/tc-i386.c	2023-12-07 10:00:21.013005830 +0000
-+++ binutils-2.41/gas/config/tc-i386.c	2023-12-07 10:00:28.037015037 +0000
-@@ -1053,8 +1053,8 @@ static const arch_entry cpu_arch[] =
-   SUBARCH (xsavec, XSAVEC, ANY_XSAVEC, false),
-   SUBARCH (xsaves, XSAVES, ANY_XSAVES, false),
-   SUBARCH (aes, AES, ANY_AES, false),
-  SUBARCH (pclmul, PCLMUL, ANY_PCLMUL, false),
-  SUBARCH (clmul, PCLMUL, ANY_PCLMUL, true),
-+  SUBARCH (pclmul, PCLMULQDQ, ANY_PCLMULQDQ, false),
-+  SUBARCH (clmul, PCLMULQDQ, ANY_PCLMULQDQ, true),
-   SUBARCH (fsgsbase, FSGSBASE, FSGSBASE, false),
-   SUBARCH (rdrnd, RDRND, RDRND, false),
-   SUBARCH (f16c, F16C, ANY_F16C, false),
-@@ -1861,7 +1861,7 @@ cpu_flags_match (const insn_template *t)
- 		      || (sse2avx && !i.prefix[DATA_PREFIX]))
- 		  && (!x.bitfield.cpuaes || cpu.bitfield.cpuaes)
- 		  && (!x.bitfield.cpugfni || cpu.bitfield.cpugfni)
-		  && (!x.bitfield.cpupclmul || cpu.bitfield.cpupclmul))
-+		  && (!x.bitfield.cpupclmulqdq || cpu.bitfield.cpupclmulqdq))
- 		match |= CPU_FLAGS_ARCH_MATCH;
- 	    }
- 	  else if (x.bitfield.cpuavx512f)
-diff -rup fred/opcodes/i386-gen.c binutils-2.41/opcodes/i386-gen.c
--- fred/opcodes/i386-gen.c	2023-12-07 10:00:22.092007244 +0000
-+++ binutils-2.41/opcodes/i386-gen.c	2023-12-07 10:00:28.038015039 +0000
-@@ -79,7 +79,7 @@ static const dependency isa_dependencies
-   { "AMDFAM10",
-     "K8|FISTTP|SSE4A|ABM|MONITOR" },
-   { "BDVER1",
-    "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
-+    "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMULQDQ|PRFCHW" },
-   { "BDVER2",
-     "BDVER1|FMA|BMI|TBM|F16C" },
-   { "BDVER3",
-@@ -87,7 +87,7 @@ static const dependency isa_dependencies
-   { "BDVER4",
-     "BDVER3|AVX2|Movbe|BMI2|RdRnd|MWAITX" },
-   { "ZNVER1",
-    "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
-+    "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMULQDQ|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
-   { "ZNVER2",
-     "ZNVER1|CLWB|RDPID|RDPRU|MCOMMIT|WBNOINVD" },
-   { "ZNVER3",
-@@ -97,7 +97,7 @@ static const dependency isa_dependencies
-   { "BTVER1",
-     "GENERIC64|FISTTP|MONITOR|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
-   { "BTVER2",
-    "BTVER1|AVX|BMI|F16C|AES|PCLMUL|Movbe|Xsaveopt|PRFCHW" },
-+    "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
-   { "286",
-     "186" },
-   { "386",
-@@ -132,7 +132,7 @@ static const dependency isa_dependencies
-     "XSAVE" },
-   { "AES",
-     "SSE2" },
-  { "PCLMUL",
-+  { "PCLMULQDQ",
-     "SSE2" },
-   { "FMA",
-     "AVX" },
-@@ -307,7 +307,7 @@ static bitfield cpu_flags[] =
-   BITFIELD (Xsave),
-   BITFIELD (Xsaveopt),
-   BITFIELD (AES),
-  BITFIELD (PCLMUL),
-+  BITFIELD (PCLMULQDQ),
-   BITFIELD (FMA),
-   BITFIELD (FMA4),
-   BITFIELD (XOP),
-diff -rup fred/opcodes/i386-init.h binutils-2.41/opcodes/i386-init.h
--- fred/opcodes/i386-init.h	2023-12-07 10:00:22.092007244 +0000
-+++ binutils-2.41/opcodes/i386-init.h	2023-12-07 10:00:51.260045479 +0000
-@@ -432,7 +432,7 @@
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
- 
-#define CPU_PCLMUL_FLAGS \
-+#define CPU_PCLMULQDQ_FLAGS \
-   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1791,7 +1791,7 @@
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
- 
-#define CPU_ANY_PCLMUL_FLAGS \
-+#define CPU_ANY_PCLMULQDQ_FLAGS \
-   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-diff -rup fred/opcodes/i386-opc.h binutils-2.41/opcodes/i386-opc.h
--- fred/opcodes/i386-opc.h	2023-12-07 10:00:22.093007246 +0000
-+++ binutils-2.41/opcodes/i386-opc.h	2023-12-07 10:00:28.038015039 +0000
-@@ -121,8 +121,8 @@ enum
-   CpuXsaveopt,
-   /* AES support required */
-   CpuAES,
-  /* PCLMUL support required */
-  CpuPCLMUL,
-+  /* PCLMULQDQ support required */
-+  CpuPCLMULQDQ,
-   /* FMA support required */
-   CpuFMA,
-   /* FMA4 support required */
-@@ -374,7 +374,7 @@ typedef union i386_cpu_flags
-       unsigned int cpuxsave:1;
-       unsigned int cpuxsaveopt:1;
-       unsigned int cpuaes:1;
-      unsigned int cpupclmul:1;
-+      unsigned int cpupclmulqdq:1;
-       unsigned int cpufma:1;
-       unsigned int cpufma4:1;
-       unsigned int cpuxop:1;
-diff -rup fred/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
--- fred/opcodes/i386-opc.tbl	2023-12-07 10:00:22.093007246 +0000
-+++ binutils-2.41/opcodes/i386-opc.tbl	2023-12-07 10:00:28.038015039 +0000
-@@ -1448,15 +1448,15 @@ vaesdeclast, 0x66df, VAES, Modrm|Vex256|
- vaesenc, 0x66dc, VAES, Modrm|Vex256|Space0F38|VexVVVV|VexWIG|NoSuf, { RegYMM|Unspecified|BaseIndex, RegYMM, RegYMM }
- vaesenclast, 0x66dd, VAES, Modrm|Vex256|Space0F38|VexVVVV|VexWIG|NoSuf, { RegYMM|Unspecified|BaseIndex, RegYMM, RegYMM }
- 
-// PCLMUL
-+// PCLMULQDQ
- 
- <pclmul:cpu:attr, $avx:AVX|:Vex128|VexW0|SSE2AVX|VexVVVV, $sse::>
- 
-pclmulqdq<pclmul>, 0x660f3a44, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmullqlqdq<pclmul>, 0x660f3a44/0x00, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmulhqlqdq<pclmul>, 0x660f3a44/0x01, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmullqhqdq<pclmul>, 0x660f3a44/0x10, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmulhqhqdq<pclmul>, 0x660f3a44/0x11, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-+pclmulqdq<pclmul>, 0x660f3a44, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pclmullqlqdq<pclmul>, 0x660f3a44/0x00, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-+pclmulhqlqdq<pclmul>, 0x660f3a44/0x01, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-+pclmullqhqdq<pclmul>, 0x660f3a44/0x10, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-+pclmulhqhqdq<pclmul>, 0x660f3a44/0x11, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
- 
- // GFNI
- 
-@@ -1771,13 +1771,13 @@ vaesenclast, 0x66dd, AVX|AES, Modrm|Vex|
- vaesimc, 0x66db, AVX|AES, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM }
- vaeskeygenassist, 0x66df, AVX|AES, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
- 
-// PCLMUL + AVX
-+// PCLMULQDQ + AVX
- 
-vpclmulqdq, 0x6644, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmullqlqdq, 0x6644/0x00, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmulhqlqdq, 0x6644/0x01, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmullqhqdq, 0x6644/0x10, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmulhqhqdq, 0x6644/0x11, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulqdq, 0x6644, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmullqlqdq, 0x6644/0x00, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulhqlqdq, 0x6644/0x01, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmullqhqdq, 0x6644/0x10, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulhqhqdq, 0x6644/0x11, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- 
- // GFNI + AVX
- 
--- a/i686-AVX10.1-part-4.patch
+++ b/i686-AVX10.1-part-4.patch
--- a/i686-AVX10.1-part-5.patch
+++ b/i686-AVX10.1-part-5.patch
--- a/i686-AVX10.1-part-6.patch
+++ b/i686-AVX10.1-part-6.patch
--- a/plans/build-gating.fmf
+++ b/plans/build-gating.fmf
@ -5,14 +5,14 @@
 /common:
  plan:
    import:
-      url: https://src.fedoraproject.org/tests/binutils.git
+      url: https://gitlab.com/redhat/centos-stream/tests/binutils.git
      ref: main
      name: /plans/build-gating/common

 /kernel-rebuild:
  plan:
    import:
-      url: https://src.fedoraproject.org/tests/binutils.git
+      url: https://gitlab.com/redhat/centos-stream/tests/binutils.git
      ref: main
      name: /plans/build-gating/kernel-rebuild

--- a/plans/regression.fmf
+++ b/plans/regression.fmf
@ -5,7 +5,7 @@
 /common:
  plan:
    import:
-      url: https://src.fedoraproject.org/tests/binutils.git
+      url: https://gitlab.com/redhat/centos-stream/tests/binutils.git
      ref: main
      name: /plans/regression

--- a/2
+++ b/2
@ -1,2 +1,2 @@
-SHA512 (binutils-2.41.tar.xz) = 5df45d0bd6ddabdce4f35878c041e46a92deef01e7dea5facc97fd65cc06b59abc6fba0eb454b68e571c7e14038dc823fe7f2263843e6e627b7444eaf0fe9374
+SHA512 (binutils-with-gold-2.47.50-48c933a69a8.tar.xz) = c4300e4881227c431c0bbbb949a5ee5bc113701f993766418b152df7d46d9df378ebace9efffcb6e1f0b7e72ad716bbcccf5b6aa55851dc28216555b242d18a0
 SHA512 (binutils-2.19.50.0.1-output-format.sed) = 2f8686b0c8af13c98cda056824c2820416f6e2d003f70b78ccf5314525b9ee3684d421dfa83e638a2d42d06ea4d4bdaf5226b64d6ec26f7ff59c44ffb2a23dd2
--- a/spec.binutils.cross
+++ b/spec.binutils.cross
@ -1,67 +0,0 @@
-
-# Note - this is an rpm spec file, but it has been renamed in order to avoid
-# conflict with the real binutils.spec file.
-#
-# Its only use is to build a set of cross-binutils rpms by putting it into
-# the SPECS directory of an rpmbuild tree, installing the binutils source
-# rpm into the SOURCES directory and then running:
-#
-#    rpmbuild -bb spec.binutils.cross
-
-Summary: A meta collection of GNU binutils executables for cross builds
-Name: cross-binutils
-License: GPLv3+
-URL: https://sourceware.org/binutils
-
-#----------------------------------------------------------------------------
-#
-# Configurable settings - adjust to match your needs:
-#
-
-Version: 2.30
-Release: 89.el8
-
-# The list of cross architectures to build.
-# Note: this list assumes that we are building on an x86_64-linux-gnu host.
-
-%define arch_list  aarch64-linux-gnu  ppc64le-linux-gnu  s390x-linux-gnu
-
-#----------------------------------------------------------------------------
-
-%define binutils_source_rpm   binutils-%{version}-%{release}.src.rpm
-
-Source: %{binutils_source_rpm}
-
-# Provides: bundled(libiberty)
-
-BuildRequires: autoconf automake
-BuildRequires: perl, sed, coreutils
-BuildRequires: gcc, bison
-BuildRequires: gettext, flex, zlib-devel
-BuildRequires: findutils, texinfo
-BuildRequires: dejagnu, zlib-static, glibc-static, sharutils, bc
-# BuildRequires: elfutils-debuginfod-client-devel
-BuildRequires: rpm-build
-
-#----------------------------------------------------------------------------
-
-%description
-Provides a collection of cross built binutils for the targets
-supported by RHEL (aarch64, ppc64le, s390x).
-
-#----------------------------------------------------------------------------
-
-%build
-
-# Install the binutils sources.
-rpm -ivh %{_sourcedir}/%{binutils_source_rpm}
-
-# Build each set of cross binutils individually.
-for f in %{arch_list}; do
-  rpmbuild -bb --define "binutils_target $f" %{_specdir}/binutils.spec --without testsuite --without gold
-done
-
-#----------------------------------------------------------------------------
-%changelog
-* Wed Nov 11 2020 Nick Clifton  <nickc@redhat.com> - 2.35.1-14
- First release of cross binutils rpm.
Author	SHA1	Message	Date
Nick Clifton	5e050ee6d4	Rebase to commit 48c933a69a8.	2026-09-01 11:34:23 +01:00
Jesus Checa Hidalgo	10671c0eca	Fix logic to enable and disable gold linker	2026-08-25 09:22:43 +02:00
Nick Clifton	e0ff142016	Rebase to bring in commits d9ab6e42e739fe826b02a5f868586132ea2d893a and - 0f9faaebc91bc1886a563bde6c178601b4be743b, thus fixing CVE-2026-19548. Resolves: #2514618	2026-08-19 13:25:44 +01:00
Nick Clifton	064736651b	Replace %bcond_with and %bcond_without with %bcond [0\|1]	2026-08-13 14:09:50 +01:00
Nick Clifton	9f66e09750	Restore building the gold linker	2026-08-13 10:00:35 +01:00
Nick Clifton	40bef170ce	Remove unused patches	2026-08-12 11:22:10 +01:00
Nick Clifton	d4dfa51cea	Update sources	2026-08-12 11:17:28 +01:00
Nick Clifton	29b46b6079	Rebase to commit 4e8ba93fdb2.	2026-08-12 11:15:08 +01:00
Nick Clifton	f40a1175b9	Add ChangeLog entry for previous delta	2026-08-12 08:19:17 +01:00
Yaakov Selkowitz	ddb3cb864e	Disable gold on RHEL 11 gold is deprecated upstream, and nothing should need it in RHEL 11. https://github.com/fedora-eln/eln/issues/553	2026-08-06 11:56:18 -04:00
Nick Clifton	5119f9a9cd	Rebase to the 2.47 GNU Binutils release.	2026-07-27 11:06:13 +01:00
Fedora Release Engineering	9600c63b36	Rebuilt for https://fedoraproject.org/wiki/Fedora_45_Mass_Rebuild	2026-07-15 20:12:01 +00:00
Nick Clifton	23b67e31b8	Fix typo	2026-07-13 18:08:56 +01:00
Nick Clifton	f9af6f1a80	Rebase to 2.47 pre-release tarball.	2026-07-13 18:07:58 +01:00
Nick Clifton	c5ce1de980	Rebase to commit f85ff0c4bce	2026-06-25 14:24:54 +01:00
Nick Clifton	29eedae455	Fix linker testsuite problem for Risc-V	2026-06-11 09:06:04 +01:00
Nick Clifton	c546fe6976	Rebase to commit 48997323b0f	2026-06-05 09:02:36 +01:00
Nick Clifton	0608389263	Rebase to commit 48997323b0f	2026-06-05 08:59:45 +01:00
Nick Clifton	f294ebe3ba	Rebase to commit 2ea3f3a7ac2	2026-05-14 10:46:21 +01:00
Nick Clifton	5b0464e961	Rebase to commit 991cf245839.	2026-04-24 12:35:06 +01:00
Nick Clifton	76d42a7875	Add support for zstd compression. (#2454341 )	2026-04-08 12:04:07 +01:00
Nick Clifton	33e6445241	Rebase to commit c220f3ab8c0	2026-04-07 08:49:31 +01:00
Nick Clifton	108ab4ef7a	Rebase to commit c220f3ab8c0	2026-03-30 12:05:39 +01:00
Nick Clifton	aa57e62e08	Fix Risc-V linker testsuite failures caused by #2428281 .	2026-03-22 08:09:42 +00:00
Nick Clifton	cc43b90ffc	Rebase to commit d712202846b.	2026-03-16 11:04:15 +00:00
Nick Clifton	a53f464f7d	Rebase to commit dd9a411627a.	2026-03-02 10:42:44 +00:00
Nick Clifton	60fb2164e5	Rebase to commit 2d306bf8a70	2026-02-16 11:52:18 +00:00
Nick Clifton	2c4833fe8a	Rebase to 2.46.	2026-02-09 11:12:42 +00:00
Nick Clifton	c228a0153a	Rebase to pre-release snapshot.	2026-01-27 11:22:28 +00:00
Nick Clifton	27063804ce	Rebase to commit ba5838a98fb	2026-01-19 10:29:29 +00:00
Fedora Release Engineering	4c1598168d	Rebuilt for https://fedoraproject.org/wiki/Fedora_44_Mass_Rebuild	2026-01-16 08:21:29 +00:00
Fedora Release Engineering	4483836ddc	Rebuilt for https://fedoraproject.org/wiki/Fedora_44_Mass_Rebuild	2026-01-16 04:24:36 +00:00
Nick Clifton	848e40ec3a	Remove experimental Risc-V patch added with -12 revision.	2026-01-15 12:03:35 +00:00
Nick Clifton	735a883933	Disallow the creation of shared object that use text relocations. (#2428281 )	2026-01-14 10:29:05 +00:00
Nick Clifton	64b8d9de61	Fix Risc-V related test failures caused by -12 revision.	2026-01-09 16:56:53 +00:00
Nick Clifton	d7078a903f	Rebase to commit be970c68891	2026-01-05 10:34:24 +00:00
Nick Clifton	f862eebcff	add package	2025-12-18 16:50:28 +00:00
Nick Clifton	04aad048cf	Fix compile time warning messages about discarded qualifiers. - Change Risc-V assembler to default to disabling relaxation.	2025-12-18 16:47:41 +00:00
Nick Clifton	300293f7e2	Rebase to commit 8e992ccb1e4	2025-12-08 13:41:46 +00:00
Nick Clifton	9e81b24737	Fix testsuite failures for Risc-V target	2025-12-04 15:32:36 +00:00
Nick Clifton	2ac1ee2a42	Rebase to commit beab972c07d - Revert patches for PR 33577	2025-11-24 11:14:48 +00:00
Nick Clifton	19f1fc4940	Rebase to commit 96b8a8a633a	2025-11-11 16:04:21 +00:00
Nick Clifton	f9a1cd84ee	Pass -flto=$RPM_BUILD_NCPUS in CFLAGS. (RHEL-121799)	2025-11-04 11:33:02 +00:00
Nick Clifton	9de042a279	Rebase to commit 2006dea18d5	2025-10-28 10:49:07 +00:00
Nick Clifton	96aece08c1	Rebase to commit b05d1d89605	2025-10-06 10:22:17 +01:00
Nick Clifton	f6c1766b84	Enhance the riscv-64 zicfilp-unlabeled-plt test to cope with larger offsets.	2025-09-11 09:33:13 +01:00
Nick Clifton	ca67fa0f89	Rebase to commit 79b2b564fec	2025-09-08 10:04:27 +01:00
Nick Clifton	1e5363880e	Update sources	2025-08-19 09:19:39 +01:00
Nick Clifton	aa65e68b95	Rebase to commit 7e432e93f8a (previous rebase appears to be broken)	2025-08-19 09:14:30 +01:00
Nick Clifton	b2a44377f7	Rebase to commit 570f4c0c119.	2025-08-18 10:30:49 +01:00
Nick Clifton	a4377df024	Oops - the gold linker was disabled too soon, re-enabling.	2025-08-15 12:11:27 +01:00
Nick Clifton	049dc08ca1	Disable building the gold linker by default.	2025-08-13 15:35:13 +01:00
Nick Clifton	3c2b6fab82	Rebase to official GNU Binutils 2.45 release	2025-07-28 09:41:02 +01:00
Nick Clifton	cf3468eb37	Properly handle LLVM IR bitcodes. (#2382341 ) (PR 33198)	2025-07-25 11:14:48 +01:00
Fedora Release Engineering	2b97979d33	Rebuilt for https://fedoraproject.org/wiki/Fedora_43_Mass_Rebuild	2025-07-23 17:42:25 +00:00
Nick Clifton	b52b1c824b	Improve strip's handling of archives containing bitcodes. (#2382341 )	2025-07-22 15:06:57 +01:00
Miloš Prchlík	77d3ccc230	tests: switch to CentOS Stream test repository	2025-07-21 10:35:25 +02:00
Nick Clifton	001f1473de	Rebase to pre-release source tarball for the upcoming 2.45 release	2025-07-14 11:15:17 +01:00
Nick Clifton	b84449875a	Rebase to 21e608528c3	2025-07-07 10:44:51 +01:00
Nick Clifton	791874dbf7	Rebase to -28b75d9dcb8	2025-06-23 10:38:26 +01:00
Nick Clifton	5c8f89372f	Rebase to commit a259da93f3c	2025-06-09 12:00:40 +01:00
Nick Clifton	c1e2857084	Rebase to commit d13aaae402f	2025-05-27 14:00:56 +01:00
Nick Clifton	0f77e6a6c6	Rebase to commit 8dc4e62fc94	2025-05-12 09:58:17 +01:00
Nick Clifton	6152e0d05c	Rebase to commit 6ef74a3985b	2025-04-14 11:26:57 +01:00
Andrea Bolognani	88532ad57e	Fix BuildRequires on bison bison is only brought in for gold architectures or when building gprofng right now, but non-gold architectures need it too if the source file for the parser happens to have been touched. Make the dependency unconditional to ensure that the package can always be built. While at it, clean up a few related things. A BuildRequires on gcc-c++ already exists a few lines below for the non-clang case, and obviously we don't need it when building with clang. m4 is not used directly by us, but rather by bison. Luckily the bison package correctly depends on m4, so we don't need to bring it in ourselves. Signed-off-by: Andrea Bolognani <abologna@redhat.com>	2025-04-10 11:27:43 +02:00
Andrea Bolognani	dbb6a2b533	Update comment for enable_separate_code riscv64 was added to the list of architectures for which separate code and data segments are enabled in `53dfb5f3d9` but the comment did not get updated accordingly. Signed-off-by: Andrea Bolognani <abologna@redhat.com>	2025-04-10 11:16:50 +02:00
Nick Clifton	01507c9252	Do not include -std=gnu11 in CXXFLAGS	2025-04-09 12:38:48 +01:00
Nick Clifton	8748d12378	Deprecate the gold linker.	2025-04-02 11:07:46 +01:00
Nick Clifton	fa3058d5fc	update sources	2025-03-31 12:26:04 +01:00
Nick Clifton	7888285b10	Rebase to commit 7109ea04ac7	2025-03-31 12:23:09 +01:00
Nick Clifton	eaff7615a3	Rebase to commit a07c8b3a73c	2025-03-17 11:15:10 +00:00
Nick Clifton	c6ac23d8f1	Rebase to commit 56a0188548e	2025-03-03 11:06:29 +00:00
Nick Clifton	a9bd5526fa	Renumber patches. Add -std=gnu11 to CFLAGS	2025-02-26 15:24:28 +00:00
Nick Clifton	384e850d5a	add new sources	2025-02-18 09:48:00 +00:00
Nick Clifton	115547ce07	Rebase to commit 1256b9860f3	2025-02-18 09:45:37 +00:00
Nick Clifton	84cee8e828	Fix seg fault in AArch64 linker when building u-boot. (#2326190 )	2025-02-07 14:37:49 +00:00
Nick Clifton	7f4b0bfa04	Fix s390x XPASS linker testsuite failures	2025-02-07 12:37:47 +00:00
Siddhesh Poyarekar	6be32c794e	Disable gcs-report-dynamic warnings The gcs-report-dynamic warnings have been failing builds in Fedora so default to disabled for now.	2025-02-06 12:08:28 -05:00
Nick Clifton	87ee448377	Rebase to official 2.44 release	2025-02-03 12:16:30 +00:00
Nick Clifton	53dfb5f3d9	Enable separate code by default for the RISC-V architecture	2025-01-27 17:08:58 +00:00
Nick Clifton	9c83775c81	Rebased to 2.43.90 pre-release tarball.	2025-01-20 11:09:04 +00:00
Fedora Release Engineering	c4f15b9679	Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild	2025-01-16 12:31:05 +00:00
Nick Clifton	6cb8c76a06	Rebase to commit f832531609d	2025-01-06 11:11:23 +00:00
Nick Clifton	875ad5b267	Rebase to commit 3d75969bd0e	2024-12-09 10:04:33 +00:00
Nick Clifton	00b3ac3d67	Rebase to commit 1686dc7079f	2024-11-26 16:58:28 +00:00
Nick Clifton	3f77f370f1	Spec File: Move all gprofng files into the binutils-gprofng sub-package. Resolves: 2326286	2024-11-15 17:03:53 +00:00
Nick Clifton	4fe99c972e	Rebase to commit 55e32b3c682 Revert commit 4f576180 which moves the .note.build-id section back to the start of the file. (PR 2321588)	2024-11-05 10:12:21 +00:00
Nick Clifton	5d93718856	Revert commit 4f576180 which moves the .note.build-id section back to the start of the file. Workaround for PR 2321588	2024-11-01 16:14:28 +00:00
Nick Clifton	6811ff96a8	Spec File: Do not install gprofng documentation when using --without docs	2024-10-31 12:56:34 +00:00
Miro Hrončok	3e7c1aeff4	Fixup the %files list for --without docs RPM build errors: ... Directory not found: /builddir/build/BUILD/binutils-2.43.50-build/BUILDROOT/usr/share/doc/gprofng File not found: /builddir/build/BUILD/binutils-2.43.50-build/BUILDROOT/usr/share/doc/gprofng/examples.tar.gz	2024-10-30 13:58:22 +01:00
Richard W.M. Jones	50a2d13658	Rebuild for Jansson 2.14 (https://lists.fedoraproject.org/archives/list/devel@lists.fedoraproject.org/thread/3PYINSQGKQ4BB25NQUI2A2UCGGLAG5ND/)	2024-10-22 13:38:35 +01:00
Nick Clifton	cc723c198d	Rebase to commit 22c62092858.	2024-10-14 13:19:59 +01:00
Nick Clifton	6936dfba5d	Rebase to commit 22c62092858.	2024-10-14 13:16:39 +01:00
Nick Clifton	a8edbcb255	Fix RISC-V ld testsuite failures	2024-10-04 11:36:32 +01:00
Nick Clifton	a9dd5ddc2c	Rebase to commit 1f4aee70ed1. Configure the linker to support xxhash by default.	2024-09-30 11:36:12 +01:00
Nick Clifton	8e380e50cb	Rebase to commit c839a44c391	2024-09-10 16:14:42 +01:00
Nick Clifton	c0b354c6e6	Disable the default enablement of the linker's "-z separate-code" feature for non-x86 architectures.	2024-09-10 08:53:38 +01:00
Nick Clifton	83a75f8fd1	Rebase to 2.43.1 release.	2024-08-18 08:02:59 +01:00
Nick Clifton	fddf5b0c9a	Use correct fix for BZ 2301454.	2024-08-05 15:36:12 +01:00
Nick Clifton	9242ef0c66	Rebase to 2.43 release.	2024-08-05 11:10:18 +01:00
Nick Clifton	9ec20adf80	Revert commit eb7892c4019bd5d00175c0eb80eb0c5a47a42ca1 which was supposed to fix PR 31956 but also introduced new build failures. (2301454).	2024-07-31 19:01:13 +01:00
Nick Clifton	b534deccce	Remove spurious text in comment	2024-07-25 12:13:50 +01:00
Konrad Kleine	17373e3782	typo: commit it -> commit ID	2024-07-25 09:47:03 +02:00
Nick Clifton	ce64e3b14f	Rebase to 2.43 pre-release sources. Retire: binutils-update-linker-manual.patch	2024-07-22 12:40:29 +01:00
Fedora Release Engineering	daff9b01dd	Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild	2024-07-17 18:18:26 +00:00
Nick Clifton	c697a444a9	Rebase to commit 49cc32b732a. Retire: binutils-special-sections-in-groups.patch	2024-07-08 13:52:28 +01:00
Nick Clifton	36cbd09894	Rebase to commit 18b13d11d37	2024-06-24 14:48:31 +01:00
Nick Clifton	6043ce66a1	Fix building with documentation disabled.	2024-06-24 13:13:55 +01:00
Nick Clifton	27b8ab3195	Rebase to commit 6b19a26ee12. (Which brings in --rosegment support).	2024-06-14 16:27:10 +01:00
Nick Clifton	45b6743b78	Rebase to commit d1c2dd6f4de	2024-06-10 12:19:37 +01:00
Nick Clifton	c0e2cc5ed5	Rebase to commit cc80485f45c. (Which brings in RELR support for the AArch64).	2024-05-31 16:53:32 +01:00
Nick Clifton	2175d42ba1	Rebase to commit 73061b1e53a	2024-05-28 13:26:27 +01:00
Nick Clifton	42d71d98c8	Rebase to commit 83b972fc272db31ab48aa5cde84f47c98868d7c8	2024-05-13 11:40:41 +01:00
Nick Clifton	f78741193c	Spec File: Stop %%verify(mtime) for ld.bfd. (#2277349 )	2024-04-29 13:05:11 +01:00
Nick Clifton	5d27552da0	Rebase to commit 679ad6e126868c462d8339eb837efb5a91a091af	2024-04-29 11:24:33 +01:00
Nick Clifton	92824e7d56	Rebase to commit a73073dc7f23ab37ae33402fbb38c8314bcbea3e	2024-04-15 11:52:29 +01:00
Nick Clifton	221d87cb73	Rebase to commit 121a3f4b4f4aac216abe239f6f3bd491b63e5e34	2024-04-02 18:05:11 +01:00
Nick Clifton	a363b071f4	Rebase to commit 6549a232d25585800752007f699fb7db9fe70883	2024-03-18 14:17:11 +00:00
Nick Clifton	928e5ff57a	Rebase to commit 1485a3fb63619cced99dd7a4a043cf01a0f423d9	2024-03-04 14:49:46 +00:00
Nick Clifton	b769a968b8	Spec File: Change the NVR to reflect the fact that these binutils are based upon development sources, rather than release sources.	2024-02-23 07:38:45 +00:00
Nick Clifton	27dc20eed1	NVR bump in order to allow a rebuild	2024-02-21 15:45:53 +00:00
Nick Clifton	d488a923af	Fix SOURCE2 reference	2024-02-21 15:38:39 +00:00
Nick Clifton	668448a4d3	Rebase to commit 1b2c120daf9e2d935453f9051bbeafbac7f9f14d -	2024-02-21 14:25:20 +00:00
Nick Clifton	869fd132e6	Restore sources	2024-02-14 13:15:35 +00:00
Nick Clifton	7db94aa6ea	- Add support for PowerPC v11 architecture extensions. Rebase to GNU Binutils 2.42. - Retire: binutils-BPF-reloc-4.patch - Retire: binutils-Intel-APX-part-1.patch - Retire: binutils-aarch64-big-bti-programs.patch - Retire: binutils-big-merge.patch - Retire: binutils-demangler-updates.patch - Retire: binutils-execstack-error.patch - Retire: binutils-gold-powerpc.patch - Retire: binutils-handle-corrupt-version-info.patch - Retire: binutils-ppc-dt_relr-relocs.patch - Retire: binutils-riscv-SUB_ULEB128.patch - Retire: binutils-x86-64-v3.patch - Retire: i686-AVX10.1-part-1.patch - Retire: i686-AVX10.1-part-2.patch - Retire: i686-AVX10.1-part-3.patch - Retire: i686-AVX10.1-part-4.patch - Retire: i686-AVX10.1-part-5.patch - Retire: i686-AVX10.1-part-6.patch	2024-02-14 13:13:16 +00:00