From 6de40c8607177020fa028d6cfec8f0a2a9a72a4e Mon Sep 17 00:00:00 2001 From: Stan Cox Date: Sun, 17 Nov 2019 18:17:12 -0500 Subject: [PATCH 1/2] Fix rhbz963475 dyninst must be ported to aarch64 --- dyninst-10.1.0-aarch-regs.patch | 309 ++++++++++++++++++++++++++++++++ dyninst.spec | 7 +- 2 files changed, 315 insertions(+), 1 deletion(-) create mode 100644 dyninst-10.1.0-aarch-regs.patch diff --git a/dyninst-10.1.0-aarch-regs.patch b/dyninst-10.1.0-aarch-regs.patch new file mode 100644 index 0000000..814137c --- /dev/null +++ b/dyninst-10.1.0-aarch-regs.patch @@ -0,0 +1,309 @@ +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/BPatch_addressSpace.C.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/BPatch_addressSpace.C 2019-11-06 10:20:08.567523510 -0500 +--- BPatch_addressSpace.C.orig 2019-05-16 14:40:05.000000000 -0400 ++++ BPatch_addressSpace.C 2019-11-15 18:10:31.186122654 -0500 +@@ -1050,5 +1050,2 @@ + return true; +- +- regs = registers_; +- return true; + } +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/emit-aarch64.C.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/emit-aarch64.C 2019-11-06 10:20:08.567523510 -0500 +@@ -276,9 +276,2 @@ + +- if (register_num == REG_SP) { +- insnCodeGen::generateAddSubImmediate(gen, insnCodeGen::Add, 0, +- TRAMP_FRAME_SIZE_64, destination, REG_SP, true); +- +- return; +- } +- + if (src->spilledState == registerSlot::unspilled) +@@ -293,3 +286,3 @@ + // its on the stack so load it. +- insnCodeGen::restoreRegister(gen, destination, offset + (register_num * gen.width()), ++ insnCodeGen::restoreRegister(gen, destination, offset + (src->encoding() * gen.width()), + insnCodeGen::Offset); +@@ -298 +291,7 @@ + ++bool EmitterAARCH64::emitMoveRegToReg(Register src, Register dest, codeGen &gen) ++{ ++ insnCodeGen::generateMove(gen, dest, src); ++ return true; ++} ++ +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/emit-aarch64.h.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/emit-aarch64.h 2019-11-06 10:20:08.567523510 -0500 +@@ -107,6 +107,3 @@ + +- virtual bool emitMoveRegToReg(Register, Register, codeGen &) { +- assert(0); +- return 0; +- } ++ virtual bool emitMoveRegToReg(Register, Register, codeGen &); + +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/inst-aarch64.C.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/inst-aarch64.C 2019-11-06 10:20:08.567523510 -0500 +@@ -108,2 +108,4 @@ + registers.push_back(new registerSlot(r30, "r30", true, registerSlot::liveAlways, registerSlot::GPR)); ++ // SP is r31, but also could be considered special. But now it's being added as GPR ++ registers.push_back(new registerSlot(sp, "r31", true, registerSlot::liveAlways, registerSlot::GPR)); + +@@ -111,3 +113,3 @@ + registers.push_back(new registerSlot(lr, "lr", true, registerSlot::liveAlways, registerSlot::SPR)); +- registers.push_back(new registerSlot(sp, "sp", true, registerSlot::liveAlways, registerSlot::SPR)); ++ //registers.push_back(new registerSlot(sp, "sp", true, registerSlot::liveAlways, registerSlot::SPR)); + registers.push_back(new registerSlot(pstate, "nzcv", true, registerSlot::liveAlways, registerSlot::SPR)); +@@ -183,9 +185,16 @@ + registerSlot *reg = theRegSpace->GPRs()[idx]; +- // We always save FP and LR for stack walking out of instrumentation +- if (reg->liveState == registerSlot::live || reg->number == REG_FP || reg->number == REG_LR) { ++ // We always save FP and LR for stack walking out of instrumentation ++ //if (reg->liveState == registerSlot::live || reg->number == REG_FP || reg->number == REG_LR) { + int offset_from_sp = offset + (reg->encoding() * gen.width()); +- insnCodeGen::saveRegister(gen, reg->number, offset_from_sp); ++ if(reg->number != registerSpace::sp) ++ insnCodeGen::saveRegister(gen, reg->number, offset_from_sp); ++ else{ ++ // mov SP to x0 ++ insnCodeGen::generateAddSubImmediate(gen, insnCodeGen::Add, 0, ++ TRAMP_FRAME_SIZE_64, REG_SP, 0, true); ++ insnCodeGen::saveRegister(gen, 0, offset_from_sp); ++ } + theRegSpace->markSavedRegister(reg->number, offset_from_sp); + ret++; +- } ++ //} + } +@@ -283,2 +292,4 @@ + if(reg->liveState == registerSlot::spilled) { ++ if(reg->number == registerSpace::sp) ++ continue; + //#sasha this should be GPRSIZE_64 and not gen.width +@@ -602,4 +613,2 @@ + { +- //#sasha This function implementation is experimental. +- + if (op != callOp) { +@@ -623,4 +632,2 @@ + vector savedRegs; +- +- // save r0-r7 + for(size_t id = 0; id < gen.rs()->numGPRs(); id++) +@@ -653,2 +660,6 @@ + assert(reg!=REG_NULL); ++ ++ // mark reg offLimits so getScratchRegister won't use it ++ registerSlot *regS = gen.rs()->GPRs()[id]; ++ regS->offLimits = true; + } +@@ -691,3 +702,2 @@ + +- // r7-r0 + for (signed int ui = savedRegs.size()-1; ui >= 0; ui--) { +@@ -697,2 +707,9 @@ + ++ // Making operand's reg not offLimits again ++ for(size_t id = 0; id < operands.size(); id++) ++ { ++ registerSlot *reg = gen.rs()->GPRs()[id]; ++ reg->offLimits = false; ++ } ++ + return 0; +@@ -1426,4 +1443,53 @@ + bool EmitterAARCH64Stat::emitPLTCall(func_instance *callee, codeGen &gen) { +- assert(0); //Not implemented +- return emitPLTCommon(callee, true, gen); ++ /* ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ //Register scr = gen.rs()->getScratchRegister(gen); ++ //Register lr = gen.rs()->getScratchRegister(gen); ++ //Address pc = emitMovePCToReg(scr, gen); ++ ++ Address varOffset = dest - gen.currAddr(); ++ //printf("VarOffset = %d\n", varOffset); ++ //emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ ++ insnCodeGen::generateBranch(gen, gen.currAddr(), dest, true); ++ ++ return true; ++ */ ++ ++ ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ Register scr = gen.rs()->getScratchRegister(gen); ++ Register lr = gen.rs()->getScratchRegister(gen); ++ //Register scr = gen.rs()->getRegByName("r2"); ++ //Register lr = gen.rs()->getRegByName("r3"); ++ emitMovePCToReg(scr, gen); ++ ++ Address varOffset = dest - gen.currAddr() + 4; ++ //printf("VarOffset = %d\n", varOffset); ++ emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ insnCodeGen::generateMemAccess(gen, insnCodeGen::Load, lr, lr, 0, 8, insnCodeGen::Offset); ++ ++ // indirect branch ++ instruction branchInsn; ++ branchInsn.clear(); ++ ++ //Set bits which are 0 for both BR and BLR ++ INSN_SET(branchInsn, 0, 4, 0); ++ INSN_SET(branchInsn, 10, 15, 0); ++ ++ //Set register ++ INSN_SET(branchInsn, 5, 9, lr); ++ ++ //Set other bits. Basically, these are the opcode bits. ++ //The only difference between BR and BLR is that bit 21 is 1 for BLR. ++ INSN_SET(branchInsn, 16, 31, BRegOp); ++ INSN_SET(branchInsn, 21, 21, 1); ++ insnCodeGen::generate(gen, branchInsn); ++ //insnCodeGen::generateBranch(gen, gen.currAddr(), lr, true); ++ //insnCodeGen::generateBranch(gen, gen.currAddr(), gen.currAddr() +varOffset, true); ++ ++ return true; ++ ++ //assert(0); //Not implemented ++ //return emitPLTCommon(callee, true, gen); + } +@@ -1431,4 +1497,81 @@ + bool EmitterAARCH64Stat::emitPLTJump(func_instance *callee, codeGen &gen) { +- assert(0); //Not implemented +- return emitPLTCommon(callee, false, gen); ++ /* ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ //Register scr = gen.rs()->getScratchRegister(gen); ++ //Register lr = gen.rs()->getScratchRegister(gen); ++ Register scr = gen.rs()->getRegByName("r2"); ++ Register lr = gen.rs()->getRegByName("r3"); ++ //Address pc = emitMovePCToReg(scr, gen); ++ ++ Address varOffset = dest - gen.currAddr(); ++ //printf("VarOffset = %d\n", varOffset); ++ emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ insnCodeGen::generateMemAccess(gen, insnCodeGen::Load, lr, lr, 0, 8, insnCodeGen::Offset); ++ ++ insnCodeGen::generateBranch(gen, gen.currAddr(), lr, false); ++ ++ return true; ++ */ ++ ++ /* ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ Register scr = gen.rs()->getScratchRegister(gen); ++ Register lr = gen.rs()->getScratchRegister(gen); ++ Address pc = emitMovePCToReg(scr, gen); ++ ++ Address varOffset = dest - pc; ++ printf("VarOffset = %d\n", varOffset); ++ emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ ++ insnCodeGen::generateBranch(gen, gen.currAddr(), lr, false); ++ return true; ++ */ ++ ++ /* ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ Register scr = gen.rs()->getScratchRegister(gen); ++ Register lr = gen.rs()->getScratchRegister(gen); ++ Address varOffset = dest - gen.currAddr(); ++ emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ insnCodeGen::generateBranch(gen, gen.currAddr(), gen.currAddr() +varOffset, false); ++ ++ return true; ++ */ ++ ++ ++ Address dest = getInterModuleFuncAddr(callee, gen); ++ Register scr = gen.rs()->getScratchRegister(gen); ++ Register lr = gen.rs()->getScratchRegister(gen); ++ //Register scr = gen.rs()->getRegByName("r2"); ++ //Register lr = gen.rs()->getRegByName("r3"); ++ emitMovePCToReg(scr, gen); ++ ++ Address varOffset = dest - gen.currAddr() + 4; ++ //printf("VarOffset = %d\n", varOffset); ++ emitLoadRelative(lr, varOffset, scr, gen.width(), gen); ++ insnCodeGen::generateMemAccess(gen, insnCodeGen::Load, lr, lr, 0, 8, insnCodeGen::Offset); ++ ++ // indirect branch ++ instruction branchInsn; ++ branchInsn.clear(); ++ ++ //Set bits which are 0 for both BR and BLR ++ INSN_SET(branchInsn, 0, 4, 0); ++ INSN_SET(branchInsn, 10, 15, 0); ++ ++ //Set register ++ INSN_SET(branchInsn, 5, 9, lr); ++ ++ //Set other bits. Basically, these are the opcode bits. ++ //The only difference between BR and BLR is that bit 21 is 1 for BLR. ++ INSN_SET(branchInsn, 16, 31, BRegOp); ++ INSN_SET(branchInsn, 21, 21, 0); ++ insnCodeGen::generate(gen, branchInsn); ++ //insnCodeGen::generateBranch(gen, gen.currAddr(), lr, true); ++ //insnCodeGen::generateBranch(gen, gen.currAddr(), gen.currAddr() +varOffset, true); ++ ++ return true; ++ ++ //assert(0); //Not implemented ++ //return emitPLTCommon(callee, false, gen); + } +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/inst-aarch64.h.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/inst-aarch64.h 2019-11-06 10:20:08.567523510 -0500 +@@ -74,3 +74,3 @@ + //TODO Fix for ARM +-#define GPRSAVE_64 (31*GPRSIZE_64) ++#define GPRSAVE_64 (32*GPRSIZE_64) + #define FPRSAVE_64 (32*FPRSIZE_64) +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/registerSpace.C.orig 2019-05-16 14:40:05.000000000 -0400 ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/registerSpace.C 2019-11-06 10:20:08.567523510 -0500 +@@ -110,2 +110,4 @@ + #elif defined(arch_aarch64) ++ if(number == registerSpace::sp) ++ return REG_SP; + switch (type) { +@@ -342,3 +344,3 @@ + +- reg->markUsed(true); ++ //reg->markUsed(true); + gen.markRegDefined(reg->number); + +--- dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/dynProcess.C.orig ++++ dyninst-10.1.0/dyninst-10.1.0/dyninstAPI/src/dynProcess.C +@@ -3243,25 +3243,13 @@ bool PCProcess::continueSyncRPCThreads() { + } + + void PCProcess::addTrap(Address from, Address to, codeGen &gen) { +- map::iterator breakIter = +- installedCtrlBrkpts.find(from); +- +- if( breakIter != installedCtrlBrkpts.end() ) { +- if( !pcProc_->rmBreakpoint(from, breakIter->second) ) { +- // Oops? +- } +- installedCtrlBrkpts.erase(breakIter); +- } +- +- Breakpoint::ptr newBreak = Breakpoint::newTransferBreakpoint(to); +- newBreak->setSuppressCallbacks(true); +- +- if( !pcProc_->addBreakpoint(from, newBreak) ) { +- // Oops? +- } +- +- installedCtrlBrkpts.insert(make_pair(from, newBreak)); +- gen.invalidate(); ++ gen.invalidate(); ++ gen.allocate(4); ++ gen.setAddrSpace(this); ++ gen.setAddr(from); ++ insnCodeGen::generateTrap(gen); ++ trapMapping.addTrapMapping(from, to, true); ++ springboard_cerr << "Generated springboard trap " << hex << from << "->" << to << dec << endl; + } + + void PCProcess::removeTrap(Address from) { diff --git a/dyninst.spec b/dyninst.spec index 49a317f..6a225ab 100644 --- a/dyninst.spec +++ b/dyninst.spec @@ -1,7 +1,7 @@ Summary: An API for Run-time Code Generation License: LGPLv2+ Name: dyninst -Release: 3%{?dist} +Release: 4%{?dist} URL: http://www.dyninst.org Version: 10.1.0 ExclusiveArch: %{ix86} x86_64 ppc64le aarch64 @@ -12,6 +12,7 @@ Source1: https://github.com/dyninst/testsuite/archive/v%{version}/testsuite-%{ve Patch1: dyninst-10.1.0-result.patch Patch2: testsuite-10.1.0-gettid.patch Patch3: testsuite-10.1.0-386.patch +Patch4: dyninst-10.1.0-aarch-regs.patch %global dyninst_base dyninst-%{version} %global testsuite_base testsuite-%{version} @@ -85,6 +86,7 @@ making sure that dyninst works properly. %patch1 -p1 -b.result %patch2 -p1 -b.gettid %patch3 -p1 -b.386 +%patch4 -p1 -b.aarch # cotire seems to cause non-deterministic gcc errors # https://bugzilla.redhat.com/show_bug.cgi?id=1420551 @@ -187,6 +189,9 @@ echo "%{_libdir}/dyninst" > %{buildroot}/etc/ld.so.conf.d/%{name}-%{_arch}.conf %attr(644,root,root) %{_libdir}/dyninst/testsuite/*.a %changelog +* Fri Nov 15 2019 Stan Cox - 10.1.0-4 +- Fix rhbz963475 dyninst must be ported to aarch64 + * Wed Jul 24 2019 Fedora Release Engineering - 10.1.0-3 - Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild From 4527d463a23c654f9982511db3d6d9606aa5ce37 Mon Sep 17 00:00:00 2001 From: "Frank Ch. Eigler" Date: Mon, 18 Nov 2019 18:28:07 -0500 Subject: [PATCH 2/2] drop older dyninst 9.3 / 10.0 patches --- dyninst-10.0.0-doc.patch | 12 ---- dyninst-10.0.0-examples.patch | 42 ----------- dyninst-10.0.0-result.patch | 28 -------- dyninst-10.0.0-tribool.patch | 35 --------- dyninst-9.3.1-Address.patch | 108 ---------------------------- dyninst-9.3.2-gcc8.patch | 14 ---- dyninst-9.3.2-glibc-rpc.patch | 23 ------ testsuite-9.3.0-junit-nullptr.patch | 11 --- 8 files changed, 273 deletions(-) delete mode 100644 dyninst-10.0.0-doc.patch delete mode 100644 dyninst-10.0.0-examples.patch delete mode 100644 dyninst-10.0.0-result.patch delete mode 100644 dyninst-10.0.0-tribool.patch delete mode 100644 dyninst-9.3.1-Address.patch delete mode 100644 dyninst-9.3.2-gcc8.patch delete mode 100644 dyninst-9.3.2-glibc-rpc.patch delete mode 100644 testsuite-9.3.0-junit-nullptr.patch diff --git a/dyninst-10.0.0-doc.patch b/dyninst-10.0.0-doc.patch deleted file mode 100644 index 74ff705..0000000 --- a/dyninst-10.0.0-doc.patch +++ /dev/null @@ -1,12 +0,0 @@ - ---- ./dyninst-10.0.0/CMakeLists.txt.sv 2018-11-09 11:48:08.000000000 -0500 -+++ ./dyninst-10.0.0/CMakeLists.txt 2018-11-13 11:35:20.109650373 -0500 -@@ -149,7 +149,7 @@ if(BUILD_DOCS) - foreach(COMPONENT ${WORD_DOCS}) - add_dependencies(doc ${COMPONENT}-doc) - set_target_properties(${COMPONENT}-doc PROPERTIES EXCLUDE_FROM_DEFAULT_BUILD 1) -- install(FILES ${CMAKE_SOURCE_DIR}/${COMPONENT}/doc/${COMPONENT}.pdf -+ install(FILES ${CMAKE_CURRENT_BINARY_DIR}/${COMPONENT}/doc/${COMPONENT}.pdf - DESTINATION ${INSTALL_DOC_DIR} - RENAME ${COMPONENT}-${VERSION_STRING}.pdf - OPTIONAL diff --git a/dyninst-10.0.0-examples.patch b/dyninst-10.0.0-examples.patch deleted file mode 100644 index aee1d74..0000000 --- a/dyninst-10.0.0-examples.patch +++ /dev/null @@ -1,42 +0,0 @@ -# workaround for https://github.com/dyninst/dyninst/issues/396 - ---- ./dyninst-10.0.0/examples/CMakeLists.txt.sv 2018-11-09 11:48:08.000000000 -0500 -+++ ./dyninst-10.0.0/examples/CMakeLists.txt 2018-11-13 11:35:20.109650373 -0500 -@@ -1,19 +1,19 @@ - - --add_executable(unstrip unstrip/unstrip.C -- unstrip/util.C -- unstrip/types.C -- unstrip/semanticDescriptor.C -- unstrip/database.C -- unstrip/fingerprint.C -- unstrip/callback.C) -+add_executable(unstrip unstrip.dir/unstrip.C -+ unstrip.dir/util.C -+ unstrip.dir/types.C -+ unstrip.dir/semanticDescriptor.C -+ unstrip.dir/database.C -+ unstrip.dir/fingerprint.C -+ unstrip.dir/callback.C) - add_dependencies(unstrip parseAPI symtabAPI instructionAPI common) - target_link_libraries(unstrip parseAPI symtabAPI instructionAPI common dynDwarf dynElf ${Boost_LIBRARIES}) - --add_executable(codeCoverage codeCoverage/codeCoverage.C) -+add_executable(codeCoverage codeCoverage.dir/codeCoverage.C) - add_dependencies(codeCoverage dyninstAPI patchAPI parseAPI symtabAPI instructionAPI pcontrol common stackwalk dynDwarf dynElf) - target_link_libraries(codeCoverage dyninstAPI patchAPI parseAPI symtabAPI instructionAPI pcontrol common stackwalk dynDwarf dynElf ${Boost_LIBRARIES}) - --add_library(Inst SHARED codeCoverage/libInst.C) -+add_library(Inst SHARED codeCoverage.dir/libInst.C) - - add_executable(cfg_to_dot ../parseAPI/doc/example.cc) -@@ -29,5 +29,5 @@ - ) - --install ( -- FILES unstrip/ddb.db unstrip/params.db unstrip/unistd.db DESTINATION ${INSTALL_BIN_DIR} --) -+# install ( -+# FILES unstrip.dir/ddb.db unstrip.dir/params.db unstrip.dir/unistd.db DESTINATION ${INSTALL_BIN_DIR} -+# ) diff --git a/dyninst-10.0.0-result.patch b/dyninst-10.0.0-result.patch deleted file mode 100644 index 89d6e70..0000000 --- a/dyninst-10.0.0-result.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- ./dyninst-10.0.0/instructionAPI/h/Result.h.sv 2018-11-09 11:48:08.000000000 -0500 -+++ ./dyninst-10.0.0/instructionAPI/h/Result.h 2018-12-04 22:12:47.369579566 -0500 -@@ -449,10 +449,10 @@ - snprintf(hex, 20, "%x", val.s32val); - break; - case u64: -- snprintf(hex, 20, "%lx", val.u64val); -+ snprintf(hex, 20, "%" PRIx64, val.u64val); - break; - case s64: -- snprintf(hex, 20, "%lx", val.s64val); -+ snprintf(hex, 20, "%" PRIx64, val.s64val); - break; - case sp_float: - snprintf(hex, 20, "%f", val.floatval); -@@ -464,10 +464,10 @@ - snprintf(hex, 20, "%x", val.bitval); - break; - case u48: -- snprintf(hex, 20, "%lx", val.s48val); -+ snprintf(hex, 20, "%" PRIx64, val.s48val); - break; - case s48: -- snprintf(hex, 20, "%lx", val.s48val); -+ snprintf(hex, 20, "%" PRIx64, val.s48val); - break; - case m512: - snprintf(hex, 20, "%p", val.m512val); diff --git a/dyninst-10.0.0-tribool.patch b/dyninst-10.0.0-tribool.patch deleted file mode 100644 index 0caec2f..0000000 --- a/dyninst-10.0.0-tribool.patch +++ /dev/null @@ -1,35 +0,0 @@ -commit 54a2debd94c3e8df3b6f1e579f1db02dae61cbb7 -Author: Mark W. Krentel -Date: Fri Feb 1 13:14:11 2019 -0600 - - Add some explicit casts from boost::tribool to bool for some code in (#541) - - Add some explicit casts from boost::tribool to bool for some code in dataflowAPI/rose/util/Message.[Ch]. This was breaking the build when using boost >= 1.69. - -diff --git a/dataflowAPI/rose/util/Message.C b/dataflowAPI/rose/util/Message.C -index a8a66ad4c..5e276f97d 100644 ---- ./dyninst-10.0.0/dataflowAPI/rose/util/Message.C -+++ ./dyninst-10.0.0/dataflowAPI/rose/util/Message.C -@@ -1123,7 +1123,7 @@ StreamBuf::bake() { - destination_->bakeDestinations(message_.properties(), baked_/*out*/); - anyUnbuffered_ = false; - for (BakedDestinations::const_iterator bi=baked_.begin(); bi!=baked_.end() && !anyUnbuffered_; ++bi) -- anyUnbuffered_ = !bi->second.isBuffered; -+ anyUnbuffered_ = static_cast(!bi->second.isBuffered); - isBaked_ = true; - } - } -diff --git a/dataflowAPI/rose/util/Message.h b/dataflowAPI/rose/util/Message.h -index 816f68d2e..03592cb97 100644 ---- ./dyninst-10.0.0/dataflowAPI/rose/util/Message.h -+++ ./dyninst-10.0.0/dataflowAPI/rose/util/Message.h -@@ -386,7 +386,8 @@ struct SAWYER_EXPORT ColorSpec { - ColorSpec(AnsiColor fg, AnsiColor bg, bool bold): foreground(fg), background(bg), bold(bold) {} - - /** Returns true if this object is in its default-constructed state. */ -- bool isDefault() const { return COLOR_DEFAULT==foreground && COLOR_DEFAULT==background && !bold; } -+ bool isDefault() const { return COLOR_DEFAULT==foreground && COLOR_DEFAULT==background -+ && static_cast(!bold); } - }; - - /** Colors to use for each message importance. diff --git a/dyninst-9.3.1-Address.patch b/dyninst-9.3.1-Address.patch deleted file mode 100644 index 213cc4a..0000000 --- a/dyninst-9.3.1-Address.patch +++ /dev/null @@ -1,108 +0,0 @@ ---- dyninst-9.3.1/common/src/Types.h.sv 2017-03-07 22:05:52.187479600 -0500 -+++ dyninst-9.3.1/common/src/Types.h 2017-03-07 22:06:57.509944790 -0500 -@@ -170,7 +170,7 @@ - static const Address ADDR_NULL = (Address)(0); - #else - #define ADDR_NULL (0) --typedef uintptr_t Address; -+typedef unsigned long Address; - #endif - /* Note the inherent assumption that the size of a "long" integer matches - that of an address (void*) on every supported Paradyn/Dyninst system! - - ---- dyninst-9.3.1/common/h/dyntypes.h.sv 2017-03-08 10:16:18.657768231 -0500 -+++ dyninst-9.3.1/common/h/dyntypes.h 2017-03-08 10:37:07.992634513 -0500 -@@ -124,8 +124,8 @@ - - namespace Dyninst - { -- typedef uintptr_t Address; -- typedef uintptr_t Offset; -+ typedef unsigned long Address; -+ typedef unsigned long Offset; - - #if defined(_MSC_VER) - typedef int PID; - - ---- dyninst-9.3.1/dyninstAPI/src/BPatch_memoryAccess.C.sv 2017-03-07 23:07:29.371789000 -0500 -+++ dyninst-9.3.1/dyninstAPI/src/BPatch_memoryAccess.C 2017-03-07 23:07:48.928927991 -0500 -@@ -33,10 +33,10 @@ - #include - #include - -+#include "../../common/src/Types.h" - #include "BPatch_memoryAccess_NP.h" - #include "BPatch_Vector.h" - #include "BPatch_point.h" --#include "../../common/src/Types.h" - - BPatch_addrSpec_NP::BPatch_addrSpec_NP(long _imm, int _ra, int _rb, int _scale) : - imm(_imm), - - ---- dyninst-9.3.1/dyninstAPI/h/BPatch_instruction.h.sv 2017-03-08 09:06:46.638171175 -0500 -+++ dyninst-9.3.1/dyninstAPI/h/BPatch_instruction.h 2017-03-08 09:00:39.455564403 -0500 -@@ -69,7 +69,7 @@ - public: - - BPatch_instruction(internal_instruction *insn, -- uintptr_t _addr); -+ Dyninst::Address _addr); - virtual ~BPatch_instruction(); - - void getInstruction(const unsigned char *&_buffer, unsigned char &_length); - - ---- dyninst-9.3.1/dyninstAPI/h/BPatch_memoryAccess_NP.h.sv 2017-03-07 22:43:56.645745821 -0500 -+++ dyninst-9.3.1/dyninstAPI/h/BPatch_memoryAccess_NP.h 2017-03-08 10:39:30.122643332 -0500 -@@ -121,27 +121,27 @@ - static BPatch_memoryAccess* init_tables(); - - // initializes only the first access; #bytes is a constant -- BPatch_memoryAccess(internal_instruction *, uintptr_t _addr, -+ BPatch_memoryAccess(internal_instruction *, Dyninst::Address _addr, - bool _isLoad, bool _isStore, unsigned int _bytes, - long _imm, int _ra, int _rb, unsigned int _scale = 0, - int _cond = -1, bool _nt = false); - - // initializes only the first access; #bytes is an expression w/scale -- BPatch_memoryAccess(internal_instruction *insn, uintptr_t _addr, -+ BPatch_memoryAccess(internal_instruction *insn, Dyninst::Address _addr, - bool _isinternal_Load, bool _isStore, - long _imm_s, int _ra_s, int _rb_s, unsigned int _scale_s, - long _imm_c, int _ra_c, int _rb_c, unsigned int _scale_c, - int _cond, bool _nt, int _preFcn = -1); - - // initializes only the first access; #bytes is an expression -- BPatch_memoryAccess(internal_instruction *insn, uintptr_t _addr, -+ BPatch_memoryAccess(internal_instruction *insn, Dyninst::Address _addr, - bool _isLoad, bool _isStore, bool _isPrefetch, - long _imm_s, int _ra_s, int _rb_s, - long _imm_c, int _ra_c, int _rb_c, - unsigned short _preFcn); - - // initializes only the first access; #bytes is an expression & not a prefetch -- BPatch_memoryAccess(internal_instruction *insn, uintptr_t _addr, -+ BPatch_memoryAccess(internal_instruction *insn, Dyninst::Address _addr, - bool _isLoad, bool _isStore, long _imm_s, int _ra_s, int _rb_s, - long _imm_c, int _ra_c, int _rb_c); - -@@ -156,14 +156,14 @@ - int _cond, bool _nt); - - // initializes both accesses; #bytes is a constant -- BPatch_memoryAccess(internal_instruction *insn, uintptr_t _addr, -+ BPatch_memoryAccess(internal_instruction *insn, Dyninst::Address _addr, - bool _isLoad, bool _isStore, unsigned int _bytes, - long _imm, int _ra, int _rb, unsigned int _scale, - bool _isLoad2, bool _isStore2, unsigned int _bytes2, - long _imm2, int _ra2, int _rb2, unsigned int _scale2); - - // initializes both accesses; #bytes is an expression & not a prefetch -- BPatch_memoryAccess(internal_instruction *insn, uintptr_t _addr, bool _isLoad, bool _isStore, -+ BPatch_memoryAccess(internal_instruction *insn, Dyninst::Address _addr, bool _isLoad, bool _isStore, - long _imm_s, int _ra_s, int _rb_s, unsigned int _scale_s, - long _imm_c, int _ra_c, int _rb_c, unsigned int _scale_c, - bool _isLoad2, bool _isStore2, long _imm2_s, int _ra2_s, diff --git a/dyninst-9.3.2-gcc8.patch b/dyninst-9.3.2-gcc8.patch deleted file mode 100644 index faec1a1..0000000 --- a/dyninst-9.3.2-gcc8.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff -up dyninst-9.3.2/dyninst-9.3.2/symtabAPI/src/emitElf.C.me dyninst-9.3.2/dyninst-9.3.2/symtabAPI/src/emitElf.C ---- dyninst-9.3.2/dyninst-9.3.2/symtabAPI/src/emitElf.C.me 2018-02-07 15:50:36.706363500 +0100 -+++ dyninst-9.3.2/dyninst-9.3.2/symtabAPI/src/emitElf.C 2018-02-07 16:30:28.173906877 +0100 -@@ -2512,8 +2512,8 @@ void emitElf::createDynamicSec - - if (!object->hasReldyn() && !object->hasReladyn()) { - if (object->getRelType() == Region::RT_REL) { -- new_dynamic_entries.push_back(make_pair(DT_REL, 0)); -- new_dynamic_entries.push_back(make_pair(DT_RELSZ, 0)); -+ new_dynamic_entries.push_back(std::pair(DT_REL, 0)); -+ new_dynamic_entries.push_back(std::pair(DT_RELSZ, 0)); - - dynamicSecData[DT_REL].push_back(dynsecData + curpos); - dynsecData[curpos].d_tag = DT_NULL; diff --git a/dyninst-9.3.2-glibc-rpc.patch b/dyninst-9.3.2-glibc-rpc.patch deleted file mode 100644 index 1f6098e..0000000 --- a/dyninst-9.3.2-glibc-rpc.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff -up dyninst-9.3.2/dyninst-9.3.2/CMakeLists.txt.me dyninst-9.3.2/dyninst-9.3.2/CMakeLists.txt ---- dyninst-9.3.2/dyninst-9.3.2/CMakeLists.txt.me 2018-02-07 15:25:38.925763122 +0100 -+++ dyninst-9.3.2/dyninst-9.3.2/CMakeLists.txt 2018-02-07 15:30:42.242099198 +0100 -@@ -19,6 +19,7 @@ include (${DYNINST_ROOT}/cmake/shared.cm - configure_file(cmake/version.h.in common/h/version.h) - include_directories(${PROJECT_BINARY_DIR}) - include_directories(${PROJECT_BINARY_DIR}/common/h) -+include_directories("/usr/include/tirpc/") - set (HEADER_DIRS common - dataflowAPI - dyninstAPI -diff -up dyninst-9.3.2/dyninst-9.3.2/common/src/linuxHeaders.h.me dyninst-9.3.2/dyninst-9.3.2/common/src/linuxHeaders.h ---- dyninst-9.3.2/dyninst-9.3.2/common/src/linuxHeaders.h.me 2018-02-07 15:06:45.961780668 +0100 -+++ dyninst-9.3.2/dyninst-9.3.2/common/src/linuxHeaders.h 2018-02-07 15:38:56.832278338 +0100 -@@ -281,7 +281,7 @@ inline bool_t P_xdr_string(XDR *x, char - inline void P_xdrrec_create(XDR *x, const u_int send_sz, const u_int rec_sz, - const caddr_t handle, - xdr_rd_func read_r, xdr_wr_func write_f) { -- xdrrec_create(x, send_sz, rec_sz, handle, (int(*)(char*, char*, int))read_r, (int(*)(char*, char*, int))write_f);} -+ xdrrec_create(x, send_sz, rec_sz, handle, (int(*)(void*, void*, int))read_r, (int(*)(void*, void*, int))write_f);} - inline bool_t P_xdrrec_endofrecord(XDR *x, int now) { - return (xdrrec_endofrecord(x, now));} - inline bool_t P_xdrrec_skiprecord(XDR *x) { return (xdrrec_skiprecord(x));} diff --git a/testsuite-9.3.0-junit-nullptr.patch b/testsuite-9.3.0-junit-nullptr.patch deleted file mode 100644 index 6f055c3..0000000 --- a/testsuite-9.3.0-junit-nullptr.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- testsuite-9.3.0/src/JUnitOutputDriver.cpp.nullptr 2016-12-19 14:55:38.000000000 -0800 -+++ testsuite-9.3.0/src/JUnitOutputDriver.cpp 2017-02-15 11:19:22.628056889 -0800 -@@ -35,7 +35,7 @@ void JUnitOutputDriver::startNewTest(std - { - std::stringstream suitename; - suitename << last_group->modname; -- if(last_group->mutatee != '\0') suitename << "." << last_group->mutatee; -+ if(last_group->mutatee != nullptr) suitename << "." << last_group->mutatee; - log(HUMAN, "\n", - suitename.str().c_str(), group_errors, group_skips, group_tests, group_failures); - log(HUMAN, group_output.str().c_str());