From 253ab8905e4e2cb4f6926d0ac3c07b0ceef5af26 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 12 Feb 2018 01:13:37 +0000 Subject: [PATCH] Some fixes to help RPi HDMI monitor detection, fixes for AllWinner, qcom fix from 4.16 --- arm-clk-bcm2835-hdmi-fixes.patch | 175 ++++++++++++++++++ ...unxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch | 28 +++ arm-sun4i_ss_prng-fixes.patch | 80 ++++++++ arm64-qcom-fix-rmtfs.patch | 36 ++++ baseconfig/arm/CONFIG_SUN8I_DE2_CCU | 2 +- baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU | 1 - kernel-aarch64-debug.config | 2 +- kernel-aarch64.config | 2 +- kernel.spec | 16 +- 9 files changed, 337 insertions(+), 5 deletions(-) create mode 100644 arm-clk-bcm2835-hdmi-fixes.patch create mode 100644 arm-crypto-sunxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch create mode 100644 arm-sun4i_ss_prng-fixes.patch create mode 100644 arm64-qcom-fix-rmtfs.patch delete mode 100644 baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU diff --git a/arm-clk-bcm2835-hdmi-fixes.patch b/arm-clk-bcm2835-hdmi-fixes.patch new file mode 100644 index 000000000..0fc2405e5 --- /dev/null +++ b/arm-clk-bcm2835-hdmi-fixes.patch @@ -0,0 +1,175 @@ +From patchwork Thu Feb 8 13:43:35 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/4] clk: bcm2835: Fix ana->maskX definitions +From: Boris Brezillon +X-Patchwork-Id: 10207161 +Message-Id: <20180208134338.24590-1-boris.brezillon@bootlin.com> +To: Florian Fainelli , Ray Jui , + Scott Branden , + bcm-kernel-feedback-list@broadcom.com, + Stephen Warren , + Lee Jones , Eric Anholt , + linux-rpi-kernel@lists.infradead.org, + Mike Turquette , + Stephen Boyd , linux-clk@vger.kernel.org +Cc: Boris Brezillon , stable@vger.kernel.org +Date: Thu, 8 Feb 2018 14:43:35 +0100 + +ana->maskX values are already '~'-ed in bcm2835_pll_set_rate(). Remove +the '~' in the definition to fix ANA setup. + +Note that this commit fixes a long standing bug preventing one from +using an HDMI display if it's plugged after the FW has booted Linux. +This is because PLLH is used by the HDMI encoder to generate the pixel +clock. + +Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") +Cc: +Signed-off-by: Boris Brezillon +Reviewed-by: Eric Anholt +--- + drivers/clk/bcm/clk-bcm2835.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index 44301a3d9963..2108a274185a 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -449,17 +449,17 @@ struct bcm2835_pll_ana_bits { + static const struct bcm2835_pll_ana_bits bcm2835_ana_default = { + .mask0 = 0, + .set0 = 0, +- .mask1 = (u32)~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK), ++ .mask1 = A2W_PLL_KI_MASK | A2W_PLL_KP_MASK, + .set1 = (2 << A2W_PLL_KI_SHIFT) | (8 << A2W_PLL_KP_SHIFT), +- .mask3 = (u32)~A2W_PLL_KA_MASK, ++ .mask3 = A2W_PLL_KA_MASK, + .set3 = (2 << A2W_PLL_KA_SHIFT), + .fb_prediv_mask = BIT(14), + }; + + static const struct bcm2835_pll_ana_bits bcm2835_ana_pllh = { +- .mask0 = (u32)~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK), ++ .mask0 = A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK, + .set0 = (2 << A2W_PLLH_KA_SHIFT) | (2 << A2W_PLLH_KI_LOW_SHIFT), +- .mask1 = (u32)~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK), ++ .mask1 = A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK, + .set1 = (6 << A2W_PLLH_KP_SHIFT), + .mask3 = 0, + .set3 = 0, +From patchwork Thu Feb 8 13:43:36 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/4] clk: bcm2835: Protect sections updating shared registers +From: Boris Brezillon +X-Patchwork-Id: 10207155 +Message-Id: <20180208134338.24590-2-boris.brezillon@bootlin.com> +To: Florian Fainelli , Ray Jui , + Scott Branden , + bcm-kernel-feedback-list@broadcom.com, + Stephen Warren , + Lee Jones , Eric Anholt , + linux-rpi-kernel@lists.infradead.org, + Mike Turquette , + Stephen Boyd , linux-clk@vger.kernel.org +Cc: Boris Brezillon , stable@vger.kernel.org +Date: Thu, 8 Feb 2018 14:43:36 +0100 + +CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock +handlers and must be accessed with ->regs_lock held. +Update the sections where this protection is missing. + +Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") +Cc: +Signed-off-by: Boris Brezillon +Reviewed-by: Eric Anholt +--- + drivers/clk/bcm/clk-bcm2835.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index 2108a274185a..a07f6451694a 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -623,8 +623,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) + ~A2W_PLL_CTRL_PWRDN); + + /* Take the PLL out of reset. */ ++ spin_lock(&cprman->regs_lock); + cprman_write(cprman, data->cm_ctrl_reg, + cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST); ++ spin_unlock(&cprman->regs_lock); + + /* Wait for the PLL to lock. */ + timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS); +@@ -701,9 +703,11 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw, + } + + /* Unmask the reference clock from the oscillator. */ ++ spin_lock(&cprman->regs_lock); + cprman_write(cprman, A2W_XOSC_CTRL, + cprman_read(cprman, A2W_XOSC_CTRL) | + data->reference_enable_mask); ++ spin_unlock(&cprman->regs_lock); + + if (do_ana_setup_first) + bcm2835_pll_write_ana(cprman, data->ana_reg_base, ana); +From patchwork Thu Feb 8 13:43:37 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate +From: Boris Brezillon +X-Patchwork-Id: 10207157 +Message-Id: <20180208134338.24590-3-boris.brezillon@bootlin.com> +To: Florian Fainelli , Ray Jui , + Scott Branden , + bcm-kernel-feedback-list@broadcom.com, + Stephen Warren , + Lee Jones , Eric Anholt , + linux-rpi-kernel@lists.infradead.org, + Mike Turquette , + Stephen Boyd , linux-clk@vger.kernel.org +Cc: Boris Brezillon , stable@vger.kernel.org +Date: Thu, 8 Feb 2018 14:43:37 +0100 + +In order to enable a PLL, not only the PLL has to be powered up and +locked, but you also have to de-assert the reset signal. The last part +was missing. Add it so PLLs that were not enabled by the FW/bootloader +can be enabled from Linux. + +Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") +Cc: +Signed-off-by: Boris Brezillon +--- + drivers/clk/bcm/clk-bcm2835.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index a07f6451694a..6c5d4a8e426c 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw) + const struct bcm2835_pll_data *data = pll->data; + + spin_lock(&cprman->regs_lock); ++ cprman_write(cprman, data->a2w_ctrl_reg, ++ cprman_read(cprman, data->a2w_ctrl_reg) & ++ ~A2W_PLL_CTRL_PRST_DISABLE); + cprman_write(cprman, data->cm_ctrl_reg, + cprman_read(cprman, data->cm_ctrl_reg) | + CM_PLL_ANARST); +@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) + cpu_relax(); + } + ++ cprman_write(cprman, data->a2w_ctrl_reg, ++ cprman_read(cprman, data->a2w_ctrl_reg) | ++ A2W_PLL_CTRL_PRST_DISABLE); ++ + return 0; + } + diff --git a/arm-crypto-sunxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch b/arm-crypto-sunxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch new file mode 100644 index 000000000..45941edd0 --- /dev/null +++ b/arm-crypto-sunxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch @@ -0,0 +1,28 @@ +From 7a2e67bfa5316e267e782477ec880e2464fd682a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 11 Feb 2018 21:28:41 +0000 +Subject: [PATCH] crypto: sunxi-ss: Add MODULE_ALIAS to sun4i-ss + +The MODULE_ALIAS is required to enable the sun4i-ss driver to load +automatically when built at a module. Tested on a Cubietruck. + +Signed-off-by: Peter Robinson +--- + drivers/crypto/sunxi-ss/sun4i-ss-core.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c +index 1547cbe13dc2..a81d89b3b7d8 100644 +--- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c ++++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c +@@ -451,6 +451,7 @@ static struct platform_driver sun4i_ss_driver = { + + module_platform_driver(sun4i_ss_driver); + ++MODULE_ALIAS("platform:sun4i-ss"); + MODULE_DESCRIPTION("Allwinner Security System cryptographic accelerator"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Corentin LABBE "); +-- +2.14.3 + diff --git a/arm-sun4i_ss_prng-fixes.patch b/arm-sun4i_ss_prng-fixes.patch new file mode 100644 index 000000000..ed4cc0369 --- /dev/null +++ b/arm-sun4i_ss_prng-fixes.patch @@ -0,0 +1,80 @@ +From patchwork Tue Feb 6 21:20:21 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/2] sun4i_ss_prng: fix return value of sun4i_ss_prng_generate +From: Artem Savkov +X-Patchwork-Id: 10204151 +Message-Id: <20180206212022.1309-2-artem.savkov@gmail.com> +To: Corentin Labbe +Cc: linux-kernel@vger.kernel.org, Artem Savkov , + Herbert Xu , + linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org +Date: Tue, 6 Feb 2018 22:20:21 +0100 + +According to crypto/rng.h generate function should return 0 on success +and < 0 on error. + +Fixes: b8ae5c7387ad ("crypto: sun4i-ss - support the Security System PRNG") +Signed-off-by: Artem Savkov +Acked-by: Corentin Labbe +--- + drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +index 0d01d1624252..5754e0b92fb0 100644 +--- a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c ++++ b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +@@ -52,5 +52,5 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, + + writel(0, ss->base + SS_CTL); + spin_unlock(&ss->slock); +- return dlen; ++ return 0; + } +From patchwork Tue Feb 6 21:20:22 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/2] sun4i_ss_prng: convert lock to _bh in sun4i_ss_prng_generate +From: Artem Savkov +X-Patchwork-Id: 10204145 +Message-Id: <20180206212022.1309-3-artem.savkov@gmail.com> +To: Corentin Labbe +Cc: linux-kernel@vger.kernel.org, Artem Savkov , + Herbert Xu , + linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org +Date: Tue, 6 Feb 2018 22:20:22 +0100 + +Lockdep detects a possible deadlock in sun4i_ss_prng_generate() and +throws an "inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage" warning. +Disabling softirqs to fix this. + +Fixes: b8ae5c7387ad ("crypto: sun4i-ss - support the Security System PRNG") +Signed-off-by: Artem Savkov +--- + drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +index 5754e0b92fb0..63d636424161 100644 +--- a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c ++++ b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +@@ -28,7 +28,7 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, + algt = container_of(alg, struct sun4i_ss_alg_template, alg.rng); + ss = algt->ss; + +- spin_lock(&ss->slock); ++ spin_lock_bh(&ss->slock); + + writel(mode, ss->base + SS_CTL); + +@@ -51,6 +51,6 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, + } + + writel(0, ss->base + SS_CTL); +- spin_unlock(&ss->slock); ++ spin_unlock_bh(&ss->slock); + return 0; + } diff --git a/arm64-qcom-fix-rmtfs.patch b/arm64-qcom-fix-rmtfs.patch new file mode 100644 index 000000000..e8a98617a --- /dev/null +++ b/arm64-qcom-fix-rmtfs.patch @@ -0,0 +1,36 @@ +From 3b229bdb54cc83061b4b7840e3532316cb1ac7ce Mon Sep 17 00:00:00 2001 +From: Jesse Chan +Date: Mon, 20 Nov 2017 13:33:25 -0800 +Subject: soc: qcom: rmtfs_mem: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE + +This change resolves a new compile-time warning +when built as a loadable module: + +WARNING: modpost: missing MODULE_LICENSE() in drivers/soc/qcom/rmtfs_mem.o +see include/linux/module.h for more information + +This adds the license as "GPL v2", which matches the header of the file. + +MODULE_DESCRIPTION and MODULE_AUTHOR are also added. + +Signed-off-by: Jesse Chan +Signed-off-by: Andy Gross +--- + drivers/soc/qcom/rmtfs_mem.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/soc/qcom/rmtfs_mem.c b/drivers/soc/qcom/rmtfs_mem.c +index ce35ff7..0a43b2e 100644 +--- a/drivers/soc/qcom/rmtfs_mem.c ++++ b/drivers/soc/qcom/rmtfs_mem.c +@@ -267,3 +267,7 @@ static void qcom_rmtfs_mem_exit(void) + unregister_chrdev_region(qcom_rmtfs_mem_major, QCOM_RMTFS_MEM_DEV_MAX); + } + module_exit(qcom_rmtfs_mem_exit); ++ ++MODULE_AUTHOR("Linaro Ltd"); ++MODULE_DESCRIPTION("Qualcomm Remote Filesystem memory driver"); ++MODULE_LICENSE("GPL v2"); +-- +cgit v1.1 + diff --git a/baseconfig/arm/CONFIG_SUN8I_DE2_CCU b/baseconfig/arm/CONFIG_SUN8I_DE2_CCU index 41a3847ad..1729d1f68 100644 --- a/baseconfig/arm/CONFIG_SUN8I_DE2_CCU +++ b/baseconfig/arm/CONFIG_SUN8I_DE2_CCU @@ -1 +1 @@ -# CONFIG_SUN8I_DE2_CCU is not set +CONFIG_SUN8I_DE2_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU deleted file mode 100644 index 1729d1f68..000000000 --- a/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_DE2_CCU=y diff --git a/kernel-aarch64-debug.config b/kernel-aarch64-debug.config index 320fa7f76..39351a521 100644 --- a/kernel-aarch64-debug.config +++ b/kernel-aarch64-debug.config @@ -5550,7 +5550,7 @@ CONFIG_STUB_CLK_HI6220=y CONFIG_SUN4I_GPADC=m CONFIG_SUN50I_A64_CCU=y # CONFIG_SUN8I_A83T_CCU is not set -# CONFIG_SUN8I_DE2_CCU is not set +CONFIG_SUN8I_DE2_CCU=y CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_R_CCU=y # CONFIG_SUN8I_V3S_CCU is not set diff --git a/kernel-aarch64.config b/kernel-aarch64.config index d6ecc00d8..a5578dcd1 100644 --- a/kernel-aarch64.config +++ b/kernel-aarch64.config @@ -5527,7 +5527,7 @@ CONFIG_STUB_CLK_HI6220=y CONFIG_SUN4I_GPADC=m CONFIG_SUN50I_A64_CCU=y # CONFIG_SUN8I_A83T_CCU is not set -# CONFIG_SUN8I_DE2_CCU is not set +CONFIG_SUN8I_DE2_CCU=y CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_R_CCU=y # CONFIG_SUN8I_V3S_CCU is not set diff --git a/kernel.spec b/kernel.spec index 3727a076f..d1e7b6da8 100644 --- a/kernel.spec +++ b/kernel.spec @@ -591,10 +591,22 @@ Patch307: arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch # Fix USB on the RPi https://patchwork.kernel.org/patch/9879371/ Patch308: bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe.patch +# In 4.16 Patch309: arm-exynos-fix-dwc3-neg.patch +# In 4.16 Patch310: arm-imx6-cpufreq-fix-loading.patch +# https://www.spinics.net/lists/stable/msg214527.html +Patch311: arm-clk-bcm2835-hdmi-fixes.patch + +# https://www.spinics.net/lists/arm-kernel/msg632925.html +Patch312: arm-sun4i_ss_prng-fixes.patch +Patch313: arm-crypto-sunxi-ss-Add-MODULE_ALIAS-to-sun4i-ss.patch + +# In 4.16 +Patch314: arm64-qcom-fix-rmtfs.patch + # https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/log/?h=synquacer-netsec Patch330: arm64-socionext-96b-enablement.patch @@ -1916,10 +1928,12 @@ fi # # %changelog -* Thu Feb 8 2018 Peter Robinson +* Sun Feb 11 2018 Peter Robinson - Add Exynos5 patch (second part of series) to fix USB-3 devices on some Odroid devices - Fix up and re-enable adv7511 - Fix loading of i.MX6 cpufreq driver (rhbz 1466991) +- Improvements/fixes for Raspberry Pi HDMI monitor detection +- Fix regression with AllWinner (sunxi) crypto PRNG, and module loading * Wed Feb 07 2018 Laura Abbott - 4.15.2-300 - Linux v4.15.2 rebase