Forgotten patches
This commit is contained in:
Justin M. Forbes
parent
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7 changed files with 5706 additions and 0 deletions
1130
ARM-dts-bcm283x-Several-DTS-improvements.patch
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1130
ARM-dts-bcm283x-Several-DTS-improvements.patch
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File diff suppressed because it is too large
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527
Allwinner-A64-timer-workaround.patch
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527
Allwinner-A64-timer-workaround.patch
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Sat, 12 Jan 2019 21:17:21 -0500 (EST)
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From: Samuel Holland <samuel@sholland.org>
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To: Catalin Marinas <catalin.marinas@arm.com>,
|
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Will Deacon <will.deacon@arm.com>,
|
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Maxime Ripard <maxime.ripard@bootlin.com>, Chen-Yu Tsai <wens@csie.org>,
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Rob Herring <robh+dt@kernel.org>, Mark Rutland <Mark.Rutland@arm.com>,
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Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <marc.zyngier@arm.com>
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Subject: [PATCH v3 1/2] arm64: arch_timer: Workaround for Allwinner A64 timer
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instability
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Date: Sat, 12 Jan 2019 20:17:18 -0600
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The Allwinner A64 SoC is known[1] to have an unstable architectural
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timer, which manifests itself most obviously in the time jumping forward
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a multiple of 95 years[2][3]. This coincides with 2^56 cycles at a
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timer frequency of 24 MHz, implying that the time went slightly backward
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(and this was interpreted by the kernel as it jumping forward and
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wrapping around past the epoch).
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Investigation revealed instability in the low bits of CNTVCT at the
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point a high bit rolls over. This leads to power-of-two cycle forward
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and backward jumps. (Testing shows that forward jumps are about twice as
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likely as backward jumps.) Since the counter value returns to normal
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after an indeterminate read, each "jump" really consists of both a
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forward and backward jump from the software perspective.
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Unless the kernel is trapping CNTVCT reads, a userspace program is able
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to read the register in a loop faster than it changes. A test program
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running on all 4 CPU cores that reported jumps larger than 100 ms was
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run for 13.6 hours and reported the following:
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Count | Event
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-------+---------------------------
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9940 | jumped backward 699ms
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268 | jumped backward 1398ms
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1 | jumped backward 2097ms
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16020 | jumped forward 175ms
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6443 | jumped forward 699ms
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2976 | jumped forward 1398ms
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9 | jumped forward 356516ms
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9 | jumped forward 357215ms
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4 | jumped forward 714430ms
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1 | jumped forward 3578440ms
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This works out to a jump larger than 100 ms about every 5.5 seconds on
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each CPU core.
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The largest jump (almost an hour!) was the following sequence of reads:
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0x0000007fffffffff → 0x00000093feffffff → 0x0000008000000000
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Note that the middle bits don't necessarily all read as all zeroes or
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all ones during the anomalous behavior; however the low 10 bits checked
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by the function in this patch have never been observed with any other
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value.
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Also note that smaller jumps are much more common, with backward jumps
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of 2048 (2^11) cycles observed over 400 times per second on each core.
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(Of course, this is partially explained by lower bits rolling over more
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frequently.) Any one of these could have caused the 95 year time skip.
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Similar anomalies were observed while reading CNTPCT (after patching the
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kernel to allow reads from userspace). However, the CNTPCT jumps are
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much less frequent, and only small jumps were observed. The same program
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as before (except now reading CNTPCT) observed after 72 hours:
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Count | Event
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-------+---------------------------
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17 | jumped backward 699ms
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52 | jumped forward 175ms
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2831 | jumped forward 699ms
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5 | jumped forward 1398ms
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Further investigation showed that the instability in CNTPCT/CNTVCT also
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affected the respective timer's TVAL register. The following values were
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observed immediately after writing CNVT_TVAL to 0x10000000:
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CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error
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--------------------+------------+--------------------+-----------------
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0x000000d4a2d8bfff | 0x10003fff | 0x000000d4b2d8bfff | +0x00004000
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0x000000d4a2d94000 | 0x0fffffff | 0x000000d4b2d97fff | -0x00004000
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0x000000d4a2d97fff | 0x10003fff | 0x000000d4b2d97fff | +0x00004000
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0x000000d4a2d9c000 | 0x0fffffff | 0x000000d4b2d9ffff | -0x00004000
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The pattern of errors in CNTV_TVAL seemed to depend on exactly which
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value was written to it. For example, after writing 0x10101010:
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CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error
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--------------------+------------+--------------------+-----------------
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0x000001ac3effffff | 0x1110100f | 0x000001ac4f10100f | +0x1000000
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0x000001ac40000000 | 0x1010100f | 0x000001ac5110100f | -0x1000000
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0x000001ac58ffffff | 0x1110100f | 0x000001ac6910100f | +0x1000000
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0x000001ac66000000 | 0x1010100f | 0x000001ac7710100f | -0x1000000
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0x000001ac6affffff | 0x1110100f | 0x000001ac7b10100f | +0x1000000
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0x000001ac6e000000 | 0x1010100f | 0x000001ac7f10100f | -0x1000000
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I was also twice able to reproduce the issue covered by Allwinner's
|
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workaround[4], that writing to TVAL sometimes fails, and both CVAL and
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TVAL are left with entirely bogus values. One was the following values:
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CNTVCT | CNTV_TVAL | CNTV_CVAL
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--------------------+------------+--------------------------------------
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0x000000d4a2d6014c | 0x8fbd5721 | 0x000000d132935fff (615s in the past)
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========================================================================
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Because the CPU can read the CNTPCT/CNTVCT registers faster than they
|
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change, performing two reads of the register and comparing the high bits
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(like other workarounds) is not a workable solution. And because the
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timer can jump both forward and backward, no pair of reads can
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distinguish a good value from a bad one. The only way to guarantee a
|
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good value from consecutive reads would be to read _three_ times, and
|
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take the middle value only if the three values are 1) each unique and
|
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2) increasing. This takes at minimum 3 counter cycles (125 ns), or more
|
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if an anomaly is detected.
|
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|
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However, since there is a distinct pattern to the bad values, we can
|
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optimize the common case (1022/1024 of the time) to a single read by
|
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simply ignoring values that match the error pattern. This still takes no
|
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more than 3 cycles in the worst case, and requires much less code. As an
|
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additional safety check, we still limit the loop iteration to the number
|
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of max-frequency (1.2 GHz) CPU cycles in three 24 MHz counter periods.
|
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|
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For the TVAL registers, the simple solution is to not use them. Instead,
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read or write the CVAL and calculate the TVAL value in software.
|
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|
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Although the manufacturer is aware of at least part of the erratum[4],
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there is no official name for it. For now, use the kernel-internal name
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"UNKNOWN1".
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[1]: https://github.com/armbian/build/commit/a08cd6fe7ae9
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[2]: https://forum.armbian.com/topic/3458-a64-datetime-clock-issue/
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[3]: https://irclog.whitequark.org/linux-sunxi/2018-01-26
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[4]: https://github.com/Allwinner-Homlet/H6-BSP4.9-linux/blob/master/drivers/clocksource/arm_arch_timer.c#L272
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Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Tested-by: Andre Przywara <andre.przywara@arm.com>
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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Documentation/arm64/silicon-errata.txt | 2 +
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drivers/clocksource/Kconfig | 10 +++++
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drivers/clocksource/arm_arch_timer.c | 55 ++++++++++++++++++++++++++
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3 files changed, 67 insertions(+)
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diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt
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index 8f9577621144..4a269732d2a0 100644
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--- a/Documentation/arm64/silicon-errata.txt
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+++ b/Documentation/arm64/silicon-errata.txt
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@@ -44,6 +44,8 @@ stable kernels.
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| Implementor | Component | Erratum ID | Kconfig |
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+----------------+-----------------+-----------------+-----------------------------+
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+| Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 |
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+| | | | |
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| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
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| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
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| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
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diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
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index 55c77e44bb2d..d20ff4da07c3 100644
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--- a/drivers/clocksource/Kconfig
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+++ b/drivers/clocksource/Kconfig
|
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@@ -364,6 +364,16 @@ config ARM64_ERRATUM_858921
|
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The workaround will be dynamically enabled when an affected
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core is detected.
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+config SUN50I_ERRATUM_UNKNOWN1
|
||||
+ bool "Workaround for Allwinner A64 erratum UNKNOWN1"
|
||||
+ default y
|
||||
+ depends on ARM_ARCH_TIMER && ARM64 && ARCH_SUNXI
|
||||
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
|
||||
+ help
|
||||
+ This option enables a workaround for instability in the timer on
|
||||
+ the Allwinner A64 SoC. The workaround will only be active if the
|
||||
+ allwinner,erratum-unknown1 property is found in the timer node.
|
||||
+
|
||||
config ARM_GLOBAL_TIMER
|
||||
bool "Support for the ARM global timer" if COMPILE_TEST
|
||||
select TIMER_OF if OF
|
||||
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
|
||||
index 9a7d4dc00b6e..a8b20b65bd4b 100644
|
||||
--- a/drivers/clocksource/arm_arch_timer.c
|
||||
+++ b/drivers/clocksource/arm_arch_timer.c
|
||||
@@ -326,6 +326,48 @@ static u64 notrace arm64_1188873_read_cntvct_el0(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
|
||||
+/*
|
||||
+ * The low bits of the counter registers are indeterminate while bit 10 or
|
||||
+ * greater is rolling over. Since the counter value can jump both backward
|
||||
+ * (7ff -> 000 -> 800) and forward (7ff -> fff -> 800), ignore register values
|
||||
+ * with all ones or all zeros in the low bits. Bound the loop by the maximum
|
||||
+ * number of CPU cycles in 3 consecutive 24 MHz counter periods.
|
||||
+ */
|
||||
+#define __sun50i_a64_read_reg(reg) ({ \
|
||||
+ u64 _val; \
|
||||
+ int _retries = 150; \
|
||||
+ \
|
||||
+ do { \
|
||||
+ _val = read_sysreg(reg); \
|
||||
+ _retries--; \
|
||||
+ } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \
|
||||
+ \
|
||||
+ WARN_ON_ONCE(!_retries); \
|
||||
+ _val; \
|
||||
+})
|
||||
+
|
||||
+static u64 notrace sun50i_a64_read_cntpct_el0(void)
|
||||
+{
|
||||
+ return __sun50i_a64_read_reg(cntpct_el0);
|
||||
+}
|
||||
+
|
||||
+static u64 notrace sun50i_a64_read_cntvct_el0(void)
|
||||
+{
|
||||
+ return __sun50i_a64_read_reg(cntvct_el0);
|
||||
+}
|
||||
+
|
||||
+static u32 notrace sun50i_a64_read_cntp_tval_el0(void)
|
||||
+{
|
||||
+ return read_sysreg(cntp_cval_el0) - sun50i_a64_read_cntpct_el0();
|
||||
+}
|
||||
+
|
||||
+static u32 notrace sun50i_a64_read_cntv_tval_el0(void)
|
||||
+{
|
||||
+ return read_sysreg(cntv_cval_el0) - sun50i_a64_read_cntvct_el0();
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
|
||||
DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
|
||||
EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
|
||||
@@ -423,6 +465,19 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
|
||||
.read_cntvct_el0 = arm64_1188873_read_cntvct_el0,
|
||||
},
|
||||
#endif
|
||||
+#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
|
||||
+ {
|
||||
+ .match_type = ate_match_dt,
|
||||
+ .id = "allwinner,erratum-unknown1",
|
||||
+ .desc = "Allwinner erratum UNKNOWN1",
|
||||
+ .read_cntp_tval_el0 = sun50i_a64_read_cntp_tval_el0,
|
||||
+ .read_cntv_tval_el0 = sun50i_a64_read_cntv_tval_el0,
|
||||
+ .read_cntpct_el0 = sun50i_a64_read_cntpct_el0,
|
||||
+ .read_cntvct_el0 = sun50i_a64_read_cntvct_el0,
|
||||
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
|
||||
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
|
||||
+ },
|
||||
+#endif
|
||||
};
|
||||
|
||||
typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
|
||||
|
||||
From patchwork Sun Jan 13 02:17:19 2019
|
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|
||||
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Sat, 12 Jan 2019 21:17:22 -0500 (EST)
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From: Samuel Holland <samuel@sholland.org>
|
||||
To: Catalin Marinas <catalin.marinas@arm.com>,
|
||||
Will Deacon <will.deacon@arm.com>,
|
||||
Maxime Ripard <maxime.ripard@bootlin.com>, Chen-Yu Tsai <wens@csie.org>,
|
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Rob Herring <robh+dt@kernel.org>, Mark Rutland <Mark.Rutland@arm.com>,
|
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Daniel Lezcano <daniel.lezcano@linaro.org>,
|
||||
Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <marc.zyngier@arm.com>
|
||||
Subject: [PATCH v3 2/2] arm64: dts: allwinner: a64: Enable A64 timer
|
||||
workaround
|
||||
Date: Sat, 12 Jan 2019 20:17:19 -0600
|
||||
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Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com,
|
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|
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|
||||
As instability in the architectural timer has been observed on multiple
|
||||
devices using this SoC, inluding the Pine64 and the Orange Pi Win,
|
||||
enable the workaround in the SoC's device tree.
|
||||
|
||||
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
index f3a66f888205..13eac92a8c55 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -175,6 +175,7 @@
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
+ allwinner,erratum-unknown1;
|
||||
interrupts = <GIC_PPI 13
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
||||
<GIC_PPI 14
|
||||
1104
bcm2835-mmc-Several-fixes-for-bcm2835-driver.patch
Normal file
1104
bcm2835-mmc-Several-fixes-for-bcm2835-driver.patch
Normal file
File diff suppressed because it is too large
Load diff
1761
bcm2835-vc04_services-Improve-driver-load-unload.patch
Normal file
1761
bcm2835-vc04_services-Improve-driver-load-unload.patch
Normal file
File diff suppressed because it is too large
Load diff
630
bcm2836-Improve-VCHIQ-cache-line-size-handling.patch
Normal file
630
bcm2836-Improve-VCHIQ-cache-line-size-handling.patch
Normal file
|
|
@ -0,0 +1,630 @@
|
|||
From patchwork Mon Sep 17 08:22:22 2018
|
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|
||||
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Mon, 17 Sep 2018 01:22:41 -0700 (PDT)
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From: Phil Elwell <phil@raspberrypi.org>
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To: Rob Herring <robh+dt@kernel.org>, Stefan Wahren <stefan.wahren@i2se.com>,
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Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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bcm-kernel-feedback-list@broadcom.com, devel@driverdev.osuosl.org
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Subject: [PATCH v3 2/4] dt-bindings: soc: Document "brcm,bcm2836-vchiq"
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Date: Mon, 17 Sep 2018 09:22:22 +0100
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"brcm,bcm2836-vchiq" should be used on BCM2836 and BCM2837 to ensure
|
||||
correct operation.
|
||||
|
||||
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
|
||||
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Reviewed-by: Rob Herring <robh@kernel.org>
|
||||
---
|
||||
Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt
|
||||
index 8dd7b3a..f331316 100644
|
||||
--- a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt
|
||||
+++ b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt
|
||||
@@ -2,7 +2,8 @@ Broadcom VCHIQ firmware services
|
||||
|
||||
Required properties:
|
||||
|
||||
-- compatible: Should be "brcm,bcm2835-vchiq"
|
||||
+- compatible: Should be "brcm,bcm2835-vchiq" on BCM2835, otherwise
|
||||
+ "brcm,bcm2836-vchiq".
|
||||
- reg: Physical base address and length of the doorbell register pair
|
||||
- interrupts: The interrupt number
|
||||
See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
|
||||
|
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From patchwork Mon Sep 17 08:22:23 2018
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Mon, 17 Sep 2018 01:22:42 -0700 (PDT)
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From: Phil Elwell <phil@raspberrypi.org>
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To: Rob Herring <robh+dt@kernel.org>, Stefan Wahren <stefan.wahren@i2se.com>,
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Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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bcm-kernel-feedback-list@broadcom.com, devel@driverdev.osuosl.org
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Subject: [PATCH v3 3/4] ARM: dts: bcm283x: Correct vchiq compatible string
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Date: Mon, 17 Sep 2018 09:22:23 +0100
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To allow VCHIQ to determine the correct cache line size, use the new
|
||||
"brcm,bcm2836-vchiq" compatible string on BCM2836 and BCM2837.
|
||||
|
||||
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
|
||||
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
|
||||
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
|
||||
arch/arm/boot/dts/bcm2836-rpi.dtsi | 6 ++++++
|
||||
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 2 +-
|
||||
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 2 +-
|
||||
arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi | 2 +-
|
||||
6 files changed, 11 insertions(+), 5 deletions(-)
|
||||
create mode 100644 arch/arm/boot/dts/bcm2836-rpi.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
index cb2d6d7..215d8cc 100644
|
||||
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
@@ -30,7 +30,7 @@
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
- mailbox@7e00b840 {
|
||||
+ vchiq: mailbox@7e00b840 {
|
||||
compatible = "brcm,bcm2835-vchiq";
|
||||
reg = <0x7e00b840 0xf>;
|
||||
interrupts = <0 2>;
|
||||
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
||||
index 2fef70a..ac4408b 100644
|
||||
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
#include "bcm2836.dtsi"
|
||||
-#include "bcm2835-rpi.dtsi"
|
||||
+#include "bcm2836-rpi.dtsi"
|
||||
#include "bcm283x-rpi-smsc9514.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2836-rpi.dtsi b/arch/arm/boot/dts/bcm2836-rpi.dtsi
|
||||
new file mode 100644
|
||||
index 0000000..c4c858b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/bcm2836-rpi.dtsi
|
||||
@@ -0,0 +1,6 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+#include "bcm2835-rpi.dtsi"
|
||||
+
|
||||
+&vchiq {
|
||||
+ compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
||||
index 4adb85e..eca36e3 100644
|
||||
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
#include "bcm2837.dtsi"
|
||||
-#include "bcm2835-rpi.dtsi"
|
||||
+#include "bcm2836-rpi.dtsi"
|
||||
#include "bcm283x-rpi-lan7515.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
index c318bcb..a0ba0f6 100644
|
||||
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
#include "bcm2837.dtsi"
|
||||
-#include "bcm2835-rpi.dtsi"
|
||||
+#include "bcm2836-rpi.dtsi"
|
||||
#include "bcm283x-rpi-smsc9514.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi b/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
|
||||
index 7b7ab6a..4a89a18 100644
|
||||
--- a/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
#include "bcm2837.dtsi"
|
||||
-#include "bcm2835-rpi.dtsi"
|
||||
+#include "bcm2836-rpi.dtsi"
|
||||
|
||||
/ {
|
||||
memory {
|
||||
|
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From patchwork Mon Sep 17 08:22:24 2018
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Content-Type: text/plain; charset="utf-8"
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X-Patchwork-Submitter: Phil Elwell <phil@raspberrypi.org>
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Mon, 17 Sep 2018 01:22:43 -0700 (PDT)
|
||||
From: Phil Elwell <phil@raspberrypi.org>
|
||||
To: Rob Herring <robh+dt@kernel.org>, Stefan Wahren <stefan.wahren@i2se.com>,
|
||||
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
|
||||
Phil Elwell <phil@raspberrypi.org>, devicetree@vger.kernel.org,
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linux-rpi-kernel@lists.infradead.org,
|
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Russell King <linux@armlinux.org.uk>, Arnd Bergmann <arnd@arndb.de>,
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linux-arm-kernel@lists.infradead.org,
|
||||
bcm-kernel-feedback-list@broadcom.com, devel@driverdev.osuosl.org
|
||||
Subject: [PATCH v3 4/4] ARM: dts: bcm283x: Correct mailbox register sizes
|
||||
Date: Mon, 17 Sep 2018 09:22:24 +0100
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Message-Id: <1537172544-104852-5-git-send-email-phil@raspberrypi.org>
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The size field in a Device Tree "reg" property is encoded in bytes, not
|
||||
words.
|
||||
|
||||
Fixes: 614fa22119d6 ("ARM: dts: bcm2835: Add VCHIQ node to the Raspberry Pi boards. (v3)")
|
||||
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
|
||||
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
index 215d8cc..29f970f 100644
|
||||
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
@@ -32,7 +32,7 @@
|
||||
|
||||
vchiq: mailbox@7e00b840 {
|
||||
compatible = "brcm,bcm2835-vchiq";
|
||||
- reg = <0x7e00b840 0xf>;
|
||||
+ reg = <0x7e00b840 0x3c>;
|
||||
interrupts = <0 2>;
|
||||
};
|
||||
};
|
||||
511
bcm2837-dts-add-Raspberry-Pi-3-A.patch
Normal file
511
bcm2837-dts-add-Raspberry-Pi-3-A.patch
Normal file
|
|
@ -0,0 +1,511 @@
|
|||
From patchwork Tue Dec 4 18:58:17 2018
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X-Patchwork-Submitter: Stefan Wahren <stefan.wahren@i2se.com>
|
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X-Patchwork-Id: 10712425
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Subject: [PATCH V3 1/3] dt-bindings: bcm: Add Raspberry Pi 3 A+
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Date: Tue, 4 Dec 2018 19:58:17 +0100
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|
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Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
|
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|
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This adds the root properties for the Raspberry Pi 3 A+ .
|
||||
|
||||
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
Reviewed-by: Rob Herring <robh@kernel.org>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
|
||||
index 0dcc3ea..245328f 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
|
||||
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
|
||||
@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
|
||||
|
||||
+Raspberry Pi 3 Model A+
|
||||
+Required root node properties:
|
||||
+compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
|
||||
+
|
||||
Raspberry Pi 3 Model B
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
||||
|
||||
From patchwork Tue Dec 4 18:58:18 2018
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id 1MTfgb-1gvyxH1xQz-00TyQt; Tue, 04 Dec 2018 19:58:54 +0100
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From: Stefan Wahren <stefan.wahren@i2se.com>
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To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
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Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>, Eric Anholt <eric@anholt.net>,
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Arnd Bergmann <arnd@arndb.de>
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Subject: [PATCH V3 2/3] ARM: dts: add Raspberry Pi 3 A+
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Date: Tue, 4 Dec 2018 19:58:18 +0100
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Message-Id: <1543949899-13380-3-git-send-email-stefan.wahren@i2se.com>
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Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
|
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The Raspberry Pi 3 A+ is similar to the Pi 3 B+ but has only 512 MB RAM,
|
||||
1 USB 2.0 port and no Ethernet.
|
||||
|
||||
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 1 +
|
||||
arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 107 +++++++++++++++++++++++++++++
|
||||
2 files changed, 108 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index b0e966d..15bbd0d 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
|
||||
bcm2835-rpi-a-plus.dtb \
|
||||
bcm2835-rpi-cm1-io1.dtb \
|
||||
bcm2836-rpi-2-b.dtb \
|
||||
+ bcm2837-rpi-3-a-plus.dtb \
|
||||
bcm2837-rpi-3-b.dtb \
|
||||
bcm2837-rpi-3-b-plus.dtb \
|
||||
bcm2837-rpi-cm3-io3.dtb \
|
||||
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
||||
new file mode 100644
|
||||
index 0000000..b2df7cf
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
||||
@@ -0,0 +1,107 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/dts-v1/;
|
||||
+#include "bcm2837.dtsi"
|
||||
+#include "bcm2836-rpi.dtsi"
|
||||
+#include "bcm283x-rpi-usb-host.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
|
||||
+ model = "Raspberry Pi 3 Model A+";
|
||||
+
|
||||
+ chosen {
|
||||
+ /* 8250 auxiliary UART instead of pl011 */
|
||||
+ stdout-path = "serial1:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ reg = <0 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ act {
|
||||
+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ pwr {
|
||||
+ label = "PWR";
|
||||
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: wifi-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&firmware {
|
||||
+ expgpio: gpio {
|
||||
+ compatible = "raspberrypi,firmware-gpio";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ gpio-line-names = "BT_ON",
|
||||
+ "WL_ON",
|
||||
+ "STATUS_LED",
|
||||
+ "",
|
||||
+ "",
|
||||
+ "CAM_GPIO0",
|
||||
+ "CAM_GPIO1",
|
||||
+ "";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
|
||||
+};
|
||||
+
|
||||
+&pwm {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* SDHCI is used to control the SDIO for wireless */
|
||||
+&sdhci {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_gpio34>;
|
||||
+ status = "okay";
|
||||
+ bus-width = <4>;
|
||||
+ non-removable;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SDHOST is used to drive the SD card */
|
||||
+&sdhost {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdhost_gpio48>;
|
||||
+ status = "okay";
|
||||
+ bus-width = <4>;
|
||||
+};
|
||||
+
|
||||
+/* uart0 communicates with the BT module */
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ max-speed = <2000000>;
|
||||
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* uart1 is mapped to the pin header */
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart1_gpio14>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
|
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From patchwork Tue Dec 4 18:58:19 2018
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id 1MFJfN-1gjyQ33mR7-00FlVP; Tue, 04 Dec 2018 19:58:55 +0100
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From: Stefan Wahren <stefan.wahren@i2se.com>
|
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To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
|
||||
Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
|
||||
Scott Branden <sbranden@broadcom.com>, Eric Anholt <eric@anholt.net>,
|
||||
Arnd Bergmann <arnd@arndb.de>
|
||||
Subject: [PATCH V3 3/3] arm64: dts: broadcom: Add reference to RPi 3 A+
|
||||
Date: Tue, 4 Dec 2018 19:58:19 +0100
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Message-Id: <1543949899-13380-4-git-send-email-stefan.wahren@i2se.com>
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References: <1543949899-13380-1-git-send-email-stefan.wahren@i2se.com>
|
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Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
|
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This adds a reference to the dts of the Raspberry Pi 3 A+,
|
||||
so we don't need to maintain the content in arm64.
|
||||
|
||||
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
---
|
||||
arch/arm64/boot/dts/broadcom/Makefile | 3 ++-
|
||||
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dts | 2 ++
|
||||
2 files changed, 4 insertions(+), 1 deletion(-)
|
||||
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
|
||||
index 667ca98..d1d31cc 100644
|
||||
--- a/arch/arm64/boot/dts/broadcom/Makefile
|
||||
+++ b/arch/arm64/boot/dts/broadcom/Makefile
|
||||
@@ -1,5 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
-dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb \
|
||||
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-a-plus.dtb \
|
||||
+ bcm2837-rpi-3-b.dtb \
|
||||
bcm2837-rpi-3-b-plus.dtb \
|
||||
bcm2837-rpi-cm3-io3.dtb
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dts
|
||||
new file mode 100644
|
||||
index 0000000..f0ec56a
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dts
|
||||
@@ -0,0 +1,2 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+#include "arm/bcm2837-rpi-3-a-plus.dts"
|
||||
43
brcmfmac-Call-brcmf_dmi_probe-before-brcmf_of_probe.patch
Normal file
43
brcmfmac-Call-brcmf_dmi_probe-before-brcmf_of_probe.patch
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
From 554da3868eb1d7174710c18b4ddd6ff01f6d612c Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Fri, 23 Nov 2018 10:11:48 +0100
|
||||
Subject: brcmfmac: Call brcmf_dmi_probe before brcmf_of_probe
|
||||
|
||||
ARM systems with UEFI may have both devicetree (of) and DMI data in this
|
||||
case we end up setting brcmf_mp_device.board_type twice.
|
||||
|
||||
In this case we should prefer the devicetree data, because:
|
||||
1) The devicerree data is more reliable
|
||||
2) Some ARM systems (e.g. the Raspberry Pi 3 models) support both UEFI and
|
||||
classic uboot booting, the devicetree data is always there, so using it
|
||||
makes sure we ask for the same nvram file independent of how we booted.
|
||||
|
||||
This commit moves the brcmf_dmi_probe call to before the brcmf_of_probe
|
||||
call, so that the latter can override the value of the first if both are
|
||||
set.
|
||||
|
||||
Fixes: bd1e82bb420a ("brcmfmac: Set board_type from DMI on x86 based ...")
|
||||
Cc: Peter Robinson <pbrobinson@gmail.com>
|
||||
Tested-and-reported-by: Peter Robinson <pbrobinson@gmail.com>
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||
---
|
||||
drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
|
||||
index e738112ed87c..1f1e95a15a17 100644
|
||||
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
|
||||
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
|
||||
@@ -449,8 +449,8 @@ struct brcmf_mp_device *brcmf_get_module_param(struct device *dev,
|
||||
}
|
||||
if (!found) {
|
||||
/* No platform data for this device, try OF and DMI data */
|
||||
- brcmf_of_probe(dev, bus_type, settings);
|
||||
brcmf_dmi_probe(settings, chip, chiprev);
|
||||
+ brcmf_of_probe(dev, bus_type, settings);
|
||||
}
|
||||
return settings;
|
||||
}
|
||||
--
|
||||
cgit 1.2-0.3.lf.el7
|
||||
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