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Linux v4.19.2

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Jeremy Cline 2018-10-23 09:55:11 -04:00
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236 changed files with 6628 additions and 14214 deletions
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78
0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch
View file

@ -1,78 +0,0 @@
From 39a8883a2b989d1d21bd8dd99f5557f0c5e89694 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Tue, 17 Jul 2018 18:24:27 -0400
Subject: [PATCH] random: add a config option to trust the CPU's hwrng
This gives the user building their own kernel (or a Linux
distribution) the option of deciding whether or not to trust the CPU's
hardware random number generator (e.g., RDRAND for x86 CPU's) as being
correctly implemented and not having a back door introduced (perhaps
courtesy of a Nation State's law enforcement or intelligence
agencies).
This will prevent getrandom(2) from blocking, if there is a
willingness to trust the CPU manufacturer.
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
---
drivers/char/Kconfig | 14 ++++++++++++++
drivers/char/random.c | 11 ++++++++++-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 212f447938ae..ce277ee0a28a 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -554,3 +554,17 @@ config ADI
endmenu
+config RANDOM_TRUST_CPU
+ bool "Trust the CPU manufacturer to initialize Linux's CRNG"
+ depends on X86 || S390 || PPC
+ default n
+ help
+ Assume that CPU manufacturer (e.g., Intel or AMD for RDSEED or
+ RDRAND, IBM for the S390 and Power PC architectures) is trustworthy
+ for the purposes of initializing Linux's CRNG. Since this is not
+ something that can be independently audited, this amounts to trusting
+ that CPU manufacturer (perhaps with the insistence or mandate
+ of a Nation State's intelligence or law enforcement agencies)
+ has not installed a hidden back door to compromise the CPU's
+ random number generation facilities.
+
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 34ddfd57419b..f4013b8a711b 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -782,6 +782,7 @@ static void invalidate_batched_entropy(void);
static void crng_initialize(struct crng_state *crng)
{
int i;
+ int arch_init = 1;
unsigned long rv;
memcpy(&crng->state[0], "expand 32-byte k", 16);
@@ -792,10 +793,18 @@ static void crng_initialize(struct crng_state *crng)
_get_random_bytes(&crng->state[4], sizeof(__u32) * 12);
for (i = 4; i < 16; i++) {
if (!arch_get_random_seed_long(&rv) &&
- !arch_get_random_long(&rv))
+ !arch_get_random_long(&rv)) {
rv = random_get_entropy();
+ arch_init = 0;
+ }
crng->state[i] ^= rv;
}
+#ifdef CONFIG_RANDOM_TRUST_CPU
+ if (arch_init) {
+ crng_init = 2;
+ pr_notice("random: crng done (trusting CPU's manufacturer)\n");
+ }
+#endif
crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
}
--
2.17.1

82
0001-random-make-CPU-trust-a-boot-parameter.patch
View file

@ -1,82 +0,0 @@
From 9b25436662d5fb4c66eb527ead53cab15f596ee0 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Mon, 27 Aug 2018 14:51:54 -0700
Subject: [PATCH] random: make CPU trust a boot parameter
Instead of forcing a distro or other system builder to choose
at build time whether the CPU is trusted for CRNG seeding via
CONFIG_RANDOM_TRUST_CPU, provide a boot-time parameter for end users to
control the choice. The CONFIG will set the default state instead.
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
---
Documentation/admin-guide/kernel-parameters.txt | 6 ++++++
drivers/char/Kconfig | 4 ++--
drivers/char/random.c | 11 ++++++++---
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 0c8f7889efa1..227c5c6fa4c1 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3390,6 +3390,12 @@
ramdisk_size= [RAM] Sizes of RAM disks in kilobytes
See Documentation/blockdev/ramdisk.txt.
+ random.trust_cpu={on,off}
+ [KNL] Enable or disable trusting the use of the
+ CPU's random number generator (if available) to
+ fully seed the kernel's CRNG. Default is controlled
+ by CONFIG_RANDOM_TRUST_CPU.
+
ras=option[,option,...] [KNL] RAS-specific options
cec_disable [X86]
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index ce277ee0a28a..40728491f37b 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -566,5 +566,5 @@ config RANDOM_TRUST_CPU
that CPU manufacturer (perhaps with the insistence or mandate
of a Nation State's intelligence or law enforcement agencies)
has not installed a hidden back door to compromise the CPU's
- random number generation facilities.
-
+ random number generation facilities. This can also be configured
+ at boot with "random.trust_cpu=on/off".
diff --git a/drivers/char/random.c b/drivers/char/random.c
index bf5f99fc36f1..c75b6cdf0053 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -779,6 +779,13 @@ static struct crng_state **crng_node_pool __read_mostly;
static void invalidate_batched_entropy(void);
+static bool trust_cpu __ro_after_init = IS_ENABLED(CONFIG_RANDOM_TRUST_CPU);
+static int __init parse_trust_cpu(char *arg)
+{
+ return kstrtobool(arg, &trust_cpu);
+}
+early_param("random.trust_cpu", parse_trust_cpu);
+
static void crng_initialize(struct crng_state *crng)
{
int i;
@@ -799,12 +806,10 @@ static void crng_initialize(struct crng_state *crng)
}
crng->state[i] ^= rv;
}
-#ifdef CONFIG_RANDOM_TRUST_CPU
- if (arch_init) {
+ if (trust_cpu && arch_init) {
crng_init = 2;
pr_notice("random: crng done (trusting CPU's manufacturer)\n");
}
-#endif
crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
}
--
2.17.1

23
ACPI-scan-Fix-regression-related-to-X-Gene-UARTs.patch
View file

@ -1,15 +1,7 @@
From patchwork Fri Apr 20 03:29:47 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: ACPI / scan: Fix regression related to X-Gene UARTs
From 1e494dc5f3140005ff1f17bc06c0c16d6d50d580 Mon Sep 17 00:00:00 2001
From: Mark Salter <msalter@redhat.com>
X-Patchwork-Id: 10351797
Message-Id: <20180420032947.23023-1-msalter@redhat.com>
To: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Danis?= <frederic.danis.oss@gmail.com>
Cc: "Rafael J . Wysocki" <rjw@rjwysocki.net>,
linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Date: Thu, 19 Apr 2018 23:29:47 -0400
Subject: [PATCH] ACPI / scan: Fix regression related to X-Gene UARTs
Commit e361d1f85855 ("ACPI / scan: Fix enumeration for special UART
devices") caused a regression with some X-Gene based platforms (Mustang
@ -24,12 +16,12 @@ Signed-off-by: Mark Salter <msalter@redhat.com>
1 file changed, 8 insertions(+)
diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index cc234e6a6297..1dcdd0122862 100644
index e1b6231cfa1c..542dafac4306 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c
@@ -1551,6 +1551,14 @@ static bool acpi_device_enumeration_by_parent(struct acpi_device *device)
fwnode_property_present(&device->fwnode, "baud")))
return true;
@@ -1567,6 +1567,14 @@ static bool acpi_device_enumeration_by_parent(struct acpi_device *device)
if (!acpi_match_device_ids(device, i2c_multi_instantiate_ids))
return false;
+ /*
+ * Firmware on some arm64 X-Gene platforms will make the UART
@ -42,3 +34,6 @@ index cc234e6a6297..1dcdd0122862 100644
INIT_LIST_HEAD(&resource_list);
acpi_dev_get_resources(device, &resource_list,
acpi_check_serial_bus_slave,
--
2.17.1

32
ALSA-hda-Add-mic-quirk-for-the-Lenovo-G50-30-17aa-39.patch
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@ -1,32 +0,0 @@
From 44002a8818bc64f53d855bc8e3ee4c6bb2d3db99 Mon Sep 17 00:00:00 2001
From: Jeremy Cline <jcline@redhat.com>
Date: Mon, 8 Oct 2018 14:37:52 -0400
Subject: [PATCH] ALSA: hda - Add mic quirk for the Lenovo G50-30 (17aa:3905)
The Lenovo G50-30, like other G50 models, has a Conexant codec that
requires a quirk for its inverted stereo dmic.
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1249364
Reported-by: Alexander Ploumistos <alex.ploumistos@gmail.com>
Tested-by: Alexander Ploumistos <alex.ploumistos@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jeremy Cline <jcline@redhat.com>
---
sound/pci/hda/patch_conexant.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 5592557fe50e..950e02e71766 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -943,6 +943,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = {
SND_PCI_QUIRK(0x17aa, 0x21da, "Lenovo X220", CXT_PINCFG_LENOVO_TP410),
SND_PCI_QUIRK(0x17aa, 0x21db, "Lenovo X220-tablet", CXT_PINCFG_LENOVO_TP410),
SND_PCI_QUIRK(0x17aa, 0x38af, "Lenovo IdeaPad Z560", CXT_FIXUP_MUTE_LED_EAPD),
+ SND_PCI_QUIRK(0x17aa, 0x3905, "Lenovo G50-30", CXT_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x17aa, 0x390b, "Lenovo G50-80", CXT_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x17aa, 0x3975, "Lenovo U300s", CXT_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x17aa, 0x3977, "Lenovo IdeaPad U310", CXT_FIXUP_STEREO_DMIC),
--
2.19.1

115
arm-sdhci-esdhc-imx-fixes.patch
View file

@ -1,118 +1,3 @@
From patchwork Thu Jun 28 07:31:36 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3V
From: Stefan Agner <stefan@agner.ch>
X-Patchwork-Id: 10493185
Message-Id: <20180628073136.21748-1-stefan@agner.ch>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
michael@amarulasolutions.com, linux-mmc@vger.kernel.org,
linux-kernel@vger.kernel.org, Stefan Agner <stefan@agner.ch>
Date: Thu, 28 Jun 2018 09:31:36 +0200
The uSDHC supports DDR modes for eMMC devices running at 3.3V. This
allows to run eMMC with 3.3V signaling voltage at DDR52 mode:
# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index b716b933f00a..6f444731754d 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1324,7 +1324,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
if (esdhc_is_usdhc(imx_data)) {
host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
- host->mmc->caps |= MMC_CAP_1_8V_DDR;
+ host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
From patchwork Thu Jun 28 08:13:29 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [1/3] mmc: sdhci-esdhc-imx: get rid of support_vsel
From: Stefan Agner <stefan@agner.ch>
X-Patchwork-Id: 10493269
Message-Id: <20180628081331.13051-2-stefan@agner.ch>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
Stefan Agner <stefan@agner.ch>
Date: Thu, 28 Jun 2018 10:13:29 +0200
The field support_vsel is currently only used in the device tree
case. Get rid of it. No change in behavior.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++------
include/linux/platform_data/mmc-esdhc-imx.h | 2 --
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 6f444731754d..20a420b765b3 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1145,18 +1145,14 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
&boarddata->tuning_start_tap);
if (of_find_property(np, "no-1-8-v", NULL))
- boarddata->support_vsel = false;
- else
- boarddata->support_vsel = true;
+ host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
boarddata->delay_line = 0;
mmc_of_parse_voltage(np, &host->ocr_mask);
- /* sdr50 and sdr104 need work on 1.8v signal voltage */
- if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
- !IS_ERR(imx_data->pins_default)) {
+ if (esdhc_is_usdhc(imx_data) && !IS_ERR(imx_data->pins_default)) {
imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
ESDHC_PINCTRL_STATE_100MHZ);
imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h
index 7daa78a2f342..640dec8b5b0c 100644
--- a/include/linux/platform_data/mmc-esdhc-imx.h
+++ b/include/linux/platform_data/mmc-esdhc-imx.h
@@ -34,7 +34,6 @@ enum cd_types {
* @cd_gpio: gpio for card_detect interrupt
* @wp_type: type of write_protect method (see wp_types enum above)
* @cd_type: type of card_detect method (see cd_types enum above)
- * @support_vsel: indicate it supports 1.8v switching
*/
struct esdhc_platform_data {
@@ -43,7 +42,6 @@ struct esdhc_platform_data {
enum wp_types wp_type;
enum cd_types cd_type;
int max_bus_width;
- bool support_vsel;
unsigned int delay_line;
unsigned int tuning_step; /* The delay cell steps in tuning procedure */
unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */
From patchwork Thu Jun 28 08:13:30 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0

1798
arm64-96boards-Rock960-CE-board-support.patch Normal file
View file

File diff suppressed because it is too large Load diff

862
arm64-rockchip-add-initial-Rockpro64.patch Normal file
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@ -0,0 +1,862 @@
From patchwork Wed Sep 26 06:24:57 2018
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From: Akash Gajjar <Akash_Gajjar@mentor.com>
To: <heiko@sntech.de>
Subject: [PATCH v3] arm64: dts: rockchip: add initial dts support for
Rockpro64
Date: Wed, 26 Sep 2018 11:54:57 +0530
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Cc: Mark Rutland <mark.rutland@arm.com>,
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linux-rockchip@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
Klaus Goger <klaus.goger@theobroma-systems.com>,
Philippe Ombredanne <pombredanne@nexb.com>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
Pragnesh_patel@mentor.com, Deepak_das@mentor.com,
Levin Du <djw@t-chip.com.cn>,
Ezequiel Garcia <ezequiel@collabora.com>, Pierre-Hugues Husson <phh@phh.me>,
linux-arm-kernel@lists.infradead.org
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Rockpro64 is a rockchip RK3399 based board from pine64.org.
This patch adds basic device node support for Rockpro64 board and make it able
to bring up.
Peripheral Works
- Sdcard
- USB 2.0, 3.0
- Leds
- Ethernet
- Debug console
Not working:
- USB Type-C
Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com>
Acked-by: Deepak Das <Deepak_Das@mentor.com>
---
changes for v2
- Added support for usb 2.0, 3.0
- Added fusb302 node and its regulator support
- Cleanup pinctrl node
- Remove backlight, pcie, sound codec node inherited from firefly-rk3399 dts
changes for v3
- Added copyright properly
- Typo correction in commit message
Documentation/devicetree/bindings/arm/rockchip.txt | 4 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 692 +++++++++++++++++++++
3 files changed, 697 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index acfd3c7..ac95183 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -160,6 +160,10 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "pine64,rock64", "rockchip,rk3328";
+- Pine64 RockPro64 board:
+ Required root node properties:
+ - compatible = "pine64,rockpro64", "rockchip,rk3399";
+
- Rockchip PX3 Evaluation board:
Required root node properties:
- compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b0092d9..03d523a 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -15,5 +15,6 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
new file mode 100644
index 0000000..1d35f54
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
@@ -0,0 +1,692 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "Pine64 RockPro64";
+ compatible = "pine64,rockpro64", "rockchip,rk3399";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ dc_12v: dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwrbtn>;
+
+ power {
+ debounce-interval = <100>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO Key Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
+
+ work-led {
+ label = "work";
+ default-state = "on";
+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+ };
+
+ diy-led {
+ label = "diy";
+ default-state = "off";
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ /* switched by pmic_sleep */
+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_1v8>;
+ };
+
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pwr_en>;
+ regulator-name = "vcc3v3_pcie";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc5v0_typec: vcc5v0-typec-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_typec_en>;
+ regulator-name = "vcc5v0_typec";
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ vin-supply = <&vcc_sys>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc1v8_pmu>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-name = "vcc1v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc2v8_dvp: LDO_REG2 {
+ regulator-name = "vcc2v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-name = "vcc1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-name = "vcca3v0_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-name = "vcca1v8_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
+ regulator-name = "vcc3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-name = "vcc3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <0>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ i2c-scl-rising-time-ns = <300>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&i2c3 {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&i2c4 {
+ i2c-scl-rising-time-ns = <600>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+
+ fusb0: typec-portc@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fusb0_int>;
+ vbus-supply = <&vcc5v0_typec>;
+ status = "okay";
+ };
+};
+
+&i2s0 {
+ rockchip,playback-channels = <8>;
+ rockchip,capture-channels = <8>;
+ status = "okay";
+};
+
+&i2s1 {
+ rockchip,playback-channels = <2>;
+ rockchip,capture-channels = <2>;
+ status = "okay";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc1v8_dvp>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pinctrl {
+ buttons {
+ pwrbtn: pwrbtn {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ fusb302x {
+ fusb0_int: fusb0-int {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ work_led_gpio: work_led-gpio {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ diy_led_gpio: diy_led-gpio {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ lcd-panel {
+ lcd_panel_reset: lcd-panel-reset {
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie_pwr_en: pcie-pwr-en {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vsel1_gpio: vsel1-gpio {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_gpio: vsel2-gpio {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb-typec {
+ vcc5v0_typec_en: vcc5v0_typec_en {
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca1v8_s3>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy1_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};

396
bcm2835-cpufreq-add-CPU-frequency-control-driver.patch Normal file
View file

@ -0,0 +1,396 @@
From 624e057827435de39274c34e20c2d937cb9d4ac3 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Thu, 31 May 2018 19:08:12 +0100
Subject: [PATCH] bcm2835: cpufreq: add CPU frequency control driver
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 7 ++
arch/arm/boot/dts/bcm2837.dtsi | 33 +++++++
drivers/clk/bcm/Kconfig | 8 ++
drivers/clk/bcm/Makefile | 1 +
drivers/clk/bcm/clk-raspberrypi.c | 138 +++++++++++++++++++++++++++++
5 files changed, 187 insertions(+)
create mode 100644 drivers/clk/bcm/clk-raspberrypi.c
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 6c3cfaa77f3d..e6d1627ec421 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -35,6 +35,13 @@
reg = <0x7e00b840 0xf>;
interrupts = <0 2>;
};
+
+ arm_clk: arm_clk {
+ compatible = "raspberrypi,bcm2835-cpu";
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #clock-cells = <0>;
+ clock-output-names = "arm";
+ };
};
};
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index 7704bb029605..c24176282a1f 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -38,6 +38,9 @@
reg = <0>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x000000d8>;
+ clocks = <&arm_clk>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@1 {
@@ -46,6 +49,9 @@
reg = <1>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x000000e0>;
+ clocks = <&arm_clk>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@2 {
@@ -54,6 +60,9 @@
reg = <2>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x000000e8>;
+ clocks = <&arm_clk>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@3 {
@@ -62,6 +71,30 @@
reg = <3>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x000000f0>;
+ clocks = <&arm_clk>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ clock-latency-ns = <355000>;
+ opp-suspend;
+ };
+
+ opp@900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ clock-latency-ns = <355000>;
+ };
+
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ clock-latency-ns = <355000>;
};
};
};
diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 4c4bd85f707c..e40bd19da22b 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -63,3 +63,11 @@ config CLK_BCM_SR
default ARCH_BCM_IPROC
help
Enable common clock framework support for the Broadcom Stingray SoC
+
+config CLK_RASPBERRYPI_CPU
+ bool "Raspberry Pi CPU clock driver"
+ depends on ARCH_BCM2835 || (COMPILE_TEST && OF)
+ depends on RASPBERRYPI_FIRMWARE=y
+ help
+ This enables support for the RPi CPU clock which can be adjusted
+ via the RPi firmware.
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 002661d39128..a028b0a90b6e 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-a
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o
obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o
+obj-$(CONFIG_CLK_RASPBERRYPI_CPU) += clk-raspberrypi.o
obj-$(CONFIG_CLK_BCM_CYGNUS) += clk-cygnus.o
obj-$(CONFIG_CLK_BCM_HR2) += clk-hr2.o
obj-$(CONFIG_CLK_BCM_NSP) += clk-nsp.o
diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
new file mode 100644
index 000000000000..046efc822a59
--- /dev/null
+++ b/drivers/clk/bcm/clk-raspberrypi.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Raspberry Pi CPU clock driver
+ *
+ * Copyright (C) 2018 Stefan Wahren <stefan.wahren@i2se.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <soc/bcm2835/raspberrypi-firmware.h>
+
+#define VCMSG_ID_ARM_CLOCK 0x000000003 /* Clock/Voltage ID's */
+
+struct rpi_cpu_clkgen {
+ struct clk_hw hw;
+ struct rpi_firmware *fw;
+};
+
+/* tag part of the message */
+struct prop {
+ u32 id; /* the ID of the clock/voltage to get or set */
+ u32 val; /* the value (e.g. rate (in Hz)) to set */
+} __packed;
+
+static int rpi_cpu_clock_property(struct rpi_firmware *fw, u32 tag, u32 *val)
+{
+ int ret;
+ struct prop msg = {
+ .id = VCMSG_ID_ARM_CLOCK,
+ .val = *val,
+ };
+
+ ret = rpi_firmware_property(fw, tag, &msg, sizeof(msg));
+ if (ret)
+ return ret;
+
+ *val = msg.val;
+
+ return 0;
+}
+
+static unsigned long rpi_cpu_get_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct rpi_cpu_clkgen *cpu = container_of(hw, struct rpi_cpu_clkgen, hw);
+ u32 rate = 0;
+
+ rpi_cpu_clock_property(cpu->fw, RPI_FIRMWARE_GET_CLOCK_RATE, &rate);
+
+ return rate;
+}
+
+static long rpi_cpu_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ return rate;
+}
+
+static int rpi_cpu_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct rpi_cpu_clkgen *cpu = container_of(hw, struct rpi_cpu_clkgen, hw);
+ u32 new_rate = rate;
+
+ return rpi_cpu_clock_property(cpu->fw, RPI_FIRMWARE_SET_CLOCK_RATE,
+ &new_rate);
+}
+
+static const struct clk_ops rpi_cpu_ops = {
+ .recalc_rate = rpi_cpu_get_rate,
+ .round_rate = rpi_cpu_round_rate,
+ .set_rate = rpi_cpu_set_rate,
+};
+
+static int rpi_cpu_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *fw_node;
+ struct rpi_cpu_clkgen *cpu;
+ struct clk_init_data *init;
+ int ret;
+
+ cpu = devm_kzalloc(dev, sizeof(*cpu), GFP_KERNEL);
+ if (!cpu)
+ return -ENOMEM;
+
+ init = devm_kzalloc(dev, sizeof(*init), GFP_KERNEL);
+ if (!init)
+ return -ENOMEM;
+
+ fw_node = of_find_compatible_node(NULL, NULL,
+ "raspberrypi,bcm2835-firmware");
+ if (!fw_node) {
+ dev_err(dev, "Missing firmware node\n");
+ return -ENOENT;
+ }
+
+ cpu->fw = rpi_firmware_get(fw_node);
+ of_node_put(fw_node);
+ if (!cpu->fw)
+ return -EPROBE_DEFER;
+
+ init->name = dev->of_node->name;
+ init->ops = &rpi_cpu_ops;
+
+ cpu->hw.init = init;
+ ret = devm_clk_hw_register(dev, &cpu->hw);
+ if (ret)
+ return ret;
+
+ return of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get,
+ &cpu->hw);
+}
+
+static const struct of_device_id rpi_cpu_of_match[] = {
+ { .compatible = "raspberrypi,bcm2835-cpu", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, rpi_cpu_of_match);
+
+static struct platform_driver rpi_cpu_driver = {
+ .driver = {
+ .name = "raspberrypi-cpu",
+ .of_match_table = rpi_cpu_of_match,
+ },
+ .probe = rpi_cpu_probe,
+};
+builtin_platform_driver(rpi_cpu_driver);
+
+MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
+MODULE_DESCRIPTION("Raspberry Pi CPU clock driver");
+MODULE_LICENSE("GPL v2");
--
2.17.0
From 40a82f71737891581dcbe45331d15a29dd3e7805 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Mon, 4 Jun 2018 09:14:10 +0100
Subject: [PATCH 7/7] add 1.4 ghz OPP for the 3B+
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
index 4adb85e66be3..aaefb078f391 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
@@ -106,3 +106,10 @@
pinctrl-0 = <&uart1_gpio14>;
status = "okay";
};
+
+&cpu0_opp_table {
+ opp@1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ clock-latency-ns = <355000>;
+ };
+};
--
2.17.1
From d00bd46b40001d3500b8a7207dcfe1d66600e47e Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Wed, 26 Sep 2018 21:13:22 +0200
Subject: [PATCH] ARM: bcm2837: Use CPU0 as cooling device
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
arch/arm/boot/dts/bcm2837.dtsi | 25 +++++++++++++++++++++++++
arch/arm/boot/dts/bcm283x.dtsi | 2 +-
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index 9cfc553..1590d94 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -1,4 +1,5 @@
#include "bcm283x.dtsi"
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "brcm,bcm2837";
@@ -47,6 +48,7 @@
clocks = <&arm_clk>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -58,6 +60,7 @@
clocks = <&arm_clk>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -69,6 +72,7 @@
clocks = <&arm_clk>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -80,6 +84,7 @@
clocks = <&arm_clk>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
};
@@ -117,6 +122,26 @@
&cpu_thermal {
coefficients = <(-538) 412000>;
+
+ trips {
+ cpu_alert0: cpu-alert0 {
+ temperature = <70000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ map1 {
+ trip = <&cpu_crit>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
/* enable thermal sensor with the correct compatible property set */
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 31b2964..2def068 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -38,7 +38,7 @@
thermal-sensors = <&thermal>;
trips {
- cpu-crit {
+ cpu_crit: cpu-crit {
temperature = <80000>;
hysteresis = <0>;
type = "critical";
--
2.7.4

31
bcm2837-enable-pmu.patch
View file

@ -1,31 +0,0 @@
From 69e52712002cb6768b894cde9620fb426fd8728d Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Fri, 16 Mar 2018 21:49:37 +0100
Subject: [PATCH] ARM: dts: bcm2837: Enable PMU on Raspberry Pi 3
This enables the PMU (performance monitoring unit) on Raspberry Pi 3.
In order to make it work on ARM and ARM64, we need to specify two
compatible strings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
arch/arm/boot/dts/bcm2837.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index 7704bb029605..1f5e5c782835 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -17,6 +17,12 @@
};
};
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu";
+ interrupt-parent = <&local_intc>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;

40
bcm283x-drm-vc4-set-is_yuv-to-false-when-num_planes-1.patch Normal file
View file

@ -0,0 +1,40 @@
From patchwork Tue Oct 9 13:24:46 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: drm/vc4: Set ->is_yuv to false when num_planes == 1
From: Boris Brezillon <boris.brezillon@bootlin.com>
X-Patchwork-Id: 255528
Message-Id: <20181009132446.21960-1-boris.brezillon@bootlin.com>
To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
dri-devel@lists.freedesktop.org, Eric Anholt <eric@anholt.net>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
Date: Tue, 9 Oct 2018 15:24:46 +0200
When vc4_plane_state is duplicated ->is_yuv is left assigned to its
previous value, and we never set it back to false when switching to
a non-YUV format.
Fix that by setting ->is_yuv to false in the 'num_planes == 1' branch
of the vc4_plane_setup_clipping_and_scaling() function.
Fixes: fc04023fafecf ("drm/vc4: Add support for YUV planes.")
Cc: <stable@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
drivers/gpu/drm/vc4/vc4_plane.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index d04b3c3246ba..60d5ad19cedd 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -321,6 +321,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
if (vc4_state->is_unity)
vc4_state->x_scaling[0] = VC4_SCALING_PPF;
} else {
+ vc4_state->is_yuv = false;
vc4_state->x_scaling[1] = VC4_SCALING_NONE;
vc4_state->y_scaling[1] = VC4_SCALING_NONE;
}

1028
brcmfmac-Remove-firmware-loading-code-duplication.patch Normal file
View file

File diff suppressed because it is too large Load diff

2
configs/config_generation
View file

@ -15,8 +15,6 @@ x86_64-debug=generic:generic-x86:generic-x86-x86_64:debug:debug-x86:debug-x86-x8
# i686
i686=generic:generic-x86:generic-x86-i686
i686-debug=generic:generic-x86:generic-x86-i686:debug:debug-x86
i686-PAE=generic:generic-x86:generic-x86-i686PAE
i686-PAEdebug=generic:generic-x86:generic-x86-i686PAE:debug:debug-x86
# ppc64
ppc64=generic:generic-powerpc:generic-powerpc-powerpc64

1
configs/fedora/debug/CONFIG_IOMMU_DEBUGFS Normal file
View file

@ -0,0 +1 @@
CONFIG_IOMMU_DEBUGFS=y

1
configs/fedora/generic/CONFIG_AD5758 Normal file
View file

@ -0,0 +1 @@
# CONFIG_AD5758 is not set

1
configs/fedora/generic/CONFIG_AFS_DEBUG Normal file
View file

@ -0,0 +1 @@
CONFIG_AFS_DEBUG=y

2
configs/fedora/generic/CONFIG_AFS_FS
View file

@ -1 +1 @@
# CONFIG_AFS_FS is not set
CONFIG_AFS_FS=m

1
configs/fedora/generic/CONFIG_AFS_FSCACHE Normal file
View file

@ -0,0 +1 @@
CONFIG_AFS_FSCACHE=y

2
configs/fedora/generic/CONFIG_AF_RXRPC
View file

@ -1 +1 @@
# CONFIG_AF_RXRPC is not set
CONFIG_AF_RXRPC=m

1
configs/fedora/generic/CONFIG_AF_RXRPC_DEBUG Normal file
View file

@ -0,0 +1 @@
CONFIG_AF_RXRPC_DEBUG=y

1
configs/fedora/generic/CONFIG_AF_RXRPC_INJECT_LOSS Normal file
View file

@ -0,0 +1 @@
# CONFIG_AF_RXRPC_INJECT_LOSS is not set

1
configs/fedora/generic/CONFIG_AF_RXRPC_IPV6 Normal file
View file

@ -0,0 +1 @@
CONFIG_AF_RXRPC_IPV6=y

1
configs/fedora/generic/CONFIG_AMD_IOMMU_DEBUGFS Normal file
View file

@ -0,0 +1 @@
# CONFIG_AMD_IOMMU_DEBUGFS is not set

1
configs/fedora/generic/CONFIG_BCM2835_VCHIQ
View file

@ -1 +0,0 @@
# CONFIG_BCM2835_VCHIQ is not set

1
configs/fedora/generic/CONFIG_BE2NET_BE2 Normal file
View file

@ -0,0 +1 @@
CONFIG_BE2NET_BE2=y

1
configs/fedora/generic/CONFIG_BE2NET_BE3 Normal file
View file

@ -0,0 +1 @@
CONFIG_BE2NET_BE3=y

1
configs/fedora/generic/CONFIG_BE2NET_LANCER Normal file
View file

@ -0,0 +1 @@
CONFIG_BE2NET_LANCER=y

1
configs/fedora/generic/CONFIG_BE2NET_SKYHAWK Normal file
View file

@ -0,0 +1 @@
CONFIG_BE2NET_SKYHAWK=y

1
configs/fedora/generic/CONFIG_BLK_CGROUP_IOLATENCY Normal file
View file

@ -0,0 +1 @@
CONFIG_BLK_CGROUP_IOLATENCY=y

1
configs/fedora/generic/CONFIG_BME680 Normal file
View file

@ -0,0 +1 @@
# CONFIG_BME680 is not set

1
configs/fedora/generic/CONFIG_BNXT_HWMON Normal file
View file

@ -0,0 +1 @@
CONFIG_BNXT_HWMON=y

1
configs/fedora/generic/CONFIG_BT_HCIUART_RTL Normal file
View file

@ -0,0 +1 @@
# CONFIG_BT_HCIUART_RTL is not set

1
configs/fedora/generic/CONFIG_BT_MTKUART Normal file
View file

@ -0,0 +1 @@
# CONFIG_BT_MTKUART is not set

1
configs/fedora/generic/CONFIG_CAN_UCAN Normal file
View file

@ -0,0 +1 @@
# CONFIG_CAN_UCAN is not set

1
configs/fedora/generic/CONFIG_CHARGER_ADP5061 Normal file
View file

@ -0,0 +1 @@
# CONFIG_CHARGER_ADP5061 is not set

1
configs/fedora/generic/CONFIG_CHARGER_CROS_USBPD Normal file
View file

@ -0,0 +1 @@
# CONFIG_CHARGER_CROS_USBPD is not set

1
configs/fedora/generic/CONFIG_CHARGER_MANAGER Normal file
View file

@ -0,0 +1 @@
# CONFIG_CHARGER_MANAGER is not set

1
configs/fedora/generic/CONFIG_CIFS_ALLOW_INSECURE_LEGACY Normal file
View file

@ -0,0 +1 @@
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y

1
configs/fedora/generic/CONFIG_COMMON_CLK_AXG_AUDIO Normal file
View file

@ -0,0 +1 @@
# CONFIG_COMMON_CLK_AXG_AUDIO is not set

1
configs/fedora/generic/CONFIG_COMMON_CLK_MAX9485 Normal file
View file

@ -0,0 +1 @@
# CONFIG_COMMON_CLK_MAX9485 is not set

1
configs/fedora/generic/CONFIG_CRC64 Normal file
View file

@ -0,0 +1 @@
CONFIG_CRC64=m

1
configs/fedora/generic/CONFIG_CRYPTO_DEV_HISI_SEC Normal file
View file

@ -0,0 +1 @@
# CONFIG_CRYPTO_DEV_HISI_SEC is not set

1
configs/fedora/generic/CONFIG_DRM_DP_CEC Normal file
View file

@ -0,0 +1 @@
# CONFIG_DRM_DP_CEC is not set

1
configs/fedora/generic/CONFIG_DRM_PANEL_ILITEK_ILI9881C Normal file
View file

@ -0,0 +1 @@
# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set

1
configs/fedora/generic/CONFIG_DRM_VKMS Normal file
View file

@ -0,0 +1 @@
# CONFIG_DRM_VKMS is not set

1
configs/fedora/generic/CONFIG_EROFS_FS Normal file
View file

@ -0,0 +1 @@
# CONFIG_EROFS_FS is not set

1
configs/fedora/generic/CONFIG_FPGA_DFL Normal file
View file

@ -0,0 +1 @@
# CONFIG_FPGA_DFL is not set

1
configs/fedora/generic/CONFIG_FSI_NEW_DEV_NODE Normal file
View file

@ -0,0 +1 @@
# CONFIG_FSI_NEW_DEV_NODE is not set

1
configs/fedora/generic/CONFIG_FSI_SBEFIFO Normal file
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@ -0,0 +1 @@
# CONFIG_FSI_SBEFIFO is not set

1
configs/fedora/generic/CONFIG_GNSS Normal file
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@ -0,0 +1 @@
# CONFIG_GNSS is not set

1
configs/fedora/generic/CONFIG_HID_COUGAR Normal file
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@ -0,0 +1 @@
CONFIG_HID_COUGAR=m

1
configs/fedora/generic/CONFIG_I2C_FSI Normal file
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@ -0,0 +1 @@
# CONFIG_I2C_FSI is not set

1
configs/fedora/generic/CONFIG_I2C_QCOM_GENI Normal file
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@ -0,0 +1 @@
# CONFIG_I2C_QCOM_GENI is not set

1
configs/fedora/generic/CONFIG_IDLE_INJECT Normal file
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@ -0,0 +1 @@
# CONFIG_IDLE_INJECT is not set

1
configs/fedora/generic/CONFIG_IEEE802154_HWSIM Normal file
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@ -0,0 +1 @@
# CONFIG_IEEE802154_HWSIM is not set

1
configs/fedora/generic/CONFIG_INPUT_REGULATOR_HAPTIC Normal file
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@ -0,0 +1 @@
CONFIG_INPUT_REGULATOR_HAPTIC=m

1
configs/fedora/generic/CONFIG_IOMMU_DEBUGFS Normal file
View file

@ -0,0 +1 @@
# CONFIG_IOMMU_DEBUGFS is not set

1
configs/fedora/generic/CONFIG_IOMMU_DEFAULT_PASSTHROUGH Normal file
View file

@ -0,0 +1 @@
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set

1
configs/fedora/generic/CONFIG_ISL29501 Normal file
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@ -0,0 +1 @@
# CONFIG_ISL29501 is not set

1
configs/fedora/generic/CONFIG_KERNEL_UNCOMPRESSED Normal file
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@ -0,0 +1 @@
# CONFIG_KERNEL_UNCOMPRESSED is not set

1
configs/fedora/generic/CONFIG_KPROBE_EVENTS_ON_NOTRACE Normal file
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@ -0,0 +1 @@
# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set

1
configs/fedora/generic/CONFIG_MFD_MADERA Normal file
View file

@ -0,0 +1 @@
# CONFIG_MFD_MADERA is not set

1
configs/fedora/generic/CONFIG_MFD_ROHM_BD718XX Normal file
View file

@ -0,0 +1 @@
# CONFIG_MFD_ROHM_BD718XX is not set

1
configs/fedora/generic/CONFIG_MLX5_EN_ARFS Normal file
View file

@ -0,0 +1 @@
CONFIG_MLX5_EN_ARFS=y

1
configs/fedora/generic/CONFIG_MLX5_EN_RXNFC Normal file
View file

@ -0,0 +1 @@
CONFIG_MLX5_EN_RXNFC=y

1
configs/fedora/generic/CONFIG_MLXREG_IO Normal file
View file

@ -0,0 +1 @@
CONFIG_MLXREG_IO=m

1
configs/fedora/generic/CONFIG_MMC_SDHCI_OF_DWCMSHC Normal file
View file

@ -0,0 +1 @@
# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set

1
configs/fedora/generic/CONFIG_MT76x0U Normal file
View file

@ -0,0 +1 @@
CONFIG_MT76x0U=m

1
configs/fedora/generic/CONFIG_MT76x2U Normal file
View file

@ -0,0 +1 @@
CONFIG_MT76x2U=m

1
configs/fedora/generic/CONFIG_MTD_NAND_TEGRA Normal file
View file

@ -0,0 +1 @@
# CONFIG_MTD_NAND_TEGRA is not set

1
configs/fedora/generic/CONFIG_MTD_SPI_NAND Normal file
View file

@ -0,0 +1 @@
# CONFIG_MTD_SPI_NAND is not set

1
configs/fedora/generic/CONFIG_MUX_ADGS1408 Normal file
View file

@ -0,0 +1 @@
# CONFIG_MUX_ADGS1408 is not set

1
configs/fedora/generic/CONFIG_NETFILTER_NETLINK_OSF Normal file
View file

@ -0,0 +1 @@
CONFIG_NETFILTER_NETLINK_OSF=m

1
configs/fedora/generic/CONFIG_NET_DSA_REALTEK_SMI Normal file
View file

@ -0,0 +1 @@
# CONFIG_NET_DSA_REALTEK_SMI is not set

1
configs/fedora/generic/CONFIG_NET_DSA_VITESSE_VSC73XX Normal file
View file

@ -0,0 +1 @@
# CONFIG_NET_DSA_VITESSE_VSC73XX is not set

1
configs/fedora/generic/CONFIG_NET_SCH_CAKE Normal file
View file

@ -0,0 +1 @@
# CONFIG_NET_SCH_CAKE is not set

1
configs/fedora/generic/CONFIG_NET_SCH_ETF Normal file
View file

@ -0,0 +1 @@
# CONFIG_NET_SCH_ETF is not set

1
configs/fedora/generic/CONFIG_NET_SCH_SKBPRIO Normal file
View file

@ -0,0 +1 @@
# CONFIG_NET_SCH_SKBPRIO is not set

1
configs/fedora/generic/CONFIG_NET_VENDOR_CADENCE Normal file
View file

@ -0,0 +1 @@
CONFIG_NET_VENDOR_CADENCE=y

1
configs/fedora/generic/CONFIG_NET_VENDOR_NETERION Normal file
View file

@ -0,0 +1 @@
CONFIG_NET_VENDOR_NETERION=y

1
configs/fedora/generic/CONFIG_NET_VENDOR_PACKET_ENGINES Normal file
View file

@ -0,0 +1 @@
CONFIG_NET_VENDOR_PACKET_ENGINES=y

1
configs/fedora/generic/CONFIG_NFT_OSF Normal file
View file

@ -0,0 +1 @@
# CONFIG_NFT_OSF is not set

1
configs/fedora/generic/CONFIG_NFT_TPROXY Normal file
View file

@ -0,0 +1 @@
# CONFIG_NFT_TPROXY is not set

1
configs/fedora/generic/CONFIG_NFT_TUNNEL Normal file
View file

@ -0,0 +1 @@
# CONFIG_NFT_TUNNEL is not set

1
configs/fedora/generic/CONFIG_OVERLAY_FS_METACOPY Normal file
View file

@ -0,0 +1 @@
# CONFIG_OVERLAY_FS_METACOPY is not set

1
configs/fedora/generic/CONFIG_PCIE_MOBIVEIL Normal file
View file

@ -0,0 +1 @@
# CONFIG_PCIE_MOBIVEIL is not set

1
configs/fedora/generic/CONFIG_PCIE_XILINX Normal file
View file

@ -0,0 +1 @@
# CONFIG_PCIE_XILINX is not set

1
configs/fedora/generic/CONFIG_POWER_RESET_QCOM_PON Normal file
View file

@ -0,0 +1 @@
# CONFIG_POWER_RESET_QCOM_PON is not set

1
configs/fedora/generic/CONFIG_PREEMPTIRQ_DELAY_TEST Normal file
View file

@ -0,0 +1 @@
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set

1
configs/fedora/generic/CONFIG_PSTORE_ZSTD_COMPRESS Normal file
View file

@ -0,0 +1 @@
# CONFIG_PSTORE_ZSTD_COMPRESS is not set

1
configs/fedora/generic/CONFIG_QCOM_LLCC Normal file
View file

@ -0,0 +1 @@
# CONFIG_QCOM_LLCC is not set

1
configs/fedora/generic/CONFIG_QCOM_Q6V5_WCSS Normal file
View file

@ -0,0 +1 @@
# CONFIG_QCOM_Q6V5_WCSS is not set

1
configs/fedora/generic/CONFIG_QCOM_RPMH Normal file
View file

@ -0,0 +1 @@
# CONFIG_QCOM_RPMH is not set

2
configs/fedora/generic/CONFIG_RANDOM_TRUST_CPU
View file

@ -1 +1 @@
CONFIG_RANDOM_TRUST_CPU=y
# CONFIG_RANDOM_TRUST_CPU is not set

1
configs/fedora/generic/CONFIG_REGULATOR_ACT8865 Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_ACT8865 is not set

1
configs/fedora/generic/CONFIG_REGULATOR_AD5398 Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_AD5398 is not set

1
configs/fedora/generic/CONFIG_REGULATOR_DA9210 Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_DA9210 is not set

1
configs/fedora/generic/CONFIG_REGULATOR_DA9211 Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_DA9211 is not set

0
configs/fedora/generic/x86/x86_64/CONFIG_REGULATOR_FAN53555 → configs/fedora/generic/CONFIG_REGULATOR_FAN53555
View file

1
configs/fedora/generic/CONFIG_REGULATOR_FIXED_VOLTAGE Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set

1
configs/fedora/generic/CONFIG_REGULATOR_GPIO Normal file
View file

@ -0,0 +1 @@
# CONFIG_REGULATOR_GPIO is not set

Some files were not shown because too many files have changed in this diff Show more