diff --git a/0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch b/0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch new file mode 100644 index 000000000..1f03d710b --- /dev/null +++ b/0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch @@ -0,0 +1,163 @@ +From 25bb14c1e78e641049fd1ee0c404a9ccd2755e44 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sat, 22 Jul 2017 13:00:05 +0200 +Subject: [PATCH 1/2] Input: gpio_keys - Allow suppression of input events for + wakeup button presses + +In some cases it is undesirable for a wakeup button to send input events +to userspace if pressed to wakeup the system (if pressed during suspend). + +A typical example of this is the power-button on laptops / tablets, +sending a KEY_POWER event to userspace when woken up with the power-button +will cause userspace to immediately suspend the system again which is +undesirable. + +For power-buttons attached to a PMIC, or handled by e.g. ACPI, not sending +an input event in this case is take care of by the PMIC / ACPI hardware / +code. But in the case of a GPIO button we need to explicitly suppress the +sending of the input event. + +This commit adds support for this by adding a no_wakeup_events bool to +struct gpio_keys_button, which platform code can set to suppress the +input events for presses of wakeup keys during suspend. + +Signed-off-by: Hans de Goede +--- +Changes in v2: +-This is a rewrite if my "Input: gpio_keys - Do not report wake button + presses as evdev events" patch. +-Instead of unconditionally ignoring presses of all wake-up buttons during + suspend, this rewrite makes this configurable per button +-This version uses a timer to delay clearing the suspended flag for software + debouncing, rather then jiffy compare magic +--- + drivers/input/keyboard/gpio_keys.c | 33 +++++++++++++++++++++++++++++++-- + include/linux/gpio_keys.h | 3 +++ + 2 files changed, 34 insertions(+), 2 deletions(-) + +diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c +index a047b9af8369..fa3a58620407 100644 +--- a/drivers/input/keyboard/gpio_keys.c ++++ b/drivers/input/keyboard/gpio_keys.c +@@ -38,6 +38,7 @@ struct gpio_button_data { + + unsigned short *code; + ++ struct timer_list unsuspend_timer; + struct timer_list release_timer; + unsigned int release_delay; /* in msecs, for IRQ-only buttons */ + +@@ -371,6 +372,9 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata) + return; + } + ++ if (state && bdata->button->no_wakeup_events && bdata->suspended) ++ return; ++ + if (type == EV_ABS) { + if (state) + input_event(input, type, button->code, button->value); +@@ -400,6 +404,9 @@ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id) + if (bdata->button->wakeup) { + const struct gpio_keys_button *button = bdata->button; + ++ if (bdata->button->no_wakeup_events && bdata->suspended) ++ return IRQ_HANDLED; ++ + pm_stay_awake(bdata->input->dev.parent); + if (bdata->suspended && + (button->type == 0 || button->type == EV_KEY)) { +@@ -445,9 +452,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id) + spin_lock_irqsave(&bdata->lock, flags); + + if (!bdata->key_pressed) { +- if (bdata->button->wakeup) ++ if (bdata->button->wakeup) { + pm_wakeup_event(bdata->input->dev.parent, 0); + ++ if (bdata->button->no_wakeup_events && bdata->suspended) ++ goto out; ++ } ++ + input_event(input, EV_KEY, *bdata->code, 1); + input_sync(input); + +@@ -468,6 +479,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id) + return IRQ_HANDLED; + } + ++static void gpio_keys_unsuspend_timer(unsigned long _data) ++{ ++ struct gpio_button_data *bdata = (struct gpio_button_data *)_data; ++ ++ bdata->suspended = false; ++} ++ + static void gpio_keys_quiesce_key(void *data) + { + struct gpio_button_data *bdata = data; +@@ -476,6 +494,8 @@ static void gpio_keys_quiesce_key(void *data) + cancel_delayed_work_sync(&bdata->work); + else + del_timer_sync(&bdata->release_timer); ++ ++ del_timer_sync(&bdata->unsuspend_timer); + } + + static int gpio_keys_setup_key(struct platform_device *pdev, +@@ -496,6 +516,8 @@ static int gpio_keys_setup_key(struct platform_device *pdev, + bdata->input = input; + bdata->button = button; + spin_lock_init(&bdata->lock); ++ setup_timer(&bdata->unsuspend_timer, gpio_keys_unsuspend_timer, ++ (unsigned long)bdata); + + if (child) { + bdata->gpiod = devm_fwnode_get_gpiod_from_child(dev, NULL, +@@ -868,6 +890,7 @@ static int __maybe_unused gpio_keys_suspend(struct device *dev) + struct gpio_button_data *bdata = &ddata->data[i]; + if (bdata->button->wakeup) + enable_irq_wake(bdata->irq); ++ del_timer_sync(&bdata->unsuspend_timer); + bdata->suspended = true; + } + } else { +@@ -892,7 +915,13 @@ static int __maybe_unused gpio_keys_resume(struct device *dev) + struct gpio_button_data *bdata = &ddata->data[i]; + if (bdata->button->wakeup) + disable_irq_wake(bdata->irq); +- bdata->suspended = false; ++ if (bdata->button->no_wakeup_events) { ++ mod_timer(&bdata->unsuspend_timer, jiffies + ++ msecs_to_jiffies( ++ bdata->software_debounce)); ++ } else { ++ bdata->suspended = false; ++ } + } + } else { + mutex_lock(&input->mutex); +diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h +index 0b71024c082c..d8a85e52b6bb 100644 +--- a/include/linux/gpio_keys.h ++++ b/include/linux/gpio_keys.h +@@ -15,6 +15,8 @@ struct device; + * @debounce_interval: debounce ticks interval in msecs + * @can_disable: %true indicates that userspace is allowed to + * disable button via sysfs ++ * @no_wakeup_events: For wake-up source buttons only, if %true then no input ++ * events will be generated if pressed while suspended + * @value: axis value for %EV_ABS + * @irq: Irq number in case of interrupt keys + */ +@@ -27,6 +29,7 @@ struct gpio_keys_button { + int wakeup; + int debounce_interval; + bool can_disable; ++ bool no_wakeup_events; + int value; + unsigned int irq; + }; +-- +2.13.4 + diff --git a/0001-Make-get_cert_list-not-complain-about-cert-lists-tha.patch b/0001-Make-get_cert_list-not-complain-about-cert-lists-tha.patch new file mode 100644 index 000000000..6e8a2e039 --- /dev/null +++ b/0001-Make-get_cert_list-not-complain-about-cert-lists-tha.patch @@ -0,0 +1,109 @@ +From 3ce5852ec6add45a28fe1706e9163351940e905c Mon Sep 17 00:00:00 2001 +From: Peter Jones +Date: Mon, 2 Oct 2017 18:25:29 -0400 +Subject: [PATCH 1/3] Make get_cert_list() not complain about cert lists that + aren't present. + +Signed-off-by: Peter Jones +--- + certs/load_uefi.c | 37 ++++++++++++++++++++++--------------- + 1 file changed, 22 insertions(+), 15 deletions(-) + +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index 3d884598601..9ef34c44fd1 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -35,8 +35,8 @@ static __init bool uefi_check_ignore_db(void) + /* + * Get a certificate list blob from the named EFI variable. + */ +-static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, +- unsigned long *size) ++static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid, ++ unsigned long *size, void **cert_list) + { + efi_status_t status; + unsigned long lsize = 4; +@@ -44,26 +44,33 @@ static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, + void *db; + + status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); ++ if (status == EFI_NOT_FOUND) { ++ *size = 0; ++ *cert_list = NULL; ++ return 0; ++ } ++ + if (status != EFI_BUFFER_TOO_SMALL) { + pr_err("Couldn't get size: 0x%lx\n", status); +- return NULL; ++ return efi_status_to_err(status); + } + + db = kmalloc(lsize, GFP_KERNEL); + if (!db) { + pr_err("Couldn't allocate memory for uefi cert list\n"); +- return NULL; ++ return -ENOMEM; + } + + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); + pr_err("Error reading db var: 0x%lx\n", status); +- return NULL; ++ return efi_status_to_err(status); + } + + *size = lsize; +- return db; ++ *cert_list = db; ++ return 0; + } + + /* +@@ -152,10 +159,10 @@ static int __init load_uefi_certs(void) + * an error if we can't get them. + */ + if (!uefi_check_ignore_db()) { +- db = get_cert_list(L"db", &secure_var, &dbsize); +- if (!db) { ++ rc = get_cert_list(L"db", &secure_var, &dbsize, &db); ++ if (rc < 0) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); +- } else { ++ } else if (dbsize != 0) { + rc = parse_efi_signature_list("UEFI:db", + db, dbsize, get_handler_for_db); + if (rc) +@@ -164,10 +171,10 @@ static int __init load_uefi_certs(void) + } + } + +- mok = get_cert_list(L"MokListRT", &mok_var, &moksize); +- if (!mok) { ++ rc = get_cert_list(L"MokListRT", &mok_var, &moksize, &mok); ++ if (rc < 0) { + pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); +- } else { ++ } else if (moksize != 0) { + rc = parse_efi_signature_list("UEFI:MokListRT", + mok, moksize, get_handler_for_db); + if (rc) +@@ -175,10 +182,10 @@ static int __init load_uefi_certs(void) + kfree(mok); + } + +- dbx = get_cert_list(L"dbx", &secure_var, &dbxsize); +- if (!dbx) { ++ rc = get_cert_list(L"dbx", &secure_var, &dbxsize, &dbx); ++ if (rc < 0) { + pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); +- } else { ++ } else if (dbxsize != 0) { + rc = parse_efi_signature_list("UEFI:dbx", + dbx, dbxsize, + get_handler_for_dbx); +-- +2.15.0 + diff --git a/0001-platform-x86-dell-laptop-Filter-out-spurious-keyboar.patch b/0001-platform-x86-dell-laptop-Filter-out-spurious-keyboar.patch new file mode 100644 index 000000000..926487b3d --- /dev/null +++ b/0001-platform-x86-dell-laptop-Filter-out-spurious-keyboar.patch @@ -0,0 +1,99 @@ +From 714fe15daa07e7691c9731c88de71aa57f84b6c2 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Wed, 3 Jan 2018 11:13:54 +0100 +Subject: [PATCH] platform/x86: dell-laptop: Filter out spurious keyboard + backlight change events + +On some Dell XPS models WMI events of type 0x0000 reporting a keycode of +0xe00c get reported when the brightness of the LCD panel changes. + +This leads to us reporting false-positive kbd_led change events to +userspace which in turn leads to the kbd backlight OSD showing when it +should not. + +We already read the current keyboard backlight brightness value when +reporting events because the led_classdev_notify_brightness_hw_changed +API requires this. Compare this value to the last known value and filter +out duplicate events, fixing this. + +Note the fixed issue is esp. a problem on XPS models with an ambient light +sensor and automatic brightness adjustments turned on, this causes the kbd +backlight OSD to show all the time there. + +BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1514969 +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/dell-laptop.c | 24 ++++++++++++++++++++++-- + 1 file changed, 22 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c +index cd4725e7e0b5..2ef3297a9efc 100644 +--- a/drivers/platform/x86/dell-laptop.c ++++ b/drivers/platform/x86/dell-laptop.c +@@ -1133,6 +1133,7 @@ static u8 kbd_previous_mode_bit; + + static bool kbd_led_present; + static DEFINE_MUTEX(kbd_led_mutex); ++static enum led_brightness kbd_led_level; + + /* + * NOTE: there are three ways to set the keyboard backlight level. +@@ -1947,6 +1948,7 @@ static enum led_brightness kbd_led_level_get(struct led_classdev *led_cdev) + static int kbd_led_level_set(struct led_classdev *led_cdev, + enum led_brightness value) + { ++ enum led_brightness new_value = value; + struct kbd_state state; + struct kbd_state new_state; + u16 num; +@@ -1976,6 +1978,9 @@ static int kbd_led_level_set(struct led_classdev *led_cdev, + } + + out: ++ if (ret == 0) ++ kbd_led_level = new_value; ++ + mutex_unlock(&kbd_led_mutex); + return ret; + } +@@ -2003,6 +2008,9 @@ static int __init kbd_led_init(struct device *dev) + if (kbd_led.max_brightness) + kbd_led.max_brightness--; + } ++ ++ kbd_led_level = kbd_led_level_get(NULL); ++ + ret = led_classdev_register(dev, &kbd_led); + if (ret) + kbd_led_present = false; +@@ -2027,13 +2035,25 @@ static void kbd_led_exit(void) + static int dell_laptop_notifier_call(struct notifier_block *nb, + unsigned long action, void *data) + { ++ bool changed = false; ++ enum led_brightness new_kbd_led_level; ++ + switch (action) { + case DELL_LAPTOP_KBD_BACKLIGHT_BRIGHTNESS_CHANGED: + if (!kbd_led_present) + break; + +- led_classdev_notify_brightness_hw_changed(&kbd_led, +- kbd_led_level_get(&kbd_led)); ++ mutex_lock(&kbd_led_mutex); ++ new_kbd_led_level = kbd_led_level_get(&kbd_led); ++ if (kbd_led_level != new_kbd_led_level) { ++ kbd_led_level = new_kbd_led_level; ++ changed = true; ++ } ++ mutex_unlock(&kbd_led_mutex); ++ ++ if (changed) ++ led_classdev_notify_brightness_hw_changed(&kbd_led, ++ kbd_led_level); + break; + } + +-- +2.14.3 + diff --git a/0001-usb-usbtest-fix-NULL-pointer-dereference.patch b/0001-usb-usbtest-fix-NULL-pointer-dereference.patch new file mode 100644 index 000000000..acc03ec7d --- /dev/null +++ b/0001-usb-usbtest-fix-NULL-pointer-dereference.patch @@ -0,0 +1,41 @@ +From 7c80f9e4a588f1925b07134bb2e3689335f6c6d8 Mon Sep 17 00:00:00 2001 +From: Alan Stern +Date: Fri, 29 Sep 2017 10:54:24 -0400 +Subject: [PATCH] usb: usbtest: fix NULL pointer dereference + +If the usbtest driver encounters a device with an IN bulk endpoint but +no OUT bulk endpoint, it will try to dereference a NULL pointer +(out->desc.bEndpointAddress). The problem can be solved by adding a +missing test. + +Signed-off-by: Alan Stern +Reported-by: Andrey Konovalov +Tested-by: Andrey Konovalov +Signed-off-by: Felipe Balbi +--- + drivers/usb/misc/usbtest.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c +index 113e38bfe0ef..b3fc602b2e24 100644 +--- a/drivers/usb/misc/usbtest.c ++++ b/drivers/usb/misc/usbtest.c +@@ -202,12 +202,13 @@ get_endpoints(struct usbtest_dev *dev, struct usb_interface *intf) + return tmp; + } + +- if (in) { ++ if (in) + dev->in_pipe = usb_rcvbulkpipe(udev, + in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); ++ if (out) + dev->out_pipe = usb_sndbulkpipe(udev, + out->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); +- } ++ + if (iso_in) { + dev->iso_in = &iso_in->desc; + dev->in_iso_pipe = usb_rcvisocpipe(udev, +-- +2.13.6 + diff --git a/0002-Add-efi_status_to_str-and-rework-efi_status_to_err.patch b/0002-Add-efi_status_to_str-and-rework-efi_status_to_err.patch new file mode 100644 index 000000000..0844550b6 --- /dev/null +++ b/0002-Add-efi_status_to_str-and-rework-efi_status_to_err.patch @@ -0,0 +1,183 @@ +From c8218e9b3c38fcd36a2d06eec09952a0c6cee9e0 Mon Sep 17 00:00:00 2001 +From: Peter Jones +Date: Mon, 2 Oct 2017 18:22:13 -0400 +Subject: [PATCH 2/3] Add efi_status_to_str() and rework efi_status_to_err(). + +This adds efi_status_to_str() for use when printing efi_status_t +messages, and reworks efi_status_to_err() so that the two use a common +list of errors. + +Signed-off-by: Peter Jones +--- + include/linux/efi.h | 3 ++ + drivers/firmware/efi/efi.c | 122 ++++++++++++++++++++++++++++++++++----------- + 2 files changed, 95 insertions(+), 30 deletions(-) + +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 18b16bf5ce1..436b3c93c3d 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -42,6 +42,8 @@ + #define EFI_ABORTED (21 | (1UL << (BITS_PER_LONG-1))) + #define EFI_SECURITY_VIOLATION (26 | (1UL << (BITS_PER_LONG-1))) + ++#define EFI_IS_ERROR(x) ((x) & (1UL << (BITS_PER_LONG-1))) ++ + typedef unsigned long efi_status_t; + typedef u8 efi_bool_t; + typedef u16 efi_char16_t; /* UNICODE character */ +@@ -1183,6 +1185,7 @@ static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {} + #endif + + extern int efi_status_to_err(efi_status_t status); ++extern const char *efi_status_to_str(efi_status_t status); + + /* + * Variable Attributes +diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c +index 557a47829d0..e8f9c7d84e9 100644 +--- a/drivers/firmware/efi/efi.c ++++ b/drivers/firmware/efi/efi.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include + +@@ -865,40 +866,101 @@ int efi_mem_type(unsigned long phys_addr) + } + #endif + ++struct efi_error_code { ++ efi_status_t status; ++ int errno; ++ const char *description; ++}; ++ ++static const struct efi_error_code efi_error_codes[] = { ++ { EFI_SUCCESS, 0, "Success"}, ++#if 0 ++ { EFI_LOAD_ERROR, -EPICK_AN_ERRNO, "Load Error"}, ++#endif ++ { EFI_INVALID_PARAMETER, -EINVAL, "Invalid Parameter"}, ++ { EFI_UNSUPPORTED, -ENOSYS, "Unsupported"}, ++ { EFI_BAD_BUFFER_SIZE, -ENOSPC, "Bad Buffer Size"}, ++ { EFI_BUFFER_TOO_SMALL, -ENOSPC, "Buffer Too Small"}, ++ { EFI_NOT_READY, -EAGAIN, "Not Ready"}, ++ { EFI_DEVICE_ERROR, -EIO, "Device Error"}, ++ { EFI_WRITE_PROTECTED, -EROFS, "Write Protected"}, ++ { EFI_OUT_OF_RESOURCES, -ENOMEM, "Out of Resources"}, ++#if 0 ++ { EFI_VOLUME_CORRUPTED, -EPICK_AN_ERRNO, "Volume Corrupt"}, ++ { EFI_VOLUME_FULL, -EPICK_AN_ERRNO, "Volume Full"}, ++ { EFI_NO_MEDIA, -EPICK_AN_ERRNO, "No Media"}, ++ { EFI_MEDIA_CHANGED, -EPICK_AN_ERRNO, "Media changed"}, ++#endif ++ { EFI_NOT_FOUND, -ENOENT, "Not Found"}, ++#if 0 ++ { EFI_ACCESS_DENIED, -EPICK_AN_ERRNO, "Access Denied"}, ++ { EFI_NO_RESPONSE, -EPICK_AN_ERRNO, "No Response"}, ++ { EFI_NO_MAPPING, -EPICK_AN_ERRNO, "No mapping"}, ++ { EFI_TIMEOUT, -EPICK_AN_ERRNO, "Time out"}, ++ { EFI_NOT_STARTED, -EPICK_AN_ERRNO, "Not started"}, ++ { EFI_ALREADY_STARTED, -EPICK_AN_ERRNO, "Already started"}, ++#endif ++ { EFI_ABORTED, -EINTR, "Aborted"}, ++#if 0 ++ { EFI_ICMP_ERROR, -EPICK_AN_ERRNO, "ICMP Error"}, ++ { EFI_TFTP_ERROR, -EPICK_AN_ERRNO, "TFTP Error"}, ++ { EFI_PROTOCOL_ERROR, -EPICK_AN_ERRNO, "Protocol Error"}, ++ { EFI_INCOMPATIBLE_VERSION, -EPICK_AN_ERRNO, "Incompatible Version"}, ++#endif ++ { EFI_SECURITY_VIOLATION, -EACCES, "Security Policy Violation"}, ++#if 0 ++ { EFI_CRC_ERROR, -EPICK_AN_ERRNO, "CRC Error"}, ++ { EFI_END_OF_MEDIA, -EPICK_AN_ERRNO, "End of Media"}, ++ { EFI_END_OF_FILE, -EPICK_AN_ERRNO, "End of File"}, ++ { EFI_INVALID_LANGUAGE, -EPICK_AN_ERRNO, "Invalid Languages"}, ++ { EFI_COMPROMISED_DATA, -EPICK_AN_ERRNO, "Compromised Data"}, ++ ++ // warnings ++ { EFI_WARN_UNKOWN_GLYPH, -EPICK_AN_ERRNO, "Warning Unknown Glyph"}, ++ { EFI_WARN_DELETE_FAILURE, -EPICK_AN_ERRNO, "Warning Delete Failure"}, ++ { EFI_WARN_WRITE_FAILURE, -EPICK_AN_ERRNO, "Warning Write Failure"}, ++ { EFI_WARN_BUFFER_TOO_SMALL, -EPICK_AN_ERRNO, "Warning Buffer Too Small"}, ++#endif ++}; ++ ++static int ++efi_status_cmp_bsearch(const void *key, const void *item) ++{ ++ u64 status = (u64)(uintptr_t)key; ++ struct efi_error_code *code = (struct efi_error_code *)item; ++ ++ if (status < code->status) ++ return -1; ++ if (status > code->status) ++ return 1; ++ return 0; ++} ++ + int efi_status_to_err(efi_status_t status) + { +- int err; ++ struct efi_error_code *found; ++ size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code); + +- switch (status) { +- case EFI_SUCCESS: +- err = 0; +- break; +- case EFI_INVALID_PARAMETER: +- err = -EINVAL; +- break; +- case EFI_OUT_OF_RESOURCES: +- err = -ENOSPC; +- break; +- case EFI_DEVICE_ERROR: +- err = -EIO; +- break; +- case EFI_WRITE_PROTECTED: +- err = -EROFS; +- break; +- case EFI_SECURITY_VIOLATION: +- err = -EACCES; +- break; +- case EFI_NOT_FOUND: +- err = -ENOENT; +- break; +- case EFI_ABORTED: +- err = -EINTR; +- break; +- default: +- err = -EINVAL; +- } ++ found = bsearch((void *)(uintptr_t)status, efi_error_codes, ++ sizeof(struct efi_error_code), num, ++ efi_status_cmp_bsearch); ++ if (!found) ++ return -EINVAL; ++ return found->errno; ++} + +- return err; ++const char * ++efi_status_to_str(efi_status_t status) ++{ ++ struct efi_error_code *found; ++ size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code); ++ ++ found = bsearch((void *)(uintptr_t)status, efi_error_codes, ++ sizeof(struct efi_error_code), num, ++ efi_status_cmp_bsearch); ++ if (!found) ++ return "Unknown error code"; ++ return found->description; + } + + bool efi_is_table_address(unsigned long phys_addr) +-- +2.15.0 + diff --git a/0002-Input-soc_button_array-Suppress-power-button-presses.patch b/0002-Input-soc_button_array-Suppress-power-button-presses.patch new file mode 100644 index 000000000..d95aeb36c --- /dev/null +++ b/0002-Input-soc_button_array-Suppress-power-button-presses.patch @@ -0,0 +1,62 @@ +From d561f0543506bc12e7b3355efddb0bfd7ca83c74 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sat, 22 Jul 2017 13:17:36 +0200 +Subject: [PATCH 2/2] Input: soc_button_array - Suppress power button presses + during suspend + +If the power-button is pressed to wakeup the laptop/tablet from suspend +and we report a KEY_POWER event to userspace when woken up this will cause +userspace to immediately suspend the system again which is undesirable. + +This commit sets the new no_wakeup_events flag in the gpio_keys_button +struct for the power-button suppressing the undesirable KEY_POWER input +events on wake-up. + +Signed-off-by: Hans de Goede +--- +Changes in v2: +-New patch in v2 of this patch-set +--- + drivers/input/misc/soc_button_array.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c +index f600f3a7a3c6..27b99831cb97 100644 +--- a/drivers/input/misc/soc_button_array.c ++++ b/drivers/input/misc/soc_button_array.c +@@ -27,6 +27,7 @@ struct soc_button_info { + unsigned int event_code; + bool autorepeat; + bool wakeup; ++ bool no_wakeup_events; + }; + + /* +@@ -100,6 +101,7 @@ soc_button_device_create(struct platform_device *pdev, + gpio_keys[n_buttons].active_low = 1; + gpio_keys[n_buttons].desc = info->name; + gpio_keys[n_buttons].wakeup = info->wakeup; ++ gpio_keys[n_buttons].no_wakeup_events = info->no_wakeup_events; + /* These devices often use cheap buttons, use 50 ms debounce */ + gpio_keys[n_buttons].debounce_interval = 50; + n_buttons++; +@@ -185,6 +187,7 @@ static int soc_button_parse_btn_desc(struct device *dev, + info->name = "power"; + info->event_code = KEY_POWER; + info->wakeup = true; ++ info->no_wakeup_events = true; + } else if (upage == 0x07 && usage == 0xe3) { + info->name = "home"; + info->event_code = KEY_LEFTMETA; +@@ -369,7 +372,7 @@ static int soc_button_probe(struct platform_device *pdev) + * Platforms" + */ + static struct soc_button_info soc_button_PNP0C40[] = { +- { "power", 0, EV_KEY, KEY_POWER, false, true }, ++ { "power", 0, EV_KEY, KEY_POWER, false, true, true }, + { "home", 1, EV_KEY, KEY_LEFTMETA, false, true }, + { "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false }, + { "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false }, +-- +2.13.4 + diff --git a/0003-Make-get_cert_list-use-efi_status_to_str-to-print-er.patch b/0003-Make-get_cert_list-use-efi_status_to_str-to-print-er.patch new file mode 100644 index 000000000..abb313a29 --- /dev/null +++ b/0003-Make-get_cert_list-use-efi_status_to_str-to-print-er.patch @@ -0,0 +1,38 @@ +From 520e902d864930e2d4f329983d9ae9781a24231f Mon Sep 17 00:00:00 2001 +From: Peter Jones +Date: Mon, 2 Oct 2017 18:18:30 -0400 +Subject: [PATCH 3/3] Make get_cert_list() use efi_status_to_str() to print + error messages. + +Signed-off-by: Peter Jones +--- + certs/load_uefi.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index 9ef34c44fd1..13a2826715d 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -51,7 +51,8 @@ static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid, + } + + if (status != EFI_BUFFER_TOO_SMALL) { +- pr_err("Couldn't get size: 0x%lx\n", status); ++ pr_err("Couldn't get size: %s (0x%lx)\n", ++ efi_status_to_str(status), status); + return efi_status_to_err(status); + } + +@@ -64,7 +65,8 @@ static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid, + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); +- pr_err("Error reading db var: 0x%lx\n", status); ++ pr_err("Error reading db var: %s (0x%lx)\n", ++ efi_status_to_str(status), status); + return efi_status_to_err(status); + } + +-- +2.15.0 + diff --git a/0010-Input-silead-Add-support-for-capactive-home-button-f.patch b/0010-Input-silead-Add-support-for-capactive-home-button-f.patch new file mode 100644 index 000000000..ce9be3760 --- /dev/null +++ b/0010-Input-silead-Add-support-for-capactive-home-button-f.patch @@ -0,0 +1,114 @@ +From 33fc16fd8aa3684e19b1d1f0a712593e2e570ab1 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 11 Jun 2017 21:24:50 +0200 +Subject: [PATCH 10/16] Input: silead: Add support for capactive home button + found on some x86 tablets + +On some x86 tablets with a silead touchscreen the windows logo on the +front is a capacitive home button. Touching this button results in a touch +with bits 12-15 of the Y coordinates set, while normally only the lower 12 +are used. + +Detect this and report a KEY_LEFTMETA press when this happens. Note for +now we only respond to the Y coordinate bits 12-15 containing 0x01, on some +tablets *without* a capacative button I've noticed these bits containing +0x04 when crossing the edges of the screen. + +Signed-off-by: Hans de Goede +--- + drivers/input/touchscreen/silead.c | 45 ++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 11 deletions(-) + +diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c +index 0dbcf105f7db..c0ba40c09699 100644 +--- a/drivers/input/touchscreen/silead.c ++++ b/drivers/input/touchscreen/silead.c +@@ -56,7 +56,7 @@ + #define SILEAD_POINT_Y_MSB_OFF 0x01 + #define SILEAD_POINT_X_OFF 0x02 + #define SILEAD_POINT_X_MSB_OFF 0x03 +-#define SILEAD_TOUCH_ID_MASK 0xF0 ++#define SILEAD_EXTRA_DATA_MASK 0xF0 + + #define SILEAD_CMD_SLEEP_MIN 10000 + #define SILEAD_CMD_SLEEP_MAX 20000 +@@ -109,6 +109,8 @@ static int silead_ts_request_input_dev(struct silead_ts_data *data) + INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED | + INPUT_MT_TRACK); + ++ input_set_capability(data->input, EV_KEY, KEY_LEFTMETA); ++ + data->input->name = SILEAD_TS_NAME; + data->input->phys = "input/ts"; + data->input->id.bustype = BUS_I2C; +@@ -139,7 +141,8 @@ static void silead_ts_read_data(struct i2c_client *client) + struct input_dev *input = data->input; + struct device *dev = &client->dev; + u8 *bufp, buf[SILEAD_TS_DATA_LEN]; +- int touch_nr, error, i; ++ int touch_nr, softbutton, error, i; ++ bool softbutton_pressed = false; + + error = i2c_smbus_read_i2c_block_data(client, SILEAD_REG_DATA, + SILEAD_TS_DATA_LEN, buf); +@@ -148,21 +151,40 @@ static void silead_ts_read_data(struct i2c_client *client) + return; + } + +- touch_nr = buf[0]; +- if (touch_nr > data->max_fingers) { ++ if (buf[0] > data->max_fingers) { + dev_warn(dev, "More touches reported then supported %d > %d\n", +- touch_nr, data->max_fingers); +- touch_nr = data->max_fingers; ++ buf[0], data->max_fingers); ++ buf[0] = data->max_fingers; + } + ++ touch_nr = 0; + bufp = buf + SILEAD_POINT_DATA_LEN; +- for (i = 0; i < touch_nr; i++, bufp += SILEAD_POINT_DATA_LEN) { +- /* Bits 4-7 are the touch id */ +- data->id[i] = (bufp[SILEAD_POINT_X_MSB_OFF] & +- SILEAD_TOUCH_ID_MASK) >> 4; +- touchscreen_set_mt_pos(&data->pos[i], &data->prop, ++ for (i = 0; i < buf[0]; i++, bufp += SILEAD_POINT_DATA_LEN) { ++ softbutton = (bufp[SILEAD_POINT_Y_MSB_OFF] & ++ SILEAD_EXTRA_DATA_MASK) >> 4; ++ ++ if (softbutton) { ++ /* ++ * For now only respond to softbutton == 0x01, some ++ * tablets *without* a capacative button send 0x04 ++ * when crossing the edges of the screen. ++ */ ++ if (softbutton == 0x01) ++ softbutton_pressed = true; ++ ++ continue; ++ } ++ ++ /* ++ * Bits 4-7 are the touch id, note not all models have ++ * hardware touch ids so atm we don't use these. ++ */ ++ data->id[touch_nr] = (bufp[SILEAD_POINT_X_MSB_OFF] & ++ SILEAD_EXTRA_DATA_MASK) >> 4; ++ touchscreen_set_mt_pos(&data->pos[touch_nr], &data->prop, + get_unaligned_le16(&bufp[SILEAD_POINT_X_OFF]) & 0xfff, + get_unaligned_le16(&bufp[SILEAD_POINT_Y_OFF]) & 0xfff); ++ touch_nr++; + } + + input_mt_assign_slots(input, data->slots, data->pos, touch_nr, 0); +@@ -178,6 +200,7 @@ static void silead_ts_read_data(struct i2c_client *client) + } + + input_mt_sync_frame(input); ++ input_report_key(input, KEY_LEFTMETA, softbutton_pressed); + input_sync(input); + } + +-- +2.13.0 + diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch index 40d14f949..f7f7c36d3 100644 --- a/Add-EFI-signature-data-types.patch +++ b/Add-EFI-signature-data-types.patch @@ -1,37 +1,36 @@ -From ba3f737b8521314b62edaa7d4cc4bdc9aeefe394 Mon Sep 17 00:00:00 2001 +From 0451d4e795929a69a0fda6d960aa4b077c5bd179 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:30:54 -0400 -Subject: [PATCH 15/20] Add EFI signature data types +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 1/4] efi: Add EFI signature data types -Add the data types that are used for containing hashes, keys and certificates -for cryptographic verification. - -Bugzilla: N/A -Upstream-status: Fedora mustard for now +Add the data types that are used for containing hashes, keys and +certificates for cryptographic verification along with their corresponding +type GUIDs. Signed-off-by: David Howells --- - include/linux/efi.h | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) + include/linux/efi.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) diff --git a/include/linux/efi.h b/include/linux/efi.h -index 5af91b58afae..190858d62fe3 100644 +index ec36f42..3259ad6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -603,6 +603,9 @@ void efi_native_runtime_setup(void); - #define LINUX_EFI_LOADER_ENTRY_GUID EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f) - #define LINUX_EFI_RANDOM_SEED_TABLE_GUID EFI_GUID(0x1ce1e5bc, 0x7ceb, 0x42f2, 0x81, 0xe5, 0x8a, 0xad, 0xf1, 0x80, 0xf5, 0x7b) - -+#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) -+#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) +@@ -614,6 +614,10 @@ void efi_native_runtime_setup(void); + #define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) + #define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) + ++#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) ++#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) ++#define EFI_CERT_X509_SHA256_GUID EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) + - typedef struct { - efi_guid_t guid; - u64 table; -@@ -853,6 +856,20 @@ typedef struct { + /* + * This GUID is used to pass to the kernel proper the struct screen_info + * structure that was populated by the stub based on the GOP protocol instance +@@ -873,6 +877,27 @@ typedef struct { efi_memory_desc_t entry[0]; } efi_memory_attributes_table_t; - + +typedef struct { + efi_guid_t signature_owner; + u8 signature_data[]; @@ -45,6 +44,13 @@ index 5af91b58afae..190858d62fe3 100644 + u8 signature_header[]; + /* efi_signature_data_t signatures[][] */ +} efi_signature_list_t; ++ ++typedef u8 efi_sha256_hash_t[32]; ++ ++typedef struct { ++ efi_sha256_hash_t to_be_signed_hash; ++ efi_time_t time_of_revocation; ++} efi_cert_x509_sha256_t; + /* * All runtime access to EFI goes through this structure: diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch index f57abc9f2..e3941eeaa 100644 --- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch +++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch @@ -1,29 +1,38 @@ -From 822b4b3eb76ca451a416a51f0a7bfedfa5c5ea39 Mon Sep 17 00:00:00 2001 +From e4c62c12635a371e43bd17e8d33a936668264491 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:36:28 -0400 -Subject: [PATCH 16/20] Add an EFI signature blob parser and key loader. +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 2/4] efi: Add an EFI signature blob parser -X.509 certificates are loaded into the specified keyring as asymmetric type -keys. +Add a function to parse an EFI signature blob looking for elements of +interest. A list is made up of a series of sublists, where all the +elements in a sublist are of the same type, but sublists can be of +different types. + +For each sublist encountered, the function pointed to by the +get_handler_for_guid argument is called with the type specifier GUID and +returns either a pointer to a function to handle elements of that type or +NULL if the type is not of interest. + +If the sublist is of interest, each element is passed to the handler +function in turn. -[labbott@fedoraproject.org: Drop KEY_ALLOC_TRUSTED] Signed-off-by: David Howells --- - crypto/asymmetric_keys/Kconfig | 8 +++ - crypto/asymmetric_keys/Makefile | 1 + - crypto/asymmetric_keys/efi_parser.c | 108 ++++++++++++++++++++++++++++++++++++ - include/linux/efi.h | 4 ++ - 4 files changed, 121 insertions(+) - create mode 100644 crypto/asymmetric_keys/efi_parser.c + certs/Kconfig | 8 ++++ + certs/Makefile | 1 + + certs/efi_parser.c | 112 ++++++++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/efi.h | 9 +++++ + 4 files changed, 130 insertions(+) + create mode 100644 certs/efi_parser.c + +diff --git a/certs/Kconfig b/certs/Kconfig +index 6ce51ed..630ae09 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -82,4 +82,12 @@ config SYSTEM_BLACKLIST_HASH_LIST + wrapper to incorporate the list into the kernel. Each should + be a string of hex digits. -diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig -index 331f6baf2df8..5f9002d3192e 100644 ---- a/crypto/asymmetric_keys/Kconfig -+++ b/crypto/asymmetric_keys/Kconfig -@@ -61,4 +61,12 @@ config SIGNED_PE_FILE_VERIFICATION - This option provides support for verifying the signature(s) on a - signed PE binary. - +config EFI_SIGNATURE_LIST_PARSER + bool "EFI signature list parser" + depends on EFI @@ -32,28 +41,28 @@ index 331f6baf2df8..5f9002d3192e 100644 + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + - endif # ASYMMETRIC_KEY_TYPE -diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile -index 6516855bec18..c099fe15ed6d 100644 ---- a/crypto/asymmetric_keys/Makefile -+++ b/crypto/asymmetric_keys/Makefile -@@ -10,6 +10,7 @@ asymmetric_keys-y := \ - signature.o - - obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 4119bb3..738151a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_hashes.o + else + obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif +obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o - - # - # X.509 Certificate handling -diff --git a/crypto/asymmetric_keys/efi_parser.c b/crypto/asymmetric_keys/efi_parser.c + + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + +diff --git a/certs/efi_parser.c b/certs/efi_parser.c new file mode 100644 -index 000000000000..636feb18b733 +index 0000000..4e396f9 --- /dev/null -+++ b/crypto/asymmetric_keys/efi_parser.c -@@ -0,0 +1,108 @@ ++++ b/certs/efi_parser.c +@@ -0,0 +1,112 @@ +/* EFI signature/key/certificate list parser + * -+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. ++ * Copyright (C) 2012, 2016 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or @@ -67,27 +76,44 @@ index 000000000000..636feb18b733 +#include +#include +#include -+#include -+ -+static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; + +/** + * parse_efi_signature_list - Parse an EFI signature list for certificates ++ * @source: The source of the key + * @data: The data blob to parse + * @size: The size of the data blob -+ * @keyring: The keyring to add extracted keys to ++ * @get_handler_for_guid: Get the handler func for the sig type (or NULL) ++ * ++ * Parse an EFI signature list looking for elements of interest. A list is ++ * made up of a series of sublists, where all the elements in a sublist are of ++ * the same type, but sublists can be of different types. ++ * ++ * For each sublist encountered, the @get_handler_for_guid function is called ++ * with the type specifier GUID and returns either a pointer to a function to ++ * handle elements of that type or NULL if the type is not of interest. ++ * ++ * If the sublist is of interest, each element is passed to the handler ++ * function in turn. ++ * ++ * Error EBADMSG is returned if the list doesn't parse correctly and 0 is ++ * returned if the list was parsed correctly. No error can be returned from ++ * the @get_handler_for_guid function or the element handler function it ++ * returns. + */ -+int __init parse_efi_signature_list(const void *data, size_t size, struct key *keyring) ++int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)) +{ ++ efi_element_handler_t handler; + unsigned offs = 0; -+ size_t lsize, esize, hsize, elsize; + + pr_devel("-->%s(,%zu)\n", __func__, size); + + while (size > 0) { -+ efi_signature_list_t list; + const efi_signature_data_t *elem; -+ key_ref_t key; ++ efi_signature_list_t list; ++ size_t lsize, esize, hsize, elsize; + + if (size < sizeof(list)) + return -EBADMSG; @@ -108,6 +134,7 @@ index 000000000000..636feb18b733 + __func__, offs); + return -EBADMSG; + } ++ + if (lsize < sizeof(list) || + lsize - sizeof(list) < hsize || + esize < sizeof(*elem) || @@ -117,7 +144,8 @@ index 000000000000..636feb18b733 + return -EBADMSG; + } + -+ if (efi_guidcmp(list.signature_type, efi_cert_x509_guid) != 0) { ++ handler = get_handler_for_guid(&list.signature_type); ++ if (!handler) { + data += lsize; + size -= lsize; + offs += lsize; @@ -132,24 +160,9 @@ index 000000000000..636feb18b733 + elem = data; + + pr_devel("ELEM[%04x]\n", offs); -+ -+ key = key_create_or_update( -+ make_key_ref(keyring, 1), -+ "asymmetric", -+ NULL, ++ handler(source, + &elem->signature_data, -+ esize - sizeof(*elem), -+ (KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW, -+ KEY_ALLOC_NOT_IN_QUOTA); -+ -+ if (IS_ERR(key)) -+ pr_err("Problem loading in-kernel X.509 certificate (%ld)\n", -+ PTR_ERR(key)); -+ else -+ pr_notice("Loaded cert '%s' linked to '%s'\n", -+ key_ref_to_ptr(key)->description, -+ keyring->description); ++ esize - sizeof(*elem)); + + data += esize; + size -= esize; @@ -160,16 +173,21 @@ index 000000000000..636feb18b733 + return 0; +} diff --git a/include/linux/efi.h b/include/linux/efi.h -index 190858d62fe3..668aa1244885 100644 +index 3259ad6..08024c6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -1025,6 +1025,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, +@@ -1055,6 +1055,15 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, char * __init efi_md_typeattr_format(char *buf, size_t size, const efi_memory_desc_t *md); - -+struct key; -+extern int __init parse_efi_signature_list(const void *data, size_t size, -+ struct key *keyring); + ++ ++typedef void (*efi_element_handler_t)(const char *source, ++ const void *element_data, ++ size_t element_size); ++extern int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)); + /** * efi_range_is_wc - check the WC bit on an address range diff --git a/AllWinner-h3.patch b/AllWinner-h3.patch deleted file mode 100644 index c75da8aa8..000000000 --- a/AllWinner-h3.patch +++ /dev/null @@ -1,1080 +0,0 @@ -From patchwork Mon Mar 6 17:17:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, 1/6] ARM: dts: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607205 -Message-Id: <20170306171750.7491-2-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:45 +0800 - -The skeleton.dtsi file is now deprecated, and do not exist in ARM64 -environment. - -Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 -chip, drop skeleton.dtsi inclusion now. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 27780b97c863..9a3435527fde 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -40,8 +40,6 @@ - * OTHER DEALINGS IN THE SOFTWARE. - */ - --#include "skeleton.dtsi" -- - #include - #include - #include -From patchwork Mon Mar 6 17:17:46 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 2/6] ARM: dts: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607207 -Message-Id: <20170306171750.7491-3-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:46 +0800 - -After converting to generic pinconf binding, pinctrl-a10.h is now not -used at all. - -Drop its inclusion for H3 DTSI. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 9a3435527fde..b250e6d03b57 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -42,7 +42,6 @@ - - #include - #include --#include - #include - - / { -From patchwork Mon Mar 6 17:17:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 3/6] ARM: dts: sun8i: h3: correct the GIC compatible in H3 to gic-400 -From: Icenowy Zheng -X-Patchwork-Id: 9607209 -Message-Id: <20170306171750.7491-4-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:47 +0800 - -According to the datasheets provided by Allwinner, both Allwinner H3 and -H5 use GIC-400 as their interrupt controller. - -For better device tree reusing, correct the GIC compatible in H3 DTSI to -"arm,gic-400", thus this node can be reused in H5. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index b250e6d03b57..c13fbfb92592 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -586,7 +586,7 @@ - }; - - gic: interrupt-controller@01c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -From patchwork Mon Mar 6 17:17:48 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8,4/6] arm: dts: sun8i: h3: split Allwinner H3 .dtsi -From: Icenowy Zheng -X-Patchwork-Id: 9607211 -Message-Id: <20170306171750.7491-5-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, Andre Przywara , - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Icenowy Zheng , linux-arm-kernel@lists.infradead.org -Date: Tue, 7 Mar 2017 01:17:48 +0800 - -From: Andre Przywara - -The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the -Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller -updated. So we should really share almost the whole .dtsi. -In preparation for that move the peripheral parts of the existing -sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. -The actual sun8i-h3.dtsi then includes that and defines the H3 specific -parts on top of it. - -Signed-off-by: Andre Przywara -[Icenowy: also split out mmc and gic, as well as pio and ccu's - compatible, and make drop of skeleton into a seperated patch] -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. -Changes in v7: -- Extract GIC, skeleton.dtsi and pinctrl-a10.h changes to seperate patches. -Changes in v6: -- Extract GIC device node to sunxi-h3-h5.dtsi and correct its compatible - as "arm,gic-400". -Changes in v3: -- Use label-based syntax to reference nodes in H3 DTSI file. -Changes in v2: -- Rebase on current linux-next (because of the add of audio codec) - - arch/arm/boot/dts/sun8i-h3.dtsi | 771 ++++----------------- - .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 73 +- - 2 files changed, 133 insertions(+), 711 deletions(-) - rewrite arch/arm/boot/dts/sun8i-h3.dtsi (83%) - copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (90%) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -dissimilarity index 83% -index c13fbfb92592..b36f9f423c39 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -1,645 +1,126 @@ --/* -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -- --#include --#include --#include -- --/ { -- interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -- -- clocks { -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- osc24M: osc24M_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <24000000>; -- clock-output-names = "osc24M"; -- }; -- -- osc32k: osc32k_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <32768>; -- clock-output-names = "osc32k"; -- }; -- -- apb0: apb0_clk { -- compatible = "fixed-factor-clock"; -- #clock-cells = <0>; -- clock-div = <1>; -- clock-mult = <1>; -- clocks = <&osc24M>; -- clock-output-names = "apb0"; -- }; -- -- apb0_gates: clk@01f01428 { -- compatible = "allwinner,sun8i-h3-apb0-gates-clk", -- "allwinner,sun4i-a10-gates-clk"; -- reg = <0x01f01428 0x4>; -- #clock-cells = <1>; -- clocks = <&apb0>; -- clock-indices = <0>, <1>; -- clock-output-names = "apb0_pio", "apb0_ir"; -- }; -- -- ir_clk: ir_clk@01f01454 { -- compatible = "allwinner,sun4i-a10-mod0-clk"; -- reg = <0x01f01454 0x4>; -- #clock-cells = <0>; -- clocks = <&osc32k>, <&osc24M>; -- clock-output-names = "ir"; -- }; -- }; -- -- soc { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- dma: dma-controller@01c02000 { -- compatible = "allwinner,sun8i-h3-dma"; -- reg = <0x01c02000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_DMA>; -- resets = <&ccu RST_BUS_DMA>; -- #dma-cells = <1>; -- }; -- -- mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC0>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC1>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC2>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- usbphy: phy@01c19400 { -- compatible = "allwinner,sun8i-h3-usb-phy"; -- reg = <0x01c19400 0x2c>, -- <0x01c1a800 0x4>, -- <0x01c1b800 0x4>, -- <0x01c1c800 0x4>, -- <0x01c1d800 0x4>; -- reg-names = "phy_ctrl", -- "pmu0", -- "pmu1", -- "pmu2", -- "pmu3"; -- clocks = <&ccu CLK_USB_PHY0>, -- <&ccu CLK_USB_PHY1>, -- <&ccu CLK_USB_PHY2>, -- <&ccu CLK_USB_PHY3>; -- clock-names = "usb0_phy", -- "usb1_phy", -- "usb2_phy", -- "usb3_phy"; -- resets = <&ccu RST_USB_PHY0>, -- <&ccu RST_USB_PHY1>, -- <&ccu RST_USB_PHY2>, -- <&ccu RST_USB_PHY3>; -- reset-names = "usb0_reset", -- "usb1_reset", -- "usb2_reset", -- "usb3_reset"; -- status = "disabled"; -- #phy-cells = <1>; -- }; -- -- ehci1: usb@01c1b000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1b000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci1: usb@01c1b400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1b400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, -- <&ccu CLK_USB_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci2: usb@01c1c000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1c000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci2: usb@01c1c400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1c400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, -- <&ccu CLK_USB_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci3: usb@01c1d000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1d000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci3: usb@01c1d400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1d400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, -- <&ccu CLK_USB_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -- reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -- clock-names = "hosc", "losc"; -- #clock-cells = <1>; -- #reset-cells = <1>; -- }; -- -- pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -- reg = <0x01c20800 0x400>; -- interrupts = , -- ; -- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- i2c0_pins: i2c0 { -- pins = "PA11", "PA12"; -- function = "i2c0"; -- }; -- -- i2c1_pins: i2c1 { -- pins = "PA18", "PA19"; -- function = "i2c1"; -- }; -- -- i2c2_pins: i2c2 { -- pins = "PE12", "PE13"; -- function = "i2c2"; -- }; -- -- mmc0_pins_a: mmc0@0 { -- pins = "PF0", "PF1", "PF2", "PF3", -- "PF4", "PF5"; -- function = "mmc0"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc0_cd_pin: mmc0_cd_pin@0 { -- pins = "PF6"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- mmc1_pins_a: mmc1@0 { -- pins = "PG0", "PG1", "PG2", "PG3", -- "PG4", "PG5"; -- function = "mmc1"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc2_8bit_pins: mmc2_8bit { -- pins = "PC5", "PC6", "PC8", -- "PC9", "PC10", "PC11", -- "PC12", "PC13", "PC14", -- "PC15", "PC16"; -- function = "mmc2"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- spdif_tx_pins_a: spdif@0 { -- pins = "PA17"; -- function = "spdif"; -- }; -- -- spi0_pins: spi0 { -- pins = "PC0", "PC1", "PC2", "PC3"; -- function = "spi0"; -- }; -- -- spi1_pins: spi1 { -- pins = "PA15", "PA16", "PA14", "PA13"; -- function = "spi1"; -- }; -- -- uart0_pins_a: uart0@0 { -- pins = "PA4", "PA5"; -- function = "uart0"; -- }; -- -- uart1_pins: uart1 { -- pins = "PG6", "PG7"; -- function = "uart1"; -- }; -- -- uart1_rts_cts_pins: uart1_rts_cts { -- pins = "PG8", "PG9"; -- function = "uart1"; -- }; -- -- uart2_pins: uart2 { -- pins = "PA0", "PA1"; -- function = "uart2"; -- }; -- -- uart3_pins: uart3 { -- pins = "PA13", "PA14"; -- function = "uart3"; -- }; -- }; -- -- timer@01c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -- reg = <0x01c20c00 0xa0>; -- interrupts = , -- ; -- clocks = <&osc24M>; -- }; -- -- spi0: spi@01c68000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c68000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 23>, <&dma 23>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>; -- resets = <&ccu RST_BUS_SPI0>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- spi1: spi@01c69000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c69000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 24>, <&dma 24>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi1_pins>; -- resets = <&ccu RST_BUS_SPI1>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- wdt0: watchdog@01c20ca0 { -- compatible = "allwinner,sun6i-a31-wdt"; -- reg = <0x01c20ca0 0x20>; -- interrupts = ; -- }; -- -- spdif: spdif@01c21000 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-spdif"; -- reg = <0x01c21000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; -- resets = <&ccu RST_BUS_SPDIF>; -- clock-names = "apb", "spdif"; -- dmas = <&dma 2>; -- dma-names = "tx"; -- status = "disabled"; -- }; -- -- pwm: pwm@01c21400 { -- compatible = "allwinner,sun8i-h3-pwm"; -- reg = <0x01c21400 0x8>; -- clocks = <&osc24M>; -- #pwm-cells = <3>; -- status = "disabled"; -- }; -- -- codec: codec@01c22c00 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-codec"; -- reg = <0x01c22c00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -- clock-names = "apb", "codec"; -- resets = <&ccu RST_BUS_CODEC>; -- dmas = <&dma 15>, <&dma 15>; -- dma-names = "rx", "tx"; -- allwinner,codec-analog-controls = <&codec_analog>; -- status = "disabled"; -- }; -- -- uart0: serial@01c28000 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28000 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART0>; -- resets = <&ccu RST_BUS_UART0>; -- dmas = <&dma 6>, <&dma 6>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart1: serial@01c28400 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28400 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART1>; -- resets = <&ccu RST_BUS_UART1>; -- dmas = <&dma 7>, <&dma 7>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart2: serial@01c28800 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28800 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART2>; -- resets = <&ccu RST_BUS_UART2>; -- dmas = <&dma 8>, <&dma 8>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart3: serial@01c28c00 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28c00 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART3>; -- resets = <&ccu RST_BUS_UART3>; -- dmas = <&dma 9>, <&dma 9>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- i2c0: i2c@01c2ac00 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2ac00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C0>; -- resets = <&ccu RST_BUS_I2C0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c0_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c1: i2c@01c2b000 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C1>; -- resets = <&ccu RST_BUS_I2C1>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c1_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c2: i2c@01c2b400 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C2>; -- resets = <&ccu RST_BUS_I2C2>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c2_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- gic: interrupt-controller@01c81000 { -- compatible = "arm,gic-400"; -- reg = <0x01c81000 0x1000>, -- <0x01c82000 0x2000>, -- <0x01c84000 0x2000>, -- <0x01c86000 0x2000>; -- interrupt-controller; -- #interrupt-cells = <3>; -- interrupts = ; -- }; -- -- rtc: rtc@01f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -- interrupts = , -- ; -- }; -- -- apb0_reset: reset@01f014b0 { -- reg = <0x01f014b0 0x4>; -- compatible = "allwinner,sun6i-a31-clock-reset"; -- #reset-cells = <1>; -- }; -- -- codec_analog: codec-analog@01f015c0 { -- compatible = "allwinner,sun8i-h3-codec-analog"; -- reg = <0x01f015c0 0x4>; -- }; -- -- ir: ir@01f02000 { -- compatible = "allwinner,sun5i-a13-ir"; -- clocks = <&apb0_gates 1>, <&ir_clk>; -- clock-names = "apb", "ir"; -- resets = <&apb0_reset 1>; -- interrupts = ; -- reg = <0x01f02000 0x40>; -- status = "disabled"; -- }; -- -- r_pio: pinctrl@01f02c00 { -- compatible = "allwinner,sun8i-h3-r-pinctrl"; -- reg = <0x01f02c00 0x400>; -- interrupts = ; -- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- resets = <&apb0_reset 0>; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- ir_pins_a: ir@0 { -- pins = "PL11"; -- function = "s_cir_rx"; -- }; -- }; -- }; --}; -+/* -+ * Copyright (C) 2015 Jens Kuske -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "sunxi-h3-h5.dtsi" -+ -+/ { -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <0>; -+ }; -+ -+ cpu@1 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <1>; -+ }; -+ -+ cpu@2 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <2>; -+ }; -+ -+ cpu@3 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <3>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+}; -+ -+&ccu { -+ compatible = "allwinner,sun8i-h3-ccu"; -+}; -+ -+&mmc0 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC0>, -+ <&ccu CLK_MMC0>, -+ <&ccu CLK_MMC0_OUTPUT>, -+ <&ccu CLK_MMC0_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc1 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC1>, -+ <&ccu CLK_MMC1>, -+ <&ccu CLK_MMC1_OUTPUT>, -+ <&ccu CLK_MMC1_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc2 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC2>, -+ <&ccu CLK_MMC2>, -+ <&ccu CLK_MMC2_OUTPUT>, -+ <&ccu CLK_MMC2_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&pio { -+ compatible = "allwinner,sun8i-h3-pinctrl"; -+}; -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -similarity index 90% -copy from arch/arm/boot/dts/sun8i-h3.dtsi -copy to arch/arm/boot/dts/sunxi-h3-h5.dtsi -index c13fbfb92592..2494ea063cd4 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -46,43 +46,8 @@ - - / { - interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -+ #address-cells = <1>; -+ #size-cells = <1>; - - clocks { - #address-cells = <1>; -@@ -147,16 +112,8 @@ - }; - - mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; -@@ -166,16 +123,8 @@ - }; - - mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; -@@ -185,16 +134,8 @@ - }; - - mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; -@@ -305,7 +246,7 @@ - }; - - ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; -@@ -314,7 +255,7 @@ - }; - - pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20800 0x400>; - interrupts = , - ; diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch deleted file mode 100644 index ebe9a3c94..000000000 --- a/AllWinner-net-emac.patch +++ /dev/null @@ -1,2179 +0,0 @@ -From patchwork Tue Mar 14 14:18:37 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, 01/20] net-next: stmmac: export - stmmac_set_mac_addr/stmmac_get_mac_addr -From: Corentin LABBE -X-Patchwork-Id: 9623505 -Message-Id: <20170314141856.24560-2-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:37 +0100 - -Thoses symbol will be needed for the dwmac-sun8i ethernet driver. -For letting it to be build as module, they need to be exported. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -index e60bfca..0ab985c8 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -@@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], - data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; - writel(data, ioaddr + low); - } -+EXPORT_SYMBOL_GPL(stmmac_set_mac_addr); - - /* Enable disable MAC RX/TX */ - void stmmac_set_mac(void __iomem *ioaddr, bool enable) -@@ -279,4 +280,4 @@ void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr, - addr[4] = hi_addr & 0xff; - addr[5] = (hi_addr >> 8) & 0xff; - } -- -+EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); -From patchwork Tue Mar 14 14:18:38 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,02/20] net-next: stmmac: add optional setup function -From: Corentin LABBE -X-Patchwork-Id: 9623509 -Message-Id: <20170314141856.24560-3-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:38 +0100 - -Instead of ading more ifthen logic for adding a new mac_device_info -setup function, it is easier to add a function pointer to the function -needed. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- - include/linux/stmmac.h | 3 +++ - 2 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 4498a38..856ac57 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -3101,7 +3101,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) - struct mac_device_info *mac; - - /* Identify the MAC HW device */ -- if (priv->plat->has_gmac) { -+ if (priv->plat->setup) { -+ mac = priv->plat->setup(priv); -+ } else if (priv->plat->has_gmac) { - priv->dev->priv_flags |= IFF_UNICAST_FLT; - mac = dwmac1000_setup(priv->ioaddr, - priv->plat->multicast_filter_bins, -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index fc273e9..8f09f18 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -109,6 +109,8 @@ struct stmmac_axi { - bool axi_rb; - }; - -+struct stmmac_priv; -+ - struct plat_stmmacenet_data { - int bus_id; - int phy_addr; -@@ -136,6 +138,7 @@ struct plat_stmmacenet_data { - void (*fix_mac_speed)(void *priv, unsigned int speed); - int (*init)(struct platform_device *pdev, void *priv); - void (*exit)(struct platform_device *pdev, void *priv); -+ struct mac_device_info *(*setup)(struct stmmac_priv *priv); - void *bsp_priv; - struct clk *stmmac_clk; - struct clk *pclk; -From patchwork Tue Mar 14 14:18:39 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 03/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner - dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9623517 -Message-Id: <20170314141856.24560-4-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:39 +0100 - -This patch adds documentation for Device-Tree bindings for the -Allwinner dwmac-sun8i driver. - -Signed-off-by: Corentin Labbe ---- - .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ - 1 file changed, 77 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt - -diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -new file mode 100644 -index 0000000..f01ef17 ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -@@ -0,0 +1,77 @@ -+* Allwinner sun8i GMAC ethernet controller -+ -+This device is a platform glue layer for stmmac. -+Please see stmmac.txt for the other unchanged properties. -+ -+Required properties: -+- compatible: should be one of the following string: -+ "allwinner,sun8i-a83t-emac" -+ "allwinner,sun8i-h3-emac" -+ "allwinner,sun50i-a64-emac" -+- reg: address and length of the register for the device. -+- interrupts: interrupt for the device -+- interrupt-names: should be "macirq" -+- clocks: A phandle to the reference clock for this device -+- clock-names: should be "stmmaceth" -+- resets: A phandle to the reset control for this device -+- reset-names: should be "stmmaceth" -+- phy-mode: See ethernet.txt -+- phy-handle: See ethernet.txt -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+- syscon: A phandle to the syscon of the SoC with one of the following -+ compatible string: -+ - allwinner,sun8i-h3-system-controller -+ - allwinner,sun8i-a64-system-controller -+ - allwinner,sun8i-a83t-system-controller -+ -+Optional properties: -+- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) -+- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) -+Both delay properties are in 0.1ns step. -+ -+Optional properties for "allwinner,sun8i-h3-emac": -+- allwinner,leds-active-low: EPHY LEDs are active low -+ -+Required child node of emac: -+- mdio bus node: should be named mdio -+ -+Required properties of the mdio node: -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+ -+The device node referenced by "phy" or "phy-handle" should be a child node -+of the mdio node. See phy.txt for the generic PHY bindings. -+ -+Required properties of the phy node with "allwinner,sun8i-h3-emac": -+- clocks: a phandle to the reference clock for the EPHY -+- resets: a phandle to the reset control for the EPHY -+ -+Example: -+ -+emac: ethernet@1c0b000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c0b000 0x104>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ phy = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+}; -From patchwork Tue Mar 14 14:18:40 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 04/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner - syscon -From: Corentin LABBE -X-Patchwork-Id: 9623533 -Message-Id: <20170314141856.24560-5-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:40 +0100 - -Signed-off-by: Corentin Labbe ---- - .../devicetree/bindings/misc/allwinner,syscon.txt | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - create mode 100644 Documentation/devicetree/bindings/misc/allwinner,syscon.txt - -diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt -new file mode 100644 -index 0000000..9f5f1f5 ---- /dev/null -+++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt -@@ -0,0 +1,19 @@ -+* Allwinner sun8i system controller -+ -+This file describes the bindings for the system controller present in -+Allwinner SoC H3, A83T and A64. -+The principal function of this syscon is to control EMAC PHY choice and -+config. -+ -+Required properties for the system controller: -+- reg: address and length of the register for the device. -+- compatible: should be "syscon" and one of the following string: -+ "allwinner,sun8i-h3-system-controller" -+ "allwinner,sun8i-a64-system-controller" -+ "allwinner,sun8i-a83t-system-controller" -+ -+Example: -+syscon: syscon@01c00000 { -+ compatible = "syscon", "allwinner,sun8i-h3-system-controller"; -+ reg = <0x01c00000 0x1000>; -+}; -From patchwork Tue Mar 14 14:18:41 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,05/20] net-next: stmmac: Add dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9623523 -Message-Id: <20170314141856.24560-6-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:41 +0100 - -The dwmac-sun8i is a heavy hacked version of stmmac hardware by -allwinner. -In fact the only common part is the descriptor management and the first -register function. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + - drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + - drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 938 +++++++++++++++++++++ - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 27 +- - .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- - include/linux/stmmac.h | 1 + - 6 files changed, 984 insertions(+), 3 deletions(-) - create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c - -diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig -index cfbe363..85c0e41 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/Kconfig -+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig -@@ -145,6 +145,17 @@ config DWMAC_SUNXI - This selects Allwinner SoC glue layer support for the - stmmac device driver. This driver is used for A20/A31 - GMAC ethernet controller. -+ -+config DWMAC_SUN8I -+ tristate "Allwinner sun8i GMAC support" -+ default ARCH_SUNXI -+ depends on OF && (ARCH_SUNXI || COMPILE_TEST) -+ ---help--- -+ Support for Allwinner H3 A83T A64 EMAC ethernet controllers. -+ -+ This selects Allwinner SoC glue layer support for the -+ stmmac device driver. This driver is used for H3/A83T/A64 -+ EMAC ethernet controller. - endif - - config STMMAC_PCI -diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile -index 700c603..fd4937a 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/Makefile -+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o - obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o - obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o - obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o -+obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o - obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o - obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o - stmmac-platform-objs:= stmmac_platform.o -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -new file mode 100644 -index 0000000..52ab67c ---- /dev/null -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -0,0 +1,938 @@ -+/* -+ * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer -+ * -+ * Copyright (C) 2017 Corentin Labbe -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "stmmac.h" -+#include "stmmac_platform.h" -+ -+/* General notes on dwmac-sun8i: -+ * Locking: no locking is necessary in this file because all necessary locking -+ * is done in the "stmmac files" -+ */ -+ -+/* struct emac_variant - Descrive dwmac-sun8i hardware variant -+ * @default_syscon_value: The default value of the EMAC register in syscon -+ * This value is used for disabling properly EMAC -+ * and used as a good starting value in case of the -+ * boot process(uboot) leave some stuff. -+ * @internal_phy: Does the MAC embed an internal PHY -+ * @support_mii: Does the MAC handle MII -+ * @support_rmii: Does the MAC handle RMII -+ * @support_rgmii: Does the MAC handle RGMII -+ */ -+struct emac_variant { -+ u32 default_syscon_value; -+ int internal_phy; -+ bool support_mii; -+ bool support_rmii; -+ bool support_rgmii; -+}; -+ -+/* struct sunxi_priv_data - hold all sunxi private data -+ * @tx_clk: reference to MAC TX clock -+ * @ephy_clk: reference to the optional EPHY clock for the internal PHY -+ * @regulator: reference to the optional regulator -+ * @rst_ephy: reference to the optional EPHY reset for the internal PHY -+ * @variant: reference to the current board variant -+ * @regmap: regmap for using the syscon -+ * @use_internal_phy: Does the current PHY choice imply using the internal PHY -+ */ -+struct sunxi_priv_data { -+ struct clk *tx_clk; -+ struct clk *ephy_clk; -+ struct regulator *regulator; -+ struct reset_control *rst_ephy; -+ const struct emac_variant *variant; -+ struct regmap *regmap; -+ bool use_internal_phy; -+}; -+ -+static const struct emac_variant emac_variant_h3 = { -+ .default_syscon_value = 0x58000, -+ .internal_phy = PHY_INTERFACE_MODE_MII, -+ .support_mii = true, -+ .support_rmii = true, -+ .support_rgmii = true -+}; -+ -+static const struct emac_variant emac_variant_a83t = { -+ .default_syscon_value = 0, -+ .internal_phy = 0, -+ .support_mii = true, -+ .support_rgmii = true -+}; -+ -+static const struct emac_variant emac_variant_a64 = { -+ .default_syscon_value = 0, -+ .internal_phy = 0, -+ .support_mii = true, -+ .support_rmii = true, -+ .support_rgmii = true -+}; -+ -+#define EMAC_BASIC_CTL0 0x00 -+#define EMAC_BASIC_CTL1 0x04 -+#define EMAC_INT_STA 0x08 -+#define EMAC_INT_EN 0x0C -+#define EMAC_TX_CTL0 0x10 -+#define EMAC_TX_CTL1 0x14 -+#define EMAC_TX_FLOW_CTL 0x1C -+#define EMAC_TX_DESC_LIST 0x20 -+#define EMAC_RX_CTL0 0x24 -+#define EMAC_RX_CTL1 0x28 -+#define EMAC_RX_DESC_LIST 0x34 -+#define EMAC_RX_FRM_FLT 0x38 -+#define EMAC_MDIO_CMD 0x48 -+#define EMAC_MDIO_DATA 0x4C -+#define EMAC_MACADDR_HI(reg) (0x50 + (reg) * 8) -+#define EMAC_MACADDR_LO(reg) (0x54 + (reg) * 8) -+#define EMAC_TX_DMA_STA 0xB0 -+#define EMAC_TX_CUR_DESC 0xB4 -+#define EMAC_TX_CUR_BUF 0xB8 -+#define EMAC_RX_DMA_STA 0xC0 -+#define EMAC_RX_CUR_DESC 0xC4 -+#define EMAC_RX_CUR_BUF 0xC8 -+ -+/* Use in EMAC_BASIC_CTL1 */ -+#define EMAC_BURSTLEN_SHIFT 24 -+ -+/* Used in EMAC_RX_FRM_FLT */ -+#define EMAC_FRM_FLT_RXALL BIT(0) -+#define EMAC_FRM_FLT_CTL BIT(13) -+#define EMAC_FRM_FLT_MULTICAST BIT(16) -+ -+/* Used in RX_CTL1*/ -+#define EMAC_RX_MD BIT(1) -+#define EMAC_RX_TH_MASK GENMASK(4, 5) -+#define EMAC_RX_TH_32 0 -+#define EMAC_RX_TH_64 (0x1 << 4) -+#define EMAC_RX_TH_96 (0x2 << 4) -+#define EMAC_RX_TH_128 (0x3 << 4) -+#define EMAC_RX_DMA_EN BIT(30) -+#define EMAC_RX_DMA_START BIT(31) -+ -+/* Used in TX_CTL1*/ -+#define EMAC_TX_MD BIT(1) -+#define EMAC_TX_NEXT_FRM BIT(2) -+#define EMAC_TX_TH_MASK GENMASK(8, 10) -+#define EMAC_TX_TH_64 0 -+#define EMAC_TX_TH_128 (0x1 << 8) -+#define EMAC_TX_TH_192 (0x2 << 8) -+#define EMAC_TX_TH_256 (0x3 << 8) -+#define EMAC_TX_DMA_EN BIT(30) -+#define EMAC_TX_DMA_START BIT(31) -+ -+/* Used in RX_CTL0 */ -+#define EMAC_RX_RECEIVER_EN BIT(31) -+#define EMAC_RX_DO_CRC BIT(27) -+#define EMAC_RX_FLOW_CTL_EN BIT(16) -+ -+/* Used in TX_CTL0 */ -+#define EMAC_TX_TRANSMITTER_EN BIT(31) -+ -+/* Used in EMAC_TX_FLOW_CTL */ -+#define EMAC_TX_FLOW_CTL_EN BIT(0) -+ -+/* Used in EMAC_INT_STA */ -+#define EMAC_TX_INT BIT(0) -+#define EMAC_TX_DMA_STOP_INT BIT(1) -+#define EMAC_TX_BUF_UA_INT BIT(2) -+#define EMAC_TX_TIMEOUT_INT BIT(3) -+#define EMAC_TX_UNDERFLOW_INT BIT(4) -+#define EMAC_TX_EARLY_INT BIT(5) -+#define EMAC_RX_INT BIT(8) -+#define EMAC_RX_BUF_UA_INT BIT(9) -+#define EMAC_RX_DMA_STOP_INT BIT(10) -+#define EMAC_RX_TIMEOUT_INT BIT(11) -+#define EMAC_RX_OVERFLOW_INT BIT(12) -+#define EMAC_RX_EARLY_INT BIT(13) -+#define EMAC_RGMII_STA_INT BIT(16) -+ -+#define MAC_ADDR_TYPE_DST BIT(31) -+ -+/* H3 specific bits for EPHY */ -+#define H3_EPHY_ADDR_SHIFT 20 -+#define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */ -+#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */ -+#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ -+ -+/* H3/A64 specific bits */ -+#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ -+ -+/* Generic system control EMAC_CLK bits */ -+#define SYSCON_ETXDC_MASK GENMASK(2, 0) -+#define SYSCON_ETXDC_SHIFT 10 -+#define SYSCON_ERXDC_MASK GENMASK(4, 0) -+#define SYSCON_ERXDC_SHIFT 5 -+/* EMAC PHY Interface Type */ -+#define SYSCON_EPIT BIT(2) /* 1: RGMII, 0: MII */ -+#define SYSCON_ETCS_MASK GENMASK(1, 0) -+#define SYSCON_ETCS_MII 0x0 -+#define SYSCON_ETCS_EXT_GMII 0x1 -+#define SYSCON_ETCS_INT_GMII 0x2 -+#define SYSCON_EMAC_REG 0x30 -+ -+/* sun8i_dwmac_dma_reset() - reset the EMAC -+ * Called from stmmac via stmmac_dma_ops->reset -+ */ -+static int sun8i_dwmac_dma_reset(void __iomem *ioaddr) -+{ -+ writel(0, ioaddr + EMAC_RX_CTL1); -+ writel(0, ioaddr + EMAC_TX_CTL1); -+ writel(0, ioaddr + EMAC_RX_FRM_FLT); -+ writel(0, ioaddr + EMAC_RX_DESC_LIST); -+ writel(0, ioaddr + EMAC_TX_DESC_LIST); -+ writel(0, ioaddr + EMAC_INT_EN); -+ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); -+ return 0; -+} -+ -+/* sun8i_dwmac_dma_init() - initialize the EMAC -+ * Called from stmmac via stmmac_dma_ops->init -+ */ -+static void sun8i_dwmac_dma_init(void __iomem *ioaddr, -+ struct stmmac_dma_cfg *dma_cfg, -+ u32 dma_tx, u32 dma_rx, int atds) -+{ -+ /* Write TX and RX descriptors address */ -+ writel(dma_rx, ioaddr + EMAC_RX_DESC_LIST); -+ writel(dma_tx, ioaddr + EMAC_TX_DESC_LIST); -+ -+ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); -+ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); -+} -+ -+/* sun8i_dwmac_dump_regs() - Dump EMAC address space -+ * Called from stmmac_dma_ops->dump_regs -+ * Used for ethtool -+ */ -+static void sun8i_dwmac_dump_regs(void __iomem *ioaddr, u32 *reg_space) -+{ -+ int i; -+ -+ for (i = 0; i < 0xC8; i += 4) { -+ if (i == 0x32 || i == 0x3C) -+ continue; -+ reg_space[i / 4] = readl(ioaddr + i); -+ } -+} -+ -+/* sun8i_dwmac_dump_mac_regs() - Dump EMAC address space -+ * Called from stmmac_ops->dump_regs -+ * Used for ethtool -+ */ -+static void sun8i_dwmac_dump_mac_regs(struct mac_device_info *hw, -+ u32 *reg_space) -+{ -+ int i; -+ void __iomem *ioaddr = hw->pcsr; -+ -+ for (i = 0; i < 0xC8; i += 4) { -+ if (i == 0x32 || i == 0x3C) -+ continue; -+ reg_space[i / 4] = readl(ioaddr + i); -+ } -+} -+ -+static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr) -+{ -+ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); -+} -+ -+static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr) -+{ -+ writel(0, ioaddr + EMAC_INT_EN); -+} -+ -+static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v |= EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); -+} -+ -+static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ v |= EMAC_TX_DMA_START; -+ v |= EMAC_TX_DMA_EN; -+ writel_relaxed(v, ioaddr + EMAC_TX_CTL1); -+} -+ -+static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v &= ~EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); -+} -+ -+static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ v |= EMAC_RX_DMA_START; -+ v |= EMAC_RX_DMA_EN; -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v &= ~EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ v &= ~EMAC_RX_DMA_EN; -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, -+ struct stmmac_extra_stats *x) -+{ -+ u32 v; -+ int ret = 0; -+ -+ v = readl(ioaddr + EMAC_INT_STA); -+ -+ if (v & EMAC_TX_INT) { -+ ret |= handle_tx; -+ x->tx_normal_irq_n++; -+ } -+ -+ if (v & EMAC_TX_DMA_STOP_INT) -+ x->tx_process_stopped_irq++; -+ -+ if (v & EMAC_TX_BUF_UA_INT) -+ x->tx_process_stopped_irq++; -+ -+ if (v & EMAC_TX_TIMEOUT_INT) -+ ret |= tx_hard_error; -+ -+ if (v & EMAC_TX_UNDERFLOW_INT) { -+ ret |= tx_hard_error; -+ x->tx_undeflow_irq++; -+ } -+ -+ if (v & EMAC_TX_EARLY_INT) -+ x->tx_early_irq++; -+ -+ if (v & EMAC_RX_INT) { -+ ret |= handle_rx; -+ x->rx_normal_irq_n++; -+ } -+ -+ if (v & EMAC_RX_BUF_UA_INT) -+ x->rx_buf_unav_irq++; -+ -+ if (v & EMAC_RX_DMA_STOP_INT) -+ x->rx_process_stopped_irq++; -+ -+ if (v & EMAC_RX_TIMEOUT_INT) -+ ret |= tx_hard_error; -+ -+ if (v & EMAC_RX_OVERFLOW_INT) { -+ ret |= tx_hard_error; -+ x->rx_overflow_irq++; -+ } -+ -+ if (v & EMAC_RX_EARLY_INT) -+ x->rx_early_irq++; -+ -+ if (v & EMAC_RGMII_STA_INT) -+ x->irq_rgmii_n++; -+ -+ writel(v, ioaddr + EMAC_INT_STA); -+ -+ return ret; -+} -+ -+static void sun8i_dwmac_dma_operation_mode(void __iomem *ioaddr, int txmode, -+ int rxmode, int rxfifosz) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ if (txmode == SF_DMA_MODE) { -+ v |= EMAC_TX_MD; -+ /* Undocumented bit (called TX_NEXT_FRM in BSP), the original -+ * comment is -+ * "Operating on second frame increase the performance -+ * especially when transmit store-and-forward is used." -+ */ -+ v |= EMAC_TX_NEXT_FRM; -+ } else { -+ v &= ~EMAC_TX_MD; -+ v &= ~EMAC_TX_TH_MASK; -+ if (txmode < 64) -+ v |= EMAC_TX_TH_64; -+ else if (txmode < 128) -+ v |= EMAC_TX_TH_128; -+ else if (txmode < 192) -+ v |= EMAC_TX_TH_192; -+ else if (txmode < 256) -+ v |= EMAC_TX_TH_256; -+ } -+ writel(v, ioaddr + EMAC_TX_CTL1); -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ if (rxmode == SF_DMA_MODE) { -+ v |= EMAC_RX_MD; -+ } else { -+ v &= ~EMAC_RX_MD; -+ v &= ~EMAC_RX_TH_MASK; -+ if (rxmode < 32) -+ v |= EMAC_RX_TH_32; -+ else if (rxmode < 64) -+ v |= EMAC_RX_TH_64; -+ else if (rxmode < 96) -+ v |= EMAC_RX_TH_96; -+ else if (rxmode < 128) -+ v |= EMAC_RX_TH_128; -+ } -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static const struct stmmac_dma_ops sun8i_dwmac_dma_ops = { -+ .reset = sun8i_dwmac_dma_reset, -+ .init = sun8i_dwmac_dma_init, -+ .dump_regs = sun8i_dwmac_dump_regs, -+ .dma_mode = sun8i_dwmac_dma_operation_mode, -+ .enable_dma_transmission = sun8i_dwmac_enable_dma_transmission, -+ .enable_dma_irq = sun8i_dwmac_enable_dma_irq, -+ .disable_dma_irq = sun8i_dwmac_disable_dma_irq, -+ .start_tx = sun8i_dwmac_dma_start_tx, -+ .stop_tx = sun8i_dwmac_dma_stop_tx, -+ .start_rx = sun8i_dwmac_dma_start_rx, -+ .stop_rx = sun8i_dwmac_dma_stop_rx, -+ .dma_interrupt = sun8i_dwmac_dma_interrupt, -+}; -+ -+static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) -+{ -+ struct sunxi_priv_data *gmac = priv; -+ int ret; -+ -+ if (gmac->regulator) { -+ ret = regulator_enable(gmac->regulator); -+ if (ret) { -+ dev_err(&pdev->dev, "Fail to enable regulator\n"); -+ return ret; -+ } -+ } -+ -+ ret = clk_prepare_enable(gmac->tx_clk); -+ if (ret) { -+ if (gmac->regulator) -+ regulator_disable(gmac->regulator); -+ dev_err(&pdev->dev, "Could not enable AHB clock\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void sun8i_dwmac_core_init(struct mac_device_info *hw, int mtu) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = (8 << EMAC_BURSTLEN_SHIFT); /* burst len */ -+ writel(v, ioaddr + EMAC_BASIC_CTL1); -+} -+ -+static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, -+ unsigned char *addr, -+ unsigned int reg_n) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), -+ EMAC_MACADDR_LO(reg_n)); -+ if (reg_n > 0) { -+ v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); -+ v |= MAC_ADDR_TYPE_DST; -+ writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); -+ } -+} -+ -+static void sun8i_dwmac_get_umac_addr(struct mac_device_info *hw, -+ unsigned char *addr, -+ unsigned int reg_n) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ -+ stmmac_get_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), -+ EMAC_MACADDR_LO(reg_n)); -+} -+ -+/* caution this function must return non 0 to work */ -+static int sun8i_dwmac_rx_ipc_enable(struct mac_device_info *hw) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_DO_CRC; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ return 1; -+} -+ -+static void sun8i_dwmac_set_filter(struct mac_device_info *hw, -+ struct net_device *dev) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ int i = 0; -+ struct netdev_hw_addr *ha; -+ -+ v = readl(ioaddr + EMAC_RX_FRM_FLT); -+ -+ v |= EMAC_FRM_FLT_CTL; -+ -+ if (dev->flags & IFF_PROMISC) { -+ v = EMAC_FRM_FLT_RXALL; -+ } else if (dev->flags & IFF_ALLMULTI) { -+ v = EMAC_FRM_FLT_MULTICAST; -+ } else if (!netdev_mc_empty(dev)) { -+ netdev_for_each_mc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ } -+ } -+ -+ if (netdev_uc_count(dev) + i > hw->unicast_filter_entries) { -+ netdev_info(dev, "Too many address, switching to promiscuous\n"); -+ v = EMAC_FRM_FLT_RXALL; -+ } else { -+ netdev_for_each_uc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ } -+ } -+ writel(v, ioaddr + EMAC_RX_FRM_FLT); -+} -+ -+static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, -+ unsigned int duplex, -+ unsigned int fc, unsigned int pause_time) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ if (fc == FLOW_AUTO) -+ v |= EMAC_RX_FLOW_CTL_EN; -+ else -+ v &= ~EMAC_RX_FLOW_CTL_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ v = readl(ioaddr + EMAC_TX_FLOW_CTL); -+ if (fc == FLOW_AUTO) -+ v |= EMAC_TX_FLOW_CTL_EN; -+ else -+ v &= ~EMAC_TX_FLOW_CTL_EN; -+ writel(v, ioaddr + EMAC_TX_FLOW_CTL); -+} -+ -+static int sun8i_dwmac_reset(struct stmmac_priv *priv) -+{ -+ u32 v; -+ int err; -+ -+ v = readl(priv->ioaddr + EMAC_BASIC_CTL1); -+ writel(v | 0x01, priv->ioaddr + EMAC_BASIC_CTL1); -+ -+ err = readl_poll_timeout(priv->ioaddr + EMAC_BASIC_CTL1, v, -+ !(v & 0x01), 100, 10000); -+ -+ if (err) { -+ dev_err(priv->device, "EMAC reset timeout\n"); -+ return -EFAULT; -+ } -+ return 0; -+} -+ -+static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ struct device_node *node = priv->device->of_node; -+ int ret; -+ u32 reg, val; -+ -+ regmap_read(gmac->regmap, SYSCON_EMAC_REG, &val); -+ reg = gmac->variant->default_syscon_value; -+ if (reg != val) -+ dev_warn(priv->device, -+ "Current syscon value is not the default %x (expect %x)\n", -+ val, reg); -+ -+ if (gmac->variant->internal_phy) { -+ if (!gmac->use_internal_phy) { -+ /* switch to external PHY interface */ -+ reg &= ~H3_EPHY_SELECT; -+ } else { -+ reg |= H3_EPHY_SELECT; -+ reg &= ~H3_EPHY_SHUTDOWN; -+ dev_dbg(priv->device, "Select internal_phy %x\n", reg); -+ -+ if (of_property_read_bool(priv->plat->phy_node, -+ "allwinner,leds-active-low")) -+ reg |= H3_EPHY_LED_POL; -+ else -+ reg &= ~H3_EPHY_LED_POL; -+ -+ ret = of_mdio_parse_addr(priv->device, -+ priv->plat->phy_node); -+ if (ret < 0) { -+ dev_err(priv->device, "Could not parse MDIO addr\n"); -+ return ret; -+ } -+ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY -+ * address. No need to mask it again. -+ */ -+ reg |= ret << H3_EPHY_ADDR_SHIFT; -+ } -+ } -+ -+ if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) { -+ dev_dbg(priv->device, "set tx-delay to %x\n", val); -+ if (val <= SYSCON_ETXDC_MASK) { -+ reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); -+ reg |= (val << SYSCON_ETXDC_SHIFT); -+ } else { -+ dev_err(priv->device, "Invalid TX clock delay: %d\n", -+ val); -+ return -EINVAL; -+ } -+ } -+ -+ if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) { -+ dev_dbg(priv->device, "set rx-delay to %x\n", val); -+ if (val <= SYSCON_ERXDC_MASK) { -+ reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); -+ reg |= (val << SYSCON_ERXDC_SHIFT); -+ } else { -+ dev_err(priv->device, "Invalid RX clock delay: %d\n", -+ val); -+ return -EINVAL; -+ } -+ } -+ -+ /* Clear interface mode bits */ -+ reg &= ~(SYSCON_ETCS_MASK | SYSCON_EPIT); -+ if (gmac->variant->support_rmii) -+ reg &= ~SYSCON_RMII_EN; -+ -+ switch (priv->plat->interface) { -+ case PHY_INTERFACE_MODE_MII: -+ /* default */ -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII; -+ break; -+ case PHY_INTERFACE_MODE_RMII: -+ reg |= SYSCON_RMII_EN | SYSCON_ETCS_EXT_GMII; -+ break; -+ default: -+ dev_err(priv->device, "Unsupported interface mode: %s", -+ phy_modes(priv->plat->interface)); -+ return -EINVAL; -+ } -+ -+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); -+ -+ return 0; -+} -+ -+static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) -+{ -+ u32 reg = gmac->variant->default_syscon_value; -+ -+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); -+} -+ -+static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ int ret; -+ -+ if (gmac->ephy_clk) { -+ ret = clk_prepare_enable(gmac->ephy_clk); -+ if (ret) { -+ dev_err(priv->device, "Cannot enable ephy\n"); -+ return ret; -+ } -+ } -+ -+ if (gmac->rst_ephy) { -+ ret = reset_control_deassert(gmac->rst_ephy); -+ if (ret) { -+ dev_err(priv->device, "Cannot deassert ephy\n"); -+ clk_disable_unprepare(gmac->ephy_clk); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) -+{ -+ if (gmac->ephy_clk) -+ clk_disable_unprepare(gmac->ephy_clk); -+ if (gmac->rst_ephy) -+ reset_control_assert(gmac->rst_ephy); -+ return 0; -+} -+ -+static int sun8i_power_phy(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ int ret; -+ -+ ret = sun8i_dwmac_power_internal_phy(priv); -+ if (ret) -+ return ret; -+ -+ ret = sun8i_dwmac_set_syscon(priv); -+ if (ret) -+ goto error_phy; -+ -+ ret = sun8i_dwmac_reset(priv); -+ if (ret) -+ goto error_phy; -+ return 0; -+ -+error_phy: -+ sun8i_dwmac_unset_syscon(gmac); -+ sun8i_dwmac_unpower_internal_phy(gmac); -+ return ret; -+} -+ -+static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) -+{ -+ sun8i_dwmac_unset_syscon(gmac); -+ sun8i_dwmac_unpower_internal_phy(gmac); -+} -+ -+static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) -+{ -+ struct sunxi_priv_data *gmac = priv; -+ -+ sun8i_unpower_phy(gmac); -+ -+ clk_disable_unprepare(gmac->tx_clk); -+ -+ if (gmac->regulator) -+ regulator_disable(gmac->regulator); -+} -+ -+static const struct stmmac_ops sun8i_dwmac_ops = { -+ .core_init = sun8i_dwmac_core_init, -+ .dump_regs = sun8i_dwmac_dump_mac_regs, -+ .rx_ipc = sun8i_dwmac_rx_ipc_enable, -+ .set_filter = sun8i_dwmac_set_filter, -+ .flow_ctrl = sun8i_dwmac_flow_ctrl, -+ .set_umac_addr = sun8i_dwmac_set_umac_addr, -+ .get_umac_addr = sun8i_dwmac_get_umac_addr, -+}; -+ -+static struct mac_device_info *sun8i_dwmac_setup(struct stmmac_priv *priv) -+{ -+ struct mac_device_info *mac; -+ int ret; -+ -+ mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); -+ if (!mac) -+ return NULL; -+ -+ ret = sun8i_power_phy(priv); -+ if (ret) -+ return NULL; -+ -+ mac->pcsr = priv->ioaddr; -+ mac->mac = &sun8i_dwmac_ops; -+ mac->dma = &sun8i_dwmac_dma_ops; -+ -+ mac->link.port = 0; -+ mac->link.duplex = BIT(0); -+ mac->link.speed = 1; -+ mac->mii.addr = EMAC_MDIO_CMD; -+ mac->mii.data = EMAC_MDIO_DATA; -+ mac->mii.reg_shift = 4; -+ mac->mii.reg_mask = GENMASK(8, 4); -+ mac->mii.addr_shift = 12; -+ mac->mii.addr_mask = GENMASK(16, 12); -+ mac->mii.clk_csr_shift = 20; -+ mac->mii.clk_csr_mask = GENMASK(22, 20); -+ mac->unicast_filter_entries = 8; -+ -+ /* Synopsys Id is not available */ -+ priv->synopsys_id = 0; -+ -+ return mac; -+} -+ -+static int sun8i_dwmac_probe(struct platform_device *pdev) -+{ -+ struct plat_stmmacenet_data *plat_dat; -+ struct stmmac_resources stmmac_res; -+ struct sunxi_priv_data *gmac; -+ struct device *dev = &pdev->dev; -+ int ret; -+ -+ ret = stmmac_get_platform_resources(pdev, &stmmac_res); -+ if (ret) -+ return ret; -+ -+ plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac); -+ if (IS_ERR(plat_dat)) -+ return PTR_ERR(plat_dat); -+ -+ gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL); -+ if (!gmac) -+ return -ENOMEM; -+ -+ gmac->variant = of_device_get_match_data(&pdev->dev); -+ if (!gmac->variant) { -+ dev_err(&pdev->dev, "Missing sun8i-emac variant\n"); -+ return -EINVAL; -+ } -+ -+ gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); -+ if (IS_ERR(gmac->tx_clk)) { -+ dev_err(dev, "could not get tx clock\n"); -+ return PTR_ERR(gmac->tx_clk); -+ } -+ -+ /* Optional regulator for PHY */ -+ gmac->regulator = devm_regulator_get_optional(dev, "phy"); -+ if (IS_ERR(gmac->regulator)) { -+ if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) -+ return -EPROBE_DEFER; -+ dev_info(dev, "no regulator found\n"); -+ gmac->regulator = NULL; -+ } -+ -+ gmac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -+ "syscon"); -+ if (IS_ERR(gmac->regmap)) { -+ ret = PTR_ERR(gmac->regmap); -+ dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret); -+ return ret; -+ } -+ -+ plat_dat->interface = of_get_phy_mode(dev->of_node); -+ if (plat_dat->interface == gmac->variant->internal_phy) { -+ dev_info(&pdev->dev, "Will use internal PHY\n"); -+ gmac->use_internal_phy = true; -+ gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); -+ if (IS_ERR(gmac->ephy_clk)) { -+ ret = PTR_ERR(gmac->ephy_clk); -+ dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n", -+ ret); -+ return -EINVAL; -+ } -+ -+ gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); -+ if (IS_ERR(gmac->rst_ephy)) { -+ ret = PTR_ERR(gmac->rst_ephy); -+ if (ret == -EPROBE_DEFER) -+ return ret; -+ dev_err(&pdev->dev, "No EPHY reset control found %d\n", -+ ret); -+ return -EINVAL; -+ } -+ } else { -+ dev_info(&pdev->dev, "Will use external PHY\n"); -+ gmac->use_internal_phy = false; -+ } -+ -+ /* platform data specifying hardware features and callbacks. -+ * hardware features were copied from Allwinner drivers. -+ */ -+ plat_dat->rx_coe = STMMAC_RX_COE_TYPE2; -+ plat_dat->tx_coe = 1; -+ plat_dat->has_sun8i = true; -+ plat_dat->bsp_priv = gmac; -+ plat_dat->init = sun8i_dwmac_init; -+ plat_dat->exit = sun8i_dwmac_exit; -+ plat_dat->setup = sun8i_dwmac_setup; -+ -+ ret = sun8i_dwmac_init(pdev, plat_dat->bsp_priv); -+ if (ret) -+ return ret; -+ -+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); -+ if (ret) -+ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); -+ -+ return ret; -+} -+ -+static const struct of_device_id sun8i_dwmac_match[] = { -+ { .compatible = "allwinner,sun8i-h3-emac", -+ .data = &emac_variant_h3 }, -+ { .compatible = "allwinner,sun8i-a83t-emac", -+ .data = &emac_variant_a83t }, -+ { .compatible = "allwinner,sun50i-a64-emac", -+ .data = &emac_variant_a64 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); -+ -+static struct platform_driver sun8i_dwmac_driver = { -+ .probe = sun8i_dwmac_probe, -+ .remove = stmmac_pltfr_remove, -+ .driver = { -+ .name = "sun8i-dwmac", -+ .pm = &stmmac_pltfr_pm_ops, -+ .of_match_table = sun8i_dwmac_match, -+ }, -+}; -+module_platform_driver(sun8i_dwmac_driver); -+ -+MODULE_AUTHOR("Corentin Labbe "); -+MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 856ac57..05e8018 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -177,6 +177,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) - else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) - priv->clk_csr = STMMAC_CSR_250_300M; - } -+ -+ if (priv->plat->has_sun8i) { -+ if (clk_rate > 160000000) -+ priv->clk_csr = 0x03; -+ else if (clk_rate > 80000000) -+ priv->clk_csr = 0x02; -+ else if (clk_rate > 40000000) -+ priv->clk_csr = 0x01; -+ else -+ priv->clk_csr = 0; -+ } - } - - static void print_pkt(unsigned char *buf, int len) -@@ -697,6 +708,10 @@ static void stmmac_adjust_link(struct net_device *dev) - if (phydev->link) { - u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); - -+ /* disable loopback */ -+ if (priv->plat->has_sun8i) -+ ctrl &= ~BIT(1); -+ - /* Now we make sure that we can be in full duplex mode. - * If not, we operate in half-duplex mode. */ - if (phydev->duplex != priv->oldduplex) { -@@ -714,6 +729,8 @@ static void stmmac_adjust_link(struct net_device *dev) - - if (phydev->speed != priv->speed) { - new_state = 1; -+ if (priv->plat->has_sun8i) -+ ctrl &= ~GENMASK(3, 2); - switch (phydev->speed) { - case 1000: - if (priv->plat->has_gmac || -@@ -725,6 +742,8 @@ static void stmmac_adjust_link(struct net_device *dev) - priv->plat->has_gmac4) { - ctrl |= priv->hw->link.port; - ctrl |= priv->hw->link.speed; -+ } else if (priv->plat->has_sun8i) { -+ ctrl |= 3 << 2; - } else { - ctrl &= ~priv->hw->link.port; - } -@@ -734,6 +753,8 @@ static void stmmac_adjust_link(struct net_device *dev) - priv->plat->has_gmac4) { - ctrl |= priv->hw->link.port; - ctrl &= ~(priv->hw->link.speed); -+ } else if (priv->plat->has_sun8i) { -+ ctrl |= 2 << 2; - } else { - ctrl &= ~priv->hw->link.port; - } -@@ -1702,7 +1723,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) - /* Enable the MAC Rx/Tx */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) - stmmac_dwmac4_set_mac(priv->ioaddr, true); -- else -+ else if (!priv->plat->has_sun8i) - stmmac_set_mac(priv->ioaddr, true); - - /* Set the HW DMA mode and the COE */ -@@ -3123,6 +3144,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) - - priv->hw = mac; - -+ /* dwmac-sun8i only work in chain mode */ -+ if (priv->plat->has_sun8i) -+ chain_mode = 1; -+ - /* To use the chained or ring mode */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) { - priv->hw->mode = &dwmac4_ring_mode_ops; -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 0ba1caf..3c21862 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -160,6 +160,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, - struct device_node *np, struct device *dev) - { - bool mdio = true; -+ static const struct of_device_id need_mdio_ids[] = { -+ { .compatible = "snps,dwc-qos-ethernet-4.10" }, -+ { .compatible = "allwinner,sun8i-a83t-emac" }, -+ { .compatible = "allwinner,sun8i-h3-emac" }, -+ { .compatible = "allwinner,sun50i-a64-emac" }, -+ }; - - /* If phy-handle property is passed from DT, use it as the PHY */ - plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -@@ -176,8 +182,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, - mdio = false; - } - -- /* exception for dwmac-dwc-qos-eth glue logic */ -- if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) { -+ if (of_match_node(need_mdio_ids, np)) { - plat->mdio_node = of_get_child_by_name(np, "mdio"); - } else { - /** -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 8f09f18..100386c 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -147,6 +147,7 @@ struct plat_stmmacenet_data { - struct reset_control *stmmac_rst; - struct stmmac_axi *axi; - int has_gmac4; -+ bool has_sun8i; - bool tso_en; - int mac_port_sel_speed; - bool en_tx_lpi_clockgating; -From patchwork Tue Mar 14 14:18:42 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control - module -From: Corentin LABBE -X-Patchwork-Id: 9623549 -Message-Id: <20170314141856.24560-7-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:42 +0100 - -This patch add the dt node for the syscon register present on the -Allwinner H3/H5 - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock.. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 2494ea0..07e4f36 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -102,6 +102,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - dma: dma-controller@01c02000 { - compatible = "allwinner,sun8i-h3-dma"; - reg = <0x01c02000 0x1000>; -From patchwork Tue Mar 14 14:18:43 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,07/20] ARM: dts: sunxi-h3-h5: add dwmac-sun8i ethernet driver -From: Corentin LABBE -X-Patchwork-Id: 9623561 -Message-Id: <20170314141856.24560-8-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:43 +0100 - -The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 -speed. - -This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. -SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 07e4f36..c35af5e 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -272,6 +272,14 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ emac_rgmii_pins: emac0@0 { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - i2c0_pins: i2c0 { - pins = "PA11", "PA12"; - function = "i2c0"; -@@ -368,6 +376,31 @@ - clocks = <&osc24M>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x104>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+ }; -+ - spi0: spi@01c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; -From patchwork Tue Mar 14 14:18:44 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,08/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+ -From: Corentin LABBE -X-Patchwork-Id: 9623539 -Message-Id: <20170314141856.24560-9-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:44 +0100 - -From: LABBE Corentin - -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 37 +++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 52acbe1..30b0a41 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -90,6 +90,18 @@ - pinctrl-0 = <&wifi_en_bpi_m2p>; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &ehci1 { -@@ -186,3 +198,28 @@ - /* USB VBUS is on as long as VCC-IO is on */ - status = "okay"; - }; -+ -+&pio { -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,09/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI PC -From: Corentin LABBE -X-Patchwork-Id: 9623555 -Message-Id: <20170314141856.24560-10-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:45 +0100 - -From: LABBE Corentin - -The dwmac-sun8i hardware is present on the Orange PI PC. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..746c25a 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -53,6 +53,7 @@ - - aliases { - serial0 = &uart0; -+ ethernet0 = &emac; - }; - - chosen { -@@ -184,3 +185,10 @@ - /* USB VBUS is always on */ - status = "okay"; - }; -+ -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:46 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,10/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi 2 -From: Corentin LABBE -X-Patchwork-Id: 9623557 -Message-Id: <20170314141856.24560-11-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:46 +0100 - -The dwmac-sun8i hardware is present on the Orange PI 2. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..3f54b12 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -55,6 +55,7 @@ - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &rtl8189; -+ ethernet0 = &emac; - }; - - chosen { -@@ -203,3 +204,10 @@ - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; - }; -+ -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,11/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI One -From: Corentin LABBE -X-Patchwork-Id: 9623541 -Message-Id: <20170314141856.24560-12-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:47 +0100 - -The dwmac-sun8i hardware is present on the Orange PI One. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index ea8fd13..1f98ddc 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -53,6 +53,7 @@ - - aliases { - serial0 = &uart0; -+ ethernet0 = &emac; - }; - - chosen { -@@ -93,6 +94,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Tue Mar 14 14:18:48 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,12/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi plus -From: Corentin LABBE -X-Patchwork-Id: 9623569 -Message-Id: <20170314141856.24560-13-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:48 +0100 - -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 35 ++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7..4e075a2 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -58,6 +58,18 @@ - enable-active-high; - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; - }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &ehci3 { -@@ -86,8 +98,31 @@ - pins = "PG11"; - function = "gpio_out"; - }; -+ -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; - }; - - &usbphy { - usb3_vbus-supply = <®_usb3_vbus>; - }; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:49 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 13/20] ARM: dts: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to - active high -From: Corentin LABBE -X-Patchwork-Id: 9623593 -Message-Id: <20170314141856.24560-14-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:49 +0100 - -On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet -port were changed from active low to active high. - -Signed-off-by: Chen-Yu Tsai -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..0380769 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -86,3 +86,8 @@ - /* eMMC is missing pull-ups */ - bias-pull-up; - }; -+ -+&emac { -+ /* LEDs changed to active high on the plus */ -+ /delete-property/ allwinner,leds-active-low; -+}; -From patchwork Tue Mar 14 14:18:50 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, 14/20] ARM64: dts: sun50i-a64: Add dt node for the syscon control - module -From: Corentin LABBE -X-Patchwork-Id: 9623591 -Message-Id: <20170314141856.24560-15-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:50 +0100 - -This patch add the dt node for the syscon register present on the -Allwinner A64. - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 1c64ea2..3b09af2 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -121,6 +121,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc"; - reg = <0x01c0f000 0x1000>; -From patchwork Tue Mar 14 14:18:51 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,15/20] ARM64: dts: sun50i-a64: add dwmac-sun8i Ethernet driver -From: Corentin LABBE -X-Patchwork-Id: 9623621 -Message-Id: <20170314141856.24560-16-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:51 +0100 - -The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit -connections. It is very similar to the device found in the Allwinner -H3, but lacks the internal 100 Mbit PHY and its associated control -bits. -This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps -it disabled at this level. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 3b09af2..57d69e5 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -277,6 +277,23 @@ - bias-pull-up; - }; - -+ rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", -+ "PD17", "PD18", "PD19", "PD20", -+ "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ -+ rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", -+ "PD12", "PD13", "PD15", -+ "PD16", "PD17", "PD18", "PD19", -+ "PD20", "PD21", "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - uart0_pins_a: uart0@0 { - pins = "PB8", "PB9"; - function = "uart0"; -@@ -381,6 +398,26 @@ - #size-cells = <0>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun50i-a64-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x100>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, -From patchwork Tue Mar 14 14:18:52 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,16/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 -From: Corentin LABBE -X-Patchwork-Id: 9623607 -Message-Id: <20170314141856.24560-17-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:52 +0100 - -The dwmac-sun8i hardware is present on the pine64 -It uses an external PHY via RMII. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..b53994d 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -109,3 +109,18 @@ - &usbphy { - status = "okay"; - }; -+ -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rmii_pins>; -+ phy-mode = "rmii"; -+ phy-handle = <&ext_rmii_phy1>; -+ status = "okay"; -+ -+}; -From patchwork Tue Mar 14 14:18:53 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,17/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 plus -From: Corentin LABBE -X-Patchwork-Id: 9623597 -Message-Id: <20170314141856.24560-18-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:53 +0100 - -The dwmac-sun8i hardware is present on the pine64 plus. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..8e06aed 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,19 @@ - model = "Pine64+"; - compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - -- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ -+ /* TODO: Camera, touchscreen, etc. */ -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; - }; -From patchwork Tue Mar 14 14:18:54 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 18/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on the BananaPi M64 -From: Corentin LABBE -X-Patchwork-Id: 9623595 -Message-Id: <20170314141856.24560-19-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:54 +0100 - -The dwmac-sun8i hardware is present on the BananaPi M64. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..347c262 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -77,6 +77,20 @@ - bias-pull-up; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; diff --git a/CVE-2017-7477.patch b/CVE-2017-7477.patch deleted file mode 100644 index 6405614cc..000000000 --- a/CVE-2017-7477.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 4d6fa57b4dab0d77f4d8e9d9c73d1e63f6fe8fee Mon Sep 17 00:00:00 2001 -From: "Jason A. Donenfeld" -Date: Fri, 21 Apr 2017 23:14:48 +0200 -Subject: macsec: avoid heap overflow in skb_to_sgvec - -While this may appear as a humdrum one line change, it's actually quite -important. An sk_buff stores data in three places: - -1. A linear chunk of allocated memory in skb->data. This is the easiest - one to work with, but it precludes using scatterdata since the memory - must be linear. -2. The array skb_shinfo(skb)->frags, which is of maximum length - MAX_SKB_FRAGS. This is nice for scattergather, since these fragments - can point to different pages. -3. skb_shinfo(skb)->frag_list, which is a pointer to another sk_buff, - which in turn can have data in either (1) or (2). - -The first two are rather easy to deal with, since they're of a fixed -maximum length, while the third one is not, since there can be -potentially limitless chains of fragments. Fortunately dealing with -frag_list is opt-in for drivers, so drivers don't actually have to deal -with this mess. For whatever reason, macsec decided it wanted pain, and -so it explicitly specified NETIF_F_FRAGLIST. - -Because dealing with (1), (2), and (3) is insane, most users of sk_buff -doing any sort of crypto or paging operation calls a convenient function -called skb_to_sgvec (which happens to be recursive if (3) is in use!). -This takes a sk_buff as input, and writes into its output pointer an -array of scattergather list items. Sometimes people like to declare a -fixed size scattergather list on the stack; othertimes people like to -allocate a fixed size scattergather list on the heap. However, if you're -doing it in a fixed-size fashion, you really shouldn't be using -NETIF_F_FRAGLIST too (unless you're also ensuring the sk_buff and its -frag_list children arent't shared and then you check the number of -fragments in total required.) - -Macsec specifically does this: - - size += sizeof(struct scatterlist) * (MAX_SKB_FRAGS + 1); - tmp = kmalloc(size, GFP_ATOMIC); - *sg = (struct scatterlist *)(tmp + sg_offset); - ... - sg_init_table(sg, MAX_SKB_FRAGS + 1); - skb_to_sgvec(skb, sg, 0, skb->len); - -Specifying MAX_SKB_FRAGS + 1 is the right answer usually, but not if you're -using NETIF_F_FRAGLIST, in which case the call to skb_to_sgvec will -overflow the heap, and disaster ensues. - -Signed-off-by: Jason A. Donenfeld -Cc: stable@vger.kernel.org -Cc: security@kernel.org -Signed-off-by: David S. Miller ---- - drivers/net/macsec.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c -index ff0a5ed..dbab05a 100644 ---- a/drivers/net/macsec.c -+++ b/drivers/net/macsec.c -@@ -2716,7 +2716,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, - } - - #define MACSEC_FEATURES \ -- (NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST) -+ (NETIF_F_SG | NETIF_F_HIGHDMA) - static struct lock_class_key macsec_netdev_addr_lock_key; - - static int macsec_dev_init(struct net_device *dev) --- -cgit v1.1 - diff --git a/Fix-for-module-sig-verification.patch b/Fix-for-module-sig-verification.patch new file mode 100644 index 000000000..3a5de65eb --- /dev/null +++ b/Fix-for-module-sig-verification.patch @@ -0,0 +1,24 @@ +From ea6e7d9d0fe3e448aef19b3943d4897ae0bef128 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team +Date: Thu, 3 Aug 2017 13:46:51 -0500 +Subject: [PATCH] Fix for module sig verification + +--- + kernel/module_signing.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/module_signing.c b/kernel/module_signing.c +index 937c844..d3d6f95 100644 +--- a/kernel/module_signing.c ++++ b/kernel/module_signing.c +@@ -81,6 +81,6 @@ int mod_verify_sig(const void *mod, unsigned long *_modlen) + } + + return verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len, +- NULL, VERIFYING_MODULE_SIGNATURE, ++ (void *)1UL, VERIFYING_MODULE_SIGNATURE, + NULL, NULL); + } +-- +2.13.3 + diff --git a/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch b/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch new file mode 100644 index 000000000..d6a8e6a52 --- /dev/null +++ b/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch @@ -0,0 +1,54 @@ +From ef14a4bf0910d06c7e202552914028d4956809cb Mon Sep 17 00:00:00 2001 +From: Andrew Duggan +Date: Tue, 17 Oct 2017 18:37:36 -0700 +Subject: [PATCH] HID: rmi: Check that a device is a RMI device before calling + RMI functions + +The hid-rmi driver may handle non rmi devices on composite USB devices. +Callbacks need to make sure that the current device is a RMI device before +calling RMI specific functions. Most callbacks already have this check, but +this patch adds checks to the remaining callbacks. + +Reported-by: Hendrik Langer +Tested-by: Hendrik Langer +Reviewed-by: Benjamin Tissoires +Signed-off-by: Andrew Duggan +Signed-off-by: Jiri Kosina +--- + drivers/hid/hid-rmi.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c +index ef241d66562e..0f43c4292685 100644 +--- a/drivers/hid/hid-rmi.c ++++ b/drivers/hid/hid-rmi.c +@@ -368,6 +368,11 @@ static int rmi_check_sanity(struct hid_device *hdev, u8 *data, int size) + static int rmi_raw_event(struct hid_device *hdev, + struct hid_report *report, u8 *data, int size) + { ++ struct rmi_data *hdata = hid_get_drvdata(hdev); ++ ++ if (!(hdata->device_flags & RMI_DEVICE)) ++ return 0; ++ + size = rmi_check_sanity(hdev, data, size); + if (size < 2) + return 0; +@@ -713,9 +718,11 @@ static void rmi_remove(struct hid_device *hdev) + { + struct rmi_data *hdata = hid_get_drvdata(hdev); + +- clear_bit(RMI_STARTED, &hdata->flags); +- cancel_work_sync(&hdata->reset_work); +- rmi_unregister_transport_device(&hdata->xport); ++ if (hdata->device_flags & RMI_DEVICE) { ++ clear_bit(RMI_STARTED, &hdata->flags); ++ cancel_work_sync(&hdata->reset_work); ++ rmi_unregister_transport_device(&hdata->xport); ++ } + + hid_hw_stop(hdev); + } +-- +2.14.3 + diff --git a/KEYS-Add-a-system-blacklist-keyring.patch b/KEYS-Add-a-system-blacklist-keyring.patch deleted file mode 100644 index 262c960b8..000000000 --- a/KEYS-Add-a-system-blacklist-keyring.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 2a54526850121cd0d7cf649a321488b4dab5731d Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Fri, 26 Oct 2012 12:36:24 -0400 -Subject: [PATCH 17/20] KEYS: Add a system blacklist keyring - -This adds an additional keyring that is used to store certificates that -are blacklisted. This keyring is searched first when loading signed modules -and if the module's certificate is found, it will refuse to load. This is -useful in cases where third party certificates are used for module signing. - -Signed-off-by: Josh Boyer ---- - certs/system_keyring.c | 22 ++++++++++++++++++++++ - include/keys/system_keyring.h | 4 ++++ - init/Kconfig | 9 +++++++++ - 3 files changed, 35 insertions(+) - -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 50979d6dcecd..787eeead2f57 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -22,6 +22,9 @@ static struct key *builtin_trusted_keys; - #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING - static struct key *secondary_trusted_keys; - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+struct key *system_blacklist_keyring; -+#endif - - extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; -@@ -99,6 +102,16 @@ static __init int system_trusted_keyring_init(void) - if (key_link(secondary_trusted_keys, builtin_trusted_keys) < 0) - panic("Can't link trusted keyrings\n"); - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ system_blacklist_keyring = keyring_alloc(".system_blacklist_keyring", -+ KUIDT_INIT(0), KGIDT_INIT(0), current_cred(), -+ ((KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW | KEY_USR_READ | KEY_USR_SEARCH), -+ KEY_ALLOC_NOT_IN_QUOTA, -+ NULL, NULL); -+ if (IS_ERR(system_blacklist_keyring)) -+ panic("Can't allocate system blacklist keyring\n"); -+#endif - - return 0; - } -@@ -214,6 +227,15 @@ int verify_pkcs7_signature(const void *data, size_t len, - trusted_keys = builtin_trusted_keys; - #endif - } -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring); -+ if (!ret) { -+ /* module is signed with a cert in the blacklist. reject */ -+ pr_err("Module key is in the blacklist\n"); -+ ret = -EKEYREJECTED; -+ goto error; -+ } -+#endif - ret = pkcs7_validate_trust(pkcs7, trusted_keys); - if (ret < 0) { - if (ret == -ENOKEY) -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index fbd4647767e9..5bc291a3d261 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -33,6 +33,10 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #define restrict_link_by_builtin_and_secondary_trusted restrict_link_by_builtin_trusted - #endif - -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+extern struct key *system_blacklist_keyring; -+#endif -+ - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; - -diff --git a/init/Kconfig b/init/Kconfig -index 34407f15e6d3..461ad575a608 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1859,6 +1859,15 @@ config SYSTEM_DATA_VERIFICATION - module verification, kexec image verification and firmware blob - verification. - -+config SYSTEM_BLACKLIST_KEYRING -+ bool "Provide system-wide ring of blacklisted keys" -+ depends on KEYS -+ help -+ Provide a system keyring to which blacklisted keys can be added. -+ Keys in the keyring are considered entirely untrusted. Keys in this -+ keyring are used by the module signature checking to reject loading -+ of modules signed with a blacklisted key. -+ - config PROFILING - bool "Profiling support" - help --- -2.9.3 - diff --git a/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch b/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch new file mode 100644 index 000000000..1cc1e5370 --- /dev/null +++ b/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch @@ -0,0 +1,95 @@ +From fb2ac204a70da565de9ef9a9d6d69a40c2d59727 Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Fri, 5 May 2017 08:21:56 +0100 +Subject: [PATCH] KEYS: Allow unrestricted boot-time addition of keys to + secondary keyring + +Allow keys to be added to the system secondary certificates keyring during +kernel initialisation in an unrestricted fashion. Such keys are implicitly +trusted and don't have their trust chains checked on link. + +This allows keys in the UEFI database to be added in secure boot mode for +the purposes of module signing. + +Signed-off-by: David Howells +--- + certs/internal.h | 18 ++++++++++++++++++ + certs/system_keyring.c | 33 +++++++++++++++++++++++++++++++++ + 2 files changed, 51 insertions(+) + create mode 100644 certs/internal.h + +diff --git a/certs/internal.h b/certs/internal.h +new file mode 100644 +index 0000000..5dcbefb +--- /dev/null ++++ b/certs/internal.h +@@ -0,0 +1,18 @@ ++/* Internal definitions ++ * ++ * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++/* ++ * system_keyring.c ++ */ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++extern void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len); ++#endif +diff --git a/certs/system_keyring.c b/certs/system_keyring.c +index 6251d1b..5ac8ba6 100644 +--- a/certs/system_keyring.c ++++ b/certs/system_keyring.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include "internal.h" + + static struct key *builtin_trusted_keys; + #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING +@@ -265,3 +266,35 @@ int verify_pkcs7_signature(const void *data, size_t len, + EXPORT_SYMBOL_GPL(verify_pkcs7_signature); + + #endif /* CONFIG_SYSTEM_DATA_VERIFICATION */ ++ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++/** ++ * add_trusted_secondary_key - Add to secondary keyring with no validation ++ * @source: Source of key ++ * @data: The blob holding the key ++ * @len: The length of the data blob ++ * ++ * Add a key to the secondary keyring without checking its trust chain. This ++ * is available only during kernel initialisation. ++ */ ++void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len) ++{ ++ key_ref_t key; ++ ++ key = key_create_or_update(make_key_ref(secondary_trusted_keys, 1), ++ "asymmetric", ++ NULL, data, len, ++ (KEY_POS_ALL & ~KEY_POS_SETATTR) | ++ KEY_USR_VIEW, ++ KEY_ALLOC_NOT_IN_QUOTA | ++ KEY_ALLOC_BYPASS_RESTRICTION); ++ ++ if (IS_ERR(key)) ++ pr_err("Problem loading %s X.509 certificate (%ld)\n", ++ source, PTR_ERR(key)); ++ else ++ pr_notice("Loaded %s cert '%s' linked to secondary sys keyring\n", ++ source, key_ref_to_ptr(key)->description); ++} ++#endif /* CONFIG_SECONDARY_TRUSTED_KEYRING */ +-- +2.9.3 + diff --git a/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch b/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch deleted file mode 100644 index 6f5d8b6ab..000000000 --- a/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 71db1b222ecdf6cb4356f6f1e2bd45cd2f0e85e1 Mon Sep 17 00:00:00 2001 -From: Laura Abbott -Date: Tue, 18 Oct 2016 13:58:44 -0700 -Subject: [PATCH] MODSIGN: Don't try secure boot if EFI runtime is disabled - -Secure boot depends on having EFI runtime variable access. The code -does not handle a lack of runtime variables gracefully. Add a check -to just bail out of EFI runtime is disabled. - -Signed-off-by: Laura Abbott ---- - kernel/modsign_uefi.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c -index a41da14..2bdaf76 100644 ---- a/kernel/modsign_uefi.c -+++ b/kernel/modsign_uefi.c -@@ -71,6 +71,10 @@ static int __init load_uefi_certs(void) - if (!efi_enabled(EFI_SECURE_BOOT)) - return 0; - -+ /* Things blow up if efi runtime is disabled */ -+ if (efi_runtime_disabled()) -+ return 0; -+ - keyring = get_system_keyring(); - if (!keyring) { - pr_err("MODSIGN: Couldn't get system keyring\n"); --- -2.7.4 - diff --git a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch index 76084d472..08195ff4e 100644 --- a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch +++ b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch @@ -1,7 +1,7 @@ -From 8a4535bcfe24d317be675e53cdc8c61d22fdc7f3 Mon Sep 17 00:00:00 2001 +From 90dc66270b02981b19a085c6a9184e3452b7b3e8 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Fri, 26 Oct 2012 12:42:16 -0400 -Subject: [PATCH 18/20] MODSIGN: Import certificates from UEFI Secure Boot +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 3/4] MODSIGN: Import certificates from UEFI Secure Boot Secure Boot stores a list of allowed certificates in the 'db' variable. This imports those certificates into the system trusted keyring. This @@ -11,104 +11,68 @@ variable, a user can allow a module signed with that certificate to load. The shim UEFI bootloader has a similar certificate list stored in the 'MokListRT' variable. We import those as well. -In the opposite case, Secure Boot maintains a list of disallowed -certificates in the 'dbx' variable. We load those certificates into -the newly introduced system blacklist keyring and forbid any module -signed with those from loading. +Secure Boot also maintains a list of disallowed certificates in the 'dbx' +variable. We load those certificates into the newly introduced system +blacklist keyring and forbid any module signed with those from loading and +forbid the use within the kernel of any key with a matching hash. + +This facility is enabled by setting CONFIG_LOAD_UEFI_KEYS. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - certs/system_keyring.c | 13 ++++++ - include/keys/system_keyring.h | 1 + - init/Kconfig | 9 ++++ - kernel/Makefile | 3 ++ - kernel/modsign_uefi.c | 99 +++++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 125 insertions(+) - create mode 100644 kernel/modsign_uefi.c + certs/Kconfig | 16 ++++++ + certs/Makefile | 4 ++ + certs/load_uefi.c | 168 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 certs/load_uefi.c -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 787eeead2f57..4d9123ed5c07 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -30,6 +30,19 @@ extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; - - /** -+ * get_system_keyring - Return a pointer to the system keyring -+ * -+ */ -+struct key *get_system_keyring(void) -+{ -+ struct key *system_keyring = NULL; -+ -+ system_keyring = builtin_trusted_keys; -+ return system_keyring; -+} -+EXPORT_SYMBOL_GPL(get_system_keyring); -+ -+/** - * restrict_link_to_builtin_trusted - Restrict keyring addition by built in CA - * - * Restrict the addition of keys into a keyring based on the key-to-be-added -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index 5bc291a3d261..56ff5715ab67 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -36,6 +36,7 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING - extern struct key *system_blacklist_keyring; - #endif -+extern struct key *get_system_keyring(void); - - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; -diff --git a/init/Kconfig b/init/Kconfig -index 461ad575a608..93646fd7b1c8 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -2009,6 +2009,15 @@ config MODULE_SIG_ALL - comment "Do not forget to sign required modules with scripts/sign-file" - depends on MODULE_SIG_FORCE && !MODULE_SIG_ALL - -+config MODULE_SIG_UEFI -+ bool "Allow modules signed with certs stored in UEFI" -+ depends on MODULE_SIG && SYSTEM_BLACKLIST_KEYRING && EFI -+ select EFI_SIGNATURE_LIST_PARSER +diff --git a/certs/Kconfig b/certs/Kconfig +index 630ae09..edf9f75 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -90,4 +90,20 @@ config EFI_SIGNATURE_LIST_PARSER + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + ++config LOAD_UEFI_KEYS ++ bool "Load certs and blacklist from UEFI db for module checking" ++ depends on SYSTEM_BLACKLIST_KEYRING ++ depends on SECONDARY_TRUSTED_KEYRING ++ depends on EFI ++ depends on EFI_SIGNATURE_LIST_PARSER + help -+ This will import certificates stored in UEFI and allow modules -+ signed with those to be loaded. It will also disallow loading -+ of modules stored in the UEFI dbx variable. ++ If the kernel is booted in secure boot mode, this option will cause ++ the kernel to load the certificates from the UEFI db and MokListRT ++ into the secondary trusted keyring. It will also load any X.509 ++ SHA256 hashes in the dbx list into the blacklist. + - choice - prompt "Which hash algorithm should modules be signed with?" - depends on MODULE_SIG -diff --git a/kernel/Makefile b/kernel/Makefile -index eb26e12c6c2a..e0c2268cb97e 100644 ---- a/kernel/Makefile -+++ b/kernel/Makefile -@@ -57,6 +57,7 @@ endif - obj-$(CONFIG_UID16) += uid16.o - obj-$(CONFIG_MODULES) += module.o - obj-$(CONFIG_MODULE_SIG) += module_signing.o -+obj-$(CONFIG_MODULE_SIG_UEFI) += modsign_uefi.o - obj-$(CONFIG_KALLSYMS) += kallsyms.o - obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o - obj-$(CONFIG_KEXEC_CORE) += kexec_core.o -@@ -113,6 +114,8 @@ obj-$(CONFIG_MEMBARRIER) += membarrier.o - - obj-$(CONFIG_HAS_IOMEM) += memremap.o - -+$(obj)/modsign_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ The effect of this is that, if the kernel is booted in secure boot ++ mode, modules signed with UEFI-stored keys will be permitted to be ++ loaded and keys that match the blacklist will be rejected. + - $(obj)/configs.o: $(obj)/config_data.h - - targets += config_data.gz -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 738151a..a5e057a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -11,6 +11,10 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif + obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o + ++obj-$(CONFIG_LOAD_UEFI_KEYS) += load_uefi.o ++$(obj)/load_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ ++ + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + + $(eval $(call config_filename,SYSTEM_TRUSTED_KEYS)) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c new file mode 100644 -index 000000000000..fe4a6f2bf10a +index 0000000..b44e464 --- /dev/null -+++ b/kernel/modsign_uefi.c -@@ -0,0 +1,99 @@ ++++ b/certs/load_uefi.c +@@ -0,0 +1,168 @@ +#include +#include +#include @@ -117,14 +81,22 @@ index 000000000000..fe4a6f2bf10a +#include +#include +#include -+#include "module-internal.h" ++#include "internal.h" + -+static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; ++static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GUID; ++static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; ++ ++/* ++ * Get a certificate list blob from the named EFI variable. ++ */ ++static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, ++ unsigned long *size) +{ + efi_status_t status; + unsigned long lsize = 4; + unsigned long tmpdb[4]; -+ void *db = NULL; ++ void *db; + + status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); + if (status != EFI_BUFFER_TOO_SMALL) { @@ -135,23 +107,89 @@ index 000000000000..fe4a6f2bf10a + db = kmalloc(lsize, GFP_KERNEL); + if (!db) { + pr_err("Couldn't allocate memory for uefi cert list\n"); -+ goto out; ++ return NULL; + } + + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); -+ db = NULL; + pr_err("Error reading db var: 0x%lx\n", status); ++ return NULL; + } -+out: ++ + *size = lsize; + return db; +} + +/* -+ * * Load the certs contained in the UEFI databases -+ * */ ++ * Blacklist an X509 TBS hash. ++ */ ++static __init void uefi_blacklist_x509_tbs(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "tbs:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Blacklist the hash of an executable. ++ */ ++static __init void uefi_blacklist_binary(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "bin:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI db and MokListRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_db(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_guid) == 0) ++ return add_trusted_secondary_key; ++ return 0; ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI dbx and MokListXRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_sha256_guid) == 0) ++ return uefi_blacklist_x509_tbs; ++ if (efi_guidcmp(*sig_type, efi_cert_sha256_guid) == 0) ++ return uefi_blacklist_binary; ++ return 0; ++} ++ ++/* ++ * Load the certs contained in the UEFI databases ++ */ +static int __init load_uefi_certs(void) +{ + efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID; @@ -159,17 +197,9 @@ index 000000000000..fe4a6f2bf10a + void *db = NULL, *dbx = NULL, *mok = NULL; + unsigned long dbsize = 0, dbxsize = 0, moksize = 0; + int rc = 0; -+ struct key *keyring = NULL; + -+ /* Check if SB is enabled and just return if not */ -+ if (!efi_enabled(EFI_SECURE_BOOT)) -+ return 0; -+ -+ keyring = get_system_keyring(); -+ if (!keyring) { -+ pr_err("MODSIGN: Couldn't get system keyring\n"); -+ return -EINVAL; -+ } ++ if (!efi.get_variable) ++ return false; + + /* Get db, MokListRT, and dbx. They might not exist, so it isn't + * an error if we can't get them. @@ -178,7 +208,8 @@ index 000000000000..fe4a6f2bf10a + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); @@ -188,7 +219,8 @@ index 000000000000..fe4a6f2bf10a + if (!mok) { + pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); + } else { -+ rc = parse_efi_signature_list(mok, moksize, keyring); ++ rc = parse_efi_signature_list("UEFI:MokListRT", ++ mok, moksize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse MokListRT signatures: %d\n", rc); + kfree(mok); @@ -198,8 +230,9 @@ index 000000000000..fe4a6f2bf10a + if (!dbx) { + pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); + } else { -+ rc = parse_efi_signature_list(dbx, dbxsize, -+ system_blacklist_keyring); ++ rc = parse_efi_signature_list("UEFI:dbx", ++ dbx, dbxsize, ++ get_handler_for_dbx); + if (rc) + pr_err("Couldn't parse dbx signatures: %d\n", rc); + kfree(dbx); diff --git a/MODSIGN-Support-not-importing-certs-from-db.patch b/MODSIGN-Support-not-importing-certs-from-db.patch index d7087b5e7..13fecd2f2 100644 --- a/MODSIGN-Support-not-importing-certs-from-db.patch +++ b/MODSIGN-Support-not-importing-certs-from-db.patch @@ -1,62 +1,62 @@ -From 9d2e5c61d5adcf7911f67ed44a1b0ff881f175bb Mon Sep 17 00:00:00 2001 +From 9f1958a0cc911e1f79b2733ee5029dbd819ff328 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Thu, 3 Oct 2013 10:14:23 -0400 -Subject: [PATCH 19/20] MODSIGN: Support not importing certs from db +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 4/4] MODSIGN: Allow the "db" UEFI variable to be suppressed If a user tells shim to not use the certs/hashes in the UEFI db variable -for verification purposes, shim will set a UEFI variable called MokIgnoreDB. -Have the uefi import code look for this and not import things from the db -variable. +for verification purposes, shim will set a UEFI variable called +MokIgnoreDB. Have the uefi import code look for this and ignore the db +variable if it is found. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - kernel/modsign_uefi.c | 40 +++++++++++++++++++++++++++++++--------- - 1 file changed, 31 insertions(+), 9 deletions(-) + certs/load_uefi.c | 44 ++++++++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 10 deletions(-) -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c -index fe4a6f2bf10a..a41da14b1ffd 100644 ---- a/kernel/modsign_uefi.c -+++ b/kernel/modsign_uefi.c -@@ -8,6 +8,23 @@ - #include - #include "module-internal.h" - -+static __init int check_ignore_db(void) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index b44e464..3d88459 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -13,6 +13,26 @@ static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GU + static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; + + /* ++ * Look to see if a UEFI variable called MokIgnoreDB exists and return true if ++ * it does. ++ * ++ * This UEFI variable is set by the shim if a user tells the shim to not use ++ * the certs/hashes in the UEFI db variable for verification purposes. If it ++ * is set, we should ignore the db variable also and the true return indicates ++ * this. ++ */ ++static __init bool uefi_check_ignore_db(void) +{ + efi_status_t status; + unsigned int db = 0; + unsigned long size = sizeof(db); + efi_guid_t guid = EFI_SHIM_LOCK_GUID; + -+ /* Check and see if the MokIgnoreDB variable exists. If that fails -+ * then we don't ignore DB. If it succeeds, we do. -+ */ + status = efi.get_variable(L"MokIgnoreDB", &guid, NULL, &size, &db); -+ if (status != EFI_SUCCESS) -+ return 0; -+ -+ return 1; ++ return status == EFI_SUCCESS; +} + - static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++/* + * Get a certificate list blob from the named EFI variable. + */ + static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, +@@ -113,7 +133,9 @@ static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_ty + } + + /* +- * Load the certs contained in the UEFI databases ++ * Load the certs contained in the UEFI databases into the secondary trusted ++ * keyring and the UEFI blacklisted X.509 cert SHA256 hashes into the blacklist ++ * keyring. + */ + static int __init load_uefi_certs(void) { - efi_status_t status; -@@ -47,7 +64,7 @@ static int __init load_uefi_certs(void) - efi_guid_t mok_var = EFI_SHIM_LOCK_GUID; - void *db = NULL, *dbx = NULL, *mok = NULL; - unsigned long dbsize = 0, dbxsize = 0, moksize = 0; -- int rc = 0; -+ int ignore_db, rc = 0; - struct key *keyring = NULL; - - /* Check if SB is enabled and just return if not */ -@@ -60,17 +77,22 @@ static int __init load_uefi_certs(void) - return -EINVAL; - } - -+ /* See if the user has setup Ignore DB mode */ -+ ignore_db = check_ignore_db(); -+ +@@ -129,15 +151,17 @@ static int __init load_uefi_certs(void) /* Get db, MokListRT, and dbx. They might not exist, so it isn't * an error if we can't get them. */ @@ -64,22 +64,24 @@ index fe4a6f2bf10a..a41da14b1ffd 100644 - if (!db) { - pr_err("MODSIGN: Couldn't get UEFI db list\n"); - } else { -- rc = parse_efi_signature_list(db, dbsize, keyring); +- rc = parse_efi_signature_list("UEFI:db", +- db, dbsize, get_handler_for_db); - if (rc) - pr_err("Couldn't parse db signatures: %d\n", rc); - kfree(db); -+ if (!ignore_db) { ++ if (!uefi_check_ignore_db()) { + db = get_cert_list(L"db", &secure_var, &dbsize); + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); + } } - + mok = get_cert_list(L"MokListRT", &mok_var, &moksize); -- 2.9.3 diff --git a/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch b/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch new file mode 100644 index 000000000..03b011561 --- /dev/null +++ b/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch @@ -0,0 +1,55 @@ +From patchwork Mon Oct 2 14:08:40 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: PCI: aspm: deal with missing root ports in link state handling +From: Ard Biesheuvel +X-Patchwork-Id: 9980861 +Message-Id: <20171002140840.7767-1-ard.biesheuvel@linaro.org> +To: linux-pci@vger.kernel.org, bhelgaas@google.com +Cc: graeme.gregory@linaro.org, leif.lindholm@linaro.org, + daniel.thompson@Linaro.org, Ard Biesheuvel +Date: Mon, 2 Oct 2017 15:08:40 +0100 + +Even though it is unconventional, some PCIe host implementations omit +the root ports entirely, and simply consist of a host bridge (which +is not modeled as a device in the PCI hierarchy) and a link. + +When the downstream device is an endpoint, our current code does not +seem to mind this unusual configuration. However, when PCIe switches +are involved, the ASPM code assumes that any downstream switch port +has a parent, and blindly derefences the bus->parent->self field of +the pci_dev struct to chain the downstream link state to the link +state of the root port. Given that the root port is missing, the link +is not modeled at all, and nor is the link state, and attempting to +access it results in a NULL pointer dereference and a crash. + +So let's avoid this by allowing the link state chain to terminate at +the downstream port if no root port exists. + +Signed-off-by: Ard Biesheuvel +--- + drivers/pci/pcie/aspm.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c +index 1dfa10cc566b..0bea8498b5a5 100644 +--- a/drivers/pci/pcie/aspm.c ++++ b/drivers/pci/pcie/aspm.c +@@ -802,10 +802,14 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) + + /* + * Root Ports and PCI/PCI-X to PCIe Bridges are roots of PCIe +- * hierarchies. ++ * hierarchies. Note that some PCIe host implementations omit ++ * the root ports entirely, in which case a downstream port on ++ * a switch may become the root of the link state chain for all ++ * its subordinate endpoints. + */ + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT || +- pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE) { ++ pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE || ++ !pdev->bus->parent->self) { + link->root = link; + } else { + struct pcie_link_state *parent; diff --git a/README.txt b/README.txt index 516119838..6195bb56d 100644 --- a/README.txt +++ b/README.txt @@ -31,29 +31,30 @@ by make verrel config heirarchy. ----------------- Instead of having to maintain a config file for every arch variant we build on, -the kernel spec uses a nested system of configs. Each option CONFIG_FOO is -represented by a single file named CONFIG_FOO which contains the state (=y, =m, -=n). These options are collected in the folder baseconfig. Architecture specifi -options are set in nested folders. An option set in a nested folder will -override the same option set in one of the higher levels. +the kernel spec uses a nested system of configs. At the top level, is +config-generic. Add options here that should be present in every possible +config on all architectures. -The individual CONFIG_FOO files only exist in the pkg-git repository. The RPM -contains kernel-foo.config files which are the result of combining all the -CONFIG_FOO files. The files are combined by running build_configs.sh. This -script _must_ be run each time one of the options is changed. +Beneath this are per-arch overrides. For example config-x86-generic add +additional x86 specific options, and also _override_ any options that were +set in config-generic. -Example flow: +The heirarchy looks like this.. -# Enable the option CONFIG_ABC123 as a module for all arches -echo "CONFIG_ABC123=m" > baseconfig/CONFIG_ABC1234 -# enable the option CONFIG_XYZ321 for only x86 -echo "# CONFIG_XYZ321 is not set" > baseconfig/CONFIG_XYZ321 -echo "CONFIG_XYZ321=m" > baseconfig/x86/CONFIG_XYZ321 -# regenerate the combined config files -./build_configs.sh + config-generic + | + config-x86-generic + | | + config-x86-32-generic config-x86-64-generic + +An option set in a lower level will override the same option set in one +of the higher levels. + + +There exist two additional overrides, config-debug, and config-nodebug, +which override -generic, and the per-arch overrides. It is documented +further below. -The file config_generation gives a listing of what folders go into each -config file generated. debug options. -------------- @@ -68,11 +69,14 @@ typically been run already, which sets up the following.. If we are building for rawhide, 'make debug' has been run, which changes the status quo to: - We only build one kernel 'kernel' -- The debug options are always turned on. +- The debug options from 'config-debug' are always turned on. This is done to increase coverage testing, as not many people actually run kernel-debug. -The debug options are managed in a separate heierarchy under debugconfig. This -works in a similar manner to baseconfig. More deeply nested folders, again, -override options. The file config_generation gives a listing of what folders -go into each config file generated. +To add new debug options, add an option to _both_ config-debug and config-nodebug, +and also new stanzas to the Makefile 'debug' and 'release' targets. + +Sometimes debug options get added to config-generic, or per-arch overrides +instead of config-[no]debug. In this instance, the options should have no +discernable performance impact, otherwise they belong in the debug files. + diff --git a/allwinner-net-emac.patch b/allwinner-net-emac.patch new file mode 100644 index 000000000..c9c7cd0ec --- /dev/null +++ b/allwinner-net-emac.patch @@ -0,0 +1,1934 @@ +From 1b28a544627ddce094091946f06f99bc41d0098f Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:12 +0200 +Subject: [PATCH 01/11] net: stmmac: snps, dwmac-mdio MDIOs are automatically + registered + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Since these compatible is automatically registered, dwmac-sun8i compatible +does not need to be in need_mdio_ids. + +Signed-off-by: Corentin Labbe +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +index 6383695004a5..645ef949705f 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, + bool mdio = true; + static const struct of_device_id need_mdio_ids[] = { + { .compatible = "snps,dwc-qos-ethernet-4.10" }, +- { .compatible = "allwinner,sun8i-a83t-emac" }, +- { .compatible = "allwinner,sun8i-h3-emac" }, +- { .compatible = "allwinner,sun8i-v3s-emac" }, +- { .compatible = "allwinner,sun50i-a64-emac" }, + {}, + }; + +-- +2.14.3 + +From 9a5b1d9a7614b022512744896d889e76f687e90a Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:13 +0200 +Subject: [PATCH 02/11] net: stmmac: dwmac-sun8i: Handle integrated/external + MDIOs + +The Allwinner H3 SoC have two distinct MDIO bus, only one could be +active at the same time. +The selection of the active MDIO bus are done via some bits in the EMAC +register of the system controller. + +This patch implement this MDIO switch via a custom MDIO-mux. + +Signed-off-by: Corentin Labbe +Reviewed-by: Andrew Lunn +--- + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++-------- + 2 files changed, 224 insertions(+), 130 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig +index 97035766c291..e28c0d2c58e9 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig +@@ -159,6 +159,7 @@ config DWMAC_SUN8I + tristate "Allwinner sun8i GMAC support" + default ARCH_SUNXI + depends on OF && (ARCH_SUNXI || COMPILE_TEST) ++ select MDIO_BUS_MUX + ---help--- + Support for Allwinner H3 A83T A64 EMAC ethernet controllers. + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 39c2122a4f26..b3eb344bb158 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -41,14 +42,14 @@ + * This value is used for disabling properly EMAC + * and used as a good starting value in case of the + * boot process(uboot) leave some stuff. +- * @internal_phy: Does the MAC embed an internal PHY ++ * @soc_has_internal_phy: Does the MAC embed an internal PHY + * @support_mii: Does the MAC handle MII + * @support_rmii: Does the MAC handle RMII + * @support_rgmii: Does the MAC handle RGMII + */ + struct emac_variant { + u32 default_syscon_value; +- int internal_phy; ++ bool soc_has_internal_phy; + bool support_mii; + bool support_rmii; + bool support_rgmii; +@@ -61,7 +62,8 @@ struct emac_variant { + * @rst_ephy: reference to the optional EPHY reset for the internal PHY + * @variant: reference to the current board variant + * @regmap: regmap for using the syscon +- * @use_internal_phy: Does the current PHY choice imply using the internal PHY ++ * @internal_phy_powered: Does the internal PHY is enabled ++ * @mux_handle: Internal pointer used by mdio-mux lib + */ + struct sunxi_priv_data { + struct clk *tx_clk; +@@ -70,12 +72,13 @@ struct sunxi_priv_data { + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap *regmap; +- bool use_internal_phy; ++ bool internal_phy_powered; ++ void *mux_handle; + }; + + static const struct emac_variant emac_variant_h3 = { + .default_syscon_value = 0x58000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = { + + static const struct emac_variant emac_variant_v3s = { + .default_syscon_value = 0x38000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true + }; + + static const struct emac_variant emac_variant_a83t = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rgmii = true + }; + + static const struct emac_variant emac_variant_a64 = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = { + #define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */ + #define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */ + #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ ++#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT) ++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1 ++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2 + + /* H3/A64 specific bits */ + #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ +@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) + return 0; + } + ++/* Search in mdio-mux node for internal PHY node and get its clk/reset */ ++static int get_ephy_nodes(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ struct device_node *mdio_mux, *iphynode; ++ struct device_node *mdio_internal; ++ int ret; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) { ++ dev_err(priv->device, "Cannot get mdio-mux node\n"); ++ return -ENODEV; ++ } ++ ++ mdio_internal = of_find_compatible_node(mdio_mux, NULL, ++ "allwinner,sun8i-h3-mdio-internal"); ++ if (!mdio_internal) { ++ dev_err(priv->device, "Cannot get internal_mdio node\n"); ++ return -ENODEV; ++ } ++ ++ /* Seek for internal PHY */ ++ for_each_child_of_node(mdio_internal, iphynode) { ++ gmac->ephy_clk = of_clk_get(iphynode, 0); ++ if (IS_ERR(gmac->ephy_clk)) ++ continue; ++ gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL); ++ if (IS_ERR(gmac->rst_ephy)) { ++ ret = PTR_ERR(gmac->rst_ephy); ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ continue; ++ } ++ dev_info(priv->device, "Found internal PHY node\n"); ++ return 0; ++ } ++ return -ENODEV; ++} ++ ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ int ret; ++ ++ if (gmac->internal_phy_powered) { ++ dev_warn(priv->device, "Internal PHY already powered\n"); ++ return 0; ++ } ++ ++ dev_info(priv->device, "Powering internal PHY\n"); ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable internal PHY\n"); ++ return ret; ++ } ++ ++ /* Make sure the EPHY is properly reseted, as U-Boot may leave ++ * it at deasserted state, and thus it may fail to reset EMAC. ++ */ ++ reset_control_assert(gmac->rst_ephy); ++ ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert internal phy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; ++ } ++ ++ gmac->internal_phy_powered = true; ++ ++ return 0; ++} ++ ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) ++{ ++ if (!gmac->internal_phy_powered) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); ++ gmac->internal_phy_powered = false; ++ return 0; ++} ++ ++/* MDIO multiplexing switch function ++ * This function is called by the mdio-mux layer when it thinks the mdio bus ++ * multiplexer needs to switch. ++ * 'current_child' is the current value of the mux register ++ * 'desired_child' is the value of the 'reg' property of the target child MDIO ++ * node. ++ * The first time this function is called, current_child == -1. ++ * If current_child == desired_child, then the mux is already set to the ++ * correct bus. ++ */ ++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, ++ void *data) ++{ ++ struct stmmac_priv *priv = data; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ u32 reg, val; ++ int ret = 0; ++ bool need_power_ephy = false; ++ ++ if (current_child ^ desired_child) { ++ regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); ++ switch (desired_child) { ++ case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID: ++ dev_info(priv->device, "Switch mux to internal PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT; ++ ++ need_power_ephy = true; ++ break; ++ case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID: ++ dev_info(priv->device, "Switch mux to external PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN; ++ need_power_ephy = false; ++ break; ++ default: ++ dev_err(priv->device, "Invalid child ID %x\n", ++ desired_child); ++ return -EINVAL; ++ } ++ regmap_write(gmac->regmap, SYSCON_EMAC_REG, val); ++ if (need_power_ephy) { ++ ret = sun8i_dwmac_power_internal_phy(priv); ++ if (ret) ++ return ret; ++ } else { ++ sun8i_dwmac_unpower_internal_phy(gmac); ++ } ++ /* After changing syscon value, the MAC need reset or it will ++ * use the last value (and so the last PHY set). ++ */ ++ ret = sun8i_dwmac_reset(priv); ++ } ++ return ret; ++} ++ ++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv) ++{ ++ int ret; ++ struct device_node *mdio_mux; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) ++ return -ENODEV; ++ ++ ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn, ++ &gmac->mux_handle, priv, priv->mii); ++ return ret; ++} ++ + static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + { + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + "Current syscon value is not the default %x (expect %x)\n", + val, reg); + +- if (gmac->variant->internal_phy) { +- if (!gmac->use_internal_phy) { +- /* switch to external PHY interface */ +- reg &= ~H3_EPHY_SELECT; +- } else { +- reg |= H3_EPHY_SELECT; +- reg &= ~H3_EPHY_SHUTDOWN; +- dev_dbg(priv->device, "Select internal_phy %x\n", reg); +- +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) +- reg |= H3_EPHY_LED_POL; +- else +- reg &= ~H3_EPHY_LED_POL; +- +- /* Force EPHY xtal frequency to 24MHz. */ +- reg |= H3_EPHY_CLK_SEL; +- +- ret = of_mdio_parse_addr(priv->device, +- priv->plat->phy_node); +- if (ret < 0) { +- dev_err(priv->device, "Could not parse MDIO addr\n"); +- return ret; +- } +- /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY +- * address. No need to mask it again. +- */ +- reg |= ret << H3_EPHY_ADDR_SHIFT; ++ if (gmac->variant->soc_has_internal_phy) { ++ if (of_property_read_bool(priv->plat->phy_node, ++ "allwinner,leds-active-low")) ++ reg |= H3_EPHY_LED_POL; ++ else ++ reg &= ~H3_EPHY_LED_POL; ++ ++ /* Force EPHY xtal frequency to 24MHz. */ ++ reg |= H3_EPHY_CLK_SEL; ++ ++ ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node); ++ if (ret < 0) { ++ dev_err(priv->device, "Could not parse MDIO addr\n"); ++ return ret; + } ++ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY ++ * address. No need to mask it again. ++ */ ++ reg |= 1 << H3_EPHY_ADDR_SHIFT; + } + + if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { +@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) + regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); + } + +-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + { +- struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +- int ret; +- +- if (!gmac->use_internal_phy) +- return 0; +- +- ret = clk_prepare_enable(gmac->ephy_clk); +- if (ret) { +- dev_err(priv->device, "Cannot enable ephy\n"); +- return ret; +- } +- +- /* Make sure the EPHY is properly reseted, as U-Boot may leave +- * it at deasserted state, and thus it may fail to reset EMAC. +- */ +- reset_control_assert(gmac->rst_ephy); ++ struct sunxi_priv_data *gmac = priv; + +- ret = reset_control_deassert(gmac->rst_ephy); +- if (ret) { +- dev_err(priv->device, "Cannot deassert ephy\n"); +- clk_disable_unprepare(gmac->ephy_clk); +- return ret; ++ if (gmac->variant->soc_has_internal_phy) { ++ /* sun8i_dwmac_exit could be called with mdiomux uninit */ ++ if (gmac->mux_handle) ++ mdio_mux_uninit(gmac->mux_handle); ++ if (gmac->internal_phy_powered) ++ sun8i_dwmac_unpower_internal_phy(gmac); + } + +- return 0; +-} +- +-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +-{ +- if (!gmac->use_internal_phy) +- return 0; +- +- clk_disable_unprepare(gmac->ephy_clk); +- reset_control_assert(gmac->rst_ephy); +- return 0; +-} +- +-/* sun8i_power_phy() - Activate the PHY: +- * In case of error, no need to call sun8i_unpower_phy(), +- * it will be called anyway by sun8i_dwmac_exit() +- */ +-static int sun8i_power_phy(struct stmmac_priv *priv) +-{ +- int ret; +- +- ret = sun8i_dwmac_power_internal_phy(priv); +- if (ret) +- return ret; +- +- ret = sun8i_dwmac_set_syscon(priv); +- if (ret) +- return ret; +- +- /* After changing syscon value, the MAC need reset or it will use +- * the last value (and so the last PHY set. +- */ +- ret = sun8i_dwmac_reset(priv); +- if (ret) +- return ret; +- return 0; +-} +- +-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) +-{ + sun8i_dwmac_unset_syscon(gmac); +- sun8i_dwmac_unpower_internal_phy(gmac); +-} +- +-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) +-{ +- struct sunxi_priv_data *gmac = priv; + +- sun8i_unpower_phy(gmac); ++ reset_control_put(gmac->rst_ephy); + + clk_disable_unprepare(gmac->tx_clk); + +@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) + if (!mac) + return NULL; + +- ret = sun8i_power_phy(priv); ++ ret = sun8i_dwmac_set_syscon(priv); + if (ret) + return NULL; + +@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + struct sunxi_priv_data *gmac; + struct device *dev = &pdev->dev; + int ret; ++ struct stmmac_priv *priv; ++ struct net_device *ndev; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) +@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + } + + plat_dat->interface = of_get_phy_mode(dev->of_node); +- if (plat_dat->interface == gmac->variant->internal_phy) { +- dev_info(&pdev->dev, "Will use internal PHY\n"); +- gmac->use_internal_phy = true; +- gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); +- if (IS_ERR(gmac->ephy_clk)) { +- ret = PTR_ERR(gmac->ephy_clk); +- dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); +- return -EINVAL; +- } +- +- gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); +- if (IS_ERR(gmac->rst_ephy)) { +- ret = PTR_ERR(gmac->rst_ephy); +- if (ret == -EPROBE_DEFER) +- return ret; +- dev_err(&pdev->dev, "No EPHY reset control found %d\n", +- ret); +- return -EINVAL; +- } +- } else { +- dev_info(&pdev->dev, "Will use external PHY\n"); +- gmac->use_internal_phy = false; +- } + + /* platform data specifying hardware features and callbacks. + * hardware features were copied from Allwinner drivers. +@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) +- sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++ goto dwmac_exit; ++ ++ ndev = dev_get_drvdata(&pdev->dev); ++ priv = netdev_priv(ndev); ++ /* The mux must be registered after parent MDIO ++ * so after stmmac_dvr_probe() ++ */ ++ if (gmac->variant->soc_has_internal_phy) { ++ ret = get_ephy_nodes(priv); ++ if (ret) ++ goto dwmac_exit; ++ ret = sun8i_dwmac_register_mdio_mux(priv); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register mux\n"); ++ goto dwmac_mux; ++ } ++ } else { ++ ret = sun8i_dwmac_reset(priv); ++ if (ret) ++ goto dwmac_exit; ++ } + + return ret; ++dwmac_mux: ++ sun8i_dwmac_unset_syscon(gmac); ++dwmac_exit: ++ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++return ret; + } + + static const struct of_device_id sun8i_dwmac_match[] = { +-- +2.14.3 + +From f58f11ebb67468471ed8f232c576f348dd1a32b1 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:14 +0200 +Subject: [PATCH 03/11] net: stmmac: sun8i: Restore the compatibles + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore compatibles about dwmac-sun8i +This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles") + +Signed-off-by: Corentin Labbe +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index b3eb344bb158..e5ff734d4f9b 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -1072,6 +1072,14 @@ return ret; + } + + static const struct of_device_id sun8i_dwmac_match[] = { ++ { .compatible = "allwinner,sun8i-h3-emac", ++ .data = &emac_variant_h3 }, ++ { .compatible = "allwinner,sun8i-v3s-emac", ++ .data = &emac_variant_v3s }, ++ { .compatible = "allwinner,sun8i-a83t-emac", ++ .data = &emac_variant_a83t }, ++ { .compatible = "allwinner,sun50i-a64-emac", ++ .data = &emac_variant_a64 }, + { } + }; + MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); +-- +2.14.3 + +From 54678636d98cd9625f342c831015e302642bf104 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:08 +0100 +Subject: [PATCH 04/11] dt-bindings: net: Restore sun8i dwmac binding + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore dt-bindings documentation about dwmac-sun8i +This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac binding") + +Signed-off-by: Corentin Labbe +Acked-by: Rob Herring +Acked-by: Florian Fainelli +--- + .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++ + 1 file changed, 84 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt + +diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +new file mode 100644 +index 000000000000..725f3b187886 +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +@@ -0,0 +1,84 @@ ++* Allwinner sun8i GMAC ethernet controller ++ ++This device is a platform glue layer for stmmac. ++Please see stmmac.txt for the other unchanged properties. ++ ++Required properties: ++- compatible: should be one of the following string: ++ "allwinner,sun8i-a83t-emac" ++ "allwinner,sun8i-h3-emac" ++ "allwinner,sun8i-v3s-emac" ++ "allwinner,sun50i-a64-emac" ++- reg: address and length of the register for the device. ++- interrupts: interrupt for the device ++- interrupt-names: should be "macirq" ++- clocks: A phandle to the reference clock for this device ++- clock-names: should be "stmmaceth" ++- resets: A phandle to the reset control for this device ++- reset-names: should be "stmmaceth" ++- phy-mode: See ethernet.txt ++- phy-handle: See ethernet.txt ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++- syscon: A phandle to the syscon of the SoC with one of the following ++ compatible string: ++ - allwinner,sun8i-h3-system-controller ++ - allwinner,sun8i-v3s-system-controller ++ - allwinner,sun50i-a64-system-controller ++ - allwinner,sun8i-a83t-system-controller ++ ++Optional properties: ++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) ++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) ++Both delay properties need to be a multiple of 100. They control the delay for ++external PHY. ++ ++Optional properties for the following compatibles: ++ - "allwinner,sun8i-h3-emac", ++ - "allwinner,sun8i-v3s-emac": ++- allwinner,leds-active-low: EPHY LEDs are active low ++ ++Required child node of emac: ++- mdio bus node: should be named mdio ++ ++Required properties of the mdio node: ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++ ++The device node referenced by "phy" or "phy-handle" should be a child node ++of the mdio node. See phy.txt for the generic PHY bindings. ++ ++Required properties of the phy node with the following compatibles: ++ - "allwinner,sun8i-h3-emac", ++ - "allwinner,sun8i-v3s-emac": ++- clocks: a phandle to the reference clock for the EPHY ++- resets: a phandle to the reset control for the EPHY ++ ++Example: ++ ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++}; +-- +2.14.3 + +From 227bc8c6bfad58c32c7a6c3bbc13d99eb6d266c0 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:09 +0100 +Subject: [PATCH 05/11] dt-bindings: net: dwmac-sun8i: update documentation + about integrated PHY + +This patch add documentation about the MDIO switch used on sun8i-h3-emac +for integrated PHY. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Reviewed-by: Andrew Lunn +--- + .../devicetree/bindings/net/dwmac-sun8i.txt | 147 +++++++++++++++++++-- + 1 file changed, 135 insertions(+), 12 deletions(-) + +diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +index 725f3b187886..3d6d5fa0c4d5 100644 +--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt ++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac. + Please see stmmac.txt for the other unchanged properties. + + Required properties: +-- compatible: should be one of the following string: ++- compatible: must be one of the following string: + "allwinner,sun8i-a83t-emac" + "allwinner,sun8i-h3-emac" + "allwinner,sun8i-v3s-emac" + "allwinner,sun50i-a64-emac" + - reg: address and length of the register for the device. + - interrupts: interrupt for the device +-- interrupt-names: should be "macirq" ++- interrupt-names: must be "macirq" + - clocks: A phandle to the reference clock for this device +-- clock-names: should be "stmmaceth" ++- clock-names: must be "stmmaceth" + - resets: A phandle to the reset control for this device +-- reset-names: should be "stmmaceth" ++- reset-names: must be "stmmaceth" + - phy-mode: See ethernet.txt + - phy-handle: See ethernet.txt + - #address-cells: shall be 1 +@@ -39,23 +39,42 @@ Optional properties for the following compatibles: + - allwinner,leds-active-low: EPHY LEDs are active low + + Required child node of emac: +-- mdio bus node: should be named mdio ++- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio" + + Required properties of the mdio node: + - #address-cells: shall be 1 + - #size-cells: shall be 0 + +-The device node referenced by "phy" or "phy-handle" should be a child node ++The device node referenced by "phy" or "phy-handle" must be a child node + of the mdio node. See phy.txt for the generic PHY bindings. + +-Required properties of the phy node with the following compatibles: ++The following compatibles require that the emac node have a mdio-mux child ++node called "mdio-mux": ++ - "allwinner,sun8i-h3-emac" ++ - "allwinner,sun8i-v3s-emac": ++Required properties for the mdio-mux node: ++ - compatible = "allwinner,sun8i-h3-mdio-mux" ++ - mdio-parent-bus: a phandle to EMAC mdio ++ - one child mdio for the integrated mdio with the compatible ++ "allwinner,sun8i-h3-mdio-internal" ++ - one child mdio for the external mdio if present (V3s have none) ++Required properties for the mdio-mux children node: ++ - reg: 1 for internal MDIO bus, 2 for external MDIO bus ++ ++The following compatibles require a PHY node representing the integrated ++PHY, under the integrated MDIO bus node if an mdio-mux node is used: + - "allwinner,sun8i-h3-emac", + - "allwinner,sun8i-v3s-emac": ++ ++Additional information regarding generic multiplexer properties can be found ++at Documentation/devicetree/bindings/net/mdio-mux.txt ++ ++Required properties of the integrated phy node: + - clocks: a phandle to the reference clock for the EPHY + - resets: a phandle to the reset control for the EPHY ++- Must be a child of the integrated mdio + +-Example: +- ++Example with integrated PHY: + emac: ethernet@1c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; +@@ -72,13 +91,117 @@ emac: ethernet@1c0b000 { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ ++ int_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ phy-is-integrated; ++ }; ++ }; ++ ext_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++}; ++ ++Example with external PHY: ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ allwinner,leds-active-low; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ ++ int_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ ext_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ }: ++ }; ++}; ++ ++Example with SoC without integrated PHY ++ ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-a83t-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ + mdio: mdio { ++ compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; +- int_mii_phy: ethernet-phy@1 { ++ ext_rgmii_phy: ethernet-phy@1 { + reg = <1>; +- clocks = <&ccu CLK_BUS_EPHY>; +- resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; +-- +2.14.3 + +From 1de79efa35a1130c7a085f62b9d9b666d79b9a89 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Nov 2017 14:04:20 +0000 +Subject: [PATCH 06/11] arm: dts: sunxi: h3/h5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore sunxi-h3-h5.dtsi +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 11240a8313c2..d38282b9e5d4 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -391,6 +391,32 @@ + clocks = <&osc24M>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ }; ++ + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +-- +2.14.3 + +From 65233cba93184e0efa8d94f907d65af947d197a1 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:11 +0100 +Subject: [PATCH 07/11] ARM: dts: sunxi: h3/h5: represent the mdio switch used + by sun8i-h3-emac + +Since dwmac-sun8i could use either an integrated PHY or an external PHY +(which could be at same MDIO address), we need to represent this selection +by a MDIO switch. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Reviewed-by: Andrew Lunn +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++---- + 1 file changed, 27 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index d38282b9e5d4..2721b39c1875 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -408,11 +408,34 @@ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; +- int_mii_phy: ethernet-phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ /* Only one MDIO is usable at the time */ ++ internal_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; +- clocks = <&ccu CLK_BUS_EPHY>; +- resets = <&ccu RST_BUS_EPHY>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ ++ external_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; + }; + }; + }; +-- +2.14.3 + +From b705315d36dbe1b31062f30c987b3a502b437c85 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Nov 2017 14:08:45 +0000 +Subject: [PATCH 08/11] ARM: dts: sunxi: Restore EMAC changes (boards) + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore all boards DT about dwmac-sun8i +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +++++++++ + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++++++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++++++++++++++++ + 10 files changed, 121 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +index b1502df7b509..6713d0f2b3f4 100644 +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +@@ -56,6 +56,8 @@ + + aliases { + serial0 = &uart0; ++ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &xr819; + }; + +@@ -102,6 +104,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +index a337af1de322..3f95d806355b 100644 +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -52,6 +52,7 @@ + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -114,6 +115,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +index 8ddd1b2cc097..ef0371811296 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -62,3 +62,22 @@ + &ohci2 { + status = "okay"; + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +index 8d2cc6e9a03f..78f6c24952dd 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +@@ -46,3 +46,10 @@ + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +index 8ff71b1bb45b..17cdeae19c6f 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -54,6 +54,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; + }; + +@@ -117,6 +118,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +index 5fea430e0eb1..6880268e8b87 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -97,6 +98,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +index 8b93f5c781a7..a10281b455f5 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +@@ -53,6 +53,11 @@ + }; + }; + ++&emac { ++ /* LEDs changed to active high on the plus */ ++ /delete-property/ allwinner,leds-active-low; ++}; ++ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +index 1a044b17d6c6..998b60f8d295 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -113,6 +114,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +index 828ae7a526d9..3002c025e187 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,10 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; +@@ -74,6 +78,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts +index 97920b12a944..6dbf7b2e0c13 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts +@@ -61,3 +61,19 @@ + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ + }; + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; +-- +2.14.3 + +From 516b88bfa40cf54732d2ba5e689fdf592a742ec3 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:13 +0100 +Subject: [PATCH 09/11] arm64: dts: allwinner: A64: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for A64 +This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++ + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++ + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++ + 5 files changed, 84 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +index d347f52e27f6..45bdbfb96126 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -51,6 +51,7 @@ + compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -69,6 +70,14 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -79,6 +88,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +index f82ccf332c0f..24f1aac366d6 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +@@ -48,3 +48,18 @@ + + /* TODO: Camera, touchscreen, etc. */ + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index d06e34b5d192..806442d3e846 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -51,6 +51,7 @@ + compatible = "pine64,pine64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; +@@ -71,6 +72,15 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rmii_pins>; ++ phy-mode = "rmii"; ++ phy-handle = <&ext_rmii_phy1>; ++ status = "okay"; ++ ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -81,6 +91,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +index 17ccc12b58df..0eb2acedf8c3 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -53,6 +53,7 @@ + "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -76,6 +77,21 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 8c8db1b057df..50f17bab0c07 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -449,6 +449,26 @@ + #size-cells = <0>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun50i-a64-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, +-- +2.14.3 + +From 070173449eb88e9cf9c91889c77f53616911f4d0 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:14 +0100 +Subject: [PATCH 10/11] arm64: dts: allwinner: H5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for H5 +This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++ + .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++ + .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++ + 3 files changed, 51 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +index 1c2387bd5df6..6eb8092d8e57 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +@@ -50,6 +50,7 @@ + compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -108,6 +109,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +index 4f77c8470f6c..a0ca925175aa 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -59,6 +59,7 @@ + }; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -136,6 +137,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +index 6be06873e5af..b47790650144 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +@@ -54,6 +54,7 @@ + compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -143,6 +144,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +-- +2.14.3 + +From 63118a9f7808a0a67c23e7d276138c996e094eae Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:15 +0100 +Subject: [PATCH 11/11] arm64: dts: allwinner: add snps, dwmac-mdio compatible + to emac/mdio + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 50f17bab0c07..8fd75c95937a 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -464,6 +464,7 @@ + #size-cells = <0>; + + mdio: mdio { ++ compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; +-- +2.14.3 + +From patchwork Fri Nov 10 09:26:54 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: arm64: allwinner: a64: add Ethernet PHY regulator for several boards +From: Icenowy Zheng +X-Patchwork-Id: 10052659 +Message-Id: <20171110092654.10746-1-icenowy@aosc.io> +To: Maxime Ripard , + Chen-Yu Tsai +Cc: linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Date: Fri, 10 Nov 2017 17:26:54 +0800 + +On several A64 boards the Ethernet PHY is powered by the DC1SW regulator +on the AXP803 PMIC. + +Add phy-handle property to these boards' emac node. + +Signed-off-by: Icenowy Zheng +Acked-by: Corentin LABBE +Tested-by: Corentin LABBE +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 + + 3 files changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +index 45bdbfb96126..4a8d3f83a36e 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -75,6 +75,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index 806442d3e846..604cdaedac38 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -77,6 +77,7 @@ + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy-handle = <&ext_rmii_phy1>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + + }; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +index 0eb2acedf8c3..a053a6ac5267 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -82,6 +82,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + +From 79e7d6c8bfe67fce8c8fe4953e74ce7f420dd732 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 21 Nov 2017 15:43:19 +0000 +Subject: [PATCH] ARM: dts: sunxi: sun8i-h3-nanopi-m1-plus: Add missing + regulator + +This patch add the missing regulator for sun8i-h3-nanopi-m1-plus. + +Fixes: ("ARM: dts: sunxi: Restore EMAC changes (boards)") +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +index ef0371811296..738ef1d9e844 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -45,6 +45,17 @@ + / { + model = "FriendlyArm NanoPi M1 Plus"; + compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + }; + + &ehci1 { +-- +2.14.3 + +From 4497478c60c04d2bf37082e27fc98f4f835db96b Mon Sep 17 00:00:00 2001 +From: Niklas Cassel +Date: Tue, 14 Nov 2017 11:15:54 +0100 +Subject: net: stmmac: fix LPI transitioning for dwmac4 + +The LPI transitioning logic in stmmac_main uses +priv->tx_path_in_lpi_mode to enter/exit LPI. + +However, priv->tx_path_in_lpi_mode is assigned +using the return value from host_irq_status(). + +So for dwmac4, priv->tx_path_in_lpi_mode was always false, +so stmmac_tx_clean() would always try to put us in eee mode, +and stmmac_xmit() would never take us out of eee mode. + +To fix this, make host_irq_status() read and return the LPI +irq status also for dwmac4. + +This also increments the existing LPI counters, so that +ethtool --statistics shows LPI transitions also for dwmac4. + +For dwmac1000, irqs are enabled/disabled using the register +named "Interrupt Mask Register", and thus setting a bit disables +that specific irq. + +For dwmac4 the matching register is named "MAC_Interrupt_Enable", +and thus setting a bit enables that specific irq. + +Looking at dwmac1000_core.c, the irqs that are always enabled are: +LPI and PMT. + +Looking at dwmac4_core.c, the irqs that are always enabled are: +PMT. + +To be able to read the LPI irq status, we need to enable the LPI +irq also for dwmac4. + +Signed-off-by: Niklas Cassel +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 7 ++++++- + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 19 +++++++++++++++++++ + 2 files changed, 25 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +index aeda3ab..789dad8 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +@@ -98,7 +98,7 @@ + #define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \ + GMAC_INT_PCS_ANE) + +-#define GMAC_INT_DEFAULT_MASK GMAC_INT_PMT_EN ++#define GMAC_INT_DEFAULT_MASK (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN) + + enum dwmac4_irq_status { + time_stamp_irq = 0x00001000, +@@ -106,6 +106,7 @@ enum dwmac4_irq_status { + mmc_tx_irq = 0x00000400, + mmc_rx_irq = 0x00000200, + mmc_irq = 0x00000100, ++ lpi_irq = 0x00000020, + pmt_irq = 0x00000010, + }; + +@@ -132,6 +133,10 @@ enum power_event { + #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */ + #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */ + #define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */ ++#define GMAC4_LPI_CTRL_STATUS_RLPIEX BIT(3) /* Receive LPI Exit */ ++#define GMAC4_LPI_CTRL_STATUS_RLPIEN BIT(2) /* Receive LPI Entry */ ++#define GMAC4_LPI_CTRL_STATUS_TLPIEX BIT(1) /* Transmit LPI Exit */ ++#define GMAC4_LPI_CTRL_STATUS_TLPIEN BIT(0) /* Transmit LPI Entry */ + + /* MAC Debug bitmap */ + #define GMAC_DEBUG_TFCSTS_MASK GENMASK(18, 17) +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +index 2f7d7ec..f3ed8f7 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +@@ -580,6 +580,25 @@ static int dwmac4_irq_status(struct mac_device_info *hw, + x->irq_receive_pmt_irq_n++; + } + ++ /* MAC tx/rx EEE LPI entry/exit interrupts */ ++ if (intr_status & lpi_irq) { ++ /* Clear LPI interrupt by reading MAC_LPI_Control_Status */ ++ u32 status = readl(ioaddr + GMAC4_LPI_CTRL_STATUS); ++ ++ if (status & GMAC4_LPI_CTRL_STATUS_TLPIEN) { ++ ret |= CORE_IRQ_TX_PATH_IN_LPI_MODE; ++ x->irq_tx_path_in_lpi_mode_n++; ++ } ++ if (status & GMAC4_LPI_CTRL_STATUS_TLPIEX) { ++ ret |= CORE_IRQ_TX_PATH_EXIT_LPI_MODE; ++ x->irq_tx_path_exit_lpi_mode_n++; ++ } ++ if (status & GMAC4_LPI_CTRL_STATUS_RLPIEN) ++ x->irq_rx_path_in_lpi_mode_n++; ++ if (status & GMAC4_LPI_CTRL_STATUS_RLPIEX) ++ x->irq_rx_path_exit_lpi_mode_n++; ++ } ++ + dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); + if (intr_status & PCS_RGSMIIIS_IRQ) + dwmac4_phystatus(ioaddr, x); +-- +cgit v1.1 + +From 1c08ac0c4bd8e9d66c4dde29bc496c3b430dd028 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 28 Nov 2017 17:48:22 +0100 +Subject: net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling + +The driver expect "allwinner,leds-active-low" to be in PHY node, but +the binding doc expect it to be in MAC node. + +Since all board DT use it also in MAC node, the driver need to search +allwinner,leds-active-low in MAC node. + +Signed-off-by: Corentin Labbe +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index e5ff734..9eb7f65 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -808,8 +808,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + val, reg); + + if (gmac->variant->soc_has_internal_phy) { +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) ++ if (of_property_read_bool(node, "allwinner,leds-active-low")) + reg |= H3_EPHY_LED_POL; + else + reg &= ~H3_EPHY_LED_POL; +-- +cgit v1.1 + diff --git a/arm-exynos-fix-usb3.patch b/arm-exynos-fix-usb3.patch new file mode 100644 index 000000000..cb5828acf --- /dev/null +++ b/arm-exynos-fix-usb3.patch @@ -0,0 +1,411 @@ +From patchwork Mon Oct 9 12:00:50 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [PATCHv4,1/2] drivers: phy: add calibrate method +From: Andrzej Pietrasiewicz +X-Patchwork-Id: 9992829 +Message-Id: <1507550451-21324-2-git-send-email-andrzej.p@samsung.com> +To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org +Cc: Mark Rutland , Felipe Balbi , + Bartlomiej Zolnierkiewicz , + Greg Kroah-Hartman , + Russell King , + Krzysztof Kozlowski , + Kishon Vijay Abraham I , + Rob Herring , Kukjin Kim , + Andrzej Pietrasiewicz , + Marek Szyprowski +Date: Mon, 09 Oct 2017 14:00:50 +0200 + +Some quirky UDCs (like dwc3 on Exynos) need to have their phys calibrated e.g. +for using super speed. This patch adds a new phy_calibrate() method. +When the calibration should be used is dependent on actual chip. + +In case of dwc3 on Exynos the calibration must happen after usb_add_hcd() +(while in host mode), because certain phy parameters like Tx LOS levels +and boost levels need to be calibrated further post initialization of xHCI +controller, to get SuperSpeed operations working. But an hcd must be +prepared first in order to pass it to usb_add_hcd(), so, in particular, dwc3 +registers must be available first, and in order for the latter to happen +the phys must be initialized. This poses a chicken and egg problem if +the calibration were to be performed in phy_init(). To break the circular +dependency a separate method is added which can be called at a desired +moment after phy intialization. + +Signed-off-by: Andrzej Pietrasiewicz +--- + drivers/phy/phy-core.c | 15 +++++++++++++++ + include/linux/phy/phy.h | 10 ++++++++++ + 2 files changed, 25 insertions(+) + +diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c +index a268f4d..b4964b0 100644 +--- a/drivers/phy/phy-core.c ++++ b/drivers/phy/phy-core.c +@@ -372,6 +372,21 @@ int phy_reset(struct phy *phy) + } + EXPORT_SYMBOL_GPL(phy_reset); + ++int phy_calibrate(struct phy *phy) ++{ ++ int ret; ++ ++ if (!phy || !phy->ops->calibrate) ++ return 0; ++ ++ mutex_lock(&phy->mutex); ++ ret = phy->ops->calibrate(phy); ++ mutex_unlock(&phy->mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(phy_calibrate); ++ + /** + * _of_phy_get() - lookup and obtain a reference to a phy by phandle + * @np: device_node for which to get the phy +diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h +index e694d40..87580c8 100644 +--- a/include/linux/phy/phy.h ++++ b/include/linux/phy/phy.h +@@ -39,6 +39,7 @@ enum phy_mode { + * @power_off: powering off the phy + * @set_mode: set the mode of the phy + * @reset: resetting the phy ++ * @calibrate: calibrate the phy + * @owner: the module owner containing the ops + */ + struct phy_ops { +@@ -48,6 +49,7 @@ struct phy_ops { + int (*power_off)(struct phy *phy); + int (*set_mode)(struct phy *phy, enum phy_mode mode); + int (*reset)(struct phy *phy); ++ int (*calibrate)(struct phy *phy); + struct module *owner; + }; + +@@ -141,6 +143,7 @@ static inline void *phy_get_drvdata(struct phy *phy) + int phy_power_off(struct phy *phy); + int phy_set_mode(struct phy *phy, enum phy_mode mode); + int phy_reset(struct phy *phy); ++int phy_calibrate(struct phy *phy); + static inline int phy_get_bus_width(struct phy *phy) + { + return phy->attrs.bus_width; +@@ -262,6 +265,13 @@ static inline int phy_reset(struct phy *phy) + return -ENOSYS; + } + ++static inline int phy_calibrate(struct phy *phy) ++{ ++ if (!phy) ++ return 0; ++ return -ENOSYS; ++} ++ + static inline int phy_get_bus_width(struct phy *phy) + { + return -ENOSYS; +From patchwork Mon Oct 9 12:00:51 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [PATCHv4, + 2/2] phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 +From: Andrzej Pietrasiewicz +X-Patchwork-Id: 9992809 +Message-Id: <1507550451-21324-3-git-send-email-andrzej.p@samsung.com> +To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org +Cc: Mark Rutland , Felipe Balbi , + Bartlomiej Zolnierkiewicz , + Greg Kroah-Hartman , + Russell King , + Krzysztof Kozlowski , + Kishon Vijay Abraham I , + Rob Herring , Kukjin Kim , + Andrzej Pietrasiewicz , + Marek Szyprowski +Date: Mon, 09 Oct 2017 14:00:51 +0200 + +From: Vivek Gautam + +Adding phy calibration sequence for USB 3.0 DRD PHY present on +Exynos5420/5800 systems. +This calibration facilitates setting certain PHY parameters viz. +the Loss-of-Signal (LOS) Detector Threshold Level, as well as +Tx-Vboost-Level for Super-Speed operations. +Additionally we also set proper time to wait for RxDetect measurement, +for desired PHY reference clock, so as to solve issue with enumeration +of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive +on the controller. + +We are using CR_port for this purpose to send required data +to override the LOS values. + +On testing with USB 3.0 devices on USB 3.0 port present on +SMDK5420, and peach-pit boards should see following message: +usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd + +and without this patch, should see below shown message: +usb 1-1: new high-speed USB device number 2 using xhci-hcd + +[Also removed unnecessary extra lines in the register macro definitions] + +Signed-off-by: Vivek Gautam +[adapted to use phy_calibrate as entry point] +Signed-off-by: Andrzej Pietrasiewicz +--- + drivers/phy/samsung/phy-exynos5-usbdrd.c | 183 +++++++++++++++++++++++++++++++ + drivers/usb/dwc3/core.c | 7 +- + 2 files changed, 188 insertions(+), 2 deletions(-) + +diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c +index 22c68f5..9e83c15 100644 +--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c ++++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c +@@ -90,7 +90,17 @@ + #define PHYCLKRST_COMMONONN BIT(0) + + #define EXYNOS5_DRD_PHYREG0 0x14 ++#define PHYREG0_SSC_REF_CLK_SEL BIT(21) ++#define PHYREG0_SSC_RANGE BIT(20) ++#define PHYREG0_CR_WRITE BIT(19) ++#define PHYREG0_CR_READ BIT(18) ++#define PHYREG0_CR_DATA_IN(_x) ((_x) << 2) ++#define PHYREG0_CR_CAP_DATA BIT(1) ++#define PHYREG0_CR_CAP_ADDR BIT(0) ++ + #define EXYNOS5_DRD_PHYREG1 0x18 ++#define PHYREG1_CR_DATA_OUT(_x) ((_x) << 1) ++#define PHYREG1_CR_ACK BIT(0) + + #define EXYNOS5_DRD_PHYPARAM0 0x1c + +@@ -119,6 +129,25 @@ + #define EXYNOS5_DRD_PHYRESUME 0x34 + #define EXYNOS5_DRD_LINKPORT 0x44 + ++/* USB 3.0 DRD PHY SS Function Control Reg; accessed by CR_PORT */ ++#define EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN (0x15) ++#define LOSLEVEL_OVRD_IN_LOS_BIAS_5420 (0x5 << 13) ++#define LOSLEVEL_OVRD_IN_LOS_BIAS_DEFAULT (0x0 << 13) ++#define LOSLEVEL_OVRD_IN_EN (0x1 << 10) ++#define LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT (0x9 << 0) ++ ++#define EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN (0x12) ++#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420 (0x5 << 13) ++#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_DEFAULT (0x4 << 13) ++ ++#define EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG (0x1010) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M (0x4 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M (0x8 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_25M_26M (0x8 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M (0x20 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_62M5 (0x20 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_96M_100M (0x40 << 4) ++ + #define KHZ 1000 + #define MHZ (KHZ * KHZ) + +@@ -527,6 +556,151 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy) + return 0; + } + ++static int crport_handshake(struct exynos5_usbdrd_phy *phy_drd, ++ u32 val, u32 cmd) ++{ ++ u32 usec = 100; ++ unsigned int result; ++ ++ writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ++ do { ++ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1); ++ if (result & PHYREG1_CR_ACK) ++ break; ++ ++ udelay(1); ++ } while (usec-- > 0); ++ ++ if (!usec) { ++ dev_err(phy_drd->dev, ++ "CRPORT handshake timeout1 (0x%08x)\n", val); ++ return -ETIME; ++ } ++ ++ usec = 100; ++ ++ writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ++ do { ++ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1); ++ if (!(result & PHYREG1_CR_ACK)) ++ break; ++ ++ udelay(1); ++ } while (usec-- > 0); ++ ++ if (!usec) { ++ dev_err(phy_drd->dev, ++ "CRPORT handshake timeout2 (0x%08x)\n", val); ++ return -ETIME; ++ } ++ ++ return 0; ++} ++ ++static int crport_ctrl_write(struct exynos5_usbdrd_phy *phy_drd, ++ u32 addr, u32 data) ++{ ++ int ret; ++ ++ /* Write Address */ ++ writel(PHYREG0_CR_DATA_IN(addr), ++ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(addr), ++ PHYREG0_CR_CAP_ADDR); ++ if (ret) ++ return ret; ++ ++ /* Write Data */ ++ writel(PHYREG0_CR_DATA_IN(data), ++ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data), ++ PHYREG0_CR_CAP_DATA); ++ if (ret) ++ return ret; ++ ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data), ++ PHYREG0_CR_WRITE); ++ ++ return ret; ++} ++ ++/* ++ * Calibrate few PHY parameters using CR_PORT register to meet ++ * SuperSpeed requirements on Exynos5420 and Exynos5800 systems, ++ * which have 28nm USB 3.0 DRD PHY. ++ */ ++static int exynos5420_usbdrd_phy_calibrate(struct exynos5_usbdrd_phy *phy_drd) ++{ ++ unsigned int temp; ++ int ret = 0; ++ ++ /* ++ * Change los_bias to (0x5) for 28nm PHY from a ++ * default value (0x0); los_level is set as default ++ * (0x9) as also reflected in los_level[30:26] bits ++ * of PHYPARAM0 register. ++ */ ++ temp = LOSLEVEL_OVRD_IN_LOS_BIAS_5420 | ++ LOSLEVEL_OVRD_IN_EN | ++ LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT; ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN, ++ temp); ++ if (ret) { ++ dev_err(phy_drd->dev, ++ "Failed setting Loss-of-Signal level for SuperSpeed\n"); ++ return ret; ++ } ++ ++ /* ++ * Set tx_vboost_lvl to (0x5) for 28nm PHY Tuning, ++ * to raise Tx signal level from its default value of (0x4) ++ */ ++ temp = TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420; ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN, ++ temp); ++ if (ret) { ++ dev_err(phy_drd->dev, ++ "Failed setting Tx-Vboost-Level for SuperSpeed\n"); ++ return ret; ++ } ++ ++ /* ++ * Set proper time to wait for RxDetect measurement, for ++ * desired reference clock of PHY, by tuning the CR_PORT ++ * register LANE0.TX_DEBUG which is internal to PHY. ++ * This fixes issue with few USB 3.0 devices, which are ++ * not detected (not even generate interrupts on the bus ++ * on insertion) without this change. ++ * e.g. Samsung SUM-TSB16S 3.0 USB drive. ++ */ ++ switch (phy_drd->extrefclk) { ++ case EXYNOS5_FSEL_50MHZ: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M; ++ break; ++ case EXYNOS5_FSEL_20MHZ: ++ case EXYNOS5_FSEL_19MHZ2: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M; ++ break; ++ case EXYNOS5_FSEL_24MHZ: ++ default: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M; ++ break; ++ } ++ ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG, ++ temp); ++ if (ret) ++ dev_err(phy_drd->dev, ++ "Failed setting RxDetect measurement time for SuperSpeed\n"); ++ ++ return ret; ++} ++ + static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev, + struct of_phandle_args *args) + { +@@ -538,11 +712,20 @@ static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev, + return phy_drd->phys[args->args[0]].phy; + } + ++static int exynos5_usbdrd_phy_calibrate(struct phy *phy) ++{ ++ struct phy_usb_instance *inst = phy_get_drvdata(phy); ++ struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst); ++ ++ return exynos5420_usbdrd_phy_calibrate(phy_drd); ++} ++ + static const struct phy_ops exynos5_usbdrd_phy_ops = { + .init = exynos5_usbdrd_phy_init, + .exit = exynos5_usbdrd_phy_exit, + .power_on = exynos5_usbdrd_phy_power_on, + .power_off = exynos5_usbdrd_phy_power_off, ++ .calibrate = exynos5_usbdrd_phy_calibrate, + .owner = THIS_MODULE, + }; + +diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c +index 03474d3..224e0dd 100644 +--- a/drivers/usb/dwc3/core.c ++++ b/drivers/usb/dwc3/core.c +@@ -156,9 +156,10 @@ static void __dwc3_set_mode(struct work_struct *work) + } else { + if (dwc->usb2_phy) + otg_set_vbus(dwc->usb2_phy->otg, true); +- if (dwc->usb2_generic_phy) ++ if (dwc->usb2_generic_phy) { + phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); +- ++ phy_calibrate(dwc->usb2_generic_phy); ++ } + } + break; + case DWC3_GCTL_PRTCAP_DEVICE: +@@ -955,6 +956,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) + dev_err(dev, "failed to initialize host\n"); + return ret; + } ++ if (dwc->usb2_generic_phy) ++ phy_calibrate(dwc->usb2_generic_phy); + break; + case USB_DR_MODE_OTG: + INIT_WORK(&dwc->drd_work, __dwc3_set_mode); diff --git a/arm-imx6-hummingboard2.patch b/arm-imx6-hummingboard2.patch index bcb93214e..9c55a7b81 100644 --- a/arm-imx6-hummingboard2.patch +++ b/arm-imx6-hummingboard2.patch @@ -26,21 +26,21 @@ index 011808490fed..ccdff6650541 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw552x.dtb \ - imx6dl-gw553x.dtb \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-hummingboard2.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ imx6dl-nit6xlite.dtb \ @@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw553x.dtb \ + imx6q-gw5904.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ + imx6q-hummingboard2.dtb \ imx6q-icore.dtb \ - imx6q-icore-rqs.dtb \ - imx6q-marsboard.dtb \ + imx6q-icore-ofcap10.dtb \ + imx6q-icore-ofcap12.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts new file mode 100644 index 000000000000..990b5050de5b diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch deleted file mode 100644 index d7a4897b3..000000000 --- a/arm-rk3288-tinker.patch +++ /dev/null @@ -1,573 +0,0 @@ -From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 -From: Eddie Cai -Date: Tue, 14 Feb 2017 18:07:31 +0800 -Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board - -This patch add basic support for RK3288-Tinker board. We can boot in to rootfs -with this patch. - -Signed-off-by: Eddie Cai -Signed-off-by: Heiko Stuebner ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 537 insertions(+) - create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 0118084..fb46849 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3288-popmetal.dtb \ - rk3288-r89.dtb \ - rk3288-rock2-square.dtb \ -+ rk3288-tinker.dtb \ - rk3288-veyron-brain.dtb \ - rk3288-veyron-jaq.dtb \ - rk3288-veyron-jerry.dtb \ -diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts -new file mode 100644 -index 0000000..f601c78 ---- /dev/null -+++ b/arch/arm/boot/dts/rk3288-tinker.dts -@@ -0,0 +1,536 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "rk3288.dtsi" -+#include -+ -+/ { -+ model = "Rockchip RK3288 Tinker Board"; -+ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; -+ -+ memory { -+ reg = <0x0 0x80000000>; -+ device_type = "memory"; -+ }; -+ -+ ext_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <125000000>; -+ clock-output-names = "ext_gmac"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ autorepeat; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ button@0 { -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ label = "GPIO Key Power"; -+ linux,input-type = <1>; -+ wakeup-source; -+ debounce-interval = <100>; -+ }; -+ }; -+ -+ gpio-leds { -+ compatible = "gpio-leds"; -+ -+ act-led { -+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="mmc0"; -+ }; -+ -+ heartbeat-led { -+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="heartbeat"; -+ }; -+ -+ pwr-led { -+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,tinker-codec"; -+ simple-audio-card,mclk-fs = <512>; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s>; -+ }; -+ }; -+ -+ vcc_sys: vsys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_pwr>; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ vin-supply = <&vcc_io>; -+ }; -+}; -+ -+&cpu0 { -+ cpu0-supply = <&vdd_cpu>; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_MAC>; -+ assigned-clock-parents = <&ext_gmac>; -+ clock_in_out = "input"; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc33_lan>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio4 7 0>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 1000000>; -+ tx_delay = <0x30>; -+ rx_delay = <0x10>; -+ status = "ok"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c5>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio0>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, -+ <&gpio0 12 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc_sys>; -+ vcc8-supply = <&vcc_io>; -+ vcc9-supply = <&vcc_io>; -+ vcc10-supply = <&vcc_io>; -+ vcc11-supply = <&vcc_sys>; -+ vcc12-supply = <&vcc_io>; -+ vddio-supply = <&vcc_io>; -+ -+ regulators { -+ vdd_cpu: DCDC_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-name = "vdd_arm"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: DCDC_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <1250000>; -+ regulator-name = "vdd_gpu"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc_ddr"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io: DCDC_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc_io"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc18_ldo1: LDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_ldo1"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_mipi: LDO_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33_mipi"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd_10"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc18_codec: LDO_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_codec"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vccio_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vdd10_lcd: LDO_REG6 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd10_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG7 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc_18"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_lcd: LDO_REG8 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_sd: SWITCH_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc33_lan: SWITCH_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_lan"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&i2c5 { -+ status = "okay"; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ sdcard-supply = <&vccio_sd>; -+}; -+ -+&pinctrl { -+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { -+ drive-strength = <8>; -+ }; -+ -+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { -+ bias-pull-up; -+ drive-strength = <8>; -+ }; -+ -+ backlight { -+ bl_en: bl-en { -+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ eth_phy { -+ eth_phy_pwr: eth-phy-pwr { -+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int: pmic-int { -+ rockchip,pins = ; -+ }; -+ -+ dvs_1: dvs-1 { -+ rockchip,pins = ; -+ }; -+ -+ dvs_2: dvs-2 { -+ rockchip,pins = ; -+ }; -+ }; -+ -+ sdmmc { -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = <6 20 RK_FUNC_1 \ -+ &pcfg_pull_none_drv_8ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_pwr: sdmmc-pwr { -+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pwr_3g: pwr-3g { -+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc18_ldo1>; -+ status ="okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ disable-wp; /* wp not hooked up */ -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+ vmmc-supply = <&vcc33_sd>; -+ vqmmc-supply = <&vccio_sd>; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ -+ status = "okay"; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&uart3 { -+ status = "okay"; -+}; -+ -+&uart4 { -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1 { -+ status = "okay"; -+}; -+ -+&usb_otg { -+ status= "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; -+ -+&wdt { -+ status = "okay"; -+}; --- -cgit v1.1 - diff --git a/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch b/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch new file mode 100644 index 000000000..33f9271b7 --- /dev/null +++ b/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch @@ -0,0 +1,41 @@ +From 90e388ca5d8bbee022f9ed5fc24137b31579fa6e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 22 Nov 2017 15:52:36 +0000 +Subject: [PATCH] Revert "arm64: allwinner: a64: pine64: Use dcdc1 regulator + for mmc0" + +This reverts commit 3f241bfa60bdc9c4fde63fa6664a8ce00fd668c6. +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index d06e34b5d192..caf8b6fbe5e3 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -61,6 +61,13 @@ + chosen { + stdout-path = "serial0:115200n8"; + }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &ehci0 { +@@ -84,7 +91,7 @@ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +- vmmc-supply = <®_dcdc1>; ++ vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; +-- +2.14.3 + diff --git a/arm64-hikey-fixes.patch b/arm64-hikey-fixes.patch deleted file mode 100644 index 18bc05b2b..000000000 --- a/arm64-hikey-fixes.patch +++ /dev/null @@ -1,77 +0,0 @@ -From patchwork Sat Apr 8 07:18:40 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: reset: hi6220: Set module license so that it can be loaded -From: Jeremy Linton -X-Patchwork-Id: 9670985 -Message-Id: <20170408071840.29380-1-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: p.zabel@pengutronix.de, saberlily.xia@hisilicon.com, - puck.chen@hisilicon.com, xinliang.liu@linaro.org, - Jeremy Linton -Date: Sat, 8 Apr 2017 02:18:40 -0500 - -The hi6220_reset driver can be built as a standalone module -yet it cannot be loaded because it depends on GPL exported symbols. - -Lets set the module license so that the module loads, and things like -the on-board kirin drm starts working. - -Signed-off-by: Jeremy Linton -reviewed-by: Xinliang Liu ---- - drivers/reset/hisilicon/hi6220_reset.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c -index 35ce53e..d5e5229 100644 ---- a/drivers/reset/hisilicon/hi6220_reset.c -+++ b/drivers/reset/hisilicon/hi6220_reset.c -@@ -155,3 +155,5 @@ static int __init hi6220_reset_init(void) - } - - postcore_initcall(hi6220_reset_init); -+ -+MODULE_LICENSE("GPL v2"); -From patchwork Mon Apr 3 05:28:42 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,1/2] regulator: hi655x: Describe consumed platform device -From: Jeremy Linton -X-Patchwork-Id: 9658793 -Message-Id: <20170403052843.12711-2-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: broonie@kernel.org, lgirdwood@gmail.com, puck.chen@hisilicon.com, - lee.jones@linaro.org, Jeremy Linton -Date: Mon, 3 Apr 2017 00:28:42 -0500 - -The hi655x-regulator driver consumes a similarly named platform device. -Adding that to the module device table, allows modprobe to locate this -driver once the device is created. - -Signed-off-by: Jeremy Linton ---- - drivers/regulator/hi655x-regulator.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/regulator/hi655x-regulator.c b/drivers/regulator/hi655x-regulator.c -index 065c100..36ae54b 100644 ---- a/drivers/regulator/hi655x-regulator.c -+++ b/drivers/regulator/hi655x-regulator.c -@@ -214,7 +214,14 @@ static int hi655x_regulator_probe(struct platform_device *pdev) - return 0; - } - -+static const struct platform_device_id hi655x_regulator_table[] = { -+ { .name = "hi655x-regulator" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(platform, hi655x_regulator_table); -+ - static struct platform_driver hi655x_regulator_driver = { -+ .id_table = hi655x_regulator_table, - .driver = { - .name = "hi655x-regulator", - }, diff --git a/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch b/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch deleted file mode 100644 index eaf809d53..000000000 --- a/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch +++ /dev/null @@ -1,93 +0,0 @@ -From patchwork Thu Oct 6 09:52:07 2016 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: arm64: mm: Fix memmap to be initialized for the entire section -From: Robert Richter -X-Patchwork-Id: 9364537 -Message-Id: <1475747527-32387-1-git-send-email-rrichter@cavium.com> -To: Catalin Marinas , Will Deacon - -Cc: Mark Rutland , linux-efi@vger.kernel.org, - David Daney , - Ard Biesheuvel , - linux-kernel@vger.kernel.org, Robert Richter , - Hanjun Guo , linux-arm-kernel@lists.infradead.org -Date: Thu, 6 Oct 2016 11:52:07 +0200 - -There is a memory setup problem on ThunderX systems with certain -memory configurations. The symptom is - - kernel BUG at mm/page_alloc.c:1848! - -This happens for some configs with 64k page size enabled. The bug -triggers for page zones with some pages in the zone not assigned to -this particular zone. In my case some pages that are marked as nomap -were not reassigned to the new zone of node 1, so those are still -assigned to node 0. - -The reason for the mis-configuration is a change in pfn_valid() which -reports pages marked nomap as invalid: - - 68709f45385a arm64: only consider memblocks with NOMAP cleared for linear mapping - -This causes pages marked as nomap being no long reassigned to the new -zone in memmap_init_zone() by calling __init_single_pfn(). - -Fixing this by restoring the old behavior of pfn_valid() to use -memblock_is_memory(). Also changing users of pfn_valid() in arm64 code -to use memblock_is_map_memory() where necessary. This only affects -code in ioremap.c. The code in mmu.c still can use the new version of -pfn_valid(). - -Should be marked stable v4.5.. - -Signed-off-by: Robert Richter ---- - arch/arm64/mm/init.c | 2 +- - arch/arm64/mm/ioremap.c | 5 +++-- - 2 files changed, 4 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c -index bbb7ee76e319..25b8659c2a9f 100644 ---- a/arch/arm64/mm/init.c -+++ b/arch/arm64/mm/init.c -@@ -147,7 +147,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) - #ifdef CONFIG_HAVE_ARCH_PFN_VALID - int pfn_valid(unsigned long pfn) - { -- return memblock_is_map_memory(pfn << PAGE_SHIFT); -+ return memblock_is_memory(pfn << PAGE_SHIFT); - } - EXPORT_SYMBOL(pfn_valid); - #endif -diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c -index 01e88c8bcab0..c17c220b0c48 100644 ---- a/arch/arm64/mm/ioremap.c -+++ b/arch/arm64/mm/ioremap.c -@@ -21,6 +21,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -55,7 +56,7 @@ static void __iomem *__ioremap_caller(phys_addr_t phys_addr, size_t size, - /* - * Don't allow RAM to be mapped. - */ -- if (WARN_ON(pfn_valid(__phys_to_pfn(phys_addr)))) -+ if (WARN_ON(memblock_is_map_memory(phys_addr))) - return NULL; - - area = get_vm_area_caller(size, VM_IOREMAP, caller); -@@ -96,7 +97,7 @@ EXPORT_SYMBOL(__iounmap); - void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size) - { - /* For normal memory we already have a cacheable mapping. */ -- if (pfn_valid(__phys_to_pfn(phys_addr))) -+ if (memblock_is_map_memory(phys_addr)) - return (void __iomem *)__phys_to_virt(phys_addr); - - return __ioremap_caller(phys_addr, size, __pgprot(PROT_NORMAL), diff --git a/arm64-socionext-96b-enablement.patch b/arm64-socionext-96b-enablement.patch new file mode 100644 index 000000000..721383ec6 --- /dev/null +++ b/arm64-socionext-96b-enablement.patch @@ -0,0 +1,2989 @@ +From 33d983b5bb2929ae242606925e708092b1dfdd8f Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Sat, 2 Sep 2017 11:01:22 +0100 +Subject: drivers/irqchip: gicv3: add workaround for Synquacer pre-ITS + +In their infinite wisdom, the Socionext engineers have decided +that ITS device IDs should not be hardwired, but it should be +left up to the software to assign them, by allowing it to +redirect MSI doorbell writes via a separate hardware block +that issues the doorbell write with a device ID that is +derived from the memory address. This completely breaks any +kind of isolation, or virtualization in general, for that +matter, but add support for it nonetheless. + +Signed-off-by: Ard Biesheuvel +--- + arch/arm64/Kconfig | 8 +++++++ + drivers/irqchip/irq-gic-v3-its.c | 48 +++++++++++++++++++++++++++++++++++----- + 2 files changed, 51 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 0df64a6..c4361df 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -539,6 +539,14 @@ config QCOM_QDF2400_ERRATUM_0065 + + If unsure, say Y. + ++config SOCIONEXT_SYNQUACER_PREITS ++ bool "Socionext Synquacer: Workaround for GICv3 pre-ITS" ++ default y ++ help ++ Socionext Synquacer SoCs implement a separate h/w block to generate ++ MSI doorbell writes with non-zero values for the device ID. ++ ++ If unsure, say Y. + endmenu + + +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index e8d8934..0d372f1 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -46,6 +46,7 @@ + #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) + #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) + #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) ++#define ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS (1ULL << 3) + + #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) + +@@ -99,6 +100,10 @@ struct its_node { + struct its_collection *collections; + struct list_head its_device_list; + u64 flags; ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ u64 pre_its_base; ++ u64 pre_its_size; ++#endif + u32 ite_size; + u32 device_ids; + int numa_node; +@@ -1102,13 +1107,29 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) + u64 addr; + + its = its_dev->its; +- addr = its->phys_base + GITS_TRANSLATER; ++ ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS) ++ ++ /* ++ * The Socionext Synquacer SoC has a so-called 'pre-ITS', ++ * which maps 32-bit writes into a separate window of size ++ * '4 << device_id_bits' onto writes to GITS_TRANSLATER with ++ * device ID taken from bits [device_id_bits + 1:2] of the ++ * window offset. ++ */ ++ addr = its->pre_its_base + (its_dev->device_id << 2); ++ else ++#endif ++ addr = its->phys_base + GITS_TRANSLATER; + + msg->address_lo = lower_32_bits(addr); + msg->address_hi = upper_32_bits(addr); + msg->data = its_get_event_id(d); + +- iommu_dma_map_msi_msg(d->irq, msg); ++ if (!IS_ENABLED(CONFIG_SOCIONEXT_SYNQUACER_PREITS) || ++ !(its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS)) ++ iommu_dma_map_msi_msg(d->irq, msg); + } + + static int its_irq_set_irqchip_state(struct irq_data *d, +@@ -1666,6 +1687,11 @@ static int its_alloc_tables(struct its_node *its) + ids = 0x14; /* 20 bits, 8MB */ + } + ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS) ++ ids = ilog2(its->pre_its_size) - 2; ++#endif ++ + its->device_ids = ids; + + for (i = 0; i < GITS_BASER_NR_REGS; i++) { +@@ -2788,11 +2814,21 @@ static const struct gic_quirk its_quirks[] = { + } + }; + +-static void its_enable_quirks(struct its_node *its) ++static void its_enable_quirks(struct its_node *its, ++ struct fwnode_handle *handle) + { + u32 iidr = readl_relaxed(its->base + GITS_IIDR); + + gic_enable_quirks(iidr, its_quirks, its); ++ ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (!fwnode_property_read_u64_array(handle, ++ "socionext,synquacer-pre-its", ++ &its->pre_its_base, 2)) { ++ its->flags |= ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS; ++ pr_info("ITS: enabling workaround for Socionext Synquacer pre-ITS\n"); ++ } ++#endif + } + + static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) +@@ -2812,7 +2848,9 @@ static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) + + inner_domain->parent = its_parent; + irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); +- inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; ++ ++ if (!(its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS)) ++ inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; + info->ops = &its_msi_domain_ops; + info->data = its; + inner_domain->host_data = info; +@@ -2966,7 +3004,7 @@ static int __init its_probe_one(struct resource *res, + } + its->cmd_write = its->cmd_base; + +- its_enable_quirks(its); ++ its_enable_quirks(its, handle); + + err = its_alloc_tables(its); + if (err) +-- +cgit v1.1 + +From 26e7bb47b0fb03a01be1e391a08c7375b45335a2 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Mon, 21 Aug 2017 20:29:05 +0100 +Subject: pci: designware: add driver for DWC controller in ECAM shift mode + +Some implementations of the Synopsys Designware PCIe controller implement +a so-called ECAM shift mode, which allows a static memory window to be +configured that covers the configuration space of the entire bus range. + +If the firmware performs all the low level configuration that is required +to expose this controller in a fully ECAM compatible manner, we can +simply describe it as "pci-host-ecam-generic" and be done with it. +However, it appears that in some cases (one of which is the Armada 80x0), +the IP is synthesized with an ATU window size that does not allow the +first bus to be mapped in a way that prevents the device on the +downstream port from appearing more than once. + +So implement a driver that relies on the firmware to perform all low +level initialization, and drives the controller in ECAM mode, but +overrides the config space accessors to take the above quirk into +account. + +Note that, unlike most drivers for this IP, this driver does not expose +a fake bridge device at B/D/F 00:00.0. There is no point in doing so, +given that this is not a true bridge, and does not require any windows +to be configured in order for the downstream device to operate correctly. +Omitting it also prevents the PCI resource allocation routines from +handing out BAR space to it unnecessarily. + +Cc: Bjorn Helgaas +Cc: Jingoo Han +Cc: Joao Pinto +Signed-off-by: Ard Biesheuvel +--- + drivers/pci/dwc/Kconfig | 11 +++++ + drivers/pci/dwc/Makefile | 1 + + drivers/pci/dwc/pcie-designware-ecam.c | 77 ++++++++++++++++++++++++++++++++++ + 3 files changed, 89 insertions(+) + create mode 100644 drivers/pci/dwc/pcie-designware-ecam.c + +diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig +index 22ec82f..19856b1 100644 +--- a/drivers/pci/dwc/Kconfig ++++ b/drivers/pci/dwc/Kconfig +@@ -169,4 +169,15 @@ config PCIE_KIRIN + Say Y here if you want PCIe controller support + on HiSilicon Kirin series SoCs. + ++config PCIE_DW_HOST_ECAM ++ bool "Synopsys DesignWare PCIe controller in ECAM mode" ++ depends on OF && PCI ++ select PCI_HOST_COMMON ++ select IRQ_DOMAIN ++ help ++ Add support for Synopsys DesignWare PCIe controllers configured ++ by the firmware into ECAM shift mode. In some cases, these are ++ fully ECAM compliant, in which case the pci-host-generic driver ++ may be used instead. ++ + endmenu +diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile +index c61be97..7d5a23e 100644 +--- a/drivers/pci/dwc/Makefile ++++ b/drivers/pci/dwc/Makefile +@@ -1,5 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + obj-$(CONFIG_PCIE_DW) += pcie-designware.o + obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o ++obj-$(CONFIG_PCIE_DW_HOST_ECAM) += pcie-designware-ecam.o + obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o + obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o + ifneq ($(filter y,$(CONFIG_PCI_DRA7XX_HOST) $(CONFIG_PCI_DRA7XX_EP)),) +diff --git a/drivers/pci/dwc/pcie-designware-ecam.c b/drivers/pci/dwc/pcie-designware-ecam.c +new file mode 100644 +index 0000000..ede627d +--- /dev/null ++++ b/drivers/pci/dwc/pcie-designware-ecam.c +@@ -0,0 +1,77 @@ ++/* ++ * Driver for mostly ECAM compatible Synopsys dw PCIe controllers ++ * configured by the firmware into RC mode ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Copyright (C) 2014 ARM Limited ++ * Copyright (C) 2017 Linaro Limited ++ * ++ * Authors: Will Deacon ++ * Ard Biesheuvel ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int pci_dw_ecam_config_read(struct pci_bus *bus, u32 devfn, int where, ++ int size, u32 *val) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ ++ /* ++ * The Synopsys dw PCIe controller in RC mode will not filter type 0 ++ * config TLPs sent to devices 1 and up on its downstream port, ++ * resulting in devices appearing multiple times on bus 0 unless we ++ * filter them here. ++ */ ++ if (bus->number == cfg->busr.start && PCI_SLOT(devfn) > 0) { ++ *val = 0xffffffff; ++ return PCIBIOS_DEVICE_NOT_FOUND; ++ } ++ return pci_generic_config_read(bus, devfn, where, size, val); ++} ++ ++static int pci_dw_ecam_config_write(struct pci_bus *bus, u32 devfn, int where, ++ int size, u32 val) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ ++ if (bus->number == cfg->busr.start && PCI_SLOT(devfn) > 0) ++ return PCIBIOS_DEVICE_NOT_FOUND; ++ ++ return pci_generic_config_write(bus, devfn, where, size, val); ++} ++ ++static struct pci_ecam_ops pci_dw_ecam_bus_ops = { ++ .pci_ops.map_bus = pci_ecam_map_bus, ++ .pci_ops.read = pci_dw_ecam_config_read, ++ .pci_ops.write = pci_dw_ecam_config_write, ++ .bus_shift = 20, ++}; ++ ++static const struct of_device_id pci_dw_ecam_of_match[] = { ++ { .compatible = "marvell,armada8k-pcie-ecam" }, ++ { .compatible = "socionext,synquacer-pcie-ecam" }, ++ { .compatible = "snps,dw-pcie-ecam" }, ++ { }, ++}; ++ ++static int pci_dw_ecam_probe(struct platform_device *pdev) ++{ ++ return pci_host_common_probe(pdev, &pci_dw_ecam_bus_ops); ++} ++ ++static struct platform_driver pci_dw_ecam_driver = { ++ .driver.name = "pcie-designware-ecam", ++ .driver.of_match_table = pci_dw_ecam_of_match, ++ .driver.suppress_bind_attrs = true, ++ .probe = pci_dw_ecam_probe, ++}; ++builtin_platform_driver(pci_dw_ecam_driver); +-- +cgit v1.1 + +From e3dff048a10f16aa0fd32438442ce39558bbdbef Mon Sep 17 00:00:00 2001 +From: Jassi Brar +Date: Tue, 29 Aug 2017 22:45:59 +0530 +Subject: net: socionext: Add Synquacer NetSec driver + +This driver adds support for Socionext "netsec" IP Gigabit +Ethernet + PHY IP used in the Synquacer SC2A11 SoC. + +Signed-off-by: Jassi Brar +Signed-off-by: Ard Biesheuvel +--- + drivers/net/ethernet/Kconfig | 1 + + drivers/net/ethernet/Makefile | 1 + + drivers/net/ethernet/socionext/Kconfig | 29 + + drivers/net/ethernet/socionext/Makefile | 1 + + drivers/net/ethernet/socionext/netsec/Makefile | 6 + + drivers/net/ethernet/socionext/netsec/netsec.h | 408 ++++++++++++++ + .../socionext/netsec/netsec_desc_ring_access.c | 623 +++++++++++++++++++++ + .../net/ethernet/socionext/netsec/netsec_ethtool.c | 78 +++ + .../ethernet/socionext/netsec/netsec_gmac_access.c | 330 +++++++++++ + .../net/ethernet/socionext/netsec/netsec_netdev.c | 540 ++++++++++++++++++ + .../ethernet/socionext/netsec/netsec_platform.c | 435 ++++++++++++++ + 11 files changed, 2452 insertions(+) + create mode 100644 drivers/net/ethernet/socionext/Kconfig + create mode 100644 drivers/net/ethernet/socionext/Makefile + create mode 100644 drivers/net/ethernet/socionext/netsec/Makefile + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec.h + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_ethtool.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_netdev.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_platform.c + +diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig +index c604213..d50519e 100644 +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -170,6 +170,7 @@ source "drivers/net/ethernet/sis/Kconfig" + source "drivers/net/ethernet/sfc/Kconfig" + source "drivers/net/ethernet/sgi/Kconfig" + source "drivers/net/ethernet/smsc/Kconfig" ++source "drivers/net/ethernet/socionext/Kconfig" + source "drivers/net/ethernet/stmicro/Kconfig" + source "drivers/net/ethernet/sun/Kconfig" + source "drivers/net/ethernet/tehuti/Kconfig" +diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile +index a0a03d4..6ae1bb9 100644 +--- a/drivers/net/ethernet/Makefile ++++ b/drivers/net/ethernet/Makefile +@@ -81,6 +81,7 @@ obj-$(CONFIG_SFC) += sfc/ + obj-$(CONFIG_SFC_FALCON) += sfc/falcon/ + obj-$(CONFIG_NET_VENDOR_SGI) += sgi/ + obj-$(CONFIG_NET_VENDOR_SMSC) += smsc/ ++obj-$(CONFIG_NET_VENDOR_SNI) += socionext/ + obj-$(CONFIG_NET_VENDOR_STMICRO) += stmicro/ + obj-$(CONFIG_NET_VENDOR_SUN) += sun/ + obj-$(CONFIG_NET_VENDOR_TEHUTI) += tehuti/ +diff --git a/drivers/net/ethernet/socionext/Kconfig b/drivers/net/ethernet/socionext/Kconfig +new file mode 100644 +index 0000000..a6dc195 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/Kconfig +@@ -0,0 +1,29 @@ ++# ++# Socionext Network device configuration ++# ++ ++config NET_VENDOR_SNI ++ bool "Socionext devices" ++ default y ++ ---help--- ++ If you have a network (Ethernet) card belonging to this class, say Y. ++ ++ Note that the answer to this question doesn't directly affect the ++ the questions about Socionext cards. If you say Y, you will be asked ++ for your specific card in the following questions. ++ ++if NET_VENDOR_SNI ++ ++config SNI_NETSEC ++ tristate "NETSEC Driver Support" ++ depends on OF ++ select PHYLIB ++ select MII ++help ++ Enable to add support for the SocioNext NetSec Gigabit Ethernet ++ controller + PHY, as found on the Synquacer SC2A11 SoC ++ ++ To compile this driver as a module, choose M here: the module will be ++ called netsec. If unsure, say N. ++ ++endif # NET_VENDOR_SNI +diff --git a/drivers/net/ethernet/socionext/Makefile b/drivers/net/ethernet/socionext/Makefile +new file mode 100644 +index 0000000..9555899 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_SNI_NETSEC) += netsec/ +diff --git a/drivers/net/ethernet/socionext/netsec/Makefile b/drivers/net/ethernet/socionext/netsec/Makefile +new file mode 100644 +index 0000000..18884ed +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/Makefile +@@ -0,0 +1,6 @@ ++obj-$(CONFIG_SNI_NETSEC) := netsec.o ++netsec-objs := netsec_desc_ring_access.o \ ++ netsec_netdev.o \ ++ netsec_ethtool.o \ ++ netsec_platform.o \ ++ netsec_gmac_access.o +diff --git a/drivers/net/ethernet/socionext/netsec/netsec.h b/drivers/net/ethernet/socionext/netsec/netsec.h +new file mode 100644 +index 0000000..3b97661 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec.h +@@ -0,0 +1,408 @@ ++/** ++ * netsec.h ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++#ifndef NETSEC_INTERNAL_H ++#define NETSEC_INTERNAL_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NETSEC_FLOW_CONTROL_START_THRESHOLD 36 ++#define NETSEC_FLOW_CONTROL_STOP_THRESHOLD 48 ++ ++#define NETSEC_CLK_MHZ 1000000 ++ ++#define NETSEC_RX_PKT_BUF_LEN 1522 ++#define NETSEC_RX_JUMBO_PKT_BUF_LEN 9022 ++ ++#define NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX 19 ++ ++#define DESC_NUM 128 ++ ++#define NETSEC_TX_SHIFT_OWN_FIELD 31 ++#define NETSEC_TX_SHIFT_LD_FIELD 30 ++#define NETSEC_TX_SHIFT_DRID_FIELD 24 ++#define NETSEC_TX_SHIFT_PT_FIELD 21 ++#define NETSEC_TX_SHIFT_TDRID_FIELD 16 ++#define NETSEC_TX_SHIFT_CC_FIELD 15 ++#define NETSEC_TX_SHIFT_FS_FIELD 9 ++#define NETSEC_TX_LAST 8 ++#define NETSEC_TX_SHIFT_CO 7 ++#define NETSEC_TX_SHIFT_SO 6 ++#define NETSEC_TX_SHIFT_TRS_FIELD 4 ++ ++#define NETSEC_RX_PKT_OWN_FIELD 31 ++#define NETSEC_RX_PKT_LD_FIELD 30 ++#define NETSEC_RX_PKT_SDRID_FIELD 24 ++#define NETSEC_RX_PKT_FR_FIELD 23 ++#define NETSEC_RX_PKT_ER_FIELD 21 ++#define NETSEC_RX_PKT_ERR_FIELD 16 ++#define NETSEC_RX_PKT_TDRID_FIELD 12 ++#define NETSEC_RX_PKT_FS_FIELD 9 ++#define NETSEC_RX_PKT_LS_FIELD 8 ++#define NETSEC_RX_PKT_CO_FIELD 6 ++ ++#define NETSEC_RX_PKT_ERR_MASK 3 ++ ++#define NETSEC_MAX_TX_PKT_LEN 1518 ++#define NETSEC_MAX_TX_JUMBO_PKT_LEN 9018 ++ ++enum netsec_rings { ++ NETSEC_RING_TX, ++ NETSEC_RING_RX ++}; ++ ++#define NETSEC_RING_GMAC 15 ++#define NETSEC_RING_MAX 1 ++ ++#define NETSEC_TCP_SEG_LEN_MAX 1460 ++#define NETSEC_TCP_JUMBO_SEG_LEN_MAX 8960 ++ ++#define NETSEC_RX_CKSUM_NOTAVAIL 0 ++#define NETSEC_RX_CKSUM_OK 1 ++#define NETSEC_RX_CKSUM_NG 2 ++ ++#define NETSEC_TOP_IRQ_REG_CODE_LOAD_END BIT(20) ++#define NETSEC_IRQ_TRANSITION_COMPLETE BIT(4) ++#define NETSEC_IRQ_RX BIT(1) ++#define NETSEC_IRQ_TX BIT(0) ++ ++#define NETSEC_IRQ_EMPTY BIT(17) ++#define NETSEC_IRQ_ERR BIT(16) ++#define NETSEC_IRQ_PKT_CNT BIT(15) ++#define NETSEC_IRQ_TIMEUP BIT(14) ++#define NETSEC_IRQ_RCV (NETSEC_IRQ_PKT_CNT | \ ++ NETSEC_IRQ_TIMEUP) ++ ++#define NETSEC_IRQ_TX_DONE BIT(15) ++#define NETSEC_IRQ_SND (NETSEC_IRQ_TX_DONE | \ ++ NETSEC_IRQ_TIMEUP) ++ ++#define NETSEC_MODE_TRANS_COMP_IRQ_N2T BIT(20) ++#define NETSEC_MODE_TRANS_COMP_IRQ_T2N BIT(19) ++ ++#define NETSEC_DESC_MIN 2 ++#define NETSEC_DESC_MAX 2047 ++#define NETSEC_INT_PKTCNT_MAX 2047 ++ ++#define NETSEC_FLOW_START_TH_MAX 95 ++#define NETSEC_FLOW_STOP_TH_MAX 95 ++#define NETSEC_FLOW_PAUSE_TIME_MIN 5 ++ ++#define NETSEC_CLK_EN_REG_DOM_ALL 0x3f ++ ++#define NETSEC_REG_TOP_STATUS 0x80 ++#define NETSEC_REG_TOP_INTEN 0x81 ++#define NETSEC_REG_INTEN_SET 0x8d ++#define NETSEC_REG_INTEN_CLR 0x8e ++#define NETSEC_REG_NRM_TX_STATUS 0x100 ++#define NETSEC_REG_NRM_TX_INTEN 0x101 ++#define NETSEC_REG_NRM_TX_INTEN_SET 0x10a ++#define NETSEC_REG_NRM_TX_INTEN_CLR 0x10b ++#define NETSEC_REG_NRM_RX_STATUS 0x110 ++#define NETSEC_REG_NRM_RX_INTEN 0x111 ++#define NETSEC_REG_NRM_RX_INTEN_SET 0x11a ++#define NETSEC_REG_NRM_RX_INTEN_CLR 0x11b ++#define NETSEC_REG_RESERVED_RX_DESC_START 0x122 ++#define NETSEC_REG_RESERVED_TX_DESC_START 0x132 ++#define NETSEC_REG_CLK_EN 0x40 ++#define NETSEC_REG_SOFT_RST 0x41 ++#define NETSEC_REG_PKT_CMD_BUF 0x34 ++#define NETSEC_REG_PKT_CTRL 0x50 ++#define NETSEC_REG_COM_INIT 0x48 ++#define NETSEC_REG_DMA_TMR_CTRL 0x83 ++#define NETSEC_REG_F_TAIKI_MC_VER 0x8b ++#define NETSEC_REG_F_TAIKI_VER 0x8c ++#define NETSEC_REG_DMA_HM_CTRL 0x85 ++#define NETSEC_REG_DMA_MH_CTRL 0x88 ++#define NETSEC_REG_ADDR_DIS_CORE 0x86 ++#define NETSEC_REG_DMAC_HM_CMD_BUF 0x84 ++#define NETSEC_REG_DMAC_MH_CMD_BUF 0x87 ++#define NETSEC_REG_NRM_TX_PKTCNT 0x104 ++#define NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT 0x106 ++#define NETSEC_REG_NRM_RX_RXINT_PKTCNT 0x116 ++#define NETSEC_REG_NRM_TX_TXINT_TMR 0x108 ++#define NETSEC_REG_NRM_RX_RXINT_TMR 0x118 ++#define NETSEC_REG_NRM_TX_DONE_PKTCNT 0x105 ++#define NETSEC_REG_NRM_RX_PKTCNT 0x115 ++#define NETSEC_REG_NRM_TX_TMR 0x107 ++#define NETSEC_REG_NRM_RX_TMR 0x117 ++#define NETSEC_REG_NRM_TX_DESC_START_UP 0x10d ++#define NETSEC_REG_NRM_TX_DESC_START_LW 0x102 ++#define NETSEC_REG_NRM_RX_DESC_START_UP 0x11d ++#define NETSEC_REG_NRM_RX_DESC_START_LW 0x112 ++#define NETSEC_REG_NRM_TX_CONFIG 0x10c ++#define NETSEC_REG_NRM_RX_CONFIG 0x11c ++#define MAC_REG_DATA 0x470 ++#define MAC_REG_CMD 0x471 ++#define MAC_REG_FLOW_TH 0x473 ++#define MAC_REG_INTF_SEL 0x475 ++#define MAC_REG_DESC_INIT 0x47f ++#define MAC_REG_DESC_SOFT_RST 0x481 ++#define NETSEC_REG_MODE_TRANS_COMP_STATUS 0x140 ++#define GMAC_REG_MCR 0x0000 ++#define GMAC_REG_MFFR 0x0004 ++#define GMAC_REG_GAR 0x0010 ++#define GMAC_REG_GDR 0x0014 ++#define GMAC_REG_FCR 0x0018 ++#define GMAC_REG_BMR 0x1000 ++#define GMAC_REG_RDLAR 0x100c ++#define GMAC_REG_TDLAR 0x1010 ++#define GMAC_REG_OMR 0x1018 ++ ++#define NETSEC_PKT_CTRL_REG_MODE_NRM BIT(28) ++#define NETSEC_PKT_CTRL_REG_EN_JUMBO BIT(27) ++#define NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER BIT(3) ++#define NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE BIT(2) ++#define NETSEC_PKT_CTRL_REG_LOG_HD_ER BIT(1) ++#define NETSEC_PKT_CTRL_REG_DRP_NO_MATCH BIT(0) ++ ++#define NETSEC_CLK_EN_REG_DOM_G BIT(5) ++#define NETSEC_CLK_EN_REG_DOM_C BIT(1) ++#define NETSEC_CLK_EN_REG_DOM_D BIT(0) ++ ++#define NETSEC_COM_INIT_REG_DB BIT(2) ++#define NETSEC_COM_INIT_REG_CLS BIT(1) ++#define NETSEC_COM_INIT_REG_ALL (NETSEC_COM_INIT_REG_CLS | \ ++ NETSEC_COM_INIT_REG_DB) ++ ++#define NETSEC_SOFT_RST_REG_RESET 0 ++#define NETSEC_SOFT_RST_REG_RUN BIT(31) ++ ++#define NETSEC_DMA_CTRL_REG_STOP 1 ++#define MH_CTRL__MODE_TRANS BIT(20) ++ ++#define NETSEC_GMAC_CMD_ST_READ 0 ++#define NETSEC_GMAC_CMD_ST_WRITE BIT(28) ++#define NETSEC_GMAC_CMD_ST_BUSY BIT(31) ++ ++#define NETSEC_GMAC_BMR_REG_COMMON 0x00412080 ++#define NETSEC_GMAC_BMR_REG_RESET 0x00020181 ++#define NETSEC_GMAC_BMR_REG_SWR 0x00000001 ++ ++#define NETSEC_GMAC_OMR_REG_ST BIT(13) ++#define NETSEC_GMAC_OMR_REG_SR BIT(1) ++ ++#define NETSEC_GMAC_MCR_REG_IBN BIT(30) ++#define NETSEC_GMAC_MCR_REG_CST BIT(25) ++#define NETSEC_GMAC_MCR_REG_JE BIT(20) ++#define NETSEC_MCR_PS BIT(15) ++#define NETSEC_GMAC_MCR_REG_FES BIT(14) ++#define NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON 0x0000280c ++#define NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON 0x0001a00c ++ ++#define NETSEC_FCR_RFE BIT(2) ++#define NETSEC_FCR_TFE BIT(1) ++ ++#define NETSEC_GMAC_GAR_REG_GW BIT(1) ++#define NETSEC_GMAC_GAR_REG_GB BIT(0) ++ ++#define NETSEC_GMAC_GAR_REG_SHIFT_PA 11 ++#define NETSEC_GMAC_GAR_REG_SHIFT_GR 6 ++#define GMAC_REG_SHIFT_CR_GAR 2 ++ ++#define NETSEC_GMAC_GAR_REG_CR_25_35_MHZ 2 ++#define NETSEC_GMAC_GAR_REG_CR_35_60_MHZ 3 ++#define NETSEC_GMAC_GAR_REG_CR_60_100_MHZ 0 ++#define NETSEC_GMAC_GAR_REG_CR_100_150_MHZ 1 ++#define NETSEC_GMAC_GAR_REG_CR_150_250_MHZ 4 ++#define NETSEC_GMAC_GAR_REG_CR_250_300_MHZ 5 ++ ++#define NETSEC_GMAC_RDLAR_REG_COMMON 0x18000 ++#define NETSEC_GMAC_TDLAR_REG_COMMON 0x1c000 ++ ++#define NETSEC_REG_NETSEC_VER_F_TAIKI 0x50000 ++ ++#define NETSEC_REG_DESC_RING_CONFIG_CFG_UP BIT(31) ++#define NETSEC_REG_DESC_RING_CONFIG_CH_RST BIT(30) ++#define NETSEC_REG_DESC_TMR_MODE 4 ++#define NETSEC_REG_DESC_ENDIAN 0 ++ ++#define NETSEC_MAC_DESC_SOFT_RST_SOFT_RST 1 ++#define NETSEC_MAC_DESC_INIT_REG_INIT 1 ++ ++#define NETSEC_EEPROM_MAC_ADDRESS 0x00 ++#define NETSEC_EEPROM_HM_ME_ADDRESS_H 0x08 ++#define NETSEC_EEPROM_HM_ME_ADDRESS_L 0x0C ++#define NETSEC_EEPROM_HM_ME_SIZE 0x10 ++#define NETSEC_EEPROM_MH_ME_ADDRESS_H 0x14 ++#define NETSEC_EEPROM_MH_ME_ADDRESS_L 0x18 ++#define NETSEC_EEPROM_MH_ME_SIZE 0x1C ++#define NETSEC_EEPROM_PKT_ME_ADDRESS 0x20 ++#define NETSEC_EEPROM_PKT_ME_SIZE 0x24 ++ ++/* this is used to interpret a register layout */ ++struct netsec_pkt_ctrlaram { ++ u8 log_chksum_er_flag:1; ++ u8 log_hd_imcomplete_flag:1; ++ u8 log_hd_er_flag:1; ++}; ++ ++struct netsec_param { ++ struct netsec_pkt_ctrlaram pkt_ctrlaram; ++ bool use_jumbo_pkt_flag; ++}; ++ ++struct netsec_mac_mode { ++ u16 flow_start_th; ++ u16 flow_stop_th; ++ u16 pause_time; ++ bool flow_ctrl_enable_flag; ++}; ++ ++struct netsec_desc_ring { ++ spinlock_t spinlock_desc; /* protect descriptor access */ ++ phys_addr_t desc_phys; ++ struct netsec_frag_info *frag; ++ struct sk_buff **priv; ++ void *ring_vaddr; ++ enum netsec_rings id; ++ int len; ++ u16 tx_done_num; ++ u16 rx_num; ++ u16 head; ++ u16 tail; ++ bool running; ++ bool full; ++}; ++ ++struct netsec_frag_info { ++ dma_addr_t dma_addr; ++ void *addr; ++ u16 len; ++}; ++ ++struct netsec_priv { ++ struct netsec_desc_ring desc_ring[NETSEC_RING_MAX + 1]; ++ struct ethtool_coalesce et_coalesce; ++ struct netsec_mac_mode mac_mode; ++ struct netsec_param param; ++ struct napi_struct napi; ++ phy_interface_t phy_interface; ++ spinlock_t tx_queue_lock; /* protect transmit queue */ ++ struct netsec_frag_info tx_info[MAX_SKB_FRAGS]; ++ struct net_device *ndev; ++ struct device_node *phy_np; ++ struct phy_device *phydev; ++ struct mii_bus *mii_bus; ++ void __iomem *ioaddr; ++ const void *eeprom_base; ++ struct device *dev; ++ struct clk *clk[3]; ++ u32 rx_pkt_buf_len; ++ u32 msg_enable; ++ u32 freq; ++ int actual_link_speed; ++ int clock_count; ++ bool rx_cksum_offload_flag; ++ bool actual_duplex; ++ bool irq_registered; ++}; ++ ++struct netsec_tx_de { ++ u32 attr; ++ u32 data_buf_addr_up; ++ u32 data_buf_addr_lw; ++ u32 buf_len_info; ++}; ++ ++struct netsec_rx_de { ++ u32 attr; ++ u32 data_buf_addr_up; ++ u32 data_buf_addr_lw; ++ u32 buf_len_info; ++}; ++ ++struct netsec_tx_pkt_ctrl { ++ u16 tcp_seg_len; ++ bool tcp_seg_offload_flag; ++ bool cksum_offload_flag; ++}; ++ ++struct netsec_rx_pkt_info { ++ int rx_cksum_result; ++ int err_code; ++ bool is_fragmented; ++ bool err_flag; ++}; ++ ++struct netsec_skb_cb { ++ bool is_rx; ++}; ++ ++static inline void netsec_writel(struct netsec_priv *priv, ++ u32 reg_addr, u32 val) ++{ ++ writel_relaxed(val, priv->ioaddr + (reg_addr << 2)); ++} ++ ++static inline u32 netsec_readl(struct netsec_priv *priv, u32 reg_addr) ++{ ++ return readl_relaxed(priv->ioaddr + (reg_addr << 2)); ++} ++ ++static inline void netsec_mark_skb_type(struct sk_buff *skb, bool is_rx) ++{ ++ struct netsec_skb_cb *cb = (struct netsec_skb_cb *)skb->cb; ++ ++ cb->is_rx = is_rx; ++} ++ ++static inline bool skb_is_rx(struct sk_buff *skb) ++{ ++ struct netsec_skb_cb *cb = (struct netsec_skb_cb *)skb->cb; ++ ++ return cb->is_rx; ++} ++ ++extern const struct net_device_ops netsec_netdev_ops; ++extern const struct ethtool_ops netsec_ethtool_ops; ++ ++int netsec_start_gmac(struct netsec_priv *priv); ++int netsec_stop_gmac(struct netsec_priv *priv); ++int netsec_mii_register(struct netsec_priv *priv); ++void netsec_mii_unregister(struct netsec_priv *priv); ++int netsec_start_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++void netsec_stop_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++u16 netsec_get_rx_num(struct netsec_priv *priv); ++u16 netsec_get_tx_avail_num(struct netsec_priv *priv); ++int netsec_clean_tx_desc_ring(struct netsec_priv *priv); ++int netsec_clean_rx_desc_ring(struct netsec_priv *priv); ++int netsec_set_tx_pkt_data(struct netsec_priv *priv, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ u8 count_frags, const struct netsec_frag_info *info, ++ struct sk_buff *skb); ++int netsec_get_rx_pkt_data(struct netsec_priv *priv, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb); ++void netsec_ring_irq_enable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 i); ++void netsec_ring_irq_disable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 i); ++int netsec_alloc_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++void netsec_free_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc); ++int netsec_setup_rx_desc(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc); ++int netsec_netdev_napi_poll(struct napi_struct *napi_p, int budget); ++ ++#endif /* NETSEC_INTERNAL_H */ +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c b/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c +new file mode 100644 +index 0000000..a4e56cd +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c +@@ -0,0 +1,623 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++#include "netsec.h" ++ ++static const u32 ads_irq_set[] = { ++ NETSEC_REG_NRM_TX_INTEN_SET, ++ NETSEC_REG_NRM_RX_INTEN_SET, ++}; ++ ++static const u32 desc_ring_irq_inten_clr_reg_addr[] = { ++ NETSEC_REG_NRM_TX_INTEN_CLR, ++ NETSEC_REG_NRM_RX_INTEN_CLR, ++}; ++ ++static const u32 int_tmr_reg_addr[] = { ++ NETSEC_REG_NRM_TX_TXINT_TMR, ++ NETSEC_REG_NRM_RX_RXINT_TMR, ++}; ++ ++static const u32 rx_pkt_cnt_reg_addr[] = { ++ 0, ++ NETSEC_REG_NRM_RX_PKTCNT, ++}; ++ ++static const u32 tx_pkt_cnt_reg_addr[] = { ++ NETSEC_REG_NRM_TX_PKTCNT, ++ 0, ++}; ++ ++static const u32 int_pkt_cnt_reg_addr[] = { ++ NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT, ++ NETSEC_REG_NRM_RX_RXINT_PKTCNT, ++}; ++ ++static const u32 tx_done_pkt_addr[] = { ++ NETSEC_REG_NRM_TX_DONE_PKTCNT, ++ 0, ++}; ++ ++static const u32 netsec_desc_mask[] = { ++ [NETSEC_RING_TX] = NETSEC_GMAC_OMR_REG_ST, ++ [NETSEC_RING_RX] = NETSEC_GMAC_OMR_REG_SR ++}; ++ ++void netsec_ring_irq_enable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 irqf) ++{ ++ netsec_writel(priv, ads_irq_set[id], irqf); ++} ++ ++void netsec_ring_irq_disable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 irqf) ++{ ++ netsec_writel(priv, desc_ring_irq_inten_clr_reg_addr[id], irqf); ++} ++ ++static struct sk_buff *alloc_rx_pkt_buf(struct netsec_priv *priv, ++ struct netsec_frag_info *info) ++{ ++ struct sk_buff *skb; ++ ++ if (device_get_dma_attr(priv->dev) == DEV_DMA_COHERENT) { ++ skb = netdev_alloc_skb_ip_align(priv->ndev, info->len); ++ } else { ++ info->len = L1_CACHE_ALIGN(info->len); ++ skb = netdev_alloc_skb(priv->ndev, info->len); ++ } ++ if (!skb) ++ return NULL; ++ ++ netsec_mark_skb_type(skb, NETSEC_RING_RX); ++ info->addr = skb->data; ++ info->dma_addr = dma_map_single(priv->dev, info->addr, info->len, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(priv->dev, info->dma_addr)) { ++ dev_kfree_skb(skb); ++ return NULL; ++ } ++ return skb; ++} ++ ++int netsec_alloc_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ int ret = 0; ++ ++ desc->id = id; ++ desc->len = sizeof(struct netsec_tx_de); /* rx and tx desc same size */ ++ ++ spin_lock_init(&desc->spinlock_desc); ++ ++ desc->ring_vaddr = dma_zalloc_coherent(priv->dev, desc->len * DESC_NUM, ++ &desc->desc_phys, GFP_KERNEL); ++ if (!desc->ring_vaddr) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ desc->frag = kcalloc(DESC_NUM, sizeof(*desc->frag), GFP_KERNEL); ++ if (!desc->frag) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ desc->priv = kcalloc(DESC_NUM, sizeof(struct sk_buff *), GFP_KERNEL); ++ if (!desc->priv) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ return 0; ++ ++err: ++ netsec_free_desc_ring(priv, desc); ++ ++ return ret; ++} ++ ++static void netsec_uninit_pkt_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ struct netsec_frag_info *frag; ++ u32 status; ++ u16 idx; ++ ++ for (idx = 0; idx < DESC_NUM; idx++) { ++ frag = &desc->frag[idx]; ++ if (!frag->addr) ++ continue; ++ ++ status = *(u32 *)(desc->ring_vaddr + desc->len * idx); ++ ++ dma_unmap_single(priv->dev, frag->dma_addr, frag->len, ++ skb_is_rx(desc->priv[idx]) ? DMA_FROM_DEVICE : ++ DMA_TO_DEVICE); ++ if ((status >> NETSEC_TX_LAST) & 1) ++ dev_kfree_skb(desc->priv[idx]); ++ } ++ ++ memset(desc->frag, 0, sizeof(struct netsec_frag_info) * DESC_NUM); ++ memset(desc->priv, 0, sizeof(struct sk_buff *) * DESC_NUM); ++ memset(desc->ring_vaddr, 0, desc->len * DESC_NUM); ++} ++ ++void netsec_free_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ if (desc->ring_vaddr && desc->frag && desc->priv) ++ netsec_uninit_pkt_desc_ring(priv, desc); ++ ++ if (desc->ring_vaddr) { ++ dma_free_coherent(priv->dev, desc->len * DESC_NUM, ++ desc->ring_vaddr, desc->desc_phys); ++ desc->ring_vaddr = NULL; ++ } ++ kfree(desc->frag); ++ desc->frag = NULL; ++ kfree(desc->priv); ++ desc->priv = NULL; ++} ++ ++static void netsec_set_rx_de(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 idx, ++ const struct netsec_frag_info *info, ++ struct sk_buff *skb) ++{ ++ struct netsec_rx_de *de = desc->ring_vaddr + desc->len * idx; ++ u32 attr = (1 << NETSEC_RX_PKT_OWN_FIELD) | ++ (1 << NETSEC_RX_PKT_FS_FIELD) | ++ (1 << NETSEC_RX_PKT_LS_FIELD); ++ ++ if (idx == DESC_NUM - 1) ++ attr |= (1 << NETSEC_RX_PKT_LD_FIELD); ++ ++ de->data_buf_addr_up = upper_32_bits(info->dma_addr); ++ de->data_buf_addr_lw = lower_32_bits(info->dma_addr); ++ de->buf_len_info = info->len; ++ /* desc->attr makes the descriptor live, so it must be physically ++ * written last after the rest of the descriptor body is already there ++ */ ++ dma_wmb(); ++ de->attr = attr; ++ ++ desc->frag[idx].dma_addr = info->dma_addr; ++ desc->frag[idx].addr = info->addr; ++ desc->frag[idx].len = info->len; ++ ++ desc->priv[idx] = skb; ++} ++ ++int netsec_setup_rx_desc(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ struct netsec_frag_info info; ++ struct sk_buff *skb; ++ int n; ++ ++ info.len = priv->rx_pkt_buf_len; ++ ++ for (n = 0; n < DESC_NUM; n++) { ++ skb = alloc_rx_pkt_buf(priv, &info); ++ if (!skb) { ++ netsec_uninit_pkt_desc_ring(priv, desc); ++ return -ENOMEM; ++ } ++ netsec_set_rx_de(priv, desc, n, &info, skb); ++ } ++ ++ return 0; ++} ++ ++static void netsec_set_tx_desc_entry(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ bool first_flag, bool last_flag, ++ const struct netsec_frag_info *frag, ++ struct sk_buff *skb) ++{ ++ struct netsec_tx_de *tx_desc_entry; ++ int idx = desc->head; ++ u32 attr; ++ ++ tx_desc_entry = desc->ring_vaddr + (desc->len * idx); ++ ++ attr = (1 << NETSEC_TX_SHIFT_OWN_FIELD) | ++ (desc->id << NETSEC_TX_SHIFT_DRID_FIELD) | ++ (1 << NETSEC_TX_SHIFT_PT_FIELD) | ++ (NETSEC_RING_GMAC << NETSEC_TX_SHIFT_TDRID_FIELD) | ++ (first_flag << NETSEC_TX_SHIFT_FS_FIELD) | ++ (last_flag << NETSEC_TX_LAST) | ++ (tx_ctrl->cksum_offload_flag << NETSEC_TX_SHIFT_CO) | ++ (tx_ctrl->tcp_seg_offload_flag << NETSEC_TX_SHIFT_SO) | ++ (1 << NETSEC_TX_SHIFT_TRS_FIELD); ++ if (idx == DESC_NUM - 1) ++ attr |= (1 << NETSEC_TX_SHIFT_LD_FIELD); ++ ++ tx_desc_entry->data_buf_addr_up = upper_32_bits(frag->dma_addr); ++ tx_desc_entry->data_buf_addr_lw = lower_32_bits(frag->dma_addr); ++ tx_desc_entry->buf_len_info = (tx_ctrl->tcp_seg_len << 16) | frag->len; ++ /* desc->attr makes the descriptor live, so it must be physically ++ * written last after the rest of the descriptor body is already there ++ */ ++ dma_wmb(); ++ tx_desc_entry->attr = attr; ++ ++ desc->frag[idx] = *frag; ++ desc->priv[idx] = skb; ++} ++ ++static void netsec_get_rx_de(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 idx, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb) ++{ ++ struct netsec_rx_de de = {}; ++ ++ *rxpi = (struct netsec_rx_pkt_info){}; ++ memcpy(&de, desc->ring_vaddr + desc->len * idx, desc->len); ++ ++ dev_dbg(priv->dev, "%08x\n", *(u32 *)&de); ++ *len = de.buf_len_info >> 16; ++ ++ rxpi->is_fragmented = (de.attr >> NETSEC_RX_PKT_FR_FIELD) & 1; ++ rxpi->err_flag = (de.attr >> NETSEC_RX_PKT_ER_FIELD) & 1; ++ rxpi->rx_cksum_result = (de.attr >> NETSEC_RX_PKT_CO_FIELD) & 3; ++ rxpi->err_code = (de.attr >> NETSEC_RX_PKT_ERR_FIELD) & ++ NETSEC_RX_PKT_ERR_MASK; ++ *frag = desc->frag[idx]; ++ *skb = desc->priv[idx]; ++} ++ ++static void netsec_inc_desc_head_idx(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 inc) ++{ ++ u32 sum; ++ ++ sum = desc->head + inc; ++ ++ if (sum >= DESC_NUM) ++ sum -= DESC_NUM; ++ ++ desc->head = sum; ++ desc->full = desc->head == desc->tail; ++} ++ ++static void netsec_inc_desc_tail_idx(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ u32 sum; ++ ++ sum = desc->tail + 1; ++ ++ if (sum >= DESC_NUM) ++ sum -= DESC_NUM; ++ ++ desc->tail = sum; ++ desc->full = false; ++} ++ ++static u16 netsec_get_tx_avail_num_sub(struct netsec_priv *priv, ++ const struct netsec_desc_ring *desc) ++{ ++ if (desc->full) ++ return 0; ++ ++ if (desc->tail > desc->head) ++ return desc->tail - desc->head; ++ ++ return DESC_NUM + desc->tail - desc->head; ++} ++ ++static u16 netsec_get_tx_done_num_sub(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ desc->tx_done_num += netsec_readl(priv, tx_done_pkt_addr[desc->id]); ++ ++ return desc->tx_done_num; ++} ++ ++static int netsec_set_irq_coalesce_param(struct netsec_priv *priv, ++ enum netsec_rings id) ++{ ++ int max_frames, tmr; ++ ++ switch (id) { ++ case NETSEC_RING_TX: ++ max_frames = priv->et_coalesce.tx_max_coalesced_frames; ++ tmr = priv->et_coalesce.tx_coalesce_usecs; ++ break; ++ case NETSEC_RING_RX: ++ max_frames = priv->et_coalesce.rx_max_coalesced_frames; ++ tmr = priv->et_coalesce.rx_coalesce_usecs; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ netsec_writel(priv, int_pkt_cnt_reg_addr[id], max_frames); ++ netsec_writel(priv, int_tmr_reg_addr[id], ((tmr != 0) << 31) | tmr); ++ ++ return 0; ++} ++ ++int netsec_start_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ int ret = 0; ++ ++ spin_lock_bh(&desc->spinlock_desc); ++ ++ if (desc->running) { ++ ret = -EBUSY; ++ goto err; ++ } ++ ++ switch (desc->id) { ++ case NETSEC_RING_RX: ++ netsec_writel(priv, ads_irq_set[id], NETSEC_IRQ_RCV); ++ break; ++ case NETSEC_RING_TX: ++ netsec_writel(priv, ads_irq_set[id], NETSEC_IRQ_EMPTY); ++ break; ++ } ++ ++ netsec_set_irq_coalesce_param(priv, desc->id); ++ desc->running = true; ++ ++err: ++ spin_unlock_bh(&desc->spinlock_desc); ++ ++ return ret; ++} ++ ++void netsec_stop_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ ++ spin_lock_bh(&desc->spinlock_desc); ++ if (desc->running) ++ netsec_writel(priv, desc_ring_irq_inten_clr_reg_addr[id], ++ NETSEC_IRQ_RCV | NETSEC_IRQ_EMPTY | ++ NETSEC_IRQ_SND); ++ ++ desc->running = false; ++ spin_unlock_bh(&desc->spinlock_desc); ++} ++ ++u16 netsec_get_rx_num(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ u32 result; ++ ++ spin_lock(&desc->spinlock_desc); ++ if (desc->running) { ++ result = netsec_readl(priv, ++ rx_pkt_cnt_reg_addr[NETSEC_RING_RX]); ++ desc->rx_num += result; ++ if (result) ++ netsec_inc_desc_head_idx(priv, desc, result); ++ } ++ spin_unlock(&desc->spinlock_desc); ++ ++ return desc->rx_num; ++} ++ ++u16 netsec_get_tx_avail_num(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_TX]; ++ u16 result; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ if (!desc->running) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: not running tx desc\n", __func__); ++ result = 0; ++ goto err; ++ } ++ ++ result = netsec_get_tx_avail_num_sub(priv, desc); ++ ++err: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return result; ++} ++ ++int netsec_clean_tx_desc_ring(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_TX]; ++ unsigned int pkts = 0, bytes = 0; ++ struct netsec_frag_info *frag; ++ struct netsec_tx_de *entry; ++ bool is_last; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ netsec_get_tx_done_num_sub(priv, desc); ++ ++ while ((desc->tail != desc->head || desc->full) && desc->tx_done_num) { ++ frag = &desc->frag[desc->tail]; ++ entry = desc->ring_vaddr + desc->len * desc->tail; ++ is_last = (entry->attr >> NETSEC_TX_LAST) & 1; ++ ++ dma_unmap_single(priv->dev, frag->dma_addr, frag->len, ++ DMA_TO_DEVICE); ++ if (is_last) { ++ pkts++; ++ bytes += desc->priv[desc->tail]->len; ++ dev_kfree_skb(desc->priv[desc->tail]); ++ } ++ *frag = (struct netsec_frag_info){}; ++ netsec_inc_desc_tail_idx(priv, desc); ++ ++ if (is_last) ++ desc->tx_done_num--; ++ } ++ ++ spin_unlock(&desc->spinlock_desc); ++ ++ priv->ndev->stats.tx_packets += pkts; ++ priv->ndev->stats.tx_bytes += bytes; ++ ++ netdev_completed_queue(priv->ndev, pkts, bytes); ++ ++ return 0; ++} ++ ++int netsec_clean_rx_desc_ring(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ while (desc->full || (desc->tail != desc->head)) { ++ netsec_set_rx_de(priv, desc, desc->tail, ++ &desc->frag[desc->tail], ++ desc->priv[desc->tail]); ++ desc->rx_num--; ++ netsec_inc_desc_tail_idx(priv, desc); ++ } ++ ++ spin_unlock(&desc->spinlock_desc); ++ ++ return 0; ++} ++ ++int netsec_set_tx_pkt_data(struct netsec_priv *priv, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ u8 count_frags, const struct netsec_frag_info *info, ++ struct sk_buff *skb) ++{ ++ struct netsec_desc_ring *desc; ++ u32 sum_len = 0; ++ unsigned int i; ++ int ret = 0; ++ ++ if (tx_ctrl->tcp_seg_offload_flag && !tx_ctrl->cksum_offload_flag) ++ return -EINVAL; ++ ++ if (tx_ctrl->tcp_seg_offload_flag) { ++ if (tx_ctrl->tcp_seg_len == 0) ++ return -EINVAL; ++ ++ if (priv->param.use_jumbo_pkt_flag) { ++ if (tx_ctrl->tcp_seg_len > NETSEC_TCP_JUMBO_SEG_LEN_MAX) ++ return -EINVAL; ++ } else { ++ if (tx_ctrl->tcp_seg_len > NETSEC_TCP_SEG_LEN_MAX) ++ return -EINVAL; ++ } ++ } else { ++ if (tx_ctrl->tcp_seg_len) ++ return -EINVAL; ++ } ++ ++ if (!count_frags) ++ return -ERANGE; ++ ++ for (i = 0; i < count_frags; i++) { ++ if ((info[i].len == 0) || (info[i].len > 0xffff)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: bad info len\n", __func__); ++ return -EINVAL; ++ } ++ sum_len += info[i].len; ++ } ++ ++ if (!tx_ctrl->tcp_seg_offload_flag) { ++ if (priv->param.use_jumbo_pkt_flag) { ++ if (sum_len > NETSEC_MAX_TX_JUMBO_PKT_LEN) ++ return -EINVAL; ++ } else { ++ if (sum_len > NETSEC_MAX_TX_PKT_LEN) ++ return -EINVAL; ++ } ++ } ++ ++ desc = &priv->desc_ring[NETSEC_RING_TX]; ++ spin_lock(&desc->spinlock_desc); ++ ++ if (!desc->running) { ++ ret = -ENODEV; ++ goto end; ++ } ++ ++ dma_rmb(); /* we need to see a consistent view of pending tx count */ ++ if (count_frags > netsec_get_tx_avail_num_sub(priv, desc)) { ++ ret = -EBUSY; ++ goto end; ++ } ++ ++ for (i = 0; i < count_frags; i++) { ++ netsec_set_tx_desc_entry(priv, desc, tx_ctrl, i == 0, ++ i == count_frags - 1, &info[i], skb); ++ netsec_inc_desc_head_idx(priv, desc, 1); ++ } ++ ++ dma_wmb(); /* ensure the descriptor is flushed */ ++ netsec_writel(priv, tx_pkt_cnt_reg_addr[NETSEC_RING_TX], 1); ++ ++end: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return ret; ++} ++ ++int netsec_get_rx_pkt_data(struct netsec_priv *priv, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ struct netsec_frag_info info; ++ struct sk_buff *tmp_skb; ++ int ret = 0; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ if (desc->rx_num == 0) { ++ dev_err(priv->dev, "%s 0 len rx\n", __func__); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ info.len = priv->rx_pkt_buf_len; ++ dma_rmb(); /* we need to ensure we only see current data in descriptor */ ++ tmp_skb = alloc_rx_pkt_buf(priv, &info); ++ if (!tmp_skb) { ++ netsec_set_rx_de(priv, desc, desc->tail, ++ &desc->frag[desc->tail], ++ desc->priv[desc->tail]); ++ ret = -ENOMEM; ++ } else { ++ netsec_get_rx_de(priv, desc, desc->tail, rxpi, frag, len, skb); ++ netsec_set_rx_de(priv, desc, desc->tail, &info, tmp_skb); ++ } ++ ++ netsec_inc_desc_tail_idx(priv, desc); ++ desc->rx_num--; ++ ++err: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return ret; ++} +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c b/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c +new file mode 100644 +index 0000000..45830fe +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c +@@ -0,0 +1,78 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_ethtool.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include "netsec.h" ++ ++static void netsec_et_get_drvinfo(struct net_device *net_device, ++ struct ethtool_drvinfo *info) ++{ ++ strlcpy(info->driver, "netsec", sizeof(info->driver)); ++ strlcpy(info->bus_info, dev_name(net_device->dev.parent), ++ sizeof(info->bus_info)); ++} ++ ++static int netsec_et_get_coalesce(struct net_device *net_device, ++ struct ethtool_coalesce *et_coalesce) ++{ ++ struct netsec_priv *priv = netdev_priv(net_device); ++ ++ *et_coalesce = priv->et_coalesce; ++ ++ return 0; ++} ++ ++static int netsec_et_set_coalesce(struct net_device *net_device, ++ struct ethtool_coalesce *et_coalesce) ++{ ++ struct netsec_priv *priv = netdev_priv(net_device); ++ ++ if (et_coalesce->rx_max_coalesced_frames > NETSEC_INT_PKTCNT_MAX) ++ return -EINVAL; ++ if (et_coalesce->tx_max_coalesced_frames > NETSEC_INT_PKTCNT_MAX) ++ return -EINVAL; ++ if (!et_coalesce->rx_max_coalesced_frames) ++ return -EINVAL; ++ if (!et_coalesce->tx_max_coalesced_frames) ++ return -EINVAL; ++ ++ priv->et_coalesce = *et_coalesce; ++ ++ return 0; ++} ++ ++static u32 netsec_et_get_msglevel(struct net_device *dev) ++{ ++ struct netsec_priv *priv = netdev_priv(dev); ++ ++ return priv->msg_enable; ++} ++ ++static void netsec_et_set_msglevel(struct net_device *dev, u32 datum) ++{ ++ struct netsec_priv *priv = netdev_priv(dev); ++ ++ priv->msg_enable = datum; ++} ++ ++const struct ethtool_ops netsec_ethtool_ops = { ++ .get_drvinfo = netsec_et_get_drvinfo, ++ .get_link_ksettings = phy_ethtool_get_link_ksettings, ++ .set_link_ksettings = phy_ethtool_set_link_ksettings, ++ .get_link = ethtool_op_get_link, ++ .get_coalesce = netsec_et_get_coalesce, ++ .set_coalesce = netsec_et_set_coalesce, ++ .get_msglevel = netsec_et_get_msglevel, ++ .set_msglevel = netsec_et_set_msglevel, ++}; +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c b/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c +new file mode 100644 +index 0000000..94e9b7f +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c +@@ -0,0 +1,330 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++#include "netsec.h" ++ ++#define TIMEOUT_SPINS_MAC 1000 ++#define TIMEOUT_SECONDARY_MS_MAC 100 ++ ++static u32 netsec_clk_type(u32 freq) ++{ ++ if (freq < 35 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_25_35_MHZ; ++ if (freq < 60 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_35_60_MHZ; ++ if (freq < 100 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_60_100_MHZ; ++ if (freq < 150 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_100_150_MHZ; ++ if (freq < 250 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_150_250_MHZ; ++ ++ return NETSEC_GMAC_GAR_REG_CR_250_300_MHZ; ++} ++ ++static int netsec_wait_while_busy(struct netsec_priv *priv, u32 addr, u32 mask) ++{ ++ u32 timeout = TIMEOUT_SPINS_MAC; ++ ++ while (--timeout && netsec_readl(priv, addr) & mask) ++ cpu_relax(); ++ if (timeout) ++ return 0; ++ ++ timeout = TIMEOUT_SECONDARY_MS_MAC; ++ while (--timeout && netsec_readl(priv, addr) & mask) ++ usleep_range(1000, 2000); ++ ++ if (timeout) ++ return 0; ++ ++ netdev_WARN(priv->ndev, "%s: timeout\n", __func__); ++ ++ return -ETIMEDOUT; ++} ++ ++static int netsec_mac_write(struct netsec_priv *priv, u32 addr, u32 value) ++{ ++ netsec_writel(priv, MAC_REG_DATA, value); ++ netsec_writel(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_WRITE); ++ return netsec_wait_while_busy(priv, ++ MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); ++} ++ ++static int netsec_mac_read(struct netsec_priv *priv, u32 addr, u32 *read) ++{ ++ int ret; ++ ++ netsec_writel(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_READ); ++ ret = netsec_wait_while_busy(priv, ++ MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); ++ if (ret) ++ return ret; ++ ++ *read = netsec_readl(priv, MAC_REG_DATA); ++ ++ return 0; ++} ++ ++static int netsec_mac_wait_while_busy(struct netsec_priv *priv, ++ u32 addr, u32 mask) ++{ ++ u32 timeout = TIMEOUT_SPINS_MAC; ++ int ret, data; ++ ++ do { ++ ret = netsec_mac_read(priv, addr, &data); ++ if (ret) ++ break; ++ cpu_relax(); ++ } while (--timeout && (data & mask)); ++ ++ if (timeout) ++ return 0; ++ ++ timeout = TIMEOUT_SECONDARY_MS_MAC; ++ do { ++ usleep_range(1000, 2000); ++ ++ ret = netsec_mac_read(priv, addr, &data); ++ if (ret) ++ break; ++ cpu_relax(); ++ } while (--timeout && (data & mask)); ++ ++ if (timeout && !ret) ++ return 0; ++ ++ netdev_WARN(priv->ndev, "%s: timeout\n", __func__); ++ ++ return -ETIMEDOUT; ++} ++ ++static int netsec_mac_update_to_phy_state(struct netsec_priv *priv) ++{ ++ struct phy_device *phydev = priv->ndev->phydev; ++ u32 value = 0; ++ ++ value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON : ++ NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON; ++ ++ if (phydev->speed != SPEED_1000) ++ value |= NETSEC_MCR_PS; ++ ++ if ((priv->phy_interface != PHY_INTERFACE_MODE_GMII) && ++ (phydev->speed == SPEED_100)) ++ value |= NETSEC_GMAC_MCR_REG_FES; ++ ++ value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE; ++ ++ if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII) ++ value |= NETSEC_GMAC_MCR_REG_IBN; ++ ++ if (netsec_mac_write(priv, GMAC_REG_MCR, value)) ++ return -ETIMEDOUT; ++ ++ priv->actual_link_speed = phydev->speed; ++ priv->actual_duplex = phydev->duplex; ++ ++ return 0; ++} ++ ++/* NB netsec_start_gmac() only called from adjust_link */ ++ ++int netsec_start_gmac(struct netsec_priv *priv) ++{ ++ struct phy_device *phydev = priv->ndev->phydev; ++ u32 value = 0; ++ int ret; ++ ++ if (priv->desc_ring[NETSEC_RING_TX].running && ++ priv->desc_ring[NETSEC_RING_RX].running) ++ return 0; ++ ++ if (!priv->desc_ring[NETSEC_RING_RX].running && ++ !priv->desc_ring[NETSEC_RING_TX].running) { ++ if (phydev->speed != SPEED_1000) ++ value = (NETSEC_GMAC_MCR_REG_CST | ++ NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON); ++ ++ if (netsec_mac_write(priv, GMAC_REG_MCR, value)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_BMR, ++ NETSEC_GMAC_BMR_REG_RESET)) ++ return -ETIMEDOUT; ++ ++ /* Wait soft reset */ ++ usleep_range(1000, 5000); ++ ++ ret = netsec_mac_read(priv, GMAC_REG_BMR, &value); ++ if (ret) ++ return ret; ++ if (value & NETSEC_GMAC_BMR_REG_SWR) ++ return -EAGAIN; ++ ++ netsec_writel(priv, MAC_REG_DESC_SOFT_RST, 1); ++ if (netsec_wait_while_busy(priv, MAC_REG_DESC_SOFT_RST, 1)) ++ return -ETIMEDOUT; ++ ++ netsec_writel(priv, MAC_REG_DESC_INIT, 1); ++ if (netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1)) ++ return -ETIMEDOUT; ++ ++ if (netsec_mac_write(priv, GMAC_REG_BMR, ++ NETSEC_GMAC_BMR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_RDLAR, ++ NETSEC_GMAC_RDLAR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_TDLAR, ++ NETSEC_GMAC_TDLAR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_MFFR, 0x80000001)) ++ return -ETIMEDOUT; ++ ++ ret = netsec_mac_update_to_phy_state(priv); ++ if (ret) ++ return ret; ++ ++ if (priv->mac_mode.flow_ctrl_enable_flag) { ++ netsec_writel(priv, MAC_REG_FLOW_TH, ++ (priv->mac_mode.flow_stop_th << 16) | ++ priv->mac_mode.flow_start_th); ++ if (netsec_mac_write(priv, GMAC_REG_FCR, ++ (priv->mac_mode.pause_time << 16) | ++ NETSEC_FCR_RFE | NETSEC_FCR_TFE)) ++ return -ETIMEDOUT; ++ } ++ } ++ ++ ret = netsec_mac_read(priv, GMAC_REG_OMR, &value); ++ if (ret) ++ return ret; ++ ++ if (!priv->desc_ring[NETSEC_RING_RX].running) { ++ value |= NETSEC_GMAC_OMR_REG_SR; ++ netsec_start_desc_ring(priv, NETSEC_RING_RX); ++ } ++ if (!priv->desc_ring[NETSEC_RING_TX].running) { ++ value |= NETSEC_GMAC_OMR_REG_ST; ++ netsec_start_desc_ring(priv, NETSEC_RING_TX); ++ } ++ ++ if (netsec_mac_write(priv, GMAC_REG_OMR, value)) ++ return -ETIMEDOUT; ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ return 0; ++} ++ ++int netsec_stop_gmac(struct netsec_priv *priv) ++{ ++ u32 value; ++ int ret; ++ ++ ret = netsec_mac_read(priv, GMAC_REG_OMR, &value); ++ if (ret) ++ return ret; ++ ++ if (priv->desc_ring[NETSEC_RING_RX].running) { ++ value &= ~NETSEC_GMAC_OMR_REG_SR; ++ netsec_stop_desc_ring(priv, NETSEC_RING_RX); ++ } ++ if (priv->desc_ring[NETSEC_RING_TX].running) { ++ value &= ~NETSEC_GMAC_OMR_REG_ST; ++ netsec_stop_desc_ring(priv, NETSEC_RING_TX); ++ } ++ ++ priv->actual_link_speed = 0; ++ priv->actual_duplex = false; ++ ++ return netsec_mac_write(priv, GMAC_REG_OMR, value); ++} ++ ++static int netsec_phy_write(struct mii_bus *bus, ++ int phy_addr, int reg, u16 val) ++{ ++ struct netsec_priv *priv = bus->priv; ++ ++ if (netsec_mac_write(priv, GMAC_REG_GDR, val)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_GAR, ++ phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | ++ reg << NETSEC_GMAC_GAR_REG_SHIFT_GR | ++ NETSEC_GMAC_GAR_REG_GW | NETSEC_GMAC_GAR_REG_GB | ++ (netsec_clk_type(priv->freq) << ++ GMAC_REG_SHIFT_CR_GAR))) ++ return -ETIMEDOUT; ++ ++ return netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, ++ NETSEC_GMAC_GAR_REG_GB); ++} ++ ++static int netsec_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr) ++{ ++ struct netsec_priv *priv = bus->priv; ++ u32 data; ++ int ret; ++ ++ if (netsec_mac_write(priv, GMAC_REG_GAR, NETSEC_GMAC_GAR_REG_GB | ++ phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | ++ reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | ++ (netsec_clk_type(priv->freq) << ++ GMAC_REG_SHIFT_CR_GAR))) ++ return -ETIMEDOUT; ++ ++ ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, ++ NETSEC_GMAC_GAR_REG_GB); ++ if (ret) ++ return ret; ++ ++ ret = netsec_mac_read(priv, GMAC_REG_GDR, &data); ++ if (ret) ++ return ret; ++ ++ return data; ++} ++ ++int netsec_mii_register(struct netsec_priv *priv) ++{ ++ struct mii_bus *bus = devm_mdiobus_alloc(priv->dev); ++ int ret; ++ ++ if (!bus) ++ return -ENOMEM; ++ ++ snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(priv->dev)); ++ bus->priv = priv; ++ bus->name = "SNI NETSEC MDIO"; ++ bus->read = netsec_phy_read; ++ bus->write = netsec_phy_write; ++ bus->parent = priv->dev; ++ priv->mii_bus = bus; ++ ++ if (dev_of_node(priv->dev)) { ++ ret = of_mdiobus_register(bus, dev_of_node(priv->dev)); ++ } else { ++ /* Mask out all PHYs from auto probing. */ ++ bus->phy_mask = ~0; ++ ret = mdiobus_register(bus); ++ } ++ return ret; ++} ++ ++void netsec_mii_unregister(struct netsec_priv *priv) ++{ ++ mdiobus_unregister(priv->mii_bus); ++} +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_netdev.c b/drivers/net/ethernet/socionext/netsec/netsec_netdev.c +new file mode 100644 +index 0000000..e99cf0e +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_netdev.c +@@ -0,0 +1,540 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_netdev.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "netsec.h" ++ ++#define WAIT_FW_RDY_TIMEOUT 50 ++ ++static const u32 desc_ring_irq_status_reg_addr[] = { ++ NETSEC_REG_NRM_TX_STATUS, ++ NETSEC_REG_NRM_RX_STATUS, ++}; ++ ++static const u32 desc_ads[] = { ++ NETSEC_REG_NRM_TX_CONFIG, ++ NETSEC_REG_NRM_RX_CONFIG, ++}; ++ ++static const u32 netsec_desc_start_reg_addr_up[] = { ++ NETSEC_REG_NRM_TX_DESC_START_UP, ++ NETSEC_REG_NRM_RX_DESC_START_UP, ++}; ++ ++static const u32 netsec_desc_start_reg_addr_lw[] = { ++ NETSEC_REG_NRM_TX_DESC_START_LW, ++ NETSEC_REG_NRM_RX_DESC_START_LW, ++}; ++ ++static u32 netsec_calc_pkt_ctrl_reg_param(const struct netsec_pkt_ctrlaram ++ *pkt_ctrlaram_p) ++{ ++ u32 param = NETSEC_PKT_CTRL_REG_MODE_NRM; ++ ++ if (pkt_ctrlaram_p->log_chksum_er_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER; ++ ++ if (pkt_ctrlaram_p->log_hd_imcomplete_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE; ++ ++ if (pkt_ctrlaram_p->log_hd_er_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_HD_ER; ++ ++ return param; ++} ++ ++static int netsec_netdev_load_ucode_region(struct netsec_priv *priv, u32 reg, ++ u32 addr_h, u32 addr_l, u32 size) ++{ ++ u64 base = (u64)addr_h << 32 | addr_l; ++ __le32 *ucode; ++ u32 i; ++ ++ ucode = memremap(base, size * sizeof(u32), MEMREMAP_WT); ++ if (!ucode) ++ return -ENOMEM; ++ ++ for (i = 0; i < size; i++) ++ netsec_writel(priv, reg, le32_to_cpu(ucode[i])); ++ ++ memunmap(ucode); ++ return 0; ++} ++ ++static int netsec_netdev_load_microcode(struct netsec_priv *priv) ++{ ++ int err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_DMAC_HM_CMD_BUF, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_H), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_L), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_SIZE)); ++ if (err) ++ return err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_DMAC_MH_CMD_BUF, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_H), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_L), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_SIZE)); ++ if (err) ++ return err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_PKT_CMD_BUF, ++ 0, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_ADDRESS), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_SIZE)); ++ if (err) ++ return err; ++ ++ return 0; ++} ++ ++static int netsec_init_hardware(struct netsec_priv *priv) ++{ ++ u32 value; ++ int err; ++ ++ /* set desc_start addr */ ++ netsec_writel(priv, netsec_desc_start_reg_addr_up[NETSEC_RING_RX], ++ upper_32_bits(priv->desc_ring[NETSEC_RING_RX].desc_phys)); ++ netsec_writel(priv, netsec_desc_start_reg_addr_lw[NETSEC_RING_RX], ++ lower_32_bits(priv->desc_ring[NETSEC_RING_RX].desc_phys)); ++ ++ netsec_writel(priv, netsec_desc_start_reg_addr_up[NETSEC_RING_TX], ++ upper_32_bits(priv->desc_ring[NETSEC_RING_TX].desc_phys)); ++ netsec_writel(priv, netsec_desc_start_reg_addr_lw[NETSEC_RING_TX], ++ lower_32_bits(priv->desc_ring[NETSEC_RING_TX].desc_phys)); ++ ++ /* set normal tx desc ring config */ ++ netsec_writel(priv, desc_ads[NETSEC_RING_TX], ++ 1 << NETSEC_REG_DESC_ENDIAN); ++ netsec_writel(priv, desc_ads[NETSEC_RING_RX], ++ 1 << NETSEC_REG_DESC_ENDIAN); ++ ++ err = netsec_netdev_load_microcode(priv); ++ if (err) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: failed to load microcode (%d)\n", __func__, err); ++ return err; ++ } ++ ++ /* start DMA engines */ ++ netsec_writel(priv, NETSEC_REG_DMA_TMR_CTRL, priv->freq / 1000000 - 1); ++ netsec_writel(priv, NETSEC_REG_ADDR_DIS_CORE, 0); ++ ++ usleep_range(1000, 2000); ++ ++ if (!(netsec_readl(priv, NETSEC_REG_TOP_STATUS) & ++ NETSEC_TOP_IRQ_REG_CODE_LOAD_END)) { ++ netif_err(priv, drv, priv->ndev, "microengine start failed\n"); ++ return -ENXIO; ++ } ++ netsec_writel(priv, NETSEC_REG_TOP_STATUS, ++ NETSEC_TOP_IRQ_REG_CODE_LOAD_END); ++ ++ value = netsec_calc_pkt_ctrl_reg_param(&priv->param.pkt_ctrlaram); ++ ++ if (priv->param.use_jumbo_pkt_flag) ++ value |= NETSEC_PKT_CTRL_REG_EN_JUMBO; ++ ++ /* change to normal mode */ ++ netsec_writel(priv, NETSEC_REG_DMA_MH_CTRL, MH_CTRL__MODE_TRANS); ++ netsec_writel(priv, NETSEC_REG_PKT_CTRL, value); ++ ++ while ((netsec_readl(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) & ++ NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0) ++ cpu_relax(); ++ ++ return 0; ++} ++ ++static void netsec_ring_irq_clr(struct netsec_priv *priv, ++ unsigned int id, u32 value) ++{ ++ netsec_writel(priv, desc_ring_irq_status_reg_addr[id], ++ value & (NETSEC_IRQ_EMPTY | NETSEC_IRQ_ERR)); ++} ++ ++static void netsec_napi_tx_processing(struct netsec_priv *priv) ++{ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ netsec_clean_tx_desc_ring(priv); ++ ++ if (netif_queue_stopped(priv->ndev) && ++ netsec_get_tx_avail_num(priv) >= NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX) ++ netif_wake_queue(priv->ndev); ++} ++ ++int netsec_netdev_napi_poll(struct napi_struct *napi_p, int budget) ++{ ++ struct netsec_priv *priv = container_of(napi_p, struct netsec_priv, ++ napi); ++ struct net_device *ndev = priv->ndev; ++ struct netsec_rx_pkt_info rx_info; ++ int ret, done = 0, rx_num = 0; ++ struct netsec_frag_info frag; ++ struct sk_buff *skb; ++ u16 len; ++ ++ netsec_napi_tx_processing(priv); ++ ++ while (done < budget) { ++ if (!rx_num) { ++ rx_num = netsec_get_rx_num(priv); ++ if (!rx_num) ++ break; ++ } ++ done++; ++ rx_num--; ++ ret = netsec_get_rx_pkt_data(priv, &rx_info, &frag, &len, &skb); ++ if (unlikely(ret == -ENOMEM)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: rx fail %d\n", __func__, ret); ++ ndev->stats.rx_dropped++; ++ continue; ++ } ++ dma_unmap_single(priv->dev, frag.dma_addr, frag.len, ++ DMA_FROM_DEVICE); ++ skb_put(skb, len); ++ skb->protocol = eth_type_trans(skb, priv->ndev); ++ ++ if (priv->rx_cksum_offload_flag && ++ rx_info.rx_cksum_result == NETSEC_RX_CKSUM_OK) ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ ++ if (napi_gro_receive(napi_p, skb) != GRO_DROP) { ++ ndev->stats.rx_packets++; ++ ndev->stats.rx_bytes += len; ++ } ++ } ++ ++ if (done < budget && napi_complete_done(napi_p, done)) ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ return done; ++} ++ ++static netdev_tx_t netsec_netdev_start_xmit(struct sk_buff *skb, ++ struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ struct netsec_tx_pkt_ctrl tx_ctrl = {}; ++ u16 pend_tx, tso_seg_len = 0; ++ skb_frag_t *frag; ++ int count_frags; ++ int ret, i; ++ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ count_frags = skb_shinfo(skb)->nr_frags + 1; ++ ++ if (skb->ip_summed == CHECKSUM_PARTIAL) { ++ if ((skb->protocol == htons(ETH_P_IP) && ++ ip_hdr(skb)->protocol == IPPROTO_TCP) || ++ (skb->protocol == htons(ETH_P_IPV6) && ++ ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)) ++ tx_ctrl.cksum_offload_flag = true; ++ else ++ skb_checksum_help(skb); ++ } ++ ++ if (skb_is_gso(skb)) ++ tso_seg_len = skb_shinfo(skb)->gso_size; ++ ++ if (tso_seg_len > 0) { ++ if (skb->protocol == htons(ETH_P_IP)) { ++ ip_hdr(skb)->tot_len = 0; ++ tcp_hdr(skb)->check = ++ ~tcp_v4_check(0, ip_hdr(skb)->saddr, ++ ip_hdr(skb)->daddr, 0); ++ } else { ++ ipv6_hdr(skb)->payload_len = 0; ++ tcp_hdr(skb)->check = ++ ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, ++ &ipv6_hdr(skb)->daddr, ++ 0, IPPROTO_TCP, 0); ++ } ++ ++ tx_ctrl.tcp_seg_offload_flag = true; ++ tx_ctrl.tcp_seg_len = tso_seg_len; ++ } ++ ++ priv->tx_info[0].dma_addr = dma_map_single(priv->dev, skb->data, ++ skb_headlen(skb), ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(priv->dev, priv->tx_info[0].dma_addr)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: DMA mapping failed\n", __func__); ++ return NETDEV_TX_OK; ++ } ++ priv->tx_info[0].addr = skb->data; ++ priv->tx_info[0].len = skb_headlen(skb); ++ ++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ++ frag = &skb_shinfo(skb)->frags[i]; ++ priv->tx_info[i + 1].dma_addr = ++ skb_frag_dma_map(priv->dev, frag, 0, ++ skb_frag_size(frag), DMA_TO_DEVICE); ++ priv->tx_info[i + 1].addr = skb_frag_address(frag); ++ priv->tx_info[i + 1].len = frag->size; ++ } ++ ++ netsec_mark_skb_type(skb, NETSEC_RING_TX); ++ ++ ret = netsec_set_tx_pkt_data(priv, &tx_ctrl, count_frags, ++ priv->tx_info, skb); ++ if (ret) { ++ netif_info(priv, drv, priv->ndev, ++ "set tx pkt failed %d\n", ret); ++ for (i = 0; i < count_frags; i++) ++ dma_unmap_single(priv->dev, priv->tx_info[i].dma_addr, ++ priv->tx_info[i].len, DMA_TO_DEVICE); ++ ndev->stats.tx_dropped++; ++ ++ return NETDEV_TX_OK; ++ } ++ ++ netdev_sent_queue(priv->ndev, skb->len); ++ ++ spin_lock(&priv->tx_queue_lock); ++ pend_tx = netsec_get_tx_avail_num(priv); ++ ++ if (pend_tx < NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX) { ++ netsec_ring_irq_enable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ netif_stop_queue(ndev); ++ goto err; ++ } ++ if (pend_tx <= DESC_NUM - 2) { ++ netsec_ring_irq_enable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ goto err; ++ } ++ netsec_ring_irq_disable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++err: ++ spin_unlock(&priv->tx_queue_lock); ++ ++ return NETDEV_TX_OK; ++} ++ ++static int netsec_netdev_set_features(struct net_device *ndev, ++ netdev_features_t features) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ ++ priv->rx_cksum_offload_flag = !!(features & NETIF_F_RXCSUM); ++ ++ return 0; ++} ++ ++static void netsec_phy_adjust_link(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ ++ if (priv->actual_link_speed == ndev->phydev->speed && ++ priv->actual_duplex == ndev->phydev->duplex) ++ return; ++ ++ phy_print_status(ndev->phydev); ++ ++ netsec_stop_gmac(priv); ++ netsec_start_gmac(priv); ++} ++ ++static irqreturn_t netsec_irq_handler(int irq, void *dev_id) ++{ ++ struct netsec_priv *priv = dev_id; ++ u32 status = netsec_readl(priv, NETSEC_REG_TOP_STATUS) & ++ netsec_readl(priv, NETSEC_REG_TOP_INTEN); ++ ++ if (!status) ++ return IRQ_NONE; ++ ++ if (status & (NETSEC_IRQ_TX | NETSEC_IRQ_RX)) { ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ++ status & (NETSEC_IRQ_TX | NETSEC_IRQ_RX)); ++ napi_schedule(&priv->napi); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void netsec_reset_hardware(struct netsec_priv *priv) ++{ ++ /* stop DMA engines */ ++ if (!netsec_readl(priv, NETSEC_REG_ADDR_DIS_CORE)) { ++ netsec_writel(priv, NETSEC_REG_DMA_HM_CTRL, ++ NETSEC_DMA_CTRL_REG_STOP); ++ netsec_writel(priv, NETSEC_REG_DMA_MH_CTRL, ++ NETSEC_DMA_CTRL_REG_STOP); ++ ++ while (netsec_readl(priv, NETSEC_REG_DMA_HM_CTRL) & ++ NETSEC_DMA_CTRL_REG_STOP) ++ cpu_relax(); ++ ++ while (netsec_readl(priv, NETSEC_REG_DMA_MH_CTRL) & ++ NETSEC_DMA_CTRL_REG_STOP) ++ cpu_relax(); ++ } ++ ++ netsec_writel(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RESET); ++ netsec_writel(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RUN); ++ netsec_writel(priv, NETSEC_REG_COM_INIT, NETSEC_COM_INIT_REG_ALL); ++ ++ while (netsec_readl(priv, NETSEC_REG_COM_INIT) != 0) ++ cpu_relax(); ++} ++ ++static int netsec_netdev_open(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ int ret, n; ++ ++ pm_runtime_get_sync(priv->dev); ++ ++ netsec_reset_hardware(priv); ++ ++ for (n = 0; n <= NETSEC_RING_MAX; n++) { ++ ret = netsec_alloc_desc_ring(priv, n); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: alloc ring failed\n", __func__); ++ goto err; ++ } ++ } ++ ++ ret = netsec_setup_rx_desc(priv, &priv->desc_ring[NETSEC_RING_RX]); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: fail setup ring\n", __func__); ++ goto err1; ++ } ++ ++ ret = netsec_init_hardware(priv); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: netsec_init_hardware fail %d\n", __func__, ret); ++ goto err1; ++ } ++ ++ ret = request_irq(priv->ndev->irq, netsec_irq_handler, ++ IRQF_SHARED, "netsec", priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, "request_irq failed\n"); ++ goto err1; ++ } ++ priv->irq_registered = true; ++ ++ ret = netsec_clean_rx_desc_ring(priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: clean rx desc fail\n", __func__); ++ goto err2; ++ } ++ ++ ret = netsec_clean_tx_desc_ring(priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: clean tx desc fail\n", __func__); ++ goto err2; ++ } ++ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ if (dev_of_node(priv->dev)) { ++ if (!of_phy_connect(priv->ndev, priv->phy_np, ++ netsec_phy_adjust_link, 0, ++ priv->phy_interface)) { ++ netif_err(priv, link, priv->ndev, "missing PHY\n"); ++ goto err2; ++ } ++ } else { ++ ret = phy_connect_direct(priv->ndev, priv->phydev, ++ netsec_phy_adjust_link, ++ priv->phy_interface); ++ if (ret) { ++ netif_err(priv, link, priv->ndev, ++ "phy_connect_direct() failed (%d)\n", ret); ++ goto err2; ++ } ++ } ++ ++ phy_start_aneg(ndev->phydev); ++ ++ netsec_ring_irq_disable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ netsec_start_gmac(priv); ++ napi_enable(&priv->napi); ++ netif_start_queue(ndev); ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ return 0; ++ ++err2: ++ pm_runtime_put_sync(priv->dev); ++ free_irq(priv->ndev->irq, priv); ++ priv->irq_registered = false; ++err1: ++ for (n = 0; n <= NETSEC_RING_MAX; n++) ++ netsec_free_desc_ring(priv, &priv->desc_ring[n]); ++err: ++ pm_runtime_put_sync(priv->dev); ++ ++ return ret; ++} ++ ++static int netsec_netdev_stop(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ int n; ++ ++ phy_stop(ndev->phydev); ++ phy_disconnect(ndev->phydev); ++ ++ netif_stop_queue(priv->ndev); ++ napi_disable(&priv->napi); ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ~0); ++ netsec_stop_gmac(priv); ++ ++ pm_runtime_put_sync(priv->dev); ++ ++ for (n = 0; n <= NETSEC_RING_MAX; n++) ++ netsec_free_desc_ring(priv, &priv->desc_ring[n]); ++ ++ free_irq(priv->ndev->irq, priv); ++ priv->irq_registered = false; ++ ++ return 0; ++} ++ ++const struct net_device_ops netsec_netdev_ops = { ++ .ndo_open = netsec_netdev_open, ++ .ndo_stop = netsec_netdev_stop, ++ .ndo_start_xmit = netsec_netdev_start_xmit, ++ .ndo_set_features = netsec_netdev_set_features, ++ .ndo_set_mac_address = eth_mac_addr, ++ .ndo_validate_addr = eth_validate_addr, ++}; +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_platform.c b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +new file mode 100644 +index 0000000..624f6a7 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +@@ -0,0 +1,435 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_platform.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "netsec.h" ++ ++#define NETSEC_F_NETSEC_VER_MAJOR_NUM(x) (x & 0xffff0000) ++ ++static int napi_weight = 64; ++static u16 pause_time = 256; ++ ++static int netsec_of_probe(struct platform_device *pdev, ++ struct netsec_priv *priv) ++{ ++ int clk_count, ret, i; ++ ++ priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); ++ if (!priv->phy_np) { ++ dev_err(&pdev->dev, "missing required property 'phy-handle'\n"); ++ return -EINVAL; ++ } ++ ++ /* we require named clocks if there is more than one */ ++ clk_count = of_property_count_strings(pdev->dev.of_node, "clock-names"); ++ if (clk_count > 1) { ++ if (clk_count > ARRAY_SIZE(priv->clk)) { ++ dev_err(&pdev->dev, "too many clocks specified (%d)\n", ++ clk_count); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < clk_count; i++) { ++ const char *clk_name; ++ ++ ret = of_property_read_string_index(pdev->dev.of_node, ++ "clock-names", i, ++ &clk_name); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "failed to parse 'clock-names'\n"); ++ return ret; ++ } ++ priv->clk[i] = devm_clk_get(&pdev->dev, clk_name); ++ if (!strcmp(clk_name, "phy_refclk")) { ++ priv->freq = clk_get_rate(priv->clk[i]); ++ dev_dbg(&pdev->dev, ++ "found PHY refclock #%d freq %u\n", ++ i, priv->freq); ++ } ++ } ++ priv->clock_count = clk_count; ++ } else { ++ priv->clk[0] = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->clk)) { ++ dev_err(&pdev->dev, ++ "missing required property 'clocks'\n"); ++ return PTR_ERR(priv->clk); ++ } ++ priv->freq = clk_get_rate(priv->clk[0]); ++ priv->clock_count = 1; ++ } ++ return 0; ++} ++ ++static int netsec_acpi_probe(struct platform_device *pdev, ++ struct netsec_priv *priv, u32 *phy_addr) ++{ ++ int ret; ++ ++ if (!IS_ENABLED(CONFIG_ACPI)) ++ return -ENODEV; ++ ++ ret = device_property_read_u32(&pdev->dev, "phy-channel", phy_addr); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "missing required property 'phy-channel'\n"); ++ return ret; ++ } ++ ++ ret = device_property_read_u32(&pdev->dev, ++ "socionext,phy-clock-frequency", ++ &priv->freq); ++ if (ret) ++ dev_err(&pdev->dev, ++ "missing required property 'socionext,phy-clock-frequency'\n"); ++ return ret; ++} ++ ++static int netsec_probe(struct platform_device *pdev) ++{ ++ struct net_device *ndev; ++ struct netsec_priv *priv; ++ struct resource *mmio_res, *eeprom_res, *irq_res; ++ u8 *mac, macbuf[ETH_ALEN]; ++ u32 hw_ver, phy_addr; ++ int ret; ++ ++ mmio_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!mmio_res) { ++ dev_err(&pdev->dev, "No MMIO resource found.\n"); ++ return -ENODEV; ++ } ++ ++ eeprom_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!eeprom_res) { ++ dev_info(&pdev->dev, "No EEPROM resource found.\n"); ++ return -ENODEV; ++ } ++ ++ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ if (!irq_res) { ++ dev_err(&pdev->dev, "No IRQ resource found.\n"); ++ return -ENODEV; ++ } ++ ++ ndev = alloc_etherdev(sizeof(*priv)); ++ if (!ndev) ++ return -ENOMEM; ++ ++ priv = netdev_priv(ndev); ++ priv->ndev = ndev; ++ SET_NETDEV_DEV(ndev, &pdev->dev); ++ platform_set_drvdata(pdev, priv); ++ priv->dev = &pdev->dev; ++ ++ priv->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | ++ NETIF_MSG_LINK | NETIF_MSG_PROBE; ++ ++ ndev->irq = irq_res->start; ++ ++ priv->phy_interface = device_get_phy_mode(&pdev->dev); ++ if (priv->phy_interface < 0) { ++ dev_err(&pdev->dev, "missing required property 'phy-mode'\n"); ++ ret = -ENODEV; ++ goto free_ndev; ++ } ++ ++ priv->ioaddr = devm_ioremap(&pdev->dev, mmio_res->start, ++ resource_size(mmio_res)); ++ if (!priv->ioaddr) { ++ dev_err(&pdev->dev, "devm_ioremap() failed\n"); ++ ret = -ENXIO; ++ goto free_ndev; ++ } ++ ++ priv->eeprom_base = devm_memremap(&pdev->dev, eeprom_res->start, ++ resource_size(eeprom_res), ++ MEMREMAP_WT); ++ if (!priv->eeprom_base) { ++ dev_err(&pdev->dev, "devm_memremap() failed for EEPROM\n"); ++ ret = -ENXIO; ++ goto free_ndev; ++ } ++ ++ mac = device_get_mac_address(&pdev->dev, macbuf, sizeof(macbuf)); ++ if (mac) ++ ether_addr_copy(ndev->dev_addr, mac); ++ ++ if (priv->eeprom_base && ++ (!mac || !is_valid_ether_addr(ndev->dev_addr))) { ++ const u8 *macp = priv->eeprom_base + NETSEC_EEPROM_MAC_ADDRESS; ++ ++ ndev->dev_addr[0] = macp[3]; ++ ndev->dev_addr[1] = macp[2]; ++ ndev->dev_addr[2] = macp[1]; ++ ndev->dev_addr[3] = macp[0]; ++ ndev->dev_addr[4] = macp[7]; ++ ndev->dev_addr[5] = macp[6]; ++ } ++ ++ if (!is_valid_ether_addr(ndev->dev_addr)) { ++ dev_warn(&pdev->dev, "No MAC address found, using random\n"); ++ eth_hw_addr_random(ndev); ++ } ++ ++ if (dev_of_node(&pdev->dev)) ++ ret = netsec_of_probe(pdev, priv); ++ else ++ ret = netsec_acpi_probe(pdev, priv, &phy_addr); ++ if (ret) ++ goto free_ndev; ++ ++ if (!priv->freq) { ++ dev_err(&pdev->dev, "missing PHY reference clock frequency\n"); ++ ret = -ENODEV; ++ goto free_ndev; ++ } ++ ++ /* disable by default */ ++ priv->et_coalesce.rx_coalesce_usecs = 0; ++ priv->et_coalesce.rx_max_coalesced_frames = 1; ++ priv->et_coalesce.tx_coalesce_usecs = 0; ++ priv->et_coalesce.tx_max_coalesced_frames = 1; ++ ++ ret = device_property_read_u32(&pdev->dev, "max-frame-size", ++ &ndev->max_mtu); ++ if (ret < 0) ++ ndev->max_mtu = ETH_DATA_LEN; ++ ++ priv->rx_pkt_buf_len = ndev->max_mtu + 22; ++ priv->param.use_jumbo_pkt_flag = (ndev->max_mtu > ETH_DATA_LEN); ++ ++ pm_runtime_enable(&pdev->dev); ++ /* runtime_pm coverage just for probe, open/close also cover it */ ++ pm_runtime_get_sync(&pdev->dev); ++ ++ hw_ver = netsec_readl(priv, NETSEC_REG_F_TAIKI_VER); ++ /* this driver only supports F_TAIKI style NETSEC */ ++ if (NETSEC_F_NETSEC_VER_MAJOR_NUM(hw_ver) != ++ NETSEC_F_NETSEC_VER_MAJOR_NUM(NETSEC_REG_NETSEC_VER_F_TAIKI)) { ++ ret = -ENODEV; ++ goto pm_disable; ++ } ++ ++ dev_info(&pdev->dev, "hardware revision %d.%d\n", ++ hw_ver >> 16, hw_ver & 0xffff); ++ ++ priv->mac_mode.flow_start_th = NETSEC_FLOW_CONTROL_START_THRESHOLD; ++ priv->mac_mode.flow_stop_th = NETSEC_FLOW_CONTROL_STOP_THRESHOLD; ++ priv->mac_mode.pause_time = pause_time; ++ priv->mac_mode.flow_ctrl_enable_flag = false; ++ ++ netif_napi_add(ndev, &priv->napi, netsec_netdev_napi_poll, napi_weight); ++ ++ ndev->netdev_ops = &netsec_netdev_ops; ++ ndev->ethtool_ops = &netsec_ethtool_ops; ++ ndev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | ++ NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO | ++ NETIF_F_HIGHDMA | NETIF_F_RXCSUM; ++ ndev->hw_features = ndev->features; ++ ++ priv->rx_cksum_offload_flag = true; ++ spin_lock_init(&priv->tx_queue_lock); ++ ++ ret = netsec_mii_register(priv); ++ if (ret) { ++ dev_err(&pdev->dev, "mii bus registration failed (%d)\n", ret); ++ goto pm_disable; ++ } ++ ++ if (!dev_of_node(&pdev->dev)) { /* ACPI */ ++ priv->phydev = get_phy_device(priv->mii_bus, phy_addr, false); ++ if (IS_ERR(priv->phydev)) { ++ dev_err(&pdev->dev, "get_phy_device() failed (%ld)\n", ++ PTR_ERR(priv->phydev)); ++ ret = PTR_ERR(priv->phydev); ++ goto unregister_mii; ++ } ++ ++ ret = phy_device_register(priv->phydev); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "phy_device_register() failed (%d)\n", ret); ++ phy_device_free(priv->phydev); ++ goto unregister_mii; ++ } ++ } ++ ++ /* disable all other interrupt sources */ ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ~0); ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) ++ dev_warn(&pdev->dev, "Failed to enable 64-bit DMA\n"); ++ ++ ret = register_netdev(ndev); ++ if (ret) { ++ netif_err(priv, probe, ndev, "register_netdev() failed\n"); ++ goto unregister_mii; ++ } ++ ++ pm_runtime_put_sync_suspend(&pdev->dev); ++ ++ return 0; ++ ++unregister_mii: ++ netsec_mii_unregister(priv); ++ ++pm_disable: ++ pm_runtime_put_sync_suspend(&pdev->dev); ++ pm_runtime_disable(&pdev->dev); ++ ++free_ndev: ++ free_netdev(ndev); ++ ++ dev_err(&pdev->dev, "init failed\n"); ++ ++ return ret; ++} ++ ++static int netsec_remove(struct platform_device *pdev) ++{ ++ struct netsec_priv *priv = platform_get_drvdata(pdev); ++ ++ unregister_netdev(priv->ndev); ++ if (!dev_of_node(&pdev->dev)) { /* ACPI */ ++ phy_device_remove(priv->phydev); ++ phy_device_free(priv->phydev); ++ } ++ netsec_mii_unregister(priv); ++ pm_runtime_disable(&pdev->dev); ++ free_netdev(priv->ndev); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int netsec_runtime_suspend(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ int n; ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (priv->irq_registered) ++ disable_irq(priv->ndev->irq); ++ ++ netsec_writel(priv, NETSEC_REG_CLK_EN, 0); ++ ++ for (n = priv->clock_count - 1; n >= 0; n--) ++ clk_disable_unprepare(priv->clk[n]); ++ ++ return 0; ++} ++ ++static int netsec_runtime_resume(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ int n; ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ /* first let the clocks back on */ ++ ++ for (n = 0; n < priv->clock_count; n++) ++ clk_prepare_enable(priv->clk[n]); ++ ++ netsec_writel(priv, NETSEC_REG_CLK_EN, NETSEC_CLK_EN_REG_DOM_D | ++ NETSEC_CLK_EN_REG_DOM_C | ++ NETSEC_CLK_EN_REG_DOM_G); ++ ++ if (priv->irq_registered) ++ enable_irq(priv->ndev->irq); ++ ++ return 0; ++} ++ ++static int netsec_pm_suspend(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (pm_runtime_status_suspended(dev)) ++ return 0; ++ ++ return netsec_runtime_suspend(dev); ++} ++ ++static int netsec_pm_resume(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (pm_runtime_status_suspended(dev)) ++ return 0; ++ ++ return netsec_runtime_resume(dev); ++} ++#endif ++ ++static const struct dev_pm_ops netsec_pm_ops = { ++ SET_SYSTEM_SLEEP_PM_OPS(netsec_pm_suspend, netsec_pm_resume) ++ SET_RUNTIME_PM_OPS(netsec_runtime_suspend, netsec_runtime_resume, NULL) ++}; ++ ++static const struct of_device_id netsec_dt_ids[] = { ++ { .compatible = "socionext,synquacer-netsec" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, netsec_dt_ids); ++ ++#ifdef CONFIG_ACPI ++static const struct acpi_device_id netsec_acpi_ids[] = { ++ { "SCX0001" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(acpi, netsec_acpi_ids); ++#endif ++ ++static struct platform_driver netsec_driver = { ++ .probe = netsec_probe, ++ .remove = netsec_remove, ++ .driver.name = "netsec", ++ .driver.of_match_table = netsec_dt_ids, ++ .driver.acpi_match_table = ACPI_PTR(netsec_acpi_ids), ++ .driver.pm = &netsec_pm_ops, ++}; ++module_platform_driver(netsec_driver); ++ ++MODULE_AUTHOR("Andy Green "); ++MODULE_AUTHOR("Jassi Brar "); ++MODULE_AUTHOR("Ard Biesheuvel "); ++MODULE_DESCRIPTION("NETSEC Ethernet driver"); ++MODULE_LICENSE("GPL"); +-- +cgit v1.1 + +From 31a61532e7b859a797d36595ec5ab7485a9b24d5 Mon Sep 17 00:00:00 2001 +From: Jassi Brar +Date: Wed, 30 Aug 2017 15:55:52 +0530 +Subject: dt-bindings: net: Add DT bindings for Socionext Netsec + +This patch adds documentation for Device-Tree bindings for the +Socionext NetSec Controller driver. + +Signed-off-by: Jassi Brar +Signed-off-by: Ard Biesheuvel +--- + .../devicetree/bindings/net/socionext-netsec.txt | 43 ++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/socionext-netsec.txt + +diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt b/Documentation/devicetree/bindings/net/socionext-netsec.txt +new file mode 100644 +index 0000000..4695969 +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/socionext-netsec.txt +@@ -0,0 +1,43 @@ ++* Socionext NetSec Ethernet Controller IP ++ ++Required properties: ++- compatible: Should be "socionext,synquacer-netsec" ++- reg: Address and length of the control register area, followed by the ++ address and length of the EEPROM holding the MAC address and ++ microengine firmware ++- interrupts: Should contain ethernet controller interrupt ++- clocks: phandle to the PHY reference clock, and any other clocks to be ++ switched by runtime_pm ++- clock-names: Required only if more than a single clock is listed in 'clocks'. ++ The PHY reference clock must be named 'phy_refclk' ++- phy-mode: See ethernet.txt file in the same directory ++- phy-handle: phandle to select child phy ++ ++Optional properties: (See ethernet.txt file in the same directory) ++- local-mac-address ++- mac-address ++- max-speed ++- max-frame-size ++ ++Required properties for the child phy: ++- reg: phy address ++ ++Example: ++ eth0: netsec@522D0000 { ++ compatible = "socionext,synquacer-netsec"; ++ reg = <0 0x522D0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clk_netsec>; ++ phy-mode = "rgmii"; ++ max-speed = <1000>; ++ max-frame-size = <9000>; ++ phy-handle = <ðphy0>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethphy0: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++ }; +-- +cgit v1.1 + +From d2fc584f8237746a84e6ec8690d8884f148fc449 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Oct 2017 11:35:51 +0100 +Subject: [PATCH] add interrupt.h, sort alphabetically + +Signed-off-by: Peter Robinson +--- + drivers/net/ethernet/socionext/netsec/netsec_platform.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_platform.c b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +index 624f6a7093f6..79072bae917d 100644 +--- a/drivers/net/ethernet/socionext/netsec/netsec_platform.c ++++ b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +@@ -14,21 +14,22 @@ + */ + + #include +-#include +-#include +-#include +-#include + #include ++#include ++#include ++#include + #include ++#include ++#include + #include +-#include +-#include +-#include ++#include + #include + #include + #include +-#include ++#include + #include ++#include ++#include + + #include "netsec.h" + +-- +2.14.2 + diff --git a/baseconfig/CONFIG_ADXL345_I2C b/baseconfig/CONFIG_ADXL345_I2C new file mode 100644 index 000000000..f6976b836 --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_I2C @@ -0,0 +1 @@ +# CONFIG_ADXL345_I2C is not set diff --git a/baseconfig/CONFIG_ADXL345_SPI b/baseconfig/CONFIG_ADXL345_SPI new file mode 100644 index 000000000..186ab0d3a --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_SPI @@ -0,0 +1 @@ +# CONFIG_ADXL345_SPI is not set diff --git a/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ b/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ new file mode 100644 index 000000000..40a287f0f --- /dev/null +++ b/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ @@ -0,0 +1 @@ +CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ=y diff --git a/baseconfig/CONFIG_ALTERA_MSGDMA b/baseconfig/CONFIG_ALTERA_MSGDMA new file mode 100644 index 000000000..7a1edd837 --- /dev/null +++ b/baseconfig/CONFIG_ALTERA_MSGDMA @@ -0,0 +1 @@ +CONFIG_ALTERA_MSGDMA=m diff --git a/baseconfig/CONFIG_ARM64_ERRATUM_858921 b/baseconfig/CONFIG_ARM64_ERRATUM_858921 new file mode 100644 index 000000000..055a6880c --- /dev/null +++ b/baseconfig/CONFIG_ARM64_ERRATUM_858921 @@ -0,0 +1 @@ +CONFIG_ARM64_ERRATUM_858921=y diff --git a/baseconfig/CONFIG_ATH10K_SDIO b/baseconfig/CONFIG_ATH10K_SDIO new file mode 100644 index 000000000..9ddf1123b --- /dev/null +++ b/baseconfig/CONFIG_ATH10K_SDIO @@ -0,0 +1 @@ +CONFIG_ATH10K_SDIO=m diff --git a/baseconfig/CONFIG_ATH10K_USB b/baseconfig/CONFIG_ATH10K_USB new file mode 100644 index 000000000..29021503d --- /dev/null +++ b/baseconfig/CONFIG_ATH10K_USB @@ -0,0 +1 @@ +CONFIG_ATH10K_USB=m diff --git a/baseconfig/CONFIG_B43LEGACY_DEBUG b/baseconfig/CONFIG_B43LEGACY_DEBUG index 02f67a471..494982463 100644 --- a/baseconfig/CONFIG_B43LEGACY_DEBUG +++ b/baseconfig/CONFIG_B43LEGACY_DEBUG @@ -1 +1 @@ -CONFIG_B43LEGACY_DEBUG=y +# CONFIG_B43LEGACY_DEBUG is not set diff --git a/baseconfig/CONFIG_B43_DEBUG b/baseconfig/CONFIG_B43_DEBUG index 9346a4511..a2bf9bb1f 100644 --- a/baseconfig/CONFIG_B43_DEBUG +++ b/baseconfig/CONFIG_B43_DEBUG @@ -1 +1 @@ -CONFIG_B43_DEBUG=y +# CONFIG_B43_DEBUG is not set diff --git a/baseconfig/CONFIG_BACKLIGHT_ARCXCNN b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN new file mode 100644 index 000000000..49161963d --- /dev/null +++ b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN @@ -0,0 +1 @@ +CONFIG_BACKLIGHT_ARCXCNN=m diff --git a/baseconfig/CONFIG_BATTERY_LEGO_EV3 b/baseconfig/CONFIG_BATTERY_LEGO_EV3 new file mode 100644 index 000000000..3305bd311 --- /dev/null +++ b/baseconfig/CONFIG_BATTERY_LEGO_EV3 @@ -0,0 +1 @@ +# CONFIG_BATTERY_LEGO_EV3 is not set diff --git a/baseconfig/CONFIG_BATTERY_MAX1721X b/baseconfig/CONFIG_BATTERY_MAX1721X new file mode 100644 index 000000000..98c04567c --- /dev/null +++ b/baseconfig/CONFIG_BATTERY_MAX1721X @@ -0,0 +1 @@ +# CONFIG_BATTERY_MAX1721X is not set diff --git a/baseconfig/CONFIG_BCM_FLEXRM_MBOX b/baseconfig/CONFIG_BCM_FLEXRM_MBOX new file mode 100644 index 000000000..b47d4f392 --- /dev/null +++ b/baseconfig/CONFIG_BCM_FLEXRM_MBOX @@ -0,0 +1 @@ +# CONFIG_BCM_FLEXRM_MBOX is not set diff --git a/baseconfig/CONFIG_BFQ_GROUP_IOSCHED b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED new file mode 100644 index 000000000..731981ca3 --- /dev/null +++ b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED @@ -0,0 +1 @@ +CONFIG_BFQ_GROUP_IOSCHED=y diff --git a/baseconfig/CONFIG_BLK_CPQ_CISS_DA b/baseconfig/CONFIG_BLK_CPQ_CISS_DA deleted file mode 100644 index be7870097..000000000 --- a/baseconfig/CONFIG_BLK_CPQ_CISS_DA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BLK_CPQ_CISS_DA=m diff --git a/baseconfig/CONFIG_BLK_DEV_HD b/baseconfig/CONFIG_BLK_DEV_HD deleted file mode 100644 index 9155aa284..000000000 --- a/baseconfig/CONFIG_BLK_DEV_HD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_DEV_HD is not set diff --git a/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW new file mode 100644 index 000000000..802bc55b4 --- /dev/null +++ b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_THROTTLING_LOW is not set diff --git a/baseconfig/CONFIG_BLK_DEV_UB b/baseconfig/CONFIG_BLK_DEV_UB deleted file mode 100644 index 6fbfd13fb..000000000 --- a/baseconfig/CONFIG_BLK_DEV_UB +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_DEV_UB is not set diff --git a/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD b/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD new file mode 100644 index 000000000..170bbf312 --- /dev/null +++ b/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD @@ -0,0 +1 @@ +CONFIG_BNXT_FLOWER_OFFLOAD=y diff --git a/baseconfig/CONFIG_BPF_STREAM_PARSER b/baseconfig/CONFIG_BPF_STREAM_PARSER new file mode 100644 index 000000000..7cf783506 --- /dev/null +++ b/baseconfig/CONFIG_BPF_STREAM_PARSER @@ -0,0 +1 @@ +CONFIG_BPF_STREAM_PARSER=y diff --git a/baseconfig/CONFIG_BRCMSTB_GISB_ARB b/baseconfig/CONFIG_BRCMSTB_GISB_ARB new file mode 100644 index 000000000..36e31edd2 --- /dev/null +++ b/baseconfig/CONFIG_BRCMSTB_GISB_ARB @@ -0,0 +1 @@ +# CONFIG_BRCMSTB_GISB_ARB is not set diff --git a/baseconfig/CONFIG_BT_HCIUART_SERDEV b/baseconfig/CONFIG_BT_HCIUART_SERDEV new file mode 100644 index 000000000..0b0ef5abd --- /dev/null +++ b/baseconfig/CONFIG_BT_HCIUART_SERDEV @@ -0,0 +1 @@ +CONFIG_BT_HCIUART_SERDEV=y diff --git a/baseconfig/CONFIG_BT_QCOMSMD b/baseconfig/CONFIG_BT_QCOMSMD deleted file mode 100644 index d67bc39b0..000000000 --- a/baseconfig/CONFIG_BT_QCOMSMD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BT_QCOMSMD is not set diff --git a/baseconfig/CONFIG_BT_SCO b/baseconfig/CONFIG_BT_SCO deleted file mode 100644 index c04760986..000000000 --- a/baseconfig/CONFIG_BT_SCO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BT_SCO=y diff --git a/baseconfig/CONFIG_CAN_HI311X b/baseconfig/CONFIG_CAN_HI311X new file mode 100644 index 000000000..a775c67f7 --- /dev/null +++ b/baseconfig/CONFIG_CAN_HI311X @@ -0,0 +1 @@ +CONFIG_CAN_HI311X=m diff --git a/baseconfig/CONFIG_CAN_MCBA_USB b/baseconfig/CONFIG_CAN_MCBA_USB new file mode 100644 index 000000000..9a21b3bcb --- /dev/null +++ b/baseconfig/CONFIG_CAN_MCBA_USB @@ -0,0 +1 @@ +CONFIG_CAN_MCBA_USB=m diff --git a/baseconfig/CONFIG_CAN_PEAK_PCIEFD b/baseconfig/CONFIG_CAN_PEAK_PCIEFD new file mode 100644 index 000000000..3a388b984 --- /dev/null +++ b/baseconfig/CONFIG_CAN_PEAK_PCIEFD @@ -0,0 +1 @@ +CONFIG_CAN_PEAK_PCIEFD=m diff --git a/baseconfig/CONFIG_CAN_VXCAN b/baseconfig/CONFIG_CAN_VXCAN new file mode 100644 index 000000000..a6e002cff --- /dev/null +++ b/baseconfig/CONFIG_CAN_VXCAN @@ -0,0 +1 @@ +CONFIG_CAN_VXCAN=m diff --git a/baseconfig/CONFIG_CCS811 b/baseconfig/CONFIG_CCS811 new file mode 100644 index 000000000..931f14e2a --- /dev/null +++ b/baseconfig/CONFIG_CCS811 @@ -0,0 +1 @@ +# CONFIG_CCS811 is not set diff --git a/baseconfig/CONFIG_CEC_PIN b/baseconfig/CONFIG_CEC_PIN new file mode 100644 index 000000000..395ddfbf2 --- /dev/null +++ b/baseconfig/CONFIG_CEC_PIN @@ -0,0 +1 @@ +CONFIG_CEC_PIN=y diff --git a/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS new file mode 100644 index 000000000..07bd8e955 --- /dev/null +++ b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS @@ -0,0 +1 @@ +CONFIG_CEC_PLATFORM_DRIVERS=y diff --git a/baseconfig/CONFIG_CHARGER_LTC3651 b/baseconfig/CONFIG_CHARGER_LTC3651 new file mode 100644 index 000000000..a4243da74 --- /dev/null +++ b/baseconfig/CONFIG_CHARGER_LTC3651 @@ -0,0 +1 @@ +# CONFIG_CHARGER_LTC3651 is not set diff --git a/baseconfig/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/CONFIG_CHARGER_QCOM_SMBB deleted file mode 100644 index c06d8f1f1..000000000 --- a/baseconfig/CONFIG_CHARGER_QCOM_SMBB +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CHARGER_QCOM_SMBB is not set diff --git a/baseconfig/CONFIG_CIFS_DEBUG_DUMP_KEYS b/baseconfig/CONFIG_CIFS_DEBUG_DUMP_KEYS new file mode 100644 index 000000000..03f554dba --- /dev/null +++ b/baseconfig/CONFIG_CIFS_DEBUG_DUMP_KEYS @@ -0,0 +1 @@ +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set diff --git a/baseconfig/CONFIG_CISS_SCSI_TAPE b/baseconfig/CONFIG_CISS_SCSI_TAPE deleted file mode 100644 index 2170cc840..000000000 --- a/baseconfig/CONFIG_CISS_SCSI_TAPE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CISS_SCSI_TAPE=y diff --git a/baseconfig/CONFIG_CLK_HSDK b/baseconfig/CONFIG_CLK_HSDK new file mode 100644 index 000000000..e1788bbc5 --- /dev/null +++ b/baseconfig/CONFIG_CLK_HSDK @@ -0,0 +1 @@ +# CONFIG_CLK_HSDK is not set diff --git a/baseconfig/CONFIG_CLOCK_THERMAL b/baseconfig/CONFIG_CLOCK_THERMAL new file mode 100644 index 000000000..72ca05f2c --- /dev/null +++ b/baseconfig/CONFIG_CLOCK_THERMAL @@ -0,0 +1 @@ +# CONFIG_CLOCK_THERMAL is not set diff --git a/baseconfig/arm/CONFIG_COMMON_CLK_SI570 b/baseconfig/CONFIG_COMMON_CLK_SI570 similarity index 100% rename from baseconfig/arm/CONFIG_COMMON_CLK_SI570 rename to baseconfig/CONFIG_COMMON_CLK_SI570 diff --git a/baseconfig/CONFIG_CORTINA_PHY b/baseconfig/CONFIG_CORTINA_PHY new file mode 100644 index 000000000..87341d40e --- /dev/null +++ b/baseconfig/CONFIG_CORTINA_PHY @@ -0,0 +1 @@ +CONFIG_CORTINA_PHY=m diff --git a/baseconfig/CONFIG_CRC4 b/baseconfig/CONFIG_CRC4 new file mode 100644 index 000000000..a67720667 --- /dev/null +++ b/baseconfig/CONFIG_CRC4 @@ -0,0 +1 @@ +CONFIG_CRC4=m diff --git a/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT b/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT index 95f043d68..83b61e1e1 100644 --- a/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT +++ b/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT @@ -1 +1 @@ -# CONFIG_CROS_KBD_LED_BACKLIGHT is not set +CONFIG_CROS_KBD_LED_BACKLIGHT=m diff --git a/baseconfig/CONFIG_CRYPTO_DEV_CCREE b/baseconfig/CONFIG_CRYPTO_DEV_CCREE new file mode 100644 index 000000000..fe4fcee59 --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_CCREE @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_CCREE is not set diff --git a/baseconfig/CONFIG_CRYPTO_DEV_NITROX_CNN55XX b/baseconfig/CONFIG_CRYPTO_DEV_NITROX_CNN55XX new file mode 100644 index 000000000..47ee7d9bc --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_NITROX_CNN55XX @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m diff --git a/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP b/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP new file mode 100644 index 000000000..c494dcc87 --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_SP_CCP is not set diff --git a/baseconfig/CONFIG_CRYPTO_DH b/baseconfig/CONFIG_CRYPTO_DH index ea06ab3c2..c92378433 100644 --- a/baseconfig/CONFIG_CRYPTO_DH +++ b/baseconfig/CONFIG_CRYPTO_DH @@ -1 +1 @@ -CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_DH=y diff --git a/baseconfig/CONFIG_CRYPTO_GCM b/baseconfig/CONFIG_CRYPTO_GCM index 0cb7edc79..8b509be56 100644 --- a/baseconfig/CONFIG_CRYPTO_GCM +++ b/baseconfig/CONFIG_CRYPTO_GCM @@ -1 +1 @@ -CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GCM=y diff --git a/baseconfig/CONFIG_CRYPTO_GHASH b/baseconfig/CONFIG_CRYPTO_GHASH index b94cd971d..2104f2f02 100644 --- a/baseconfig/CONFIG_CRYPTO_GHASH +++ b/baseconfig/CONFIG_CRYPTO_GHASH @@ -1 +1 @@ -CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_GHASH=y diff --git a/baseconfig/CONFIG_DEVFREQ_THERMAL b/baseconfig/CONFIG_DEVFREQ_THERMAL new file mode 100644 index 000000000..5b90f9082 --- /dev/null +++ b/baseconfig/CONFIG_DEVFREQ_THERMAL @@ -0,0 +1 @@ +# CONFIG_DEVFREQ_THERMAL is not set diff --git a/baseconfig/CONFIG_DEVPORT b/baseconfig/CONFIG_DEVPORT index 555cf4be4..ff170aad1 100644 --- a/baseconfig/CONFIG_DEVPORT +++ b/baseconfig/CONFIG_DEVPORT @@ -1 +1 @@ -# CONFIG_DEVPORT is not set +CONFIG_DEVPORT=y diff --git a/baseconfig/CONFIG_DM_INTEGRITY b/baseconfig/CONFIG_DM_INTEGRITY new file mode 100644 index 000000000..ee953fd2d --- /dev/null +++ b/baseconfig/CONFIG_DM_INTEGRITY @@ -0,0 +1 @@ +CONFIG_DM_INTEGRITY=m diff --git a/baseconfig/CONFIG_DM_ZONED b/baseconfig/CONFIG_DM_ZONED new file mode 100644 index 000000000..0cfba7b46 --- /dev/null +++ b/baseconfig/CONFIG_DM_ZONED @@ -0,0 +1 @@ +CONFIG_DM_ZONED=m diff --git a/baseconfig/CONFIG_DRM_AMDGPU_CIK b/baseconfig/CONFIG_DRM_AMDGPU_CIK index e184e53af..6f3da0bab 100644 --- a/baseconfig/CONFIG_DRM_AMDGPU_CIK +++ b/baseconfig/CONFIG_DRM_AMDGPU_CIK @@ -1 +1 @@ -# CONFIG_DRM_AMDGPU_CIK is not set +CONFIG_DRM_AMDGPU_CIK=y diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO new file mode 100644 index 000000000..5c276f1dc --- /dev/null +++ b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -0,0 +1 @@ +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO index 34ecaf242..d1f777db4 100644 --- a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO +++ b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -1 +1 @@ -CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC new file mode 100644 index 000000000..32e5c4520 --- /dev/null +++ b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC @@ -0,0 +1 @@ +CONFIG_DRM_FBDEV_OVERALLOC=100 diff --git a/baseconfig/CONFIG_DRM_LVDS_ENCODER b/baseconfig/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 000000000..e2ea277b3 --- /dev/null +++ b/baseconfig/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +# CONFIG_DRM_LVDS_ENCODER is not set diff --git a/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW new file mode 100644 index 000000000..7aa3826f4 --- /dev/null +++ b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW @@ -0,0 +1 @@ +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set diff --git a/baseconfig/CONFIG_DRM_MXSFB b/baseconfig/CONFIG_DRM_MXSFB index e24a8952c..550352f6d 100644 --- a/baseconfig/CONFIG_DRM_MXSFB +++ b/baseconfig/CONFIG_DRM_MXSFB @@ -1 +1 @@ -CONFIG_DRM_MXSFB=m +# CONFIG_DRM_MXSFB is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_INNOLUX_P079ZCA b/baseconfig/CONFIG_DRM_PANEL_INNOLUX_P079ZCA new file mode 100644 index 000000000..c84531b68 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_INNOLUX_P079ZCA @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/CONFIG_DRM_PANEL_LG_LG4573 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 rename to baseconfig/CONFIG_DRM_PANEL_LG_LG4573 diff --git a/baseconfig/CONFIG_DRM_PANEL_LVDS b/baseconfig/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..af4bf6e01 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_LVDS is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 rename to baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 rename to baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 diff --git a/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 000000000..8cb5243d1 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 similarity index 100% rename from baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 rename to baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 similarity index 100% rename from baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 rename to baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 diff --git a/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V new file mode 100644 index 000000000..712cb79a7 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set diff --git a/baseconfig/CONFIG_DRM_RCAR_DW_HDMI b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI new file mode 100644 index 000000000..d3dace0e8 --- /dev/null +++ b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI @@ -0,0 +1 @@ +# CONFIG_DRM_RCAR_DW_HDMI is not set diff --git a/baseconfig/CONFIG_DRM_VBOXVIDEO b/baseconfig/CONFIG_DRM_VBOXVIDEO new file mode 100644 index 000000000..8cd637a0c --- /dev/null +++ b/baseconfig/CONFIG_DRM_VBOXVIDEO @@ -0,0 +1 @@ +# CONFIG_DRM_VBOXVIDEO is not set diff --git a/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE b/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE new file mode 100644 index 000000000..4f0814b60 --- /dev/null +++ b/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE @@ -0,0 +1 @@ +# CONFIG_DVB_DDBRIDGE_MSIENABLE is not set diff --git a/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC new file mode 100644 index 000000000..47e8f4090 --- /dev/null +++ b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC @@ -0,0 +1 @@ +CONFIG_EARLY_PRINTK_USB_XDBC=y diff --git a/baseconfig/CONFIG_EDAC_GHES b/baseconfig/CONFIG_EDAC_GHES new file mode 100644 index 000000000..e68c7c4c2 --- /dev/null +++ b/baseconfig/CONFIG_EDAC_GHES @@ -0,0 +1 @@ +CONFIG_EDAC_GHES=y diff --git a/baseconfig/CONFIG_EDAC_MM_EDAC b/baseconfig/CONFIG_EDAC_MM_EDAC deleted file mode 100644 index 5f7fa223a..000000000 --- a/baseconfig/CONFIG_EDAC_MM_EDAC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_MM_EDAC=m diff --git a/baseconfig/CONFIG_EXPERIMENTAL b/baseconfig/CONFIG_EXPERIMENTAL deleted file mode 100644 index 8c91d40b9..000000000 --- a/baseconfig/CONFIG_EXPERIMENTAL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EXPERIMENTAL=y diff --git a/baseconfig/CONFIG_EXTCON b/baseconfig/CONFIG_EXTCON index efa6c7e6f..bde29bcfc 100644 --- a/baseconfig/CONFIG_EXTCON +++ b/baseconfig/CONFIG_EXTCON @@ -1 +1 @@ -# CONFIG_EXTCON is not set +CONFIG_EXTCON=y diff --git a/baseconfig/CONFIG_EXTCON_GPIO b/baseconfig/CONFIG_EXTCON_GPIO new file mode 100644 index 000000000..87ca2bd05 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_GPIO is not set diff --git a/baseconfig/CONFIG_EXTCON_MAX3355 b/baseconfig/CONFIG_EXTCON_MAX3355 new file mode 100644 index 000000000..680b5a774 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_MAX3355 @@ -0,0 +1 @@ +# CONFIG_EXTCON_MAX3355 is not set diff --git a/baseconfig/CONFIG_EXTCON_RT8973A b/baseconfig/CONFIG_EXTCON_RT8973A new file mode 100644 index 000000000..e5f7236c9 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_RT8973A @@ -0,0 +1 @@ +# CONFIG_EXTCON_RT8973A is not set diff --git a/baseconfig/CONFIG_EXTCON_SM5502 b/baseconfig/CONFIG_EXTCON_SM5502 new file mode 100644 index 000000000..916994aa9 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_SM5502 @@ -0,0 +1 @@ +# CONFIG_EXTCON_SM5502 is not set diff --git a/baseconfig/CONFIG_EXTCON_USB_GPIO b/baseconfig/CONFIG_EXTCON_USB_GPIO new file mode 100644 index 000000000..7a0c9af30 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_USB_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_USB_GPIO is not set diff --git a/baseconfig/CONFIG_FORTIFY_SOURCE b/baseconfig/CONFIG_FORTIFY_SOURCE new file mode 100644 index 000000000..926b56799 --- /dev/null +++ b/baseconfig/CONFIG_FORTIFY_SOURCE @@ -0,0 +1 @@ +CONFIG_FORTIFY_SOURCE=y diff --git a/baseconfig/CONFIG_FSI_MASTER_GPIO b/baseconfig/CONFIG_FSI_MASTER_GPIO new file mode 100644 index 000000000..065a1456e --- /dev/null +++ b/baseconfig/CONFIG_FSI_MASTER_GPIO @@ -0,0 +1 @@ +CONFIG_FSI_MASTER_GPIO=m diff --git a/baseconfig/CONFIG_FSI_MASTER_HUB b/baseconfig/CONFIG_FSI_MASTER_HUB new file mode 100644 index 000000000..5cfdc2e81 --- /dev/null +++ b/baseconfig/CONFIG_FSI_MASTER_HUB @@ -0,0 +1 @@ +CONFIG_FSI_MASTER_HUB=m diff --git a/baseconfig/CONFIG_FSI_SCOM b/baseconfig/CONFIG_FSI_SCOM new file mode 100644 index 000000000..3aee9f30b --- /dev/null +++ b/baseconfig/CONFIG_FSI_SCOM @@ -0,0 +1 @@ +CONFIG_FSI_SCOM=m diff --git a/baseconfig/CONFIG_GENERIC_IRQ_DEBUGFS b/baseconfig/CONFIG_GENERIC_IRQ_DEBUGFS new file mode 100644 index 000000000..539bb6640 --- /dev/null +++ b/baseconfig/CONFIG_GENERIC_IRQ_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_GENERIC_IRQ_DEBUGFS is not set diff --git a/baseconfig/CONFIG_GPIO_BD9571MWV b/baseconfig/CONFIG_GPIO_BD9571MWV new file mode 100644 index 000000000..0cdd67b34 --- /dev/null +++ b/baseconfig/CONFIG_GPIO_BD9571MWV @@ -0,0 +1 @@ +CONFIG_GPIO_BD9571MWV=m diff --git a/baseconfig/CONFIG_GPIO_FTGPIO010 b/baseconfig/CONFIG_GPIO_FTGPIO010 new file mode 100644 index 000000000..3a1fb41ea --- /dev/null +++ b/baseconfig/CONFIG_GPIO_FTGPIO010 @@ -0,0 +1 @@ +# CONFIG_GPIO_FTGPIO010 is not set diff --git a/baseconfig/CONFIG_GPIO_TPS68470 b/baseconfig/CONFIG_GPIO_TPS68470 new file mode 100644 index 000000000..3176e956e --- /dev/null +++ b/baseconfig/CONFIG_GPIO_TPS68470 @@ -0,0 +1 @@ +CONFIG_GPIO_TPS68470=y diff --git a/baseconfig/CONFIG_GPIO_XRA1403 b/baseconfig/CONFIG_GPIO_XRA1403 new file mode 100644 index 000000000..c9567433f --- /dev/null +++ b/baseconfig/CONFIG_GPIO_XRA1403 @@ -0,0 +1 @@ +# CONFIG_GPIO_XRA1403 is not set diff --git a/baseconfig/CONFIG_HD44780 b/baseconfig/CONFIG_HD44780 new file mode 100644 index 000000000..22e6cf3b3 --- /dev/null +++ b/baseconfig/CONFIG_HD44780 @@ -0,0 +1 @@ +CONFIG_HD44780=m diff --git a/baseconfig/CONFIG_HID_ACCUTOUCH b/baseconfig/CONFIG_HID_ACCUTOUCH new file mode 100644 index 000000000..7b8010de1 --- /dev/null +++ b/baseconfig/CONFIG_HID_ACCUTOUCH @@ -0,0 +1 @@ +CONFIG_HID_ACCUTOUCH=m diff --git a/baseconfig/CONFIG_HID_CP2112 b/baseconfig/CONFIG_HID_CP2112 index 3f9425d1d..d0f72fae1 100644 --- a/baseconfig/CONFIG_HID_CP2112 +++ b/baseconfig/CONFIG_HID_CP2112 @@ -1 +1 @@ -# CONFIG_HID_CP2112 is not set +CONFIG_HID_CP2112=m diff --git a/baseconfig/CONFIG_HID_ITE b/baseconfig/CONFIG_HID_ITE new file mode 100644 index 000000000..b4af4b45e --- /dev/null +++ b/baseconfig/CONFIG_HID_ITE @@ -0,0 +1 @@ +CONFIG_HID_ITE=m diff --git a/baseconfig/CONFIG_HID_NTI b/baseconfig/CONFIG_HID_NTI new file mode 100644 index 000000000..c239c7052 --- /dev/null +++ b/baseconfig/CONFIG_HID_NTI @@ -0,0 +1 @@ +CONFIG_HID_NTI=m diff --git a/baseconfig/CONFIG_HID_RETRODE b/baseconfig/CONFIG_HID_RETRODE new file mode 100644 index 000000000..9d8b33ccc --- /dev/null +++ b/baseconfig/CONFIG_HID_RETRODE @@ -0,0 +1 @@ +CONFIG_HID_RETRODE=m diff --git a/baseconfig/CONFIG_HID_SENSOR_HUMIDITY b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY new file mode 100644 index 000000000..d50f5014a --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_HUMIDITY=m diff --git a/baseconfig/CONFIG_HID_SENSOR_TEMP b/baseconfig/CONFIG_HID_SENSOR_TEMP new file mode 100644 index 000000000..6f1a98bc0 --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_TEMP @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_TEMP=m diff --git a/baseconfig/CONFIG_I2C_DESIGNWARE_SLAVE b/baseconfig/CONFIG_I2C_DESIGNWARE_SLAVE new file mode 100644 index 000000000..8c847f261 --- /dev/null +++ b/baseconfig/CONFIG_I2C_DESIGNWARE_SLAVE @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_SLAVE=y diff --git a/baseconfig/CONFIG_I2C_MUX_GPMUX b/baseconfig/CONFIG_I2C_MUX_GPMUX new file mode 100644 index 000000000..519b3e679 --- /dev/null +++ b/baseconfig/CONFIG_I2C_MUX_GPMUX @@ -0,0 +1 @@ +CONFIG_I2C_MUX_GPMUX=m diff --git a/baseconfig/CONFIG_I2C_MUX_LTC4306 b/baseconfig/CONFIG_I2C_MUX_LTC4306 new file mode 100644 index 000000000..f7c16456c --- /dev/null +++ b/baseconfig/CONFIG_I2C_MUX_LTC4306 @@ -0,0 +1 @@ +CONFIG_I2C_MUX_LTC4306=m diff --git a/baseconfig/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/CONFIG_I2C_PARPORT_LIGHT index 1dbc68883..e18239222 100644 --- a/baseconfig/CONFIG_I2C_PARPORT_LIGHT +++ b/baseconfig/CONFIG_I2C_PARPORT_LIGHT @@ -1 +1 @@ -CONFIG_I2C_PARPORT_LIGHT=m +# CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/baseconfig/CONFIG_IEEE802154_CA8210 b/baseconfig/CONFIG_IEEE802154_CA8210 new file mode 100644 index 000000000..d4a2158a3 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210 @@ -0,0 +1 @@ +CONFIG_IEEE802154_CA8210=m diff --git a/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS new file mode 100644 index 000000000..e919384b7 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_IEEE802154_CA8210_DEBUGFS is not set diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR b/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR deleted file mode 100644 index f3d54f70e..000000000 --- a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_IIO_CROS_EC_SENSORS_COR=m diff --git a/baseconfig/CONFIG_IIO_MUX b/baseconfig/CONFIG_IIO_MUX new file mode 100644 index 000000000..a139de267 --- /dev/null +++ b/baseconfig/CONFIG_IIO_MUX @@ -0,0 +1 @@ +CONFIG_IIO_MUX=m diff --git a/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS b/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS new file mode 100644 index 000000000..478415c11 --- /dev/null +++ b/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_EXP_USER_ACCESS is not set diff --git a/baseconfig/CONFIG_INFINIBAND_VMWARE_PVRDMA b/baseconfig/CONFIG_INFINIBAND_VMWARE_PVRDMA index 164f3b26c..0743f41a5 100644 --- a/baseconfig/CONFIG_INFINIBAND_VMWARE_PVRDMA +++ b/baseconfig/CONFIG_INFINIBAND_VMWARE_PVRDMA @@ -1 +1 @@ -CONFIG_INFINIBAND_VMWARE_PVRDMA=m +# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set diff --git a/baseconfig/CONFIG_INOTIFY b/baseconfig/CONFIG_INOTIFY deleted file mode 100644 index 78343a1d2..000000000 --- a/baseconfig/CONFIG_INOTIFY +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INOTIFY=y diff --git a/baseconfig/CONFIG_INPUT_MMA8450 b/baseconfig/CONFIG_INPUT_MMA8450 index 68519d153..105180917 100644 --- a/baseconfig/CONFIG_INPUT_MMA8450 +++ b/baseconfig/CONFIG_INPUT_MMA8450 @@ -1 +1 @@ -CONFIG_INPUT_MMA8450=m +# CONFIG_INPUT_MMA8450 is not set diff --git a/baseconfig/CONFIG_INPUT_MPU3050 b/baseconfig/CONFIG_INPUT_MPU3050 deleted file mode 100644 index 7c1afe068..000000000 --- a/baseconfig/CONFIG_INPUT_MPU3050 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INPUT_MPU3050=m diff --git a/baseconfig/CONFIG_INPUT_PWM_VIBRA b/baseconfig/CONFIG_INPUT_PWM_VIBRA new file mode 100644 index 000000000..39a51b490 --- /dev/null +++ b/baseconfig/CONFIG_INPUT_PWM_VIBRA @@ -0,0 +1 @@ +# CONFIG_INPUT_PWM_VIBRA is not set diff --git a/baseconfig/CONFIG_INPUT_RK805_PWRKEY b/baseconfig/CONFIG_INPUT_RK805_PWRKEY new file mode 100644 index 000000000..4ce96f558 --- /dev/null +++ b/baseconfig/CONFIG_INPUT_RK805_PWRKEY @@ -0,0 +1 @@ +CONFIG_INPUT_RK805_PWRKEY=m diff --git a/baseconfig/CONFIG_IOSCHED_BFQ b/baseconfig/CONFIG_IOSCHED_BFQ new file mode 100644 index 000000000..3023fb0b5 --- /dev/null +++ b/baseconfig/CONFIG_IOSCHED_BFQ @@ -0,0 +1 @@ +CONFIG_IOSCHED_BFQ=m diff --git a/baseconfig/CONFIG_IP_DCCP b/baseconfig/CONFIG_IP_DCCP index 26ba41376..6ecb43a3e 100644 --- a/baseconfig/CONFIG_IP_DCCP +++ b/baseconfig/CONFIG_IP_DCCP @@ -1 +1 @@ -CONFIG_IP_DCCP=m +# CONFIG_IP_DCCP is not set diff --git a/baseconfig/CONFIG_IR_GPIO_TX b/baseconfig/CONFIG_IR_GPIO_TX new file mode 100644 index 000000000..4b6b484bb --- /dev/null +++ b/baseconfig/CONFIG_IR_GPIO_TX @@ -0,0 +1 @@ +CONFIG_IR_GPIO_TX=m diff --git a/baseconfig/CONFIG_IR_PWM_TX b/baseconfig/CONFIG_IR_PWM_TX new file mode 100644 index 000000000..4dfd41870 --- /dev/null +++ b/baseconfig/CONFIG_IR_PWM_TX @@ -0,0 +1 @@ +CONFIG_IR_PWM_TX=m diff --git a/baseconfig/CONFIG_IR_SIR b/baseconfig/CONFIG_IR_SIR new file mode 100644 index 000000000..34ff7a809 --- /dev/null +++ b/baseconfig/CONFIG_IR_SIR @@ -0,0 +1 @@ +CONFIG_IR_SIR=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI new file mode 100644 index 000000000..d66d2b113 --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF new file mode 100644 index 000000000..c534b358b --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI_FF=y diff --git a/baseconfig/CONFIG_KEYBOARD_DLINK_DIR685 b/baseconfig/CONFIG_KEYBOARD_DLINK_DIR685 new file mode 100644 index 000000000..9f273ca53 --- /dev/null +++ b/baseconfig/CONFIG_KEYBOARD_DLINK_DIR685 @@ -0,0 +1 @@ +# CONFIG_KEYBOARD_DLINK_DIR685 is not set diff --git a/baseconfig/CONFIG_KEYBOARD_QT1070 b/baseconfig/CONFIG_KEYBOARD_QT1070 index 7deb75f9a..f9f0b0a84 100644 --- a/baseconfig/CONFIG_KEYBOARD_QT1070 +++ b/baseconfig/CONFIG_KEYBOARD_QT1070 @@ -1 +1 @@ -# CONFIG_KEYBOARD_QT1070 is not set +CONFIG_KEYBOARD_QT1070=m diff --git a/baseconfig/CONFIG_LEDS_AS3645A b/baseconfig/CONFIG_LEDS_AS3645A new file mode 100644 index 000000000..25d6f9f10 --- /dev/null +++ b/baseconfig/CONFIG_LEDS_AS3645A @@ -0,0 +1 @@ +CONFIG_LEDS_AS3645A=m diff --git a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS b/baseconfig/CONFIG_LEDS_DELL_NETBOOKS deleted file mode 100644 index 45f9aee48..000000000 --- a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_DELL_NETBOOKS=m diff --git a/baseconfig/CONFIG_LEDS_IS31FL32XX b/baseconfig/CONFIG_LEDS_IS31FL32XX index bc726f797..343dc4dd8 100644 --- a/baseconfig/CONFIG_LEDS_IS31FL32XX +++ b/baseconfig/CONFIG_LEDS_IS31FL32XX @@ -1 +1 @@ -# CONFIG_LEDS_IS31FL32XX is not set +CONFIG_LEDS_IS31FL32XX=m diff --git a/baseconfig/CONFIG_LIRC_SASEM b/baseconfig/CONFIG_LIRC_SASEM deleted file mode 100644 index 4bfc392e8..000000000 --- a/baseconfig/CONFIG_LIRC_SASEM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LIRC_SASEM=m diff --git a/baseconfig/CONFIG_LOAD_UEFI_KEYS b/baseconfig/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 000000000..de1de5c25 --- /dev/null +++ b/baseconfig/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +# CONFIG_LOAD_UEFI_KEYS is not set diff --git a/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT b/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT new file mode 100644 index 000000000..336528547 --- /dev/null +++ b/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT @@ -0,0 +1 @@ +# CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT is not set diff --git a/baseconfig/CONFIG_LTC2471 b/baseconfig/CONFIG_LTC2471 new file mode 100644 index 000000000..5d272ac29 --- /dev/null +++ b/baseconfig/CONFIG_LTC2471 @@ -0,0 +1 @@ +# CONFIG_LTC2471 is not set diff --git a/baseconfig/CONFIG_LTC2497 b/baseconfig/CONFIG_LTC2497 new file mode 100644 index 000000000..312f3db17 --- /dev/null +++ b/baseconfig/CONFIG_LTC2497 @@ -0,0 +1 @@ +# CONFIG_LTC2497 is not set diff --git a/baseconfig/CONFIG_LTC2632 b/baseconfig/CONFIG_LTC2632 new file mode 100644 index 000000000..8bc2b8bc4 --- /dev/null +++ b/baseconfig/CONFIG_LTC2632 @@ -0,0 +1 @@ +# CONFIG_LTC2632 is not set diff --git a/baseconfig/CONFIG_MACB_USE_HWSTAMP b/baseconfig/CONFIG_MACB_USE_HWSTAMP new file mode 100644 index 000000000..ab817484b --- /dev/null +++ b/baseconfig/CONFIG_MACB_USE_HWSTAMP @@ -0,0 +1 @@ +CONFIG_MACB_USE_HWSTAMP=y diff --git a/baseconfig/CONFIG_MARVELL_10G_PHY b/baseconfig/CONFIG_MARVELL_10G_PHY new file mode 100644 index 000000000..6dadd98ff --- /dev/null +++ b/baseconfig/CONFIG_MARVELL_10G_PHY @@ -0,0 +1 @@ +CONFIG_MARVELL_10G_PHY=m diff --git a/baseconfig/CONFIG_MAX1118 b/baseconfig/CONFIG_MAX1118 new file mode 100644 index 000000000..615bda2e2 --- /dev/null +++ b/baseconfig/CONFIG_MAX1118 @@ -0,0 +1 @@ +# CONFIG_MAX1118 is not set diff --git a/baseconfig/CONFIG_MAX1363 b/baseconfig/CONFIG_MAX1363 index d0090112c..08e944fb7 100644 --- a/baseconfig/CONFIG_MAX1363 +++ b/baseconfig/CONFIG_MAX1363 @@ -1 +1 @@ -# CONFIG_MAX1363 is not set +CONFIG_MAX1363=m diff --git a/baseconfig/CONFIG_MAX30102 b/baseconfig/CONFIG_MAX30102 new file mode 100644 index 000000000..5b4aacf3d --- /dev/null +++ b/baseconfig/CONFIG_MAX30102 @@ -0,0 +1 @@ +# CONFIG_MAX30102 is not set diff --git a/baseconfig/CONFIG_MAX9611 b/baseconfig/CONFIG_MAX9611 new file mode 100644 index 000000000..1cbc674e0 --- /dev/null +++ b/baseconfig/CONFIG_MAX9611 @@ -0,0 +1 @@ +# CONFIG_MAX9611 is not set diff --git a/baseconfig/CONFIG_MDIO_I2C b/baseconfig/CONFIG_MDIO_I2C new file mode 100644 index 000000000..df7d9e025 --- /dev/null +++ b/baseconfig/CONFIG_MDIO_I2C @@ -0,0 +1 @@ +CONFIG_MDIO_I2C=m diff --git a/baseconfig/CONFIG_MEDIA_CEC_RC b/baseconfig/CONFIG_MEDIA_CEC_RC new file mode 100644 index 000000000..1531c4b09 --- /dev/null +++ b/baseconfig/CONFIG_MEDIA_CEC_RC @@ -0,0 +1 @@ +CONFIG_MEDIA_CEC_RC=y diff --git a/baseconfig/CONFIG_MFD_BD9571MWV b/baseconfig/CONFIG_MFD_BD9571MWV new file mode 100644 index 000000000..28d27a0e5 --- /dev/null +++ b/baseconfig/CONFIG_MFD_BD9571MWV @@ -0,0 +1 @@ +CONFIG_MFD_BD9571MWV=m diff --git a/baseconfig/CONFIG_MFD_CPCAP b/baseconfig/CONFIG_MFD_CPCAP index acf5bd3fe..0f0408181 100644 --- a/baseconfig/CONFIG_MFD_CPCAP +++ b/baseconfig/CONFIG_MFD_CPCAP @@ -1 +1 @@ -CONFIG_MFD_CPCAP=m +# CONFIG_MFD_CPCAP is not set diff --git a/baseconfig/CONFIG_MFD_EXYNOS_LPASS b/baseconfig/CONFIG_MFD_EXYNOS_LPASS deleted file mode 100644 index d733b0518..000000000 --- a/baseconfig/CONFIG_MFD_EXYNOS_LPASS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_EXYNOS_LPASS is not set diff --git a/baseconfig/CONFIG_MFD_TI_LMU b/baseconfig/CONFIG_MFD_TI_LMU new file mode 100644 index 000000000..4a84e3fd0 --- /dev/null +++ b/baseconfig/CONFIG_MFD_TI_LMU @@ -0,0 +1 @@ +# CONFIG_MFD_TI_LMU is not set diff --git a/baseconfig/CONFIG_MFD_TI_LP87565 b/baseconfig/CONFIG_MFD_TI_LP87565 new file mode 100644 index 000000000..112b4154b --- /dev/null +++ b/baseconfig/CONFIG_MFD_TI_LP87565 @@ -0,0 +1 @@ +# CONFIG_MFD_TI_LP87565 is not set diff --git a/baseconfig/CONFIG_MFD_TPS68470 b/baseconfig/CONFIG_MFD_TPS68470 new file mode 100644 index 000000000..10fd40465 --- /dev/null +++ b/baseconfig/CONFIG_MFD_TPS68470 @@ -0,0 +1 @@ +CONFIG_MFD_TPS68470=y diff --git a/baseconfig/CONFIG_MICROCHIP_KSZ b/baseconfig/CONFIG_MICROCHIP_KSZ new file mode 100644 index 000000000..83147cf6f --- /dev/null +++ b/baseconfig/CONFIG_MICROCHIP_KSZ @@ -0,0 +1 @@ +CONFIG_MICROCHIP_KSZ=m diff --git a/baseconfig/CONFIG_MICROCHIP_KSZ_SPI_DRIVER b/baseconfig/CONFIG_MICROCHIP_KSZ_SPI_DRIVER new file mode 100644 index 000000000..f5a713178 --- /dev/null +++ b/baseconfig/CONFIG_MICROCHIP_KSZ_SPI_DRIVER @@ -0,0 +1 @@ +CONFIG_MICROCHIP_KSZ_SPI_DRIVER=m diff --git a/baseconfig/CONFIG_MLX5_CORE_IPOIB b/baseconfig/CONFIG_MLX5_CORE_IPOIB new file mode 100644 index 000000000..d78d82d65 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_CORE_IPOIB @@ -0,0 +1 @@ +CONFIG_MLX5_CORE_IPOIB=y diff --git a/baseconfig/CONFIG_MLX5_EN_IPSEC b/baseconfig/CONFIG_MLX5_EN_IPSEC new file mode 100644 index 000000000..ba2658e5a --- /dev/null +++ b/baseconfig/CONFIG_MLX5_EN_IPSEC @@ -0,0 +1 @@ +# CONFIG_MLX5_EN_IPSEC is not set diff --git a/baseconfig/CONFIG_MLX5_ESWITCH b/baseconfig/CONFIG_MLX5_ESWITCH new file mode 100644 index 000000000..8a69e0671 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_ESWITCH @@ -0,0 +1 @@ +CONFIG_MLX5_ESWITCH=y diff --git a/baseconfig/CONFIG_MLX5_FPGA b/baseconfig/CONFIG_MLX5_FPGA new file mode 100644 index 000000000..544f7b4f6 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_FPGA @@ -0,0 +1 @@ +# CONFIG_MLX5_FPGA is not set diff --git a/baseconfig/CONFIG_MLX5_MPFS b/baseconfig/CONFIG_MLX5_MPFS new file mode 100644 index 000000000..6799ed484 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_MPFS @@ -0,0 +1 @@ +CONFIG_MLX5_MPFS=y diff --git a/baseconfig/CONFIG_MLXFW b/baseconfig/CONFIG_MLXFW new file mode 100644 index 000000000..5b4751806 --- /dev/null +++ b/baseconfig/CONFIG_MLXFW @@ -0,0 +1 @@ +CONFIG_MLXFW=m diff --git a/baseconfig/CONFIG_MMC_BLOCK_BOUNCE b/baseconfig/CONFIG_MMC_BLOCK_BOUNCE deleted file mode 100644 index 4470e8359..000000000 --- a/baseconfig/CONFIG_MMC_BLOCK_BOUNCE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MMC_BLOCK_BOUNCE=y diff --git a/baseconfig/CONFIG_MMC_SDHCI_OF b/baseconfig/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/baseconfig/CONFIG_MMC_SDHCI_XENON b/baseconfig/CONFIG_MMC_SDHCI_XENON new file mode 100644 index 000000000..7ced7b045 --- /dev/null +++ b/baseconfig/CONFIG_MMC_SDHCI_XENON @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_XENON=m diff --git a/baseconfig/CONFIG_MODULE_SIG_UEFI b/baseconfig/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index e4fb898f7..000000000 --- a/baseconfig/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MODULE_SIG_UEFI is not set diff --git a/baseconfig/CONFIG_MPU3050_I2C b/baseconfig/CONFIG_MPU3050_I2C index 92e6cbf51..2e9c7cc45 100644 --- a/baseconfig/CONFIG_MPU3050_I2C +++ b/baseconfig/CONFIG_MPU3050_I2C @@ -1 +1 @@ -# CONFIG_MPU3050_I2C is not set +CONFIG_MPU3050_I2C=m diff --git a/baseconfig/CONFIG_MQ_IOSCHED_KYBER b/baseconfig/CONFIG_MQ_IOSCHED_KYBER new file mode 100644 index 000000000..939264da2 --- /dev/null +++ b/baseconfig/CONFIG_MQ_IOSCHED_KYBER @@ -0,0 +1 @@ +CONFIG_MQ_IOSCHED_KYBER=m diff --git a/baseconfig/CONFIG_MTD_MCHP23K256 b/baseconfig/CONFIG_MTD_MCHP23K256 new file mode 100644 index 000000000..ed6627e35 --- /dev/null +++ b/baseconfig/CONFIG_MTD_MCHP23K256 @@ -0,0 +1 @@ +# CONFIG_MTD_MCHP23K256 is not set diff --git a/baseconfig/CONFIG_MULTIPLEXER b/baseconfig/CONFIG_MULTIPLEXER new file mode 100644 index 000000000..fac2813b4 --- /dev/null +++ b/baseconfig/CONFIG_MULTIPLEXER @@ -0,0 +1 @@ +CONFIG_MULTIPLEXER=m diff --git a/baseconfig/CONFIG_MUX_ADG792A b/baseconfig/CONFIG_MUX_ADG792A new file mode 100644 index 000000000..fd85e4965 --- /dev/null +++ b/baseconfig/CONFIG_MUX_ADG792A @@ -0,0 +1 @@ +CONFIG_MUX_ADG792A=m diff --git a/baseconfig/CONFIG_MUX_GPIO b/baseconfig/CONFIG_MUX_GPIO new file mode 100644 index 000000000..e5a7a8282 --- /dev/null +++ b/baseconfig/CONFIG_MUX_GPIO @@ -0,0 +1 @@ +CONFIG_MUX_GPIO=m diff --git a/baseconfig/CONFIG_MUX_MMIO b/baseconfig/CONFIG_MUX_MMIO new file mode 100644 index 000000000..2d0328a73 --- /dev/null +++ b/baseconfig/CONFIG_MUX_MMIO @@ -0,0 +1 @@ +CONFIG_MUX_MMIO=m diff --git a/baseconfig/CONFIG_NET_9P_XEN b/baseconfig/CONFIG_NET_9P_XEN new file mode 100644 index 000000000..d2565ede3 --- /dev/null +++ b/baseconfig/CONFIG_NET_9P_XEN @@ -0,0 +1 @@ +CONFIG_NET_9P_XEN=m diff --git a/baseconfig/CONFIG_NET_DSA_LOOP b/baseconfig/CONFIG_NET_DSA_LOOP new file mode 100644 index 000000000..08b25de7c --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_LOOP @@ -0,0 +1 @@ +CONFIG_NET_DSA_LOOP=m diff --git a/baseconfig/CONFIG_NET_DSA_MT7530 b/baseconfig/CONFIG_NET_DSA_MT7530 new file mode 100644 index 000000000..722095c89 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_MT7530 @@ -0,0 +1 @@ +CONFIG_NET_DSA_MT7530=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C new file mode 100644 index 000000000..7c738fff2 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_I2C=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO new file mode 100644 index 000000000..d7f1987e2 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_MDIO=m diff --git a/baseconfig/CONFIG_NET_NSH b/baseconfig/CONFIG_NET_NSH new file mode 100644 index 000000000..2a9a24e04 --- /dev/null +++ b/baseconfig/CONFIG_NET_NSH @@ -0,0 +1 @@ +CONFIG_NET_NSH=m diff --git a/baseconfig/CONFIG_NET_SCH_DEFAULT b/baseconfig/CONFIG_NET_SCH_DEFAULT new file mode 100644 index 000000000..a4c53d281 --- /dev/null +++ b/baseconfig/CONFIG_NET_SCH_DEFAULT @@ -0,0 +1 @@ +# CONFIG_NET_SCH_DEFAULT is not set diff --git a/baseconfig/CONFIG_NET_VENDOR_AQUANTIA b/baseconfig/CONFIG_NET_VENDOR_AQUANTIA index 91af5c7e0..f8ae0ca05 100644 --- a/baseconfig/CONFIG_NET_VENDOR_AQUANTIA +++ b/baseconfig/CONFIG_NET_VENDOR_AQUANTIA @@ -1 +1 @@ -# CONFIG_NET_VENDOR_AQUANTIA is not set +CONFIG_NET_VENDOR_AQUANTIA=y diff --git a/baseconfig/CONFIG_NET_VENDOR_HUAWEI b/baseconfig/CONFIG_NET_VENDOR_HUAWEI new file mode 100644 index 000000000..ae01b9160 --- /dev/null +++ b/baseconfig/CONFIG_NET_VENDOR_HUAWEI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_HUAWEI is not set diff --git a/baseconfig/CONFIG_NET_VENDOR_SNI b/baseconfig/CONFIG_NET_VENDOR_SNI new file mode 100644 index 000000000..4f301f9ba --- /dev/null +++ b/baseconfig/CONFIG_NET_VENDOR_SNI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SNI is not set diff --git a/baseconfig/CONFIG_NFP_APP_FLOWER b/baseconfig/CONFIG_NFP_APP_FLOWER new file mode 100644 index 000000000..d9ff8a178 --- /dev/null +++ b/baseconfig/CONFIG_NFP_APP_FLOWER @@ -0,0 +1 @@ +CONFIG_NFP_APP_FLOWER=y diff --git a/baseconfig/CONFIG_NFT_FIB_NETDEV b/baseconfig/CONFIG_NFT_FIB_NETDEV new file mode 100644 index 000000000..273bfeb6a --- /dev/null +++ b/baseconfig/CONFIG_NFT_FIB_NETDEV @@ -0,0 +1 @@ +CONFIG_NFT_FIB_NETDEV=m diff --git a/baseconfig/powerpc/CONFIG_NR_DEV_DAX b/baseconfig/CONFIG_NR_DEV_DAX similarity index 100% rename from baseconfig/powerpc/CONFIG_NR_DEV_DAX rename to baseconfig/CONFIG_NR_DEV_DAX diff --git a/baseconfig/CONFIG_NTB_IDT b/baseconfig/CONFIG_NTB_IDT new file mode 100644 index 000000000..0e9236c2a --- /dev/null +++ b/baseconfig/CONFIG_NTB_IDT @@ -0,0 +1 @@ +CONFIG_NTB_IDT=m diff --git a/baseconfig/CONFIG_OVERLAY_FS_INDEX b/baseconfig/CONFIG_OVERLAY_FS_INDEX new file mode 100644 index 000000000..48a283270 --- /dev/null +++ b/baseconfig/CONFIG_OVERLAY_FS_INDEX @@ -0,0 +1 @@ +# CONFIG_OVERLAY_FS_INDEX is not set diff --git a/baseconfig/CONFIG_PARPORT b/baseconfig/CONFIG_PARPORT index 589156958..9dd8f33af 100644 --- a/baseconfig/CONFIG_PARPORT +++ b/baseconfig/CONFIG_PARPORT @@ -1 +1 @@ -CONFIG_PARPORT=m +# CONFIG_PARPORT is not set diff --git a/baseconfig/CONFIG_PARPORT_PC b/baseconfig/CONFIG_PARPORT_PC index b9aa6e8ca..e2a0d3656 100644 --- a/baseconfig/CONFIG_PARPORT_PC +++ b/baseconfig/CONFIG_PARPORT_PC @@ -1 +1 @@ -CONFIG_PARPORT_PC=m +# CONFIG_PARPORT_PC is not set diff --git a/baseconfig/CONFIG_PCIE_DW_HOST_ECAM b/baseconfig/CONFIG_PCIE_DW_HOST_ECAM new file mode 100644 index 000000000..c73d5c1aa --- /dev/null +++ b/baseconfig/CONFIG_PCIE_DW_HOST_ECAM @@ -0,0 +1 @@ +# CONFIG_PCIE_DW_HOST_ECAM is not set diff --git a/baseconfig/CONFIG_PCI_ENDPOINT b/baseconfig/CONFIG_PCI_ENDPOINT new file mode 100644 index 000000000..d90e2a4f7 --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT is not set diff --git a/baseconfig/CONFIG_PCI_ENDPOINT_TEST b/baseconfig/CONFIG_PCI_ENDPOINT_TEST new file mode 100644 index 000000000..ac8854da9 --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT_TEST @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT_TEST is not set diff --git a/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..90bf4c7ca --- /dev/null +++ b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +CONFIG_PCI_MSI_IRQ_DOMAIN=y diff --git a/baseconfig/CONFIG_PCI_SW_SWITCHTEC b/baseconfig/CONFIG_PCI_SW_SWITCHTEC new file mode 100644 index 000000000..f197a5ed6 --- /dev/null +++ b/baseconfig/CONFIG_PCI_SW_SWITCHTEC @@ -0,0 +1 @@ +CONFIG_PCI_SW_SWITCHTEC=m diff --git a/baseconfig/CONFIG_PERCPU_STATS b/baseconfig/CONFIG_PERCPU_STATS new file mode 100644 index 000000000..873749756 --- /dev/null +++ b/baseconfig/CONFIG_PERCPU_STATS @@ -0,0 +1 @@ +# CONFIG_PERCPU_STATS is not set diff --git a/baseconfig/CONFIG_PHYLINK b/baseconfig/CONFIG_PHYLINK new file mode 100644 index 000000000..cc1e23e0b --- /dev/null +++ b/baseconfig/CONFIG_PHYLINK @@ -0,0 +1 @@ +CONFIG_PHYLINK=m diff --git a/baseconfig/CONFIG_PHY_CPCAP_USB b/baseconfig/CONFIG_PHY_CPCAP_USB new file mode 100644 index 000000000..c68874d74 --- /dev/null +++ b/baseconfig/CONFIG_PHY_CPCAP_USB @@ -0,0 +1 @@ +# CONFIG_PHY_CPCAP_USB is not set diff --git a/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY b/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY new file mode 100644 index 000000000..8c104689f --- /dev/null +++ b/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY @@ -0,0 +1 @@ +# CONFIG_PHY_MVEBU_CP110_COMPHY is not set diff --git a/baseconfig/CONFIG_PI433 b/baseconfig/CONFIG_PI433 new file mode 100644 index 000000000..b275e1e6a --- /dev/null +++ b/baseconfig/CONFIG_PI433 @@ -0,0 +1 @@ +# CONFIG_PI433 is not set diff --git a/baseconfig/CONFIG_PINCTRL_CANNONLAKE b/baseconfig/CONFIG_PINCTRL_CANNONLAKE new file mode 100644 index 000000000..4a9b7754f --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_CANNONLAKE @@ -0,0 +1 @@ +# CONFIG_PINCTRL_CANNONLAKE is not set diff --git a/baseconfig/CONFIG_PINCTRL_IPQ8074 b/baseconfig/CONFIG_PINCTRL_IPQ8074 new file mode 100644 index 000000000..3cb74ba4b --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_IPQ8074 @@ -0,0 +1 @@ +# CONFIG_PINCTRL_IPQ8074 is not set diff --git a/baseconfig/CONFIG_PINCTRL_MCP23S08 b/baseconfig/CONFIG_PINCTRL_MCP23S08 new file mode 100644 index 000000000..948eb6057 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_MCP23S08 @@ -0,0 +1 @@ +# CONFIG_PINCTRL_MCP23S08 is not set diff --git a/baseconfig/CONFIG_PINCTRL_MSM8994 b/baseconfig/CONFIG_PINCTRL_MSM8994 deleted file mode 100644 index 5dd58e746..000000000 --- a/baseconfig/CONFIG_PINCTRL_MSM8994 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PINCTRL_MSM8994=m diff --git a/baseconfig/CONFIG_PINCTRL_RK805 b/baseconfig/CONFIG_PINCTRL_RK805 new file mode 100644 index 000000000..47b4fd855 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_RK805 @@ -0,0 +1 @@ +CONFIG_PINCTRL_RK805=m diff --git a/baseconfig/CONFIG_PINCTRL_SPRD b/baseconfig/CONFIG_PINCTRL_SPRD new file mode 100644 index 000000000..cffa73544 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_SPRD @@ -0,0 +1 @@ +# CONFIG_PINCTRL_SPRD is not set diff --git a/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 b/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 new file mode 100644 index 000000000..f9b405f96 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 @@ -0,0 +1 @@ +# CONFIG_PINCTRL_SPRD_SC9860 is not set diff --git a/baseconfig/CONFIG_PINCTRL_TI_IODELAY b/baseconfig/CONFIG_PINCTRL_TI_IODELAY deleted file mode 100644 index cc5eb6a6c..000000000 --- a/baseconfig/CONFIG_PINCTRL_TI_IODELAY +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_TI_IODELAY is not set diff --git a/baseconfig/CONFIG_PM_OPP b/baseconfig/CONFIG_PM_OPP index a77bd27f8..bbe2b56ba 100644 --- a/baseconfig/CONFIG_PM_OPP +++ b/baseconfig/CONFIG_PM_OPP @@ -1 +1 @@ -# CONFIG_PM_OPP is not set +CONFIG_PM_OPP=y diff --git a/baseconfig/CONFIG_POWER_RESET_BRCMSTB b/baseconfig/CONFIG_POWER_RESET_BRCMSTB new file mode 100644 index 000000000..35f35e595 --- /dev/null +++ b/baseconfig/CONFIG_POWER_RESET_BRCMSTB @@ -0,0 +1 @@ +# CONFIG_POWER_RESET_BRCMSTB is not set diff --git a/baseconfig/CONFIG_PWRSEQ_SD8787 b/baseconfig/CONFIG_PWRSEQ_SD8787 index 243dba034..820984327 100644 --- a/baseconfig/CONFIG_PWRSEQ_SD8787 +++ b/baseconfig/CONFIG_PWRSEQ_SD8787 @@ -1 +1 @@ -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m diff --git a/baseconfig/CONFIG_QCA7000_SPI b/baseconfig/CONFIG_QCA7000_SPI new file mode 100644 index 000000000..9e9088849 --- /dev/null +++ b/baseconfig/CONFIG_QCA7000_SPI @@ -0,0 +1 @@ +# CONFIG_QCA7000_SPI is not set diff --git a/baseconfig/CONFIG_QCA7000_UART b/baseconfig/CONFIG_QCA7000_UART new file mode 100644 index 000000000..fc691586b --- /dev/null +++ b/baseconfig/CONFIG_QCA7000_UART @@ -0,0 +1 @@ +# CONFIG_QCA7000_UART is not set diff --git a/baseconfig/CONFIG_QCOM_GLINK_SSR b/baseconfig/CONFIG_QCOM_GLINK_SSR new file mode 100644 index 000000000..1c67b32f7 --- /dev/null +++ b/baseconfig/CONFIG_QCOM_GLINK_SSR @@ -0,0 +1 @@ +# CONFIG_QCOM_GLINK_SSR is not set diff --git a/baseconfig/CONFIG_QTNFMAC_PEARL_PCIE b/baseconfig/CONFIG_QTNFMAC_PEARL_PCIE new file mode 100644 index 000000000..f67981f77 --- /dev/null +++ b/baseconfig/CONFIG_QTNFMAC_PEARL_PCIE @@ -0,0 +1 @@ +CONFIG_QTNFMAC_PEARL_PCIE=m diff --git a/baseconfig/CONFIG_R8822BE b/baseconfig/CONFIG_R8822BE new file mode 100644 index 000000000..2f7c08787 --- /dev/null +++ b/baseconfig/CONFIG_R8822BE @@ -0,0 +1 @@ +CONFIG_R8822BE=m diff --git a/baseconfig/CONFIG_RAS_CEC b/baseconfig/CONFIG_RAS_CEC new file mode 100644 index 000000000..7b0901ca1 --- /dev/null +++ b/baseconfig/CONFIG_RAS_CEC @@ -0,0 +1 @@ +CONFIG_RAS_CEC=y diff --git a/baseconfig/CONFIG_REFCOUNT_FULL b/baseconfig/CONFIG_REFCOUNT_FULL new file mode 100644 index 000000000..0789ed3be --- /dev/null +++ b/baseconfig/CONFIG_REFCOUNT_FULL @@ -0,0 +1 @@ +# CONFIG_REFCOUNT_FULL is not set diff --git a/baseconfig/CONFIG_REGULATOR_BD9571MWV b/baseconfig/CONFIG_REGULATOR_BD9571MWV new file mode 100644 index 000000000..3b0acb786 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_BD9571MWV @@ -0,0 +1 @@ +CONFIG_REGULATOR_BD9571MWV=m diff --git a/baseconfig/CONFIG_REGULATOR_CPCAP b/baseconfig/CONFIG_REGULATOR_CPCAP deleted file mode 100644 index 02e701e66..000000000 --- a/baseconfig/CONFIG_REGULATOR_CPCAP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_CPCAP=m diff --git a/baseconfig/CONFIG_REGULATOR_TPS65132 b/baseconfig/CONFIG_REGULATOR_TPS65132 new file mode 100644 index 000000000..b82a99f6c --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_TPS65132 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_TPS65132 is not set diff --git a/baseconfig/CONFIG_REGULATOR_VCTRL b/baseconfig/CONFIG_REGULATOR_VCTRL new file mode 100644 index 000000000..478bc6400 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_VCTRL @@ -0,0 +1 @@ +CONFIG_REGULATOR_VCTRL=m diff --git a/baseconfig/CONFIG_RESET_ATTACK_MITIGATION b/baseconfig/CONFIG_RESET_ATTACK_MITIGATION new file mode 100644 index 000000000..eea15dd52 --- /dev/null +++ b/baseconfig/CONFIG_RESET_ATTACK_MITIGATION @@ -0,0 +1 @@ +# CONFIG_RESET_ATTACK_MITIGATION is not set diff --git a/baseconfig/CONFIG_RESET_HSDK_V1 b/baseconfig/CONFIG_RESET_HSDK_V1 new file mode 100644 index 000000000..4c2b97d79 --- /dev/null +++ b/baseconfig/CONFIG_RESET_HSDK_V1 @@ -0,0 +1 @@ +# CONFIG_RESET_HSDK_V1 is not set diff --git a/baseconfig/CONFIG_RESET_TI_SYSCON b/baseconfig/CONFIG_RESET_TI_SYSCON new file mode 100644 index 000000000..1e76bd135 --- /dev/null +++ b/baseconfig/CONFIG_RESET_TI_SYSCON @@ -0,0 +1 @@ +# CONFIG_RESET_TI_SYSCON is not set diff --git a/baseconfig/CONFIG_RMNET b/baseconfig/CONFIG_RMNET new file mode 100644 index 000000000..5e8c115b5 --- /dev/null +++ b/baseconfig/CONFIG_RMNET @@ -0,0 +1 @@ +# CONFIG_RMNET is not set diff --git a/baseconfig/CONFIG_ROCKCHIP_PHY b/baseconfig/CONFIG_ROCKCHIP_PHY new file mode 100644 index 000000000..4ca60873a --- /dev/null +++ b/baseconfig/CONFIG_ROCKCHIP_PHY @@ -0,0 +1 @@ +# CONFIG_ROCKCHIP_PHY is not set diff --git a/baseconfig/CONFIG_RPMSG_CHAR b/baseconfig/CONFIG_RPMSG_CHAR new file mode 100644 index 000000000..3aa998906 --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_CHAR @@ -0,0 +1 @@ +# CONFIG_RPMSG_CHAR is not set diff --git a/baseconfig/CONFIG_RPMSG_QCOM_GLINK_RPM b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_RPM new file mode 100644 index 000000000..df2fa18d0 --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_RPM @@ -0,0 +1 @@ +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set diff --git a/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM new file mode 100644 index 000000000..c2c0a0c78 --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM @@ -0,0 +1 @@ +# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set diff --git a/baseconfig/CONFIG_RTC_DRV_DS3232_HWMON b/baseconfig/CONFIG_RTC_DRV_DS3232_HWMON new file mode 100644 index 000000000..88600a2ce --- /dev/null +++ b/baseconfig/CONFIG_RTC_DRV_DS3232_HWMON @@ -0,0 +1 @@ +# CONFIG_RTC_DRV_DS3232_HWMON is not set diff --git a/baseconfig/CONFIG_RTC_DRV_FTRTC010 b/baseconfig/CONFIG_RTC_DRV_FTRTC010 new file mode 100644 index 000000000..bbb608e4f --- /dev/null +++ b/baseconfig/CONFIG_RTC_DRV_FTRTC010 @@ -0,0 +1 @@ +# CONFIG_RTC_DRV_FTRTC010 is not set diff --git a/baseconfig/CONFIG_RTC_NVMEM b/baseconfig/CONFIG_RTC_NVMEM new file mode 100644 index 000000000..5abe8e336 --- /dev/null +++ b/baseconfig/CONFIG_RTC_NVMEM @@ -0,0 +1 @@ +# CONFIG_RTC_NVMEM is not set diff --git a/baseconfig/CONFIG_RTL8723BS b/baseconfig/CONFIG_RTL8723BS new file mode 100644 index 000000000..4837f05c7 --- /dev/null +++ b/baseconfig/CONFIG_RTL8723BS @@ -0,0 +1 @@ +CONFIG_RTL8723BS=m diff --git a/baseconfig/CONFIG_SECURITY_INFINIBAND b/baseconfig/CONFIG_SECURITY_INFINIBAND new file mode 100644 index 000000000..393c3f5f8 --- /dev/null +++ b/baseconfig/CONFIG_SECURITY_INFINIBAND @@ -0,0 +1 @@ +CONFIG_SECURITY_INFINIBAND=y diff --git a/baseconfig/CONFIG_SENSORS_ADS1015 b/baseconfig/CONFIG_SENSORS_ADS1015 index 4fc01f323..928b4f25f 100644 --- a/baseconfig/CONFIG_SENSORS_ADS1015 +++ b/baseconfig/CONFIG_SENSORS_ADS1015 @@ -1 +1 @@ -CONFIG_SENSORS_ADS1015=m +# CONFIG_SENSORS_ADS1015 is not set diff --git a/baseconfig/CONFIG_SENSORS_ASPEED b/baseconfig/CONFIG_SENSORS_ASPEED new file mode 100644 index 000000000..7808f12a0 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_ASPEED @@ -0,0 +1 @@ +CONFIG_SENSORS_ASPEED=m diff --git a/baseconfig/CONFIG_SENSORS_IBM_CFFPS b/baseconfig/CONFIG_SENSORS_IBM_CFFPS new file mode 100644 index 000000000..a217d973e --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_IBM_CFFPS @@ -0,0 +1 @@ +# CONFIG_SENSORS_IBM_CFFPS is not set diff --git a/baseconfig/CONFIG_SENSORS_IR35221 b/baseconfig/CONFIG_SENSORS_IR35221 new file mode 100644 index 000000000..788fcfa05 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_IR35221 @@ -0,0 +1 @@ +# CONFIG_SENSORS_IR35221 is not set diff --git a/baseconfig/CONFIG_SENSORS_TPS53679 b/baseconfig/CONFIG_SENSORS_TPS53679 new file mode 100644 index 000000000..461a703df --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_TPS53679 @@ -0,0 +1 @@ +CONFIG_SENSORS_TPS53679=m diff --git a/baseconfig/CONFIG_SERIAL_8250_ASPEED_VUART b/baseconfig/CONFIG_SERIAL_8250_ASPEED_VUART new file mode 100644 index 000000000..bbab9a646 --- /dev/null +++ b/baseconfig/CONFIG_SERIAL_8250_ASPEED_VUART @@ -0,0 +1 @@ +# CONFIG_SERIAL_8250_ASPEED_VUART is not set diff --git a/baseconfig/CONFIG_SERIAL_8250_PCI b/baseconfig/CONFIG_SERIAL_8250_PCI index d48086e3e..c0ac5637f 100644 --- a/baseconfig/CONFIG_SERIAL_8250_PCI +++ b/baseconfig/CONFIG_SERIAL_8250_PCI @@ -1 +1 @@ -CONFIG_SERIAL_8250_PCI=m +CONFIG_SERIAL_8250_PCI=y diff --git a/baseconfig/CONFIG_SERIO_GPIO_PS2 b/baseconfig/CONFIG_SERIO_GPIO_PS2 new file mode 100644 index 000000000..22c1adbfb --- /dev/null +++ b/baseconfig/CONFIG_SERIO_GPIO_PS2 @@ -0,0 +1 @@ +# CONFIG_SERIO_GPIO_PS2 is not set diff --git a/baseconfig/CONFIG_SFP b/baseconfig/CONFIG_SFP new file mode 100644 index 000000000..db57db12e --- /dev/null +++ b/baseconfig/CONFIG_SFP @@ -0,0 +1 @@ +CONFIG_SFP=m diff --git a/baseconfig/CONFIG_SIMPLE_PM_BUS b/baseconfig/CONFIG_SIMPLE_PM_BUS new file mode 100644 index 000000000..a0712c1c4 --- /dev/null +++ b/baseconfig/CONFIG_SIMPLE_PM_BUS @@ -0,0 +1 @@ +# CONFIG_SIMPLE_PM_BUS is not set diff --git a/baseconfig/CONFIG_SLAB_FREELIST_HARDENED b/baseconfig/CONFIG_SLAB_FREELIST_HARDENED new file mode 100644 index 000000000..52602d279 --- /dev/null +++ b/baseconfig/CONFIG_SLAB_FREELIST_HARDENED @@ -0,0 +1 @@ +CONFIG_SLAB_FREELIST_HARDENED=y diff --git a/baseconfig/CONFIG_SLAB_MERGE_DEFAULT b/baseconfig/CONFIG_SLAB_MERGE_DEFAULT new file mode 100644 index 000000000..c092cff73 --- /dev/null +++ b/baseconfig/CONFIG_SLAB_MERGE_DEFAULT @@ -0,0 +1 @@ +CONFIG_SLAB_MERGE_DEFAULT=y diff --git a/baseconfig/CONFIG_SND_AUDIO_GRAPH_CARD b/baseconfig/CONFIG_SND_AUDIO_GRAPH_CARD new file mode 100644 index 000000000..1a2c935d7 --- /dev/null +++ b/baseconfig/CONFIG_SND_AUDIO_GRAPH_CARD @@ -0,0 +1 @@ +# CONFIG_SND_AUDIO_GRAPH_CARD is not set diff --git a/baseconfig/CONFIG_SND_AUDIO_GRAPH_SCU_CARD b/baseconfig/CONFIG_SND_AUDIO_GRAPH_SCU_CARD new file mode 100644 index 000000000..12d870d77 --- /dev/null +++ b/baseconfig/CONFIG_SND_AUDIO_GRAPH_SCU_CARD @@ -0,0 +1 @@ +# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set diff --git a/baseconfig/CONFIG_SND_BCD2000 b/baseconfig/CONFIG_SND_BCD2000 index 0a60c490b..b56c9162f 100644 --- a/baseconfig/CONFIG_SND_BCD2000 +++ b/baseconfig/CONFIG_SND_BCD2000 @@ -1 +1 @@ -# CONFIG_SND_BCD2000 is not set +CONFIG_SND_BCD2000=m diff --git a/baseconfig/CONFIG_SND_DESIGNWARE_PCM b/baseconfig/CONFIG_SND_DESIGNWARE_PCM index 4fb3ac59e..8f93f9dce 100644 --- a/baseconfig/CONFIG_SND_DESIGNWARE_PCM +++ b/baseconfig/CONFIG_SND_DESIGNWARE_PCM @@ -1 +1 @@ -CONFIG_SND_DESIGNWARE_PCM=m +CONFIG_SND_DESIGNWARE_PCM=y diff --git a/baseconfig/CONFIG_SND_FIREFACE b/baseconfig/CONFIG_SND_FIREFACE new file mode 100644 index 000000000..18782f689 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREFACE @@ -0,0 +1 @@ +CONFIG_SND_FIREFACE=m diff --git a/baseconfig/CONFIG_SND_FIREWIRE_MOTU b/baseconfig/CONFIG_SND_FIREWIRE_MOTU new file mode 100644 index 000000000..73299e869 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREWIRE_MOTU @@ -0,0 +1 @@ +CONFIG_SND_FIREWIRE_MOTU=m diff --git a/baseconfig/CONFIG_SND_I2S_HI6210_I2S b/baseconfig/CONFIG_SND_I2S_HI6210_I2S new file mode 100644 index 000000000..9ae15dc8a --- /dev/null +++ b/baseconfig/CONFIG_SND_I2S_HI6210_I2S @@ -0,0 +1 @@ +CONFIG_SND_I2S_HI6210_I2S=m diff --git a/baseconfig/CONFIG_SND_INTEL8X0 b/baseconfig/CONFIG_SND_INTEL8X0 index 6d78f08ea..d97191a98 100644 --- a/baseconfig/CONFIG_SND_INTEL8X0 +++ b/baseconfig/CONFIG_SND_INTEL8X0 @@ -1 +1 @@ -CONFIG_SND_INTEL8X0=m +# CONFIG_SND_INTEL8X0 is not set diff --git a/baseconfig/CONFIG_SND_INTEL8X0M b/baseconfig/CONFIG_SND_INTEL8X0M index 24ac6ada4..4e04bb51c 100644 --- a/baseconfig/CONFIG_SND_INTEL8X0M +++ b/baseconfig/CONFIG_SND_INTEL8X0M @@ -1 +1 @@ -CONFIG_SND_INTEL8X0M=m +# CONFIG_SND_INTEL8X0M is not set diff --git a/baseconfig/CONFIG_SND_SEQUENCER_OSS b/baseconfig/CONFIG_SND_SEQUENCER_OSS index 8447d4b1c..439bdb368 100644 --- a/baseconfig/CONFIG_SND_SEQUENCER_OSS +++ b/baseconfig/CONFIG_SND_SEQUENCER_OSS @@ -1 +1 @@ -CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_SEQUENCER_OSS=m diff --git a/baseconfig/CONFIG_SND_SIMPLE_CARD_UTILS b/baseconfig/CONFIG_SND_SIMPLE_CARD_UTILS new file mode 100644 index 000000000..9d19715c0 --- /dev/null +++ b/baseconfig/CONFIG_SND_SIMPLE_CARD_UTILS @@ -0,0 +1 @@ +CONFIG_SND_SIMPLE_CARD_UTILS=m diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C new file mode 100644 index 000000000..54124be46 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_I2C=m diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI new file mode 100644 index 000000000..fce8309a6 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_SPI=m diff --git a/baseconfig/CONFIG_SND_SOC_CS35L35 b/baseconfig/CONFIG_SND_SOC_CS35L35 new file mode 100644 index 000000000..3969b2fee --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_CS35L35 @@ -0,0 +1 @@ +CONFIG_SND_SOC_CS35L35=m diff --git a/baseconfig/CONFIG_SND_SOC_CS43130 b/baseconfig/CONFIG_SND_SOC_CS43130 new file mode 100644 index 000000000..3fad16f6d --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_CS43130 @@ -0,0 +1 @@ +CONFIG_SND_SOC_CS43130=m diff --git a/baseconfig/CONFIG_SND_SOC_DIO2125 b/baseconfig/CONFIG_SND_SOC_DIO2125 new file mode 100644 index 000000000..d3121e77e --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_DIO2125 @@ -0,0 +1 @@ +CONFIG_SND_SOC_DIO2125=m diff --git a/baseconfig/CONFIG_SND_SOC_ES7134 b/baseconfig/CONFIG_SND_SOC_ES7134 new file mode 100644 index 000000000..ff087adce --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ES7134 @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES7134=m diff --git a/baseconfig/CONFIG_SND_SOC_ES8316 b/baseconfig/CONFIG_SND_SOC_ES8316 new file mode 100644 index 000000000..c9fcabfea --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ES8316 @@ -0,0 +1 @@ +# CONFIG_SND_SOC_ES8316 is not set diff --git a/baseconfig/CONFIG_SND_SOC_MAX98927 b/baseconfig/CONFIG_SND_SOC_MAX98927 new file mode 100644 index 000000000..341a74d43 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_MAX98927 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98927=m diff --git a/baseconfig/CONFIG_SND_SOC_NAU8824 b/baseconfig/CONFIG_SND_SOC_NAU8824 new file mode 100644 index 000000000..3551419c6 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_NAU8824 @@ -0,0 +1 @@ +CONFIG_SND_SOC_NAU8824=m diff --git a/baseconfig/CONFIG_SND_SOC_WM8524 b/baseconfig/CONFIG_SND_SOC_WM8524 new file mode 100644 index 000000000..1eb33d7e5 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_WM8524 @@ -0,0 +1 @@ +CONFIG_SND_SOC_WM8524=m diff --git a/baseconfig/CONFIG_SND_SOC_ZX_AUD96P22 b/baseconfig/CONFIG_SND_SOC_ZX_AUD96P22 new file mode 100644 index 000000000..487603ce8 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ZX_AUD96P22 @@ -0,0 +1 @@ +# CONFIG_SND_SOC_ZX_AUD96P22 is not set diff --git a/baseconfig/CONFIG_SND_VIA82XX b/baseconfig/CONFIG_SND_VIA82XX index 129cf3976..2c2673578 100644 --- a/baseconfig/CONFIG_SND_VIA82XX +++ b/baseconfig/CONFIG_SND_VIA82XX @@ -1 +1 @@ -CONFIG_SND_VIA82XX=m +# CONFIG_SND_VIA82XX is not set diff --git a/baseconfig/CONFIG_SND_VIA82XX_MODEM b/baseconfig/CONFIG_SND_VIA82XX_MODEM index 81e80f3a5..53055c694 100644 --- a/baseconfig/CONFIG_SND_VIA82XX_MODEM +++ b/baseconfig/CONFIG_SND_VIA82XX_MODEM @@ -1 +1 @@ -CONFIG_SND_VIA82XX_MODEM=m +# CONFIG_SND_VIA82XX_MODEM is not set diff --git a/baseconfig/CONFIG_SOFTLOCKUP_DETECTOR b/baseconfig/CONFIG_SOFTLOCKUP_DETECTOR new file mode 100644 index 000000000..1ff04a43b --- /dev/null +++ b/baseconfig/CONFIG_SOFTLOCKUP_DETECTOR @@ -0,0 +1 @@ +CONFIG_SOFTLOCKUP_DETECTOR=y diff --git a/baseconfig/x86/CONFIG_SPI_ROCKCHIP b/baseconfig/CONFIG_SPI_ROCKCHIP similarity index 100% rename from baseconfig/x86/CONFIG_SPI_ROCKCHIP rename to baseconfig/CONFIG_SPI_ROCKCHIP diff --git a/baseconfig/CONFIG_SPI_SLAVE b/baseconfig/CONFIG_SPI_SLAVE new file mode 100644 index 000000000..663aaaaf3 --- /dev/null +++ b/baseconfig/CONFIG_SPI_SLAVE @@ -0,0 +1 @@ +# CONFIG_SPI_SLAVE is not set diff --git a/baseconfig/CONFIG_SQUASHFS_ZSTD b/baseconfig/CONFIG_SQUASHFS_ZSTD new file mode 100644 index 000000000..023fb21e0 --- /dev/null +++ b/baseconfig/CONFIG_SQUASHFS_ZSTD @@ -0,0 +1 @@ +CONFIG_SQUASHFS_ZSTD=y diff --git a/baseconfig/CONFIG_SRF04 b/baseconfig/CONFIG_SRF04 new file mode 100644 index 000000000..7dcc9136e --- /dev/null +++ b/baseconfig/CONFIG_SRF04 @@ -0,0 +1 @@ +# CONFIG_SRF04 is not set diff --git a/baseconfig/CONFIG_STRING_SELFTEST b/baseconfig/CONFIG_STRING_SELFTEST new file mode 100644 index 000000000..dbff6d7fa --- /dev/null +++ b/baseconfig/CONFIG_STRING_SELFTEST @@ -0,0 +1 @@ +# CONFIG_STRING_SELFTEST is not set diff --git a/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST new file mode 100644 index 000000000..858e87e78 --- /dev/null +++ b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST @@ -0,0 +1 @@ +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" diff --git a/baseconfig/x86/CONFIG_TCG_CRB b/baseconfig/CONFIG_TCG_CRB similarity index 100% rename from baseconfig/x86/CONFIG_TCG_CRB rename to baseconfig/CONFIG_TCG_CRB diff --git a/baseconfig/CONFIG_TEE b/baseconfig/CONFIG_TEE new file mode 100644 index 000000000..accc7a854 --- /dev/null +++ b/baseconfig/CONFIG_TEE @@ -0,0 +1 @@ +# CONFIG_TEE is not set diff --git a/baseconfig/CONFIG_TEST_KMOD b/baseconfig/CONFIG_TEST_KMOD new file mode 100644 index 000000000..59165b345 --- /dev/null +++ b/baseconfig/CONFIG_TEST_KMOD @@ -0,0 +1 @@ +# CONFIG_TEST_KMOD is not set diff --git a/baseconfig/CONFIG_TEST_SYSCTL b/baseconfig/CONFIG_TEST_SYSCTL new file mode 100644 index 000000000..f81589ea4 --- /dev/null +++ b/baseconfig/CONFIG_TEST_SYSCTL @@ -0,0 +1 @@ +# CONFIG_TEST_SYSCTL is not set diff --git a/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS new file mode 100644 index 000000000..9288765d6 --- /dev/null +++ b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS @@ -0,0 +1 @@ +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 diff --git a/baseconfig/CONFIG_TIGON3_HWMON b/baseconfig/CONFIG_TIGON3_HWMON new file mode 100644 index 000000000..31215b555 --- /dev/null +++ b/baseconfig/CONFIG_TIGON3_HWMON @@ -0,0 +1 @@ +CONFIG_TIGON3_HWMON=y diff --git a/baseconfig/CONFIG_TI_ADC084S021 b/baseconfig/CONFIG_TI_ADC084S021 new file mode 100644 index 000000000..484542094 --- /dev/null +++ b/baseconfig/CONFIG_TI_ADC084S021 @@ -0,0 +1 @@ +# CONFIG_TI_ADC084S021 is not set diff --git a/baseconfig/CONFIG_TI_ADC108S102 b/baseconfig/CONFIG_TI_ADC108S102 new file mode 100644 index 000000000..b70880f5b --- /dev/null +++ b/baseconfig/CONFIG_TI_ADC108S102 @@ -0,0 +1 @@ +# CONFIG_TI_ADC108S102 is not set diff --git a/baseconfig/CONFIG_TI_ADS1015 b/baseconfig/CONFIG_TI_ADS1015 index 8a8d511c6..f57c3fdc4 100644 --- a/baseconfig/CONFIG_TI_ADS1015 +++ b/baseconfig/CONFIG_TI_ADS1015 @@ -1 +1 @@ -# CONFIG_TI_ADS1015 is not set +CONFIG_TI_ADS1015=m diff --git a/baseconfig/CONFIG_TI_SYSCON_RESET b/baseconfig/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index daf623a6e..000000000 --- a/baseconfig/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_TI_SYSCON_RESET is not set diff --git a/baseconfig/CONFIG_TLS b/baseconfig/CONFIG_TLS new file mode 100644 index 000000000..1d627c36a --- /dev/null +++ b/baseconfig/CONFIG_TLS @@ -0,0 +1 @@ +CONFIG_TLS=m diff --git a/baseconfig/CONFIG_TOUCHSCREEN_STMFTS b/baseconfig/CONFIG_TOUCHSCREEN_STMFTS new file mode 100644 index 000000000..0b1cd21e7 --- /dev/null +++ b/baseconfig/CONFIG_TOUCHSCREEN_STMFTS @@ -0,0 +1 @@ +# CONFIG_TOUCHSCREEN_STMFTS is not set diff --git a/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO new file mode 100644 index 000000000..b67dd760f --- /dev/null +++ b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO @@ -0,0 +1 @@ +CONFIG_TOUCHSCREEN_TSC2007_IIO=y diff --git a/baseconfig/CONFIG_TRACE_EVAL_MAP_FILE b/baseconfig/CONFIG_TRACE_EVAL_MAP_FILE new file mode 100644 index 000000000..64d28ec6a --- /dev/null +++ b/baseconfig/CONFIG_TRACE_EVAL_MAP_FILE @@ -0,0 +1 @@ +CONFIG_TRACE_EVAL_MAP_FILE=y diff --git a/baseconfig/CONFIG_TYPEC_FUSB302 b/baseconfig/CONFIG_TYPEC_FUSB302 new file mode 100644 index 000000000..9633e1956 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_FUSB302 @@ -0,0 +1 @@ +CONFIG_TYPEC_FUSB302=m diff --git a/baseconfig/CONFIG_TYPEC_TCPCI b/baseconfig/CONFIG_TYPEC_TCPCI new file mode 100644 index 000000000..46687f546 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPCI @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPCI=m diff --git a/baseconfig/CONFIG_TYPEC_TCPM b/baseconfig/CONFIG_TYPEC_TCPM new file mode 100644 index 000000000..8294bcc60 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPM @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPM=m diff --git a/baseconfig/CONFIG_TYPEC_UCSI b/baseconfig/CONFIG_TYPEC_UCSI new file mode 100644 index 000000000..6eeb035c1 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_UCSI @@ -0,0 +1 @@ +CONFIG_TYPEC_UCSI=m diff --git a/baseconfig/CONFIG_TYPEC_WCOVE b/baseconfig/CONFIG_TYPEC_WCOVE new file mode 100644 index 000000000..8801ecb28 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_WCOVE @@ -0,0 +1 @@ +CONFIG_TYPEC_WCOVE=m diff --git a/baseconfig/CONFIG_UBIFS_FS_SECURITY b/baseconfig/CONFIG_UBIFS_FS_SECURITY new file mode 100644 index 000000000..cb238b9c2 --- /dev/null +++ b/baseconfig/CONFIG_UBIFS_FS_SECURITY @@ -0,0 +1 @@ +CONFIG_UBIFS_FS_SECURITY=y diff --git a/baseconfig/CONFIG_UCSI_ACPI b/baseconfig/CONFIG_UCSI_ACPI new file mode 100644 index 000000000..34e35d282 --- /dev/null +++ b/baseconfig/CONFIG_UCSI_ACPI @@ -0,0 +1 @@ +CONFIG_UCSI_ACPI=m diff --git a/baseconfig/CONFIG_USB_CONFIGFS_F_UAC1_LEGACY b/baseconfig/CONFIG_USB_CONFIGFS_F_UAC1_LEGACY new file mode 100644 index 000000000..6dd4f027c --- /dev/null +++ b/baseconfig/CONFIG_USB_CONFIGFS_F_UAC1_LEGACY @@ -0,0 +1 @@ +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set diff --git a/baseconfig/CONFIG_USB_LED b/baseconfig/CONFIG_USB_LED deleted file mode 100644 index 445af6c46..000000000 --- a/baseconfig/CONFIG_USB_LED +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_LED=m diff --git a/baseconfig/CONFIG_USB_PCI b/baseconfig/CONFIG_USB_PCI new file mode 100644 index 000000000..26c372a3a --- /dev/null +++ b/baseconfig/CONFIG_USB_PCI @@ -0,0 +1 @@ +CONFIG_USB_PCI=y diff --git a/baseconfig/CONFIG_USB_RAINSHADOW_CEC b/baseconfig/CONFIG_USB_RAINSHADOW_CEC new file mode 100644 index 000000000..c6605282b --- /dev/null +++ b/baseconfig/CONFIG_USB_RAINSHADOW_CEC @@ -0,0 +1 @@ +CONFIG_USB_RAINSHADOW_CEC=m diff --git a/baseconfig/CONFIG_USB_SNP_UDC_PLAT b/baseconfig/CONFIG_USB_SNP_UDC_PLAT new file mode 100644 index 000000000..b6095f92b --- /dev/null +++ b/baseconfig/CONFIG_USB_SNP_UDC_PLAT @@ -0,0 +1 @@ +CONFIG_USB_SNP_UDC_PLAT=m diff --git a/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 b/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 deleted file mode 100644 index dd5c6f34c..000000000 --- a/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_VIDEO_RENESAS_VSP1 is not set diff --git a/baseconfig/CONFIG_VIRTIO_BLK_SCSI b/baseconfig/CONFIG_VIRTIO_BLK_SCSI index dcc60f529..e551a8ba1 100644 --- a/baseconfig/CONFIG_VIRTIO_BLK_SCSI +++ b/baseconfig/CONFIG_VIRTIO_BLK_SCSI @@ -1 +1 @@ -CONFIG_VIRTIO_BLK_SCSI=y +# CONFIG_VIRTIO_BLK_SCSI is not set diff --git a/baseconfig/CONFIG_VL6180 b/baseconfig/CONFIG_VL6180 new file mode 100644 index 000000000..b178334de --- /dev/null +++ b/baseconfig/CONFIG_VL6180 @@ -0,0 +1 @@ +CONFIG_VL6180=m diff --git a/baseconfig/CONFIG_VSOCKMON b/baseconfig/CONFIG_VSOCKMON new file mode 100644 index 000000000..82594c488 --- /dev/null +++ b/baseconfig/CONFIG_VSOCKMON @@ -0,0 +1 @@ +CONFIG_VSOCKMON=m diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2438 b/baseconfig/CONFIG_W1_SLAVE_DS2438 new file mode 100644 index 000000000..34301a62e --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2438 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2438=m diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2805 b/baseconfig/CONFIG_W1_SLAVE_DS2805 new file mode 100644 index 000000000..eddd3bbb3 --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2805 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2805=m diff --git a/baseconfig/CONFIG_WARN_ALL_UNSEEDED_RANDOM b/baseconfig/CONFIG_WARN_ALL_UNSEEDED_RANDOM new file mode 100644 index 000000000..5244e5664 --- /dev/null +++ b/baseconfig/CONFIG_WARN_ALL_UNSEEDED_RANDOM @@ -0,0 +1 @@ +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set diff --git a/baseconfig/CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED b/baseconfig/CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED new file mode 100644 index 000000000..2cdeb93aa --- /dev/null +++ b/baseconfig/CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED @@ -0,0 +1 @@ +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y diff --git a/baseconfig/CONFIG_WIL6210_DEBUGFS b/baseconfig/CONFIG_WIL6210_DEBUGFS new file mode 100644 index 000000000..f0f5fe7cf --- /dev/null +++ b/baseconfig/CONFIG_WIL6210_DEBUGFS @@ -0,0 +1 @@ +CONFIG_WIL6210_DEBUGFS=y diff --git a/baseconfig/CONFIG_WLAN_VENDOR_QUANTENNA b/baseconfig/CONFIG_WLAN_VENDOR_QUANTENNA new file mode 100644 index 000000000..94a9969d7 --- /dev/null +++ b/baseconfig/CONFIG_WLAN_VENDOR_QUANTENNA @@ -0,0 +1 @@ +CONFIG_WLAN_VENDOR_QUANTENNA=y diff --git a/baseconfig/CONFIG_X86_MCELOG_LEGACY b/baseconfig/CONFIG_X86_MCELOG_LEGACY new file mode 100644 index 000000000..2a4755640 --- /dev/null +++ b/baseconfig/CONFIG_X86_MCELOG_LEGACY @@ -0,0 +1 @@ +CONFIG_X86_MCELOG_LEGACY=y diff --git a/baseconfig/CONFIG_ZRAM_WRITEBACK b/baseconfig/CONFIG_ZRAM_WRITEBACK new file mode 100644 index 000000000..9a566b71c --- /dev/null +++ b/baseconfig/CONFIG_ZRAM_WRITEBACK @@ -0,0 +1 @@ +# CONFIG_ZRAM_WRITEBACK is not set diff --git a/baseconfig/CONFIG_ZX_TDM b/baseconfig/CONFIG_ZX_TDM new file mode 100644 index 000000000..9d2d9bf4c --- /dev/null +++ b/baseconfig/CONFIG_ZX_TDM @@ -0,0 +1 @@ +# CONFIG_ZX_TDM is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_AK8975 b/baseconfig/arm/CONFIG_AK8975 similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_AK8975 rename to baseconfig/arm/CONFIG_AK8975 diff --git a/baseconfig/arm/CONFIG_ARCH_ACTIONS b/baseconfig/arm/CONFIG_ARCH_ACTIONS new file mode 100644 index 000000000..760663b50 --- /dev/null +++ b/baseconfig/arm/CONFIG_ARCH_ACTIONS @@ -0,0 +1 @@ +# CONFIG_ARCH_ACTIONS is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_BCM_IPROC b/baseconfig/arm/CONFIG_ARCH_BCM_IPROC similarity index 100% rename from baseconfig/arm/arm64/CONFIG_ARCH_BCM_IPROC rename to baseconfig/arm/CONFIG_ARCH_BCM_IPROC diff --git a/baseconfig/arm/CONFIG_BCM2835_THERMAL b/baseconfig/arm/CONFIG_BCM2835_THERMAL new file mode 100644 index 000000000..a6e3c0a6d --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM2835_THERMAL @@ -0,0 +1 @@ +CONFIG_BCM2835_THERMAL=m diff --git a/baseconfig/arm/CONFIG_BCM_SBA_RAID b/baseconfig/arm/CONFIG_BCM_SBA_RAID new file mode 100644 index 000000000..516787c00 --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM_SBA_RAID @@ -0,0 +1 @@ +CONFIG_BCM_SBA_RAID=m diff --git a/baseconfig/arm/CONFIG_BCM_VIDEOCORE b/baseconfig/arm/CONFIG_BCM_VIDEOCORE new file mode 100644 index 000000000..6897b418e --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM_VIDEOCORE @@ -0,0 +1 @@ +# CONFIG_BCM_VIDEOCORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV b/baseconfig/arm/CONFIG_CROS_EC_CHARDEV similarity index 100% rename from baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV rename to baseconfig/arm/CONFIG_CROS_EC_CHARDEV diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO b/baseconfig/arm/CONFIG_CROS_EC_PROTO similarity index 100% rename from baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO rename to baseconfig/arm/CONFIG_CROS_EC_PROTO diff --git a/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG b/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG new file mode 100644 index 000000000..62fd0b85a --- /dev/null +++ b/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y diff --git a/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE b/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE new file mode 100644 index 000000000..5c70cb19a --- /dev/null +++ b/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE @@ -0,0 +1 @@ +CONFIG_CRYPTO_GHASH_ARM_CE=m diff --git a/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 b/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 index ba32f8501..3aa7dacbf 100644 --- a/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 +++ b/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 @@ -1 +1 @@ -CONFIG_CRYPTO_SHA256_ARM64=m +CONFIG_CRYPTO_SHA256_ARM64=y diff --git a/baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR b/baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR rename to baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR diff --git a/baseconfig/arm/arm64/CONFIG_DMI b/baseconfig/arm/CONFIG_DMI similarity index 100% rename from baseconfig/arm/arm64/CONFIG_DMI rename to baseconfig/arm/CONFIG_DMI diff --git a/baseconfig/arm/arm64/CONFIG_DMIID b/baseconfig/arm/CONFIG_DMIID similarity index 100% rename from baseconfig/arm/arm64/CONFIG_DMIID rename to baseconfig/arm/CONFIG_DMIID diff --git a/baseconfig/arm/arm64/CONFIG_DMI_SYSFS b/baseconfig/arm/CONFIG_DMI_SYSFS similarity index 100% rename from baseconfig/arm/arm64/CONFIG_DMI_SYSFS rename to baseconfig/arm/CONFIG_DMI_SYSFS diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI b/baseconfig/arm/CONFIG_DRM_DW_HDMI similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI rename to baseconfig/arm/CONFIG_DRM_DW_HDMI diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO rename to baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC b/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC new file mode 100644 index 000000000..a3e178eae --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_CEC=m diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO new file mode 100644 index 000000000..34ecaf242 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m diff --git a/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 000000000..53f0efb59 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +CONFIG_DRM_LVDS_ENCODER=m diff --git a/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI new file mode 100644 index 000000000..2590929f1 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI @@ -0,0 +1 @@ +CONFIG_DRM_MESON_DW_HDMI=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_LVDS b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..6d4d3c7c6 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 000000000..8334ac016 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m diff --git a/baseconfig/arm/CONFIG_DRM_PL111 b/baseconfig/arm/CONFIG_DRM_PL111 new file mode 100644 index 000000000..8117110e8 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PL111 @@ -0,0 +1 @@ +CONFIG_DRM_PL111=m diff --git a/baseconfig/arm/CONFIG_DRM_STM b/baseconfig/arm/CONFIG_DRM_STM new file mode 100644 index 000000000..d490eca03 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_STM @@ -0,0 +1 @@ +# CONFIG_DRM_STM is not set diff --git a/baseconfig/arm/CONFIG_DRM_SUN8I_MIXER b/baseconfig/arm/CONFIG_DRM_SUN8I_MIXER new file mode 100644 index 000000000..cbd3e6b72 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_SUN8I_MIXER @@ -0,0 +1 @@ +CONFIG_DRM_SUN8I_MIXER=m diff --git a/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 new file mode 100644 index 000000000..dd9667384 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 @@ -0,0 +1 @@ +CONFIG_DRM_TOSHIBA_TC358767=m diff --git a/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC b/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC new file mode 100644 index 000000000..da0132c1f --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC @@ -0,0 +1 @@ +CONFIG_DRM_VC4_HDMI_CEC=y diff --git a/baseconfig/arm/CONFIG_EXTCON b/baseconfig/arm/CONFIG_EXTCON deleted file mode 100644 index 0a7190c08..000000000 --- a/baseconfig/arm/CONFIG_EXTCON +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EXTCON=m diff --git a/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC b/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC new file mode 100644 index 000000000..831bc6ea7 --- /dev/null +++ b/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC @@ -0,0 +1 @@ +CONFIG_EXTCON_USBC_CROS_EC=m diff --git a/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC b/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC new file mode 100644 index 000000000..e7b39a2c7 --- /dev/null +++ b/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_IMX_RNGC=m diff --git a/baseconfig/CONFIG_HW_RANDOM_OMAP b/baseconfig/arm/CONFIG_HW_RANDOM_OMAP similarity index 100% rename from baseconfig/CONFIG_HW_RANDOM_OMAP rename to baseconfig/arm/CONFIG_HW_RANDOM_OMAP diff --git a/baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL b/baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL similarity index 100% rename from baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL rename to baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL diff --git a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE index 661ffb01a..f9cdc633b 100644 --- a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE +++ b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_CORE=m +CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM index cec2f8633..3d50a3e8a 100644 --- a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM +++ b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_PLATFORM=m +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/arm/CONFIG_I2C_RK3X b/baseconfig/arm/CONFIG_I2C_RK3X index 904a05ea2..8a79fb30d 100644 --- a/baseconfig/arm/CONFIG_I2C_RK3X +++ b/baseconfig/arm/CONFIG_I2C_RK3X @@ -1 +1 @@ -CONFIG_I2C_RK3X=m +CONFIG_I2C_RK3X=y diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO new file mode 100644 index 000000000..c64555bfa --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_BARO=m diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX new file mode 100644 index 000000000..deb1a6eb5 --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_LIGHT_PROX=m diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS similarity index 100% rename from baseconfig/CONFIG_IIO_CROS_EC_SENSORS rename to baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE similarity index 100% rename from baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE rename to baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE diff --git a/baseconfig/arm/CONFIG_IOMMU_DMA b/baseconfig/arm/CONFIG_IOMMU_DMA new file mode 100644 index 000000000..a9155fba1 --- /dev/null +++ b/baseconfig/arm/CONFIG_IOMMU_DMA @@ -0,0 +1 @@ +CONFIG_IOMMU_DMA=y diff --git a/baseconfig/arm/CONFIG_IPQ_GCC_8074 b/baseconfig/arm/CONFIG_IPQ_GCC_8074 new file mode 100644 index 000000000..7e6a019d4 --- /dev/null +++ b/baseconfig/arm/CONFIG_IPQ_GCC_8074 @@ -0,0 +1 @@ +# CONFIG_IPQ_GCC_8074 is not set diff --git a/baseconfig/arm/CONFIG_KEYBOARD_ADC b/baseconfig/arm/CONFIG_KEYBOARD_ADC new file mode 100644 index 000000000..d9b66de57 --- /dev/null +++ b/baseconfig/arm/CONFIG_KEYBOARD_ADC @@ -0,0 +1 @@ +CONFIG_KEYBOARD_ADC=m diff --git a/baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC b/baseconfig/arm/CONFIG_KEYBOARD_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC rename to baseconfig/arm/CONFIG_KEYBOARD_CROS_EC diff --git a/baseconfig/arm/CONFIG_KXSD9 b/baseconfig/arm/CONFIG_KXSD9 new file mode 100644 index 000000000..090669c9c --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9 @@ -0,0 +1 @@ +CONFIG_KXSD9=m diff --git a/baseconfig/arm/CONFIG_KXSD9_I2C b/baseconfig/arm/CONFIG_KXSD9_I2C new file mode 100644 index 000000000..3d2256700 --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_I2C @@ -0,0 +1 @@ +CONFIG_KXSD9_I2C=m diff --git a/baseconfig/arm/CONFIG_KXSD9_SPI b/baseconfig/arm/CONFIG_KXSD9_SPI new file mode 100644 index 000000000..f4da57bbc --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_SPI @@ -0,0 +1 @@ +CONFIG_KXSD9_SPI=m diff --git a/baseconfig/arm/CONFIG_MESON_GX_SOCINFO b/baseconfig/arm/CONFIG_MESON_GX_SOCINFO new file mode 100644 index 000000000..ce5ba6f4a --- /dev/null +++ b/baseconfig/arm/CONFIG_MESON_GX_SOCINFO @@ -0,0 +1 @@ +CONFIG_MESON_GX_SOCINFO=y diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC b/baseconfig/arm/CONFIG_MFD_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC rename to baseconfig/arm/CONFIG_MFD_CROS_EC diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C b/baseconfig/arm/CONFIG_MFD_CROS_EC_I2C similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C rename to baseconfig/arm/CONFIG_MFD_CROS_EC_I2C diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI b/baseconfig/arm/CONFIG_MFD_CROS_EC_SPI similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI rename to baseconfig/arm/CONFIG_MFD_CROS_EC_SPI diff --git a/baseconfig/arm/CONFIG_MMC b/baseconfig/arm/CONFIG_MMC new file mode 100644 index 000000000..7c2be178c --- /dev/null +++ b/baseconfig/arm/CONFIG_MMC @@ -0,0 +1 @@ +CONFIG_MMC=y diff --git a/baseconfig/arm/CONFIG_MMC_QCOM_DML b/baseconfig/arm/CONFIG_MMC_QCOM_DML deleted file mode 100644 index 11f7e7eba..000000000 --- a/baseconfig/arm/CONFIG_MMC_QCOM_DML +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_QCOM_DML is not set diff --git a/baseconfig/arm/armv7/CONFIG_MTD_NAND_PXA3xx b/baseconfig/arm/CONFIG_MTD_NAND_PXA3xx similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MTD_NAND_PXA3xx rename to baseconfig/arm/CONFIG_MTD_NAND_PXA3xx diff --git a/baseconfig/arm/CONFIG_PARPORT b/baseconfig/arm/CONFIG_PARPORT deleted file mode 100644 index 9dd8f33af..000000000 --- a/baseconfig/arm/CONFIG_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT is not set diff --git a/baseconfig/arm/CONFIG_PATA_OF_PLATFORM b/baseconfig/arm/CONFIG_PATA_OF_PLATFORM deleted file mode 100644 index 5354705f9..000000000 --- a/baseconfig/arm/CONFIG_PATA_OF_PLATFORM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PATA_OF_PLATFORM=m diff --git a/baseconfig/arm/CONFIG_PCIE_DW_HOST b/baseconfig/arm/CONFIG_PCIE_DW_HOST new file mode 100644 index 000000000..6aecdd9c1 --- /dev/null +++ b/baseconfig/arm/CONFIG_PCIE_DW_HOST @@ -0,0 +1 @@ +CONFIG_PCIE_DW_HOST=y diff --git a/baseconfig/arm/CONFIG_PCI_FTPCI100 b/baseconfig/arm/CONFIG_PCI_FTPCI100 new file mode 100644 index 000000000..f9fe5b6ea --- /dev/null +++ b/baseconfig/arm/CONFIG_PCI_FTPCI100 @@ -0,0 +1 @@ +# CONFIG_PCI_FTPCI100 is not set diff --git a/baseconfig/arm/CONFIG_PHY_MESON_GXL_USB2 b/baseconfig/arm/CONFIG_PHY_MESON_GXL_USB2 new file mode 100644 index 000000000..ed8e9c323 --- /dev/null +++ b/baseconfig/arm/CONFIG_PHY_MESON_GXL_USB2 @@ -0,0 +1 @@ +# CONFIG_PHY_MESON_GXL_USB2 is not set diff --git a/baseconfig/arm/CONFIG_PINCTRL_MSM8994 b/baseconfig/arm/CONFIG_PINCTRL_MSM8994 new file mode 100644 index 000000000..977b1c3c4 --- /dev/null +++ b/baseconfig/arm/CONFIG_PINCTRL_MSM8994 @@ -0,0 +1 @@ +# CONFIG_PINCTRL_MSM8994 is not set diff --git a/baseconfig/arm/armv7/CONFIG_PWM_CROS_EC b/baseconfig/arm/CONFIG_PWM_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_PWM_CROS_EC rename to baseconfig/arm/CONFIG_PWM_CROS_EC diff --git a/baseconfig/arm/CONFIG_PWRSEQ_EMMC b/baseconfig/arm/CONFIG_PWRSEQ_EMMC new file mode 100644 index 000000000..29e883d93 --- /dev/null +++ b/baseconfig/arm/CONFIG_PWRSEQ_EMMC @@ -0,0 +1 @@ +CONFIG_PWRSEQ_EMMC=y diff --git a/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE b/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE new file mode 100644 index 000000000..7c8ad9b8a --- /dev/null +++ b/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE @@ -0,0 +1 @@ +CONFIG_PWRSEQ_SIMPLE=y diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC b/baseconfig/arm/CONFIG_QCOM_SPMI_IADC deleted file mode 100644 index 1b31637a0..000000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_IADC is not set diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC b/baseconfig/arm/CONFIG_QCOM_SPMI_VADC deleted file mode 100644 index 54e057273..000000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_VADC is not set diff --git a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 index d62314c7d..3f2a9b30f 100644 --- a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 +++ b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 @@ -1 +1 @@ -# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_FAN53555=y diff --git a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI b/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI deleted file mode 100644 index fe224dc89..000000000 --- a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_QCOM_SPMI is not set diff --git a/baseconfig/arm/CONFIG_RESET_TI_SCI b/baseconfig/arm/CONFIG_RESET_TI_SCI new file mode 100644 index 000000000..2a2526769 --- /dev/null +++ b/baseconfig/arm/CONFIG_RESET_TI_SCI @@ -0,0 +1 @@ +# CONFIG_RESET_TI_SCI is not set diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP index ee89108f9..4f8576d47 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP +++ b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP @@ -1 +1 @@ -CONFIG_ROCKCHIP_ANALOGIX_DP=m +CONFIG_ROCKCHIP_ANALOGIX_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP new file mode 100644 index 000000000..86d2137bd --- /dev/null +++ b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP @@ -0,0 +1 @@ +CONFIG_ROCKCHIP_CDN_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI index 49748e701..80c330104 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_HDMI=m +CONFIG_ROCKCHIP_DW_HDMI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI index 516f3b1c7..6c00423c8 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_MIPI_DSI=m +CONFIG_ROCKCHIP_DW_MIPI_DSI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI index 34b798abf..50cf998df 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_INNO_HDMI=m +CONFIG_ROCKCHIP_INNO_HDMI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_PHY b/baseconfig/arm/CONFIG_ROCKCHIP_PHY new file mode 100644 index 000000000..e49faf8f9 --- /dev/null +++ b/baseconfig/arm/CONFIG_ROCKCHIP_PHY @@ -0,0 +1 @@ +CONFIG_ROCKCHIP_PHY=m diff --git a/baseconfig/arm/CONFIG_SND_AUDIO_GRAPH_CARD b/baseconfig/arm/CONFIG_SND_AUDIO_GRAPH_CARD new file mode 100644 index 000000000..01b3c1590 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_AUDIO_GRAPH_CARD @@ -0,0 +1 @@ +CONFIG_SND_AUDIO_GRAPH_CARD=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_ROCKCHIP_PDM b/baseconfig/arm/CONFIG_SND_SOC_ROCKCHIP_PDM new file mode 100644 index 000000000..858c70c98 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_ROCKCHIP_PDM @@ -0,0 +1 @@ +CONFIG_SND_SOC_ROCKCHIP_PDM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_AC97 b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_AC97 similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_AC97 rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA20_AC97 diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_DAS b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_DAS similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_DAS rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA20_DAS diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S new file mode 100644 index 000000000..abfe22877 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA20_I2S=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_SPDIF b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_SPDIF similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_SPDIF rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA20_SPDIF diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_AHUB b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_AHUB similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_AHUB rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA30_AHUB diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_I2S b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_I2S similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_I2S rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA30_I2S diff --git a/baseconfig/arm/CONFIG_SOC_BRCMSTB b/baseconfig/arm/CONFIG_SOC_BRCMSTB new file mode 100644 index 000000000..7b8f8dcbb --- /dev/null +++ b/baseconfig/arm/CONFIG_SOC_BRCMSTB @@ -0,0 +1 @@ +# CONFIG_SOC_BRCMSTB is not set diff --git a/baseconfig/arm/CONFIG_SPI_MESON_SPICC b/baseconfig/arm/CONFIG_SPI_MESON_SPICC new file mode 100644 index 000000000..c78be8577 --- /dev/null +++ b/baseconfig/arm/CONFIG_SPI_MESON_SPICC @@ -0,0 +1 @@ +# CONFIG_SPI_MESON_SPICC is not set diff --git a/baseconfig/arm/CONFIG_SUN50I_A64_CCU b/baseconfig/arm/CONFIG_SUN50I_A64_CCU deleted file mode 100644 index 9ce6c792a..000000000 --- a/baseconfig/arm/CONFIG_SUN50I_A64_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN50I_A64_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN5I_CCU b/baseconfig/arm/CONFIG_SUN5I_CCU deleted file mode 100644 index 26856d6b2..000000000 --- a/baseconfig/arm/CONFIG_SUN5I_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN5I_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN6I_A31_CCU b/baseconfig/arm/CONFIG_SUN6I_A31_CCU deleted file mode 100644 index 5ce1bb3f7..000000000 --- a/baseconfig/arm/CONFIG_SUN6I_A31_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN6I_A31_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A23_CCU b/baseconfig/arm/CONFIG_SUN8I_A23_CCU deleted file mode 100644 index 26ae1100c..000000000 --- a/baseconfig/arm/CONFIG_SUN8I_A23_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A23_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A33_CCU b/baseconfig/arm/CONFIG_SUN8I_A33_CCU deleted file mode 100644 index e1a357ee8..000000000 --- a/baseconfig/arm/CONFIG_SUN8I_A33_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A33_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A83T_CCU b/baseconfig/arm/CONFIG_SUN8I_A83T_CCU new file mode 100644 index 000000000..9f34630e8 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_A83T_CCU @@ -0,0 +1 @@ +# CONFIG_SUN8I_A83T_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_DE2_CCU b/baseconfig/arm/CONFIG_SUN8I_DE2_CCU new file mode 100644 index 000000000..41a3847ad --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_DE2_CCU @@ -0,0 +1 @@ +# CONFIG_SUN8I_DE2_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/CONFIG_SUN8I_H3_CCU index 02cfb2c97..542d6fc7d 100644 --- a/baseconfig/arm/CONFIG_SUN8I_H3_CCU +++ b/baseconfig/arm/CONFIG_SUN8I_H3_CCU @@ -1 +1 @@ -# CONFIG_SUN8I_H3_CCU is not set +CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN8I_R_CCU b/baseconfig/arm/CONFIG_SUN8I_R_CCU new file mode 100644 index 000000000..0b88df0dc --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_R_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_R_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN9I_A80_CCU b/baseconfig/arm/CONFIG_SUN9I_A80_CCU deleted file mode 100644 index 82686b27e..000000000 --- a/baseconfig/arm/CONFIG_SUN9I_A80_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN9I_A80_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUNXI_CCU b/baseconfig/arm/CONFIG_SUNXI_CCU deleted file mode 100644 index a383113ef..000000000 --- a/baseconfig/arm/CONFIG_SUNXI_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUNXI_CCU is not set diff --git a/baseconfig/arm/armv7/CONFIG_SUNXI_SRAM b/baseconfig/arm/CONFIG_SUNXI_SRAM similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SUNXI_SRAM rename to baseconfig/arm/CONFIG_SUNXI_SRAM diff --git a/baseconfig/arm/CONFIG_TINYDRM_REPAPER b/baseconfig/arm/CONFIG_TINYDRM_REPAPER new file mode 100644 index 000000000..c4d2874fa --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_REPAPER @@ -0,0 +1 @@ +# CONFIG_TINYDRM_REPAPER is not set diff --git a/baseconfig/arm/CONFIG_TINYDRM_ST7586 b/baseconfig/arm/CONFIG_TINYDRM_ST7586 new file mode 100644 index 000000000..2b9e29f63 --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_ST7586 @@ -0,0 +1 @@ +# CONFIG_TINYDRM_ST7586 is not set diff --git a/baseconfig/arm/CONFIG_TI_SCI_CLK b/baseconfig/arm/CONFIG_TI_SCI_CLK new file mode 100644 index 000000000..1cf634689 --- /dev/null +++ b/baseconfig/arm/CONFIG_TI_SCI_CLK @@ -0,0 +1 @@ +# CONFIG_TI_SCI_CLK is not set diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA b/baseconfig/arm/CONFIG_USB_CHIPIDEA similarity index 100% rename from baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA rename to baseconfig/arm/CONFIG_USB_CHIPIDEA diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_HOST b/baseconfig/arm/CONFIG_USB_CHIPIDEA_HOST similarity index 100% rename from baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_HOST rename to baseconfig/arm/CONFIG_USB_CHIPIDEA_HOST diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_UDC b/baseconfig/arm/CONFIG_USB_CHIPIDEA_UDC similarity index 100% rename from baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_UDC rename to baseconfig/arm/CONFIG_USB_CHIPIDEA_UDC diff --git a/baseconfig/arm/armv7/CONFIG_TWL4030_CORE b/baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI similarity index 81% rename from baseconfig/arm/armv7/CONFIG_TWL4030_CORE rename to baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI index 1f5b92782..d1a5cf9eb 100644 --- a/baseconfig/arm/armv7/CONFIG_TWL4030_CORE +++ b/baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI @@ -1 +1 @@ -# CONFIG_TWL4030_CORE is not set +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/CONFIG_USB_CONFIGFS_F_HID b/baseconfig/arm/CONFIG_USB_CONFIGFS_F_HID index c356c63ef..d8173d6b6 100644 --- a/baseconfig/arm/CONFIG_USB_CONFIGFS_F_HID +++ b/baseconfig/arm/CONFIG_USB_CONFIGFS_F_HID @@ -1 +1 @@ -# CONFIG_USB_CONFIGFS_F_HID is not set +CONFIG_USB_CONFIGFS_F_HID=y diff --git a/baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION b/baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION similarity index 100% rename from baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION rename to baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION diff --git a/baseconfig/arm/CONFIG_VIDEO_BCM2835 b/baseconfig/arm/CONFIG_VIDEO_BCM2835 new file mode 100644 index 000000000..192fdf645 --- /dev/null +++ b/baseconfig/arm/CONFIG_VIDEO_BCM2835 @@ -0,0 +1 @@ +# CONFIG_VIDEO_BCM2835 is not set diff --git a/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC b/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC new file mode 100644 index 000000000..499a44076 --- /dev/null +++ b/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC @@ -0,0 +1 @@ +CONFIG_VIDEO_MESON_AO_CEC=m diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_APEI_MEMORY_FAILURE b/baseconfig/arm/arm64/CONFIG_ACPI_APEI_MEMORY_FAILURE new file mode 100644 index 000000000..46aa1579f --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ACPI_APEI_MEMORY_FAILURE @@ -0,0 +1 @@ +CONFIG_ACPI_APEI_MEMORY_FAILURE=y diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_APEI_SEA b/baseconfig/arm/arm64/CONFIG_ACPI_APEI_SEA new file mode 100644 index 000000000..db573ffb8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ACPI_APEI_SEA @@ -0,0 +1 @@ +CONFIG_ACPI_APEI_SEA=y diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_BGRT b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT new file mode 100644 index 000000000..13035dd82 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT @@ -0,0 +1 @@ +CONFIG_ACPI_BGRT=y diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_CPPC_CPUFREQ b/baseconfig/arm/arm64/CONFIG_ACPI_CPPC_CPUFREQ index 5d20724da..5cc88132a 100644 --- a/baseconfig/arm/arm64/CONFIG_ACPI_CPPC_CPUFREQ +++ b/baseconfig/arm/arm64/CONFIG_ACPI_CPPC_CPUFREQ @@ -1 +1 @@ -# CONFIG_ACPI_CPPC_CPUFREQ is not set +CONFIG_ACPI_CPPC_CPUFREQ=m diff --git a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 index 5ce9e62f4..bacb61e5e 100644 --- a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_REALTEK b/baseconfig/arm/arm64/CONFIG_ARCH_REALTEK new file mode 100644 index 000000000..49536f6d5 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARCH_REALTEK @@ -0,0 +1 @@ +# CONFIG_ARCH_REALTEK is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC b/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC index 0439db330..1cafdb24f 100644 --- a/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC +++ b/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC @@ -1 +1 @@ -# CONFIG_ARCH_TEGRA_186_SOC is not set +CONFIG_ARCH_TEGRA_186_SOC=y diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN b/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN deleted file mode 100644 index 6081275c5..000000000 --- a/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_VULCAN is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_PMEM b/baseconfig/arm/arm64/CONFIG_ARM64_PMEM new file mode 100644 index 000000000..9325600d1 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_PMEM @@ -0,0 +1 @@ +# CONFIG_ARM64_PMEM is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST new file mode 100644 index 000000000..864fc6a6b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST @@ -0,0 +1 @@ +# CONFIG_ARM64_RELOC_TEST is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN index 3b878e832..294c8ec50 100644 --- a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN +++ b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN @@ -1 +1 @@ -# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_SW_TTBR0_PAN=y diff --git a/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ b/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ new file mode 100644 index 000000000..f0e165dfb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ @@ -0,0 +1 @@ +CONFIG_ARM_TEGRA186_CPUFREQ=m diff --git a/baseconfig/arm/arm64/CONFIG_AXP20X_ADC b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..025239f25 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X new file mode 100644 index 000000000..75591a277 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD new file mode 100644 index 000000000..9f36fb6a8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/arm64/CONFIG_CAVIUM_ERRATUM_30115 b/baseconfig/arm/arm64/CONFIG_CAVIUM_ERRATUM_30115 new file mode 100644 index 000000000..e3f4218af --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CAVIUM_ERRATUM_30115 @@ -0,0 +1 @@ +CONFIG_CAVIUM_ERRATUM_30115=y diff --git a/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB new file mode 100644 index 000000000..43a91eb0e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB @@ -0,0 +1 @@ +CONFIG_CHARGER_QCOM_SMBB=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X new file mode 100644 index 000000000..18ddc0770 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_HI655X=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM index ec4000095..2b7c64357 100644 --- a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 index 113c72b8c..dd0ae2c1d 100644 --- a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 @@ -1 +1 @@ -CONFIG_CRYPTO_AES_ARM64=m +CONFIG_CRYPTO_AES_ARM64=y diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP new file mode 100644 index 000000000..d5226e157 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_CAVIUM_ZIP=m diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL new file mode 100644 index 000000000..61cb97435 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_SAFEXCEL=m diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI index e305e243b..87b627906 100644 --- a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 000000000..397f69094 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 000000000..7595ae205 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 000000000..5d86a4597 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 000000000..ea1c4f918 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 000000000..16ac280e6 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX new file mode 100644 index 000000000..dae44bb02 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX @@ -0,0 +1 @@ +CONFIG_EDAC_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 000000000..b52487909 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X b/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X deleted file mode 100644 index 15f1c9373..000000000 --- a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GPIO_PCA953X=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX b/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX new file mode 100644 index 000000000..6895cc045 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX @@ -0,0 +1 @@ +CONFIG_GPIO_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_XLP b/baseconfig/arm/arm64/CONFIG_GPIO_XLP new file mode 100644 index 000000000..f99cd41f3 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_GPIO_XLP @@ -0,0 +1 @@ +CONFIG_GPIO_XLP=m diff --git a/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX new file mode 100644 index 000000000..bcc41c376 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX @@ -0,0 +1 @@ +CONFIG_I2C_XLP9XX=m diff --git a/baseconfig/arm/arm64/CONFIG_K3_DMA b/baseconfig/arm/arm64/CONFIG_K3_DMA index b698e7e5e..c64ec401c 100644 --- a/baseconfig/arm/arm64/CONFIG_K3_DMA +++ b/baseconfig/arm/arm64/CONFIG_K3_DMA @@ -1 +1 @@ -# CONFIG_K3_DMA is not set +CONFIG_K3_DMA=m diff --git a/baseconfig/arm/CONFIG_MFD_SPMI_PMIC b/baseconfig/arm/arm64/CONFIG_MFD_SPMI_PMIC similarity index 100% rename from baseconfig/arm/CONFIG_MFD_SPMI_PMIC rename to baseconfig/arm/arm64/CONFIG_MFD_SPMI_PMIC diff --git a/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX new file mode 100644 index 000000000..8c4640a79 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX @@ -0,0 +1 @@ +CONFIG_MMC_CAVIUM_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML new file mode 100644 index 000000000..48facf367 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML @@ -0,0 +1 @@ +CONFIG_MMC_QCOM_DML=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 index 457d918ff..9effe8611 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 index f65dc3662..87cf3fd89 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 @@ -1 +1 @@ -# CONFIG_MSM_GCC_8916 is not set +CONFIG_MSM_GCC_8916=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 index a492a6821..03ba44b34 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 index 62f48a9e8..8ffbd8055 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 index 166ddcce5..4b01d318d 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI b/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI new file mode 100644 index 000000000..bb77206de --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI @@ -0,0 +1 @@ +CONFIG_NET_VENDOR_SNI=y diff --git a/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 new file mode 100644 index 000000000..7d5cbcdbf --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 @@ -0,0 +1 @@ +CONFIG_NET_XGENE_V2=m diff --git a/baseconfig/arm/arm64/CONFIG_PARPORT_PC b/baseconfig/arm/arm64/CONFIG_PARPORT_PC deleted file mode 100644 index e2a0d3656..000000000 --- a/baseconfig/arm/arm64/CONFIG_PARPORT_PC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT_PC is not set diff --git a/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM b/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM new file mode 100644 index 000000000..cdb6169bd --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM @@ -0,0 +1 @@ +CONFIG_PCIE_DW_HOST_ECAM=y diff --git a/baseconfig/arm/arm64/CONFIG_PCIE_KIRIN b/baseconfig/arm/arm64/CONFIG_PCIE_KIRIN new file mode 100644 index 000000000..be6e297ea --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PCIE_KIRIN @@ -0,0 +1 @@ +CONFIG_PCIE_KIRIN=y diff --git a/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY b/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY new file mode 100644 index 000000000..1902b0c1f --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY @@ -0,0 +1 @@ +CONFIG_PHY_MVEBU_CP110_COMPHY=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP new file mode 100644 index 000000000..cba57faf8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 000000000..6512e59d2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS similarity index 100% rename from baseconfig/arm/CONFIG_PHY_QCOM_USB_HS rename to baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC similarity index 100% rename from baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC rename to baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC diff --git a/baseconfig/arm/arm64/CONFIG_PINCTRL_QCOM_SPMI_PMIC b/baseconfig/arm/arm64/CONFIG_PINCTRL_QCOM_SPMI_PMIC index 42b81a044..d24825e16 100644 --- a/baseconfig/arm/arm64/CONFIG_PINCTRL_QCOM_SPMI_PMIC +++ b/baseconfig/arm/arm64/CONFIG_PINCTRL_QCOM_SPMI_PMIC @@ -1 +1 @@ -CONFIG_PINCTRL_QCOM_SPMI_PMIC=m +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y diff --git a/baseconfig/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL similarity index 100% rename from baseconfig/CONFIG_QCOM_ADSP_PIL rename to baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_APCS_IPC b/baseconfig/arm/arm64/CONFIG_QCOM_APCS_IPC new file mode 100644 index 000000000..f8a0514ba --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_APCS_IPC @@ -0,0 +1 @@ +CONFIG_QCOM_APCS_IPC=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU b/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU new file mode 100644 index 000000000..b7e99b882 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU @@ -0,0 +1 @@ +CONFIG_QCOM_IOMMU=y diff --git a/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER b/baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER similarity index 100% rename from baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER rename to baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU new file mode 100644 index 000000000..ed899d66b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU @@ -0,0 +1 @@ +CONFIG_QCOM_L3_PMU=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL index b749a7daa..18d8fb792 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecfdb..000000000 --- a/baseconfig/arm/arm64/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL index bb8c24d61..b13cefb38 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE index 097a2d3e7..20610a95a 100644 --- a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE +++ b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE @@ -1 +1 @@ -# CONFIG_RANDOMIZE_BASE is not set +CONFIG_RANDOMIZE_BASE=y diff --git a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL new file mode 100644 index 000000000..7645a371e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL @@ -0,0 +1 @@ +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y diff --git a/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI b/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI new file mode 100644 index 000000000..eba374b73 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI @@ -0,0 +1 @@ +CONFIG_REGMAP_SPMI=y diff --git a/baseconfig/arm/arm64/CONFIG_RELOCATABLE b/baseconfig/arm/arm64/CONFIG_RELOCATABLE index ff7e13901..36808edb3 100644 --- a/baseconfig/arm/arm64/CONFIG_RELOCATABLE +++ b/baseconfig/arm/arm64/CONFIG_RELOCATABLE @@ -1 +1 @@ -# CONFIG_RELOCATABLE is not set +CONFIG_RELOCATABLE=y diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG b/baseconfig/arm/arm64/CONFIG_RPMSG new file mode 100644 index 000000000..7cc8785d0 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_GLINK_RPM b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_GLINK_RPM new file mode 100644 index 000000000..1f5ac58f2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_GLINK_RPM @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_GLINK_RPM=m diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 000000000..f65af3d10 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 000000000..207a5e523 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 000000000..db12f036e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/arm64/CONFIG_SNI_NETSEC b/baseconfig/arm/arm64/CONFIG_SNI_NETSEC new file mode 100644 index 000000000..c348519ff --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SNI_NETSEC @@ -0,0 +1 @@ +CONFIG_SNI_NETSEC=m diff --git a/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS b/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS new file mode 100644 index 000000000..ded5c358e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS @@ -0,0 +1 @@ +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y diff --git a/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 000000000..00413d459 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/arm64/CONFIG_SPI_XLP b/baseconfig/arm/arm64/CONFIG_SPI_XLP new file mode 100644 index 000000000..6026d5f51 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SPI_XLP @@ -0,0 +1 @@ +CONFIG_SPI_XLP=m diff --git a/baseconfig/arm/arm64/CONFIG_SPMI b/baseconfig/arm/arm64/CONFIG_SPMI new file mode 100644 index 000000000..4ce4dfde9 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SPMI @@ -0,0 +1 @@ +CONFIG_SPMI=y diff --git a/baseconfig/arm/arm64/CONFIG_SPMI_MSM_PMIC_ARB b/baseconfig/arm/arm64/CONFIG_SPMI_MSM_PMIC_ARB index 813a8d1d9..bd46b497a 100644 --- a/baseconfig/arm/arm64/CONFIG_SPMI_MSM_PMIC_ARB +++ b/baseconfig/arm/arm64/CONFIG_SPMI_MSM_PMIC_ARB @@ -1 +1 @@ -CONFIG_SPMI_MSM_PMIC_ARB=m +CONFIG_SPMI_MSM_PMIC_ARB=y diff --git a/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC new file mode 100644 index 000000000..97139c216 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 02cfb2c97..000000000 --- a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_H3_CCU is not set diff --git a/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS b/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS new file mode 100644 index 000000000..213edb5a1 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS @@ -0,0 +1 @@ +# CONFIG_USB_CONFIGFS_F_LB_SS is not set diff --git a/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS new file mode 100644 index 000000000..5e2512c4c --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_CAMSS=m diff --git a/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_VENUS b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_VENUS new file mode 100644 index 000000000..68082fdff --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_VENUS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_VENUS=m diff --git a/baseconfig/arm/arm64/CONFIG_VMAP_STACK b/baseconfig/arm/arm64/CONFIG_VMAP_STACK new file mode 100644 index 000000000..8bd986875 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VMAP_STACK @@ -0,0 +1 @@ +CONFIG_VMAP_STACK=y diff --git a/baseconfig/arm/armv7/CONFIG_AHCI_DM816 b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 new file mode 100644 index 000000000..ba4b51891 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 @@ -0,0 +1 @@ +CONFIG_AHCI_DM816=m diff --git a/baseconfig/arm/armv7/CONFIG_AXP20X_ADC b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..025239f25 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X new file mode 100644 index 000000000..75591a277 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/armv7/CONFIG_CGROUP_RDMA b/baseconfig/arm/armv7/CONFIG_CGROUP_RDMA new file mode 100644 index 000000000..94ae4f4bc --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_CGROUP_RDMA @@ -0,0 +1 @@ +# CONFIG_CGROUP_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 b/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 deleted file mode 100644 index c6e1136d0..000000000 --- a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_COMMON_CLK_MAX77802=m diff --git a/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG new file mode 100644 index 000000000..f60ff08ee --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_EXYNOS_RNG=m diff --git a/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE b/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE deleted file mode 100644 index e2ffa82ef..000000000 --- a/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CRYPTO_GHASH_ARM_CE is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 deleted file mode 100644 index bdb9d96a2..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_LG_LG4573=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 deleted file mode 100644 index 6a1aa6578..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 deleted file mode 100644 index aa66847bb..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_LD9040=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 deleted file mode 100644 index 8e8122a2d..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index e5e36406d..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index e3649f9de..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE deleted file mode 100644 index 1c716c97c..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SIMPLE=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND new file mode 100644 index 000000000..c1d1d2121 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND @@ -0,0 +1 @@ +CONFIG_DRM_SUN4I_BACKEND=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI new file mode 100644 index 000000000..cda1f60f8 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI @@ -0,0 +1 @@ +CONFIG_DRM_SUN4I_HDMI=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC new file mode 100644 index 000000000..8ba73409c --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC @@ -0,0 +1 @@ +# CONFIG_DRM_SUN4I_HDMI_CEC is not set diff --git a/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set b/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set deleted file mode 100644 index d161874fe..000000000 --- a/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXYNOS5420_MCPM not set diff --git a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS b/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS deleted file mode 100644 index 87c25300c..000000000 --- a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_HW_RANDOM_EXYNOS=m diff --git a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO deleted file mode 100644 index 7b38ce09b..000000000 --- a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_IIO_CROS_EC_BARO is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND b/baseconfig/arm/armv7/CONFIG_INFINIBAND new file mode 100644 index 000000000..b475048ed --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND @@ -0,0 +1 @@ +# CONFIG_INFINIBAND is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB3 b/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB3 new file mode 100644 index 000000000..f06c87360 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB3 @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_CXGB3 is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB4 b/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB4 new file mode 100644 index 000000000..40ff06894 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_CXGB4 @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_CXGB4 is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_I40IW b/baseconfig/arm/armv7/CONFIG_INFINIBAND_I40IW new file mode 100644 index 000000000..39998dbd7 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_I40IW @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_I40IW is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB new file mode 100644 index 000000000..5f27e681e --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_IPOIB is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_CM b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_CM new file mode 100644 index 000000000..b26396a7e --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_CM @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_IPOIB_CM is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG new file mode 100644 index 000000000..f1a19d66a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_IPOIB_DEBUG is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG_DATA b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG_DATA new file mode 100644 index 000000000..00e419c17 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_IPOIB_DEBUG_DATA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISER b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISER new file mode 100644 index 000000000..89d63b0a5 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISER @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_ISER is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISERT b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISERT new file mode 100644 index 000000000..a8c9bda68 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ISERT @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_ISERT is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_MTHCA b/baseconfig/arm/armv7/CONFIG_INFINIBAND_MTHCA new file mode 100644 index 000000000..a134e36a3 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_MTHCA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_MTHCA is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_NES b/baseconfig/arm/armv7/CONFIG_INFINIBAND_NES new file mode 100644 index 000000000..eee505590 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_NES @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_NES is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_OCRDMA b/baseconfig/arm/armv7/CONFIG_INFINIBAND_OCRDMA new file mode 100644 index 000000000..12ff35161 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_OCRDMA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_OCRDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_ON_DEMAND_PAGING b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ON_DEMAND_PAGING new file mode 100644 index 000000000..80be02a8b --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_ON_DEMAND_PAGING @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_ON_DEMAND_PAGING is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB b/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB new file mode 100644 index 000000000..591f4e962 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_QIB is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB_DCA b/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB_DCA new file mode 100644 index 000000000..810520ecc --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_QIB_DCA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_QIB_DCA is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_RDMAVT b/baseconfig/arm/armv7/CONFIG_INFINIBAND_RDMAVT new file mode 100644 index 000000000..b32d29489 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_RDMAVT @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_RDMAVT is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRP b/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRP new file mode 100644 index 000000000..27e9c13e6 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRP @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_SRP is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRPT b/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRPT new file mode 100644 index 000000000..ad99ea1ea --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_SRPT @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_SRPT is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_ACCESS b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_ACCESS new file mode 100644 index 000000000..e59e563c4 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_ACCESS @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_USER_ACCESS is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_MAD b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_MAD new file mode 100644 index 000000000..2dd5ad05d --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USER_MAD @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_USER_MAD is not set diff --git a/baseconfig/arm/armv7/CONFIG_INFINIBAND_USNIC b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USNIC new file mode 100644 index 000000000..3624c0fd6 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_INFINIBAND_USNIC @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_USNIC is not set diff --git a/baseconfig/arm/armv7/CONFIG_KEYSTONE_REMOTEPROC b/baseconfig/arm/armv7/CONFIG_KEYSTONE_REMOTEPROC new file mode 100644 index 000000000..c6ded13d3 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_KEYSTONE_REMOTEPROC @@ -0,0 +1 @@ +# CONFIG_KEYSTONE_REMOTEPROC is not set diff --git a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE b/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE deleted file mode 100644 index 226d75be9..000000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_PM8921_CORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_MLX4_INFINIBAND b/baseconfig/arm/armv7/CONFIG_MLX4_INFINIBAND new file mode 100644 index 000000000..84f627ee6 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MLX4_INFINIBAND @@ -0,0 +1 @@ +# CONFIG_MLX4_INFINIBAND is not set diff --git a/baseconfig/arm/armv7/CONFIG_MLX5_INFINIBAND b/baseconfig/arm/armv7/CONFIG_MLX5_INFINIBAND new file mode 100644 index 000000000..c09ba1a61 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MLX5_INFINIBAND @@ -0,0 +1 @@ +# CONFIG_MLX5_INFINIBAND is not set diff --git a/baseconfig/arm/armv7/CONFIG_MMA8452 b/baseconfig/arm/armv7/CONFIG_MMA8452 new file mode 100644 index 000000000..44b2d2ae8 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MMA8452 @@ -0,0 +1 @@ +CONFIG_MMA8452=m diff --git a/baseconfig/arm/armv7/CONFIG_NET_9P_RDMA b/baseconfig/arm/armv7/CONFIG_NET_9P_RDMA new file mode 100644 index 000000000..fce5acb9a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NET_9P_RDMA @@ -0,0 +1 @@ +# CONFIG_NET_9P_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM new file mode 100644 index 000000000..9407e7a4b --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM @@ -0,0 +1 @@ +CONFIG_NVMEM_IMX_IIM=m diff --git a/baseconfig/arm/armv7/CONFIG_NVME_RDMA b/baseconfig/arm/armv7/CONFIG_NVME_RDMA new file mode 100644 index 000000000..5815bee55 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NVME_RDMA @@ -0,0 +1 @@ +# CONFIG_NVME_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_NVME_TARGET_RDMA b/baseconfig/arm/armv7/CONFIG_NVME_TARGET_RDMA new file mode 100644 index 000000000..e57c5b285 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NVME_TARGET_RDMA @@ -0,0 +1 @@ +# CONFIG_NVME_TARGET_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_PATA_FTIDE010 b/baseconfig/arm/armv7/CONFIG_PATA_FTIDE010 new file mode 100644 index 000000000..c20fa4d0f --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PATA_FTIDE010 @@ -0,0 +1 @@ +# CONFIG_PATA_FTIDE010 is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX new file mode 100644 index 000000000..b401f79fb --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP new file mode 100644 index 000000000..8a6a68062 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_EP is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST new file mode 100644 index 000000000..7bbb2fd97 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_HOST is not set diff --git a/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX b/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aedf7..000000000 --- a/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 b/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 deleted file mode 100644 index c9a64229e..000000000 --- a/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_IMX35 is not set diff --git a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 index af3842f84..a821768d1 100644 --- a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 +++ b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 @@ -1 +1 @@ -# CONFIG_PL310_ERRATA_588369 is not set +CONFIG_PL310_ERRATA_588369=y diff --git a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 index 99df60574..4e4e5453f 100644 --- a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 +++ b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 @@ -1 +1 @@ -# CONFIG_PL310_ERRATA_727915 is not set +CONFIG_PL310_ERRATA_727915=y diff --git a/baseconfig/arm/armv7/CONFIG_PWM_TIECAP b/baseconfig/arm/armv7/CONFIG_PWM_TIECAP new file mode 100644 index 000000000..84f1e9b57 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PWM_TIECAP @@ -0,0 +1 @@ +CONFIG_PWM_TIECAP=m diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC new file mode 100644 index 000000000..1060913dd --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC @@ -0,0 +1 @@ +CONFIG_QCOM_PM8XXX_XOADC=m diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM deleted file mode 100644 index 69966daab..000000000 --- a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set diff --git a/baseconfig/arm/armv7/CONFIG_RDMA_RXE b/baseconfig/arm/armv7/CONFIG_RDMA_RXE new file mode 100644 index 000000000..66d4cbe32 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_RDMA_RXE @@ -0,0 +1 @@ +# CONFIG_RDMA_RXE is not set diff --git a/baseconfig/arm/armv7/CONFIG_RDS_RDMA b/baseconfig/arm/armv7/CONFIG_RDS_RDMA new file mode 100644 index 000000000..169ffb921 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_RDS_RDMA @@ -0,0 +1 @@ +# CONFIG_RDS_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 b/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 deleted file mode 100644 index f1e82abd5..000000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_ACT8865 is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc406..000000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP deleted file mode 100644 index 98a696d76..000000000 --- a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ROCKCHIP_CDN_DP is not set diff --git a/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X b/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X deleted file mode 100644 index 7dcdafcbb..000000000 --- a/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RTC_DRV_ARMADA38X=m diff --git a/baseconfig/arm/armv7/CONFIG_SECURITY_INFINIBAND b/baseconfig/arm/armv7/CONFIG_SECURITY_INFINIBAND new file mode 100644 index 000000000..8bcc67164 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SECURITY_INFINIBAND @@ -0,0 +1 @@ +# CONFIG_SECURITY_INFINIBAND is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 new file mode 100644 index 000000000..c22ad4a46 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98090=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID new file mode 100644 index 000000000..ece6cf56f --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID @@ -0,0 +1 @@ +CONFIG_SND_SOC_ODROID=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/CONFIG_SOC_DRA7XX similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX rename to baseconfig/arm/armv7/CONFIG_SOC_DRA7XX diff --git a/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 000000000..00413d459 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU b/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU new file mode 100644 index 000000000..3b2ba681a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU @@ -0,0 +1 @@ +CONFIG_SUN4I_A10_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC new file mode 100644 index 000000000..97139c216 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_A83T_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_A83T_CCU new file mode 100644 index 000000000..a4e88a43c --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_A83T_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_A83T_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU new file mode 100644 index 000000000..1729d1f68 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_DE2_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_DE2_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 542d6fc7d..000000000 --- a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU new file mode 100644 index 000000000..149900927 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_R40_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUNRPC_XPRT_RDMA b/baseconfig/arm/armv7/CONFIG_SUNRPC_XPRT_RDMA new file mode 100644 index 000000000..f0616cc93 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUNRPC_XPRT_RDMA @@ -0,0 +1 @@ +# CONFIG_SUNRPC_XPRT_RDMA is not set diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS b/baseconfig/arm/armv7/CONFIG_UBIFS_FS deleted file mode 100644 index e71980df4..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS=m diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR deleted file mode 100644 index f91c8cd6c..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ADVANCED_COMPR=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO deleted file mode 100644 index e743a6b32..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_LZO=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB deleted file mode 100644 index 18bffa1f1..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ZLIB=y diff --git a/baseconfig/arm/armv7/CONFIG_VIDEO_IMX_MEDIA b/baseconfig/arm/armv7/CONFIG_VIDEO_IMX_MEDIA new file mode 100644 index 000000000..fb99bb91a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_VIDEO_IMX_MEDIA @@ -0,0 +1 @@ +# CONFIG_VIDEO_IMX_MEDIA is not set diff --git a/baseconfig/arm/armv7/CONFIG_VIDEO_MUX b/baseconfig/arm/armv7/CONFIG_VIDEO_MUX new file mode 100644 index 000000000..b01b0b424 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_VIDEO_MUX @@ -0,0 +1 @@ +CONFIG_VIDEO_MUX=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 index 5ce9e62f4..bacb61e5e 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM new file mode 100644 index 000000000..13f2e3d86 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM @@ -0,0 +1 @@ +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ new file mode 100644 index 000000000..2be078588 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ @@ -0,0 +1 @@ +CONFIG_BATTERY_BQ27XXX_HDQ=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD new file mode 100644 index 000000000..9f36fb6a8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB new file mode 100644 index 000000000..43a91eb0e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB @@ -0,0 +1 @@ +CONFIG_CHARGER_QCOM_SMBB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM index ec4000095..2b7c64357 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index df6668885..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_COMMON_CLK_SI570=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_CRYPTO_DEV_OMAP b/baseconfig/arm/armv7/armv7/CONFIG_CRYPTO_DEV_OMAP new file mode 100644 index 000000000..98ff565f8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_CRYPTO_DEV_OMAP @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_OMAP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI index e305e243b..87b627906 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 000000000..397f69094 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 000000000..7595ae205 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 000000000..5d86a4597 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 000000000..ea1c4f918 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 000000000..16ac280e6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB new file mode 100644 index 000000000..e24a8952c --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB @@ -0,0 +1 @@ +CONFIG_DRM_MXSFB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 000000000..b52487909 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS new file mode 100644 index 000000000..33e5c6a93 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS @@ -0,0 +1 @@ +CONFIG_IMX7_PM_DOMAINS=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC b/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC new file mode 100644 index 000000000..53983d8af --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC @@ -0,0 +1 @@ +CONFIG_IMX_REMOTEPROC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC b/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC new file mode 100644 index 000000000..6360fee39 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC @@ -0,0 +1 @@ +CONFIG_MFD_SPMI_PMIC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML b/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML index 059d0d4f2..48facf367 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML +++ b/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML @@ -1 +1 @@ -CONFIG_MMC_QCOM_DML=m +CONFIG_MMC_QCOM_DML=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC new file mode 100644 index 000000000..40e2f68cb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_OF_ESDHC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 index 457d918ff..9effe8611 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 index a492a6821..03ba44b34 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 index 62f48a9e8..8ffbd8055 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 index 166ddcce5..4b01d318d 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/armv7/CONFIG_OMAP2_DSS_DEBUG b/baseconfig/arm/armv7/armv7/CONFIG_OMAP2_DSS_DEBUG similarity index 100% rename from baseconfig/arm/armv7/CONFIG_OMAP2_DSS_DEBUG rename to baseconfig/arm/armv7/armv7/CONFIG_OMAP2_DSS_DEBUG diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX deleted file mode 100644 index 7f8a147e3..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PCI_DRA7XX=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP new file mode 100644 index 000000000..cba57faf8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 000000000..6512e59d2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 000000000..61e98f856 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 000000000..0b25aa233 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 b/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 deleted file mode 100644 index a821768d1..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PL310_ERRATA_588369=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 b/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 deleted file mode 100644 index 4e4e5453f..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PL310_ERRATA_727915=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL new file mode 100644 index 000000000..0aa258124 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL @@ -0,0 +1 @@ +CONFIG_QCOM_ADSP_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_APCS_IPC b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_APCS_IPC new file mode 100644 index 000000000..f8a0514ba --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_APCS_IPC @@ -0,0 +1 @@ +CONFIG_QCOM_APCS_IPC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU new file mode 100644 index 000000000..b7e99b882 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU @@ -0,0 +1 @@ +CONFIG_QCOM_IOMMU=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL index b749a7daa..18d8fb792 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecfdb..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM new file mode 100644 index 000000000..7155372b9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM @@ -0,0 +1 @@ +CONFIG_QCOM_SPMI_TEMP_ALARM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL index bb8c24d61..b13cefb38 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X b/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X deleted file mode 100644 index 88b42f8e6..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RADIO_WL128X=m diff --git a/baseconfig/arm/CONFIG_REGMAP_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI similarity index 100% rename from baseconfig/arm/CONFIG_REGMAP_SPMI rename to baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI diff --git a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc406..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG new file mode 100644 index 000000000..7cc8785d0 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_GLINK_RPM b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_GLINK_RPM new file mode 100644 index 000000000..1f5ac58f2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_GLINK_RPM @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_GLINK_RPM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 000000000..f65af3d10 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_TWL4030 b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_TWL4030 index dcf57704b..5716e825c 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_TWL4030 +++ b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_TWL4030 @@ -1 +1 @@ -CONFIG_RTC_DRV_TWL4030=y +CONFIG_RTC_DRV_TWL4030=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS new file mode 100644 index 000000000..37161086e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS @@ -0,0 +1 @@ +CONFIG_SERIAL_UARTLITE_NR_UARTS=1 diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 000000000..f862f05a7 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOg=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 000000000..db12f036e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/CONFIG_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_SPMI similarity index 100% rename from baseconfig/arm/CONFIG_SPMI rename to baseconfig/arm/armv7/armv7/CONFIG_SPMI diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_ST b/baseconfig/arm/armv7/armv7/CONFIG_TI_ST deleted file mode 100644 index e6d0d4428..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_TI_ST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET b/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index defe64498..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_SYSCON_RESET=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA deleted file mode 100644 index 0b76e3525..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST deleted file mode 100644 index 1c14a4a6c..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_HOST=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC deleted file mode 100644 index 320052607..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_UDC=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS new file mode 100644 index 000000000..5e2512c4c --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_CAMSS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_VENUS b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_VENUS new file mode 100644 index 000000000..68082fdff --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_VENUS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_VENUS=m diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS b/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS deleted file mode 100644 index 71a38a48c..000000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC_TEGRA20_DAS is not set diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX deleted file mode 100644 index a11bb6971..000000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SOC_DRA7XX is not set diff --git a/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET b/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index defe64498..000000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_SYSCON_RESET=m diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM new file mode 100644 index 000000000..eb0464d08 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM @@ -0,0 +1 @@ +CONFIG_CRYPTO_CRCT10DIF_VPMSUM=m diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER new file mode 100644 index 000000000..a3acefe62 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER @@ -0,0 +1 @@ +# CONFIG_CRYPTO_VPMSUM_TESTER is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL b/baseconfig/powerpc/CONFIG_DRM_PANEL similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DRM_PANEL rename to baseconfig/powerpc/CONFIG_DRM_PANEL diff --git a/baseconfig/powerpc/CONFIG_HARDLOCKUP_DETECTOR b/baseconfig/powerpc/CONFIG_HARDLOCKUP_DETECTOR new file mode 100644 index 000000000..dc5ae5ce3 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_HARDLOCKUP_DETECTOR @@ -0,0 +1 @@ +CONFIG_HARDLOCKUP_DETECTOR=y diff --git a/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE b/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE index bbbf7d364..e7fe50c39 100644 --- a/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE +++ b/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE @@ -1 +1 @@ -CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y +# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set diff --git a/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF b/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index d2e2790aa..000000000 --- a/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MMC_SDHCI_OF=m diff --git a/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..2d1ad5bb1 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN new file mode 100644 index 000000000..46354e6a9 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN @@ -0,0 +1 @@ +CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN=y diff --git a/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS new file mode 100644 index 000000000..aa61b1ff3 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS @@ -0,0 +1 @@ +CONFIG_PPC_DT_CPU_FTRS=y diff --git a/baseconfig/powerpc/CONFIG_PPC_MEMTRACE b/baseconfig/powerpc/CONFIG_PPC_MEMTRACE new file mode 100644 index 000000000..c783714d8 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_MEMTRACE @@ -0,0 +1 @@ +# CONFIG_PPC_MEMTRACE is not set diff --git a/baseconfig/powerpc/CONFIG_PPC_VAS b/baseconfig/powerpc/CONFIG_PPC_VAS new file mode 100644 index 000000000..ec767da00 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_VAS @@ -0,0 +1 @@ +CONFIG_PPC_VAS=y diff --git a/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS b/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS new file mode 100644 index 000000000..31f260384 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS @@ -0,0 +1 @@ +CONFIG_SENSORS_IBM_CFFPS=m diff --git a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU index da6fd2882..ffe83031d 100644 --- a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU +++ b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU @@ -1 +1 @@ -# CONFIG_SPAPR_TCE_IOMMU is not set +CONFIG_SPAPR_TCE_IOMMU=y diff --git a/baseconfig/powerpc/CONFIG_SWIOTLB b/baseconfig/powerpc/CONFIG_SWIOTLB index 5405b65b4..ac62bf35e 100644 --- a/baseconfig/powerpc/CONFIG_SWIOTLB +++ b/baseconfig/powerpc/CONFIG_SWIOTLB @@ -1 +1 @@ -CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB is not set diff --git a/baseconfig/powerpc/CONFIG_TWL4030_CORE b/baseconfig/powerpc/CONFIG_TWL4030_CORE deleted file mode 100644 index 1f5b92782..000000000 --- a/baseconfig/powerpc/CONFIG_TWL4030_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_TWL4030_CORE is not set diff --git a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI b/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI deleted file mode 100644 index a78b62cb5..000000000 --- a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_OHCI_HCD_PCI=y diff --git a/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 new file mode 100644 index 000000000..9f1df8c24 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 @@ -0,0 +1 @@ +# CONFIG_VFIO_IOMMU_TYPE1 is not set diff --git a/baseconfig/powerpc/CONFIG_ZONE_DEVICE b/baseconfig/powerpc/CONFIG_ZONE_DEVICE new file mode 100644 index 000000000..ee4f1b8b2 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_ZONE_DEVICE @@ -0,0 +1 @@ +# CONFIG_ZONE_DEVICE is not set diff --git a/baseconfig/powerpc/CONFIG_ADB_PMU_LED_DISK b/baseconfig/powerpc/powerpc64/CONFIG_ADB_PMU_LED_DISK similarity index 100% rename from baseconfig/powerpc/CONFIG_ADB_PMU_LED_DISK rename to baseconfig/powerpc/powerpc64/CONFIG_ADB_PMU_LED_DISK diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN b/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN deleted file mode 100644 index 57d623ff2..000000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CPU_LITTLE_ENDIAN is not set diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX b/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX deleted file mode 100644 index 6982ed98a..000000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_MUX=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE b/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE deleted file mode 100644 index c8855e8a0..000000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_CORE=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU b/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU deleted file mode 100644 index 40eb65bc2..000000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_POWER7_CPU=y diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE b/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE deleted file mode 100644 index 32ecde504..000000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SERIAL_CORE=m diff --git a/baseconfig/s390x/CONFIG_ARCH_RANDOM b/baseconfig/s390x/CONFIG_ARCH_RANDOM new file mode 100644 index 000000000..51658fe1c --- /dev/null +++ b/baseconfig/s390x/CONFIG_ARCH_RANDOM @@ -0,0 +1 @@ +CONFIG_ARCH_RANDOM=y diff --git a/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA b/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA deleted file mode 100644 index 2e6c723ac..000000000 --- a/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_CPQ_CISS_DA is not set diff --git a/baseconfig/s390x/CONFIG_CHECKPOINT_RESTORE b/baseconfig/s390x/CONFIG_CHECKPOINT_RESTORE new file mode 100644 index 000000000..c554a09ce --- /dev/null +++ b/baseconfig/s390x/CONFIG_CHECKPOINT_RESTORE @@ -0,0 +1 @@ +CONFIG_CHECKPOINT_RESTORE=y diff --git a/baseconfig/s390x/CONFIG_CMA b/baseconfig/s390x/CONFIG_CMA new file mode 100644 index 000000000..309c9e771 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA @@ -0,0 +1 @@ +CONFIG_CMA=y diff --git a/baseconfig/s390x/CONFIG_CMA_AREAS b/baseconfig/s390x/CONFIG_CMA_AREAS new file mode 100644 index 000000000..5474a48e9 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_AREAS @@ -0,0 +1 @@ +CONFIG_CMA_AREAS=7 diff --git a/baseconfig/s390x/CONFIG_CMA_DEBUG b/baseconfig/s390x/CONFIG_CMA_DEBUG new file mode 100644 index 000000000..64ff80c56 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_DEBUG @@ -0,0 +1 @@ +# CONFIG_CMA_DEBUG is not set diff --git a/baseconfig/s390x/CONFIG_CMA_DEBUGFS b/baseconfig/s390x/CONFIG_CMA_DEBUGFS new file mode 100644 index 000000000..fba89903a --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_CMA_DEBUGFS is not set diff --git a/baseconfig/s390x/CONFIG_CRASH_DUMP b/baseconfig/s390x/CONFIG_CRASH_DUMP deleted file mode 100644 index 84bb04c03..000000000 --- a/baseconfig/s390x/CONFIG_CRASH_DUMP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CRASH_DUMP=y diff --git a/baseconfig/s390x/CONFIG_CRYPTO_PAES_S390 b/baseconfig/s390x/CONFIG_CRYPTO_PAES_S390 new file mode 100644 index 000000000..f7071dfd3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CRYPTO_PAES_S390 @@ -0,0 +1 @@ +CONFIG_CRYPTO_PAES_S390=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_GENERIC_PHY b/baseconfig/s390x/CONFIG_GENERIC_PHY similarity index 100% rename from baseconfig/powerpc/powerpc64p7/CONFIG_GENERIC_PHY rename to baseconfig/s390x/CONFIG_GENERIC_PHY diff --git a/baseconfig/s390x/CONFIG_HW_RANDOM_S390 b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 new file mode 100644 index 000000000..7108db8ff --- /dev/null +++ b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_S390=m diff --git a/baseconfig/s390x/CONFIG_I2C_PARPORT b/baseconfig/s390x/CONFIG_I2C_PARPORT deleted file mode 100644 index 87b55caf2..000000000 --- a/baseconfig/s390x/CONFIG_I2C_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PARPORT is not set diff --git a/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT deleted file mode 100644 index e18239222..000000000 --- a/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS new file mode 100644 index 000000000..6ace7a163 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS @@ -0,0 +1 @@ +CONFIG_MAX_PHYSMEM_BITS=46 diff --git a/baseconfig/s390x/CONFIG_MDIO_DEVICE b/baseconfig/s390x/CONFIG_MDIO_DEVICE new file mode 100644 index 000000000..67ac6bad8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MDIO_DEVICE @@ -0,0 +1 @@ +CONFIG_MDIO_DEVICE=m diff --git a/baseconfig/s390x/CONFIG_MEM_SOFT_DIRTY b/baseconfig/s390x/CONFIG_MEM_SOFT_DIRTY new file mode 100644 index 000000000..356f2edd8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MEM_SOFT_DIRTY @@ -0,0 +1 @@ +CONFIG_MEM_SOFT_DIRTY=y diff --git a/baseconfig/s390x/CONFIG_MFD_BD9571MWV b/baseconfig/s390x/CONFIG_MFD_BD9571MWV new file mode 100644 index 000000000..d321ad3c6 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_BD9571MWV @@ -0,0 +1 @@ +# CONFIG_MFD_BD9571MWV is not set diff --git a/baseconfig/s390x/CONFIG_MFD_RTSX_USB b/baseconfig/s390x/CONFIG_MFD_RTSX_USB new file mode 100644 index 000000000..b6efa65e7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_RTSX_USB @@ -0,0 +1 @@ +# CONFIG_MFD_RTSX_USB is not set diff --git a/baseconfig/s390x/CONFIG_MFD_TPS68470 b/baseconfig/s390x/CONFIG_MFD_TPS68470 new file mode 100644 index 000000000..e82f415aa --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_TPS68470 @@ -0,0 +1 @@ +# CONFIG_MFD_TPS68470 is not set diff --git a/baseconfig/s390x/CONFIG_MFD_VIPERBOARD b/baseconfig/s390x/CONFIG_MFD_VIPERBOARD new file mode 100644 index 000000000..1d4d00579 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_VIPERBOARD @@ -0,0 +1 @@ +# CONFIG_MFD_VIPERBOARD is not set diff --git a/baseconfig/s390x/CONFIG_PARPORT b/baseconfig/s390x/CONFIG_PARPORT deleted file mode 100644 index 9dd8f33af..000000000 --- a/baseconfig/s390x/CONFIG_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT is not set diff --git a/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..2d1ad5bb1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/s390x/CONFIG_PKEY b/baseconfig/s390x/CONFIG_PKEY new file mode 100644 index 000000000..ec0fc60b1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_PKEY @@ -0,0 +1 @@ +CONFIG_PKEY=m diff --git a/baseconfig/s390x/CONFIG_S390_CCW_IOMMU b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU new file mode 100644 index 000000000..7dd58dfa7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU @@ -0,0 +1 @@ +CONFIG_S390_CCW_IOMMU=y diff --git a/baseconfig/s390x/CONFIG_VFIO_CCW b/baseconfig/s390x/CONFIG_VFIO_CCW new file mode 100644 index 000000000..15f7493a4 --- /dev/null +++ b/baseconfig/s390x/CONFIG_VFIO_CCW @@ -0,0 +1 @@ +CONFIG_VFIO_CCW=m diff --git a/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE b/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE new file mode 100644 index 000000000..aee0667ac --- /dev/null +++ b/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE @@ -0,0 +1 @@ +CONFIG_VMCP_CMA_SIZE=4 diff --git a/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG b/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG new file mode 100644 index 000000000..c2c51192e --- /dev/null +++ b/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG @@ -0,0 +1 @@ +CONFIG_PINCTRL_LEWISBURG=m diff --git a/baseconfig/x86/CONFIG_DELL_WMI_LED b/baseconfig/x86/CONFIG_DELL_WMI_LED new file mode 100644 index 000000000..23d945e59 --- /dev/null +++ b/baseconfig/x86/CONFIG_DELL_WMI_LED @@ -0,0 +1 @@ +CONFIG_DELL_WMI_LED=m diff --git a/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE new file mode 100644 index 000000000..d48518abd --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE @@ -0,0 +1 @@ +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL b/baseconfig/x86/CONFIG_DRM_PANEL similarity index 100% rename from baseconfig/x86/i686/CONFIG_DRM_PANEL rename to baseconfig/x86/CONFIG_DRM_PANEL diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LVDS b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..6d4d3c7c6 --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/x86/CONFIG_DRM_VBOXVIDEO b/baseconfig/x86/CONFIG_DRM_VBOXVIDEO new file mode 100644 index 000000000..8597a5dbb --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_VBOXVIDEO @@ -0,0 +1 @@ +CONFIG_DRM_VBOXVIDEO=m diff --git a/baseconfig/x86/CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH b/baseconfig/x86/CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH new file mode 100644 index 000000000..4b0b2944d --- /dev/null +++ b/baseconfig/x86/CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH @@ -0,0 +1 @@ +# CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH is not set diff --git a/baseconfig/x86/CONFIG_EXTCON b/baseconfig/x86/CONFIG_EXTCON new file mode 100644 index 000000000..bde29bcfc --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON @@ -0,0 +1 @@ +CONFIG_EXTCON=y diff --git a/baseconfig/x86/CONFIG_EXTCON_GPIO b/baseconfig/x86/CONFIG_EXTCON_GPIO new file mode 100644 index 000000000..87ca2bd05 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_GPIO is not set diff --git a/baseconfig/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 similarity index 100% rename from baseconfig/CONFIG_EXTCON_INTEL_INT3496 rename to baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 diff --git a/baseconfig/x86/CONFIG_EXTCON_MAX3355 b/baseconfig/x86/CONFIG_EXTCON_MAX3355 new file mode 100644 index 000000000..680b5a774 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_MAX3355 @@ -0,0 +1 @@ +# CONFIG_EXTCON_MAX3355 is not set diff --git a/baseconfig/x86/CONFIG_EXTCON_RT8973A b/baseconfig/x86/CONFIG_EXTCON_RT8973A new file mode 100644 index 000000000..e5f7236c9 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_RT8973A @@ -0,0 +1 @@ +# CONFIG_EXTCON_RT8973A is not set diff --git a/baseconfig/x86/CONFIG_EXTCON_SM5502 b/baseconfig/x86/CONFIG_EXTCON_SM5502 new file mode 100644 index 000000000..916994aa9 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_SM5502 @@ -0,0 +1 @@ +# CONFIG_EXTCON_SM5502 is not set diff --git a/baseconfig/x86/CONFIG_EXTCON_USB_GPIO b/baseconfig/x86/CONFIG_EXTCON_USB_GPIO new file mode 100644 index 000000000..7a0c9af30 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_USB_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_USB_GPIO is not set diff --git a/baseconfig/x86/CONFIG_GPIO_IT87 b/baseconfig/x86/CONFIG_GPIO_IT87 new file mode 100644 index 000000000..00746d711 --- /dev/null +++ b/baseconfig/x86/CONFIG_GPIO_IT87 @@ -0,0 +1 @@ +CONFIG_GPIO_IT87=m diff --git a/baseconfig/x86/CONFIG_HARDLOCKUP_DETECTOR b/baseconfig/x86/CONFIG_HARDLOCKUP_DETECTOR new file mode 100644 index 000000000..dc5ae5ce3 --- /dev/null +++ b/baseconfig/x86/CONFIG_HARDLOCKUP_DETECTOR @@ -0,0 +1 @@ +CONFIG_HARDLOCKUP_DETECTOR=y diff --git a/baseconfig/x86/CONFIG_HYPERV_VSOCKETS b/baseconfig/x86/CONFIG_HYPERV_VSOCKETS new file mode 100644 index 000000000..bd21cd675 --- /dev/null +++ b/baseconfig/x86/CONFIG_HYPERV_VSOCKETS @@ -0,0 +1 @@ +CONFIG_HYPERV_VSOCKETS=m diff --git a/baseconfig/x86/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/x86/CONFIG_I2C_DESIGNWARE_CORE index 661ffb01a..f9cdc633b 100644 --- a/baseconfig/x86/CONFIG_I2C_DESIGNWARE_CORE +++ b/baseconfig/x86/CONFIG_I2C_DESIGNWARE_CORE @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_CORE=m +CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/x86/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/x86/CONFIG_I2C_DESIGNWARE_PLATFORM index cec2f8633..3d50a3e8a 100644 --- a/baseconfig/x86/CONFIG_I2C_DESIGNWARE_PLATFORM +++ b/baseconfig/x86/CONFIG_I2C_DESIGNWARE_PLATFORM @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_PLATFORM=m +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/CONFIG_I2C_PARPORT b/baseconfig/x86/CONFIG_I2C_PARPORT similarity index 100% rename from baseconfig/CONFIG_I2C_PARPORT rename to baseconfig/x86/CONFIG_I2C_PARPORT diff --git a/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT new file mode 100644 index 000000000..1dbc68883 --- /dev/null +++ b/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT @@ -0,0 +1 @@ +CONFIG_I2C_PARPORT_LIGHT=m diff --git a/baseconfig/x86/CONFIG_INFINIBAND_VMWARE_PVRDMA b/baseconfig/x86/CONFIG_INFINIBAND_VMWARE_PVRDMA new file mode 100644 index 000000000..164f3b26c --- /dev/null +++ b/baseconfig/x86/CONFIG_INFINIBAND_VMWARE_PVRDMA @@ -0,0 +1 @@ +CONFIG_INFINIBAND_VMWARE_PVRDMA=m diff --git a/baseconfig/x86/CONFIG_INTEL_ATOMISP b/baseconfig/x86/CONFIG_INTEL_ATOMISP new file mode 100644 index 000000000..fde06c533 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_ATOMISP @@ -0,0 +1 @@ +# CONFIG_INTEL_ATOMISP is not set diff --git a/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE new file mode 100644 index 000000000..7657a9a07 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE @@ -0,0 +1 @@ +CONFIG_INTEL_CHT_INT33FE=m diff --git a/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 000000000..f416f2ddc --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +# CONFIG_INTEL_INT0002_VGPIO is not set diff --git a/baseconfig/x86/CONFIG_INTEL_RDT b/baseconfig/x86/CONFIG_INTEL_RDT new file mode 100644 index 000000000..0dcef9a32 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_RDT @@ -0,0 +1 @@ +CONFIG_INTEL_RDT=y diff --git a/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 000000000..2d14c0346 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +# CONFIG_INTEL_SOC_PMIC_CHTWC is not set diff --git a/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 000000000..22502e981 --- /dev/null +++ b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +CONFIG_LOAD_UEFI_KEYS=y diff --git a/baseconfig/x86/CONFIG_MAXSMP b/baseconfig/x86/CONFIG_MAXSMP index 8d0fa581d..d0d71de53 100644 --- a/baseconfig/x86/CONFIG_MAXSMP +++ b/baseconfig/x86/CONFIG_MAXSMP @@ -1 +1 @@ -CONFIG_MAXSMP=y +# CONFIG_MAXSMP is not set diff --git a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI b/baseconfig/x86/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index c2bb7cecf..000000000 --- a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MODULE_SIG_UEFI=y diff --git a/baseconfig/x86/CONFIG_PARPORT b/baseconfig/x86/CONFIG_PARPORT new file mode 100644 index 000000000..589156958 --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT @@ -0,0 +1 @@ +CONFIG_PARPORT=m diff --git a/baseconfig/CONFIG_PARPORT_1284 b/baseconfig/x86/CONFIG_PARPORT_1284 similarity index 100% rename from baseconfig/CONFIG_PARPORT_1284 rename to baseconfig/x86/CONFIG_PARPORT_1284 diff --git a/baseconfig/CONFIG_PARPORT_AX88796 b/baseconfig/x86/CONFIG_PARPORT_AX88796 similarity index 100% rename from baseconfig/CONFIG_PARPORT_AX88796 rename to baseconfig/x86/CONFIG_PARPORT_AX88796 diff --git a/baseconfig/x86/CONFIG_PARPORT_PC b/baseconfig/x86/CONFIG_PARPORT_PC new file mode 100644 index 000000000..b9aa6e8ca --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_PC @@ -0,0 +1 @@ +CONFIG_PARPORT_PC=m diff --git a/baseconfig/CONFIG_PARPORT_PC_FIFO b/baseconfig/x86/CONFIG_PARPORT_PC_FIFO similarity index 100% rename from baseconfig/CONFIG_PARPORT_PC_FIFO rename to baseconfig/x86/CONFIG_PARPORT_PC_FIFO diff --git a/baseconfig/CONFIG_PARPORT_PC_PCMCIA b/baseconfig/x86/CONFIG_PARPORT_PC_PCMCIA similarity index 100% rename from baseconfig/CONFIG_PARPORT_PC_PCMCIA rename to baseconfig/x86/CONFIG_PARPORT_PC_PCMCIA diff --git a/baseconfig/CONFIG_PARPORT_PC_SUPERIO b/baseconfig/x86/CONFIG_PARPORT_PC_SUPERIO similarity index 100% rename from baseconfig/CONFIG_PARPORT_PC_SUPERIO rename to baseconfig/x86/CONFIG_PARPORT_PC_SUPERIO diff --git a/baseconfig/CONFIG_PARPORT_SERIAL b/baseconfig/x86/CONFIG_PARPORT_SERIAL similarity index 100% rename from baseconfig/CONFIG_PARPORT_SERIAL rename to baseconfig/x86/CONFIG_PARPORT_SERIAL diff --git a/baseconfig/x86/CONFIG_PEAQ_WMI b/baseconfig/x86/CONFIG_PEAQ_WMI new file mode 100644 index 000000000..942e0690e --- /dev/null +++ b/baseconfig/x86/CONFIG_PEAQ_WMI @@ -0,0 +1 @@ +CONFIG_PEAQ_WMI=m diff --git a/baseconfig/x86/CONFIG_PINCTRL_DENVERTON b/baseconfig/x86/CONFIG_PINCTRL_DENVERTON new file mode 100644 index 000000000..ec6b4e8e1 --- /dev/null +++ b/baseconfig/x86/CONFIG_PINCTRL_DENVERTON @@ -0,0 +1 @@ +CONFIG_PINCTRL_DENVERTON=m diff --git a/baseconfig/CONFIG_PPS_CLIENT_PARPORT b/baseconfig/x86/CONFIG_PPS_CLIENT_PARPORT similarity index 100% rename from baseconfig/CONFIG_PPS_CLIENT_PARPORT rename to baseconfig/x86/CONFIG_PPS_CLIENT_PARPORT diff --git a/baseconfig/x86/CONFIG_SND_INTEL8X0 b/baseconfig/x86/CONFIG_SND_INTEL8X0 new file mode 100644 index 000000000..6d78f08ea --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_INTEL8X0 @@ -0,0 +1 @@ +CONFIG_SND_INTEL8X0=m diff --git a/baseconfig/x86/CONFIG_SND_INTEL8X0M b/baseconfig/x86/CONFIG_SND_INTEL8X0M new file mode 100644 index 000000000..24ac6ada4 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_INTEL8X0M @@ -0,0 +1 @@ +CONFIG_SND_INTEL8X0M=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_ES8316 b/baseconfig/x86/CONFIG_SND_SOC_ES8316 new file mode 100644 index 000000000..c173cadd5 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_ES8316 @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES8316=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH new file mode 100644 index 000000000..0697694f9 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH new file mode 100644 index 000000000..33cb51b40 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH new file mode 100644 index 000000000..db07e5fb0 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH new file mode 100644 index 000000000..139a693b5 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH new file mode 100644 index 000000000..8fccaf1bd --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_VIA82XX b/baseconfig/x86/CONFIG_SND_VIA82XX new file mode 100644 index 000000000..129cf3976 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_VIA82XX @@ -0,0 +1 @@ +CONFIG_SND_VIA82XX=m diff --git a/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM b/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM new file mode 100644 index 000000000..81e80f3a5 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM @@ -0,0 +1 @@ +CONFIG_SND_VIA82XX_MODEM=m diff --git a/baseconfig/CONFIG_USB_SERIAL_MOS7715_PARPORT b/baseconfig/x86/CONFIG_USB_SERIAL_MOS7715_PARPORT similarity index 100% rename from baseconfig/CONFIG_USB_SERIAL_MOS7715_PARPORT rename to baseconfig/x86/CONFIG_USB_SERIAL_MOS7715_PARPORT diff --git a/baseconfig/x86/CONFIG_WMI_BMOF b/baseconfig/x86/CONFIG_WMI_BMOF new file mode 100644 index 000000000..61dcf543b --- /dev/null +++ b/baseconfig/x86/CONFIG_WMI_BMOF @@ -0,0 +1 @@ +CONFIG_WMI_BMOF=m diff --git a/baseconfig/x86/CONFIG_XEN_DOM0 b/baseconfig/x86/CONFIG_XEN_DOM0 new file mode 100644 index 000000000..c5cb5d24a --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_DOM0 @@ -0,0 +1 @@ +CONFIG_XEN_DOM0=y diff --git a/baseconfig/x86/CONFIG_XEN_PV b/baseconfig/x86/CONFIG_XEN_PV new file mode 100644 index 000000000..89203e84e --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PV @@ -0,0 +1 @@ +CONFIG_XEN_PV=y diff --git a/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND b/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND new file mode 100644 index 000000000..3a5b2c46d --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND @@ -0,0 +1 @@ +# CONFIG_XEN_PVCALLS_BACKEND is not set diff --git a/baseconfig/x86/CONFIG_XEN_PVHVM b/baseconfig/x86/CONFIG_XEN_PVHVM new file mode 100644 index 000000000..be722d220 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PVHVM @@ -0,0 +1 @@ +CONFIG_XEN_PVHVM=y diff --git a/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 b/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index aa746413a..000000000 --- a/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/x86/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686/CONFIG_EDAC_AMD76X similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_AMD76X rename to baseconfig/x86/i686/CONFIG_EDAC_AMD76X diff --git a/baseconfig/x86/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686/CONFIG_EDAC_E7XXX similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_E7XXX rename to baseconfig/x86/i686/CONFIG_EDAC_E7XXX diff --git a/baseconfig/x86/CONFIG_EDAC_I82860 b/baseconfig/x86/i686/CONFIG_EDAC_I82860 similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_I82860 rename to baseconfig/x86/i686/CONFIG_EDAC_I82860 diff --git a/baseconfig/x86/CONFIG_EDAC_I82875P b/baseconfig/x86/i686/CONFIG_EDAC_I82875P similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_I82875P rename to baseconfig/x86/i686/CONFIG_EDAC_I82875P diff --git a/baseconfig/x86/CONFIG_EDAC_R82600 b/baseconfig/x86/i686/CONFIG_EDAC_R82600 similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_R82600 rename to baseconfig/x86/i686/CONFIG_EDAC_R82600 diff --git a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d85..000000000 --- a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF b/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX b/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aedf7..000000000 --- a/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 b/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index aa746413a..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c247..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index 9d584f6ab..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index 64dedb057..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X new file mode 100644 index 000000000..fe5952e70 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X @@ -0,0 +1 @@ +CONFIG_EDAC_AMD76X=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX new file mode 100644 index 000000000..0322ddb69 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX @@ -0,0 +1 @@ +CONFIG_EDAC_E7XXX=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 new file mode 100644 index 000000000..5e132db1a --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 @@ -0,0 +1 @@ +CONFIG_EDAC_I82860=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P new file mode 100644 index 000000000..dbe32d406 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P @@ -0,0 +1 @@ +CONFIG_EDAC_I82875P=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 new file mode 100644 index 000000000..93a01e506 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 @@ -0,0 +1 @@ +CONFIG_EDAC_R82600=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d85..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF b/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX b/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aedf7..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/x86/x86_64/CONFIG_88EU_AP_MODE b/baseconfig/x86/x86_64/CONFIG_88EU_AP_MODE new file mode 100644 index 000000000..8ba98fbe9 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_88EU_AP_MODE @@ -0,0 +1 @@ +CONFIG_88EU_AP_MODE=y diff --git a/baseconfig/x86/x86_64/CONFIG_AK8975 b/baseconfig/x86/x86_64/CONFIG_AK8975 new file mode 100644 index 000000000..547c21a99 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AK8975 @@ -0,0 +1 @@ +CONFIG_AK8975=m diff --git a/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT new file mode 100644 index 000000000..f9eacfabc --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT @@ -0,0 +1 @@ +CONFIG_AMD_MEM_ENCRYPT=y diff --git a/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT new file mode 100644 index 000000000..e41f0cf8f --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT @@ -0,0 +1 @@ +# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AQTION b/baseconfig/x86/x86_64/CONFIG_AQTION new file mode 100644 index 000000000..7812ca016 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AQTION @@ -0,0 +1 @@ +CONFIG_AQTION=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..0960ee661 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +# CONFIG_AXP20X_ADC is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER new file mode 100644 index 000000000..e02cee707 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER @@ -0,0 +1 @@ +# CONFIG_AXP20X_POWER is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_ADC b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC new file mode 100644 index 000000000..e138f36af --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC @@ -0,0 +1 @@ +CONFIG_AXP288_ADC=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER new file mode 100644 index 000000000..0418f962c --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER @@ -0,0 +1 @@ +CONFIG_AXP288_CHARGER=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE new file mode 100644 index 000000000..e171b954b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE @@ -0,0 +1 @@ +CONFIG_AXP288_FUEL_GAUGE=m diff --git a/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 new file mode 100644 index 000000000..669e6ac2e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 @@ -0,0 +1 @@ +CONFIG_BATTERY_MAX17042=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 new file mode 100644 index 000000000..3128bb676 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 @@ -0,0 +1 @@ +CONFIG_CHARGER_BQ24190=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION new file mode 100644 index 000000000..3aa5a5f70 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_CHT_WC_PMIC_OPREGION=y diff --git a/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE b/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE new file mode 100644 index 000000000..ef0a4ad5b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE @@ -0,0 +1 @@ +CONFIG_DEVICE_PRIVATE=y diff --git a/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC b/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC new file mode 100644 index 000000000..c790e941b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC @@ -0,0 +1 @@ +CONFIG_DEVICE_PUBLIC=y diff --git a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL b/baseconfig/x86/x86_64/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c247..000000000 --- a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 new file mode 100644 index 000000000..7fadeb58d --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 @@ -0,0 +1 @@ +CONFIG_EXTCON_AXP288=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC new file mode 100644 index 000000000..06e0472e8 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC @@ -0,0 +1 @@ +CONFIG_EXTCON_INTEL_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 new file mode 100644 index 000000000..c71682292 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 @@ -0,0 +1 @@ +# CONFIG_GPIO_AXP209 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR b/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR new file mode 100644 index 000000000..11dfee6c1 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR @@ -0,0 +1 @@ +CONFIG_HMM_MIRROR=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC new file mode 100644 index 000000000..f656e03fc --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC @@ -0,0 +1 @@ +CONFIG_I2C_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI new file mode 100644 index 000000000..6103f947e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_PCI=y diff --git a/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC new file mode 100644 index 000000000..d79565e48 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC @@ -0,0 +1 @@ +CONFIG_INFINIBAND_OPA_VNIC=m diff --git a/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK new file mode 100644 index 000000000..e2fbdf907 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK @@ -0,0 +1 @@ +CONFIG_INPUT_AXP20X_PEK=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 000000000..7ab08bb0e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +CONFIG_INTEL_INT0002_VGPIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 000000000..2f8920510 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +CONFIG_INTEL_SOC_PMIC_CHTWC=y diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C new file mode 100644 index 000000000..8ec049b05 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_I2C=m diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO new file mode 100644 index 000000000..ae4889d92 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_IIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT b/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT new file mode 100644 index 000000000..4a06cfcc2 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT @@ -0,0 +1 @@ +CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT=y diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X new file mode 100644 index 000000000..ada79c0d1 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X=y diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C new file mode 100644 index 000000000..22c60295b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X_I2C=y diff --git a/baseconfig/x86/x86_64/CONFIG_NR_CPUS b/baseconfig/x86/x86_64/CONFIG_NR_CPUS index 441191641..27d187f4d 100644 --- a/baseconfig/x86/x86_64/CONFIG_NR_CPUS +++ b/baseconfig/x86/x86_64/CONFIG_NR_CPUS @@ -1 +1 @@ -CONFIG_NR_CPUS=8192 +CONFIG_NR_CPUS=1024 diff --git a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX b/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX deleted file mode 100644 index 3fd0f86b1..000000000 --- a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/x86/x86_64/CONFIG_PAGE_TABLE_ISOLATION b/baseconfig/x86/x86_64/CONFIG_PAGE_TABLE_ISOLATION new file mode 100644 index 000000000..6881a7757 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_PAGE_TABLE_ISOLATION @@ -0,0 +1 @@ +CONFIG_PAGE_TABLE_ISOLATION=y diff --git a/baseconfig/x86/x86_64/CONFIG_R8188EU b/baseconfig/x86/x86_64/CONFIG_R8188EU new file mode 100644 index 000000000..ed7c3546e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_R8188EU @@ -0,0 +1 @@ +CONFIG_R8188EU=m diff --git a/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI new file mode 100644 index 000000000..25b017354 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI @@ -0,0 +1 @@ +CONFIG_SILEAD_DMI=y diff --git a/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM new file mode 100644 index 000000000..060ebfc94 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM @@ -0,0 +1 @@ +CONFIG_USB_XHCI_PLATFORM=m diff --git a/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL b/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL new file mode 100644 index 000000000..db301f396 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL @@ -0,0 +1 @@ +# CONFIG_X86_5LEVEL is not set diff --git a/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION new file mode 100644 index 000000000..8c98df142 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_XPOWER_PMIC_OPREGION=y diff --git a/bcm2837-bluetooth-support.patch b/bcm2837-bluetooth-support.patch new file mode 100644 index 000000000..c272c1efe --- /dev/null +++ b/bcm2837-bluetooth-support.patch @@ -0,0 +1,36 @@ +From 50252c318fe2fcfcbd0832fa835e7fd1fafd7d2d Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 10 Sep 2017 19:30:02 +0100 +Subject: [PATCH 2/2] ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave + +Add BCM43438 (bluetooth) as a slave device of uart0 (pl011/ttyAMA0). +This allows to automatically insert the bcm43438 to the bluetooth +subsystem instead of relying on userspace helpers (hciattach). + +Overwrite chosen/stdout-path to use 8250 aux uart as console. + +Signed-off-by: Loic Poulain +Signed-off-by: Peter Robinson +--- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +index 20725ca487f3..e4488cb3067e 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -24,6 +29,11 @@ + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; + status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <2000000>; ++ }; + }; + + /* uart1 is mapped to the pin header */ +-- +2.13.5 + diff --git a/bcm2837-initial-support.patch b/bcm2837-initial-support.patch deleted file mode 100644 index 021ae1069..000000000 --- a/bcm2837-initial-support.patch +++ /dev/null @@ -1,48 +0,0 @@ -From patchwork Tue Apr 25 16:45:08 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) -From: Eric Anholt -X-Patchwork-Id: 9698781 -Message-Id: <20170425164508.32242-1-eric@anholt.net> -To: Lee Jones , Florian Fainelli , - Olof Johansson , Rob Herring , - Mark Rutland , devicetree@vger.kernel.org -Cc: Stefan Wahren , linux-kernel@vger.kernel.org, - Eric Anholt , bcm-kernel-feedback-list@broadcom.com, - Gerd Hoffmann , linux-arm-kernel@lists.infradead.org, - linux-rpi-kernel@lists.infradead.org -Date: Tue, 25 Apr 2017 09:45:08 -0700 - -Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for -now, so it's useful to be able to test that mode on an upstream -kernel. It's also been useful for me to use the same board for 32-bit -and 64-bit development. - -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + - 2 files changed, 2 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 011808490fed..eded842d9978 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ - bcm2836-rpi-2-b.dtb \ -+ bcm2837-rpi-3-b.dtb \ - bcm2835-rpi-zero.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 100644 -index 000000000000..c72a27d908b6 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -0,0 +1 @@ -+#include "../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts" diff --git a/bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe.patch b/bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe.patch new file mode 100644 index 000000000..c6f7f12de --- /dev/null +++ b/bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe.patch @@ -0,0 +1,127 @@ +From patchwork Thu Aug 3 15:52:08 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v3] dma-mapping: skip USB devices when configuring DMA during probe +From: Johan Hovold +X-Patchwork-Id: 9879371 +Message-Id: <20170803155208.22165-1-johan@kernel.org> +To: Christoph Hellwig , + Marek Szyprowski , + Greg Kroah-Hartman +Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , + linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, + Alan Stern , Johan Hovold , + stable , Robin Murphy , + Sricharan R , + Stefan Wahren +Date: Thu, 3 Aug 2017 17:52:08 +0200 + +USB devices use the DMA mask and offset of the controller, which have +already been setup when a device is probed. Note that modifying the +DMA mask of a USB device would change the mask for the controller (and +all devices on the bus) as the mask is literally shared. + +Since commit 2bf698671205 ("USB: of: fix root-hub device-tree node +handling"), of_dma_configure() would be called also for root hubs, which +use the device node of the controller. A separate, long-standing bug +that makes of_dma_configure() generate a 30-bit DMA mask from the RPI3's +"dma-ranges" would thus set a broken mask also for the controller. This +in turn prevents USB devices from enumerating when control transfers +fail: + + dwc2 3f980000.usb: Cannot do DMA to address 0x000000003a166a00 + +Note that the aforementioned DMA-mask bug was benign for the HCD itself +as the dwc2 driver overwrites the mask previously set by +of_dma_configure() for the platform device in its probe callback. The +mask would only later get corrupted when the root-hub child device was +probed. + +Fix this, and similar future problems, by adding a flag to struct device +which prevents driver core from calling dma_configure() during probe and +making sure it is set for USB devices. + +Fixes: 09515ef5ddad ("of/acpi: Configure dma operations at probe time for platform/amba/pci bus devices") +Cc: stable # 4.12 +Cc: Robin Murphy +Cc: Sricharan R +Cc: Stefan Wahren +Reported-by: Hans Verkuil +Signed-off-by: Johan Hovold +--- + +v3 + - add flag to struct device to prevent DMA configuration during probe instead + of checking for the USB bus type, which is not available when USB is built + as a module as noted by Alan + - drop moderated rpi list from CC + +v2 + - amend commit message and point out that the long-standing 30-bit DMA-mask + bug was benign to the dwc2 HCD itself (Robin) + - add and use a new dev_is_usb() helper (Robin) + + + drivers/base/dma-mapping.c | 6 ++++++ + drivers/usb/core/usb.c | 1 + + include/linux/device.h | 3 +++ + 3 files changed, 10 insertions(+) + +diff --git a/drivers/base/dma-mapping.c b/drivers/base/dma-mapping.c +index b555ff9dd8fc..f9f703be0ad1 100644 +--- a/drivers/base/dma-mapping.c ++++ b/drivers/base/dma-mapping.c +@@ -345,6 +345,9 @@ int dma_configure(struct device *dev) + enum dev_dma_attr attr; + int ret = 0; + ++ if (dev->skip_dma_configure) ++ return 0; ++ + if (dev_is_pci(dev)) { + bridge = pci_get_host_bridge_device(to_pci_dev(dev)); + dma_dev = bridge; +@@ -369,6 +372,9 @@ int dma_configure(struct device *dev) + + void dma_deconfigure(struct device *dev) + { ++ if (dev->skip_dma_configure) ++ return; ++ + of_dma_deconfigure(dev); + acpi_dma_deconfigure(dev); + } +diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c +index 17681d5638ac..2a85d905b539 100644 +--- a/drivers/usb/core/usb.c ++++ b/drivers/usb/core/usb.c +@@ -588,6 +588,7 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent, + * Note: calling dma_set_mask() on a USB device would set the + * mask for the entire HCD, so don't do that. + */ ++ dev->dev.skip_dma_configure = true; + dev->dev.dma_mask = bus->sysdev->dma_mask; + dev->dev.dma_pfn_offset = bus->sysdev->dma_pfn_offset; + set_dev_node(&dev->dev, dev_to_node(bus->sysdev)); +diff --git a/include/linux/device.h b/include/linux/device.h +index 723cd54b94da..022cf258068b 100644 +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -877,6 +877,8 @@ struct dev_links_info { + * @offline: Set after successful invocation of bus type's .offline(). + * @of_node_reused: Set if the device-tree node is shared with an ancestor + * device. ++ * @skip_dma_configure: Set if driver core should not configure DMA for this ++ * device during probe. + * + * At the lowest level, every device in a Linux system is represented by an + * instance of struct device. The device structure contains the information +@@ -965,6 +967,7 @@ struct device { + bool offline_disabled:1; + bool offline:1; + bool of_node_reused:1; ++ bool skip_dma_configure:1; + }; + + static inline struct device *kobj_to_dev(struct kobject *kobj) diff --git a/bcm283x-fixes.patch b/bcm283x-fixes.patch deleted file mode 100644 index fcddac501..000000000 --- a/bcm283x-fixes.patch +++ /dev/null @@ -1,218 +0,0 @@ -From patchwork Sun Jan 29 18:40:59 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2] ARM: bcm2835: dts: fix uart0 pinctrl node names -From: Baruch Siach -X-Patchwork-Id: 9544261 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 20:40:59 +0200 - -Downstream kernel uses pins 32, 33 as UART0 (PL011) Rx/Tx to communicate with -the Bluetooth chip. So ALT3 of these pins is most likely not CTS/RTS. Change -the node name to reflect that. This matches section 6.2 "Alternative Function -Assignments" in the BCM2835 ARM Peripherals document. - -With this change in place, adding - - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; - status = "okay"; - }; - -to bcm2837-rpi-3-b.dts does the right thing on my Raspberry Pi 3. - -Pins 30, 31 are CTS/RTS of UART0 in alternate function 3. Rename uart0_gpio30 -as well. - -While at it, fix a little typo in a nearby comment. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Acked-by: Stefan Wahren -Signed-off-by: Baruch Siach -Reviewed-by: Eric Anholt ---- -v2: - * Reference the ARM Peripherals document - * Fix subject typo (Stefan) - * Rename also uart0_gpio30 (Stefan) - * Add comment typo fix (Stefan) - * Add Stefan's ack ---- - arch/arm/boot/dts/bcm283x.dtsi | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9a44da190897..bc8ad417c8a3 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -292,17 +292,17 @@ - /* Separate from the uart0_gpio14 group - * because it conflicts with spi1_gpio16, and - * people often run uart0 on the two pins -- * without flow contrl. -+ * without flow control. - */ - uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { - brcm,pins = <16 17>; - brcm,function = ; - }; -- uart0_gpio30: uart0_gpio30 { -+ uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { -+ uart0_gpio32: uart0_gpio32 { - brcm,pins = <32 33>; - brcm,function = ; - }; -From patchwork Sun Jan 29 19:53:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] ARM: bcm2835: dts: fix i2c0 pins -From: Baruch Siach -X-Patchwork-Id: 9544275 -Message-Id: <9290fa9eed6b5ff1c5c96b9dac41eca286b7eef9.1485719591.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:10 +0200 - -According to the BCM2835 ARM Peripherals document i2c0 doesn't map to pins 32, -34 but to 28, 29. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index bc8ad417c8a3..2ae842921250 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -195,8 +195,8 @@ - brcm,pins = <0 1>; - brcm,function = ; - }; -- i2c0_gpio32: i2c0_gpio32 { -- brcm,pins = <32 34>; -+ i2c0_gpio28: i2c0_gpio28 { -+ brcm,pins = <28 29>; - brcm,function = ; - }; - i2c0_gpio44: i2c0_gpio44 { -From patchwork Sun Jan 29 19:53:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] ARM: bcm2835: dts: fix uart0/uart1 pins -From: Baruch Siach -X-Patchwork-Id: 9544277 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:11 +0200 - -According to the BCM2835 ARM Peripherals document uart1 doesn't map to pins -36-39, but uart0 does. - -Also, split into separate Rx/Tx and CST/RTS groups to match other uart nodes. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 2ae842921250..9ee8346b8b19 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -306,6 +306,14 @@ - brcm,pins = <32 33>; - brcm,function = ; - }; -+ uart0_gpio36: uart0_gpio36 { -+ brcm,pins = <36 37>; -+ brcm,function = ; -+ }; -+ uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 { -+ brcm,pins = <38 39>; -+ brcm,function = ; -+ }; - - uart1_gpio14: uart1_gpio14 { - brcm,pins = <14 15>; -@@ -323,10 +331,6 @@ - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart1_gpio36: uart1_gpio36 { -- brcm,pins = <36 37 38 39>; -- brcm,function = ; -- }; - uart1_gpio40: uart1_gpio40 { - brcm,pins = <40 41>; - brcm,function = ; -From patchwork Mon Jan 30 18:44:39 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: bcm2835: dt: add index to the ethernet alias -From: Baruch Siach -X-Patchwork-Id: 9545945 -Message-Id: <5942321c5d0bfea54eac64ace2b217e8e0b6220d.1485801879.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Lubomir Rintel , Baruch Siach , - linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 30 Jan 2017 20:44:39 +0200 - -An alias name should have an index number even when it is the only of its type. -This allows U-Boot to add the local-mac-address property. Otherwise U-Boot -skips the alias. - -Cc: Lubomir Rintel -Fixes: 6a93792774 ("ARM: bcm2835: dt: Add the ethernet to the device trees") -Signed-off-by: Baruch Siach -Acked-by: Lubomir Rintel ---- - arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi | 2 +- - arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -index 12c981e51134..9a0599f711ff 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -index 3f0a56ebcf1f..dc7ae776db5f 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - diff --git a/bcm283x-hdmi-audio.patch b/bcm283x-hdmi-audio.patch deleted file mode 100644 index 3ed3d2d34..000000000 --- a/bcm283x-hdmi-audio.patch +++ /dev/null @@ -1,836 +0,0 @@ -From bbcb8aacb871edf0360e808180162591b11c6a35 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:01 -0800 -Subject: [PATCH 1/3] dt-bindings: Document the dmas and dma-names properties - for VC4 HDMI - -These are optional, but necessary for HDMI audio support. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt -Acked-by: Rob Herring -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-1-eric@anholt.net ---- - Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -index 34c7fddcea39..ca02d3e4db91 100644 ---- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -@@ -34,6 +34,9 @@ Optional properties for HDMI: - - hpd-gpios: The GPIO pin for HDMI hotplug detect (if it doesn't appear - as an interrupt/status bit in the HDMI controller - itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt -+- dmas: Should contain one entry pointing to the DMA channel used to -+ transfer audio data -+- dma-names: Should contain "audio-rx" - - Required properties for DPI: - - compatible: Should be "brcm,bcm2835-dpi" --- -2.12.0 - -From 8e13e0d8ecf2202c707225a612d10c9534d849f7 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 27 Feb 2017 12:28:02 -0800 -Subject: [PATCH 2/3] drm/vc4: Add HDMI audio support - -The HDMI encoder IP embeds all needed blocks to output audio, with a -custom DAI called MAI moving audio between the two parts of the HDMI -core. This driver now exposes a sound card to let users stream audio -to their display. - -Using the hdmi-codec driver has been considered here, but MAI meant -having to significantly rework hdmi-codec, and it would have left -little shared code with the I2S mode anyway. - -The encoder requires that the audio be SPDIF-formatted frames only, -which alsalib will format-convert for us. - -This patch is the combined work of Eric Anholt (initial register setup -with a separate dmaengine driver and using simple-audio-card) and -Boris Brezillon (moving it all into HDMI, massive debug to get it -actually working), and which Eric has the permission to release. - -v2: Drop "-audio" from sound card name, since that's already implied - (suggestion by Boris) - -Signed-off-by: Eric Anholt -Acked-by: Boris Brezillon -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-2-eric@anholt.net ---- - drivers/gpu/drm/vc4/Kconfig | 4 + - drivers/gpu/drm/vc4/vc4_hdmi.c | 494 ++++++++++++++++++++++++++++++++++++++++- - drivers/gpu/drm/vc4/vc4_regs.h | 107 ++++++++- - 3 files changed, 603 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig -index e1517d07cb7d..973b4203c0b2 100644 ---- a/drivers/gpu/drm/vc4/Kconfig -+++ b/drivers/gpu/drm/vc4/Kconfig -@@ -2,11 +2,15 @@ config DRM_VC4 - tristate "Broadcom VC4 Graphics" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on DRM -+ depends on SND && SND_SOC - depends on COMMON_CLK - select DRM_KMS_HELPER - select DRM_KMS_CMA_HELPER - select DRM_GEM_CMA_HELPER - select DRM_PANEL -+ select SND_PCM -+ select SND_PCM_ELD -+ select SND_SOC_GENERIC_DMAENGINE_PCM - select DRM_MIPI_DSI - help - Choose this option if you have a system that has a Broadcom -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 93d5994f3a04..e4abf4bfc464 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -31,11 +31,27 @@ - #include "linux/clk.h" - #include "linux/component.h" - #include "linux/i2c.h" -+#include "linux/of_address.h" - #include "linux/of_gpio.h" - #include "linux/of_platform.h" -+#include "linux/rational.h" -+#include "sound/dmaengine_pcm.h" -+#include "sound/pcm_drm_eld.h" -+#include "sound/pcm_params.h" -+#include "sound/soc.h" - #include "vc4_drv.h" - #include "vc4_regs.h" - -+/* HDMI audio information */ -+struct vc4_hdmi_audio { -+ struct snd_soc_card card; -+ struct snd_soc_dai_link link; -+ int samplerate; -+ int channels; -+ struct snd_dmaengine_dai_dma_data dma_data; -+ struct snd_pcm_substream *substream; -+}; -+ - /* General HDMI hardware state. */ - struct vc4_hdmi { - struct platform_device *pdev; -@@ -43,6 +59,8 @@ struct vc4_hdmi { - struct drm_encoder *encoder; - struct drm_connector *connector; - -+ struct vc4_hdmi_audio audio; -+ - struct i2c_adapter *ddc; - void __iomem *hdmicore_regs; - void __iomem *hd_regs; -@@ -98,6 +116,10 @@ static const struct { - HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), - HDMI_REG(VC4_HDMI_HOTPLUG_INT), - HDMI_REG(VC4_HDMI_HOTPLUG), -+ HDMI_REG(VC4_HDMI_MAI_CHANNEL_MAP), -+ HDMI_REG(VC4_HDMI_MAI_CONFIG), -+ HDMI_REG(VC4_HDMI_MAI_FORMAT), -+ HDMI_REG(VC4_HDMI_AUDIO_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_HORZA), - HDMI_REG(VC4_HDMI_HORZB), -@@ -108,6 +130,7 @@ static const struct { - HDMI_REG(VC4_HDMI_VERTB0), - HDMI_REG(VC4_HDMI_VERTB1), - HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL), -+ HDMI_REG(VC4_HDMI_TX_PHY_CTL0), - }; - - static const struct { -@@ -116,6 +139,9 @@ static const struct { - } hd_regs[] = { - HDMI_REG(VC4_HD_M_CTL), - HDMI_REG(VC4_HD_MAI_CTL), -+ HDMI_REG(VC4_HD_MAI_THR), -+ HDMI_REG(VC4_HD_MAI_FMT), -+ HDMI_REG(VC4_HD_MAI_SMP), - HDMI_REG(VC4_HD_VID_CTL), - HDMI_REG(VC4_HD_CSC_CTL), - HDMI_REG(VC4_HD_FRAME_COUNT), -@@ -215,6 +241,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) - - drm_mode_connector_update_edid_property(connector, edid); - ret = drm_add_edid_modes(connector, edid); -+ drm_edid_to_eld(connector, edid); - - return ret; - } -@@ -300,7 +327,7 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder, - struct drm_device *dev = encoder->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - u32 packet_id = frame->any.type - 0x80; -- u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id; -+ u32 packet_reg = VC4_HDMI_RAM_PACKET(packet_id); - uint8_t buffer[VC4_HDMI_PACKET_STRIDE]; - ssize_t len, i; - int ret; -@@ -381,6 +408,24 @@ static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder) - vc4_hdmi_write_infoframe(encoder, &frame); - } - -+static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder) -+{ -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = drm->dev_private; -+ struct vc4_hdmi *hdmi = vc4->hdmi; -+ union hdmi_infoframe frame; -+ int ret; -+ -+ ret = hdmi_audio_infoframe_init(&frame.audio); -+ -+ frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; -+ frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; -+ frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; -+ frame.audio.channels = hdmi->audio.channels; -+ -+ vc4_hdmi_write_infoframe(encoder, &frame); -+} -+ - static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder) - { - vc4_hdmi_set_avi_infoframe(encoder); -@@ -589,6 +634,447 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { - .enable = vc4_hdmi_encoder_enable, - }; - -+/* HDMI audio codec callbacks */ -+static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *hdmi) -+{ -+ struct drm_device *drm = hdmi->encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 hsm_clock = clk_get_rate(hdmi->hsm_clock); -+ unsigned long n, m; -+ -+ rational_best_approximation(hsm_clock, hdmi->audio.samplerate, -+ VC4_HD_MAI_SMP_N_MASK >> -+ VC4_HD_MAI_SMP_N_SHIFT, -+ (VC4_HD_MAI_SMP_M_MASK >> -+ VC4_HD_MAI_SMP_M_SHIFT) + 1, -+ &n, &m); -+ -+ HD_WRITE(VC4_HD_MAI_SMP, -+ VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | -+ VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); -+} -+ -+static void vc4_hdmi_set_n_cts(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_crtc *crtc = encoder->crtc; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ const struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ u32 samplerate = hdmi->audio.samplerate; -+ u32 n, cts; -+ u64 tmp; -+ -+ n = 128 * samplerate / 1000; -+ tmp = (u64)(mode->clock * 1000) * n; -+ do_div(tmp, 128 * samplerate); -+ cts = tmp; -+ -+ HDMI_WRITE(VC4_HDMI_CRP_CFG, -+ VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN | -+ VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); -+ -+ /* -+ * We could get slightly more accurate clocks in some cases by -+ * providing a CTS_1 value. The two CTS values are alternated -+ * between based on the period fields -+ */ -+ HDMI_WRITE(VC4_HDMI_CTS_0, cts); -+ HDMI_WRITE(VC4_HDMI_CTS_1, cts); -+} -+ -+static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai) -+{ -+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct vc4_dev *vc4 = to_vc4_dev(encoder->dev); -+ int ret; -+ -+ if (hdmi->audio.substream && hdmi->audio.substream != substream) -+ return -EINVAL; -+ -+ hdmi->audio.substream = substream; -+ -+ /* -+ * If the HDMI encoder hasn't probed, or the encoder is -+ * currently in DVI mode, treat the codec dai as missing. -+ */ -+ if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & -+ VC4_HDMI_RAM_PACKET_ENABLE)) -+ return -ENODEV; -+ -+ ret = snd_pcm_hw_constraint_eld(substream->runtime, -+ hdmi->connector->eld); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) -+{ -+ return 0; -+} -+ -+static void vc4_hdmi_audio_reset(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ int ret; -+ -+ ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO); -+ if (ret) -+ dev_err(dev, "Failed to stop audio infoframe: %d\n", ret); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH); -+} -+ -+static void vc4_hdmi_audio_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ if (substream != hdmi->audio.substream) -+ return; -+ -+ vc4_hdmi_audio_reset(hdmi); -+ -+ hdmi->audio.substream = NULL; -+} -+ -+/* HDMI audio codec callbacks */ -+static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 audio_packet_config, channel_mask; -+ u32 channel_map, i; -+ -+ if (substream != hdmi->audio.substream) -+ return -EINVAL; -+ -+ dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__, -+ params_rate(params), params_width(params), -+ params_channels(params)); -+ -+ hdmi->audio.channels = params_channels(params); -+ hdmi->audio.samplerate = params_rate(params); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_RESET | -+ VC4_HD_MAI_CTL_FLUSH | -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ -+ vc4_hdmi_audio_set_mai_clock(hdmi); -+ -+ audio_packet_config = -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT | -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS | -+ VC4_SET_FIELD(0xf, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); -+ -+ channel_mask = GENMASK(hdmi->audio.channels - 1, 0); -+ audio_packet_config |= VC4_SET_FIELD(channel_mask, -+ VC4_HDMI_AUDIO_PACKET_CEA_MASK); -+ -+ /* Set the MAI threshold. This logic mimics the firmware's. */ -+ if (hdmi->audio.samplerate > 96000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else if (hdmi->audio.samplerate > 48000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW)); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CONFIG, -+ VC4_HDMI_MAI_CONFIG_BIT_REVERSE | -+ VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); -+ -+ channel_map = 0; -+ for (i = 0; i < 8; i++) { -+ if (channel_mask & BIT(i)) -+ channel_map |= i << (3 * i); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CHANNEL_MAP, channel_map); -+ HDMI_WRITE(VC4_HDMI_AUDIO_PACKET_CONFIG, audio_packet_config); -+ vc4_hdmi_set_n_cts(hdmi); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ vc4_hdmi_set_audio_infoframe(encoder); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) & -+ ~VC4_HDMI_TX_PHY_RNG_PWRDN); -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_SET_FIELD(hdmi->audio.channels, -+ VC4_HD_MAI_CTL_CHNUM) | -+ VC4_HD_MAI_CTL_ENABLE); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) | -+ VC4_HDMI_TX_PHY_RNG_PWRDN); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static inline struct vc4_hdmi * -+snd_component_to_hdmi(struct snd_soc_component *component) -+{ -+ struct snd_soc_card *card = snd_soc_component_get_drvdata(component); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_eld_ctl_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; -+ uinfo->count = sizeof(hdmi->connector->eld); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_eld_ctl_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ memcpy(ucontrol->value.bytes.data, hdmi->connector->eld, -+ sizeof(hdmi->connector->eld)); -+ -+ return 0; -+} -+ -+static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = { -+ { -+ .access = SNDRV_CTL_ELEM_ACCESS_READ | -+ SNDRV_CTL_ELEM_ACCESS_VOLATILE, -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = "ELD", -+ .info = vc4_hdmi_audio_eld_ctl_info, -+ .get = vc4_hdmi_audio_eld_ctl_get, -+ }, -+}; -+ -+static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = { -+ SND_SOC_DAPM_OUTPUT("TX"), -+}; -+ -+static const struct snd_soc_dapm_route vc4_hdmi_audio_routes[] = { -+ { "TX", NULL, "Playback" }, -+}; -+ -+static const struct snd_soc_codec_driver vc4_hdmi_audio_codec_drv = { -+ .component_driver = { -+ .controls = vc4_hdmi_audio_controls, -+ .num_controls = ARRAY_SIZE(vc4_hdmi_audio_controls), -+ .dapm_widgets = vc4_hdmi_audio_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets), -+ .dapm_routes = vc4_hdmi_audio_routes, -+ .num_dapm_routes = ARRAY_SIZE(vc4_hdmi_audio_routes), -+ }, -+}; -+ -+static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = { -+ .startup = vc4_hdmi_audio_startup, -+ .shutdown = vc4_hdmi_audio_shutdown, -+ .hw_params = vc4_hdmi_audio_hw_params, -+ .set_fmt = vc4_hdmi_audio_set_fmt, -+ .trigger = vc4_hdmi_audio_trigger, -+}; -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_codec_dai_drv = { -+ .name = "vc4-hdmi-hifi", -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+}; -+ -+static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = { -+ .name = "vc4-hdmi-cpu-dai-component", -+}; -+ -+static int vc4_hdmi_audio_cpu_dai_probe(struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ snd_soc_dai_init_dma_data(dai, &hdmi->audio.dma_data, NULL); -+ -+ return 0; -+} -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_cpu_dai_drv = { -+ .name = "vc4-hdmi-cpu-dai", -+ .probe = vc4_hdmi_audio_cpu_dai_probe, -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 1, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+ .ops = &vc4_hdmi_audio_dai_ops, -+}; -+ -+static const struct snd_dmaengine_pcm_config pcm_conf = { -+ .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-rx", -+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, -+}; -+ -+static int vc4_hdmi_audio_init(struct vc4_hdmi *hdmi) -+{ -+ struct snd_soc_dai_link *dai_link = &hdmi->audio.link; -+ struct snd_soc_card *card = &hdmi->audio.card; -+ struct device *dev = &hdmi->pdev->dev; -+ const __be32 *addr; -+ int ret; -+ -+ if (!of_find_property(dev->of_node, "dmas", NULL)) { -+ dev_warn(dev, -+ "'dmas' DT property is missing, no HDMI audio\n"); -+ return 0; -+ } -+ -+ /* -+ * Get the physical address of VC4_HD_MAI_DATA. We need to retrieve -+ * the bus address specified in the DT, because the physical address -+ * (the one returned by platform_get_resource()) is not appropriate -+ * for DMA transfers. -+ * This VC/MMU should probably be exposed to avoid this kind of hacks. -+ */ -+ addr = of_get_address(dev->of_node, 1, NULL, NULL); -+ hdmi->audio.dma_data.addr = be32_to_cpup(addr) + VC4_HD_MAI_DATA; -+ hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ hdmi->audio.dma_data.maxburst = 2; -+ -+ ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0); -+ if (ret) { -+ dev_err(dev, "Could not register PCM component: %d\n", ret); -+ return ret; -+ } -+ -+ ret = devm_snd_soc_register_component(dev, &vc4_hdmi_audio_cpu_dai_comp, -+ &vc4_hdmi_audio_cpu_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register CPU DAI: %d\n", ret); -+ return ret; -+ } -+ -+ /* register codec and codec dai */ -+ ret = snd_soc_register_codec(dev, &vc4_hdmi_audio_codec_drv, -+ &vc4_hdmi_audio_codec_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register codec: %d\n", ret); -+ return ret; -+ } -+ -+ dai_link->name = "MAI"; -+ dai_link->stream_name = "MAI PCM"; -+ dai_link->codec_dai_name = vc4_hdmi_audio_codec_dai_drv.name; -+ dai_link->cpu_dai_name = dev_name(dev); -+ dai_link->codec_name = dev_name(dev); -+ dai_link->platform_name = dev_name(dev); -+ -+ card->dai_link = dai_link; -+ card->num_links = 1; -+ card->name = "vc4-hdmi"; -+ card->dev = dev; -+ -+ /* -+ * Be careful, snd_soc_register_card() calls dev_set_drvdata() and -+ * stores a pointer to the snd card object in dev->driver_data. This -+ * means we cannot use it for something else. The hdmi back-pointer is -+ * now stored in card->drvdata and should be retrieved with -+ * snd_soc_card_get_drvdata() if needed. -+ */ -+ snd_soc_card_set_drvdata(card, hdmi); -+ ret = devm_snd_soc_register_card(dev, card); -+ if (ret) { -+ dev_err(dev, "Could not register sound card: %d\n", ret); -+ goto unregister_codec; -+ } -+ -+ return 0; -+ -+unregister_codec: -+ snd_soc_unregister_codec(dev); -+ -+ return ret; -+} -+ -+static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi) -+{ -+ struct device *dev = &hdmi->pdev->dev; -+ -+ /* -+ * If drvdata is not set this means the audio card was not -+ * registered, just skip codec unregistration in this case. -+ */ -+ if (dev_get_drvdata(dev)) -+ snd_soc_unregister_codec(dev); -+} -+ - static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - { - struct platform_device *pdev = to_platform_device(dev); -@@ -720,6 +1206,10 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - goto err_destroy_encoder; - } - -+ ret = vc4_hdmi_audio_init(hdmi); -+ if (ret) -+ goto err_destroy_encoder; -+ - return 0; - - err_destroy_encoder: -@@ -741,6 +1231,8 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master, - struct vc4_dev *vc4 = drm->dev_private; - struct vc4_hdmi *hdmi = vc4->hdmi; - -+ vc4_hdmi_audio_cleanup(hdmi); -+ - vc4_hdmi_connector_destroy(hdmi->connector); - vc4_hdmi_encoder_destroy(hdmi->encoder); - -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 385405a2df05..932093936178 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -446,11 +446,62 @@ - #define VC4_HDMI_HOTPLUG 0x00c - # define VC4_HDMI_HOTPLUG_CONNECTED BIT(0) - -+/* 3 bits per field, where each field maps from that corresponding MAI -+ * bus channel to the given HDMI channel. -+ */ -+#define VC4_HDMI_MAI_CHANNEL_MAP 0x090 -+ -+#define VC4_HDMI_MAI_CONFIG 0x094 -+# define VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE BIT(27) -+# define VC4_HDMI_MAI_CONFIG_BIT_REVERSE BIT(26) -+# define VC4_HDMI_MAI_CHANNEL_MASK_MASK VC4_MASK(15, 0) -+# define VC4_HDMI_MAI_CHANNEL_MASK_SHIFT 0 -+ -+/* Last received format word on the MAI bus. */ -+#define VC4_HDMI_MAI_FORMAT 0x098 -+ -+#define VC4_HDMI_AUDIO_PACKET_CONFIG 0x09c -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT BIT(29) -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS BIT(24) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_SAMPLE_PRESENT BIT(19) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_B_FRAME BIT(18) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_MASK VC4_MASK(13, 10) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_SHIFT 10 -+/* If set, then multichannel, otherwise 2 channel. */ -+# define VC4_HDMI_AUDIO_PACKET_AUDIO_LAYOUT BIT(9) -+/* If set, then AUDIO_LAYOUT overrides audio_cea_mask */ -+# define VC4_HDMI_AUDIO_PACKET_FORCE_AUDIO_LAYOUT BIT(8) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_MASK VC4_MASK(7, 0) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_SHIFT 0 -+ - #define VC4_HDMI_RAM_PACKET_CONFIG 0x0a0 - # define VC4_HDMI_RAM_PACKET_ENABLE BIT(16) - - #define VC4_HDMI_RAM_PACKET_STATUS 0x0a4 - -+#define VC4_HDMI_CRP_CFG 0x0a8 -+/* When set, the CTS_PERIOD counts based on MAI bus sync pulse instead -+ * of pixel clock. -+ */ -+# define VC4_HDMI_CRP_USE_MAI_BUS_SYNC_FOR_CTS BIT(26) -+/* When set, no CRP packets will be sent. */ -+# define VC4_HDMI_CRP_CFG_DISABLE BIT(25) -+/* If set, generates CTS values based on N, audio clock, and video -+ * clock. N must be divisible by 128. -+ */ -+# define VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN BIT(24) -+# define VC4_HDMI_CRP_CFG_N_MASK VC4_MASK(19, 0) -+# define VC4_HDMI_CRP_CFG_N_SHIFT 0 -+ -+/* 20-bit fields containing CTS values to be transmitted if !EXTERNAL_CTS_EN */ -+#define VC4_HDMI_CTS_0 0x0ac -+#define VC4_HDMI_CTS_1 0x0b0 -+/* 20-bit fields containing number of clocks to send CTS0/1 before -+ * switching to the other one. -+ */ -+#define VC4_HDMI_CTS_PERIOD_0 0x0b4 -+#define VC4_HDMI_CTS_PERIOD_1 0x0b8 -+ - #define VC4_HDMI_HORZA 0x0c4 - # define VC4_HDMI_HORZA_VPOS BIT(14) - # define VC4_HDMI_HORZA_HPOS BIT(13) -@@ -512,7 +563,11 @@ - - #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 - --#define VC4_HDMI_GCP_0 0x400 -+#define VC4_HDMI_TX_PHY_CTL0 0x2c4 -+# define VC4_HDMI_TX_PHY_RNG_PWRDN BIT(25) -+ -+#define VC4_HDMI_GCP(x) (0x400 + ((x) * 0x4)) -+#define VC4_HDMI_RAM_PACKET(x) (0x400 + ((x) * 0x24)) - #define VC4_HDMI_PACKET_STRIDE 0x24 - - #define VC4_HD_M_CTL 0x00c -@@ -522,6 +577,56 @@ - # define VC4_HD_M_ENABLE BIT(0) - - #define VC4_HD_MAI_CTL 0x014 -+/* Set when audio stream is received at a slower rate than the -+ * sampling period, so MAI fifo goes empty. Write 1 to clear. -+ */ -+# define VC4_HD_MAI_CTL_DLATE BIT(15) -+# define VC4_HD_MAI_CTL_BUSY BIT(14) -+# define VC4_HD_MAI_CTL_CHALIGN BIT(13) -+# define VC4_HD_MAI_CTL_WHOLSMP BIT(12) -+# define VC4_HD_MAI_CTL_FULL BIT(11) -+# define VC4_HD_MAI_CTL_EMPTY BIT(10) -+# define VC4_HD_MAI_CTL_FLUSH BIT(9) -+/* If set, MAI bus generates SPDIF (bit 31) parity instead of passing -+ * through. -+ */ -+# define VC4_HD_MAI_CTL_PAREN BIT(8) -+# define VC4_HD_MAI_CTL_CHNUM_MASK VC4_MASK(7, 4) -+# define VC4_HD_MAI_CTL_CHNUM_SHIFT 4 -+# define VC4_HD_MAI_CTL_ENABLE BIT(3) -+/* Underflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORE BIT(2) -+/* Overflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORF BIT(1) -+/* Single-shot reset bit. Read value is undefined. */ -+# define VC4_HD_MAI_CTL_RESET BIT(0) -+ -+#define VC4_HD_MAI_THR 0x018 -+# define VC4_HD_MAI_THR_PANICHIGH_MASK VC4_MASK(29, 24) -+# define VC4_HD_MAI_THR_PANICHIGH_SHIFT 24 -+# define VC4_HD_MAI_THR_PANICLOW_MASK VC4_MASK(21, 16) -+# define VC4_HD_MAI_THR_PANICLOW_SHIFT 16 -+# define VC4_HD_MAI_THR_DREQHIGH_MASK VC4_MASK(13, 8) -+# define VC4_HD_MAI_THR_DREQHIGH_SHIFT 8 -+# define VC4_HD_MAI_THR_DREQLOW_MASK VC4_MASK(5, 0) -+# define VC4_HD_MAI_THR_DREQLOW_SHIFT 0 -+ -+/* Format header to be placed on the MAI data. Unused. */ -+#define VC4_HD_MAI_FMT 0x01c -+ -+/* Register for DMAing in audio data to be transported over the MAI -+ * bus to the Falcon core. -+ */ -+#define VC4_HD_MAI_DATA 0x020 -+ -+/* Divider from HDMI HSM clock to MAI serial clock. Sampling period -+ * converges to N / (M + 1) cycles. -+ */ -+#define VC4_HD_MAI_SMP 0x02c -+# define VC4_HD_MAI_SMP_N_MASK VC4_MASK(31, 8) -+# define VC4_HD_MAI_SMP_N_SHIFT 8 -+# define VC4_HD_MAI_SMP_M_MASK VC4_MASK(7, 0) -+# define VC4_HD_MAI_SMP_M_SHIFT 0 - - #define VC4_HD_VID_CTL 0x038 - # define VC4_HD_VID_CTL_ENABLE BIT(31) --- -2.12.0 - -From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:03 -0800 -Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties - -Add the dmas and dma-names properties to support HDMI audio. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index a3106aa446c6..a31b0b303ddc 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -499,6 +499,8 @@ - clocks = <&clocks BCM2835_PLLH_PIX>, - <&clocks BCM2835_CLOCK_HSM>; - clock-names = "pixel", "hdmi"; -+ dmas = <&dma 17>; -+ dma-names = "audio-rx"; - status = "disabled"; - }; - --- -2.12.0 - diff --git a/bcm283x-mmc-bcm2835.patch b/bcm283x-mmc-bcm2835.patch deleted file mode 100644 index d9591b438..000000000 --- a/bcm283x-mmc-bcm2835.patch +++ /dev/null @@ -1,1932 +0,0 @@ -From patchwork Wed Mar 8 09:19:01 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,1/7] dt-bindings: Add binding for brcm,bcm2835-sdhost. -From: Gerd Hoffmann -X-Patchwork-Id: 9610673 -Message-Id: <1488964751-22763-2-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:01 +0100 - -From: Eric Anholt - -This is the other SD controller on the platform, which can be swapped -to the role of SD card host using pin muxing. - -Signed-off-by: Eric Anholt -Signed-off-by: Gerd Hoffmann -Acked-by: Rob Herring ---- - .../bindings/mmc/brcm,bcm2835-sdhost.txt | 23 ++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt - -diff --git a/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -new file mode 100644 -index 0000000..d876580 ---- /dev/null -+++ b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -@@ -0,0 +1,23 @@ -+Broadcom BCM2835 SDHOST controller -+ -+This file documents differences between the core properties described -+by mmc.txt and the properties that represent the BCM2835 controller. -+ -+Required properties: -+- compatible: Should be "brcm,bcm2835-sdhost". -+- clocks: The clock feeding the SDHOST controller. -+ -+Optional properties: -+- dmas: DMA channel for read and write. -+ See Documentation/devicetree/bindings/dma/dma.txt for details -+ -+Example: -+ -+sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+}; -From patchwork Wed Mar 8 09:19:03 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,2/7] mmc: bcm2835: Add new driver for the sdhost controller. -From: Gerd Hoffmann -X-Patchwork-Id: 9610701 -Message-Id: <1488964751-22763-4-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:03 +0100 - -From: Eric Anholt - -The 2835 has two SD controllers: The Arasan sdhci controller (supported -by the iproc driver) and a custom sdhost controller. This patch adds a -driver for the latter. - -The sdhci controller supports both sdcard and sdio. The sdhost -controller supports the sdcard only, but has better performance. Also -note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost -controller allows to use the sdhci controller for wifi support. - -The configuration is done by devicetree via pin muxing. Both SD -controller are available on the same pins (2 pin groups = pin 22 to 27 + -pin 48 to 53). So it's possible to use both SD controllers at the same -time with different pin groups. - -The code was originally written by Phil Elwell in the downstream -Rasbperry Pi tree. In preparation for the upstream merge it was -cleaned up and the code base was moderized by Eric Anholt, Stefan -Wahren and Gerd Hoffmann. - -Signed-off-by: Eric Anholt -Signed-off-by: Stefan Wahren -Signed-off-by: Gerd Hoffmann ---- - drivers/mmc/host/Kconfig | 14 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/bcm2835.c | 1465 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 1480 insertions(+) - create mode 100644 drivers/mmc/host/bcm2835.c - -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index f08691a..a638cd0 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -799,6 +799,20 @@ config MMC_TOSHIBA_PCI - depends on PCI - help - -+config MMC_BCM2835 -+ tristate "Broadcom BCM2835 SDHOST MMC Controller support" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on HAS_DMA -+ help -+ This selects the BCM2835 SDHOST MMC controller. If you have -+ a BCM2835 platform with SD or MMC devices, say Y or M here. -+ -+ Note that the BCM2835 has two SD controllers: The Arasan -+ sdhci controller (supported by MMC_SDHCI_IPROC) and a custom -+ sdhost controller (supported by this driver). -+ -+ If unsure, say N. -+ - config MMC_MTK - tristate "MediaTek SD/MMC Card Interface support" - depends on HAS_DMA -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6d548c4..bc2c2e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o - obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o - obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o - obj-$(CONFIG_MMC_TOSHIBA_PCI) += toshsd.o -+obj-$(CONFIG_MMC_BCM2835) += bcm2835.o - - obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o - obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -new file mode 100644 -index 0000000..7d1b0db7 ---- /dev/null -+++ b/drivers/mmc/host/bcm2835.c -@@ -0,0 +1,1465 @@ -+/* -+ * bcm2835 sdhost driver. -+ * -+ * The 2835 has two SD controllers: The Arasan sdhci controller -+ * (supported by the iproc driver) and a custom sdhost controller -+ * (supported by this driver). -+ * -+ * The sdhci controller supports both sdcard and sdio. The sdhost -+ * controller supports the sdcard only, but has better performance. -+ * Also note that the rpi3 has sdio wifi, so driving the sdcard with -+ * the sdhost controller allows to use the sdhci controller for wifi -+ * support. -+ * -+ * The configuration is done by devicetree via pin muxing. Both -+ * SD controller are available on the same pins (2 pin groups = pin 22 -+ * to 27 + pin 48 to 53). So it's possible to use both SD controllers -+ * at the same time with different pin groups. -+ * -+ * Author: Phil Elwell -+ * Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd. -+ * -+ * Based on -+ * mmc-bcm2835.c by Gellert Weisz -+ * which is, in turn, based on -+ * sdhci-bcm2708.c by Broadcom -+ * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko -+ * sdhci.c and sdhci-pci.c by Pierre Ossman -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define SDCMD 0x00 /* Command to SD card - 16 R/W */ -+#define SDARG 0x04 /* Argument to SD card - 32 R/W */ -+#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */ -+#define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ -+#define SDRSP0 0x10 /* SD card response (31:0) - 32 R */ -+#define SDRSP1 0x14 /* SD card response (63:32) - 32 R */ -+#define SDRSP2 0x18 /* SD card response (95:64) - 32 R */ -+#define SDRSP3 0x1c /* SD card response (127:96) - 32 R */ -+#define SDHSTS 0x20 /* SD host status - 11 R/W */ -+#define SDVDD 0x30 /* SD card power control - 1 R/W */ -+#define SDEDM 0x34 /* Emergency Debug Mode - 13 R/W */ -+#define SDHCFG 0x38 /* Host configuration - 2 R/W */ -+#define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */ -+#define SDDATA 0x40 /* Data to/from SD card - 32 R/W */ -+#define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */ -+ -+#define SDCMD_NEW_FLAG 0x8000 -+#define SDCMD_FAIL_FLAG 0x4000 -+#define SDCMD_BUSYWAIT 0x800 -+#define SDCMD_NO_RESPONSE 0x400 -+#define SDCMD_LONG_RESPONSE 0x200 -+#define SDCMD_WRITE_CMD 0x80 -+#define SDCMD_READ_CMD 0x40 -+#define SDCMD_CMD_MASK 0x3f -+ -+#define SDCDIV_MAX_CDIV 0x7ff -+ -+#define SDHSTS_BUSY_IRPT 0x400 -+#define SDHSTS_BLOCK_IRPT 0x200 -+#define SDHSTS_SDIO_IRPT 0x100 -+#define SDHSTS_REW_TIME_OUT 0x80 -+#define SDHSTS_CMD_TIME_OUT 0x40 -+#define SDHSTS_CRC16_ERROR 0x20 -+#define SDHSTS_CRC7_ERROR 0x10 -+#define SDHSTS_FIFO_ERROR 0x08 -+/* Reserved */ -+/* Reserved */ -+#define SDHSTS_DATA_FLAG 0x01 -+ -+#define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR | \ -+ SDHSTS_CRC16_ERROR | \ -+ SDHSTS_REW_TIME_OUT | \ -+ SDHSTS_FIFO_ERROR) -+ -+#define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT | \ -+ SDHSTS_TRANSFER_ERROR_MASK) -+ -+#define SDHCFG_BUSY_IRPT_EN BIT(10) -+#define SDHCFG_BLOCK_IRPT_EN BIT(8) -+#define SDHCFG_SDIO_IRPT_EN BIT(5) -+#define SDHCFG_DATA_IRPT_EN BIT(4) -+#define SDHCFG_SLOW_CARD BIT(3) -+#define SDHCFG_WIDE_EXT_BUS BIT(2) -+#define SDHCFG_WIDE_INT_BUS BIT(1) -+#define SDHCFG_REL_CMD_LINE BIT(0) -+ -+#define SDVDD_POWER_OFF 0 -+#define SDVDD_POWER_ON 1 -+ -+#define SDEDM_FORCE_DATA_MODE BIT(19) -+#define SDEDM_CLOCK_PULSE BIT(20) -+#define SDEDM_BYPASS BIT(21) -+ -+#define SDEDM_WRITE_THRESHOLD_SHIFT 9 -+#define SDEDM_READ_THRESHOLD_SHIFT 14 -+#define SDEDM_THRESHOLD_MASK 0x1f -+ -+#define SDEDM_FSM_MASK 0xf -+#define SDEDM_FSM_IDENTMODE 0x0 -+#define SDEDM_FSM_DATAMODE 0x1 -+#define SDEDM_FSM_READDATA 0x2 -+#define SDEDM_FSM_WRITEDATA 0x3 -+#define SDEDM_FSM_READWAIT 0x4 -+#define SDEDM_FSM_READCRC 0x5 -+#define SDEDM_FSM_WRITECRC 0x6 -+#define SDEDM_FSM_WRITEWAIT1 0x7 -+#define SDEDM_FSM_POWERDOWN 0x8 -+#define SDEDM_FSM_POWERUP 0x9 -+#define SDEDM_FSM_WRITESTART1 0xa -+#define SDEDM_FSM_WRITESTART2 0xb -+#define SDEDM_FSM_GENPULSES 0xc -+#define SDEDM_FSM_WRITEWAIT2 0xd -+#define SDEDM_FSM_STARTPOWDOWN 0xf -+ -+#define SDDATA_FIFO_WORDS 16 -+ -+#define FIFO_READ_THRESHOLD 4 -+#define FIFO_WRITE_THRESHOLD 4 -+#define SDDATA_FIFO_PIO_BURST 8 -+ -+#define PIO_THRESHOLD 1 /* Maximum block count for PIO (0 = always DMA) */ -+ -+struct bcm2835_host { -+ spinlock_t lock; -+ struct mutex mutex; -+ -+ void __iomem *ioaddr; -+ u32 phys_addr; -+ -+ struct mmc_host *mmc; -+ struct platform_device *pdev; -+ -+ int clock; /* Current clock speed */ -+ unsigned int max_clk; /* Max possible freq */ -+ struct work_struct dma_work; -+ struct delayed_work timeout_work; /* Timer for timeouts */ -+ struct sg_mapping_iter sg_miter; /* SG state for PIO */ -+ unsigned int blocks; /* remaining PIO blocks */ -+ int irq; /* Device IRQ */ -+ -+ u32 ns_per_fifo_word; -+ -+ /* cached registers */ -+ u32 hcfg; -+ u32 cdiv; -+ -+ struct mmc_request *mrq; /* Current request */ -+ struct mmc_command *cmd; /* Current command */ -+ struct mmc_data *data; /* Current data request */ -+ bool data_complete:1;/* Data finished before cmd */ -+ bool use_busy:1; /* Wait for busy interrupt */ -+ bool use_sbc:1; /* Send CMD23 */ -+ -+ /* for threaded irq handler */ -+ bool irq_block; -+ bool irq_busy; -+ bool irq_data; -+ -+ /* DMA part */ -+ struct dma_chan *dma_chan_rxtx; -+ struct dma_chan *dma_chan; -+ struct dma_slave_config dma_cfg_rx; -+ struct dma_slave_config dma_cfg_tx; -+ struct dma_async_tx_descriptor *dma_desc; -+ u32 dma_dir; -+ u32 drain_words; -+ struct page *drain_page; -+ u32 drain_offset; -+ bool use_dma; -+}; -+ -+static void bcm2835_dumpcmd(struct bcm2835_host *host, struct mmc_command *cmd, -+ const char *label) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!cmd) -+ return; -+ -+ dev_dbg(dev, "%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n", -+ (cmd == host->cmd) ? '>' : ' ', -+ label, cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], -+ cmd->error); -+} -+ -+static void bcm2835_dumpregs(struct bcm2835_host *host) -+{ -+ struct mmc_request *mrq = host->mrq; -+ struct device *dev = &host->pdev->dev; -+ -+ if (mrq) { -+ bcm2835_dumpcmd(host, mrq->sbc, "sbc"); -+ bcm2835_dumpcmd(host, mrq->cmd, "cmd"); -+ if (mrq->data) { -+ dev_dbg(dev, "data blocks %x blksz %x - err %d\n", -+ mrq->data->blocks, -+ mrq->data->blksz, -+ mrq->data->error); -+ } -+ bcm2835_dumpcmd(host, mrq->stop, "stop"); -+ } -+ -+ dev_dbg(dev, "=========== REGISTER DUMP ===========\n"); -+ dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); -+ dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); -+ dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); -+ dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); -+ dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); -+ dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); -+ dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); -+ dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); -+ dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); -+ dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD)); -+ dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM)); -+ dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG)); -+ dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT)); -+ dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC)); -+ dev_dbg(dev, "===========================================\n"); -+} -+ -+static void bcm2835_reset_internal(struct bcm2835_host *host) -+{ -+ u32 temp; -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ writel(0, host->ioaddr + SDCMD); -+ writel(0, host->ioaddr + SDARG); -+ writel(0xf00000, host->ioaddr + SDTOUT); -+ writel(0, host->ioaddr + SDCDIV); -+ writel(0x7f8, host->ioaddr + SDHSTS); /* Write 1s to clear */ -+ writel(0, host->ioaddr + SDHCFG); -+ writel(0, host->ioaddr + SDHBCT); -+ writel(0, host->ioaddr + SDHBLC); -+ -+ /* Limit fifo usage due to silicon bug */ -+ temp = readl(host->ioaddr + SDEDM); -+ temp &= ~((SDEDM_THRESHOLD_MASK << SDEDM_READ_THRESHOLD_SHIFT) | -+ (SDEDM_THRESHOLD_MASK << SDEDM_WRITE_THRESHOLD_SHIFT)); -+ temp |= (FIFO_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) | -+ (FIFO_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT); -+ writel(temp, host->ioaddr + SDEDM); -+ msleep(20); -+ writel(SDVDD_POWER_ON, host->ioaddr + SDVDD); -+ msleep(20); -+ host->clock = 0; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+} -+ -+static void bcm2835_reset(struct mmc_host *mmc) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ if (host->dma_chan) -+ dmaengine_terminate_sync(host->dma_chan); -+ bcm2835_reset_internal(host); -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host); -+ -+static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) -+{ -+ int timediff; -+ u32 alternate_idle; -+ -+ alternate_idle = (host->mrq->data->flags & MMC_DATA_READ) ? -+ SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1; -+ -+ timediff = 0; -+ -+ while (1) { -+ u32 edm, fsm; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm == SDEDM_FSM_IDENTMODE) || -+ (fsm == SDEDM_FSM_DATAMODE)) -+ break; -+ if (fsm == alternate_idle) { -+ writel(edm | SDEDM_FORCE_DATA_MODE, -+ host->ioaddr + SDEDM); -+ break; -+ } -+ -+ timediff++; -+ if (timediff == 100000) { -+ dev_err(&host->pdev->dev, -+ "wait_transfer_complete - still waiting after %d retries\n", -+ timediff); -+ bcm2835_dumpregs(host); -+ host->mrq->data->error = -ETIMEDOUT; -+ return; -+ } -+ cpu_relax(); -+ } -+} -+ -+static void bcm2835_dma_complete(void *param) -+{ -+ struct bcm2835_host *host = param; -+ -+ schedule_work(&host->dma_work); -+} -+ -+static void bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) -+{ -+ unsigned long flags; -+ size_t blksize; -+ unsigned long wait_max; -+ -+ blksize = host->data->blksz; -+ -+ wait_max = jiffies + msecs_to_jiffies(500); -+ -+ local_irq_save(flags); -+ -+ while (blksize) { -+ int copy_words; -+ u32 hsts = 0; -+ size_t len; -+ u32 *buf; -+ -+ if (!sg_miter_next(&host->sg_miter)) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ len = min(host->sg_miter.length, blksize); -+ if (len % 4) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ blksize -= len; -+ host->sg_miter.consumed = len; -+ -+ buf = (u32 *)host->sg_miter.addr; -+ -+ copy_words = len / 4; -+ -+ while (copy_words) { -+ int burst_words, words; -+ u32 edm; -+ -+ burst_words = min(SDDATA_FIFO_PIO_BURST, copy_words); -+ edm = readl(host->ioaddr + SDEDM); -+ if (is_read) -+ words = ((edm >> 4) & 0x1f); -+ else -+ words = SDDATA_FIFO_WORDS - ((edm >> 4) & 0x1f); -+ -+ if (words < burst_words) { -+ int fsm_state = (edm & SDEDM_FSM_MASK); -+ struct device *dev = &host->pdev->dev; -+ -+ if ((is_read && -+ (fsm_state != SDEDM_FSM_READDATA && -+ fsm_state != SDEDM_FSM_READWAIT && -+ fsm_state != SDEDM_FSM_READCRC)) || -+ (!is_read && -+ (fsm_state != SDEDM_FSM_WRITEDATA && -+ fsm_state != SDEDM_FSM_WRITESTART1 && -+ fsm_state != SDEDM_FSM_WRITESTART2))) { -+ hsts = readl(host->ioaddr + SDHSTS); -+ dev_err(dev, "fsm %x, hsts %08x\n", -+ fsm_state, hsts); -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ if (time_after(jiffies, wait_max)) { -+ dev_err(dev, "PIO %s timeout - EDM %08x\n", -+ is_read ? "read" : "write", -+ edm); -+ hsts = SDHSTS_REW_TIME_OUT; -+ break; -+ } -+ ndelay((burst_words - words) * -+ host->ns_per_fifo_word); -+ continue; -+ } else if (words > copy_words) { -+ words = copy_words; -+ } -+ -+ copy_words -= words; -+ -+ while (words) { -+ if (is_read) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ else -+ writel(*(buf++), host->ioaddr + SDDATA); -+ words--; -+ } -+ } -+ -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ sg_miter_stop(&host->sg_miter); -+ -+ local_irq_restore(flags); -+} -+ -+static void bcm2835_transfer_pio(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdhsts; -+ bool is_read; -+ -+ is_read = (host->data->flags & MMC_DATA_READ) != 0; -+ bcm2835_transfer_block_pio(host, is_read); -+ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & (SDHSTS_CRC16_ERROR | -+ SDHSTS_CRC7_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ dev_err(dev, "%s transfer error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -EILSEQ; -+ } else if ((sdhsts & (SDHSTS_CMD_TIME_OUT | -+ SDHSTS_REW_TIME_OUT))) { -+ dev_err(dev, "%s timeout error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -ETIMEDOUT; -+ } -+} -+ -+static -+void bcm2835_prepare_dma(struct bcm2835_host *host, struct mmc_data *data) -+{ -+ int len, dir_data, dir_slave; -+ struct dma_async_tx_descriptor *desc = NULL; -+ struct dma_chan *dma_chan; -+ -+ dma_chan = host->dma_chan_rxtx; -+ if (data->flags & MMC_DATA_READ) { -+ dir_data = DMA_FROM_DEVICE; -+ dir_slave = DMA_DEV_TO_MEM; -+ } else { -+ dir_data = DMA_TO_DEVICE; -+ dir_slave = DMA_MEM_TO_DEV; -+ } -+ -+ /* The block doesn't manage the FIFO DREQs properly for -+ * multi-block transfers, so don't attempt to DMA the final -+ * few words. Unfortunately this requires the final sg entry -+ * to be trimmed. N.B. This code demands that the overspill -+ * is contained in a single sg entry. -+ */ -+ -+ host->drain_words = 0; -+ if ((data->blocks > 1) && (dir_data == DMA_FROM_DEVICE)) { -+ struct scatterlist *sg; -+ u32 len; -+ int i; -+ -+ len = min((u32)(FIFO_READ_THRESHOLD - 1) * 4, -+ (u32)data->blocks * data->blksz); -+ -+ for_each_sg(data->sg, sg, data->sg_len, i) { -+ if (sg_is_last(sg)) { -+ WARN_ON(sg->length < len); -+ sg->length -= len; -+ host->drain_page = sg_page(sg); -+ host->drain_offset = sg->offset + sg->length; -+ } -+ } -+ host->drain_words = len / 4; -+ } -+ -+ /* The parameters have already been validated, so this will not fail */ -+ (void)dmaengine_slave_config(dma_chan, -+ (dir_data == DMA_FROM_DEVICE) ? -+ &host->dma_cfg_rx : -+ &host->dma_cfg_tx); -+ -+ len = dma_map_sg(dma_chan->device->dev, data->sg, data->sg_len, -+ dir_data); -+ -+ if (len > 0) { -+ desc = dmaengine_prep_slave_sg(dma_chan, data->sg, -+ len, dir_slave, -+ DMA_PREP_INTERRUPT | -+ DMA_CTRL_ACK); -+ } -+ -+ if (desc) { -+ desc->callback = bcm2835_dma_complete; -+ desc->callback_param = host; -+ host->dma_desc = desc; -+ host->dma_chan = dma_chan; -+ host->dma_dir = dir_data; -+ } -+} -+ -+static void bcm2835_start_dma(struct bcm2835_host *host) -+{ -+ dmaengine_submit(host->dma_desc); -+ dma_async_issue_pending(host->dma_chan); -+} -+ -+static void bcm2835_set_transfer_irqs(struct bcm2835_host *host) -+{ -+ u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ -+ if (host->dma_desc) { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_BUSY_IRPT_EN; -+ } else { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_DATA_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ } -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static -+void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct mmc_data *data = cmd->data; -+ -+ WARN_ON(host->data); -+ -+ host->data = data; -+ if (!data) -+ return; -+ -+ host->data_complete = false; -+ host->data->bytes_xfered = 0; -+ -+ if (!host->dma_desc) { -+ /* Use PIO */ -+ int flags = SG_MITER_ATOMIC; -+ -+ if (data->flags & MMC_DATA_READ) -+ flags |= SG_MITER_TO_SG; -+ else -+ flags |= SG_MITER_FROM_SG; -+ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); -+ host->blocks = data->blocks; -+ } -+ -+ bcm2835_set_transfer_irqs(host); -+ -+ writel(data->blksz, host->ioaddr + SDHBCT); -+ writel(data->blocks, host->ioaddr + SDHBLC); -+} -+ -+static u32 bcm2835_read_wait_sdcmd(struct bcm2835_host *host, u32 max_ms) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 value; -+ int ret; -+ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), 1, 10); -+ if (ret == -ETIMEDOUT) -+ /* if it takes a while make poll interval bigger */ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), -+ 10, max_ms * 1000); -+ if (ret == -ETIMEDOUT) -+ dev_err(dev, "%s: timeout (%d ms)\n", __func__, max_ms); -+ -+ return value; -+} -+ -+static void bcm2835_finish_request(struct bcm2835_host *host) -+{ -+ struct dma_chan *terminate_chan = NULL; -+ struct mmc_request *mrq; -+ -+ cancel_delayed_work(&host->timeout_work); -+ -+ mrq = host->mrq; -+ -+ host->mrq = NULL; -+ host->cmd = NULL; -+ host->data = NULL; -+ -+ host->dma_desc = NULL; -+ terminate_chan = host->dma_chan; -+ host->dma_chan = NULL; -+ -+ if (terminate_chan) { -+ int err = dmaengine_terminate_all(terminate_chan); -+ -+ if (err) -+ dev_err(&host->pdev->dev, -+ "failed to terminate DMA (%d)\n", err); -+ } -+ -+ mmc_request_done(host->mmc, mrq); -+} -+ -+static -+bool bcm2835_send_command(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdcmd, sdhsts; -+ unsigned long timeout; -+ -+ WARN_ON(host->cmd); -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "previous command never completed.\n"); -+ bcm2835_dumpregs(host); -+ cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ if (!cmd->data && cmd->busy_timeout > 9000) -+ timeout = DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; -+ else -+ timeout = 10 * HZ; -+ schedule_delayed_work(&host->timeout_work, timeout); -+ -+ host->cmd = cmd; -+ -+ /* Clear any error flags */ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & SDHSTS_ERROR_MASK) -+ writel(sdhsts, host->ioaddr + SDHSTS); -+ -+ if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { -+ dev_err(dev, "unsupported response type!\n"); -+ cmd->error = -EINVAL; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ bcm2835_prepare_data(host, cmd); -+ -+ writel(cmd->arg, host->ioaddr + SDARG); -+ -+ sdcmd = cmd->opcode & SDCMD_CMD_MASK; -+ -+ host->use_busy = false; -+ if (!(cmd->flags & MMC_RSP_PRESENT)) { -+ sdcmd |= SDCMD_NO_RESPONSE; -+ } else { -+ if (cmd->flags & MMC_RSP_136) -+ sdcmd |= SDCMD_LONG_RESPONSE; -+ if (cmd->flags & MMC_RSP_BUSY) { -+ sdcmd |= SDCMD_BUSYWAIT; -+ host->use_busy = true; -+ } -+ } -+ -+ if (cmd->data) { -+ if (cmd->data->flags & MMC_DATA_WRITE) -+ sdcmd |= SDCMD_WRITE_CMD; -+ if (cmd->data->flags & MMC_DATA_READ) -+ sdcmd |= SDCMD_READ_CMD; -+ } -+ -+ writel(sdcmd | SDCMD_NEW_FLAG, host->ioaddr + SDCMD); -+ -+ return true; -+} -+ -+static void bcm2835_transfer_complete(struct bcm2835_host *host) -+{ -+ struct mmc_data *data; -+ -+ WARN_ON(!host->data_complete); -+ -+ data = host->data; -+ host->data = NULL; -+ -+ /* Need to send CMD12 if - -+ * a) open-ended multiblock transfer (no CMD23) -+ * b) error in multiblock transfer -+ */ -+ if (host->mrq->stop && (data->error || !host->use_sbc)) { -+ if (bcm2835_send_command(host, host->mrq->stop)) { -+ /* No busy, so poll for completion */ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else { -+ bcm2835_wait_transfer_complete(host); -+ bcm2835_finish_request(host); -+ } -+} -+ -+static void bcm2835_finish_data(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_data *data; -+ -+ data = host->data; -+ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ data->bytes_xfered = data->error ? 0 : (data->blksz * data->blocks); -+ -+ host->data_complete = true; -+ -+ if (host->cmd) { -+ /* Data managed to finish before the -+ * command completed. Make sure we do -+ * things in the proper order. -+ */ -+ dev_dbg(dev, "Finished early - HSTS %08x\n", -+ readl(host->ioaddr + SDHSTS)); -+ } else { -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_command *cmd = host->cmd; -+ u32 sdcmd; -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ -+ /* Check for errors */ -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "command never completed.\n"); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EIO; -+ bcm2835_finish_request(host); -+ return; -+ } else if (sdcmd & SDCMD_FAIL_FLAG) { -+ u32 sdhsts = readl(host->ioaddr + SDHSTS); -+ -+ /* Clear the errors */ -+ writel(SDHSTS_ERROR_MASK, host->ioaddr + SDHSTS); -+ -+ if (!(sdhsts & SDHSTS_CRC7_ERROR) || -+ (host->cmd->opcode != MMC_SEND_OP_COND)) { -+ if (sdhsts & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } else { -+ dev_err(dev, "unexpected command %d error\n", -+ host->cmd->opcode); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EILSEQ; -+ } -+ bcm2835_finish_request(host); -+ return; -+ } -+ } -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) { -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ cmd->resp[3 - i] = -+ readl(host->ioaddr + SDRSP0 + i * 4); -+ } -+ } else { -+ cmd->resp[0] = readl(host->ioaddr + SDRSP0); -+ } -+ } -+ -+ if (cmd == host->mrq->sbc) { -+ /* Finished CMD23, now send actual command. */ -+ host->cmd = NULL; -+ if (bcm2835_send_command(host, host->mrq->cmd)) { -+ if (host->data && host->dma_desc) -+ /* DMA transfer starts now, PIO starts -+ * after irq -+ */ -+ bcm2835_start_dma(host); -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (cmd == host->mrq->stop) { -+ /* Finished CMD12 */ -+ bcm2835_finish_request(host); -+ } else { -+ /* Processed actual command. */ -+ host->cmd = NULL; -+ if (!host->data) -+ bcm2835_finish_request(host); -+ else if (host->data_complete) -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_timeout(struct work_struct *work) -+{ -+ struct delayed_work *d = to_delayed_work(work); -+ struct bcm2835_host *host = -+ container_of(d, struct bcm2835_host, timeout_work); -+ struct device *dev = &host->pdev->dev; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->mrq) { -+ dev_err(dev, "timeout waiting for hardware interrupt.\n"); -+ bcm2835_dumpregs(host); -+ -+ if (host->data) { -+ host->data->error = -ETIMEDOUT; -+ bcm2835_finish_data(host); -+ } else { -+ if (host->cmd) -+ host->cmd->error = -ETIMEDOUT; -+ else -+ host->mrq->cmd->error = -ETIMEDOUT; -+ -+ bcm2835_finish_request(host); -+ } -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static bool bcm2835_check_cmd_error(struct bcm2835_host *host, u32 intmask) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!(intmask & SDHSTS_ERROR_MASK)) -+ return false; -+ -+ if (!host->cmd) -+ return true; -+ -+ dev_err(dev, "sdhost_busy_irq: intmask %08x\n", intmask); -+ if (intmask & SDHSTS_CRC7_ERROR) { -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & (SDHSTS_CRC16_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ if (host->mrq->data) -+ host->mrq->data->error = -EILSEQ; -+ else -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & SDHSTS_REW_TIME_OUT) { -+ if (host->mrq->data) -+ host->mrq->data->error = -ETIMEDOUT; -+ else -+ host->cmd->error = -ETIMEDOUT; -+ } else if (intmask & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } -+ bcm2835_dumpregs(host); -+ return true; -+} -+ -+static void bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask) -+{ -+ if (!host->data) -+ return; -+ if (intmask & (SDHSTS_CRC16_ERROR | SDHSTS_FIFO_ERROR)) -+ host->data->error = -EILSEQ; -+ if (intmask & SDHSTS_REW_TIME_OUT) -+ host->data->error = -ETIMEDOUT; -+} -+ -+static void bcm2835_busy_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->cmd)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (WARN_ON(!host->use_busy)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ host->use_busy = false; -+ -+ bcm2835_finish_command(host); -+} -+ -+static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask) -+{ -+ /* There are no dedicated data/space available interrupt -+ * status bits, so it is necessary to use the single shared -+ * data/space available FIFO status bits. It is therefore not -+ * an error to get here when there is no data transfer in -+ * progress. -+ */ -+ if (!host->data) -+ return; -+ -+ bcm2835_check_data_error(host, intmask); -+ if (host->data->error) -+ goto finished; -+ -+ if (host->data->flags & MMC_DATA_WRITE) { -+ /* Use the block interrupt for writes after the first block */ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN); -+ host->hcfg |= SDHCFG_BLOCK_IRPT_EN; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ bcm2835_transfer_pio(host); -+ } else { -+ bcm2835_transfer_pio(host); -+ host->blocks--; -+ if ((host->blocks == 0) || host->data->error) -+ goto finished; -+ } -+ return; -+ -+finished: -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static void bcm2835_data_threaded_irq(struct bcm2835_host *host) -+{ -+ if (!host->data) -+ return; -+ if ((host->blocks == 0) || host->data->error) -+ bcm2835_finish_data(host); -+} -+ -+static void bcm2835_block_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->data)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (!host->dma_desc) { -+ WARN_ON(!host->blocks); -+ if (host->data->error || (--host->blocks == 0)) -+ bcm2835_finish_data(host); -+ else -+ bcm2835_transfer_pio(host); -+ } else if (host->data->flags & MMC_DATA_WRITE) { -+ bcm2835_finish_data(host); -+ } -+} -+ -+static irqreturn_t bcm2835_irq(int irq, void *dev_id) -+{ -+ irqreturn_t result = IRQ_NONE; -+ struct bcm2835_host *host = dev_id; -+ u32 intmask; -+ -+ spin_lock(&host->lock); -+ -+ intmask = readl(host->ioaddr + SDHSTS); -+ -+ writel(SDHSTS_BUSY_IRPT | -+ SDHSTS_BLOCK_IRPT | -+ SDHSTS_SDIO_IRPT | -+ SDHSTS_DATA_FLAG, -+ host->ioaddr + SDHSTS); -+ -+ if (intmask & SDHSTS_BLOCK_IRPT) { -+ bcm2835_check_data_error(host, intmask); -+ host->irq_block = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ if (intmask & SDHSTS_BUSY_IRPT) { -+ if (!bcm2835_check_cmd_error(host, intmask)) { -+ host->irq_busy = true; -+ result = IRQ_WAKE_THREAD; -+ } else { -+ result = IRQ_HANDLED; -+ } -+ } -+ -+ /* There is no true data interrupt status bit, so it is -+ * necessary to qualify the data flag with the interrupt -+ * enable bit. -+ */ -+ if ((intmask & SDHSTS_DATA_FLAG) && -+ (host->hcfg & SDHCFG_DATA_IRPT_EN)) { -+ bcm2835_data_irq(host, intmask); -+ host->irq_data = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ spin_unlock(&host->lock); -+ -+ return result; -+} -+ -+static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id) -+{ -+ struct bcm2835_host *host = dev_id; -+ unsigned long flags; -+ bool block, busy, data; -+ -+ spin_lock_irqsave(&host->lock, flags); -+ -+ block = host->irq_block; -+ busy = host->irq_busy; -+ data = host->irq_data; -+ host->irq_block = false; -+ host->irq_busy = false; -+ host->irq_data = false; -+ -+ spin_unlock_irqrestore(&host->lock, flags); -+ -+ mutex_lock(&host->mutex); -+ -+ if (block) -+ bcm2835_block_irq(host); -+ if (busy) -+ bcm2835_busy_irq(host); -+ if (data) -+ bcm2835_data_threaded_irq(host); -+ -+ mutex_unlock(&host->mutex); -+ -+ return IRQ_HANDLED; -+} -+ -+static void bcm2835_dma_complete_work(struct work_struct *work) -+{ -+ struct bcm2835_host *host = -+ container_of(work, struct bcm2835_host, dma_work); -+ struct mmc_data *data = host->data; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->dma_chan) { -+ dma_unmap_sg(host->dma_chan->device->dev, -+ data->sg, data->sg_len, -+ host->dma_dir); -+ -+ host->dma_chan = NULL; -+ } -+ -+ if (host->drain_words) { -+ unsigned long flags; -+ void *page; -+ u32 *buf; -+ -+ if (host->drain_offset & PAGE_MASK) { -+ host->drain_page += host->drain_offset >> PAGE_SHIFT; -+ host->drain_offset &= ~PAGE_MASK; -+ } -+ local_irq_save(flags); -+ page = kmap_atomic(host->drain_page); -+ buf = page + host->drain_offset; -+ -+ while (host->drain_words) { -+ u32 edm = readl(host->ioaddr + SDEDM); -+ -+ if ((edm >> 4) & 0x1f) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ host->drain_words--; -+ } -+ -+ kunmap_atomic(page); -+ local_irq_restore(flags); -+ } -+ -+ bcm2835_finish_data(host); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) -+{ -+ int div; -+ -+ /* The SDCDIV register has 11 bits, and holds (div - 2). But -+ * in data mode the max is 50MHz wihout a minimum, and only -+ * the bottom 3 bits are used. Since the switch over is -+ * automatic (unless we have marked the card as slow...), -+ * chosen values have to make sense in both modes. Ident mode -+ * must be 100-400KHz, so can range check the requested -+ * clock. CMD15 must be used to return to data mode, so this -+ * can be monitored. -+ * -+ * clock 250MHz -> 0->125MHz, 1->83.3MHz, 2->62.5MHz, 3->50.0MHz -+ * 4->41.7MHz, 5->35.7MHz, 6->31.3MHz, 7->27.8MHz -+ * -+ * 623->400KHz/27.8MHz -+ * reset value (507)->491159/50MHz -+ * -+ * BUT, the 3-bit clock divisor in data mode is too small if -+ * the core clock is higher than 250MHz, so instead use the -+ * SLOW_CARD configuration bit to force the use of the ident -+ * clock divisor at all times. -+ */ -+ -+ if (clock < 100000) { -+ /* Can't stop the clock, but make it as slow as possible -+ * to show willing -+ */ -+ host->cdiv = SDCDIV_MAX_CDIV; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ return; -+ } -+ -+ div = host->max_clk / clock; -+ if (div < 2) -+ div = 2; -+ if ((host->max_clk / div) > clock) -+ div++; -+ div -= 2; -+ -+ if (div > SDCDIV_MAX_CDIV) -+ div = SDCDIV_MAX_CDIV; -+ -+ clock = host->max_clk / (div + 2); -+ host->mmc->actual_clock = clock; -+ -+ /* Calibrate some delays */ -+ -+ host->ns_per_fifo_word = (1000000000 / clock) * -+ ((host->mmc->caps & MMC_CAP_4_BIT_DATA) ? 8 : 32); -+ -+ host->cdiv = div; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ -+ /* Set the timeout to 500ms */ -+ writel(host->mmc->actual_clock / 2, host->ioaddr + SDTOUT); -+} -+ -+static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ struct device *dev = &host->pdev->dev; -+ u32 edm, fsm; -+ -+ /* Reset the error statuses in case this is a retry */ -+ if (mrq->sbc) -+ mrq->sbc->error = 0; -+ if (mrq->cmd) -+ mrq->cmd->error = 0; -+ if (mrq->data) -+ mrq->data->error = 0; -+ if (mrq->stop) -+ mrq->stop->error = 0; -+ -+ if (mrq->data && !is_power_of_2(mrq->data->blksz)) { -+ dev_err(dev, "unsupported block size (%d bytes)\n", -+ mrq->data->blksz); -+ mrq->cmd->error = -EINVAL; -+ mmc_request_done(mmc, mrq); -+ return; -+ } -+ -+ if (host->use_dma && mrq->data && (mrq->data->blocks > PIO_THRESHOLD)) -+ bcm2835_prepare_dma(host, mrq->data); -+ -+ mutex_lock(&host->mutex); -+ -+ WARN_ON(host->mrq); -+ host->mrq = mrq; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm != SDEDM_FSM_IDENTMODE) && -+ (fsm != SDEDM_FSM_DATAMODE)) { -+ dev_err(dev, "previous command (%d) not complete (EDM %08x)\n", -+ readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, -+ edm); -+ bcm2835_dumpregs(host); -+ mrq->cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ mutex_unlock(&host->mutex); -+ return; -+ } -+ -+ host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ if (host->use_sbc) { -+ if (bcm2835_send_command(host, mrq->sbc)) { -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (bcm2835_send_command(host, mrq->cmd)) { -+ if (host->data && host->dma_desc) { -+ /* DMA transfer starts now, PIO starts after irq */ -+ bcm2835_start_dma(host); -+ } -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ mutex_lock(&host->mutex); -+ -+ if (!ios->clock || ios->clock != host->clock) { -+ bcm2835_set_clock(host, ios->clock); -+ host->clock = ios->clock; -+ } -+ -+ /* set bus width */ -+ host->hcfg &= ~SDHCFG_WIDE_EXT_BUS; -+ if (ios->bus_width == MMC_BUS_WIDTH_4) -+ host->hcfg |= SDHCFG_WIDE_EXT_BUS; -+ -+ host->hcfg |= SDHCFG_WIDE_INT_BUS; -+ -+ /* Disable clever clock switching, to cope with fast core clocks */ -+ host->hcfg |= SDHCFG_SLOW_CARD; -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static struct mmc_host_ops bcm2835_ops = { -+ .request = bcm2835_request, -+ .set_ios = bcm2835_set_ios, -+ .hw_reset = bcm2835_reset, -+}; -+ -+static int bcm2835_add_host(struct bcm2835_host *host) -+{ -+ struct mmc_host *mmc = host->mmc; -+ struct device *dev = &host->pdev->dev; -+ char pio_limit_string[20]; -+ int ret; -+ -+ mmc->f_max = host->max_clk; -+ mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; -+ -+ mmc->max_busy_timeout = ~0 / (mmc->f_max / 1000); -+ -+ dev_dbg(dev, "f_max %d, f_min %d, max_busy_timeout %d\n", -+ mmc->f_max, mmc->f_min, mmc->max_busy_timeout); -+ -+ /* host controller capabilities */ -+ mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | -+ MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_ERASE | -+ MMC_CAP_CMD23; -+ -+ spin_lock_init(&host->lock); -+ mutex_init(&host->mutex); -+ -+ if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) { -+ dev_warn(dev, "unable to initialise DMA channel. Falling back to PIO\n"); -+ host->use_dma = false; -+ } else { -+ host->use_dma = true; -+ -+ host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; -+ host->dma_cfg_tx.src_addr = 0; -+ host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; -+ -+ host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; -+ host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; -+ host->dma_cfg_rx.dst_addr = 0; -+ -+ if (dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_tx) != 0 || -+ dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_rx) != 0) -+ host->use_dma = false; -+ } -+ -+ mmc->max_segs = 128; -+ mmc->max_req_size = 524288; -+ mmc->max_seg_size = mmc->max_req_size; -+ mmc->max_blk_size = 1024; -+ mmc->max_blk_count = 65535; -+ -+ /* report supported voltage ranges */ -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ -+ INIT_WORK(&host->dma_work, bcm2835_dma_complete_work); -+ INIT_DELAYED_WORK(&host->timeout_work, bcm2835_timeout); -+ -+ /* Set interrupt enables */ -+ host->hcfg = SDHCFG_BUSY_IRPT_EN; -+ -+ bcm2835_reset_internal(host); -+ -+ ret = request_threaded_irq(host->irq, bcm2835_irq, -+ bcm2835_threaded_irq, -+ 0, mmc_hostname(mmc), host); -+ if (ret) { -+ dev_err(dev, "failed to request IRQ %d: %d\n", host->irq, ret); -+ return ret; -+ } -+ -+ ret = mmc_add_host(mmc); -+ if (ret) { -+ free_irq(host->irq, host); -+ return ret; -+ } -+ -+ pio_limit_string[0] = '\0'; -+ if (host->use_dma && (PIO_THRESHOLD > 0)) -+ sprintf(pio_limit_string, " (>%d)", PIO_THRESHOLD); -+ dev_info(dev, "loaded - DMA %s%s\n", -+ host->use_dma ? "enabled" : "disabled", pio_limit_string); -+ -+ return 0; -+} -+ -+static int bcm2835_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct clk *clk; -+ struct resource *iomem; -+ struct bcm2835_host *host; -+ struct mmc_host *mmc; -+ const __be32 *regaddr_p; -+ int ret; -+ -+ dev_dbg(dev, "%s\n", __func__); -+ mmc = mmc_alloc_host(sizeof(*host), dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ mmc->ops = &bcm2835_ops; -+ host = mmc_priv(mmc); -+ host->mmc = mmc; -+ host->pdev = pdev; -+ spin_lock_init(&host->lock); -+ -+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ host->ioaddr = devm_ioremap_resource(dev, iomem); -+ if (IS_ERR(host->ioaddr)) { -+ ret = PTR_ERR(host->ioaddr); -+ goto err; -+ } -+ -+ /* Parse OF address directly to get the physical address for -+ * DMA to our registers. -+ */ -+ regaddr_p = of_get_address(pdev->dev.of_node, 0, NULL, NULL); -+ if (!regaddr_p) { -+ dev_err(dev, "Can't get phys address\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ host->phys_addr = be32_to_cpup(regaddr_p); -+ -+ host->dma_chan = NULL; -+ host->dma_desc = NULL; -+ -+ host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx"); -+ -+ clk = devm_clk_get(dev, NULL); -+ if (IS_ERR(clk)) { -+ ret = PTR_ERR(clk); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "could not get clk: %d\n", ret); -+ goto err; -+ } -+ -+ host->max_clk = clk_get_rate(clk); -+ -+ host->irq = platform_get_irq(pdev, 0); -+ if (host->irq <= 0) { -+ dev_err(dev, "get IRQ failed\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ ret = mmc_of_parse(mmc); -+ if (ret) -+ goto err; -+ -+ ret = bcm2835_add_host(host); -+ if (ret) -+ goto err; -+ -+ platform_set_drvdata(pdev, host); -+ -+ dev_dbg(dev, "%s -> OK\n", __func__); -+ -+ return 0; -+ -+err: -+ dev_dbg(dev, "%s -> err %d\n", __func__, ret); -+ mmc_free_host(mmc); -+ -+ return ret; -+} -+ -+static int bcm2835_remove(struct platform_device *pdev) -+{ -+ struct bcm2835_host *host = platform_get_drvdata(pdev); -+ -+ mmc_remove_host(host->mmc); -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ -+ free_irq(host->irq, host); -+ -+ cancel_work_sync(&host->dma_work); -+ cancel_delayed_work_sync(&host->timeout_work); -+ -+ mmc_free_host(host->mmc); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm2835_match[] = { -+ { .compatible = "brcm,bcm2835-sdhost" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, bcm2835_match); -+ -+static struct platform_driver bcm2835_driver = { -+ .probe = bcm2835_probe, -+ .remove = bcm2835_remove, -+ .driver = { -+ .name = "sdhost-bcm2835", -+ .of_match_table = bcm2835_match, -+ }, -+}; -+module_platform_driver(bcm2835_driver); -+ -+MODULE_ALIAS("platform:sdhost-bcm2835"); -+MODULE_DESCRIPTION("BCM2835 SDHost driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Phil Elwell"); -From patchwork Wed Mar 8 09:19:05 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,3/7] mmc: bcm2835: add sdhost controller to devicetree -From: Gerd Hoffmann -X-Patchwork-Id: 9610693 -Message-Id: <1488964751-22763-6-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:05 +0100 - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ - 2 files changed, 16 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 1e00a28..8b95832 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -69,6 +69,12 @@ - bus-width = <4>; - }; - -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ bus-width = <4>; -+}; -+ - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9798bc9..19099a5 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -350,6 +350,16 @@ - arm,primecell-periphid = <0x00241011>; - }; - -+ sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+ status = "disabled"; -+ }; -+ - i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x20>, -From patchwork Wed Mar 8 09:19:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4, 4/7] arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and - multi_v7_defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610689 -Message-Id: <1488964751-22763-8-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:07 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm/configs/bcm2835_defconfig | 1 + - arch/arm/configs/multi_v7_defconfig | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig -index 4b89f4e..3767c24 100644 ---- a/arch/arm/configs/bcm2835_defconfig -+++ b/arch/arm/configs/bcm2835_defconfig -@@ -92,6 +92,7 @@ CONFIG_MMC=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_PLTFM=y - CONFIG_MMC_SDHCI_IPROC=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig -index a94126f..63b94d0 100644 ---- a/arch/arm/configs/multi_v7_defconfig -+++ b/arch/arm/configs/multi_v7_defconfig -@@ -730,6 +730,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SH_MMCIF=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_CLASS_FLASH=m -From patchwork Wed Mar 8 09:19:09 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,5/7] arm64: set CONFIG_MMC_BCM2835=y in defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610647 -Message-Id: <1488964751-22763-10-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:09 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm64/configs/defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index 7c48028..519a55c 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -398,6 +398,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_K3=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -From patchwork Wed Mar 8 09:19:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,6/7] arm: dts: bcm283x: switch from &sdhci to &sdhost -From: Gerd Hoffmann -X-Patchwork-Id: 9610687 -Message-Id: <1488964751-22763-11-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:10 +0100 - -sdcard access with the sdhost controller is faster. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 8b95832..e36c392 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -65,13 +65,13 @@ - &sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&emmc_gpio48>; -- status = "okay"; - bus-width = <4>; - }; - - &sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; - bus-width = <4>; - }; - -From patchwork Wed Mar 8 09:19:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,7/7] arm64: dts: bcm2837: add &sdhci and &sdhost -From: Gerd Hoffmann -X-Patchwork-Id: 9610637 -Message-Id: <1488964751-22763-12-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:11 +0100 - -For the raspberry pi 3 we'll need both sdhci (handles sdio wifi) and -sdhost (handles sdcard). - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt ---- - arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -index c309633..972f14d 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -@@ -22,3 +22,20 @@ - &uart1 { - status = "okay"; - }; -+ -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio34>; -+ status = "okay"; -+ bus-width = <4>; -+ non-removable; -+}; -+ -+/* SDHOST is used to drive the SD card */ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; -+ bus-width = <4>; -+}; -From patchwork Sat Mar 25 13:17:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: mmc: bcm2835: Fix possible NULL ptr dereference in bcm2835_request -From: Stefan Wahren -X-Patchwork-Id: 9644591 -Message-Id: <1490447820-751-1-git-send-email-stefan.wahren@i2se.com> -To: Ulf Hansson , Eric Anholt , - Gerd Hoffmann -Cc: Jaehoon Chung , - Dan Carpenter , - linux-rpi-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, - Stefan Wahren -Date: Sat, 25 Mar 2017 13:17:00 +0000 - -This fixes a NULL pointer dereference in case of a MMC request with a -set block count command and no data. - -Reported-by: Dan Carpenter -Signed-off-by: Stefan Wahren ---- - drivers/mmc/host/bcm2835.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -index 7d1b0db..1f343a4 100644 ---- a/drivers/mmc/host/bcm2835.c -+++ b/drivers/mmc/host/bcm2835.c -@@ -1200,7 +1200,8 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - return; - } - -- host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ host->use_sbc = !!mrq->sbc && host->mrq->data && -+ (host->mrq->data->flags & MMC_DATA_READ); - if (host->use_sbc) { - if (bcm2835_send_command(host, mrq->sbc)) { - if (!host->use_busy) diff --git a/build_configs.sh b/build_configs.sh index 55fb89d01..140511f19 100755 --- a/build_configs.sh +++ b/build_configs.sh @@ -46,8 +46,6 @@ function merge_configs() echo "# powerpc" > $name elif [ "x$arch" == "xppc64le" ]; then echo "# powerpc" > $name - elif [ "x$arch" == "xppc64p7" ]; then - echo "# powerpc" > $name elif [ "x$arch" == "xs390x" ]; then echo "# s390" > $name elif [ "x$arch" == "xarmv7hl" ]; then diff --git a/cgroup-for-4.15-fixes-cgroup-fix-css_task_iter-crash-on-CSS_TASK_ITER_PROC.patch b/cgroup-for-4.15-fixes-cgroup-fix-css_task_iter-crash-on-CSS_TASK_ITER_PROC.patch new file mode 100644 index 000000000..fc84559d0 --- /dev/null +++ b/cgroup-for-4.15-fixes-cgroup-fix-css_task_iter-crash-on-CSS_TASK_ITER_PROC.patch @@ -0,0 +1,132 @@ +From patchwork Wed Dec 20 15:13:31 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [cgroup/for-4.15-fixes] cgroup: fix css_task_iter crash on + CSS_TASK_ITER_PROC +From: Tejun Heo +X-Patchwork-Id: 10125801 +Message-Id: <20171220151331.GA3413940@devbig577.frc2.facebook.com> +To: Laura Abbott +Cc: Zefan Li , linux-kernel@vger.kernel.org, + cgroups@vger.kernel.org, regressions@leemhuis.info, + Bronek Kozicki , George Amanakis +Date: Wed, 20 Dec 2017 07:13:31 -0800 + +Hello, + +Applied the following to cgroup/for-4.15-fixes. Will push out to +linus later this week. I could reproduce the problem reliably and am +pretty sure this is the right fix but I'd greatly appreciate if you +guys can confirm the fix too. + +Thank you very much. + +------ 8< ------ +>From 74d0833c659a8a54735e5efdd44f4b225af68586 Mon Sep 17 00:00:00 2001 +From: Tejun Heo +Date: Wed, 20 Dec 2017 07:09:19 -0800 + +While teaching css_task_iter to handle skipping over tasks which +aren't group leaders, bc2fb7ed089f ("cgroup: add @flags to +css_task_iter_start() and implement CSS_TASK_ITER_PROCS") introduced a +silly bug. + +CSS_TASK_ITER_PROCS is implemented by repeating +css_task_iter_advance() while the advanced cursor is pointing to a +non-leader thread. However, the cursor variable, @l, wasn't updated +when the iteration has to advance to the next css_set and the +following repetition would operate on the terminal @l from the +previous iteration which isn't pointing to a valid task leading to +oopses like the following or infinite looping. + + BUG: unable to handle kernel NULL pointer dereference at 0000000000000254 + IP: __task_pid_nr_ns+0xc7/0xf0 + PGD 0 P4D 0 + Oops: 0000 [#1] SMP + ... + CPU: 2 PID: 1 Comm: systemd Not tainted 4.14.4-200.fc26.x86_64 #1 + Hardware name: System manufacturer System Product Name/PRIME B350M-A, BIOS 3203 11/09/2017 + task: ffff88c4baee8000 task.stack: ffff96d5c3158000 + RIP: 0010:__task_pid_nr_ns+0xc7/0xf0 + RSP: 0018:ffff96d5c315bd50 EFLAGS: 00010206 + RAX: 0000000000000000 RBX: ffff88c4b68c6000 RCX: 0000000000000250 + RDX: ffffffffa5e47960 RSI: 0000000000000000 RDI: ffff88c490f6ab00 + RBP: ffff96d5c315bd50 R08: 0000000000001000 R09: 0000000000000005 + R10: ffff88c4be006b80 R11: ffff88c42f1b8004 R12: ffff96d5c315bf18 + R13: ffff88c42d7dd200 R14: ffff88c490f6a510 R15: ffff88c4b68c6000 + FS: 00007f9446f8ea00(0000) GS:ffff88c4be680000(0000) knlGS:0000000000000000 + CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + CR2: 0000000000000254 CR3: 00000007f956f000 CR4: 00000000003406e0 + Call Trace: + cgroup_procs_show+0x19/0x30 + cgroup_seqfile_show+0x4c/0xb0 + kernfs_seq_show+0x21/0x30 + seq_read+0x2ec/0x3f0 + kernfs_fop_read+0x134/0x180 + __vfs_read+0x37/0x160 + ? security_file_permission+0x9b/0xc0 + vfs_read+0x8e/0x130 + SyS_read+0x55/0xc0 + entry_SYSCALL_64_fastpath+0x1a/0xa5 + RIP: 0033:0x7f94455f942d + RSP: 002b:00007ffe81ba2d00 EFLAGS: 00000293 ORIG_RAX: 0000000000000000 + RAX: ffffffffffffffda RBX: 00005574e2233f00 RCX: 00007f94455f942d + RDX: 0000000000001000 RSI: 00005574e2321a90 RDI: 000000000000002b + RBP: 0000000000000000 R08: 00005574e2321a90 R09: 00005574e231de60 + R10: 00007f94458c8b38 R11: 0000000000000293 R12: 00007f94458c8ae0 + R13: 00007ffe81ba3800 R14: 0000000000000000 R15: 00005574e2116560 + Code: 04 74 0e 89 f6 48 8d 04 76 48 8d 04 c5 f0 05 00 00 48 8b bf b8 05 00 00 48 01 c7 31 c0 48 8b 0f 48 85 c9 74 18 8b b2 30 08 00 00 <3b> 71 04 77 0d 48 c1 e6 05 48 01 f1 48 3b 51 38 74 09 5d c3 8b + RIP: __task_pid_nr_ns+0xc7/0xf0 RSP: ffff96d5c315bd50 + +Fix it by moving the initialization of the cursor below the repeat +label. While at it, rename it to @next for readability. + +Signed-off-by: Tejun Heo +Fixes: bc2fb7ed089f ("cgroup: add @flags to css_task_iter_start() and implement CSS_TASK_ITER_PROCS") +Cc: stable@vger.kernel.org # v4.14+ +Reported-by: Laura Abbott +Reported-by: Bronek Kozicki +Reported-by: George Amanakis +Signed-off-by: Tejun Heo +--- + kernel/cgroup/cgroup.c | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +diff --git a/kernel/cgroup/cgroup.c b/kernel/cgroup/cgroup.c +index f4c2f8c..2cf06c2 100644 +--- a/kernel/cgroup/cgroup.c ++++ b/kernel/cgroup/cgroup.c +@@ -4125,26 +4125,24 @@ static void css_task_iter_advance_css_set(struct css_task_iter *it) + + static void css_task_iter_advance(struct css_task_iter *it) + { +- struct list_head *l = it->task_pos; ++ struct list_head *next; + + lockdep_assert_held(&css_set_lock); +- WARN_ON_ONCE(!l); +- + repeat: + /* + * Advance iterator to find next entry. cset->tasks is consumed + * first and then ->mg_tasks. After ->mg_tasks, we move onto the + * next cset. + */ +- l = l->next; ++ next = it->task_pos->next; + +- if (l == it->tasks_head) +- l = it->mg_tasks_head->next; ++ if (next == it->tasks_head) ++ next = it->mg_tasks_head->next; + +- if (l == it->mg_tasks_head) ++ if (next == it->mg_tasks_head) + css_task_iter_advance_css_set(it); + else +- it->task_pos = l; ++ it->task_pos = next; + + /* if PROCS, skip over tasks which aren't group leaders */ + if ((it->flags & CSS_TASK_ITER_PROCS) && it->task_pos && diff --git a/config_generation b/config_generation index e5dde85cf..64ae444f4 100644 --- a/config_generation +++ b/config_generation @@ -5,7 +5,7 @@ # x86_64 x86_64=baseconfig:baseconfig-x86:baseconfig-x86-x86_64 -x86_64-debug=baseconfig:baseconfig-x86:baseconfig-x86-x86_64:debugconfig:debugconfig-x86 +x86_64-debug=baseconfig:baseconfig-x86:baseconfig-x86-x86_64:debugconfig:debugconfig-x86:debugconfig-x86-x86_64 # i686 i686=baseconfig:baseconfig-x86:baseconfig-x86-i686 @@ -20,8 +20,7 @@ ppc64-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64:debugconf # ppc64le ppc64le=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64le ppc64le-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64le:debugconfig -ppc64p7=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64p7 -ppc64p7-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64p7:debugconfig + # s390x s390x=baseconfig:baseconfig-s390x s390x-debug=baseconfig:baseconfig-s390x:debugconfig @@ -32,6 +31,6 @@ aarch64-debug=baseconfig:baseconfig-arm:baseconfig-arm-arm64:debugconfig:debugco # arm armv7hl=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7 -armv7hl-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7:debugconfig:debugconfig-arm:debugconfig-arm-armv7 +armv7hl-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7:debugconfig:debugconfig-arm armv7hl-lpae=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae -armv7hl-lpae-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae:debugconfig:debugconfig-arm:debugconfig-arm-armv7 +armv7hl-lpae-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae:debugconfig:debugconfig-arm diff --git a/dccp-CVE-2017-8824-use-after-free-in-DCCP-code.patch b/dccp-CVE-2017-8824-use-after-free-in-DCCP-code.patch new file mode 100644 index 000000000..192e4358f --- /dev/null +++ b/dccp-CVE-2017-8824-use-after-free-in-DCCP-code.patch @@ -0,0 +1,43 @@ +From 69c64866ce072dea1d1e59a0d61e0f66c0dffb76 Mon Sep 17 00:00:00 2001 +Message-Id: <69c64866ce072dea1d1e59a0d61e0f66c0dffb76.1513103764.git.jeremy@jcline.org> +From: Mohamed Ghannam +Date: Tue, 5 Dec 2017 20:58:35 +0000 +Subject: [PATCH] dccp: CVE-2017-8824: use-after-free in DCCP code + +Whenever the sock object is in DCCP_CLOSED state, +dccp_disconnect() must free dccps_hc_tx_ccid and +dccps_hc_rx_ccid and set to NULL. + +Signed-off-by: Mohamed Ghannam +Reviewed-by: Eric Dumazet +Signed-off-by: David S. Miller +--- + net/dccp/proto.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/net/dccp/proto.c b/net/dccp/proto.c +index b68168fcc06a..9d43c1f40274 100644 +--- a/net/dccp/proto.c ++++ b/net/dccp/proto.c +@@ -259,6 +259,7 @@ int dccp_disconnect(struct sock *sk, int flags) + { + struct inet_connection_sock *icsk = inet_csk(sk); + struct inet_sock *inet = inet_sk(sk); ++ struct dccp_sock *dp = dccp_sk(sk); + int err = 0; + const int old_state = sk->sk_state; + +@@ -278,6 +279,10 @@ int dccp_disconnect(struct sock *sk, int flags) + sk->sk_err = ECONNRESET; + + dccp_clear_xmit_timers(sk); ++ ccid_hc_rx_delete(dp->dccps_hc_rx_ccid, sk); ++ ccid_hc_tx_delete(dp->dccps_hc_tx_ccid, sk); ++ dp->dccps_hc_rx_ccid = NULL; ++ dp->dccps_hc_tx_ccid = NULL; + + __skb_queue_purge(&sk->sk_receive_queue); + __skb_queue_purge(&sk->sk_write_queue); +-- +2.14.3 + diff --git a/debugconfig/CONFIG_REFCOUNT_FULL b/debugconfig/CONFIG_REFCOUNT_FULL new file mode 100644 index 000000000..c7e4a167a --- /dev/null +++ b/debugconfig/CONFIG_REFCOUNT_FULL @@ -0,0 +1 @@ +CONFIG_REFCOUNT_FULL=y diff --git a/debugconfig/arm/armv7/CONFIG_DMADEVICES_DEBUG b/debugconfig/arm/CONFIG_DMADEVICES_DEBUG similarity index 100% rename from debugconfig/arm/armv7/CONFIG_DMADEVICES_DEBUG rename to debugconfig/arm/CONFIG_DMADEVICES_DEBUG diff --git a/debugconfig/x86/x86_64/CONFIG_NR_CPUS b/debugconfig/x86/x86_64/CONFIG_NR_CPUS new file mode 100644 index 000000000..441191641 --- /dev/null +++ b/debugconfig/x86/x86_64/CONFIG_NR_CPUS @@ -0,0 +1 @@ +CONFIG_NR_CPUS=8192 diff --git a/drm-cma-reduce-dmesg-logs.patch b/drm-cma-reduce-dmesg-logs.patch new file mode 100644 index 000000000..d7252c498 --- /dev/null +++ b/drm-cma-reduce-dmesg-logs.patch @@ -0,0 +1,43 @@ +From patchwork Thu Oct 5 11:29:17 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2] drm/gem-cma-helper: Change the level of the allocation failure + message +From: Boris Brezillon +X-Patchwork-Id: 180737 +Message-Id: <20171005112917.15949-1-boris.brezillon@free-electrons.com> +To: David Airlie , Daniel Vetter , + dri-devel@lists.freedesktop.org +Cc: Boris Brezillon +Date: Thu, 5 Oct 2017 13:29:17 +0200 + +drm_gem_cma_create() prints an error message when dma_alloc_wc() fails to +allocate the amount of memory we requested. This can lead to annoying +error messages when CMA is only one possible source of memory for the BO +allocation. Turn this error message into a debug one. + +Signed-off-by: Boris Brezillon +Reviewed-by: Daniel Vetter +Reviewed-by: Eric Engestrom +Reviewed-by: Eric Anholt +--- +Changes in v2: +- Remove __must_check attribute +--- + drivers/gpu/drm/drm_gem_cma_helper.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c +index 373e33f22be4..020e7668dfab 100644 +--- a/drivers/gpu/drm/drm_gem_cma_helper.c ++++ b/drivers/gpu/drm/drm_gem_cma_helper.c +@@ -112,7 +112,7 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm, + cma_obj->vaddr = dma_alloc_wc(drm->dev, size, &cma_obj->paddr, + GFP_KERNEL | __GFP_NOWARN); + if (!cma_obj->vaddr) { +- dev_err(drm->dev, "failed to allocate buffer with size %zu\n", ++ dev_dbg(drm->dev, "failed to allocate buffer with size %zu\n", + size); + ret = -ENOMEM; + goto error; diff --git a/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch b/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch new file mode 100644 index 000000000..07f81116a --- /dev/null +++ b/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch @@ -0,0 +1,200 @@ +From patchwork Thu Aug 17 12:37:06 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +Subject: drm/i915: Boost GPU clocks if we miss the pageflip's vblank +From: Chris Wilson +X-Patchwork-Id: 172204 +Message-Id: <20170817123706.6777-1-chris@chris-wilson.co.uk> +To: intel-gfx@lists.freedesktop.org +Cc: Daniel Vetter +Date: Thu, 17 Aug 2017 13:37:06 +0100 + +If we miss the current vblank because the gpu was busy, that may cause a +jitter as the frame rate temporarily drops. We try to limit the impact +of this by then boosting the GPU clock to deliver the frame as quickly +as possible. Originally done in commit 6ad790c0f5ac ("drm/i915: Boost GPU +frequency if we detect outstanding pageflips") but was never forward +ported to atomic and finally dropped in commit fd3a40242e87 ("drm/i915: +Rip out legacy page_flip completion/irq handling"). + +References: https://bugs.freedesktop.org/show_bug.cgi?id=102199 +Signed-off-by: Chris Wilson +Cc: Maarten Lankhorst +Cc: Ville Syrjälä +Cc: Daniel Vetter +Tested-by: Lyude Paul +Reviewed-by: Radoslaw Szwichtenberg +--- + drivers/gpu/drm/i915/intel_display.c | 59 ++++++++++++++++++++++++++++++++++++ + drivers/gpu/drm/i915/intel_drv.h | 1 - + drivers/gpu/drm/i915/intel_pm.c | 42 ++----------------------- + 3 files changed, 62 insertions(+), 40 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 0e93ec201fe3..7d5b19553637 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -12636,6 +12636,55 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { + .set_crc_source = intel_crtc_set_crc_source, + }; + ++struct wait_rps_boost { ++ struct wait_queue_entry wait; ++ ++ struct drm_crtc *crtc; ++ struct drm_i915_gem_request *request; ++}; ++ ++static int do_rps_boost(struct wait_queue_entry *_wait, ++ unsigned mode, int sync, void *key) ++{ ++ struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait); ++ struct drm_i915_gem_request *rq = wait->request; ++ ++ gen6_rps_boost(rq, NULL); ++ i915_gem_request_put(rq); ++ ++ drm_crtc_vblank_put(wait->crtc); ++ ++ list_del(&wait->wait.entry); ++ kfree(wait); ++ return 1; ++} ++ ++static void add_rps_boost_after_vblank(struct drm_crtc *crtc, ++ struct dma_fence *fence) ++{ ++ struct wait_rps_boost *wait; ++ ++ if (!dma_fence_is_i915(fence)) ++ return; ++ ++ if (drm_crtc_vblank_get(crtc)) ++ return; ++ ++ wait = kmalloc(sizeof(*wait), GFP_KERNEL); ++ if (!wait) { ++ drm_crtc_vblank_put(crtc); ++ return; ++ } ++ ++ wait->request = to_request(dma_fence_get(fence)); ++ wait->crtc = crtc; ++ ++ wait->wait.func = do_rps_boost; ++ wait->wait.flags = 0; ++ ++ add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait); ++} ++ + /** + * intel_prepare_plane_fb - Prepare fb for usage on plane + * @plane: drm plane to prepare for +@@ -12733,12 +12782,22 @@ intel_prepare_plane_fb(struct drm_plane *plane, + return ret; + + if (!new_state->fence) { /* implicit fencing */ ++ struct dma_fence *fence; ++ + ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, + obj->resv, NULL, + false, I915_FENCE_TIMEOUT, + GFP_KERNEL); + if (ret < 0) + return ret; ++ ++ fence = reservation_object_get_excl_rcu(obj->resv); ++ if (fence) { ++ add_rps_boost_after_vblank(new_state->crtc, fence); ++ dma_fence_put(fence); ++ } ++ } else { ++ add_rps_boost_after_vblank(new_state->crtc, new_state->fence); + } + + return 0; +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index fa47285918f4..e092354b4d63 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1844,7 +1844,6 @@ void gen6_rps_reset_ei(struct drm_i915_private *dev_priv); + void gen6_rps_idle(struct drm_i915_private *dev_priv); + void gen6_rps_boost(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps); +-void intel_queue_rps_boost_for_request(struct drm_i915_gem_request *req); + void g4x_wm_get_hw_state(struct drm_device *dev); + void vlv_wm_get_hw_state(struct drm_device *dev); + void ilk_wm_get_hw_state(struct drm_device *dev); +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index ed662937ec3c..c9fa2eb1903c 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -6169,6 +6169,7 @@ void gen6_rps_boost(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps) + { + struct drm_i915_private *i915 = rq->i915; ++ unsigned long flags; + bool boost; + + /* This is intentionally racy! We peek at the state here, then +@@ -6178,13 +6179,13 @@ void gen6_rps_boost(struct drm_i915_gem_request *rq, + return; + + boost = false; +- spin_lock_irq(&rq->lock); ++ spin_lock_irqsave(&rq->lock, flags); + if (!rq->waitboost && !i915_gem_request_completed(rq)) { + atomic_inc(&i915->rps.num_waiters); + rq->waitboost = true; + boost = true; + } +- spin_unlock_irq(&rq->lock); ++ spin_unlock_irqrestore(&rq->lock, flags); + if (!boost) + return; + +@@ -9132,43 +9133,6 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val) + return DIV_ROUND_CLOSEST(val, GT_FREQUENCY_MULTIPLIER); + } + +-struct request_boost { +- struct work_struct work; +- struct drm_i915_gem_request *req; +-}; +- +-static void __intel_rps_boost_work(struct work_struct *work) +-{ +- struct request_boost *boost = container_of(work, struct request_boost, work); +- struct drm_i915_gem_request *req = boost->req; +- +- if (!i915_gem_request_completed(req)) +- gen6_rps_boost(req, NULL); +- +- i915_gem_request_put(req); +- kfree(boost); +-} +- +-void intel_queue_rps_boost_for_request(struct drm_i915_gem_request *req) +-{ +- struct request_boost *boost; +- +- if (req == NULL || INTEL_GEN(req->i915) < 6) +- return; +- +- if (i915_gem_request_completed(req)) +- return; +- +- boost = kmalloc(sizeof(*boost), GFP_ATOMIC); +- if (boost == NULL) +- return; +- +- boost->req = i915_gem_request_get(req); +- +- INIT_WORK(&boost->work, __intel_rps_boost_work); +- queue_work(req->i915->wq, &boost->work); +-} +- + void intel_pm_setup(struct drm_i915_private *dev_priv) + { + mutex_init(&dev_priv->rps.hw_lock); diff --git a/drm-i915-hush-check-crtc-state.patch b/drm-i915-hush-check-crtc-state.patch index 79deab178..cec67aaaa 100644 --- a/drm-i915-hush-check-crtc-state.patch +++ b/drm-i915-hush-check-crtc-state.patch @@ -1,6 +1,6 @@ -From 5550f20b5f9becb485fb3a67bf0193025d40bc6f Mon Sep 17 00:00:00 2001 +From 63a9dfe66b3b82b6eb10c6548aaf22dd7e543d2d Mon Sep 17 00:00:00 2001 From: Adam Jackson -Date: Wed, 13 Nov 2013 10:17:24 -0500 +Date: Mon, 10 Jul 2017 08:11:48 -0700 Subject: [PATCH] drm/i915: hush check crtc state This is _by far_ the most common backtrace for i915 on retrace.fp.o, and @@ -15,11 +15,11 @@ Upstream-status: http://lists.freedesktop.org/archives/intel-gfx/2013-November/0 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 46f9be3ad5a2..ad2e62e4cdba 100644 +index dec9e58..620f378a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c -@@ -12970,7 +12970,7 @@ verify_crtc_state(struct drm_crtc *crtc, - sw_config = to_intel_crtc_state(crtc->state); +@@ -12277,7 +12277,7 @@ verify_crtc_state(struct drm_crtc *crtc, + sw_config = to_intel_crtc_state(new_crtc_state); if (!intel_pipe_config_compare(dev_priv, sw_config, pipe_config, false)) { - I915_STATE_WARN(1, "pipe state doesn't match!\n"); @@ -28,5 +28,5 @@ index 46f9be3ad5a2..ad2e62e4cdba 100644 "[hw state]"); intel_dump_pipe_config(intel_crtc, sw_config, -- -2.5.5 +2.7.5 diff --git a/drm-i915-turn-off-wc-mmaps.patch b/drm-i915-turn-off-wc-mmaps.patch deleted file mode 100644 index c81b89226..000000000 --- a/drm-i915-turn-off-wc-mmaps.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Dave Airlie -Date: Thu, 4 Jun 2015 07:12:20 -0400 -Subject: [PATCH] drm: i915: turn off wc mmaps - ---- - drivers/gpu/drm/i915/i915_dma.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c -index d2df321ba634..775a5b11a366 100644 ---- a/drivers/gpu/drm/i915/i915_dma.c -+++ b/drivers/gpu/drm/i915/i915_dma.c -@@ -151,7 +151,7 @@ static int i915_getparam(struct drm_device *dev, void *data, - value = 1; - break; - case I915_PARAM_MMAP_VERSION: -- value = 1; -+ value = 0; - break; - case I915_PARAM_SUBSLICE_TOTAL: - value = INTEL_INFO(dev)->subslice_total; diff --git a/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch b/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch deleted file mode 100644 index 70a528253..000000000 --- a/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch +++ /dev/null @@ -1,42 +0,0 @@ -From patchwork Thu Feb 9 18:16:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: drm/vc4: Fix OOPSes from trying to cache a partially constructed BO. -From: Eric Anholt -X-Patchwork-Id: 138087 -Message-Id: <20170209181600.24048-1-eric@anholt.net> -To: dri-devel@lists.freedesktop.org -Cc: linux-kernel@vger.kernel.org, pbrobinson@gmail.com -Date: Thu, 9 Feb 2017 10:16:00 -0800 - -If a CMA allocation failed, the partially constructed BO would be -unreferenced through the normal path, and we might choose to put it in -the BO cache. If we then reused it before it expired from the cache, -the kernel would OOPS. - -Signed-off-by: Eric Anholt -Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") ---- - drivers/gpu/drm/vc4/vc4_bo.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c -index 5ec14f25625d..fd83a2807656 100644 ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -314,6 +314,14 @@ void vc4_free_object(struct drm_gem_object *gem_bo) - goto out; - } - -+ /* If this object was partially constructed but CMA allocation -+ * had failed, just free it. -+ */ -+ if (!bo->base.vaddr) { -+ vc4_bo_destroy(bo); -+ goto out; -+ } -+ - cache_list = vc4_get_cache_list_for_size(dev, gem_bo->size); - if (!cache_list) { - vc4_bo_destroy(bo); diff --git a/e1000e-Fix-e1000_check_for_copper_link_ich8lan-return-value..patch b/e1000e-Fix-e1000_check_for_copper_link_ich8lan-return-value..patch new file mode 100644 index 000000000..a31d5d2c5 --- /dev/null +++ b/e1000e-Fix-e1000_check_for_copper_link_ich8lan-return-value..patch @@ -0,0 +1,70 @@ +From patchwork Mon Dec 11 07:26:40 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: e1000e: Fix e1000_check_for_copper_link_ich8lan return value. +From: Benjamin Poirier +X-Patchwork-Id: 10104349 +Message-Id: <20171211072640.7935-1-bpoirier@suse.com> +To: Jeff Kirsher +Cc: Ben Hutchings , + Christian Hesse , Gabriel C , + intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, stable@vger.kernel.org +Date: Mon, 11 Dec 2017 16:26:40 +0900 + +e1000e_check_for_copper_link() and e1000_check_for_copper_link_ich8lan() +are the two functions that may be assigned to mac.ops.check_for_link when +phy.media_type == e1000_media_type_copper. Commit 19110cfbb34d ("e1000e: +Separate signaling for link check/link up") changed the meaning of the +return value of check_for_link for copper media but only adjusted the first +function. This patch adjusts the second function likewise. + +Reported-by: Christian Hesse +Reported-by: Gabriel C +Link: https://bugzilla.kernel.org/show_bug.cgi?id=198047 +Fixes: 19110cfbb34d ("e1000e: Separate signaling for link check/link up") +Tested-by: Christian Hesse +Signed-off-by: Benjamin Poirier +--- + drivers/net/ethernet/intel/e1000e/ich8lan.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c +index d6d4ed7acf03..31277d3bb7dc 100644 +--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c ++++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c +@@ -1367,6 +1367,9 @@ static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) + * Checks to see of the link status of the hardware has changed. If a + * change in link status has been detected, then we read the PHY registers + * to get the current speed/duplex if link exists. ++ * ++ * Returns a negative error code (-E1000_ERR_*) or 0 (link down) or 1 (link ++ * up). + **/ + static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) + { +@@ -1382,7 +1385,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) + * Change or Rx Sequence Error interrupt. + */ + if (!mac->get_link_status) +- return 0; ++ return 1; + + /* First we want to see if the MII Status Register reports + * link. If so, then we want to get the current speed/duplex +@@ -1613,10 +1616,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) + * different link partner. + */ + ret_val = e1000e_config_fc_after_link_up(hw); +- if (ret_val) ++ if (ret_val) { + e_dbg("Error configuring flow control\n"); ++ return ret_val; ++ } + +- return ret_val; ++ return 1; + } + + static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) diff --git a/efi-lockdown.patch b/efi-lockdown.patch index d6517d5ed..4ac65fd5d 100644 --- a/efi-lockdown.patch +++ b/efi-lockdown.patch @@ -1,127 +1,7 @@ -From df7d76ae50f18d4465e59fdf7f19d3df44906cb5 Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 07/32] efi: Add EFI_SECURE_BOOT bit - -UEFI machines can be booted in Secure Boot mode. Add a EFI_SECURE_BOOT bit -that can be passed to efi_enabled() to find out whether secure boot is -enabled. - -This will be used by the SysRq+x handler, registered by the x86 arch, to find -out whether secure boot mode is enabled so that it can be disabled. - -Signed-off-by: Josh Boyer -Signed-off-by: David Howells ---- - arch/x86/kernel/setup.c | 1 + - include/linux/efi.h | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 69780ed..447905e 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -1182,6 +1182,7 @@ void __init setup_arch(char **cmdline_p) - pr_info("Secure boot disabled\n"); - break; - case efi_secureboot_mode_enabled: -+ set_bit(EFI_SECURE_BOOT, &efi.flags); - pr_info("Secure boot enabled\n"); - break; - default: -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 94d34e0..6049600 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -1069,6 +1069,7 @@ extern int __init efi_setup_pcdp_console(char *); - #define EFI_DBG 8 /* Print additional debug info at runtime */ - #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ - #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ -+#define EFI_SECURE_BOOT 11 /* Are we in Secure Boot mode? */ - - #ifdef CONFIG_EFI - /* --- -2.7.4 - -From 0f9281e3b77bf5f767f1993d52b152a1ef317a0a Mon Sep 17 00:00:00 2001 +From 646ac5c07196bc3680e34188e55c8cc3565f65e7 Mon Sep 17 00:00:00 2001 From: David Howells -Date: Fri, 25 Nov 2016 11:52:05 +0000 -Subject: [PATCH 08/32] efi: Handle secure boot from UEFI-2.6 - -UEFI-2.6 adds a new variable, DeployedMode. If it exists, this must be 1 -if we're to engage lockdown mode. - -Reported-by: James Bottomley -Signed-off-by: David Howells ---- - drivers/firmware/efi/libstub/secureboot.c | 16 +++++++++++++++- - include/linux/efi.h | 4 ++++ - 2 files changed, 19 insertions(+), 1 deletion(-) - -diff --git a/drivers/firmware/efi/libstub/secureboot.c b/drivers/firmware/efi/libstub/secureboot.c -index 6def402..77af519 100644 ---- a/drivers/firmware/efi/libstub/secureboot.c -+++ b/drivers/firmware/efi/libstub/secureboot.c -@@ -20,6 +20,9 @@ static const efi_char16_t const efi_SecureBoot_name[] = { - static const efi_char16_t const efi_SetupMode_name[] = { - 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 - }; -+static const efi_char16_t const efi_DeployedMode_name[] = { -+ 'D', 'e', 'p', 'l', 'o', 'y', 'e', 'd', 'M', 'o', 'd', 'e', 0 -+}; - - /* SHIM variables */ - static const efi_guid_t shim_guid = EFI_SHIM_LOCK_GUID; -@@ -38,7 +41,7 @@ static efi_char16_t const shim_MokSBState_name[] = { - enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - { - u32 attr; -- u8 secboot, setupmode, moksbstate; -+ u8 secboot, setupmode, deployedmode, moksbstate; - unsigned long size; - efi_status_t status; - -@@ -57,6 +60,17 @@ enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - if (secboot == 0 || setupmode == 1) - return efi_secureboot_mode_disabled; - -+ /* UEFI-2.6 requires DeployedMode to be 1. */ -+ if (sys_table_arg->hdr.revision >= EFI_2_60_SYSTEM_TABLE_REVISION) { -+ size = sizeof(deployedmode); -+ status = get_efi_var(efi_DeployedMode_name, &efi_variable_guid, -+ NULL, &size, &deployedmode); -+ if (status != EFI_SUCCESS) -+ goto out_efi_err; -+ if (deployedmode == 0) -+ return efi_secureboot_mode_disabled; -+ } -+ - /* - * See if a user has put the shim into insecure mode. If so, and if the - * variable doesn't have the runtime attribute set, we might as well -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 6049600..784a276 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -646,6 +646,10 @@ typedef struct { - - #define EFI_SYSTEM_TABLE_SIGNATURE ((u64)0x5453595320494249ULL) - -+#define EFI_2_60_SYSTEM_TABLE_REVISION ((2 << 16) | (60)) -+#define EFI_2_50_SYSTEM_TABLE_REVISION ((2 << 16) | (50)) -+#define EFI_2_40_SYSTEM_TABLE_REVISION ((2 << 16) | (40)) -+#define EFI_2_31_SYSTEM_TABLE_REVISION ((2 << 16) | (31)) - #define EFI_2_30_SYSTEM_TABLE_REVISION ((2 << 16) | (30)) - #define EFI_2_20_SYSTEM_TABLE_REVISION ((2 << 16) | (20)) - #define EFI_2_10_SYSTEM_TABLE_REVISION ((2 << 16) | (10)) --- -2.7.4 - -From f05a90c19a9613d8d50597319ed91f691e25b689 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Mon, 21 Nov 2016 23:36:17 +0000 -Subject: [PATCH 09/32] Add the ability to lock down access to the running +Date: Wed, 24 May 2017 14:56:00 +0100 +Subject: [PATCH 01/26] Add the ability to lock down access to the running kernel image Provide a single call to allow kernel code to determine whether the system @@ -131,64 +11,70 @@ modules that aren't validly signed with a key we recognise, fiddling with MSR registers and disallowing hibernation, Signed-off-by: David Howells +Acked-by: James Morris --- - include/linux/kernel.h | 9 +++++++++ - include/linux/security.h | 11 +++++++++++ - security/Kconfig | 15 +++++++++++++++ + include/linux/kernel.h | 17 ++++++++++++++ + include/linux/security.h | 8 +++++++ + security/Kconfig | 8 +++++++ security/Makefile | 3 +++ - security/lock_down.c | 40 ++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 78 insertions(+) + security/lock_down.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++ + 5 files changed, 96 insertions(+) create mode 100644 security/lock_down.c diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index cb09238..3cd3be9 100644 +index 0ad4c3044cf9..362da2e4bf53 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h -@@ -273,6 +273,15 @@ extern int oops_may_print(void); - void do_exit(long error_code) __noreturn; - void complete_and_exit(struct completion *, long) __noreturn; - +@@ -287,6 +287,23 @@ static inline void refcount_error_report(struct pt_regs *regs, const char *err) + { } + #endif + +#ifdef CONFIG_LOCK_DOWN_KERNEL -+extern bool kernel_is_locked_down(void); ++extern bool __kernel_is_locked_down(const char *what, bool first); +#else -+static inline bool kernel_is_locked_down(void) ++static inline bool __kernel_is_locked_down(const char *what, bool first) +{ + return false; +} +#endif ++ ++#define kernel_is_locked_down(what) \ ++ ({ \ ++ static bool message_given; \ ++ bool locked_down = __kernel_is_locked_down(what, !message_given); \ ++ message_given = true; \ ++ locked_down; \ ++ }) + /* Internal, do not use. */ int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); int __must_check _kstrtol(const char *s, unsigned int base, long *res); diff --git a/include/linux/security.h b/include/linux/security.h -index d3868f2..187b74b 100644 +index ce6265960d6c..310775476b68 100644 --- a/include/linux/security.h +++ b/include/linux/security.h -@@ -1679,5 +1679,16 @@ static inline void free_secdata(void *secdata) +@@ -1753,5 +1753,13 @@ static inline void free_secdata(void *secdata) { } #endif /* CONFIG_SECURITY */ - + +#ifdef CONFIG_LOCK_DOWN_KERNEL -+extern void lock_kernel_down(void); -+#ifdef CONFIG_ALLOW_LOCKDOWN_LIFT -+extern void lift_kernel_lockdown(void); -+#endif ++extern void __init init_lockdown(void); +#else -+static inline void lock_kernel_down(void) ++static inline void __init init_lockdown(void) +{ +} +#endif + #endif /* ! __LINUX_SECURITY_H */ - + diff --git a/security/Kconfig b/security/Kconfig -index d900f47..d9b391d 100644 +index e8e449444e65..8e01fd59ae7e 100644 --- a/security/Kconfig +++ b/security/Kconfig -@@ -193,6 +193,21 @@ config STATIC_USERMODEHELPER_PATH +@@ -205,6 +205,14 @@ config STATIC_USERMODEHELPER_PATH If you wish for all usermode helper programs to be disabled, specify an empty string here (i.e. ""). - + +config LOCK_DOWN_KERNEL + bool "Allow the kernel to be 'locked down'" + help @@ -196,19 +82,12 @@ index d900f47..d9b391d 100644 + instance if UEFI secure boot is enabled. Locking down the kernel + turns off various features that might otherwise allow access to the + kernel image (eg. setting MSR registers). -+ -+config ALLOW_LOCKDOWN_LIFT -+ bool -+ help -+ Allow the lockdown on a kernel to be lifted, thereby restoring the -+ ability of userspace to access the kernel image (eg. by SysRq+x under -+ x86). + source security/selinux/Kconfig source security/smack/Kconfig source security/tomoyo/Kconfig diff --git a/security/Makefile b/security/Makefile -index f2d71cd..8c4a43e 100644 +index f2d71cdb8e19..8c4a43e3d4e0 100644 --- a/security/Makefile +++ b/security/Makefile @@ -29,3 +29,6 @@ obj-$(CONFIG_CGROUP_DEVICE) += device_cgroup.o @@ -220,10 +99,10 @@ index f2d71cd..8c4a43e 100644 +obj-$(CONFIG_LOCK_DOWN_KERNEL) += lock_down.o diff --git a/security/lock_down.c b/security/lock_down.c new file mode 100644 -index 0000000..5788c60 +index 000000000000..d8595c0e6673 --- /dev/null +++ b/security/lock_down.c -@@ -0,0 +1,40 @@ +@@ -0,0 +1,60 @@ +/* Lock down the kernel + * + * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. @@ -238,282 +117,110 @@ index 0000000..5788c60 +#include +#include + -+static __read_mostly bool kernel_locked_down; ++static __ro_after_init bool kernel_locked_down; + +/* + * Put the kernel into lock-down mode. + */ -+void lock_kernel_down(void) ++static void __init lock_kernel_down(const char *where) +{ -+ kernel_locked_down = true; ++ if (!kernel_locked_down) { ++ kernel_locked_down = true; ++ pr_notice("Kernel is locked down from %s; see man kernel_lockdown.7\n", ++ where); ++ } +} + -+/* -+ * Take the kernel out of lockdown mode. -+ */ -+void lift_kernel_lockdown(void) ++static int __init lockdown_param(char *ignored) +{ -+ kernel_locked_down = false; ++ lock_kernel_down("command line"); ++ return 0; ++} ++ ++early_param("lockdown", lockdown_param); ++ ++/* ++ * Lock the kernel down from very early in the arch setup. This must happen ++ * prior to things like ACPI being initialised. ++ */ ++void __init init_lockdown(void) ++{ ++#ifdef CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT ++ if (efi_enabled(EFI_SECURE_BOOT)) ++ lock_kernel_down("EFI secure boot"); ++#endif +} + +/** + * kernel_is_locked_down - Find out if the kernel is locked down ++ * @what: Tag to use in notice generated if lockdown is in effect + */ -+bool kernel_is_locked_down(void) ++bool __kernel_is_locked_down(const char *what, bool first) +{ ++ if (what && first && kernel_locked_down) ++ pr_notice("Lockdown: %s is restricted; see man kernel_lockdown.7\n", ++ what); + return kernel_locked_down; +} -+EXPORT_SYMBOL(kernel_is_locked_down); ++EXPORT_SYMBOL(__kernel_is_locked_down); -- -2.7.4 +2.13.6 -From fb6feb38e297260d050fc477c72683ac51d07ae3 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 10/32] efi: Lock down the kernel if booted in secure boot mode - -UEFI Secure Boot provides a mechanism for ensuring that the firmware will -only load signed bootloaders and kernels. Certain use cases may also -require that all kernel modules also be signed. Add a configuration option -that to lock down the kernel - which includes requiring validly signed -modules - if the kernel is secure-booted. - -Signed-off-by: David Howells ---- - arch/x86/Kconfig | 12 ++++++++++++ - arch/x86/kernel/setup.c | 8 +++++++- - 2 files changed, 19 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 874c123..a315974 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1816,6 +1816,18 @@ config EFI_MIXED - - If unsure, say N. - -+config EFI_SECURE_BOOT_LOCK_DOWN -+ def_bool n -+ depends on EFI -+ prompt "Lock down the kernel when UEFI Secure Boot is enabled" -+ ---help--- -+ UEFI Secure Boot provides a mechanism for ensuring that the firmware -+ will only load signed bootloaders and kernels. Certain use cases may -+ also require that all kernel modules also be signed and that -+ userspace is prevented from directly changing the running kernel -+ image. Say Y here to automatically lock down the kernel when a -+ system boots with UEFI Secure Boot enabled. -+ - config SECCOMP - def_bool y - prompt "Enable seccomp to safely compute untrusted bytecode" -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 447905e..d44e60e 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -69,6 +69,7 @@ - #include - #include - #include -+#include - - #include