diff --git a/.fmf/version b/.fmf/version deleted file mode 100644 index d00491f..0000000 --- a/.fmf/version +++ /dev/null @@ -1 +0,0 @@ -1 diff --git a/.gitignore b/.gitignore index 0f753c1..07ce4c1 100644 --- a/.gitignore +++ b/.gitignore @@ -4,11 +4,3 @@ /libpfm-4.4.0-3.200.g9df2031.tar.gz /libpfm-4.4.0-5.217.gbca43a5.tar.gz /libpfm-4.5.0.tar.gz -/libpfm-4.6.0.tar.gz -/libpfm-4.7.0.tar.gz -/libpfm-4.8.0.tar.gz -/libpfm-4.9.0.tar.gz -/libpfm-4.10.0.tar.gz -/libpfm-4.10.1.tar.gz -/libpfm-4.11.0.tar.gz -/libpfm-4.13.0.tar.gz diff --git a/gating.yaml b/gating.yaml deleted file mode 100644 index ce3cdc1..0000000 --- a/gating.yaml +++ /dev/null @@ -1,19 +0,0 @@ ---- !Policy -product_versions: - - fedora-* -decision_context: bodhi_update_push_stable -subject_type: koji_build -rules: - - !PassingTestCaseRule {test_case_name: fedora-ci.koji-build.tier0.functional} ---- !Policy -product_versions: - - rhel-8 -decision_context: osci_compose_gate -rules: - - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier1.functional} ---- !Policy -product_versions: - - rhel-9 -decision_context: osci_compose_gate -rules: - - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier1.functional} diff --git a/libpfm-ac53.patch b/libpfm-ac53.patch new file mode 100644 index 0000000..c76251a --- /dev/null +++ b/libpfm-ac53.patch @@ -0,0 +1,544 @@ +commit 6d1faa5bd1c0564b24cf030f118cd9782e1b4e0c +Author: Stephane Eranian +Date: Thu May 22 18:44:47 2014 +0200 + + Add missing arm_cortex_a57.h header dependency + + Was missing. We compile A57 for 32-bit arm as well. + + Signed-off-by: Stephane Eranian + +diff --git a/lib/Makefile b/lib/Makefile +index 6ca3287..585cc3e 100644 +--- a/lib/Makefile ++++ b/lib/Makefile +@@ -281,7 +281,8 @@ INC_ARM=events/arm_cortex_a8_events.h \ + INC_ARM=pfmlib_arm_priv.h \ + events/arm_cortex_a8_events.h \ + events/arm_cortex_a9_events.h \ +- events/arm_cortex_a15_events.h ++ events/arm_cortex_a15_events.h \ ++ events/arm_cortex_a57_events.h + + INC_ARM64=events/arm_cortex_a57_events.h + +commit 6af79d5186b7593c4f7e41024b78453debceb45f +Author: Stephane Eranian +Date: Thu May 22 19:14:52 2014 +0200 + + Add ARM Cortex A53 support + + This patch adds support for the ARM Cortex A53 core PMU as + documented in r0p2 version f the Cortex-A53 MPCore processor + technical reference manual Table 12.28. + + Support is provided for both 32 and 64-bit modes. + + Includes man page, and validation tests. + + Signed-off-by: Stephane Eranian + +diff --git a/README b/README +index 334c78a..e74238f 100644 +--- a/README ++++ b/README +@@ -57,6 +57,7 @@ The library supports many PMUs. The current version can handle: + ARMV7 Cortex A8 + ARMV7 Cortex A9 + ARMV7 Cortex A15 ++ ARMV8 Cortex A57, A53 + Qualcomm Krait + + - For SPARC +diff --git a/docs/Makefile b/docs/Makefile +index 9b79ec7..c7d797e 100644 +--- a/docs/Makefile ++++ b/docs/Makefile +@@ -76,11 +76,17 @@ endif + endif + + ifeq ($(CONFIG_PFMLIB_ARCH_ARM),y) +-ARCH_MAN += libpfm_arm_ac57.3 libpfm_arm_ac15.3 libpfm_arm_ac8.3 libpfm_arm_ac9.3 libpfm_arm_qcom_krait.3 ++ARCH_MAN += libpfm_arm_ac57.3 \ ++ libpfm_arm_ac53.3 \ ++ libpfm_arm_ac15.3 \ ++ libpfm_arm_ac8.3 \ ++ libpfm_arm_ac9.3 \ ++ libpfm_arm_qcom_krait.3 + endif + + ifeq ($(CONFIG_PFMLIB_ARCH_ARM64),y) +-ARCH_MAN += libpfm_arm_ac57.3 ++ARCH_MAN += libpfm_arm_ac57.3 \ ++ libpfm_arm_ac53.3 + endif + + ifeq ($(CONFIG_PFMLIB_ARCH_MIPS),y) +diff --git a/docs/man3/libpfm_arm_ac53.3 b/docs/man3/libpfm_arm_ac53.3 +new file mode 100644 +index 0000000..319accc +--- /dev/null ++++ b/docs/man3/libpfm_arm_ac53.3 +@@ -0,0 +1,36 @@ ++.TH LIBPFM 4 "May, 2014" "" "Linux Programmer's Manual" ++.SH NAME ++libpfm_arm_ac53 - support for ARM Cortex A53 PMU ++.SH SYNOPSIS ++.nf ++.B #include ++.sp ++.B PMU name: arm_ac53 ++.B PMU desc: ARM Cortex A53 ++.sp ++.SH DESCRIPTION ++The library supports the ARM Cortex A53 core PMU. ++ ++This PMU supports 6 counters and privilege levels filtering. ++It can operate in both 32 and 64 bit modes. ++ ++.SH MODIFIERS ++The following modifiers are supported on ARM Cortex A53: ++.TP ++.B u ++Measure at the user level. This corresponds to \fBPFM_PLM3\fR. ++This is a boolean modifier. ++.TP ++.B k ++Measure at the kernel level. This corresponds to \fBPFM_PLM0\fR. ++This is a boolean modifier. ++.TP ++.B hv ++Measure at the hypervisor level. This corresponds to \fBPFM_PLMH\fR. ++This is a boolean modifier. ++ ++.SH AUTHORS ++.nf ++Stephane Eranian ++.if ++.PP +diff --git a/include/perfmon/pfmlib.h b/include/perfmon/pfmlib.h +index b08df66..a7ec026 100644 +--- a/include/perfmon/pfmlib.h ++++ b/include/perfmon/pfmlib.h +@@ -238,6 +238,7 @@ typedef enum { + PFM_PMU_S390X_CPUM_SF, /* s390x: CPU-M sampling facility */ + + PFM_PMU_ARM_CORTEX_A57, /* ARM Cortex A57 (ARMv8) */ ++ PFM_PMU_ARM_CORTEX_A53, /* ARM Cortex A53 (ARMv8) */ + + /* MUST ADD NEW PMU MODELS HERE */ + +diff --git a/lib/Makefile b/lib/Makefile +index 585cc3e..5aaf4b3 100644 +--- a/lib/Makefile ++++ b/lib/Makefile +@@ -282,9 +282,11 @@ INC_ARM=pfmlib_arm_priv.h \ + events/arm_cortex_a8_events.h \ + events/arm_cortex_a9_events.h \ + events/arm_cortex_a15_events.h \ +- events/arm_cortex_a57_events.h ++ events/arm_cortex_a57_events.h \ ++ events/arm_cortex_a53_events.h + +-INC_ARM64=events/arm_cortex_a57_events.h ++INC_ARM64=events/arm_cortex_a57_events.h \ ++ events/arm_cortex_a53_events.h + + INCDEP=$(INC_COMMON) $(INCARCH) + +diff --git a/lib/events/arm_cortex_a53_events.h b/lib/events/arm_cortex_a53_events.h +new file mode 100644 +index 0000000..c0d2bb6 +--- /dev/null ++++ b/lib/events/arm_cortex_a53_events.h +@@ -0,0 +1,190 @@ ++/* ++ * Copyright (c) 2014 Google Inc. All rights reserved ++ * Contributed by Stephane Eranian ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies ++ * of the Software, and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in all ++ * copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, ++ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF ++ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE ++ * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Cortex A53 r0p2 ++ * based on Table 12.9 from the "Cortex A53 Technical Reference Manual" ++ */ ++ ++static const arm_entry_t arm_cortex_a53_pe[]={ ++ {.name = "SW_INCR", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x00, ++ .desc = "Instruction architecturally executed (condition check pass) Software increment" ++ }, ++ {.name = "L1I_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x01, ++ .desc = "Level 1 instruction cache refill" ++ }, ++ {.name = "L1I_TLB_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x02, ++ .desc = "Level 1 instruction TLB refill" ++ }, ++ {.name = "L1D_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x03, ++ .desc = "Level 1 data cache refill" ++ }, ++ {.name = "L1D_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x04, ++ .desc = "Level 1 data cache access" ++ }, ++ {.name = "L1D_TLB_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x05, ++ .desc = "Level 1 data TLB refill" ++ }, ++ {.name = "LD_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x06, ++ .desc = "Load Instruction architecturally executed, condition check", ++ }, ++ {.name = "ST_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x07, ++ .desc = "Store Instruction architecturally executed, condition check", ++ }, ++ {.name = "INST_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x08, ++ .desc = "Instruction architecturally executed" ++ }, ++ {.name = "EXCEPTION_TAKEN", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x09, ++ .desc = "Exception taken" ++ }, ++ {.name = "EXCEPTION_RETURN", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0a, ++ .desc = "Instruction architecturally executed (condition check pass) Exception return" ++ }, ++ {.name = "CID_WRITE_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0b, ++ .desc = "Change to Context ID retired", ++ }, ++ {.name = "PC_WRITE_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0c, ++ .desc = "Write to CONTEXTIDR, instruction architecturally executed, condition check pass" ++ }, ++ {.name = "BR_IMMED_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0d, ++ .desc = "Software chnage of the PC, instruction architecturally executed, condition check pass" ++ }, ++ {.name = "UNALIGNED_LDST_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0f, ++ .desc = "Procedure return, instruction architecturally executed, condition check pass" ++ }, ++ {.name = "BRANCH_MISPRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x10, ++ .desc = "Mispredicted or not predicted branch speculatively executed" ++ }, ++ {.name = "CPU_CYCLES", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x11, ++ .desc = "Cycles" ++ }, ++ {.name = "BRANCH_PRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x12, ++ .desc = "Predictable branch speculatively executed" ++ }, ++ {.name = "DATA_MEM_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x13, ++ .desc = "Data memory access" ++ }, ++ {.name = "L1I_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x14, ++ .desc = "Level 1 instruction cache access" ++ }, ++ {.name = "L1D_CACHE_WB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x15, ++ .desc = "Level 1 data cache WriteBack" ++ }, ++ {.name = "L2D_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x16, ++ .desc = "Level 2 data cache access" ++ }, ++ {.name = "L2D_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x17, ++ .desc = "Level 2 data cache refill" ++ }, ++ {.name = "L2D_CACHE_WB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x18, ++ .desc = "Level 2 data cache WriteBack" ++ }, ++ {.name = "BUS_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x19, ++ .desc = "Bus access" ++ }, ++ {.name = "LOCAL_MEMORY_ERROR", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1a, ++ .desc = "Local memory error" ++ }, ++ {.name = "BUS_CYCLES", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1d, ++ .desc = "Bus cycle" ++ }, ++ ++ {.name = "BUS_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x60, ++ .desc = "Bus read access" ++ }, ++ {.name = "BUS_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x61, ++ .desc = "Bus write access" ++ }, ++ ++ {.name = "BRANCH_SPEC_EXEC_IND", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x7a, ++ .desc = "Indirect branch speculatively executed" ++ }, ++ ++ {.name = "EXCEPTION_IRQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x86, ++ .desc = "Exception taken, irq" ++ }, ++ {.name = "EXCEPTION_FIQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x87, ++ .desc = "Exception taken, irq" ++ }, ++}; +diff --git a/lib/pfmlib_arm_armv8.c b/lib/pfmlib_arm_armv8.c +index 4bc863b..c38bd9b 100644 +--- a/lib/pfmlib_arm_armv8.c ++++ b/lib/pfmlib_arm_armv8.c +@@ -30,7 +30,8 @@ + #include "pfmlib_priv.h" /* library private */ + #include "pfmlib_arm_priv.h" + +-#include "events/arm_cortex_a57_events.h" /* event tables */ ++#include "events/arm_cortex_a57_events.h" /* A57 event tables */ ++#include "events/arm_cortex_a53_events.h" /* A53 event tables */ + + static int + pfm_arm_detect_cortex_a57(void *this) +@@ -48,6 +49,22 @@ pfm_arm_detect_cortex_a57(void *this) + return PFM_ERR_NOTSUPP; + } + ++static int ++pfm_arm_detect_cortex_a53(void *this) ++{ ++ int ret; ++ ++ ret = pfm_arm_detect(this); ++ if (ret != PFM_SUCCESS) ++ return PFM_ERR_NOTSUPP; ++ ++ if ((pfm_arm_cfg.implementer == 0x41) && /* ARM */ ++ (pfm_arm_cfg.part == 0xd03)) { /* Cortex A53 */ ++ return PFM_SUCCESS; ++ } ++ return PFM_ERR_NOTSUPP; ++} ++ + /* ARM Cortex A57 support */ + pfmlib_pmu_t arm_cortex_a57_support={ + .desc = "ARM Cortex A57", +@@ -72,3 +89,28 @@ pfmlib_pmu_t arm_cortex_a57_support={ + PFMLIB_VALID_PERF_PATTRS(pfm_arm_perf_validate_pattrs), + .get_event_nattrs = pfm_arm_get_event_nattrs, + }; ++ ++/* ARM Cortex A53 support */ ++pfmlib_pmu_t arm_cortex_a53_support={ ++ .desc = "ARM Cortex A53", ++ .name = "arm_ac53", ++ .pmu = PFM_PMU_ARM_CORTEX_A53, ++ .pme_count = LIBPFM_ARRAY_SIZE(arm_cortex_a53_pe), ++ .type = PFM_PMU_TYPE_CORE, ++ .pe = arm_cortex_a53_pe, ++ ++ .pmu_detect = pfm_arm_detect_cortex_a53, ++ .max_encoding = 1, ++ .num_cntrs = 6, ++ ++ .get_event_encoding[PFM_OS_NONE] = pfm_arm_get_encoding, ++ PFMLIB_ENCODE_PERF(pfm_arm_get_perf_encoding), ++ .get_event_first = pfm_arm_get_event_first, ++ .get_event_next = pfm_arm_get_event_next, ++ .event_is_valid = pfm_arm_event_is_valid, ++ .validate_table = pfm_arm_validate_table, ++ .get_event_info = pfm_arm_get_event_info, ++ .get_event_attr_info = pfm_arm_get_event_attr_info, ++ PFMLIB_VALID_PERF_PATTRS(pfm_arm_perf_validate_pattrs), ++ .get_event_nattrs = pfm_arm_get_event_nattrs, ++}; +diff --git a/lib/pfmlib_common.c b/lib/pfmlib_common.c +index 900d7de..ebe20da 100644 +--- a/lib/pfmlib_common.c ++++ b/lib/pfmlib_common.c +@@ -200,9 +200,11 @@ static pfmlib_pmu_t *pfmlib_pmus[]= + &arm_1176_support, + &arm_qcom_krait_support, + &arm_cortex_a57_support, ++ &arm_cortex_a53_support, + #endif + #ifdef CONFIG_PFMLIB_ARCH_ARM64 + &arm_cortex_a57_support, ++ &arm_cortex_a53_support, + #endif + + #ifdef CONFIG_PFMLIB_ARCH_S390X +diff --git a/lib/pfmlib_priv.h b/lib/pfmlib_priv.h +index 3031d3b..5678cc0 100644 +--- a/lib/pfmlib_priv.h ++++ b/lib/pfmlib_priv.h +@@ -333,6 +333,7 @@ extern pfmlib_pmu_t arm_cortex_a15_support; + extern pfmlib_pmu_t arm_1176_support; + extern pfmlib_pmu_t arm_qcom_krait_support; + extern pfmlib_pmu_t arm_cortex_a57_support; ++extern pfmlib_pmu_t arm_cortex_a53_support; + extern pfmlib_pmu_t mips_74k_support; + extern pfmlib_pmu_t s390x_cpum_cf_support; + extern pfmlib_pmu_t s390x_cpum_sf_support; +diff --git a/tests/validate_arm.c b/tests/validate_arm.c +index d6c0168..44eefd4 100644 +--- a/tests/validate_arm.c ++++ b/tests/validate_arm.c +@@ -187,6 +187,48 @@ static const test_event_t arm_test_events[]={ + .codes[0] = 0x8000008, + .fstr = "arm_ac57::INST_RETIRED:k=1:u=1:hv=0", + }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES:k", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x88000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=0:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES:k:u", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::INST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000008, ++ .fstr = "arm_ac53::INST_RETIRED:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::LD_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000006, ++ .fstr = "arm_ac53::LD_RETIRED:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::ST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000007, ++ .fstr = "arm_ac53::ST_RETIRED:k=1:u=1:hv=0", ++ }, + }; + #define NUM_TEST_EVENTS (int)(sizeof(arm_test_events)/sizeof(test_event_t)) + +diff --git a/tests/validate_arm64.c b/tests/validate_arm64.c +index 0f0174c..61400ac 100644 +--- a/tests/validate_arm64.c ++++ b/tests/validate_arm64.c +@@ -72,6 +72,48 @@ static const test_event_t arm64_test_events[]={ + .codes[0] = 0x8000008, + .fstr = "arm_ac57::INST_RETIRED:k=1:u=1:hv=0", + }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES:k", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x88000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=0:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::CPU_CYCLES:k:u", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac53::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::INST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000008, ++ .fstr = "arm_ac53::INST_RETIRED:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::LD_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000006, ++ .fstr = "arm_ac53::LD_RETIRED:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac53::ST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000007, ++ .fstr = "arm_ac53::ST_RETIRED:k=1:u=1:hv=0", ++ }, + }; + #define NUM_TEST_EVENTS (int)(sizeof(arm64_test_events)/sizeof(test_event_t)) + diff --git a/libpfm-ac57.patch b/libpfm-ac57.patch new file mode 100644 index 0000000..56bd533 --- /dev/null +++ b/libpfm-ac57.patch @@ -0,0 +1,958 @@ +commit b1a3bf942376a3eaddc6f089c74bf5e322295822 +Author: Stephane Eranian +Date: Tue May 6 14:42:23 2014 +0200 + + Add ARM Cortex A57 support + + This patch adds support for ARM Cortex A57 processor + for both 64 and 32 bit modes (armv8). + + Based on Table 11-24 from the "Cortex A57 Technical Reference Manual" + + The validation tests for A57 in 64-bit mode is also added. + + Signed-off-by: Stephane Eranian + +diff --git a/config.mk b/config.mk +index 457d943..9553cbe 100644 +--- a/config.mk ++++ b/config.mk +@@ -66,6 +66,15 @@ endif + ifeq (armv7,$(findstring armv7,$(ARCH))) + override ARCH=arm + endif ++ifeq (armv7,$(findstring armv7,$(ARCH))) ++override ARCH=arm ++endif ++ifeq (aarch32,$(findstring aarch32,$(ARCH))) ++override ARCH=arm ++endif ++ifeq (armv8l,$(findstring armv8l,$(ARCH))) ++override ARCH=arm ++endif + ifeq (mips64,$(findstring mips64,$(ARCH))) + override ARCH=mips + endif +@@ -152,6 +161,14 @@ ifeq ($(ARCH),arm) + CONFIG_PFMLIB_ARCH_ARM=y + endif + ++ifeq ($(ARCH),aarch64) ++CONFIG_PFMLIB_ARCH_ARM64=y ++endif ++ ++ifeq ($(ARCH),arm64) ++CONFIG_PFMLIB_ARCH_ARM64=y ++endif ++ + ifeq ($(ARCH),s390x) + CONFIG_PFMLIB_ARCH_S390X=y + endif +diff --git a/include/perfmon/pfmlib.h b/include/perfmon/pfmlib.h +index dfdd471..b08df66 100644 +--- a/include/perfmon/pfmlib.h ++++ b/include/perfmon/pfmlib.h +@@ -237,6 +237,8 @@ typedef enum { + + PFM_PMU_S390X_CPUM_SF, /* s390x: CPU-M sampling facility */ + ++ PFM_PMU_ARM_CORTEX_A57, /* ARM Cortex A57 (ARMv8) */ ++ + /* MUST ADD NEW PMU MODELS HERE */ + + PFM_PMU_MAX /* end marker */ +diff --git a/lib/Makefile b/lib/Makefile +index 531167e..6ca3287 100644 +--- a/lib/Makefile ++++ b/lib/Makefile +@@ -139,10 +139,21 @@ SRCS += pfmlib_arm_perf_event.c + endif + + INCARCH = $(INC_ARM) +-SRCS += pfmlib_arm.c pfmlib_arm_armv7_pmuv1.c pfmlib_arm_armv6.c ++SRCS += pfmlib_arm.c pfmlib_arm_armv7_pmuv1.c pfmlib_arm_armv6.c pfmlib_arm_armv8.c + CFLAGS += -DCONFIG_PFMLIB_ARCH_ARM + endif + ++ifeq ($(CONFIG_PFMLIB_ARCH_ARM64),y) ++ ++ifeq ($(SYS),Linux) ++SRCS += pfmlib_arm_perf_event.c ++endif ++ ++INCARCH = $(INC_ARM64) ++SRCS += pfmlib_arm.c pfmlib_arm_armv8.c ++CFLAGS += -DCONFIG_PFMLIB_ARCH_ARM64 ++endif ++ + ifeq ($(CONFIG_PFMLIB_ARCH_MIPS),y) + + ifeq ($(SYS),Linux) +@@ -272,6 +283,8 @@ INC_ARM=pfmlib_arm_priv.h \ + events/arm_cortex_a9_events.h \ + events/arm_cortex_a15_events.h + ++INC_ARM64=events/arm_cortex_a57_events.h ++ + INCDEP=$(INC_COMMON) $(INCARCH) + + all: $(TARGETS) +diff --git a/lib/events/arm_cortex_a57_events.h b/lib/events/arm_cortex_a57_events.h +new file mode 100644 +index 0000000..9d1d407 +--- /dev/null ++++ b/lib/events/arm_cortex_a57_events.h +@@ -0,0 +1,440 @@ ++/* ++ * Copyright (c) 2014 Google Inc. All rights reserved ++ * Contributed by Stephane Eranian ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies ++ * of the Software, and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in all ++ * copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, ++ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF ++ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE ++ * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Cortex A57 r1p1 ++ * based on Table 11-24 from the "Cortex A57 Technical Reference Manual" ++ */ ++ ++static const arm_entry_t arm_cortex_a57_pe[]={ ++ {.name = "SW_INCR", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x00, ++ .desc = "Instruction architecturally executed (condition check pass) Software increment" ++ }, ++ {.name = "L1I_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x01, ++ .desc = "Level 1 instruction cache refill" ++ }, ++ {.name = "L1I_TLB_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x02, ++ .desc = "Level 1 instruction TLB refill" ++ }, ++ {.name = "L1D_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x03, ++ .desc = "Level 1 data cache refill" ++ }, ++ {.name = "L1D_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x04, ++ .desc = "Level 1 data cache access" ++ }, ++ {.name = "L1D_TLB_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x05, ++ .desc = "Level 1 data TLB refill" ++ }, ++ ++ {.name = "INST_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x08, ++ .desc = "Instruction architecturally executed" ++ }, ++ {.name = "EXCEPTION_TAKEN", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x09, ++ .desc = "Exception taken" ++ }, ++ {.name = "EXCEPTION_RETURN", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0a, ++ .desc = "Instruction architecturally executed (condition check pass) Exception return" ++ }, ++ {.name = "CID_WRITE_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x0b, ++ .desc = "Instruction architecturally executed (condition check pass) Write to CONTEXTIDR" ++ }, ++ ++ {.name = "BRANCH_MISPRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x10, ++ .desc = "Mispredicted or not predicted branch speculatively executed" ++ }, ++ {.name = "CPU_CYCLES", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x11, ++ .desc = "Cycles" ++ }, ++ {.name = "BRANCH_PRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x12, ++ .desc = "Predictable branch speculatively executed" ++ }, ++ {.name = "DATA_MEM_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x13, ++ .desc = "Data memory access" ++ }, ++ {.name = "L1I_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x14, ++ .desc = "Level 1 instruction cache access" ++ }, ++ {.name = "L1D_CACHE_WB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x15, ++ .desc = "Level 1 data cache WriteBack" ++ }, ++ {.name = "L2D_CACHE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x16, ++ .desc = "Level 2 data cache access" ++ }, ++ {.name = "L2D_CACHE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x17, ++ .desc = "Level 2 data cache refill" ++ }, ++ {.name = "L2D_CACHE_WB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x18, ++ .desc = "Level 2 data cache WriteBack" ++ }, ++ {.name = "BUS_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x19, ++ .desc = "Bus access" ++ }, ++ {.name = "LOCAL_MEMORY_ERROR", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1a, ++ .desc = "Local memory error" ++ }, ++ {.name = "INST_SPEC_EXEC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1b, ++ .desc = "Instruction speculatively executed" ++ }, ++ {.name = "TTBR_WRITE_RETIRED", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1c, ++ .desc = "Instruction architecturally executed (condition check pass) Write to translation table base" ++ }, ++ {.name = "BUS_CYCLES", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x1d, ++ .desc = "Bus cycle" ++ }, ++ {.name = "L1D_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x40, ++ .desc = "Level 1 data cache read access" ++ }, ++ {.name = "L1D_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x41, ++ .desc = "Level 1 data cache write access" ++ }, ++ {.name = "L1D_READ_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x42, ++ .desc = "Level 1 data cache read refill" ++ }, ++ {.name = "L1D_WRITE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x43, ++ .desc = "Level 1 data cache write refill" ++ }, ++ {.name = "L1D_WB_VICTIM", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x46, ++ .desc = "Level 1 data cache writeback victim" ++ }, ++ {.name = "L1D_WB_CLEAN_COHERENCY", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x47, ++ .desc = "Level 1 data cache writeback cleaning and coherency" ++ }, ++ {.name = "L1D_INVALIDATE", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x48, ++ .desc = "Level 1 data cache invalidate" ++ }, ++ {.name = "L1D_TLB_READ_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x4c, ++ .desc = "Level 1 data TLB read refill" ++ }, ++ {.name = "L1D_TLB_WRITE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x4d, ++ .desc = "Level 1 data TLB write refill" ++ }, ++ {.name = "L2D_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x50, ++ .desc = "Level 2 data cache read access" ++ }, ++ {.name = "L2D_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x51, ++ .desc = "Level 2 data cache write access" ++ }, ++ {.name = "L2D_READ_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x52, ++ .desc = "Level 2 data cache read refill" ++ }, ++ {.name = "L2D_WRITE_REFILL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x53, ++ .desc = "Level 2 data cache write refill" ++ }, ++ {.name = "L2D_WB_VICTIM", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x56, ++ .desc = "Level 2 data cache writeback victim" ++ }, ++ {.name = "L2D_WB_CLEAN_COHERENCY", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x57, ++ .desc = "Level 2 data cache writeback cleaning and coherency" ++ }, ++ {.name = "L2D_INVALIDATE", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x58, ++ .desc = "Level 2 data cache invalidate" ++ }, ++ {.name = "BUS_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x60, ++ .desc = "Bus read access" ++ }, ++ {.name = "BUS_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x61, ++ .desc = "Bus write access" ++ }, ++ {.name = "BUS_NORMAL_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x62, ++ .desc = "Bus normal access" ++ }, ++ {.name = "BUS_NOT_NORMAL_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x63, ++ .desc = "Bus not normal access" ++ }, ++ {.name = "BUS_NORMAL_ACCESS_2", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x64, ++ .desc = "Bus normal access" ++ }, ++ {.name = "BUS_PERIPH_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x65, ++ .desc = "Bus peripheral access" ++ }, ++ {.name = "DATA_MEM_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x66, ++ .desc = "Data memory read access" ++ }, ++ {.name = "DATA_MEM_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x67, ++ .desc = "Data memory write access" ++ }, ++ {.name = "UNALIGNED_READ_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x68, ++ .desc = "Unaligned read access" ++ }, ++ {.name = "UNALIGNED_WRITE_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x69, ++ .desc = "Unaligned read access" ++ }, ++ {.name = "UNALIGNED_ACCESS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x6a, ++ .desc = "Unaligned access" ++ }, ++ {.name = "INST_SPEC_EXEC_LDREX", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x6c, ++ .desc = "LDREX exclusive instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_STREX_PASS", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x6d, ++ .desc = "STREX pass exclusive instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_STREX_FAIL", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x6e, ++ .desc = "STREX fail exclusive instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_LOAD", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x70, ++ .desc = "Load instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_STORE", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x71, ++ .desc = "Store instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_LOAD_STORE", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x72, ++ .desc = "Load or store instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_INTEGER_INST", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x73, ++ .desc = "Integer data processing instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_SIMD", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x74, ++ .desc = "Advanced SIMD instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_VFP", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x75, ++ .desc = "VFP instruction speculatively executed" ++ }, ++ {.name = "INST_SPEC_EXEC_SOFT_PC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x76, ++ .desc = "Software of the PC instruction speculatively executed" ++ }, ++ {.name = "BRANCH_SPEC_EXEC_IMM_BRANCH", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x78, ++ .desc = "Immediate branch speculatively executed" ++ }, ++ {.name = "BRANCH_SPEC_EXEC_RET", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x79, ++ .desc = "Return branch speculatively executed" ++ }, ++ {.name = "BRANCH_SPEC_EXEC_IND", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x7a, ++ .desc = "Indirect branch speculatively executed" ++ }, ++ {.name = "BARRIER_SPEC_EXEC_ISB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x7c, ++ .desc = "ISB barrier speculatively executed" ++ }, ++ {.name = "BARRIER_SPEC_EXEC_DSB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x7d, ++ .desc = "DSB barrier speculatively executed" ++ }, ++ {.name = "BARRIER_SPEC_EXEC_DMB", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x7e, ++ .desc = "DMB barrier speculatively executed" ++ }, ++ {.name = "EXCEPTION_UNDEF", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x81, ++ .desc = "Exception taken, other synchronous" ++ }, ++ {.name = "EXCEPTION_SVC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x82, ++ .desc = "Exception taken, supervisor call" ++ }, ++ {.name = "EXCEPTION_PABORT", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x83, ++ .desc = "Exception taken, instruction abort" ++ }, ++ {.name = "EXCEPTION_DABORT", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x84, ++ .desc = "Exception taken, data abort or SError" ++ }, ++ {.name = "EXCEPTION_IRQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x86, ++ .desc = "Exception taken, irq" ++ }, ++ {.name = "EXCEPTION_FIQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x87, ++ .desc = "Exception taken, irq" ++ }, ++ {.name = "EXCEPTION_SMC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x88, ++ .desc = "Exception taken, secure monitor call" ++ }, ++ {.name = "EXCEPTION_HVC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8a, ++ .desc = "Exception taken, hypervisor call" ++ }, ++ {.name = "EXCEPTION_TRAP_PABORT", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8b, ++ .desc = "Exception taken, instruction abort not taken locally" ++ }, ++ {.name = "EXCEPTION_TRAP_DABORT", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8c, ++ .desc = "Exception taken, data abort or SError not taken locally" ++ }, ++ {.name = "EXCEPTION_TRAP_OTHER", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8d, ++ .desc = "Exception taken, other traps not taken locally" ++ }, ++ {.name = "EXCEPTION_TRAP_IRQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8e, ++ .desc = "Exception taken, irq not taken locally" ++ }, ++ {.name = "EXCEPTION_TRAP_FIQ", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x8f, ++ .desc = "Exception taken, fiq not taken locally" ++ }, ++ {.name = "RC_LD_SPEC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x90, ++ .desc = "Release consistency instruction speculatively executed (load-acquire)", ++ }, ++ {.name = "RC_ST_SPEC", ++ .modmsk = ARMV8_ATTRS, ++ .code = 0x91, ++ .desc = "Release consistency instruction speculatively executed (store-release)", ++ }, ++ /* END Cortex A47 specific events */ ++}; +diff --git a/lib/pfmlib_arm_armv8.c b/lib/pfmlib_arm_armv8.c +new file mode 100644 +index 0000000..880d566 +--- /dev/null ++++ b/lib/pfmlib_arm_armv8.c +@@ -0,0 +1,74 @@ ++/* ++ * pfmlib_arm_armv8.c : support for ARMv8 processors ++ * ++ * Copyright (c) 2014 Google Inc. All rights reserved ++ * Contributed by Stephane Eranian ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies ++ * of the Software, and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in all ++ * copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, ++ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF ++ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE ++ * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++#include ++#include ++#include ++ ++/* private headers */ ++#include "pfmlib_priv.h" /* library private */ ++#include "pfmlib_arm_priv.h" ++ ++#include "events/arm_cortex_a57_events.h" /* event tables */ ++ ++static int ++pfm_arm_detect_cortex_a57(void *this) ++{ ++ int ret; ++ ++ ret = pfm_arm_detect(this); ++ if (ret != PFM_SUCCESS) ++ return PFM_ERR_NOTSUPP; ++ ++ if ((pfm_arm_cfg.implementer == 0x41) && /* ARM */ ++ (pfm_arm_cfg.part == 0xc00)) { /* Cortex A57 */ ++ return PFM_SUCCESS; ++ } ++ return PFM_ERR_NOTSUPP; ++} ++ ++/* ARM Cortex A57 support */ ++pfmlib_pmu_t arm_cortex_a57_support={ ++ .desc = "ARM Cortex A57", ++ .name = "arm_ac57", ++ .pmu = PFM_PMU_ARM_CORTEX_A57, ++ .pme_count = LIBPFM_ARRAY_SIZE(arm_cortex_a57_pe), ++ .type = PFM_PMU_TYPE_CORE, ++ .pe = arm_cortex_a57_pe, ++ ++ .pmu_detect = pfm_arm_detect_cortex_a57, ++ .max_encoding = 1, ++ .num_cntrs = 6, ++ ++ .get_event_encoding[PFM_OS_NONE] = pfm_arm_get_encoding, ++ PFMLIB_ENCODE_PERF(pfm_arm_get_perf_encoding), ++ .get_event_first = pfm_arm_get_event_first, ++ .get_event_next = pfm_arm_get_event_next, ++ .event_is_valid = pfm_arm_event_is_valid, ++ .validate_table = pfm_arm_validate_table, ++ .get_event_info = pfm_arm_get_event_info, ++ .get_event_attr_info = pfm_arm_get_event_attr_info, ++ PFMLIB_VALID_PERF_PATTRS(pfm_arm_perf_validate_pattrs), ++ .get_event_nattrs = pfm_arm_get_event_nattrs, ++}; +diff --git a/lib/pfmlib_arm_priv.h b/lib/pfmlib_arm_priv.h +index ef367b7..227508b 100644 +--- a/lib/pfmlib_arm_priv.h ++++ b/lib/pfmlib_arm_priv.h +@@ -86,6 +86,9 @@ extern int pfm_arm_get_perf_encoding(void *this, pfmlib_event_desc_t *e); + #define ARMV7_A15_ATTRS (_ARM_ATTR_K|_ARM_ATTR_U|_ARM_ATTR_HV) + #define ARMV7_A15_PLM (PFM_PLM0|PFM_PLM3|PFM_PLMH) + ++#define ARMV8_ATTRS (_ARM_ATTR_K|_ARM_ATTR_U|_ARM_ATTR_HV) ++#define ARMV8_PLM (PFM_PLM0|PFM_PLM3|PFM_PLMH) ++ + static inline int + arm_has_plm(void *this, pfmlib_event_desc_t *e) + { +diff --git a/lib/pfmlib_common.c b/lib/pfmlib_common.c +index 8e4b1a1..900d7de 100644 +--- a/lib/pfmlib_common.c ++++ b/lib/pfmlib_common.c +@@ -199,7 +199,12 @@ static pfmlib_pmu_t *pfmlib_pmus[]= + &arm_cortex_a15_support, + &arm_1176_support, + &arm_qcom_krait_support, ++ &arm_cortex_a57_support, + #endif ++#ifdef CONFIG_PFMLIB_ARCH_ARM64 ++ &arm_cortex_a57_support, ++#endif ++ + #ifdef CONFIG_PFMLIB_ARCH_S390X + &s390x_cpum_cf_support, + &s390x_cpum_sf_support, +diff --git a/lib/pfmlib_priv.h b/lib/pfmlib_priv.h +index 715c4b0..3031d3b 100644 +--- a/lib/pfmlib_priv.h ++++ b/lib/pfmlib_priv.h +@@ -332,6 +332,7 @@ extern pfmlib_pmu_t arm_cortex_a9_support; + extern pfmlib_pmu_t arm_cortex_a15_support; + extern pfmlib_pmu_t arm_1176_support; + extern pfmlib_pmu_t arm_qcom_krait_support; ++extern pfmlib_pmu_t arm_cortex_a57_support; + extern pfmlib_pmu_t mips_74k_support; + extern pfmlib_pmu_t s390x_cpum_cf_support; + extern pfmlib_pmu_t s390x_cpum_sf_support; +diff --git a/tests/Makefile b/tests/Makefile +index 7076fb7..7dd82c3 100644 +--- a/tests/Makefile ++++ b/tests/Makefile +@@ -39,6 +39,10 @@ ifeq ($(CONFIG_PFMLIB_ARCH_ARM),y) + SRCS += validate_arm.c + endif + ++ifeq ($(CONFIG_PFMLIB_ARCH_ARM64),y) ++SRCS += validate_arm64.c ++endif ++ + ifeq ($(CONFIG_PFMLIB_ARCH_POWERPC),y) + SRCS += validate_power.c + endif +diff --git a/tests/validate_arm.c b/tests/validate_arm.c +index fe97aa9..d6c0168 100644 +--- a/tests/validate_arm.c ++++ b/tests/validate_arm.c +@@ -159,6 +159,34 @@ static const test_event_t arm_test_events[]={ + .codes[0] = 0x480000ff, + .fstr = "qcom_krait::CPU_CYCLES:k=0:u=1:hv=0", + }, ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES:k", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x88000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=0:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES:k:u", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::INST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000008, ++ .fstr = "arm_ac57::INST_RETIRED:k=1:u=1:hv=0", ++ }, + }; + #define NUM_TEST_EVENTS (int)(sizeof(arm_test_events)/sizeof(test_event_t)) + +diff --git a/tests/validate_arm64.c b/tests/validate_arm64.c +new file mode 100644 +index 0000000..0f0174c +--- /dev/null ++++ b/tests/validate_arm64.c +@@ -0,0 +1,138 @@ ++/* ++ * validate_arm64.c - validate ARM64 event tables + encodings ++ * ++ * Copyright (c) 2014 Google, Inc ++ * Contributed by Stephane Eranian ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies ++ * of the Software, and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in all ++ * copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, ++ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF ++ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE ++ * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define MAX_ENCODING 1 ++#define SRC_LINE .line = __LINE__ ++ ++typedef struct { ++ const char *name; ++ const char *fstr; ++ uint64_t codes[MAX_ENCODING]; ++ int ret, count, line; ++} test_event_t; ++ ++static const test_event_t arm64_test_events[]={ ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES:k", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x88000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=0:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::CPU_CYCLES:k:u", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000011, ++ .fstr = "arm_ac57::CPU_CYCLES:k=1:u=1:hv=0", ++ }, ++ { SRC_LINE, ++ .name = "arm_ac57::INST_RETIRED", ++ .ret = PFM_SUCCESS, ++ .count = 1, ++ .codes[0] = 0x8000008, ++ .fstr = "arm_ac57::INST_RETIRED:k=1:u=1:hv=0", ++ }, ++}; ++#define NUM_TEST_EVENTS (int)(sizeof(arm64_test_events)/sizeof(test_event_t)) ++ ++static int check_test_events(FILE *fp) ++{ ++ const test_event_t *e; ++ char *fstr; ++ uint64_t *codes; ++ int count, i, j; ++ int ret, errors = 0; ++ ++ for (i = 0, e = arm64_test_events; i < NUM_TEST_EVENTS; i++, e++) { ++ codes = NULL; ++ count = 0; ++ fstr = NULL; ++ ret = pfm_get_event_encoding(e->name, PFM_PLM0 | PFM_PLM3, &fstr, NULL, &codes, &count); ++ if (ret != e->ret) { ++ fprintf(fp,"Line %d, Event%d %s, ret=%s(%d) expected %s(%d)\n", e->line, i, e->name, pfm_strerror(ret), ret, pfm_strerror(e->ret), e->ret); ++ errors++; ++ } else { ++ if (ret != PFM_SUCCESS) { ++ if (fstr) { ++ fprintf(fp,"Line %d, Event%d %s, expected fstr NULL but it is not\n", e->line, i, e->name); ++ errors++; ++ } ++ if (count != 0) { ++ fprintf(fp,"Line %d, Event%d %s, expected count=0 instead of %d\n", e->line, i, e->name, count); ++ errors++; ++ } ++ if (codes) { ++ fprintf(fp,"Line %d, Event%d %s, expected codes[] NULL but it is not\n", e->line, i, e->name); ++ errors++; ++ } ++ } else { ++ if (count != e->count) { ++ fprintf(fp,"Line %d, Event%d %s, count=%d expected %d\n", e->line, i, e->name, count, e->count); ++ errors++; ++ } ++ for (j=0; j < count; j++) { ++ if (codes[j] != e->codes[j]) { ++ fprintf(fp,"Line %d, Event%d %s, codes[%d]=%#"PRIx64" expected %#"PRIx64"\n", e->line, i, e->name, j, codes[j], e->codes[j]); ++ errors++; ++ } ++ } ++ if (e->fstr && strcmp(fstr, e->fstr)) { ++ fprintf(fp,"Line %d, Event%d %s, fstr=%s expected %s\n", e->line, i, e->name, fstr, e->fstr); ++ errors++; ++ } ++ } ++ } ++ if (codes) ++ free(codes); ++ if (fstr) ++ free(fstr); ++ } ++ printf("\t %d ARM64 events: %d errors\n", i, errors); ++ return errors; ++} ++ ++int ++validate_arch(FILE *fp) ++{ ++ return check_test_events(fp); ++} +commit b95de18085dd74738752341e0004b3dd11f00a53 +Author: Stephane Eranian +Date: Mon May 12 14:15:57 2014 +0200 + + Add ARM Cortex A57 documentation + + Signed-off-by: Stephane Eranian + +diff --git a/docs/Makefile b/docs/Makefile +index ecf6769..9b79ec7 100644 +--- a/docs/Makefile ++++ b/docs/Makefile +@@ -76,7 +76,11 @@ endif + endif + + ifeq ($(CONFIG_PFMLIB_ARCH_ARM),y) +-ARCH_MAN += libpfm_arm_ac15.3 libpfm_arm_ac8.3 libpfm_arm_ac9.3 libpfm_arm_qcom_krait.3 ++ARCH_MAN += libpfm_arm_ac57.3 libpfm_arm_ac15.3 libpfm_arm_ac8.3 libpfm_arm_ac9.3 libpfm_arm_qcom_krait.3 ++endif ++ ++ifeq ($(CONFIG_PFMLIB_ARCH_ARM64),y) ++ARCH_MAN += libpfm_arm_ac57.3 + endif + + ifeq ($(CONFIG_PFMLIB_ARCH_MIPS),y) +diff --git a/docs/man3/libpfm_arm_ac57.3 b/docs/man3/libpfm_arm_ac57.3 +new file mode 100644 +index 0000000..c471ff1 +--- /dev/null ++++ b/docs/man3/libpfm_arm_ac57.3 +@@ -0,0 +1,36 @@ ++.TH LIBPFM 4 "May, 2014" "" "Linux Programmer's Manual" ++.SH NAME ++libpfm_arm_ac57 - support for Arm Cortex A57 PMU ++.SH SYNOPSIS ++.nf ++.B #include ++.sp ++.B PMU name: arm_ac57 ++.B PMU desc: ARM Cortex A57 ++.sp ++.SH DESCRIPTION ++The library supports the ARM Cortex A57 core PMU. ++ ++This PMU supports 6 counters and privilege levels filtering. ++It can operate in both 32 and 64 bit modes. ++ ++.SH MODIFIERS ++The following modifiers are supported on ARM Cortex A57: ++.TP ++.B u ++Measure at the user level. This corresponds to \fBPFM_PLM3\fR. ++This is a boolean modifier. ++.TP ++.B k ++Measure at the kernel level. This corresponds to \fBPFM_PLM0\fR. ++This is a boolean modifier. ++.TP ++.B hv ++Measure at the hypervisor level. This corresponds to \fBPFM_PLMH\fR. ++This is a boolean modifier. ++ ++.SH AUTHORS ++.nf ++Stephane Eranian ++.if ++.PP +commit 399aa947ca6f4c58acac8c6be52d2ad4e5268210 +Author: Stephane Eranian +Date: Fri May 16 15:42:40 2014 +0200 + + fix the ARM Cortex A57 detection + + This patch fixes the detection of ARM Cortex A57. + Was using the wrong part number. Correct number + is 0xD07. + + Signed-off-by: Stephane Eranian + +diff --git a/lib/pfmlib_arm_armv8.c b/lib/pfmlib_arm_armv8.c +index 880d566..4bc863b 100644 +--- a/lib/pfmlib_arm_armv8.c ++++ b/lib/pfmlib_arm_armv8.c +@@ -42,7 +42,7 @@ pfm_arm_detect_cortex_a57(void *this) + return PFM_ERR_NOTSUPP; + + if ((pfm_arm_cfg.implementer == 0x41) && /* ARM */ +- (pfm_arm_cfg.part == 0xc00)) { /* Cortex A57 */ ++ (pfm_arm_cfg.part == 0xd07)) { /* Cortex A57 */ + return PFM_SUCCESS; + } + return PFM_ERR_NOTSUPP; diff --git a/libpfm-fix-const.patch b/libpfm-fix-const.patch deleted file mode 100644 index b9a2308..0000000 --- a/libpfm-fix-const.patch +++ /dev/null @@ -1,59 +0,0 @@ -From ded148888c501c2e9d21c23263d7c09aed4b97d6 Mon Sep 17 00:00:00 2001 -From: Aaron Merey -Date: Fri, 19 Dec 2025 12:33:33 -0500 -Subject: [PATCH] fix discarded const warning on newer gcc - ---- - lib/pfmlib_common.c | 15 +++++++++------ - tests/validate_x86.c | 2 +- - 2 files changed, 10 insertions(+), 7 deletions(-) - -diff --git a/lib/pfmlib_common.c b/lib/pfmlib_common.c -index 44b5de4..59a7cff 100644 ---- a/lib/pfmlib_common.c -+++ b/lib/pfmlib_common.c -@@ -1625,12 +1625,6 @@ pfmlib_parse_event(const char *event, pfmlib_event_desc_t *d) - const char *pname = NULL; - int i, j, ret; - -- /* -- * support only one event at a time. -- */ -- p = strpbrk(event, PFMLIB_EVENT_DELIM); -- if (p) -- return PFM_ERR_INVAL; - /* - * create copy because string is const - */ -@@ -1638,6 +1632,15 @@ pfmlib_parse_event(const char *event, pfmlib_event_desc_t *d) - if (!str) - return PFM_ERR_NOMEM; - -+ /* -+ * support only one event at a time. -+ */ -+ p = strpbrk(s, PFMLIB_EVENT_DELIM); -+ if (p) { -+ free(s); -+ return PFM_ERR_INVAL; -+ } -+ - - /* check for optional PMU name */ - p = strstr(s, PFMLIB_PMU_DELIM); -diff --git a/tests/validate_x86.c b/tests/validate_x86.c -index 500a697..68a776d 100644 ---- a/tests/validate_x86.c -+++ b/tests/validate_x86.c -@@ -8018,7 +8018,7 @@ static int - check_pmu_supported(const char *evt) - { - pfm_pmu_info_t info; -- char *p; -+ const char *p; - int ret; - pfm_pmu_t i; - --- -2.52.0 - diff --git a/libpfm-gcc14.patch b/libpfm-gcc14.patch deleted file mode 100644 index 9f2a62d..0000000 --- a/libpfm-gcc14.patch +++ /dev/null @@ -1,21 +0,0 @@ -commit cb944829e0940d74009e09b8985b4f2139f5cb3b -Author: William Cohen -Date: Mon Jan 29 16:23:43 2024 -0500 - - Correct s390x code to avoid GCC-14 -Werror=calloc-transposed-args errors - -diff --git a/lib/pfmlib_s390x_cpumf.c b/lib/pfmlib_s390x_cpumf.c -index d8ce22d..718f5f8 100644 ---- a/lib/pfmlib_s390x_cpumf.c -+++ b/lib/pfmlib_s390x_cpumf.c -@@ -216,8 +216,8 @@ static int pfm_cpumcf_init(void *this) - break; - } - -- cpumcf_pe = calloc(sizeof(*cpumcf_pe), -- cfvn_set_count + csvn_set_count + ext_set_count); -+ cpumcf_pe = calloc(cfvn_set_count + csvn_set_count + ext_set_count, -+ sizeof(*cpumcf_pe)); - if (cpumcf_pe == NULL) - return PFM_ERR_NOMEM; - diff --git a/libpfm-python3-setup.patch b/libpfm-python3-setup.patch deleted file mode 100644 index f43187a..0000000 --- a/libpfm-python3-setup.patch +++ /dev/null @@ -1,10 +0,0 @@ -diff --git a/python/setup.py b/python/setup.py -index eda8fa5..dff0f27 100755 ---- a/python/setup.py -+++ b/python/setup.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python -+#!/usr/bin/env python3 - - from distutils.core import setup, Extension - from distutils.command.install_data import install_data diff --git a/libpfm.spec b/libpfm.spec index d7384ca..03f19d4 100644 --- a/libpfm.spec +++ b/libpfm.spec @@ -1,31 +1,29 @@ -# Default to no static libraries -%{!?with_static: %global with_static 1} %bcond_without python %if %{with python} -%define python_sitearch %(python3 -c "from distutils.sysconfig import get_python_lib; print (get_python_lib(1))") -%define python_prefix %(python3 -c "import sys; print (sys.prefix)") -%global __provides_exclude_from ^%{python3_sitearch}/perfmon/.*\.so$ +%define python_sitearch %(python -c "from distutils.sysconfig import get_python_lib; print get_python_lib(1)") +%define python_prefix %(python -c "import sys; print sys.prefix") +%{?filter_setup: +%filter_provides_in %{python_sitearch}/perfmon/.*\.so$ +%filter_setup +} %endif Name: libpfm -Version: 4.13.0 -Release: 17%{?dist} +Version: 4.5.0 +Release: 6%{?dist} Summary: Library to encode performance events for use by perf tool +Group: System Environment/Libraries License: MIT URL: http://perfmon2.sourceforge.net/ Source0: http://sourceforge.net/projects/perfmon2/files/libpfm4/%{name}-%{version}.tar.gz -Patch1: libpfm-fix-const.patch -Patch2: libpfm-python3-setup.patch -Patch3: libpfm-gcc14.patch +Patch12: libpfm-ac57.patch +Patch13: libpfm-ac53.patch -BuildRequires: make -BuildRequires: gcc %if %{with python} -BuildRequires: python3 -BuildRequires: python3-devel -BuildRequires: python3-setuptools +BuildRequires: python-devel +BuildRequires: python-setuptools BuildRequires: swig %endif @@ -36,49 +34,38 @@ kernels performance monitoring interfaces. The current version provides support for the perf_events interface available in upstream Linux kernels since v2.6.31. %package devel -License: MIT Summary: Development library to encode performance events for perf_events based tools -Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Libraries +Requires: %{name}%{?_isa} = %{version} %description devel Development library and header files to create performance monitoring applications for the perf_events interface. -%if %{with_static} %package static -License: MIT Summary: Static library to encode performance events for perf_events based tools -Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Libraries +Requires: %{name}%{?_isa} = %{version} %description static Static version of the libpfm library for performance monitoring applications for the perf_events interface. -%endif %if %{with python} -%package -n python3-libpfm -License: MIT AND LicenseRef-Fedora-UltraPermissive -%{?python_provide:%python_provide python3-libpfm} -# Remove before F30 -Provides: %{name}-python = %{version}-%{release} -Provides: %{name}-python%{?_isa} = %{version}-%{release} -Obsoletes: %{name}-python < %{version}-%{release} +%package python Summary: Python bindings for libpfm and perf_event_open system call -Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Languages +Requires: %{name}%{?_isa} = %{version} -%description -n python3-libpfm +%description python Python bindings for libpfm4 and perf_event_open system call. %endif %prep %setup -q -%patch -P1 -p1 -b .fix-const -%patch -P2 -p1 -b .python3 -%patch -P3 -p1 -b .gcc14 -# to prevent setuptools from installing an .egg, we need to pass --root to setup.py install -# see https://github.com/pypa/setuptools/issues/3143 -# and https://github.com/pypa/pip/issues/11501 -sed -i 's/--prefix=$(DESTDIR)$(PYTHON_PREFIX)/--root=$(DESTDIR) --prefix=$(PYTHON_PREFIX)/' python/Makefile + +%patch12 -p1 +%patch13 -p1 %build %if %{with python} @@ -86,32 +73,27 @@ sed -i 's/--prefix=$(DESTDIR)$(PYTHON_PREFIX)/--root=$(DESTDIR) --prefix=$(PYTHO %else %global python_config CONFIG_PFMLIB_NOPYTHON=y %endif -%make_build %{python_config} \ - OPTIM="%{optflags}" LDFLAGS="%{build_ldflags}" +make %{python_config} %{?_smp_mflags} %install rm -rf $RPM_BUILD_ROOT %if %{with python} -%global python_config CONFIG_PFMLIB_NOPYTHON=n PYTHON_PREFIX=%{python_prefix} +%global python_config CONFIG_PFMLIB_NOPYTHON=n PYTHON_PREFIX=$RPM_BUILD_ROOT/%{python_prefix} %else %global python_config CONFIG_PFMLIB_NOPYTHON=y %endif make \ - DESTDIR=$RPM_BUILD_ROOT \ - PREFIX=%{_prefix} \ - LIBDIR=%{_libdir} \ + PREFIX=$RPM_BUILD_ROOT%{_prefix} \ + LIBDIR=$RPM_BUILD_ROOT%{_libdir} \ %{python_config} \ LDCONFIG=/bin/true \ install -%if !%{with_static} -rm $RPM_BUILD_ROOT%{_libdir}/lib*.a -%endif - -%ldconfig_scriptlets +%post -p /sbin/ldconfig +%postun -p /sbin/ldconfig %files %doc README @@ -122,212 +104,15 @@ rm $RPM_BUILD_ROOT%{_libdir}/lib*.a %{_mandir}/man3/* %{_libdir}/lib*.so -%if %{with_static} %files static %{_libdir}/lib*.a -%endif %if %{with python} -%files -n python3-libpfm -%{python3_sitearch}/perfmon-*.egg-info/ -%{python3_sitearch}/perfmon/ +%files python +%{python_sitearch}/* %endif %changelog -* Tue Dec 16 2025 Aaron Merey - 4.13.0-17 -- Add libpfm-fix-const.patch - -* Fri Sep 19 2025 Python Maint - 4.13.0-16 -- Rebuilt for Python 3.14.0rc3 bytecode - -* Mon Aug 25 2025 Aaron Merey - 4.13.0-15 -- Fix path in tests/runtest.sh - -* Fri Aug 15 2025 Python Maint - 4.13.0-14 -- Rebuilt for Python 3.14.0rc2 bytecode - -* Thu Jul 24 2025 Fedora Release Engineering - 4.13.0-13 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_43_Mass_Rebuild - -* Mon Jun 02 2025 Python Maint - 4.13.0-12 -- Rebuilt for Python 3.14 - -* Fri Jan 17 2025 Fedora Release Engineering - 4.13.0-11 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild - -* Thu Jul 18 2024 Fedora Release Engineering - 4.13.0-10 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild - -* Fri Jun 07 2024 Python Maint - 4.13.0-9 -- Rebuilt for Python 3.13 - -* Mon Jan 29 2024 William Cohen - 4.13.0-8 -- Fix gcc-14 -Werror=calloc-transposed-args compatibility - -* Thu Jan 25 2024 Fedora Release Engineering - 4.13.0-7 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild - -* Sun Jan 21 2024 Fedora Release Engineering - 4.13.0-6 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild - -* Tue Aug 1 2023 William Cohen - 4.13.0-5 -- migrated to SPDX license - -* Thu Jul 20 2023 Fedora Release Engineering - 4.13.0-4 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild - -* Tue Jun 13 2023 Python Maint - 4.13.0-3 -- Rebuilt for Python 3.12 - -* Tue Apr 25 2023 Miro Hrončok - 4.13.0-2 -- Don't install a Python .egg - -* Tue Mar 28 2023 William Cohen - 4.13.0-1 -- Rebase on libpfm-4.13.0. - -* Tue Mar 14 2023 William Cohen - 4.11.0-12 -- Add libpfm upstream patch to allow papi-7.0.1 to build. - -* Thu Jan 19 2023 Fedora Release Engineering - 4.11.0-11 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild - -* Thu Jul 21 2022 Fedora Release Engineering - 4.11.0-10 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild - -* Tue Jun 21 2022 Python Maint - 4.11.0-9 -- Fix FTBFS due to gcc12. (rhbz2045823) - -* Mon Jun 13 2022 Python Maint - 4.11.0-8 -- Rebuilt for Python 3.11 - -* Thu Jan 20 2022 Fedora Release Engineering - 4.11.0-7 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild - -* Thu Jul 22 2021 Fedora Release Engineering - 4.11.0-6 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_35_Mass_Rebuild - -* Fri Jun 04 2021 Python Maint - 4.11.0-5 -- Rebuilt for Python 3.10 - -* Tue Jan 26 2021 Fedora Release Engineering - 4.11.0-4 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild - -* Sat Jan 23 2021 William Cohen - 4.11.0-3 -- Reenable generation of static libraries for time being. - -* Fri Jan 22 2021 William Cohen - 4.11.0-2 -- By default disable generation of static libraries - -* Tue Sep 08 2020 William Cohen - 4.11.0-1 -- Rebase on libpfm-4.11.0. - -* Tue Jul 28 2020 Fedora Release Engineering - 4.10.1-13 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_33_Mass_Rebuild - -* Mon Jul 13 2020 Tom Stellard - 4.10.1-12 -- Use make macros -- https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro - -* Tue May 26 2020 Miro Hrončok - 4.10.1-11 -- Rebuilt for Python 3.9 - -* Wed Jan 29 2020 Fedora Release Engineering - 4.10.1-10 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_32_Mass_Rebuild - -* Thu Oct 03 2019 Miro Hrončok - 4.10.1-9 -- Rebuilt for Python 3.8.0rc1 (#1748018) - -* Mon Aug 19 2019 Miro Hrončok - 4.10.1-8 -- Rebuilt for Python 3.8 - -* Thu Jul 25 2019 Fedora Release Engineering - 4.10.1-7 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild - -* Fri Feb 01 2019 Fedora Release Engineering - 4.10.1-6 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild - -* Tue Jul 17 2018 Miro Hrončok - 4.10.1-5 -- Update Python macros to new packaging standards - (See https://fedoraproject.org/wiki/Changes/Move_usr_bin_python_into_separate_package) - -* Sun Jul 15 2018 William Cohen - 4.10.1-4 -- Add gcc Buildrequires. - -* Fri Jul 13 2018 Fedora Release Engineering - 4.10.1-3 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild - -* Tue Jun 19 2018 Miro Hrončok - 4.10.1-2 -- Rebuilt for Python 3.7 - -* Fri Jun 15 2018 William Cohen - 4.10.1-1 -- Rebase on libpfm-4.10.1. - -* Tue Jun 12 2018 William Cohen - 4.10.0-2 -- Use upstream libpfm cavium patch. - -* Fri Jun 8 2018 William Cohen - 4.10.0-1 -- Rebase on libpfm-4.10.0. -- Use Python 3. - -* Mon Feb 26 2018 Fedora Release Engineering - 4.9.0-6 -- Pass in LDFLAGS for build. - -* Wed Feb 07 2018 Fedora Release Engineering - 4.9.0-5 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild - -* Tue Jan 30 2018 William Cohen - 4.9.0-4 -- Address truncation issues. - -* Tue Jan 30 2018 William Cohen - 4.9.0-3 -- Use the RPM build flags. (RHBZ #1540262) - -* Tue Jan 09 2018 Iryna Shcherbina - 4.9.0-2 -- Update Python 2 dependency declarations to new packaging standards - (See https://fedoraproject.org/wiki/FinalizingFedoraSwitchtoPython3) - -* Thu Jan 4 2018 William Cohen - 4.9.0-1 -- Rebase on libpfm-4.9.0. - -* Sun Aug 20 2017 Zbigniew Jędrzejewski-Szmek - 4.8.0-8 -- Add Provides for the old name without %%_isa - -* Sat Aug 19 2017 Zbigniew Jędrzejewski-Szmek - 4.8.0-7 -- Python 2 binary package renamed to python2-libpfm - See https://fedoraproject.org/wiki/FinalizingFedoraSwitchtoPython3 - -* Thu Aug 03 2017 Fedora Release Engineering - 4.8.0-6 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Binutils_Mass_Rebuild - -* Wed Jul 26 2017 Fedora Release Engineering - 4.8.0-5 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Mass_Rebuild - -* Fri Jul 07 2017 Igor Gnatenko - 4.8.0-4 -- Rebuild due to bug in RPM (RHBZ #1468476) - -* Fri Feb 10 2017 Fedora Release Engineering - 4.8.0-3 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_26_Mass_Rebuild - -* Mon Nov 7 2016 William Cohen - 4.8.0-1 -- Rebase on libpfm-4.8.0. - -* Tue Jul 19 2016 Fedora Release Engineering - 4.7.0-2 -- https://fedoraproject.org/wiki/Changes/Automatic_Provides_for_Python_RPM_Packages - -* Thu Feb 11 2016 William Cohen - 4.7.0-1 -- Rebase on libpfm-4.7.0. - -* Thu Feb 04 2016 Fedora Release Engineering - 4.6.0-4 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_24_Mass_Rebuild - -* Wed Jun 17 2015 Fedora Release Engineering - 4.6.0-3 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_23_Mass_Rebuild - -* Thu Jun 4 2015 William Cohen - 4.6.0-2 -- Correct requires for subpackages. - -* Thu Mar 5 2015 William Cohen - 4.6.0-1 -- Rebase on libpfm-4.6.0. - * Wed Feb 11 2015 William Cohen - 4.5.0-6 - Bump version and rebuild. diff --git a/plans/ci.fmf b/plans/ci.fmf deleted file mode 100644 index 3fd3ab7..0000000 --- a/plans/ci.fmf +++ /dev/null @@ -1,5 +0,0 @@ -summary: CI Gating Plan -discover: - how: fmf -execute: - how: tmt diff --git a/sources b/sources index b2d4ea3..38403e0 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (libpfm-4.13.0.tar.gz) = e61b210aa2ce80f0e47603c88eee2e4f2fe30ca2c0e194a5472b6a8de3bf9dc1085e5261bbb9ddbe5b6531c4b391fb34f20d038e5ebd8e6f4c14c2112aee508f +8eda1e3741c8f3359a33ebd553243333 libpfm-4.5.0.tar.gz diff --git a/tests/libpfm-testsuite/Makefile b/tests/libpfm-testsuite/Makefile deleted file mode 100644 index ba93382..0000000 --- a/tests/libpfm-testsuite/Makefile +++ /dev/null @@ -1,63 +0,0 @@ -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -# -# Makefile of /tools/libpfm/Sanity/libpfm-testsuite -# Description: libpfm-testsuite testing by upstream testsuite -# Author: Michal Kolar -# -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -# -# Copyright (c) 2021 Red Hat, Inc. -# -# This program is free software: you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation, either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be -# useful, but WITHOUT ANY WARRANTY; without even the implied -# warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR -# PURPOSE. See the GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see http://www.gnu.org/licenses/. -# -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -export TEST=/tools/libpfm/Sanity/libpfm-testsuite -export TESTVERSION=1.0 - -BUILT_FILES= - -FILES=$(METADATA) runtest.sh Makefile PURPOSE - -.PHONY: all install download clean - -run: $(FILES) build - ./runtest.sh - -build: $(BUILT_FILES) - test -x runtest.sh || chmod a+x runtest.sh - -clean: - rm -f *~ $(BUILT_FILES) - - -include /usr/share/rhts/lib/rhts-make.include - -$(METADATA): Makefile - @echo "Owner: Michal Kolar " > $(METADATA) - @echo "Name: $(TEST)" >> $(METADATA) - @echo "TestVersion: $(TESTVERSION)" >> $(METADATA) - @echo "Path: $(TEST_DIR)" >> $(METADATA) - @echo "Description: libpfm-testsuite testing by upstream testsuite" >> $(METADATA) - @echo "Type: Sanity" >> $(METADATA) - @echo "TestTime: 1h" >> $(METADATA) - @echo "RunFor: libpfm" >> $(METADATA) - @echo "Requires: libpfm rpm-build yum-utils make gcc" >> $(METADATA) - @echo "Priority: Normal" >> $(METADATA) - @echo "License: GPLv2+" >> $(METADATA) - @echo "Confidential: no" >> $(METADATA) - @echo "Destructive: no" >> $(METADATA) - @echo "Releases: -RHEL4 -RHELClient5 -RHELServer5 -RHEL6 -RHEL7" >> $(METADATA) - - rhts-lint $(METADATA) diff --git a/tests/libpfm-testsuite/PURPOSE b/tests/libpfm-testsuite/PURPOSE deleted file mode 100644 index 9c4a286..0000000 --- a/tests/libpfm-testsuite/PURPOSE +++ /dev/null @@ -1,3 +0,0 @@ -PURPOSE of /tools/libpfm/Sanity/libpfm-testsuite -Description: libpfm-testsuite testing by upstream testsuite -Author: Michal Kolar diff --git a/tests/libpfm-testsuite/main.fmf b/tests/libpfm-testsuite/main.fmf deleted file mode 100644 index 8b5c8cf..0000000 --- a/tests/libpfm-testsuite/main.fmf +++ /dev/null @@ -1,16 +0,0 @@ -summary: libpfm-testsuite testing by upstream testsuite -description: '' -contact: Michal Kolar -component: -- libpfm -test: ./runtest.sh -framework: beakerlib -recommend: -- libpfm -- rpm-build -- yum-utils -- make -- gcc -duration: 1h -extra-summary: /tools/libpfm/Sanity/libpfm-testsuite -extra-task: /tools/libpfm/Sanity/libpfm-testsuite diff --git a/tests/libpfm-testsuite/runtest.sh b/tests/libpfm-testsuite/runtest.sh deleted file mode 100755 index a5997d6..0000000 --- a/tests/libpfm-testsuite/runtest.sh +++ /dev/null @@ -1,82 +0,0 @@ -#!/bin/bash -# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -# -# runtest.sh of /tools/libpfm/Sanity/libpfm-testsuite -# Description: libpfm-testsuite testing by upstream testsuite -# Author: Michal Kolar -# -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -# -# Copyright (c) 2021 Red Hat, Inc. -# -# This program is free software: you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation, either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be -# useful, but WITHOUT ANY WARRANTY; without even the implied -# warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR -# PURPOSE. See the GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see http://www.gnu.org/licenses/. -# -# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -# Include Beaker environment -. /usr/share/beakerlib/beakerlib.sh || exit 1 - -BUILD_USER=${BUILD_USER:-lbpfmbld} -TESTS_COUNT_MIN=${TESTS_COUNT_MIN:-1} -PACKAGE="libpfm" -REQUIRES="$PACKAGE rpm-build make gcc" -if rlIsFedora; then - REQUIRES="$REQUIRES dnf-utils" -else - REQUIRES="$REQUIRES yum-utils" -fi - -rlJournalStart - rlPhaseStartSetup - rlShowRunningKernel - rlAssertRpm --all - rlRun "TmpDir=\$(mktemp -d)" - rlRun "pushd $TmpDir" - rlFetchSrcForInstalled $PACKAGE - rlRun "useradd -M -N $BUILD_USER" 0,9 - [ "$?" == "0" ] && rlRun "del=yes" - rlRun "chown -R $BUILD_USER:users $TmpDir" - rlPhaseEnd - - rlPhaseStartSetup "build libpfm" - rlRun "rpm -D \"_topdir $TmpDir\" -U *.src.rpm" - rlRun "yum-builddep -y $TmpDir/SPECS/*.spec" - rlRun "su -c 'rpmbuild -D \"_topdir $TmpDir\" -bp $TmpDir/SPECS/*.spec &>$TmpDir/rpmbuild.log' $BUILD_USER" - rlRun "rlFileSubmit $TmpDir/rpmbuild.log" - rlRun "cd \"$TmpDir\"/BUILD/libpfm-*-build/libpfm-*/tests 2>/dev/null || cd \"$TmpDir\"/BUILD/libpfm-*/tests" - rlRun "su -c 'make PFMLIB=`rpm -ql libpfm | grep .so | head -n 1`' $BUILD_USER" - rlRun "ldd validate | tee $TmpDir/ldd.log" - rlRun "grep -q 'libpfm.so' $TmpDir/ldd.log" - rlPhaseEnd - - rlPhaseStartTest "run testsuite" - rlRun "su -c './validate &>$TmpDir/testsuite.log' $BUILD_USER" - rlRun "rlFileSubmit $TmpDir/testsuite.log" - rlPhaseEnd - - rlPhaseStartTest "evaluate results" - rlRun "cd $TmpDir" - rlRun "grep -q 'All tests passed' testsuite.log" - rlRun "tests_count=\$(grep -o -E '^\s*[0-9]+' testsuite.log | awk '{sum+=\$1} END {print sum}')" - [ "$tests_count" -ge "$TESTS_COUNT_MIN" ] && rlLogInfo "Test counter: $tests_count" || rlFail "Test counter $tests_count should be greater than or equal to $TESTS_COUNT_MIN" - rlPhaseEnd - - rlPhaseStartCleanup - rlRun "popd" - rlRun "rm -r $TmpDir" - [ "$del" == "yes" ] && rlRun "userdel -f $BUILD_USER" - rlPhaseEnd -rlJournalPrintText -rlJournalEnd