diff --git a/0001-Revert-efi_loader-install-device-tree-on-configurati.patch b/0001-Revert-efi_loader-install-device-tree-on-configurati.patch deleted file mode 100644 index 0cc6786..0000000 --- a/0001-Revert-efi_loader-install-device-tree-on-configurati.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 72a5b6b3cafc7d1f58f451c26eedfb678e54bd9f Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 7 Sep 2025 16:32:30 +0100 -Subject: [PATCH] Revert "efi_loader: install device-tree on configuration - table on every invocation" - -This reverts commit 7e624377e99314bdfac6cb5a3d216dff49a047e9. ---- - lib/efi_loader/efi_helper.c | 39 ++++++++++--------------------------- - 1 file changed, 10 insertions(+), 29 deletions(-) - -diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c -index 44b806aadc4..f211782389a 100644 ---- a/lib/efi_loader/efi_helper.c -+++ b/lib/efi_loader/efi_helper.c -@@ -456,30 +456,11 @@ efi_status_t efi_env_set_load_options(efi_handle_t handle, - */ - static efi_status_t copy_fdt(void **fdtp) - { -+ unsigned long fdt_pages; - efi_status_t ret = 0; - void *fdt, *new_fdt; -- static u64 new_fdt_addr; -- static efi_uintn_t fdt_pages; -- ulong fdt_size; -- -- /* -- * Remove the configuration table that might already be -- * installed, ignoring EFI_NOT_FOUND if no device-tree -- * is installed -- */ -- efi_install_configuration_table(&efi_guid_fdt, NULL); -- -- if (new_fdt_addr) { -- log_debug("%s: Found allocated memory at %#llx, with %#zx pages\n", -- __func__, new_fdt_addr, fdt_pages); -- -- ret = efi_free_pages(new_fdt_addr, fdt_pages); -- if (ret != EFI_SUCCESS) -- log_err("Unable to free up existing FDT memory region\n"); -- -- new_fdt_addr = 0; -- fdt_pages = 0; -- } -+ u64 new_fdt_addr; -+ uint fdt_size; - - /* - * Give us at least 12 KiB of breathing room in case the device tree -@@ -494,18 +475,15 @@ static efi_status_t copy_fdt(void **fdtp) - &new_fdt_addr); - if (ret != EFI_SUCCESS) { - log_err("Failed to reserve space for FDT\n"); -- return ret; -+ goto done; - } -- log_debug("%s: Allocated memory at %#llx, with %#zx pages\n", -- __func__, new_fdt_addr, fdt_pages); -- - new_fdt = (void *)(uintptr_t)new_fdt_addr; - memcpy(new_fdt, fdt, fdt_totalsize(fdt)); - fdt_set_totalsize(new_fdt, fdt_size); - -- *fdtp = new_fdt; -- -- return EFI_SUCCESS; -+ *fdtp = (void *)(uintptr_t)new_fdt_addr; -+done: -+ return ret; - } - - /** -@@ -558,6 +536,9 @@ efi_status_t efi_install_fdt(void *fdt) - const char *fdt_opt; - uintptr_t fdt_addr; - -+ /* Look for device tree that is already installed */ -+ if (efi_get_configuration_table(&efi_guid_fdt)) -+ return EFI_SUCCESS; - /* Check if there is a hardware device tree */ - fdt_opt = env_get("fdt_addr"); - /* Use our own device tree as fallback */ --- -2.51.0 - diff --git a/ARM-RPi5-Enable-PCIe.patch b/ARM-RPi5-Enable-PCIe.patch index f711dc4..f86ae64 100644 --- a/ARM-RPi5-Enable-PCIe.patch +++ b/ARM-RPi5-Enable-PCIe.patch @@ -1,9 +1,9 @@ -From patchwork Tue Apr 28 16:39:18 2026 +From patchwork Sat May 23 16:34:24 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229734 +X-Patchwork-Id: 2243363 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org @@ -16,17 +16,17 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mTf0XgQz1yHv - for ; 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Tue, 28 Apr 2026 18:39:22 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id B859684659 + for ; Sat, 23 May 2026 18:34:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id C5D4268C4E; Tue, 28 Apr 2026 18:39:18 +0200 (CEST) -Subject: [PATCH v2 1/9] ARM: bcm283x: Add bcm2712 PCIe memory window + id B4EE268BEB; Sat, 23 May 2026 18:34:24 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 1/9] ARM: bcm283x: Add bcm2712 PCIe memory window To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -64,11 +66,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163918.C5D4268C4E@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:18 +0200 (CEST) +Message-Id: <20260523163424.B4EE268BEB@verein.lst.de> +Date: Sat, 23 May 2026 18:34:24 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -94,6 +94,7 @@ works sufficiently well for a boot loader. Signed-off-by: Torsten Duwe Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato +Reviewed-by: Peter Robinson --- arch/arm/mach-bcm283x/init.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) @@ -127,35 +128,36 @@ index 7a1de22e0ae..7a2faaa4de6 100644 /* SoC bus */ .virt = 0x107c000000UL, -From patchwork Tue Apr 28 16:39:22 2026 +From patchwork Sat May 23 16:34:26 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229735 +X-Patchwork-Id: 2243364 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange x25519) + key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mTn1JZ7z1yHv - for ; Wed, 29 Apr 2026 02:43:41 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN75r2nngz1xx5 + for ; Sun, 24 May 2026 02:34:40 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 027E384669; - Tue, 28 Apr 2026 18:43:24 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 2890A848BF; + Sat, 23 May 2026 18:34:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id A0642845D8; Tue, 28 Apr 2026 18:39:29 +0200 (CEST) + id 3969B848F3; Sat, 23 May 2026 18:34:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -164,14 +166,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 3B7B4842C7 - for ; Tue, 28 Apr 2026 18:39:25 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id C0D4A84659 + for ; Sat, 23 May 2026 18:34:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 977E668CFE; Tue, 28 Apr 2026 18:39:22 +0200 (CEST) -Subject: [PATCH v2 2/9] pci: brcmstb: Fix PCIe bus numbers + id BDC5168C7B; Sat, 23 May 2026 18:34:26 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 2/9] pci: brcmstb: Fix PCIe bus numbers To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -193,11 +197,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163922.977E668CFE@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:22 +0200 (CEST) +Message-Id: <20260523163426.BDC5168C7B@verein.lst.de> +Date: Sat, 23 May 2026 18:34:26 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -228,6 +230,7 @@ subtracting the base bus number. Signed-off-by: Andrea della Porta Signed-off-by: Torsten Duwe Tested-by: Pedro Falcato +Reviewed-by: Peter Robinson --- drivers/pci/pcie_brcmstb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -246,36 +249,35 @@ index f089c48f028..47c0802df23 100644 unsigned int pci_func = PCI_FUNC(bdf); int idx; -From patchwork Tue Apr 28 16:39:25 2026 +From patchwork Sat May 23 16:34:28 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229737 +X-Patchwork-Id: 2243366 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mTx6XSTz1yHv - for ; Wed, 29 Apr 2026 02:43:49 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN7614lMDz1xx5 + for ; Sun, 24 May 2026 02:34:49 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 3A10E84674; - Tue, 28 Apr 2026 18:43:24 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 63143848A4; + Sat, 23 May 2026 18:34:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 615EF845E3; Tue, 28 Apr 2026 18:39:32 +0200 (CEST) + id 99621848A4; Sat, 23 May 2026 18:34:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -284,14 +286,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id C130184605 - for ; Tue, 28 Apr 2026 18:39:27 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 8BD35848B6 + for ; Sat, 23 May 2026 18:34:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 6DF1968D07; Tue, 28 Apr 2026 18:39:25 +0200 (CEST) -Subject: [PATCH v2 3/9] pci: brcmstb: Support different variants using a cfg + id C612768D05; Sat, 23 May 2026 18:34:28 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 3/9] pci: brcmstb: Support different variants using a cfg struct To: Peter Robinson , Matthias Brugger @@ -314,11 +318,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163925.6DF1968D07@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:25 +0200 (CEST) +Message-Id: <20260523163428.C612768D05@verein.lst.de> +Date: Sat, 23 May 2026 18:34:28 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -342,20 +344,18 @@ variants when the bcm2712 was added (see e.g. linux commit 10dbedad3c818 which is the last in a longer set of changes). This patch brings in this required infrastructure and adds a differentiation between 2711 and 2712 register layouts on top. -It also accounts for the bcm2712 reset logic quirk that the software -init bit must not remain set, albeit the reset control location is -only corrected in patch#6 of this series. Signed-off-by: Torsten Duwe Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato +Reviewed-by: Neil Armstrong --- - .../mach-bcm283x/include/mach/acpi/bcm2711.h | 6 +- - drivers/pci/pcie_brcmstb.c | 122 ++++++++++++++++-- - 2 files changed, 114 insertions(+), 14 deletions(-) + .../mach-bcm283x/include/mach/acpi/bcm2711.h | 5 + + drivers/pci/pcie_brcmstb.c | 104 ++++++++++++++++-- + 2 files changed, 99 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h b/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h -index a86875b1833..6eb5389b858 100644 +index a86875b1833..5171c593c72 100644 --- a/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h +++ b/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h @@ -70,6 +70,7 @@ @@ -366,11 +366,10 @@ index a86875b1833..6eb5389b858 100644 #define PCIE_MISC_PCIE_STATUS 0x4068 #define STATUS_PCIE_PORT_MASK 0x80 #define STATUS_PCIE_PORT_SHIFT 7 -@@ -107,7 +108,10 @@ - #define PCIE_MSI_INTR2_MASK_SET 0x4510 +@@ -108,6 +109,10 @@ #define PCIE_RGR1_SW_INIT_1 0x9210 --#define PCIE_EXT_CFG_INDEX 0x9000 + #define PCIE_EXT_CFG_INDEX 0x9000 +#define RGR1_SW_INIT_1_PERST_MASK 0x1 +#define RGR1_SW_INIT_1_PERSTB_MASK 0x4 +#define RGR1_SW_INIT_1_INIT_MASK 0x2 @@ -379,17 +378,15 @@ index a86875b1833..6eb5389b858 100644 #define PCIE_EXT_CFG_DATA 0x8000 diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index 47c0802df23..261f8790528 100644 +index 47c0802df23..5cb39dfd136 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c -@@ -49,6 +49,28 @@ +@@ -49,6 +49,24 @@ #define SSC_STATUS_PLL_LOCK_MASK 0x800 #define SSC_STATUS_PLL_LOCK_SHIFT 11 +enum { + RGR1_SW_INIT_1, -+ EXT_CFG_INDEX, -+ EXT_CFG_DATA, + PCIE_HARD_DEBUG, +}; + @@ -404,14 +401,12 @@ index 47c0802df23..261f8790528 100644 + const int *offsets; + const enum brcm_pcie_type type; + void (*perst_set)(struct brcm_pcie *pcie, u32 val); -+ void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); -+ bool (*rc_mode)(struct brcm_pcie *pcie); +}; + /** * struct brcm_pcie - the PCIe controller state * @base: Base address of memory mapped IO registers of the controller -@@ -61,6 +83,7 @@ struct brcm_pcie { +@@ -61,6 +79,7 @@ struct brcm_pcie { int gen; bool ssc; @@ -419,7 +414,7 @@ index 47c0802df23..261f8790528 100644 }; /** -@@ -104,6 +127,36 @@ static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) +@@ -104,6 +123,36 @@ static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT; } @@ -443,7 +438,7 @@ index 47c0802df23..261f8790528 100644 + writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL); +} + -+static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) ++static void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) +{ + if (val) + setbits_le32(pcie->base + pcie->pcie_cfg->offsets[RGR1_SW_INIT_1], @@ -456,42 +451,31 @@ index 47c0802df23..261f8790528 100644 /** * brcm_pcie_link_up() - Check whether the PCIe link is up * @pcie: Pointer to the PCIe controller state -@@ -150,8 +203,8 @@ static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf, - /* For devices, write to the config space index register */ - idx = PCIE_ECAM_OFFSET(pci_bus, pci_dev, pci_func, 0); - -- writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); -- *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset; -+ writel(idx, pcie->base + pcie->pcie_cfg->offsets[EXT_CFG_INDEX]); -+ *paddress = pcie->base + pcie->pcie_cfg->offsets[EXT_CFG_DATA] + offset; - - return 0; - } -@@ -365,8 +418,9 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -365,8 +414,9 @@ static int brcm_pcie_probe(struct udevice *dev) * e.g. BCM7278, the fundamental reset should not be asserted here. * This will need to be changed when support for other SoCs is added. */ - setbits_le32(base + PCIE_RGR1_SW_INIT_1, - PCIE_RGR1_SW_INIT_1_INIT_MASK | PCIE_RGR1_SW_INIT_1_PERST_MASK); -+ pcie->pcie_cfg->bridge_sw_init_set(pcie, 1); ++ brcm_pcie_bridge_sw_init_set(pcie, 1); + if (pcie->pcie_cfg->type != BCM2712) + pcie->pcie_cfg->perst_set(pcie, 1); /* * The delay is a safety precaution to preclude the reset signal * from looking like a glitch. -@@ -374,9 +428,9 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -374,9 +424,9 @@ static int brcm_pcie_probe(struct udevice *dev) udelay(100); /* Take the bridge out of reset */ - clrbits_le32(base + PCIE_RGR1_SW_INIT_1, PCIE_RGR1_SW_INIT_1_INIT_MASK); -+ pcie->pcie_cfg->bridge_sw_init_set(pcie, 0); ++ brcm_pcie_bridge_sw_init_set(pcie, 0); - clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, + clrbits_le32(base + pcie->pcie_cfg->offsets[PCIE_HARD_DEBUG], PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); /* Wait for SerDes to be stable */ -@@ -426,8 +480,7 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -426,8 +476,7 @@ static int brcm_pcie_probe(struct udevice *dev) brcm_pcie_set_gen(pcie, pcie->gen); /* Unassert the fundamental reset */ @@ -501,16 +485,7 @@ index 47c0802df23..261f8790528 100644 /* * Wait for 100ms after PERST# deassertion; see PCIe CEM specification -@@ -446,7 +499,7 @@ static int brcm_pcie_probe(struct udevice *dev) - return -EINVAL; - } - -- if (!brcm_pcie_rc_mode(pcie)) { -+ if (!pcie->pcie_cfg->rc_mode(pcie)) { - printf("PCIe misconfigured; is in EP mode\n"); - return -EINVAL; - } -@@ -514,14 +567,25 @@ static int brcm_pcie_remove(struct udevice *dev) +@@ -514,14 +563,25 @@ static int brcm_pcie_remove(struct udevice *dev) void __iomem *base = pcie->base; /* Assert fundamental reset */ @@ -525,7 +500,7 @@ index 47c0802df23..261f8790528 100644 /* Shutdown bridge */ - setbits_le32(base + PCIE_RGR1_SW_INIT_1, PCIE_RGR1_SW_INIT_1_INIT_MASK); -+ pcie->pcie_cfg->bridge_sw_init_set(pcie, 1); ++ brcm_pcie_bridge_sw_init_set(pcie, 1); + + /* + * For the controllers that are utilizing reset for bridge Sw init, @@ -535,11 +510,11 @@ index 47c0802df23..261f8790528 100644 + * and start accessing device memory. + */ + if (pcie->pcie_cfg->type == BCM2712) -+ pcie->pcie_cfg->bridge_sw_init_set(pcie, 0); ++ brcm_pcie_bridge_sw_init_set(pcie, 0); return 0; } -@@ -546,6 +610,7 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) +@@ -546,6 +606,7 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) else pcie->gen = max_link_speed; @@ -547,14 +522,12 @@ index 47c0802df23..261f8790528 100644 return 0; } -@@ -554,8 +619,39 @@ static const struct dm_pci_ops brcm_pcie_ops = { +@@ -554,8 +615,31 @@ static const struct dm_pci_ops brcm_pcie_ops = { .write_config = brcm_pcie_write_config, }; +static const int pcie_offsets[] = { + [RGR1_SW_INIT_1] = 0x9210, -+ [EXT_CFG_INDEX] = 0x9000, -+ [EXT_CFG_DATA] = 0x8000, + [PCIE_HARD_DEBUG] = 0x4204, +}; + @@ -562,14 +535,10 @@ index 47c0802df23..261f8790528 100644 + .offsets = pcie_offsets, + .type = BCM2711, + .perst_set = brcm_pcie_perst_set_generic, -+ .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, -+ .rc_mode = brcm_pcie_rc_mode, +}; + +static const int pcie_offsets_bcm2712[] = { + [RGR1_SW_INIT_1] = 0x0, -+ [EXT_CFG_INDEX] = 0x9000, -+ [EXT_CFG_DATA] = 0x8000, + [PCIE_HARD_DEBUG] = 0x4304, +}; + @@ -577,8 +546,6 @@ index 47c0802df23..261f8790528 100644 + .offsets = pcie_offsets_bcm2712, + .type = BCM2712, + .perst_set = brcm_pcie_perst_set_2712, -+ .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, -+ .rc_mode = brcm_pcie_rc_mode, +}; + static const struct udevice_id brcm_pcie_ids[] = { @@ -589,12 +556,12 @@ index 47c0802df23..261f8790528 100644 }; -From patchwork Tue Apr 28 16:39:29 2026 +From patchwork Sat May 23 16:34:30 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229738 +X-Patchwork-Id: 2243367 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org @@ -608,17 +575,17 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mV66Q8Wz1yHv - for ; Wed, 29 Apr 2026 02:43:58 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN76L65v2z1xx5 + for ; Sun, 24 May 2026 02:35:06 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 753C58467E; - Tue, 28 Apr 2026 18:43:24 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 896D584932; + Sat, 23 May 2026 18:34:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; 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Tue, 28 Apr 2026 18:39:29 +0200 (CEST) -Subject: [PATCH v2 4/9] pci: brcmstb: Add RPi5 reset facilities + id DA8E768D09; Sat, 23 May 2026 18:34:30 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 4/9] reset: Add RPi5 brcmstb reset facilities To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -656,11 +625,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163929.3501268D0D@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:29 +0200 (CEST) +Message-Id: <20260523163430.DA8E768D09@verein.lst.de> +Date: Sat, 23 May 2026 18:34:30 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -687,10 +654,10 @@ Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato --- configs/rpi_arm64_defconfig | 1 + - drivers/reset/Kconfig | 7 +++ + drivers/reset/Kconfig | 8 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-brcmstb.c | 97 +++++++++++++++++++++++++++++++++++ - 4 files changed, 106 insertions(+) + 4 files changed, 107 insertions(+) create mode 100644 drivers/reset/reset-brcmstb.c diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig @@ -706,14 +673,15 @@ index 69e8e72c5d7..153d7ed301e 100644 CONFIG_RNG_IPROC200=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig -index 66911199c8b..e0561df8058 100644 +index 2fd91d6299c..8f4c9e29baa 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig -@@ -64,6 +64,13 @@ config RESET_BCM6345 +@@ -64,6 +64,14 @@ config RESET_BCM6345 help Support reset controller on BCM6345. +config RESET_BRCMSTB ++ depends on ARCH_BCM283X + bool "Generic Reset controller driver for Broadcom" + help + This enables reset controller for Broadcom devices. @@ -724,7 +692,7 @@ index 66911199c8b..e0561df8058 100644 bool "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile -index 088545c6473..ad5fe6b6184 100644 +index ee5b009d134..ebf3d7425a4 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_RESET_AIROHA) += reset-airoha.o @@ -839,12 +807,12 @@ index 00000000000..7861f7c9baf + .priv_auto = sizeof(struct brcmstb_reset), +}; -From patchwork Tue Apr 28 16:39:32 2026 +From patchwork Sat May 23 16:34:33 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229739 +X-Patchwork-Id: 2243368 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org @@ -858,17 +826,17 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mVK2R1cz1yHv - for ; Wed, 29 Apr 2026 02:44:09 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN76Y28Xyz1xx5 + for ; Sun, 24 May 2026 02:35:17 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id AF8D884686; - Tue, 28 Apr 2026 18:43:24 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id C8E4B8493F; + Sat, 23 May 2026 18:34:39 +0200 (CEST) Authentication-Results: phobos.denx.de; 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spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 5540868D0F; Tue, 28 Apr 2026 18:39:32 +0200 (CEST) -Subject: [PATCH v2 5/9] pci: brcmstb: Add RPi5 rescal reset facilities + id 3B46568D0D; Sat, 23 May 2026 18:34:33 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 5/9] reset: Add RPi5 rescal reset facilities To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -906,11 +876,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163932.5540868D0F@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:32 +0200 (CEST) +Message-Id: <20260523163433.3B46568D0D@verein.lst.de> +Date: Sat, 23 May 2026 18:34:33 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -937,10 +905,10 @@ Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato --- configs/rpi_arm64_defconfig | 1 + - drivers/reset/Kconfig | 7 ++ + drivers/reset/Kconfig | 8 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-brcmstb-rescal.c | 103 +++++++++++++++++++++++++++ - 4 files changed, 112 insertions(+) + 4 files changed, 113 insertions(+) create mode 100644 drivers/reset/reset-brcmstb-rescal.c diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig @@ -956,14 +924,15 @@ index 153d7ed301e..38af5029403 100644 CONFIG_RNG_IPROC200=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig -index e0561df8058..b4237bf98bf 100644 +index 8f4c9e29baa..e6c23368428 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig -@@ -71,6 +71,13 @@ config RESET_BRCMSTB +@@ -72,6 +72,14 @@ config RESET_BRCMSTB If you wish to use reset resources managed by the Broadcom Reset Controller, say Y here. Otherwise, say N. +config RESET_BRCMSTB_RESCAL ++ depends on ARCH_BCM283X + bool "Generic Rescal Reset controller driver for Broadcom" + help + Support rescal reset controller on Broadcom. @@ -974,7 +943,7 @@ index e0561df8058..b4237bf98bf 100644 bool "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile -index ad5fe6b6184..c369bdb3d6c 100644 +index ebf3d7425a4..c7a9da3268d 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o @@ -1095,35 +1064,36 @@ index 00000000000..fc8fcfa8b3f + .priv_auto = sizeof(struct brcm_rescal_reset), +}; -From patchwork Tue Apr 28 16:39:36 2026 +From patchwork Sat May 23 16:34:35 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229740 +X-Patchwork-Id: 2243369 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mVT5K55z1yHv - for ; Wed, 29 Apr 2026 02:44:17 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN76l00M8z1xx5 + for ; Sun, 24 May 2026 02:35:26 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id E33338468B; - Tue, 28 Apr 2026 18:43:24 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 100FA84922; + Sat, 23 May 2026 18:34:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 2414F845D8; Tue, 28 Apr 2026 18:39:40 +0200 (CEST) + id 4B5048493E; Sat, 23 May 2026 18:34:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -1132,14 +1102,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 2F86E845E3 - for ; Tue, 28 Apr 2026 18:39:38 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 4D28084927 + for ; Sat, 23 May 2026 18:34:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 7987968D09; Tue, 28 Apr 2026 18:39:36 +0200 (CEST) -Subject: [PATCH v2 6/9] pci: brcmstb: Get and use bridge and rescal reset + id E58D768D12; Sat, 23 May 2026 18:34:35 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 6/9] pci: brcmstb: Get and use bridge and rescal reset properties To: Peter Robinson , Matthias Brugger @@ -1162,11 +1134,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163936.7987968D09@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:36 +0200 (CEST) +Message-Id: <20260523163435.E58D768D12@verein.lst.de> +Date: Sat, 23 May 2026 18:34:35 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -1191,12 +1161,13 @@ them if so. Signed-off-by: Torsten Duwe Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato +Reviewed-by: Neil Armstrong --- - drivers/pci/pcie_brcmstb.c | 51 +++++++++++++++++++++++++++++++++++++- - 1 file changed, 50 insertions(+), 1 deletion(-) + drivers/pci/pcie_brcmstb.c | 70 +++++++++++++++++++++++++++++++++++--- + 1 file changed, 65 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index 261f8790528..1f97cda5cc7 100644 +index 5cb39dfd136..4d253440de9 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c @@ -21,6 +21,7 @@ @@ -1207,7 +1178,7 @@ index 261f8790528..1f97cda5cc7 100644 /* PCIe parameters */ #define BRCM_NUM_PCIE_OUT_WINS 4 -@@ -83,6 +84,8 @@ struct brcm_pcie { +@@ -79,6 +80,8 @@ struct brcm_pcie { int gen; bool ssc; @@ -1216,29 +1187,30 @@ index 261f8790528..1f97cda5cc7 100644 const struct brcm_pcie_cfg_data *pcie_cfg; }; -@@ -147,6 +150,34 @@ static void brcm_pcie_perst_set_2712(struct brcm_pcie *pcie, u32 val) +@@ -143,14 +146,57 @@ static void brcm_pcie_perst_set_2712(struct brcm_pcie *pcie, u32 val) writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL); } -+static void brcm_pcie_get_resets_dt(struct udevice *dev) -+{ +-static void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) ++static int brcm_pcie_get_resets_dt(struct udevice *dev) + { + struct brcm_pcie *pcie = dev_get_priv(dev); + int ret; + + ret = reset_get_by_name(dev, "rescal", &pcie->rescal); + if (ret) { + printf("Unable to get rescal reset\n"); -+ return; ++ return ret; + } + + ret = reset_get_by_name(dev, "bridge", &pcie->bridge_reset); + if (ret) { + printf("Unable to get bridge reset\n"); -+ return; + } ++ return ret; +} + -+static void brcm_pcie_do_reset(struct udevice *dev) ++static int brcm_pcie_do_reset(struct udevice *dev) +{ + struct brcm_pcie *pcie = dev_get_priv(dev); + int ret; @@ -1246,27 +1218,40 @@ index 261f8790528..1f97cda5cc7 100644 + ret = reset_deassert(&pcie->rescal); + if (ret) + printf("failed to deassert 'rescal'\n"); ++ return ret; +} + - static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) - { ++static int brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) ++{ ++ int ret = 0; ++ ++ if (pcie->bridge_reset.dev) ++ { ++ if (val) ++ ret = reset_assert(&pcie->bridge_reset); ++ else ++ ret = reset_deassert(&pcie->bridge_reset); ++ if (ret) ++ log_err("failed to %sassert bridge reset, err=%d\n", ++ val ? "" : "de", ret); ++ return ret; ++ } if (val) -@@ -157,6 +188,14 @@ static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val + setbits_le32(pcie->base + pcie->pcie_cfg->offsets[RGR1_SW_INIT_1], RGR1_SW_INIT_1_INIT_MASK); + else + clrbits_le32(pcie->base + pcie->pcie_cfg->offsets[RGR1_SW_INIT_1], + RGR1_SW_INIT_1_INIT_MASK); ++ return ret; } -+static void brcm_pcie_bridge_sw_init_set_2712(struct brcm_pcie *pcie, u32 val) -+{ -+ if (val) -+ reset_assert(&pcie->bridge_reset); -+ else -+ reset_deassert(&pcie->bridge_reset); -+} -+ /** - * brcm_pcie_link_up() - Check whether the PCIe link is up - * @pcie: Pointer to the PCIe controller state -@@ -413,6 +452,12 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -405,16 +451,25 @@ static int brcm_pcie_probe(struct udevice *dev) + int num_out_wins = 0; + u64 rc_bar2_offset, rc_bar2_size; + unsigned int scb_size_val; +- int i, ret; ++ int i, ret = 0; u16 nlw, cls, lnksta; u32 tmp; @@ -1274,38 +1259,51 @@ index 261f8790528..1f97cda5cc7 100644 + * Ensure rescal reset for BCM2712 is really disabled. + */ + if (pcie->pcie_cfg->type == BCM2712) -+ brcm_pcie_do_reset(dev); -+ ++ ret = brcm_pcie_do_reset(dev); ++ if (ret) ++ return ret; /* * Reset the bridge, assert the fundamental reset. Note for some SoCs, * e.g. BCM7278, the fundamental reset should not be asserted here. -@@ -611,6 +656,10 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) + * This will need to be changed when support for other SoCs is added. + */ +- brcm_pcie_bridge_sw_init_set(pcie, 1); ++ ret = brcm_pcie_bridge_sw_init_set(pcie, 1); ++ if (ret) ++ return ret; + if (pcie->pcie_cfg->type != BCM2712) + pcie->pcie_cfg->perst_set(pcie, 1); + /* +@@ -424,8 +479,9 @@ static int brcm_pcie_probe(struct udevice *dev) + udelay(100); + + /* Take the bridge out of reset */ +- brcm_pcie_bridge_sw_init_set(pcie, 0); +- ++ ret = brcm_pcie_bridge_sw_init_set(pcie, 0); ++ if (ret) ++ return ret; + clrbits_le32(base + pcie->pcie_cfg->offsets[PCIE_HARD_DEBUG], + PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); + +@@ -607,6 +663,10 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) pcie->gen = max_link_speed; pcie->pcie_cfg = (const struct brcm_pcie_cfg_data *)dev_get_driver_data(dev); + + if (pcie->pcie_cfg->type == BCM2712) -+ brcm_pcie_get_resets_dt(dev); ++ return brcm_pcie_get_resets_dt(dev); + return 0; } -@@ -645,7 +694,7 @@ static const struct brcm_pcie_cfg_data bcm2712_cfg = { - .offsets = pcie_offsets_bcm2712, - .type = BCM2712, - .perst_set = brcm_pcie_perst_set_2712, -- .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, -+ .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_2712, - .rc_mode = brcm_pcie_rc_mode, - }; - -From patchwork Tue Apr 28 16:39:40 2026 +From patchwork Sat May 23 16:34:38 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229741 +X-Patchwork-Id: 2243370 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org @@ -1319,17 +1317,17 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mVg1Q52z1yHv - for ; Wed, 29 Apr 2026 02:44:27 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN76w469Wz1xx5 + for ; Sun, 24 May 2026 02:35:36 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 25FEE84692; - Tue, 28 Apr 2026 18:43:25 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 4BA1184946; + Sat, 23 May 2026 18:34:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 47298845E3; Tue, 28 Apr 2026 18:39:44 +0200 (CEST) + id 7A0F284912; Sat, 23 May 2026 18:34:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -1338,14 +1336,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 7774B84612 - for ; Tue, 28 Apr 2026 18:39:42 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id A63948493E + for ; Sat, 23 May 2026 18:34:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id CE7CB68D0A; Tue, 28 Apr 2026 18:39:40 +0200 (CEST) -Subject: [PATCH v2 7/9] pci: brcmstb: Fix iBAR size calculation + id 6EF7568C4E; Sat, 23 May 2026 18:34:38 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 7/9] pci: brcmstb: Fix iBAR size calculation To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -1367,11 +1367,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163940.CE7CB68D0A@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:40 +0200 (CEST) +Message-Id: <20260523163438.6EF7568C4E@verein.lst.de> +Date: Sat, 23 May 2026 18:34:38 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -1394,15 +1392,16 @@ Fix inbound window size calculation, like Linux commit 25a98c7270156. Signed-off-by: Torsten Duwe Tested-by: Pedro Falcato +Reviewed-by: Neil Armstrong --- drivers/pci/pcie_brcmstb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index 1f97cda5cc7..8a25fb04563 100644 +index 4d253440de9..1022f275dc8 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c -@@ -105,8 +105,8 @@ static int brcm_pcie_encode_ibar_size(u64 size) +@@ -101,8 +101,8 @@ static int brcm_pcie_encode_ibar_size(u64 size) if (log2_in >= 12 && log2_in <= 15) /* Covers 4KB to 32KB (inclusive) */ return (log2_in - 12) + 0x1c; @@ -1414,36 +1413,35 @@ index 1f97cda5cc7..8a25fb04563 100644 /* Something is awry so disable */ -From patchwork Tue Apr 28 16:39:46 2026 +From patchwork Sat May 23 16:34:40 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229742 +X-Patchwork-Id: 2243371 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mVr1fFhz1yHv - for ; Wed, 29 Apr 2026 02:44:36 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN7764HYQz1xx5 + for ; Sun, 24 May 2026 02:35:46 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 5B6528469E; - Tue, 28 Apr 2026 18:43:25 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id CC5608494B; + Sat, 23 May 2026 18:34:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 0F3038464E; Tue, 28 Apr 2026 18:39:50 +0200 (CEST) + id 5BDB084912; Sat, 23 May 2026 18:34:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -1452,14 +1450,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id F29FE8460E - for ; Tue, 28 Apr 2026 18:39:47 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 1783D84931 + for ; Sat, 23 May 2026 18:34:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 42D4368D12; Tue, 28 Apr 2026 18:39:46 +0200 (CEST) -Subject: [PATCH v2 8/9] pci: brcmstb: rework iBAR handling + id A928768CFE; Sat, 23 May 2026 18:34:40 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 8/9] pci: brcmstb: rework iBAR handling To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -1481,11 +1481,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163946.42D4368D12@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:46 +0200 (CEST) +Message-Id: <20260523163440.A928768CFE@verein.lst.de> +Date: Sat, 23 May 2026 18:34:40 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -1514,12 +1512,13 @@ in one go, so the code is not 1:1 comparable. Signed-off-by: Torsten Duwe Tested-by: Pedro Falcato +Reviewed-by: Neil Armstrong --- drivers/pci/pcie_brcmstb.c | 150 ++++++++++++++++++++++++++++++++----- 1 file changed, 131 insertions(+), 19 deletions(-) diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index 8a25fb04563..05b80a45b50 100644 +index 1022f275dc8..74d6f2564c2 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c @@ -50,6 +50,29 @@ @@ -1551,8 +1550,8 @@ index 8a25fb04563..05b80a45b50 100644 + enum { RGR1_SW_INIT_1, - EXT_CFG_INDEX, -@@ -437,17 +460,105 @@ static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, + PCIE_HARD_DEBUG, +@@ -440,17 +463,105 @@ static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win)); } @@ -1658,10 +1657,10 @@ index 8a25fb04563..05b80a45b50 100644 int num_out_wins = 0; - u64 rc_bar2_offset, rc_bar2_size; - unsigned int scb_size_val; - int i, ret; + int i, ret = 0; u16 nlw, cls, lnksta; u32 tmp; -@@ -488,23 +599,22 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -495,23 +606,22 @@ static int brcm_pcie_probe(struct udevice *dev) MISC_CTRL_CFG_READ_UR_MODE_MASK | MISC_CTRL_MAX_BURST_SIZE_128); @@ -1700,7 +1699,7 @@ index 8a25fb04563..05b80a45b50 100644 writel(tmp, base + PCIE_MISC_MISC_CTRL); /* Disable the PCIe->GISB memory window (RC_BAR1) */ -@@ -521,6 +631,8 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -528,6 +638,8 @@ static int brcm_pcie_probe(struct udevice *dev) /* Clear any interrupts we find on boot */ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR); @@ -1710,12 +1709,12 @@ index 8a25fb04563..05b80a45b50 100644 brcm_pcie_set_gen(pcie, pcie->gen); -From patchwork Tue Apr 28 16:39:50 2026 +From patchwork Sat May 23 16:34:43 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2229743 +X-Patchwork-Id: 2243372 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org @@ -1728,17 +1727,17 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mW16n64z1yHv - for ; Wed, 29 Apr 2026 02:44:45 +1000 (AEST) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4gN77J1wL6z1xx5 + for ; Sun, 24 May 2026 02:35:56 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 8FC1D846A2; - Tue, 28 Apr 2026 18:43:25 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 14D8F8493A; + Sat, 23 May 2026 18:34:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 3186A84656; Tue, 28 Apr 2026 18:39:54 +0200 (CEST) + id 2F22B8493A; Sat, 23 May 2026 18:34:47 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, @@ -1747,14 +1746,16 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 3CC6284612 - for ; Tue, 28 Apr 2026 18:39:52 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id DEF5D84912 + for ; Sat, 23 May 2026 18:34:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=lst.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de Received: by verein.lst.de (Postfix, from userid 2005) - id 9BB2668D09; Tue, 28 Apr 2026 18:39:50 +0200 (CEST) -Subject: [PATCH v2 9/9] pci: brcmstb: Adapt to AXI bridge + id 8B3CA68D0A; Sat, 23 May 2026 18:34:43 +0200 (CEST) +In-Reply-To: <20260523163239.8EEA768BEB@verein.lst.de> +References: <20260523163239.8EEA768BEB@verein.lst.de> +Subject: [PATCH v4 9/9] pci: brcmstb: Adapt to AXI bridge To: Peter Robinson , Matthias Brugger Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= @@ -1776,11 +1777,9 @@ Cc: =?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?= =?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?= =?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?= =?unknown-8bit?q?=2Ede?= -In-Reply-To: <20260428162319.99B4268B05@verein.lst.de> -Message-Id: <20260428163950.9BB2668D09@verein.lst.de> -Date: Tue, 28 Apr 2026 18:39:50 +0200 (CEST) +Message-Id: <20260523163443.8B3CA68D0A@verein.lst.de> +Date: Sat, 23 May 2026 18:34:43 +0200 (CEST) From: duwe@lst.de (Torsten Duwe) -X-Mailman-Approved-At: Tue, 28 Apr 2026 18:43:21 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list @@ -1807,13 +1806,14 @@ branch. All reworked for the simpler setup code in U-Boot. Signed-off-by: Torsten Duwe Co-authored-by: Oleksii Moisieiev Tested-by: Pedro Falcato +Reviewed-by: Neil Armstrong --- .../mach-bcm283x/include/mach/acpi/bcm2711.h | 1 + drivers/pci/pcie_brcmstb.c | 64 ++++++++++++++++++- 2 files changed, 64 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h b/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h -index 6eb5389b858..869482eaffe 100644 +index 5171c593c72..c72b47e1b10 100644 --- a/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h +++ b/arch/arm/mach-bcm283x/include/mach/acpi/bcm2711.h @@ -54,6 +54,7 @@ @@ -1825,10 +1825,10 @@ index 6eb5389b858..869482eaffe 100644 #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index 05b80a45b50..f0b0f1cc117 100644 +index 74d6f2564c2..a14efa31734 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c -@@ -551,6 +551,30 @@ static void brcm_pcie_set_inbound_windows(struct udevice *dev) +@@ -554,6 +554,30 @@ static void brcm_pcie_set_inbound_windows(struct udevice *dev) } } @@ -1859,7 +1859,7 @@ index 05b80a45b50..f0b0f1cc117 100644 static int brcm_pcie_probe(struct udevice *dev) { struct udevice *ctlr = pci_get_controller(dev); -@@ -592,12 +616,27 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -599,12 +623,27 @@ static int brcm_pcie_probe(struct udevice *dev) /* Wait for SerDes to be stable */ udelay(100); @@ -1888,7 +1888,7 @@ index 05b80a45b50..f0b0f1cc117 100644 tmp = readl(base + PCIE_MISC_MISC_CTRL); if (pcie->pcie_cfg->type == BCM2712) { -@@ -617,6 +656,29 @@ static int brcm_pcie_probe(struct udevice *dev) +@@ -624,6 +663,29 @@ static int brcm_pcie_probe(struct udevice *dev) } writel(tmp, base + PCIE_MISC_MISC_CTRL); diff --git a/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch b/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch new file mode 100644 index 0000000..48bad44 --- /dev/null +++ b/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch @@ -0,0 +1,215 @@ +From 06179e084181cbbc1e20121dc525621b77733bbc Mon Sep 17 00:00:00 2001 +From: Torsten Duwe +Date: Fri, 8 May 2026 17:42:39 +0200 +Subject: [PATCH 1/3] core: Skip parent device nodes without a DT reference + when looking for dma-ranges + +If a device node got created dynamically, there is no guarantee that the +parent node has an associated device tree node which could specify dma +constraints. Especially PCI(e) enumeration adds intermediate "bus nodes", +also dynamically. + +Try harder to find the correct configuration by walking up the tree until +a DT association is found. + +Suggested-by: Neil Armstrong +Signed-off-by: Torsten Duwe +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson +--- + drivers/core/device.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/core/device.c b/drivers/core/device.c +index d365204ba11..b6d00cf4714 100644 +--- a/drivers/core/device.c ++++ b/drivers/core/device.c +@@ -459,7 +459,19 @@ static int device_get_dma_constraints(struct udevice *dev) + u64 size = 0; + int ret; + +- if (!CONFIG_IS_ENABLED(DM_DMA) || !parent || !dev_has_ofnode(parent)) ++ if (!CONFIG_IS_ENABLED(DM_DMA) || !parent) ++ return 0; ++ ++ /* Look for the first node in the parent chain */ ++ while (parent) { ++ if (dev_has_ofnode(parent)) ++ break; ++ ++ parent = dev_get_parent(parent); ++ } ++ ++ /* No parents have a node, bail out */ ++ if (!parent) + return 0; + + /* +-- +2.54.0 + +From 38978e38c1246972a318479a1e833d66f06e41be Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 29 May 2026 13:38:27 +0100 +Subject: [PATCH 2/3] nvme: Fix missing address translation for PCIe inbound + access + +U-Boot currently does not account for PCIe bridges with a non-zero +inbound access offset when talking NVMe, it only works on platforms +where this offset happens to be zero. + +This patch enhances the NVMe driver with the ability to also handle +these cases. + +Signed-off-by: Torsten Duwe +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson +Signed-off-by: Peter Robinson +--- + drivers/nvme/nvme.c | 32 ++++++++++++++++++++------------ + 1 file changed, 20 insertions(+), 12 deletions(-) + +diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c +index 0631b190b97..713f2b0b713 100644 +--- a/drivers/nvme/nvme.c ++++ b/drivers/nvme/nvme.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -27,6 +28,13 @@ + #define IO_TIMEOUT 30 + #define MAX_PRP_POOL 512 + ++/* ++ * Convert a memory address to the value needed by the PCI device to ++ * access the given location, taking into account inbound window ++ * translations of PCI bridges: ++ */ ++#define DEV_ADDR(a) dev_phys_to_bus(dev->udev, (a)) ++ + static int nvme_wait_csts(struct nvme_dev *dev, u32 mask, u32 val) + { + int timeout; +@@ -91,8 +99,8 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, + i = 0; + while (nprps) { + if ((i == (prps_per_page - 1)) && nprps > 1) { +- *(prp_pool + i) = cpu_to_le64((ulong)prp_pool + +- page_size); ++ *(prp_pool + i) = cpu_to_le64(DEV_ADDR((ulong)prp_pool + ++ page_size)); + i = 0; + prp_pool = (u64 *)((uintptr_t)prp_pool + page_size); + } +@@ -396,8 +404,8 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) + dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; + + writel(aqa, &dev->bar->aqa); +- nvme_writeq((ulong)nvmeq->sq_cmds, &dev->bar->asq); +- nvme_writeq((ulong)nvmeq->cqes, &dev->bar->acq); ++ nvme_writeq(DEV_ADDR((ulong)nvmeq->sq_cmds), &dev->bar->asq); ++ nvme_writeq(DEV_ADDR((ulong)nvmeq->cqes), &dev->bar->acq); + + result = nvme_enable_ctrl(dev); + if (result) +@@ -423,7 +431,7 @@ static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid, + + memset(&c, 0, sizeof(c)); + c.create_cq.opcode = nvme_admin_create_cq; +- c.create_cq.prp1 = cpu_to_le64((ulong)nvmeq->cqes); ++ c.create_cq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->cqes)); + c.create_cq.cqid = cpu_to_le16(qid); + c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); + c.create_cq.cq_flags = cpu_to_le16(flags); +@@ -440,7 +448,7 @@ static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid, + + memset(&c, 0, sizeof(c)); + c.create_sq.opcode = nvme_admin_create_sq; +- c.create_sq.prp1 = cpu_to_le64((ulong)nvmeq->sq_cmds); ++ c.create_sq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->sq_cmds)); + c.create_sq.sqid = cpu_to_le16(qid); + c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); + c.create_sq.sq_flags = cpu_to_le16(flags); +@@ -461,14 +469,14 @@ int nvme_identify(struct nvme_dev *dev, unsigned nsid, + memset(&c, 0, sizeof(c)); + c.identify.opcode = nvme_admin_identify; + c.identify.nsid = cpu_to_le32(nsid); +- c.identify.prp1 = cpu_to_le64(dma_addr); ++ c.identify.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); + + length -= (page_size - offset); + if (length <= 0) { + c.identify.prp2 = 0; + } else { + dma_addr += (page_size - offset); +- c.identify.prp2 = cpu_to_le64(dma_addr); ++ c.identify.prp2 = cpu_to_le64(DEV_ADDR(dma_addr)); + } + + c.identify.cns = cpu_to_le32(cns); +@@ -493,7 +501,7 @@ int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, + memset(&c, 0, sizeof(c)); + c.features.opcode = nvme_admin_get_features; + c.features.nsid = cpu_to_le32(nsid); +- c.features.prp1 = cpu_to_le64(dma_addr); ++ c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); + c.features.fid = cpu_to_le32(fid); + + ret = nvme_submit_admin_cmd(dev, &c, result); +@@ -519,7 +527,7 @@ int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11, + + memset(&c, 0, sizeof(c)); + c.features.opcode = nvme_admin_set_features; +- c.features.prp1 = cpu_to_le64(dma_addr); ++ c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); + c.features.fid = cpu_to_le32(fid); + c.features.dword11 = cpu_to_le32(dword11); + +@@ -788,8 +796,8 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, + c.rw.slba = cpu_to_le64(slba); + slba += lbas; + c.rw.length = cpu_to_le16(lbas - 1); +- c.rw.prp1 = cpu_to_le64(temp_buffer); +- c.rw.prp2 = cpu_to_le64(prp2); ++ c.rw.prp1 = cpu_to_le64(DEV_ADDR(temp_buffer)); ++ c.rw.prp2 = cpu_to_le64(DEV_ADDR(prp2)); + status = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q], + &c, NULL, IO_TIMEOUT); + if (status) +-- +2.54.0 + +From 0e9d37b398f25bcb05525910d515559c9090c0aa Mon Sep 17 00:00:00 2001 +From: Torsten Duwe +Date: Fri, 8 May 2026 17:42:48 +0200 +Subject: [PATCH 3/3] configs: enable NVMe + +Enable NVMe in the Raspberry Pi 64-Bit default config + +Signed-off-by: Torsten Duwe +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson +--- + configs/rpi_arm64_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 69e8e72c5d7..acf44f44fc5 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -41,6 +41,7 @@ CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_MMC_SDHCI_BCMSTB=y + CONFIG_BCMGENET=y ++CONFIG_NVME_PCI=y + CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set +-- +2.54.0 + diff --git a/Revert-lmb-Reinstate-access-to-memory-above-ram_top.patch b/Revert-lmb-Reinstate-access-to-memory-above-ram_top.patch new file mode 100644 index 0000000..3e9fce8 --- /dev/null +++ b/Revert-lmb-Reinstate-access-to-memory-above-ram_top.patch @@ -0,0 +1,50 @@ +From 8a88eb4883b16b84ad44db400ee2572966c2dd37 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 29 May 2026 13:11:06 +0100 +Subject: [PATCH] Revert "lmb: Reinstate access to memory above ram_top" + +This reverts commit a3075db94d49f415658bf7e961e1eae90d9abc33. +--- + lib/lmb.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/lib/lmb.c b/lib/lmb.c +index 8f12c6ad8e5..e2d9fe86c14 100644 +--- a/lib/lmb.c ++++ b/lib/lmb.c +@@ -611,6 +611,7 @@ static __maybe_unused void lmb_reserve_common_spl(void) + static void lmb_add_memory(void) + { + int i; ++ phys_addr_t bank_end; + phys_size_t size; + u64 ram_top = gd->ram_top; + struct bd_info *bd = gd->bd; +@@ -624,9 +625,23 @@ static void lmb_add_memory(void) + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + size = bd->bi_dram[i].size; ++ bank_end = bd->bi_dram[i].start + size; + +- if (size) ++ if (size) { + lmb_add(bd->bi_dram[i].start, size); ++ ++ /* ++ * Reserve memory above ram_top as ++ * no-overwrite so that it cannot be ++ * allocated ++ */ ++ if (bd->bi_dram[i].start >= ram_top) ++ lmb_reserve(bd->bi_dram[i].start, size, ++ LMB_NOOVERWRITE); ++ else if (bank_end > ram_top) ++ lmb_reserve(ram_top, bank_end - ram_top, ++ LMB_NOOVERWRITE); ++ } + } + } + +-- +2.54.0 + diff --git a/mmc-bcm2835_sdhci-Parse-generic-MMC-device-tree-properties.patch b/mmc-bcm2835_sdhci-Parse-generic-MMC-device-tree-properties.patch new file mode 100644 index 0000000..ae37019 --- /dev/null +++ b/mmc-bcm2835_sdhci-Parse-generic-MMC-device-tree-properties.patch @@ -0,0 +1,167 @@ +From patchwork Sat May 9 21:06:07 2026 +Content-Type: text/plain; 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+ Sat, 09 May 2026 14:06:44 -0700 (PDT) +Received: from Liel.localdomain ([77.137.77.46]) + by smtp.gmail.com with ESMTPSA id + ffacd0b85a97d-45491f8d4c3sm13600391f8f.34.2026.05.09.14.06.43 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Sat, 09 May 2026 14:06:43 -0700 (PDT) +From: Liel@denx.de, Harel@denx.de, liel.harel@gmail.com +To: u-boot@lists.denx.de +Cc: Liel Harel , Matthias Brugger , + Peter Robinson , Peng Fan , + Jaehoon Chung , Tom Rini +Subject: [PATCH] mmc: bcm2835_sdhci: Parse generic MMC device tree properties +Date: Sun, 10 May 2026 00:06:07 +0300 +Message-ID: <20260509210607.51303-1-liel.harel@gmail.com> +X-Mailer: git-send-email 2.43.0 +MIME-Version: 1.0 +X-Mailman-Approved-At: Sun, 10 May 2026 03:42:13 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Liel Harel + +The bcm2835 SDHCI driver sets up the MMC host configuration via +sdhci_setup_cfg(), but does not parse generic MMC device tree +properties. + +As a result, properties such as bus-width are ignored. On Raspberry Pi +Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot +initialized the device as 4-bit. + +Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC +properties are folded into the host configuration before the MMC core +selects the bus width. + +Before this change, mmc info reported: + + Bus Speed: 52000000 + Bus Width: 4-bit + +After this change, mmc info reports: + + Bus Speed: 52000000 + Bus Width: 8-bit + +Tested on Raspberry Pi Compute Module 4 with onboard eMMC. + +Signed-off-by: Liel Harel +--- + drivers/mmc/bcm2835_sdhci.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c +index 655d9902dfa..efa4d14f5da 100644 +--- a/drivers/mmc/bcm2835_sdhci.c ++++ b/drivers/mmc/bcm2835_sdhci.c +@@ -219,6 +219,10 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + host->mmc = &plat->mmc; + host->mmc->dev = dev; + ++ ret = mmc_of_parse(dev, &plat->cfg); ++ if (ret) ++ return ret; ++ + ret = sdhci_setup_cfg(&plat->cfg, host, emmc_freq, MIN_FREQ); + if (ret) { + debug("%s: Failed to setup SDHCI (err=%d)\n", __func__, ret); diff --git a/mmc-bcmstb-Fix-non-removable-check-in-bcm2712-init.patch b/mmc-bcmstb-Fix-non-removable-check-in-bcm2712-init.patch new file mode 100644 index 0000000..bb7d1a9 --- /dev/null +++ b/mmc-bcmstb-Fix-non-removable-check-in-bcm2712-init.patch @@ -0,0 +1,185 @@ +From patchwork Tue May 12 12:24:35 2026 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +X-Patchwork-Submitter: =?utf-8?b?SmFuIMSMZXJtw6Fr?= +X-Patchwork-Id: 2236827 +X-Patchwork-Delegate: pbrobinson@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + secure) header.d=sairon.cz header.i=@sairon.cz header.a=rsa-sha256 + header.s=google header.b=QyEawGu/; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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[89.103.66.201]) + by smtp.gmail.com with ESMTPSA id + 5b1f17b1804b1-48e8e606020sm18361395e9.5.2026.05.12.05.25.06 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Tue, 12 May 2026 05:25:06 -0700 (PDT) +From: =?utf-8?b?SmFuIMSMZXJtw6Fr?= +To: u-boot@lists.denx.de +Cc: Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Tom Rini , + Matthias Brugger , "Ivan T . Ivanov" , + =?utf-8?b?SmFuIMSMZXJtw6Fr?= +Subject: [PATCH] mmc: bcmstb: Fix non-removable check in bcm2712 init +Date: Tue, 12 May 2026 14:24:35 +0200 +Message-ID: <20260512122435.1118557-1-sairon@sairon.cz> +X-Mailer: git-send-email 2.54.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether +to force card-detect for a non-removable eMMC, or to route the CD signal +for a removable SD card. At the time this function runs from +sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that +field is only populated later by the MMC uclass, after the driver's +probe returns. mmc_of_parse() has already filled plat->cfg.host_caps +from the device tree by this point, so check that field instead. + +Without the fix, every BCM2712 SDHCI instance takes the else branch and +writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including +the non-removable eMMC on boards such as CM5 on Home Assistant Yellow. +The SDIO_CFG block lies outside the SDHCI core's reset scope, so this +value persists across SDHCI_RESET_ALL into the next stage. On the +BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs +its first set_power(MMC_POWER_UP) write racily prevents the SDHCI +POWER_ON bit from latching (see [1] for the whole backstory) - the +voltage bits stick but POWER_ON drops - which wedges the first CMD0 the +full 10 s software timeout. On Home Assistant Yellow this manifested as +a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot +was the previous stage. Booting directly from the Pi firmware (no U-Boot +in between) left SD_PIN_SEL at its default and did not exhibit the race. + +Reading plat->cfg.host_caps lets init_2712 see the "non-removable" +property and take the correct branch, leaving SD_PIN_SEL untouched for +the eMMC. + +[1] https://github.com/home-assistant/operating-system/pull/3700#issuecomment-4430229511 + +Fixes: 10127cdbab64 ("mmc: bcmstb: Add support for bcm2712 SD controller") +Signed-off-by: Jan Čermák +Reviewed-by: Ivan T. Ivanov +--- + drivers/mmc/bcmstb_sdhci.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c +index 7bddbebb162..f27b84a6ee4 100644 +--- a/drivers/mmc/bcmstb_sdhci.c ++++ b/drivers/mmc/bcmstb_sdhci.c +@@ -56,7 +56,7 @@ struct sdhci_brcmstb_dev_priv { + + static int sdhci_brcmstb_init_2712(struct udevice *dev) + { +- struct sdhci_host *host = dev_get_priv(dev); ++ struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); + void *cfg_regs; + u32 reg; + +@@ -65,8 +65,8 @@ static int sdhci_brcmstb_init_2712(struct udevice *dev) + if (!cfg_regs) + return -ENOENT; + +- if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) || +- (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) { ++ if ((plat->cfg.host_caps & MMC_CAP_NONREMOVABLE) || ++ (plat->cfg.host_caps & MMC_CAP_NEEDS_POLL)) { + /* Force presence */ + reg = readl(cfg_regs + SDIO_CFG_CTRL); + reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV; diff --git a/nvme-Fix-missing-inbound-DMA-offset-calculation.patch b/nvme-Fix-missing-inbound-DMA-offset-calculation.patch deleted file mode 100644 index 9731488..0000000 --- a/nvme-Fix-missing-inbound-DMA-offset-calculation.patch +++ /dev/null @@ -1,219 +0,0 @@ -From patchwork Thu Apr 30 14:54:12 2026 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Torsten Duwe -X-Patchwork-Id: 2231306 -X-Patchwork-Delegate: trini@ti.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange x25519) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4g5xyj6V6Pz1xqf - for ; Fri, 01 May 2026 00:54:21 +1000 (AEST) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id E820B80433; - Thu, 30 Apr 2026 16:54:17 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=lst.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 68D388063E; Thu, 30 Apr 2026 16:54:16 +0200 (CEST) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, - RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham - autolearn_force=no version=3.4.2 -Received: from verein.lst.de (verein.lst.de [213.95.11.211]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id E883980086 - for ; Thu, 30 Apr 2026 16:54:13 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=lst.de -Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de -Received: by verein.lst.de (Postfix, from userid 2005) - id BC53E68AFE; Thu, 30 Apr 2026 16:54:12 +0200 (CEST) -To: Bin Meng , - Andrew Goodbody , - Tom Rini -Cc: Peter Robinson , - Matthias Brugger , - Andrea della Porta , u-boot@lists.denx.de -Subject: [PATCH] nvme: Fix missing inbound DMA offset calculation -Message-Id: <20260430145412.BC53E68AFE@verein.lst.de> -Date: Thu, 30 Apr 2026 16:54:12 +0200 (CEST) -From: duwe@lst.de (Torsten Duwe) -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Torsten Duwe - -U-Boot currently does not account for PCIe bridges with a non-zero -inbound access offset when talking NVMe, it only works on platforms -where this offset happens to be zero. - -This patch enhances the NVMe driver with the ability to also handle -these cases. The fix is required to boot e.g. the Raspberry Pi5 from -NVMe. - -Signed-off-by: Torsten Duwe ---- - -Kudos for the idea of case discrimination go to Andrea; this eases -things a lot. - -I do consider this a bug fix. The problem has popped up during RPi5 -development but really is a generic major defect IMHO. Please apply -wherever appropriate. - - Torsten - ---- - drivers/nvme/nvme.c | 39 ++++++++++++++++++++++++++------------- - 1 file changed, 26 insertions(+), 13 deletions(-) - -diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c -index 2b14437f69c..8056f52fb50 100644 ---- a/drivers/nvme/nvme.c -+++ b/drivers/nvme/nvme.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -27,6 +28,18 @@ - #define IO_TIMEOUT 30 - #define MAX_PRP_POOL 512 - -+/* -+ * This macro detects the correct inbound DMA offset in both cases: -+ * 1) the NVMe is mentioned in the device tree, along with its parent, -+ * and no intermediate PCIe bus node in between. -+ * 2) the NVMe was found dynamically by PCI enumeration which has created -+ * an intermediate PCIe bus node. That node will be skipped and the offset -+ * looked up in the grandparent. -+ */ -+#define DEV_ADDR(a) (dev_has_ofnode(dev->udev) ? \ -+ dev_phys_to_bus(dev->udev, (a)) : \ -+ dev_phys_to_bus(dev->udev->parent, (a))) -+ - static int nvme_wait_csts(struct nvme_dev *dev, u32 mask, u32 val) - { - int timeout; -@@ -91,12 +104,12 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, - i = 0; - while (nprps) { - if ((i == (prps_per_page - 1)) && nprps > 1) { -- *(prp_pool + i) = cpu_to_le64((ulong)prp_pool + -- page_size); -+ *(prp_pool + i) = cpu_to_le64(DEV_ADDR((ulong)prp_pool + -+ page_size)); - i = 0; - prp_pool += page_size; - } -- *(prp_pool + i++) = cpu_to_le64(dma_addr); -+ *(prp_pool + i++) = cpu_to_le64(DEV_ADDR(dma_addr)); - dma_addr += page_size; - nprps--; - } -@@ -393,8 +406,8 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) - dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; - - writel(aqa, &dev->bar->aqa); -- nvme_writeq((ulong)nvmeq->sq_cmds, &dev->bar->asq); -- nvme_writeq((ulong)nvmeq->cqes, &dev->bar->acq); -+ nvme_writeq(DEV_ADDR((ulong)nvmeq->sq_cmds), &dev->bar->asq); -+ nvme_writeq(DEV_ADDR((ulong)nvmeq->cqes), &dev->bar->acq); - - result = nvme_enable_ctrl(dev); - if (result) -@@ -420,7 +433,7 @@ static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid, - - memset(&c, 0, sizeof(c)); - c.create_cq.opcode = nvme_admin_create_cq; -- c.create_cq.prp1 = cpu_to_le64((ulong)nvmeq->cqes); -+ c.create_cq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->cqes)); - c.create_cq.cqid = cpu_to_le16(qid); - c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); - c.create_cq.cq_flags = cpu_to_le16(flags); -@@ -437,7 +450,7 @@ static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid, - - memset(&c, 0, sizeof(c)); - c.create_sq.opcode = nvme_admin_create_sq; -- c.create_sq.prp1 = cpu_to_le64((ulong)nvmeq->sq_cmds); -+ c.create_sq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->sq_cmds)); - c.create_sq.sqid = cpu_to_le16(qid); - c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); - c.create_sq.sq_flags = cpu_to_le16(flags); -@@ -458,14 +471,14 @@ int nvme_identify(struct nvme_dev *dev, unsigned nsid, - memset(&c, 0, sizeof(c)); - c.identify.opcode = nvme_admin_identify; - c.identify.nsid = cpu_to_le32(nsid); -- c.identify.prp1 = cpu_to_le64(dma_addr); -+ c.identify.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); - - length -= (page_size - offset); - if (length <= 0) { - c.identify.prp2 = 0; - } else { - dma_addr += (page_size - offset); -- c.identify.prp2 = cpu_to_le64(dma_addr); -+ c.identify.prp2 = cpu_to_le64(DEV_ADDR(dma_addr)); - } - - c.identify.cns = cpu_to_le32(cns); -@@ -490,7 +503,7 @@ int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, - memset(&c, 0, sizeof(c)); - c.features.opcode = nvme_admin_get_features; - c.features.nsid = cpu_to_le32(nsid); -- c.features.prp1 = cpu_to_le64(dma_addr); -+ c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); - c.features.fid = cpu_to_le32(fid); - - ret = nvme_submit_admin_cmd(dev, &c, result); -@@ -516,7 +529,7 @@ int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11, - - memset(&c, 0, sizeof(c)); - c.features.opcode = nvme_admin_set_features; -- c.features.prp1 = cpu_to_le64(dma_addr); -+ c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr)); - c.features.fid = cpu_to_le32(fid); - c.features.dword11 = cpu_to_le32(dword11); - -@@ -785,8 +798,8 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, - c.rw.slba = cpu_to_le64(slba); - slba += lbas; - c.rw.length = cpu_to_le16(lbas - 1); -- c.rw.prp1 = cpu_to_le64(temp_buffer); -- c.rw.prp2 = cpu_to_le64(prp2); -+ c.rw.prp1 = cpu_to_le64(DEV_ADDR(temp_buffer)); -+ c.rw.prp2 = cpu_to_le64(DEV_ADDR(prp2)); - status = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q], - &c, NULL, IO_TIMEOUT); - if (status) diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch index 155c570..30aad4d 100644 --- a/rockchip-Enable-preboot-start-for-pci-usb.patch +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -1,6 +1,6 @@ -From 020f67a37342b091c74dab93a133253401d4d899 Mon Sep 17 00:00:00 2001 +From a6909a16b4cc301f1007d9e75d02abb6d06a1ea7 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 31 Dec 2024 14:15:41 +0000 +Date: Thu, 28 May 2026 21:29:29 +0100 Subject: [PATCH] rockchip: Enable preboot start for pci/usb Enable the preboot so nvme works OOTB @@ -29,14 +29,18 @@ Signed-off-by: Peter Robinson configs/neu6b-io-rk3588_defconfig | 2 ++ configs/nova-rk3588s_defconfig | 2 ++ configs/odroid-m1-rk3568_defconfig | 2 ++ + configs/odroid-m1s-rk3566_defconfig | 2 ++ + configs/odroid-m2-rk3588s_defconfig | 2 ++ configs/orangepi-3b-rk3566_defconfig | 2 ++ + configs/orangepi-5-max-rk3588_defconfig | 2 ++ configs/orangepi-5-plus-rk3588_defconfig | 2 ++ configs/orangepi-5-rk3588s_defconfig | 2 ++ + configs/orangepi-5-ultra-rk3588_defconfig | 2 ++ configs/pinebook-pro-rk3399_defconfig | 1 + configs/pinetab2-rk3566_defconfig | 2 ++ configs/powkiddy-x55-rk3566_defconfig | 2 ++ configs/quartz64-a-rk3566_defconfig | 2 ++ - configs/quartz64-b-rk3566_defconfig | 2 ++ + configs/quartz64-b-rk3566_defconfig | 4 ++++ configs/quartzpro64-rk3588_defconfig | 2 ++ configs/radxa-cm3-io-rk3566_defconfig | 2 ++ configs/radxa-e25-rk3568_defconfig | 2 ++ @@ -48,6 +52,7 @@ Signed-off-by: Peter Robinson configs/rock-4c-plus-rk3399_defconfig | 2 ++ configs/rock-4se-rk3399_defconfig | 2 ++ configs/rock-5-itx-rk3588_defconfig | 2 ++ + configs/rock-5c-rk3588s_defconfig | 2 ++ configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ @@ -62,10 +67,10 @@ Signed-off-by: Peter Robinson configs/tiger-rk3588_defconfig | 2 ++ configs/toybrick-rk3588_defconfig | 2 ++ configs/turing-rk1-rk3588_defconfig | 2 ++ - 55 files changed, 109 insertions(+) + 60 files changed, 121 insertions(+) diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig -index 14c97b4c5bf..de92e1b4141 100644 +index 854de8b00a4..cd91f18ba80 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -78,7 +83,7 @@ index 14c97b4c5bf..de92e1b4141 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig -index d84ea2f955f..de777817c37 100644 +index c5199a39448..603e07f2456 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -87,11 +92,11 @@ index d84ea2f955f..de777817c37 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/cm3588-nas-rk3588_defconfig b/configs/cm3588-nas-rk3588_defconfig -index fd0a32d6d79..e561be511d4 100644 +index 5b5ef8d5ac1..53147d115dd 100644 --- a/configs/cm3588-nas-rk3588_defconfig +++ b/configs/cm3588-nas-rk3588_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 @@ -104,7 +109,7 @@ index fd0a32d6d79..e561be511d4 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig -index ea985b81670..96d7cffb075 100644 +index e6772622403..75e0b373ce9 100644 --- a/configs/coolpi-4b-rk3588s_defconfig +++ b/configs/coolpi-4b-rk3588s_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -113,11 +118,11 @@ index ea985b81670..96d7cffb075 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig -index 58ffe7baf5f..5eadc091242 100644 +index 4326e116849..a005e4441d3 100644 --- a/configs/coolpi-cm5-evb-rk3588_defconfig +++ b/configs/coolpi-cm5-evb-rk3588_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -126,11 +131,11 @@ index 58ffe7baf5f..5eadc091242 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig -index a068bc6846c..8c94f7b21bc 100644 +index 4a5a7454e10..7ec199a08af 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -143,7 +148,7 @@ index a068bc6846c..8c94f7b21bc 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig -index 3d4d2747145..051015fd811 100644 +index c7f6256a626..cfa73c660e7 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -156,7 +161,7 @@ index 3d4d2747145..051015fd811 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index 3871627318b..b96aadc78eb 100644 +index 83b9de5feb9..2ba8f5029c3 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 @@ -169,7 +174,7 @@ index 3871627318b..b96aadc78eb 100644 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig -index f79f0e84400..ba5339a004f 100644 +index a33c3af9255..20966793568 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 @@ -182,7 +187,7 @@ index f79f0e84400..ba5339a004f 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig -index 51e31dce3a9..1c767caa06a 100644 +index ac450e6d757..b5424ac9f16 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -195,7 +200,7 @@ index 51e31dce3a9..1c767caa06a 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig -index 6e853991d1d..a5a56a33d09 100644 +index ed3883b4f9c..47dbd834f30 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 @@ -208,7 +213,7 @@ index 6e853991d1d..a5a56a33d09 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig -index 46cc3c03fff..8915d5bfba9 100644 +index 7548bf60b06..2fb8a432503 100644 --- a/configs/lubancat-2-rk3568_defconfig +++ b/configs/lubancat-2-rk3568_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -221,10 +226,10 @@ index 46cc3c03fff..8915d5bfba9 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig -index 26c12c51078..33f7e838c2c 100644 +index f8ae436a1ee..7aa8e1a8d42 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig -@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 +@@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y @@ -234,7 +239,7 @@ index 26c12c51078..33f7e838c2c 100644 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig -index 772b7df1555..ba6cf48308c 100644 +index ba9a5adece7..eaf7fa5a0fc 100644 --- a/configs/nanopc-t6-rk3588_defconfig +++ b/configs/nanopc-t6-rk3588_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -247,7 +252,7 @@ index 772b7df1555..ba6cf48308c 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig -index 4a43b17ccb1..91c95b491d5 100644 +index e75a24dadc8..159ef033932 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -260,7 +265,7 @@ index 4a43b17ccb1..91c95b491d5 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig -index a60d229fbbf..355d8114a9b 100644 +index c971f376b38..60b5e8fa014 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -273,7 +278,7 @@ index a60d229fbbf..355d8114a9b 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r6c-rk3588s_defconfig b/configs/nanopi-r6c-rk3588s_defconfig -index c4de5518a72..92697c536d9 100644 +index 861e3234d29..bb6e2082e3b 100644 --- a/configs/nanopi-r6c-rk3588s_defconfig +++ b/configs/nanopi-r6c-rk3588s_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 @@ -286,7 +291,7 @@ index c4de5518a72..92697c536d9 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r6s-rk3588s_defconfig b/configs/nanopi-r6s-rk3588s_defconfig -index 2726729b9ac..63a3690db8e 100644 +index 743dfca441b..903ec56ad6f 100644 --- a/configs/nanopi-r6s-rk3588s_defconfig +++ b/configs/nanopi-r6s-rk3588s_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 @@ -299,7 +304,7 @@ index 2726729b9ac..63a3690db8e 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig -index 291e0d26d42..e385aba7bc4 100644 +index 19f129e96f0..08ed699b01d 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -312,7 +317,7 @@ index 291e0d26d42..e385aba7bc4 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig -index 4e22852f23c..79f4e66cb9b 100644 +index 2cf5aeccf51..8cafd779a1c 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -325,7 +330,7 @@ index 4e22852f23c..79f4e66cb9b 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nova-rk3588s_defconfig b/configs/nova-rk3588s_defconfig -index fb30dfd1db8..e99898355e1 100644 +index f7d7492ff46..5abb6ebbe18 100644 --- a/configs/nova-rk3588s_defconfig +++ b/configs/nova-rk3588s_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 @@ -338,7 +343,7 @@ index fb30dfd1db8..e99898355e1 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig -index a8e8a8781e1..a3ea2e592b9 100644 +index b00985b0405..19d7af53c7f 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -347,11 +352,37 @@ index a8e8a8781e1..a3ea2e592b9 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig +index d59882a2a59..20f6dc3c26e 100644 +--- a/configs/odroid-m1s-rk3566_defconfig ++++ b/configs/odroid-m1s-rk3566_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/odroid-m2-rk3588s_defconfig b/configs/odroid-m2-rk3588s_defconfig +index e71e61ddb0b..561c2b28b7a 100644 +--- a/configs/odroid-m2-rk3588s_defconfig ++++ b/configs/odroid-m2-rk3588s_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/orangepi-3b-rk3566_defconfig b/configs/orangepi-3b-rk3566_defconfig -index 2181c9caf58..fee0c719f25 100644 +index 1cd78789fa1..dcf182231da 100644 --- a/configs/orangepi-3b-rk3566_defconfig +++ b/configs/orangepi-3b-rk3566_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -360,11 +391,24 @@ index 2181c9caf58..fee0c719f25 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/orangepi-5-max-rk3588_defconfig b/configs/orangepi-5-max-rk3588_defconfig +index 0861df962cf..744aad89c4a 100644 +--- a/configs/orangepi-5-max-rk3588_defconfig ++++ b/configs/orangepi-5-max-rk3588_defconfig +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig -index 9050fceda45..2e1fe2c6dc5 100644 +index 52523f87aec..e3bb4e43da9 100644 --- a/configs/orangepi-5-plus-rk3588_defconfig +++ b/configs/orangepi-5-plus-rk3588_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -373,11 +417,11 @@ index 9050fceda45..2e1fe2c6dc5 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig -index 6e2ff7d338a..7ec7d13e1f9 100644 +index e0eba389289..33fe68add7b 100644 --- a/configs/orangepi-5-rk3588s_defconfig +++ b/configs/orangepi-5-rk3588s_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -386,11 +430,24 @@ index 6e2ff7d338a..7ec7d13e1f9 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/orangepi-5-ultra-rk3588_defconfig b/configs/orangepi-5-ultra-rk3588_defconfig +index fb7f4432983..62419609695 100644 +--- a/configs/orangepi-5-ultra-rk3588_defconfig ++++ b/configs/orangepi-5-ultra-rk3588_defconfig +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index dfa927ccb17..acc2a0a9fcd 100644 +index cbf95b4692f..9e4d1b1061d 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_PCI=y @@ -402,7 +459,7 @@ index dfa927ccb17..acc2a0a9fcd 100644 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig -index 45e63b42d19..3ef0ddbbe31 100644 +index f284dadb99d..d87849f0a45 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 @@ -415,7 +472,7 @@ index 45e63b42d19..3ef0ddbbe31 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/powkiddy-x55-rk3566_defconfig b/configs/powkiddy-x55-rk3566_defconfig -index 85280839889..f93a463087b 100644 +index 37a359c91a9..70bc5ab6402 100644 --- a/configs/powkiddy-x55-rk3566_defconfig +++ b/configs/powkiddy-x55-rk3566_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -428,7 +485,7 @@ index 85280839889..f93a463087b 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig -index fe3fa37611a..60b1f8f1784 100644 +index 780fd581f0a..7938b5c0d1b 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -437,24 +494,31 @@ index fe3fa37611a..60b1f8f1784 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig -index 929736f76af..c3155d9b835 100644 +index 4d92a67cd73..fe8a168373d 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y +@@ -1,4 +1,6 @@ + CONFIG_ARM=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_SKIP_LOWLEVEL_INIT=y + CONFIG_COUNTER_FREQUENCY=24000000 + CONFIG_ARCH_ROCKCHIP=y +@@ -17,6 +19,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig -index ade7be27e92..263d21bee8b 100644 +index 0ad74e8bbef..b9cbddfae77 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 @@ -463,11 +527,11 @@ index ade7be27e92..263d21bee8b 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig -index 2655fdc3170..c1a27f6e310 100644 +index 875f0b76fa5..2523dccd6a3 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -480,7 +544,7 @@ index 2655fdc3170..c1a27f6e310 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig -index 4df594ddc01..3830d27b264 100644 +index 779d540e22d..7e003e74520 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -489,11 +553,11 @@ index 4df594ddc01..3830d27b264 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/radxa-zero-3-rk3566_defconfig b/configs/radxa-zero-3-rk3566_defconfig -index 5989b07ad79..1b571ec3847 100644 +index f5cf09a5e4a..7db7e3fcd3d 100644 --- a/configs/radxa-zero-3-rk3566_defconfig +++ b/configs/radxa-zero-3-rk3566_defconfig @@ -11,6 +11,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -506,7 +570,7 @@ index 5989b07ad79..1b571ec3847 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig -index 3ab5fd69c62..ba254d8f6c0 100644 +index 8b4d8c1b0aa..54baa07aeae 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -519,7 +583,7 @@ index 3ab5fd69c62..ba254d8f6c0 100644 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig -index 733ce631457..3387796a0c5 100644 +index e753185610f..19d303e7f70 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -528,11 +592,11 @@ index 733ce631457..3387796a0c5 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock-3b-rk3568_defconfig b/configs/rock-3b-rk3568_defconfig -index 2023feb36c2..84c6aab6b33 100644 +index c3bf48b9e34..0cfa8eba168 100644 --- a/configs/rock-3b-rk3568_defconfig +++ b/configs/rock-3b-rk3568_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -541,11 +605,11 @@ index 2023feb36c2..84c6aab6b33 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock-3c-rk3566_defconfig b/configs/rock-3c-rk3566_defconfig -index 2528c7c639c..0a0010b1268 100644 +index 417aa33a663..61d0e1b8c6a 100644 --- a/configs/rock-3c-rk3566_defconfig +++ b/configs/rock-3c-rk3566_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -554,11 +618,11 @@ index 2528c7c639c..0a0010b1268 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig -index 0c73a212ea1..2ae2eff39e2 100644 +index 0f6bdfdfb06..f31cb061a83 100644 --- a/configs/rock-4c-plus-rk3399_defconfig +++ b/configs/rock-4c-plus-rk3399_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 @@ -571,7 +635,7 @@ index 0c73a212ea1..2ae2eff39e2 100644 CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig -index 3ae19692155..12621b8a41b 100644 +index 7f22aede912..caf8e02bece 100644 --- a/configs/rock-4se-rk3399_defconfig +++ b/configs/rock-4se-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -580,11 +644,11 @@ index 3ae19692155..12621b8a41b 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y + # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-5-itx-rk3588_defconfig b/configs/rock-5-itx-rk3588_defconfig -index d0dd1c20ece..b3a778907c8 100644 +index cb014de4188..e26a126533c 100644 --- a/configs/rock-5-itx-rk3588_defconfig +++ b/configs/rock-5-itx-rk3588_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -593,11 +657,24 @@ index d0dd1c20ece..b3a778907c8 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/rock-5c-rk3588s_defconfig b/configs/rock-5c-rk3588s_defconfig +index 3d044a81498..27234c250d1 100644 +--- a/configs/rock-5c-rk3588s_defconfig ++++ b/configs/rock-5c-rk3588s_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig -index f3a5c2c45f3..d95576e804a 100644 +index e5c9072c27f..35852c017da 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -606,11 +683,11 @@ index f3a5c2c45f3..d95576e804a 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y + # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig -index 9bda50c8c77..d26eb3dcb44 100644 +index 4be7b0f8130..eeee446a5bd 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -619,11 +696,11 @@ index 9bda50c8c77..d26eb3dcb44 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y + # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig -index a9c6d8a907a..1cde3859eef 100644 +index 602a723ea7d..3dcc2932ae3 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 @@ -636,7 +713,7 @@ index a9c6d8a907a..1cde3859eef 100644 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig -index 9618d590009..9608f7e7e4c 100644 +index 24b2eef35f2..c5830054921 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -649,7 +726,7 @@ index 9618d590009..9608f7e7e4c 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig -index 47ee2109f8e..e1c6961a3ab 100644 +index da5fb3a2c30..053346fc035 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -658,11 +735,11 @@ index 47ee2109f8e..e1c6961a3ab 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index aebfa73459c..8b60ad3bf00 100644 +index db121f03ae6..e55f1b6a034 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 @@ -675,7 +752,7 @@ index aebfa73459c..8b60ad3bf00 100644 CONFIG_SYS_PBSIZE=1052 CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index 08b7e2784e9..d80e120c66f 100644 +index 1d2bff35fc0..ea8e90b9f6a 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -688,7 +765,7 @@ index 08b7e2784e9..d80e120c66f 100644 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/sige7-rk3588_defconfig b/configs/sige7-rk3588_defconfig -index 8b033e22b84..978df10442c 100644 +index 00b9759715b..1b837bd554c 100644 --- a/configs/sige7-rk3588_defconfig +++ b/configs/sige7-rk3588_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 @@ -697,11 +774,11 @@ index 8b033e22b84..978df10442c 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig -index a1a51b2c657..4083f217c0b 100644 +index 7de159a8881..4137f0459b5 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -710,11 +787,11 @@ index a1a51b2c657..4083f217c0b 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig -index a8bca0eaccc..c3dd48d9dc1 100644 +index 4455ee5b5aa..ad63ba0204f 100644 --- a/configs/soquartz-cm4-rk3566_defconfig +++ b/configs/soquartz-cm4-rk3566_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -723,11 +800,11 @@ index a8bca0eaccc..c3dd48d9dc1 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig -index f080d2e36d2..f6f2f67b0a6 100644 +index abdab514496..9e01345bdaa 100644 --- a/configs/soquartz-model-a-rk3566_defconfig +++ b/configs/soquartz-model-a-rk3566_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -736,11 +813,11 @@ index f080d2e36d2..f6f2f67b0a6 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig -index f962ac416f3..1fc7301f6ae 100644 +index 105e8e10e0b..bcc2ae302a5 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 @@ -753,7 +830,7 @@ index f962ac416f3..1fc7301f6ae 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig -index 5e70341c987..fd7e842f9e5 100644 +index 14b231ae3e2..7af393731cd 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -766,7 +843,7 @@ index 5e70341c987..fd7e842f9e5 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig -index 0eddf15833c..1a9aacc7b5d 100644 +index 0b3efec23e6..515db2a2b0c 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEBC0000 @@ -775,9 +852,9 @@ index 0eddf15833c..1a9aacc7b5d 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y -- -2.47.1 +2.54.0 diff --git a/rpi-enable-nvme.patch b/rpi-enable-nvme.patch index c5a2ff1..52a1153 100644 --- a/rpi-enable-nvme.patch +++ b/rpi-enable-nvme.patch @@ -21,14 +21,6 @@ index 38af5029403..ed4ae6ff522 100644 CONFIG_SYS_PBSIZE=1049 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -@@ -41,6 +41,7 @@ CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_MMC_SDHCI_BCMSTB=y - CONFIG_BCMGENET=y -+CONFIG_NVME_PCI=y - CONFIG_PCI_BRCMSTB=y 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5b1f17b1804b1-488ffc5e3f4sm181160215e9.2.2026.04.21.07.11.59 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Tue, 21 Apr 2026 07:11:59 -0700 (PDT) +From: Peter Robinson +To: Matthias Brugger , + u-boot@lists.denx.de +Cc: Peter Robinson +Subject: [PATCH] rpi_arm64: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS +Date: Tue, 21 Apr 2026 15:11:38 +0100 +Message-ID: <20260421141156.359690-1-pbrobinson@gmail.com> +X-Mailer: git-send-email 2.53.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Enable LWIP and HTTPS on the Raspberry Pi arm64 platform to be able to +use it in the boot process. + +Signed-off-by: Peter Robinson +Reviewed-by: Matthias Brugger +--- + configs/rpi_arm64_defconfig | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 69e8e72c5d7..90048a418f6 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -11,6 +11,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_PCI=y + CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y + CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y ++CONFIG_EFI_HTTP_BOOT=y + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_FDT_SIMPLEFB=y +@@ -26,11 +27,13 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y ++CONFIG_CMD_SNTP=y ++CONFIG_WGET_HTTPS=y + CONFIG_CMD_EFIDEBUG=y + CONFIG_CMD_FS_UUID=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-CONFIG_TFTP_TSIZE=y ++CONFIG_NET_LWIP=y + CONFIG_DM_DMA=y + CONFIG_DFU_MMC=y + CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 +@@ -64,4 +67,5 @@ CONFIG_SYS_WHITE_ON_BLACK=y + CONFIG_VIDEO_BCM2835=y + CONFIG_CONSOLE_SCROLL_LINES=10 + CONFIG_PHYS_TO_BUS=y ++CONFIG_MBEDTLS_LIB=y + # CONFIG_HEXDUMP is not set diff --git a/sources b/sources index 5a8707a..9208a63 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2026.07-rc1.tar.bz2) = 9e926fdea78c02c81ebe79383623ec34af78debee3dcb35a7b1968646cd3b296768e2acbb29ccf93b92031905761be4424241dabc01ee16202e1efb47c9589eb +SHA512 (u-boot-2026.07-rc3.tar.bz2) = 1aef3d2c5c773244bbc3eb8f63543e84aa5a127c3dd58dabbb2714473f8233d299e610ddeb4e18f6c7b012ca8f3152688bc0ae3fcebc0867a7a7fae43018192d diff --git a/uboot-tools.spec b/uboot-tools.spec index f589fb8..6c1de18 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc1 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -10,12 +10,12 @@ Name: uboot-tools Version: 2026.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. License: GPL-2.0-or-later AND LicenseRef-Callaway-BSD AND LGPL-2.1-or-later AND LGPL-2.0-or-later -URL: http://www.denx.de/wiki/U-Boot +URL: https://u-boot-project.org/ ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards @@ -29,14 +29,14 @@ Patch2: enable-bootmenu-by-default.patch Patch3: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Identify VFAT partitions as ESP, allows EFI setvar on our images Patch4: uefi-Add-all-options-for-EFI-System-Partitions.patch -# Upstream revert for rpi boot fix -Patch5: 0001-Revert-efi_loader-install-device-tree-on-configurati.patch # New function to find fdt for loading from disk -Patch6: uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch +Patch5: uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch # Enable UEFI SetVariable for devices without backed storage -Patch7: uefi-enable-SetVariableRT-with-volotile-storage.patch +Patch6: uefi-enable-SetVariableRT-with-volotile-storage.patch # Enable UEFI HTTPS boot for all Fedora firmware -Patch8: uefi-enable-https-boot-by-default.patch +Patch7: uefi-enable-https-boot-by-default.patch +# Upstream revert to fix boot on RPi +Patch8: Revert-lmb-Reinstate-access-to-memory-above-ram_top.patch # Device improvments # USB-PD improvements @@ -51,11 +51,14 @@ Patch15: JetsonTX2-Fix-upstream-device-tree-naming.patch # Fix AllWinner Patch16: Allwinner-fix-booting-on-a-number-of-devices.patch # RPi -Patch20: ARM-RPi5-Enable-PCIe.patch -Patch21: nvme-Fix-missing-inbound-DMA-offset-calculation.patch +Patch20: Fix-NVMe-not-only-on-Raspberry-Pi-5.patch +Patch21: ARM-RPi5-Enable-PCIe.patch Patch22: rpi-enable-nvme.patch -Patch23: 0001-Add-bcm2712-compat.patch +Patch23: video-arm-rpi-Add-brcm-bcm2712-hdmi0-compatible.patch Patch24: raspberrypi-Add-quirk-for-RPi5-2Gb-rev-1.0.patch +Patch25: mmc-bcm2835_sdhci-Parse-generic-MMC-device-tree-properties.patch +Patch26: rpi_arm64-Enable-MBEDTLS-LWIP-WGET-and-WGET_HTTPS.patch +Patch27: mmc-bcmstb-Fix-non-removable-check-in-bcm2712-init.patch BuildRequires: bc BuildRequires: bison @@ -314,6 +317,12 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Fri May 29 2026 Peter Robinson - 1:2026.07-0.2.rc3 +- Update to 2026.07 RC3 +- Update U-Boot Project URL +- Update RPi PCIe patches +- Various RPi fixes + * Fri May 01 2026 Peter Robinson - 1:2026.07-0.1.rc1 - Update to 2026.07 RC1 diff --git a/uefi-enable-https-boot-by-default.patch b/uefi-enable-https-boot-by-default.patch index c584f9b..dc0a683 100644 --- a/uefi-enable-https-boot-by-default.patch +++ b/uefi-enable-https-boot-by-default.patch @@ -1,4 +1,4 @@ -From 4e6c3762cc86f6fab6f18ffd2a99ff921cd0fd38 Mon Sep 17 00:00:00 2001 +From 7eabab2fda12b7a4417e5c7f29a507dfa9e7fffd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 3 May 2026 09:24:34 +0100 Subject: [PATCH] enable https boot by default @@ -24,7 +24,7 @@ index c71c6824a19..8ff14adffe1 100644 depends on PROT_TCP_LWIP depends on MBEDTLS_LIB diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig -index 0b6c2eaac60..268d9eb8544 100644 +index 4cb13ae7c8a..20733429962 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -609,6 +609,7 @@ config EFI_BOOTMGR @@ -33,8 +33,8 @@ index 0b6c2eaac60..268d9eb8544 100644 bool "EFI HTTP Boot support" + default y depends on NET + depends on CMDLINE select CMD_NET - select CMD_DHCP diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig index 789721ee6cd..7a241c2bc26 100644 --- a/lib/mbedtls/Kconfig diff --git a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch index 0a1727a..5948f93 100644 --- a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch +++ b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch @@ -1,6 +1,6 @@ -From 121fd475757e183428ca78f43420c42b9973aa33 Mon Sep 17 00:00:00 2001 +From 56a985cec8592a8de88e7f254df82f5d444a5ecc Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 31 Dec 2024 14:11:12 +0000 +Date: Thu, 28 May 2026 22:08:07 +0100 Subject: [PATCH] initial find_fdt_location for finding the DT on disk The old distro boot looked for a DT on the first boot partition @@ -18,14 +18,14 @@ Signed-off-by: Peter Robinson --- cmd/bootmenu.c | 5 ++ include/efi_loader.h | 2 + - lib/efi_loader/efi_helper.c | 105 +++++++++++++++++++++++++++++++++++- - 4 files changed, 112 insertions(+), 1 deletion(-) + lib/efi_loader/efi_helper.c | 106 +++++++++++++++++++++++++++++++++++- + 3 files changed, 112 insertions(+), 1 deletion(-) diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c -index b633aedf011..96a71a96820 100644 +index 528afd221d0..a10ea35a687 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c -@@ -461,6 +461,11 @@ static void handle_uefi_bootnext(void) +@@ -502,6 +502,11 @@ static void handle_uefi_bootnext(void) u16 bootnext; efi_status_t ret; efi_uintn_t size; @@ -38,10 +38,10 @@ index b633aedf011..96a71a96820 100644 /* Initialize EFI drivers */ ret = efi_init_obj_list(); diff --git a/include/efi_loader.h b/include/efi_loader.h -index 39809eac1bc..511eba655e7 100644 +index 3a4d502631c..b11f8a2cb42 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h -@@ -514,6 +514,8 @@ struct efi_register_notify_event { +@@ -574,6 +574,8 @@ struct efi_register_notify_event { struct list_head handles; }; @@ -51,10 +51,10 @@ index 39809eac1bc..511eba655e7 100644 int efi_init_early(void); /* Initialize efi execution environment */ diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c -index bf96f61d3d0..3f496cc0dfb 100644 +index 44b806aadc4..61e982091b9 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c -@@ -12,6 +12,7 @@ +@@ -15,6 +15,7 @@ #include #include #include @@ -62,7 +62,7 @@ index bf96f61d3d0..3f496cc0dfb 100644 #include #include #include -@@ -95,6 +96,99 @@ int efi_get_pxe_arch(void) +@@ -98,6 +99,99 @@ int efi_get_pxe_arch(void) return -EINVAL; } @@ -162,14 +162,15 @@ index bf96f61d3d0..3f496cc0dfb 100644 /** * efi_create_current_boot_var() - Return Boot#### name were #### is replaced by * the value of BootCurrent -@@ -548,11 +642,20 @@ efi_status_t efi_install_fdt(void *fdt) - /* Look for device tree that is already installed */ - if (efi_get_configuration_table(&efi_guid_fdt)) - return EFI_SUCCESS; +@@ -558,11 +652,21 @@ efi_status_t efi_install_fdt(void *fdt) + const char *fdt_opt; + uintptr_t fdt_addr; + + /* Check if there is device tree loaded from disk */ + fdt_opt = find_fdt_location(); + if (fdt_opt) + log_debug("Found DTB on disk\n"); ++ /* Check if there is a hardware device tree */ - fdt_opt = env_get("fdt_addr"); + if (!fdt_opt) { @@ -185,5 +186,5 @@ index bf96f61d3d0..3f496cc0dfb 100644 log_err("need device tree\n"); return EFI_NOT_FOUND; -- -2.47.1 +2.54.0 diff --git a/video-arm-rpi-Add-brcm-bcm2712-hdmi0-compatible.patch b/video-arm-rpi-Add-brcm-bcm2712-hdmi0-compatible.patch new file mode 100644 index 0000000..f1fed33 --- /dev/null +++ b/video-arm-rpi-Add-brcm-bcm2712-hdmi0-compatible.patch @@ -0,0 +1,152 @@ +From patchwork Tue Apr 21 08:51:59 2026 +Content-Type: text/plain; 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+ Tue, 21 Apr 2026 01:52:10 -0700 (PDT) +Received: from cypher.home.roving-it.com + (7.9.7.f.b.1.3.0.b.8.f.0.9.e.0.0.1.8.6.2.1.1.b.f.0.b.8.0.1.0.0.2.ip6.arpa. + [2001:8b0:fb11:2681:e9:f8b:31b:f797]) + by smtp.googlemail.com with ESMTPSA id + 5b1f17b1804b1-488fc18bccfsm319754095e9.8.2026.04.21.01.52.09 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Tue, 21 Apr 2026 01:52:09 -0700 (PDT) +From: Peter Robinson +To: Matthias Brugger , + u-boot@lists.denx.de +Cc: Peter Robinson +Subject: [PATCH] video: arm: rpi: Add brcm,bcm2712-hdmi0 compatible +Date: Tue, 21 Apr 2026 09:51:59 +0100 +Message-ID: <20260421085207.273703-1-pbrobinson@gmail.com> +X-Mailer: git-send-email 2.53.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5. +There appears to be no change that impacts early boot output +on the display controller so add the RPi5 compatible string. + +Signed-off-by: Peter Robinson +Reviewed-by: Matthias Brugger +--- + drivers/video/bcm2835.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index 0c81e606622..0e0cc1979eb 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -66,6 +66,7 @@ static int bcm2835_video_probe(struct udevice *dev) + static const struct udevice_id bcm2835_video_ids[] = { + { .compatible = "brcm,bcm2835-hdmi" }, + { .compatible = "brcm,bcm2711-hdmi0" }, ++ { .compatible = "brcm,bcm2712-hdmi0" }, + { .compatible = "brcm,bcm2708-fb" }, + #if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB) + { .compatible = "simple-framebuffer" },