From 6ce6803ef8bab78b59fa7c2d9976ec001b9ac6f8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 30 Oct 2018 13:31:34 +0000 Subject: [PATCH 001/351] 2018.11 RC3 --- aarch64-boards | 1 + dragonboard-fixes.patch | 43 +- ..._atf-fix-warning-unit_address_vs_reg.patch | 103 -- ...hip-make_fit_atf-use-elf-entry-point.patch | 81 -- sources | 2 +- tegra-efi_loader-simplify-ifdefs.patch | 194 ---- uboot-tools.spec | 27 +- uefi-fixes.patch | 1017 ----------------- 8 files changed, 36 insertions(+), 1432 deletions(-) delete mode 100644 rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch delete mode 100644 rockchip-make_fit_atf-use-elf-entry-point.patch delete mode 100644 tegra-efi_loader-simplify-ifdefs.patch delete mode 100644 uefi-fixes.patch diff --git a/aarch64-boards b/aarch64-boards index 5e876fe..f882ee2 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -11,6 +11,7 @@ firefly-rk3399 geekbox hikey khadas-vim +khadas-vim2 libretech-cc libretech_all_h3_cc_h5 mvebu_espressobin-88f3720 diff --git a/dragonboard-fixes.patch b/dragonboard-fixes.patch index 10ee96b..c49ea50 100644 --- a/dragonboard-fixes.patch +++ b/dragonboard-fixes.patch @@ -1,17 +1,17 @@ -From fbd0bffb20ca5edd21bbeb7cc20e24d091ab4280 Mon Sep 17 00:00:00 2001 +From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 21 Jun 2017 14:21:15 -0400 -Subject: [PATCH 1/4] WIP: fix usb +Subject: [PATCH 1/3] WIP: fix usb --- common/usb_storage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/usb_storage.c b/common/usb_storage.c -index a91b1c0d2f..caea87a09f 100644 +index d92ebb6eb19..9df3c3daaf4 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c -@@ -1018,7 +1018,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss) +@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss) static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) { @@ -20,7 +20,7 @@ index a91b1c0d2f..caea87a09f 100644 do { memset(&srb->cmd[0], 0, 12); -@@ -1041,7 +1041,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) +@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) if ((srb->sense_buf[2] == 0x02) && (srb->sense_buf[12] == 0x3a)) return -1; @@ -30,12 +30,12 @@ index a91b1c0d2f..caea87a09f 100644 return -1; -- -2.14.3 +2.19.1 -From d1b25b8d6461c5278228d657de9c24e0979e4b9d Mon Sep 17 00:00:00 2001 +From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 3 Jul 2017 08:34:37 -0400 -Subject: [PATCH 2/4] HACK: disable emmc +Subject: [PATCH 2/3] HACK: disable emmc Hitting some timeout which makes boot take much longer. And uefi/boot/rootfs partitions will be on sd-card or usb disk, etc, @@ -45,18 +45,18 @@ so we can just ignore emmc. 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts -index 5ccfe7f8c8..9e2d3f5d9b 100644 +index fa348bc621e..bfe7f15d5ed 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts -@@ -67,6 +67,7 @@ - reg = <0x78d9000 0x400>; +@@ -106,6 +106,7 @@ + #phy-cells = <0>; }; +/* sdhci@07824000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7824900 0x11c 0x7824000 0x800>; -@@ -76,6 +77,7 @@ +@@ -115,6 +116,7 @@ clock = <&clkc 0>; clock-frequency = <100000000>; }; @@ -65,22 +65,23 @@ index 5ccfe7f8c8..9e2d3f5d9b 100644 sdhci@07864000 { compatible = "qcom,sdhci-msm-v4"; -- -2.14.3 -From 6baac1d73a20f880cb91f3bc03fe4f9cf88c61f6 Mon Sep 17 00:00:00 2001 +2.19.1 + +From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 4 Sep 2018 12:21:59 +0100 -Subject: [PATCH] add options for dm410c config +Subject: [PATCH 3/3] add options for dm410c config --- configs/dragonboard410c_defconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig -index 96a831443a..d167c765b1 100644 +index a55abaf8df5..4ece0cafbe4 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig -@@ -6,6 +6,8 @@ CONFIG_DISTRO_DEFAULTS=y - CONFIG_NR_DRAM_BANKS=1 +@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1 + # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y +CONFIG_FAT_WRITE=y @@ -88,7 +89,7 @@ index 96a831443a..d167c765b1 100644 CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -@@ -35,6 +37,13 @@ CONFIG_DM_PMIC=y +@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PM8916=y CONFIG_MSM_SERIAL=y CONFIG_SPMI_MSM=y @@ -102,7 +103,7 @@ index 96a831443a..d167c765b1 100644 CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y -@@ -46,5 +55,6 @@ CONFIG_USB_HOST_ETHER=y +@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y @@ -110,5 +111,5 @@ index 96a831443a..d167c765b1 100644 CONFIG_USB_ETHER_SMSC95XX=y CONFIG_OF_LIBFDT_OVERLAY=y -- -2.19.0.rc0 +2.19.1 diff --git a/rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch b/rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch deleted file mode 100644 index d64cbb1..0000000 --- a/rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch +++ /dev/null @@ -1,103 +0,0 @@ -From patchwork Thu Apr 26 06:43:06 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] rockchip: make_fit_atf: fix warning unit_address_vs_reg -X-Patchwork-Submitter: Kever Yang -X-Patchwork-Id: 904884 -Message-Id: <1524724986-28497-1-git-send-email-kever.yang@rock-chips.com> -To: u-boot@lists.denx.de -Date: Thu, 26 Apr 2018 14:43:06 +0800 -From: Kever Yang -List-Id: U-Boot discussion - -Patch fix warning: -/builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \ -arch/arm/dts/rk3399-firefly.dtb > u-boot.its - ./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null && cat -/dev/null -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1 -has a unit name, but no reg property -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has -a unit name, but no reg property -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has -a unit name, but no reg property -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has -a unit name, but no reg property -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has -a unit name, but no reg property -u-boot.itb.tmp: Warning (unit_address_vs_reg): Node -/configurations/config@1 has a unit name, but no reg property -make[1]: Leaving directory -'/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399' - -Reported-by: Peter Robinson -Signed-off-by: Kever Yang ---- - - arch/arm/mach-rockchip/make_fit_atf.py | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py -index 7c6dd57..513e088 100755 ---- a/arch/arm/mach-rockchip/make_fit_atf.py -+++ b/arch/arm/mach-rockchip/make_fit_atf.py -@@ -37,7 +37,7 @@ DT_HEADER="""/* - #address-cells = <1>; - - images { -- uboot@1 { -+ uboot { - description = "U-Boot (64-bit)"; - data = /incbin/("u-boot-nodtb.bin"); - type = "standalone"; -@@ -61,7 +61,7 @@ def append_atf_node(file, atf_index, phy_addr): - Append ATF DT node to input FIT dts file. - """ - data = 'bl31_0x%08x.bin' % phy_addr -- print >> file, '\t\tatf@%d {' % atf_index -+ print >> file, '\t\tatf_%d {' % atf_index - print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";' - print >> file, '\t\t\tdata = /incbin/("%s");' % data - print >> file, '\t\t\ttype = "firmware";' -@@ -81,7 +81,7 @@ def append_fdt_node(file, dtbs): - cnt = 1 - for dtb in dtbs: - dtname = os.path.basename(dtb) -- print >> file, '\t\tfdt@%d {' % cnt -+ print >> file, '\t\tfdt_%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tdata = /incbin/("%s");' % dtb - print >> file, '\t\t\ttype = "flat_dt";' -@@ -91,17 +91,17 @@ def append_fdt_node(file, dtbs): - cnt = cnt + 1 - - def append_conf_section(file, cnt, dtname, atf_cnt): -- print >> file, '\t\tconfig@%d {' % cnt -+ print >> file, '\t\tconfig_%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname -- print >> file, '\t\t\tfirmware = "atf@1";' -- print >> file, '\t\t\tloadables = "uboot@1",', -+ print >> file, '\t\t\tfirmware = "atf_1";' -+ print >> file, '\t\t\tloadables = "uboot",', - for i in range(1, atf_cnt): -- print >> file, '"atf@%d"' % (i+1), -+ print >> file, '"atf_%d"' % (i+1), - if i != (atf_cnt - 1): - print >> file, ',', - else: - print >> file, ';' -- print >> file, '\t\t\tfdt = "fdt@1";' -+ print >> file, '\t\t\tfdt = "fdt_1";' - print >> file, '\t\t};' - print >> file, '' - -@@ -111,7 +111,7 @@ def append_conf_node(file, dtbs, atf_cnt): - """ - cnt = 1 - print >> file, '\tconfigurations {' -- print >> file, '\t\tdefault = "config@1";' -+ print >> file, '\t\tdefault = "config_1";' - for dtb in dtbs: - dtname = os.path.basename(dtb) - append_conf_section(file, cnt, dtname, atf_cnt) diff --git a/rockchip-make_fit_atf-use-elf-entry-point.patch b/rockchip-make_fit_atf-use-elf-entry-point.patch deleted file mode 100644 index fc2aa99..0000000 --- a/rockchip-make_fit_atf-use-elf-entry-point.patch +++ /dev/null @@ -1,81 +0,0 @@ -From patchwork Wed May 16 16:44:33 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] rockchip: make_fit_atf: use elf entry point -X-Patchwork-Submitter: Mian Yousaf Kaukab -X-Patchwork-Id: 914901 -Message-Id: <20180516164433.30998-1-yousaf.kaukab@suse.com> -To: u-boot@lists.denx.de -Cc: Mian Yousaf Kaukab -Date: Wed, 16 May 2018 18:44:33 +0200 -From: Mian Yousaf Kaukab -List-Id: U-Boot discussion - -make_fit_atf.py uses physical address of first segment as the -entry point to bl31. It is incorrect and causes following abort -when bl31_entry() is called: - -U-Boot SPL board initTrying to boot from MMC1 -"Synchronous Abort" handler, esr 0x02000000 -elr: 0000000000000000 lr : 00000000ff8c7e8c -x 0: 00000000ff8e0000 x 1: 0000000000000000 -x 2: 0000000000000000 x 3: 00000000ff8e0180 -x 4: 0000000000000000 x 5: 0000000000000000 -x 6: 0000000000000030 x 7: 00000000ff8e0188 -x 8: 00000000000001e0 x 9: 0000000000000000 -x10: 000000000007fcdc x11: 00000000002881b8 -x12: 00000000000001a2 x13: 0000000000000198 -x14: 000000000007fdcc x15: 00000000002881b8 -x16: 00000000003c0724 x17: 00000000003c0718 -x18: 000000000007fe80 x19: 00000000ff8e0000 -x20: 0000000000200000 x21: 00000000ff8e0000 -x22: 0000000000000000 x23: 000000000007fe30 -x24: 00000000ff8d1c3c x25: 00000000ff8d5000 -x26: 00000000deadbeef x27: 00000000000004a0 -x28: 000000000000009c x29: 000000000007fd90 - -Fix it by using the entry point from the elf header. - -Signed-off-by: Mian Yousaf Kaukab ---- - arch/arm/mach-rockchip/make_fit_atf.py | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py -index 6b3d9201c9..b88a5e1f16 100755 ---- a/arch/arm/mach-rockchip/make_fit_atf.py -+++ b/arch/arm/mach-rockchip/make_fit_atf.py -@@ -53,7 +53,7 @@ DT_END=""" - }; - """ - --def append_atf_node(file, atf_index, phy_addr): -+def append_atf_node(file, atf_index, phy_addr, elf_entry): - """ - Append ATF DT node to input FIT dts file. - """ -@@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr): - print >> file, '\t\t\tcompression = "none";' - print >> file, '\t\t\tload = <0x%08x>;' % phy_addr - if atf_index == 1: -- print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr -+ print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry - print >> file, '\t\t};' - print >> file, '' - -@@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi - - with open(bl31_file_name) as bl31_file: - bl31 = ELFFile(bl31_file) -+ elf_entry = bl31.header['e_entry'] - for i in range(bl31.num_segments()): - seg = bl31.get_segment(i) - if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)): - paddr = seg.__getitem__(ELF_SEG_P_PADDR) - p= seg.__getitem__(ELF_SEG_P_PADDR) -- append_atf_node(fit_file, i+1, paddr) -+ append_atf_node(fit_file, i+1, paddr, elf_entry) - atf_cnt = i+1 - append_fdt_node(fit_file, dtbs_file_name) - print >> fit_file, '%s' % DT_IMAGES_NODE_END diff --git a/sources b/sources index d6e20e0..f83059a 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2018.09.tar.bz2) = 48cb60a53450e2820eda706917b61dae053677fecfe177e0d07968313d25c7e9d5ab2d7cc5625b54e4c823f5c8852f88387b94f404e307e737aaa5a2c887ad4a +SHA512 (u-boot-2018.11-rc3.tar.bz2) = 013bf1be169eaea88e44dec187eabc1c5806c1e813f0bf0a28da17f67b4d72b30708e55cb31767ceb7a171f6e1be07f092941009cff8d2cfdc51d3189b89111f diff --git a/tegra-efi_loader-simplify-ifdefs.patch b/tegra-efi_loader-simplify-ifdefs.patch deleted file mode 100644 index 1b39a4a..0000000 --- a/tegra-efi_loader-simplify-ifdefs.patch +++ /dev/null @@ -1,194 +0,0 @@ -From patchwork Thu Aug 30 21:43:43 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,V3,1/3] efi_loader: simplify ifdefs -X-Patchwork-Submitter: Stephen Warren -X-Patchwork-Id: 964248 -X-Patchwork-Delegate: agraf@suse.de -Message-Id: <20180830214345.2475-1-swarren@wwwdotorg.org> -To: Tom Rini -Cc: Stephen Warren , xypron.glpk@gmx.de, agraf@suse.de, - u-boot@lists.denx.de, Tom Warren -Date: Thu, 30 Aug 2018 15:43:43 -0600 -From: Stephen Warren -List-Id: U-Boot discussion - -From: Stephen Warren - -Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL -too. This simplifies the conditional. - -Signed-off-by: Stephen Warren ---- -v3: New patch. ---- - arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +- - arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 2 +- - arch/x86/lib/e820.c | 4 ++-- - include/efi_loader.h | 6 +++--- - 4 files changed, 7 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c -index 052e0708d454..be00bd55ab68 100644 ---- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c -+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c -@@ -835,7 +835,7 @@ int dram_init_banksize(void) - return 0; - } - --#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) -+#if CONFIG_IS_ENABLED(EFI_LOADER) - void efi_add_known_memory(void) - { - int i; -diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c -index fc9de73bcef4..c9c2c3f6d3e8 100644 ---- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c -+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c -@@ -135,7 +135,7 @@ remove_psci_node: - - fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, - *boot_code_size); --#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) -+#if CONFIG_IS_ENABLED(EFI_LOADER) - efi_add_memory_map((uintptr_t)&secondary_boot_code, - ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, - EFI_RESERVED_MEMORY_TYPE, false); -diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c -index 8b34f677d96d..d6ae2c4e9d77 100644 ---- a/arch/x86/lib/e820.c -+++ b/arch/x86/lib/e820.c -@@ -36,7 +36,7 @@ __weak unsigned int install_e820_map(unsigned int max_entries, - return 4; - } - --#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) -+#if CONFIG_IS_ENABLED(EFI_LOADER) - void efi_add_known_memory(void) - { - struct e820_entry e820[E820MAX]; -@@ -72,4 +72,4 @@ void efi_add_known_memory(void) - efi_add_memory_map(start, pages, type, false); - } - } --#endif /* defined(EFI_LOADER) && !defined(CONFIG_SPL_BUILD) */ -+#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */ -diff --git a/include/efi_loader.h b/include/efi_loader.h -index f162adfff7e2..b46babf9316f 100644 ---- a/include/efi_loader.h -+++ b/include/efi_loader.h -@@ -13,7 +13,7 @@ - #include - - /* No need for efi loader support in SPL */ --#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) -+#if CONFIG_IS_ENABLED(EFI_LOADER) - - #include - -@@ -460,7 +460,7 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor, - void *efi_bootmgr_load(struct efi_device_path **device_path, - struct efi_device_path **file_path); - --#else /* defined(EFI_LOADER) && !defined(CONFIG_SPL_BUILD) */ -+#else /* CONFIG_IS_ENABLED(EFI_LOADER) */ - - /* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */ - #define __efi_runtime_data -@@ -477,6 +477,6 @@ static inline void efi_set_bootdev(const char *dev, const char *devnr, - static inline void efi_net_set_dhcp_ack(void *pkt, int len) { } - static inline void efi_print_image_infos(void *pc) { } - --#endif /* CONFIG_EFI_LOADER && !CONFIG_SPL_BUILD */ -+#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */ - - #endif /* _EFI_LOADER_H */ - -From patchwork Thu Aug 30 21:43:44 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, V3, - 2/3] ARM: tegra: reserve unmapped RAM so EFI doesn't use it -X-Patchwork-Submitter: Stephen Warren -X-Patchwork-Id: 964249 -X-Patchwork-Delegate: agraf@suse.de -Message-Id: <20180830214345.2475-2-swarren@wwwdotorg.org> -To: Tom Rini -Cc: Stephen Warren , xypron.glpk@gmx.de, agraf@suse.de, - u-boot@lists.denx.de, Tom Warren -Date: Thu, 30 Aug 2018 15:43:44 -0600 -From: Stephen Warren -List-Id: U-Boot discussion - -From: Stephen Warren - -Tegra U-Boot ensures that board_get_usable_ram_top() never returns a value -over 4GB, since some peripherals can't access such addresses. However, on -systems with more than 2GB of RAM, RAM bank 1 does describe this extra -RAM, so that Linux (or whatever OS) can use it, subject to DMA -limitations. Since board_get_usable_ram_top() points at the top of RAM -bank 0, the memory locations describes by RAM bank 1 are not mapped by -U-Boot's MMU configuration, and so cannot be used for anything. - -For some completely inexplicable reason, U-Boot's EFI support ignores the -value returned by board_get_usable_ram_top(), and EFI memory allocation -routines will return values above U-Boot's RAM top. This causes U-Boot to -crash when it accesses that RAM, since it isn't mapped by the MMU. One -use-case where this happens is TFTP download of a file on Jetson TX1 -(p2371-2180). - -This change explicitly tells the EFI code that this extra RAM should not -be used, thus avoiding the crash. - -A previous attempt to make EFI honor board_get_usable_ram_top() was -rejected. So, this patch will need to be replicated for any board that -implements board_get_usable_ram_top(). - -Fixes: aa909462d018 ("efi_loader: efi_allocate_pages is too restrictive") -Signed-off-by: Stephen Warren ---- -v3: -- Use shift not divide for page count calculation. -- Enhance ifdef to avoid EFI references from SPL builds. -v2: -- Don't hard-code EFI page size. -- Register RAM as a boot services data rather than reserved. ---- - arch/arm/mach-tegra/board2.c | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 421a71b3014d..12257a42b51b 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -210,6 +211,19 @@ int board_early_init_f(void) - - int board_late_init(void) - { -+#if CONFIG_IS_ENABLED(EFI_LOADER) -+ if (gd->bd->bi_dram[1].start) { -+ /* -+ * Only bank 0 is below board_get_usable_ram_top(), so all of -+ * bank 1 is not mapped by the U-Boot MMU configuration, and so -+ * we must prevent EFI from using it. -+ */ -+ efi_add_memory_map(gd->bd->bi_dram[1].start, -+ gd->bd->bi_dram[1].size >> EFI_PAGE_SHIFT, -+ EFI_BOOT_SERVICES_DATA, false); -+ } -+#endif -+ - #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (tegra_cpu_is_non_secure()) { - printf("CPU is in NS mode\n"); - diff --git a/uboot-tools.spec b/uboot-tools.spec index 2ec81a8..4619abe 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc3 +%global candidate rc3 Name: uboot-tools -Version: 2018.09 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2018.11 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -23,18 +23,12 @@ Patch3: usb-kbd-fixes.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch11: rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch -Patch12: rockchip-make_fit_atf-use-elf-entry-point.patch -Patch13: rk3399-Rock960-Ficus-board-support.patch -Patch14: dragonboard-fixes.patch -Patch15: tegra186-jetson-tx2-disable-onboard-emmc.patch -Patch16: tegra-efi_loader-simplify-ifdefs.patch -Patch17: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch -Patch18: tegra-fix-tx1.patch -Patch19: sunxi-DT-A64-add-Pine64-LTS-support.patch - -# Upstream UEFI fixes -Patch20: uefi-fixes.patch +Patch11: rk3399-Rock960-Ficus-board-support.patch +Patch12: dragonboard-fixes.patch +Patch13: tegra186-jetson-tx2-disable-onboard-emmc.patch +Patch14: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch +Patch15: tegra-fix-tx1.patch +Patch16: sunxi-DT-A64-add-Pine64-LTS-support.patch BuildRequires: bc BuildRequires: dtc @@ -321,6 +315,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Oct 30 2018 Peter Robinson 2018.11-0.1.rc3 +- 2018.11 RC3 + * Sun Sep 30 2018 Pablo Greco - Added conditional to enable devtoolset-7-gcc for .el7 build (Arrfab) - Added conditional BR, python2-pyelftools is python-pyelftools in .el7 (Arrfab) diff --git a/uefi-fixes.patch b/uefi-fixes.patch deleted file mode 100644 index 8b53dc6..0000000 --- a/uefi-fixes.patch +++ /dev/null @@ -1,1017 +0,0 @@ -From 6aef5da1b5b6a649e64b00e3209a580359db9179 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 17 Sep 2018 13:54:33 +0200 -Subject: [PATCH 1/5] efi_loader: Align runtime section to 64kb - -The UEFI spec mandates that runtime sections are 64kb aligned to enable -support for 64kb page size OSs. - -This patch ensures that we extend the runtime section to 64kb to be spec -compliant. - -Signed-off-by: Alexander Graf ---- - lib/efi_loader/efi_memory.c | 20 +++++++++++++++++--- - 1 file changed, 17 insertions(+), 3 deletions(-) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index e2b40aa85b5..50c3515f5e6 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -@@ -519,6 +520,7 @@ __weak void efi_add_known_memory(void) - static void add_u_boot_and_runtime(void) - { - unsigned long runtime_start, runtime_end, runtime_pages; -+ unsigned long runtime_mask = EFI_PAGE_MASK; - unsigned long uboot_start, uboot_pages; - unsigned long uboot_stack_size = 16 * 1024 * 1024; - -@@ -527,10 +529,22 @@ static void add_u_boot_and_runtime(void) - uboot_pages = (gd->ram_top - uboot_start) >> EFI_PAGE_SHIFT; - efi_add_memory_map(uboot_start, uboot_pages, EFI_LOADER_DATA, false); - -- /* Add Runtime Services */ -- runtime_start = (ulong)&__efi_runtime_start & ~EFI_PAGE_MASK; -+#if defined(__aarch64__) -+ /* -+ * Runtime Services must be 64KiB aligned according to the -+ * "AArch64 Platforms" section in the UEFI spec (2.7+). -+ */ -+ -+ runtime_mask = SZ_64K - 1; -+#endif -+ -+ /* -+ * Add Runtime Services. We mark surrounding boottime code as runtime as -+ * well to fulfill the runtime alignment constraints but avoid padding. -+ */ -+ runtime_start = (ulong)&__efi_runtime_start & ~runtime_mask; - runtime_end = (ulong)&__efi_runtime_stop; -- runtime_end = (runtime_end + EFI_PAGE_MASK) & ~EFI_PAGE_MASK; -+ runtime_end = (runtime_end + runtime_mask) & ~runtime_mask; - runtime_pages = (runtime_end - runtime_start) >> EFI_PAGE_SHIFT; - efi_add_memory_map(runtime_start, runtime_pages, - EFI_RUNTIME_SERVICES_CODE, false); --- -2.19.0 - -From af3ef8121fbfff175e963e03b3eedf13df5ce548 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 17 Sep 2018 04:35:10 +0200 -Subject: [PATCH 2/5] efi_loader: Merge memory map entries - -We currently do not combine memory entries that are adjacent and have -the same attributes. The problem with that is that our memory map can -easily grow multiple hundreds of entries in a simple UEFI Shell -environment. - -So let's make sure we always combine all entries to make the memory -map as small as possible. That way every other piece of code that -loops through it should also gain some nice speed ups. - -Signed-off-by: Alexander Graf ---- - lib/efi_loader/efi_memory.c | 45 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 45 insertions(+) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index 50c3515f5e6..3fe014d9e72 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -67,9 +67,54 @@ static int efi_mem_cmp(void *priv, struct list_head *a, struct list_head *b) - return -1; - } - -+static uint64_t desc_get_end(struct efi_mem_desc *desc) -+{ -+ return desc->physical_start + (desc->num_pages << EFI_PAGE_SHIFT); -+} -+ - static void efi_mem_sort(void) - { -+ struct list_head *lhandle; -+ struct efi_mem_list *prevmem = NULL; -+ bool merge_again = true; -+ - list_sort(NULL, &efi_mem, efi_mem_cmp); -+ -+ /* Now merge entries that can be merged */ -+ while (merge_again) { -+ merge_again = false; -+ list_for_each(lhandle, &efi_mem) { -+ struct efi_mem_list *lmem; -+ struct efi_mem_desc *prev = &prevmem->desc; -+ struct efi_mem_desc *cur; -+ uint64_t pages; -+ -+ lmem = list_entry(lhandle, struct efi_mem_list, link); -+ if (!prevmem) { -+ prevmem = lmem; -+ continue; -+ } -+ -+ cur = &lmem->desc; -+ -+ if ((desc_get_end(cur) == prev->physical_start) && -+ (prev->type == cur->type) && -+ (prev->attribute == cur->attribute)) { -+ /* There is an existing map before, reuse it */ -+ pages = cur->num_pages; -+ prev->num_pages += pages; -+ prev->physical_start -= pages << EFI_PAGE_SHIFT; -+ prev->virtual_start -= pages << EFI_PAGE_SHIFT; -+ list_del(&lmem->link); -+ free(lmem); -+ -+ merge_again = true; -+ break; -+ } -+ -+ prevmem = lmem; -+ } -+ } - } - - /** efi_mem_carve_out - unmap memory region --- -2.19.0 - -From 2b72b771cc760ca85f47a561c4055817e8bc8f25 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Sun, 23 Sep 2018 16:26:58 +0200 -Subject: [PATCH 3/5] efi_loader: Fix loaded_image handle passing from EL3 - -When running in EL3 mode on AArch64, we have to first drop to EL2 -to execute a UEFI payload. When dropping down, the arguments to -the entry point have to stay identical to the ones for normal entry -though. - -In commit ea54ad59286 ("efi_loader: pass handle of loaded image") -we incorrectly changed that logic and had the el3 entry path diverge. -Fix it up by syncing it back to what it's supposed to be. - -Fixes: ea54ad59286 ("efi_loader: pass handle of loaded image") -Signed-off-by: Alexander Graf ---- - cmd/bootefi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/cmd/bootefi.c b/cmd/bootefi.c -index b60c151fb4a..f2939da3e1a 100644 ---- a/cmd/bootefi.c -+++ b/cmd/bootefi.c -@@ -373,7 +373,7 @@ static efi_status_t do_bootefi_exec(void *efi, - - /* Move into EL2 and keep running there */ - armv8_switch_to_el2((ulong)entry, -- (ulong)&loaded_image_info_obj.handle, -+ (ulong)loaded_image_info_obj.handle, - (ulong)&systab, 0, (ulong)efi_run_in_el2, - ES_TO_AARCH64); - --- -2.19.0 - -From fdbf589100f6b1f9e4e12a53a0d370d88de5f7e3 Mon Sep 17 00:00:00 2001 -From: Stephen Warren -Date: Tue, 31 Jul 2018 13:44:12 -0600 -Subject: [PATCH 4/5] efi_loader: don't allocate unusable RAM - -Some boards define a maximum usable RAM top that's more restrictive than -the ranges defined by U-Boot's memory bank definitions[1]. In this case, -the unusable RAM isn't mapped in the page tables, and so the EFI code must -not attempt to allocate RAM from outside the usable regions. Fix -efi_find_free_memory() to detect when max_addr is unconstrained or out of -range, and substitue a valid value. - -[1] For example, when some peripherals can't access RAM above 4GiB, it's -simplest to force U-Boot's ram_top to a smaller value to avoid dealing -with this issue more explicitly. However, the RAM bank definitions still -describe the unusable RAM so that the booted OS has access to it, since -the OS can typically deal with such restrictions in a more complex -manner. - -Fixes: aa909462d018 "efi_loader: efi_allocate_pages is too restrictive" -Cc: Heinrich Schuchardt -Cc: Alexander Graf -Signed-off-by: Stephen Warren ---- - lib/efi_loader/efi_memory.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index 3fe014d9e72..bf9d6963cbe 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -296,6 +296,9 @@ static uint64_t efi_find_free_memory(uint64_t len, uint64_t max_addr) - { - struct list_head *lhandle; - -+ if ((max_addr == -1ULL) || (max_addr > gd->ram_top)) -+ max_addr = gd->ram_top; -+ - list_for_each(lhandle, &efi_mem) { - struct efi_mem_list *lmem = list_entry(lhandle, - struct efi_mem_list, link); --- -2.19.0 - -From df3831a3833c2f477ef779a207cf973dd74ef0ee Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 28 Sep 2018 15:56:25 +0100 -Subject: [PATCH 5/5] efi_loader: remove efi_exit_caches() - -Since GRUB patch d0c070179d4d ("arm/efi: Switch to arm64 linux loader", -2018-07-09) we do not need a workaround for GRUB on 32bit ARM anymore. - -So let's eliminate function efi_exit_caches(). - -This will require Linux distributions to update grub-efi-arm to the GRUB -git HEAD (a tag containing the aforementioned GRUB patch is not available -yet). - -Signed-off-by: Heinrich Schuchardt -Signed-off-by: Peter Robinson ---- - lib/efi_loader/efi_boottime.c | 28 ---------------------------- - 1 file changed, 28 deletions(-) - -diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c -index 3935e4f1ce9..56557205d00 100644 ---- a/lib/efi_loader/efi_boottime.c -+++ b/lib/efi_loader/efi_boottime.c -@@ -27,14 +27,6 @@ LIST_HEAD(efi_obj_list); - /* List of all events */ - LIST_HEAD(efi_events); - --/* -- * If we're running on nasty systems (32bit ARM booting into non-EFI Linux) -- * we need to do trickery with caches. Since we don't want to break the EFI -- * aware boot path, only apply hacks when loading exiting directly (breaking -- * direct Linux EFI booting along the way - oh well). -- */ --static bool efi_is_direct_boot = true; -- - #ifdef CONFIG_ARM - /* - * The "gd" pointer lives in a register on ARM and AArch64 that we declare -@@ -1696,8 +1688,6 @@ static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, - EFI_ENTRY("%p, %p, %p", image_handle, exit_data_size, exit_data); - entry = info->reserved; - -- efi_is_direct_boot = false; -- - /* call the image! */ - if (setjmp(&info->exit_jmp)) { - /* -@@ -1811,21 +1801,6 @@ static efi_status_t EFIAPI efi_unload_image(efi_handle_t image_handle) - return EFI_EXIT(EFI_SUCCESS); - } - --/** -- * efi_exit_caches() - fix up caches for EFI payloads if necessary -- */ --static void efi_exit_caches(void) --{ --#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) -- /* -- * Grub on 32bit ARM needs to have caches disabled before jumping into -- * a zImage, but does not know of all cache layers. Give it a hand. -- */ -- if (efi_is_direct_boot) -- cleanup_before_linux(); --#endif --} -- - /** - * efi_exit_boot_services() - stop all boot services - * @image_handle: handle of the loaded image -@@ -1879,9 +1854,6 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle, - - board_quiesce_devices(); - -- /* Fix up caches for EFI payloads if necessary */ -- efi_exit_caches(); -- - /* This stops all lingering devices */ - bootm_disable_interrupts(); - --- -2.19.0 -From 05e6d0b69f30c6b902ab9a343f4c4080a837ebd2 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 4 Oct 2018 10:37:24 +0100 -Subject: [PATCH] efi_loader: fix simple network protocol - -We should not call eth_rx() before the network interface is initialized. -The services of the simple network protocol should check the state of -the network adapter. - -Provide a correctly aligned transmit buffer not depending on -CONFIG_EFI_LOADER_BOUNCE_BUFFER. - -Correct the unit test. - -Add and correct comments. - -Without this patch i.mx6 system Wandboard Quad rev B1 fails to execute -bootefi selftest. - -Signed-off-by: Heinrich Schuchardt -Signed-off-by: Peter Robinson ---- - lib/efi_loader/efi_net.c | 419 +++++++++++++++++++++++----- - lib/efi_selftest/efi_selftest_snp.c | 16 +- - 2 files changed, 359 insertions(+), 76 deletions(-) - -diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c -index 5a3d7be86cf..871c4c98228 100644 ---- a/lib/efi_loader/efi_net.c -+++ b/lib/efi_loader/efi_net.c -@@ -16,6 +16,8 @@ static const efi_guid_t efi_pxe_guid = EFI_PXE_GUID; - static struct efi_pxe_packet *dhcp_ack; - static bool new_rx_packet; - static void *new_tx_packet; -+static void *transmit_buffer; -+ - /* - * The notification function of this event is called in every timer cycle - * to check if a new network packet has been received. -@@ -37,22 +39,68 @@ struct efi_net_obj { - struct efi_pxe_mode pxe_mode; - }; - -+/* -+ * efi_net_start() - start the network interface -+ * -+ * This function implements the Start service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_start(struct efi_simple_network *this) - { -+ efi_status_t ret = EFI_SUCCESS; -+ - EFI_ENTRY("%p", this); - -- return EFI_EXIT(EFI_SUCCESS); -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ if (this->mode->state != EFI_NETWORK_STOPPED) -+ ret = EFI_ALREADY_STARTED; -+ else -+ this->mode->state = EFI_NETWORK_STARTED; -+out: -+ return EFI_EXIT(ret); - } - -+/* -+ * efi_net_stop() - stop the network interface -+ * -+ * This function implements the Stop service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this) - { -+ efi_status_t ret = EFI_SUCCESS; -+ - EFI_ENTRY("%p", this); - -- return EFI_EXIT(EFI_SUCCESS); -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ if (this->mode->state == EFI_NETWORK_STOPPED) -+ ret = EFI_NOT_STARTED; -+ else -+ this->mode->state = EFI_NETWORK_STOPPED; -+out: -+ return EFI_EXIT(ret); - } - - /* -- * Initialize network adapter and allocate transmit and receive buffers. -+ * efi_net_initialize() - initialize the network interface - * - * This function implements the Initialize service of the - * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -@@ -61,7 +109,7 @@ static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this) - * @this: pointer to the protocol instance - * @extra_rx: extra receive buffer to be allocated - * @extra_tx: extra transmit buffer to be allocated -- * @return: status code -+ * Return: status code - */ - static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, - ulong extra_rx, ulong extra_tx) -@@ -71,9 +119,10 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, - - EFI_ENTRY("%p, %lx, %lx", this, extra_rx, extra_tx); - -+ /* Check parameters */ - if (!this) { - r = EFI_INVALID_PARAMETER; -- goto error; -+ goto out; - } - - /* Setup packet buffers */ -@@ -86,32 +135,83 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, - ret = eth_init(); - if (ret < 0) { - eth_halt(); -+ this->mode->state = EFI_NETWORK_STOPPED; - r = EFI_DEVICE_ERROR; -+ goto out; -+ } else { -+ this->mode->state = EFI_NETWORK_INITIALIZED; - } -- --error: -+out: - return EFI_EXIT(r); - } - -+/* -+ * efi_net_reset() - reinitialize the network interface -+ * -+ * This function implements the Reset service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * @extended_verification: execute exhaustive verification -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_reset(struct efi_simple_network *this, - int extended_verification) - { - EFI_ENTRY("%p, %x", this, extended_verification); - -- return EFI_EXIT(EFI_SUCCESS); -+ return EFI_EXIT(EFI_CALL(efi_net_initialize(this, 0, 0))); - } - -+/* -+ * efi_net_shutdown() - shut down the network interface -+ * -+ * This function implements the Shutdown service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this) - { -+ efi_status_t ret = EFI_SUCCESS; -+ - EFI_ENTRY("%p", this); - -- return EFI_EXIT(EFI_SUCCESS); -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ eth_halt(); -+ this->mode->state = EFI_NETWORK_STOPPED; -+ -+out: -+ return EFI_EXIT(ret); - } - --static efi_status_t EFIAPI efi_net_receive_filters( -- struct efi_simple_network *this, u32 enable, u32 disable, -- int reset_mcast_filter, ulong mcast_filter_count, -- struct efi_mac_address *mcast_filter) -+/* -+ * efi_net_receive_filters() - mange multicast receive filters -+ * -+ * This function implements the ReceiveFilters service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * @enable: bit mask of receive filters to enable -+ * @disable: bit mask of receive filters to disable -+ * @reset_mcast_filter: true resets contents of the filters -+ * @mcast_filter_count: number of hardware MAC addresses in the new filters list -+ * @mcast_filter: list of new filters -+ * Return: status code -+ */ -+static efi_status_t EFIAPI efi_net_receive_filters -+ (struct efi_simple_network *this, u32 enable, u32 disable, -+ int reset_mcast_filter, ulong mcast_filter_count, -+ struct efi_mac_address *mcast_filter) - { - EFI_ENTRY("%p, %x, %x, %x, %lx, %p", this, enable, disable, - reset_mcast_filter, mcast_filter_count, mcast_filter); -@@ -119,15 +219,40 @@ static efi_status_t EFIAPI efi_net_receive_filters( - return EFI_EXIT(EFI_UNSUPPORTED); - } - --static efi_status_t EFIAPI efi_net_station_address( -- struct efi_simple_network *this, int reset, -- struct efi_mac_address *new_mac) -+/* -+ * efi_net_station_address() - set the hardware MAC address -+ * -+ * This function implements the StationAddress service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * @reset: if true reset the address to default -+ * @new_mac: new MAC address -+ * Return: status code -+ */ -+static efi_status_t EFIAPI efi_net_station_address -+ (struct efi_simple_network *this, int reset, -+ struct efi_mac_address *new_mac) - { - EFI_ENTRY("%p, %x, %p", this, reset, new_mac); - - return EFI_EXIT(EFI_UNSUPPORTED); - } - -+/* -+ * efi_net_statistics() - reset or collect statistics of the network interface -+ * -+ * This function implements the Statistics service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * @reset: if true, the statistics are reset -+ * @stat_size: size of the statistics table -+ * @stat_table: table to receive the statistics -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_statistics(struct efi_simple_network *this, - int reset, ulong *stat_size, - void *stat_table) -@@ -137,6 +262,19 @@ static efi_status_t EFIAPI efi_net_statistics(struct efi_simple_network *this, - return EFI_EXIT(EFI_UNSUPPORTED); - } - -+/* -+ * efi_net_mcastiptomac() - translate multicast IP address to MAC address -+ * -+ * This function implements the Statistics service of the -+ * EFI_SIMPLE_NETWORK_PROTOCOL. See the Unified Extensible Firmware Interface -+ * (UEFI) specification for details. -+ * -+ * @this: pointer to the protocol instance -+ * @ipv6: true if the IP address is an IPv6 address -+ * @ip: IP address -+ * @mac: MAC address -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_mcastiptomac(struct efi_simple_network *this, - int ipv6, - struct efi_ip_address *ip, -@@ -147,6 +285,19 @@ static efi_status_t EFIAPI efi_net_mcastiptomac(struct efi_simple_network *this, - return EFI_EXIT(EFI_INVALID_PARAMETER); - } - -+/** -+ * efi_net_nvdata() - read or write NVRAM -+ * -+ * This function implements the GetStatus service of the Simple Network -+ * Protocol. See the UEFI spec for details. -+ * -+ * @this: the instance of the Simple Network Protocol -+ * @readwrite: true for read, false for write -+ * @offset: offset in NVRAM -+ * @buffer_size: size of buffer -+ * @buffer: buffer -+ * Return: status code -+ */ - static efi_status_t EFIAPI efi_net_nvdata(struct efi_simple_network *this, - int read_write, ulong offset, - ulong buffer_size, char *buffer) -@@ -157,13 +308,42 @@ static efi_status_t EFIAPI efi_net_nvdata(struct efi_simple_network *this, - return EFI_EXIT(EFI_UNSUPPORTED); - } - -+/** -+ * efi_net_get_status() - get interrupt status -+ * -+ * This function implements the GetStatus service of the Simple Network -+ * Protocol. See the UEFI spec for details. -+ * -+ * @this: the instance of the Simple Network Protocol -+ * @int_status: interface status -+ * @txbuf: transmission buffer -+ */ - static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, - u32 *int_status, void **txbuf) - { -+ efi_status_t ret = EFI_SUCCESS; -+ - EFI_ENTRY("%p, %p, %p", this, int_status, txbuf); - - efi_timer_check(); - -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ switch (this->mode->state) { -+ case EFI_NETWORK_STOPPED: -+ ret = EFI_NOT_STARTED; -+ goto out; -+ case EFI_NETWORK_STARTED: -+ ret = EFI_DEVICE_ERROR; -+ goto out; -+ default: -+ break; -+ } -+ - if (int_status) { - /* We send packets synchronously, so nothing is outstanding */ - *int_status = EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT; -@@ -174,65 +354,103 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, - *txbuf = new_tx_packet; - - new_tx_packet = NULL; -- -- return EFI_EXIT(EFI_SUCCESS); -+out: -+ return EFI_EXIT(ret); - } - --static efi_status_t EFIAPI efi_net_transmit(struct efi_simple_network *this, -- size_t header_size, size_t buffer_size, void *buffer, -- struct efi_mac_address *src_addr, -- struct efi_mac_address *dest_addr, u16 *protocol) -+/** -+ * efi_net_transmit() - transmit a packet -+ * -+ * This function implements the Transmit service of the Simple Network Protocol. -+ * See the UEFI spec for details. -+ * -+ * @this: the instance of the Simple Network Protocol -+ * @header_size: size of the media header -+ * @buffer_size: size of the buffer to receive the packet -+ * @buffer: buffer to receive the packet -+ * @src_addr: source hardware MAC address -+ * @dest_addr: destination hardware MAC address -+ * @protocol: type of header to build -+ * Return: status code -+ */ -+static efi_status_t EFIAPI efi_net_transmit -+ (struct efi_simple_network *this, size_t header_size, -+ size_t buffer_size, void *buffer, -+ struct efi_mac_address *src_addr, -+ struct efi_mac_address *dest_addr, u16 *protocol) - { -+ efi_status_t ret = EFI_SUCCESS; -+ - EFI_ENTRY("%p, %lu, %lu, %p, %p, %p, %p", this, - (unsigned long)header_size, (unsigned long)buffer_size, - buffer, src_addr, dest_addr, protocol); - - efi_timer_check(); - -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ /* We do not support jumbo packets */ -+ if (buffer_size > PKTSIZE_ALIGN) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ - if (header_size) { -- /* We would need to create the header if header_size != 0 */ -- return EFI_EXIT(EFI_INVALID_PARAMETER); -+ /* -+ * TODO: We would need to create the header -+ * if header_size != 0 -+ */ -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ switch (this->mode->state) { -+ case EFI_NETWORK_STOPPED: -+ ret = EFI_NOT_STARTED; -+ goto out; -+ case EFI_NETWORK_STARTED: -+ ret = EFI_DEVICE_ERROR; -+ goto out; -+ default: -+ break; - } - --#ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER - /* Ethernet packets always fit, just bounce */ -- memcpy(efi_bounce_buffer, buffer, buffer_size); -- net_send_packet(efi_bounce_buffer, buffer_size); --#else -- net_send_packet(buffer, buffer_size); --#endif -+ memcpy(transmit_buffer, buffer, buffer_size); -+ net_send_packet(transmit_buffer, buffer_size); - - new_tx_packet = buffer; - -- return EFI_EXIT(EFI_SUCCESS); -+out: -+ return EFI_EXIT(ret); - } - --static void efi_net_push(void *pkt, int len) --{ -- new_rx_packet = true; -- wait_for_packet->is_signaled = true; --} -- --/* -- * Receive a packet from a network interface. -+/** -+ * efi_net_receive() - receive a packet from a network interface - * - * This function implements the Receive service of the Simple Network Protocol. - * See the UEFI spec for details. - * -- * @this the instance of the Simple Network Protocol -- * @header_size size of the media header -- * @buffer_size size of the buffer to receive the packet -- * @buffer buffer to receive the packet -- * @src_addr source MAC address -- * @dest_addr destination MAC address -- * @protocol protocol -- * @return status code -+ * @this: the instance of the Simple Network Protocol -+ * @header_size: size of the media header -+ * @buffer_size: size of the buffer to receive the packet -+ * @buffer: buffer to receive the packet -+ * @src_addr: source MAC address -+ * @dest_addr: destination MAC address -+ * @protocol: protocol -+ * Return: status code - */ --static efi_status_t EFIAPI efi_net_receive(struct efi_simple_network *this, -- size_t *header_size, size_t *buffer_size, void *buffer, -- struct efi_mac_address *src_addr, -- struct efi_mac_address *dest_addr, u16 *protocol) -+static efi_status_t EFIAPI efi_net_receive -+ (struct efi_simple_network *this, size_t *header_size, -+ size_t *buffer_size, void *buffer, -+ struct efi_mac_address *src_addr, -+ struct efi_mac_address *dest_addr, u16 *protocol) - { -+ efi_status_t ret = EFI_SUCCESS; - struct ethernet_hdr *eth_hdr; - size_t hdr_size = sizeof(struct ethernet_hdr); - u16 protlen; -@@ -240,14 +458,35 @@ static efi_status_t EFIAPI efi_net_receive(struct efi_simple_network *this, - EFI_ENTRY("%p, %p, %p, %p, %p, %p, %p", this, header_size, - buffer_size, buffer, src_addr, dest_addr, protocol); - -+ /* Execute events */ - efi_timer_check(); - -- if (!new_rx_packet) -- return EFI_EXIT(EFI_NOT_READY); -+ /* Check parameters */ -+ if (!this) { -+ ret = EFI_INVALID_PARAMETER; -+ goto out; -+ } -+ -+ switch (this->mode->state) { -+ case EFI_NETWORK_STOPPED: -+ ret = EFI_NOT_STARTED; -+ goto out; -+ case EFI_NETWORK_STARTED: -+ ret = EFI_DEVICE_ERROR; -+ goto out; -+ default: -+ break; -+ } -+ -+ if (!new_rx_packet) { -+ ret = EFI_NOT_READY; -+ goto out; -+ } - /* Check that we at least received an Ethernet header */ - if (net_rx_packet_len < sizeof(struct ethernet_hdr)) { - new_rx_packet = false; -- return EFI_EXIT(EFI_NOT_READY); -+ ret = EFI_NOT_READY; -+ goto out; - } - /* Fill export parameters */ - eth_hdr = (struct ethernet_hdr *)net_rx_packet; -@@ -265,18 +504,24 @@ static efi_status_t EFIAPI efi_net_receive(struct efi_simple_network *this, - if (protocol) - *protocol = protlen; - if (*buffer_size < net_rx_packet_len) { -- /* Packet doesn't fit, try again with bigger buf */ -+ /* Packet doesn't fit, try again with bigger buffer */ - *buffer_size = net_rx_packet_len; -- return EFI_EXIT(EFI_BUFFER_TOO_SMALL); -+ ret = EFI_BUFFER_TOO_SMALL; -+ goto out; - } - /* Copy packet */ - memcpy(buffer, net_rx_packet, net_rx_packet_len); - *buffer_size = net_rx_packet_len; - new_rx_packet = false; -- -- return EFI_EXIT(EFI_SUCCESS); -+out: -+ return EFI_EXIT(ret); - } - -+/** -+ * efi_net_set_dhcp_ack() - take note of a selected DHCP IP address -+ * -+ * This function is called by dhcp_handler(). -+ */ - void efi_net_set_dhcp_ack(void *pkt, int len) - { - int maxsize = sizeof(*dhcp_ack); -@@ -287,8 +532,22 @@ void efi_net_set_dhcp_ack(void *pkt, int len) - memcpy(dhcp_ack, pkt, min(len, maxsize)); - } - --/* -- * Check if a new network packet has been received. -+/** -+ * efi_net_push() - callback for received network packet -+ * -+ * This function is called when a network packet is received by eth_rx(). -+ * -+ * @pkt: network packet -+ * @len: length -+ */ -+static void efi_net_push(void *pkt, int len) -+{ -+ new_rx_packet = true; -+ wait_for_packet->is_signaled = true; -+} -+ -+/** -+ * efi_network_timer_notify() - check if a new network packet has been received - * - * This notification function is called in every timer cycle. - * -@@ -298,20 +557,34 @@ void efi_net_set_dhcp_ack(void *pkt, int len) - static void EFIAPI efi_network_timer_notify(struct efi_event *event, - void *context) - { -+ struct efi_simple_network *this = (struct efi_simple_network *)context; -+ - EFI_ENTRY("%p, %p", event, context); - -+ /* -+ * Some network drivers do not support calling eth_rx() before -+ * initialization. -+ */ -+ if (!this || this->mode->state != EFI_NETWORK_INITIALIZED) -+ goto out; -+ - if (!new_rx_packet) { - push_packet = efi_net_push; - eth_rx(); - push_packet = NULL; - } -+out: - EFI_EXIT(EFI_SUCCESS); - } - --/* This gets called from do_bootefi_exec(). */ -+/** -+ * efi_net_register() - register the simple network protocol -+ * -+ * This gets called from do_bootefi_exec(). -+ */ - efi_status_t efi_net_register(void) - { -- struct efi_net_obj *netobj; -+ struct efi_net_obj *netobj = NULL; - efi_status_t r; - - if (!eth_get_dev()) { -@@ -321,10 +594,15 @@ efi_status_t efi_net_register(void) - - /* We only expose the "active" eth device, so one is enough */ - netobj = calloc(1, sizeof(*netobj)); -- if (!netobj) { -- printf("ERROR: Out of memory\n"); -- return EFI_OUT_OF_RESOURCES; -- } -+ if (!netobj) -+ goto out_of_resources; -+ -+ /* Allocate an aligned transmit buffer */ -+ transmit_buffer = calloc(1, PKTSIZE_ALIGN + ARCH_DMA_MINALIGN); -+ if (!transmit_buffer) -+ goto out_of_resources; -+ transmit_buffer = (void *)ALIGN((uintptr_t)transmit_buffer, -+ ARCH_DMA_MINALIGN); - - /* Hook net up to the device list */ - efi_add_handle(&netobj->parent); -@@ -387,13 +665,13 @@ efi_status_t efi_net_register(void) - * iPXE is running at TPL_CALLBACK most of the time. Use a higher TPL. - */ - r = efi_create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_NOTIFY, -- efi_network_timer_notify, NULL, NULL, -+ efi_network_timer_notify, &netobj->net, NULL, - &network_timer_event); - if (r != EFI_SUCCESS) { - printf("ERROR: Failed to register network event\n"); - return r; - } -- /* Network is time critical, create event in every timer cyle */ -+ /* Network is time critical, create event in every timer cycle */ - r = efi_set_timer(network_timer_event, EFI_TIMER_PERIODIC, 0); - if (r != EFI_SUCCESS) { - printf("ERROR: Failed to set network timer\n"); -@@ -404,4 +682,9 @@ efi_status_t efi_net_register(void) - failure_to_add_protocol: - printf("ERROR: Failure to add protocol\n"); - return r; -+out_of_resources: -+ free(netobj); -+ /* free(transmit_buffer) not needed yet */ -+ printf("ERROR: Out of memory\n"); -+ return EFI_OUT_OF_RESOURCES; - } -diff --git a/lib/efi_selftest/efi_selftest_snp.c b/lib/efi_selftest/efi_selftest_snp.c -index 09bd53da82d..e10a34ba645 100644 ---- a/lib/efi_selftest/efi_selftest_snp.c -+++ b/lib/efi_selftest/efi_selftest_snp.c -@@ -103,7 +103,7 @@ static efi_status_t send_dhcp_discover(void) - struct dhcp p = {}; - - /* -- * Fill ethernet header -+ * Fill Ethernet header - */ - boottime->copy_mem(p.eth_hdr.et_dest, (void *)BROADCAST_MAC, ARP_HLEN); - boottime->copy_mem(p.eth_hdr.et_src, &net->mode->current_address, -@@ -229,19 +229,19 @@ static int setup(const efi_handle_t handle, - return EFI_ST_FAILURE; - } - /* -- * Initialize network adapter. -+ * Start network adapter. - */ -- ret = net->initialize(net, 0, 0); -- if (ret != EFI_SUCCESS) { -- efi_st_error("Failed to initialize network adapter\n"); -+ ret = net->start(net); -+ if (ret != EFI_SUCCESS && ret != EFI_ALREADY_STARTED) { -+ efi_st_error("Failed to start network adapter\n"); - return EFI_ST_FAILURE; - } - /* -- * Start network adapter. -+ * Initialize network adapter. - */ -- ret = net->start(net); -+ ret = net->initialize(net, 0, 0); - if (ret != EFI_SUCCESS) { -- efi_st_error("Failed to start network adapter\n"); -+ efi_st_error("Failed to initialize network adapter\n"); - return EFI_ST_FAILURE; - } - return EFI_ST_SUCCESS; --- -2.19.0 - From 1a5c77caf4a2a9cf4fc4994846376bc6e93ff5d9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 30 Oct 2018 15:10:00 +0000 Subject: [PATCH 002/351] update docs for i.MX --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 4619abe..4504362 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -288,7 +288,7 @@ cp -p board/warp/README builds/docs/README.warp cp -p board/warp7/README builds/docs/README.warp7 %files -%doc README doc/README.imximage doc/README.kwbimage doc/README.distro doc/README.gpt +%doc README doc/imx doc/README.kwbimage doc/README.distro doc/README.gpt %doc doc/README.odroid doc/README.rockchip doc/README.uefi doc/uImage.FIT doc/README.arm64 %doc doc/README.chromium builds/docs/* %{_bindir}/* From 5856918f2852e1f182f8ffadb326d246d163e53f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 4 Dec 2018 10:37:53 +0000 Subject: [PATCH 003/351] 2018.11, Build with ATF 2.0, Fix Hummingboard and CuBox-i devices --- make-tools-all-defconfig-a-thing.patch | 37 ++++++++ ...finite-loop-in-esdhc_send_cmd_common.patch | 85 +++++++++++++++++++ sources | 2 +- uboot-tools.spec | 13 ++- 4 files changed, 133 insertions(+), 4 deletions(-) create mode 100644 make-tools-all-defconfig-a-thing.patch create mode 100644 mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch diff --git a/make-tools-all-defconfig-a-thing.patch b/make-tools-all-defconfig-a-thing.patch new file mode 100644 index 0000000..1d6706d --- /dev/null +++ b/make-tools-all-defconfig-a-thing.patch @@ -0,0 +1,37 @@ +From 0775d5df2f7d076e7fdf15f517ca464623cce0fb Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 4 Dec 2018 10:27:54 +0000 +Subject: [PATCH] make tools-all defconfig a thing + +Signed-off-by: Peter Robinson +--- + configs/tools-all_defconfig | 3 +++ + tools/Makefile | 2 +- + 2 files changed, 4 insertions(+), 1 deletion(-) + create mode 100644 configs/tools-all_defconfig + +diff --git a/configs/tools-all_defconfig b/configs/tools-all_defconfig +new file mode 100644 +index 00000000000..be69bdf43ad +--- /dev/null ++++ b/configs/tools-all_defconfig +@@ -0,0 +1,3 @@ ++CONFIG_SYS_TEXT_BASE=0 ++CONFIG_FIT=y ++CONFIG_FIT_SIGNATURE=y +diff --git a/tools/Makefile b/tools/Makefile +index c93d17a42fd..29ff6ed221b 100644 +--- a/tools/Makefile ++++ b/tools/Makefile +@@ -125,7 +125,7 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o + fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o + file2include-objs := file2include.o + +-ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) ++ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),) + # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register + # the mxsimage support within tools/mxsimage.c . + HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS +-- +2.19.2 + diff --git a/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch b/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch new file mode 100644 index 0000000..703603c --- /dev/null +++ b/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch @@ -0,0 +1,85 @@ +From patchwork Mon Nov 19 12:31:53 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, + v2] mmc: fsl_esdhc: Avoid infinite loop in esdhc_send_cmd_common() +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 999792 +Message-Id: <1542630713-30355-1-git-send-email-festevam@gmail.com> +To: jh80.chung@samsung.com +Cc: baruch@tkos.co.il, u-boot@lists.denx.de +Date: Mon, 19 Nov 2018 10:31:53 -0200 +From: Fabio Estevam +List-Id: U-Boot discussion + +The following hang is observed on a Hummingboard 2 MicroSOM +i2eX iMX6D - rev 1.3 with no eMMC populated on board: + +U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000) +Trying to boot from MMC1 + +U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000) + +CPU: Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz) +CPU: Extended Commercial temperature grade (-20C to 105C) at 33C +Reset cause: POR +Board: MX6 HummingBoard2 +DRAM: 1 GiB +MMC: FSL_SDHC: 0, FSL_SDHC: 1 +Loading Environment from MMC... *** Warning - bad CRC, using default environment + +No panel detected: default to HDMI +Display: HDMI (1024x768) +In: serial +Out: serial +Err: serial +---> hangs + +which is caused by the following infinite loop inside esdhc_send_cmd_common() + + while (!(esdhc_read32(®s->irqstat) & flags)) + ; + +Instead of looping forever, provide an exit path so that a timeout +error can be propagated in the case irqstat does not report +any interrupts, which may happen when no eMMC is populated on +board. + +Reported-by: Ricardo Salveti +Signed-off-by: Fabio Estevam +--- +Changes since v1: +- Jump to the label out on error path (Baruch). + + drivers/mmc/fsl_esdhc.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c +index 3cdfa7f..b8d0b00 100644 +--- a/drivers/mmc/fsl_esdhc.c ++++ b/drivers/mmc/fsl_esdhc.c +@@ -396,6 +396,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, + uint irqstat; + u32 flags = IRQSTAT_CC | IRQSTAT_CTOE; + struct fsl_esdhc *regs = priv->esdhc_regs; ++ unsigned long start; + + #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111 + if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) +@@ -453,8 +454,13 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, + flags = IRQSTAT_BRR; + + /* Wait for the command to complete */ +- while (!(esdhc_read32(®s->irqstat) & flags)) +- ; ++ start = get_timer(0); ++ while (!(esdhc_read32(®s->irqstat) & flags)) { ++ if (get_timer(start) > 1000) { ++ err = -ETIMEDOUT; ++ goto out; ++ } ++ } + + irqstat = esdhc_read32(®s->irqstat); + diff --git a/sources b/sources index f83059a..109b052 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2018.11-rc3.tar.bz2) = 013bf1be169eaea88e44dec187eabc1c5806c1e813f0bf0a28da17f67b4d72b30708e55cb31767ceb7a171f6e1be07f092941009cff8d2cfdc51d3189b89111f +SHA512 (u-boot-2018.11.tar.bz2) = 1ea0bbb5f5e6d4c60b3a6bd345d1fa6e9da025daf36f47e8392bab34cb432c2e3633d903efb260f71fff87dffd6f2bf09ac900e96b3d4247073958d83b89ceff diff --git a/uboot-tools.spec b/uboot-tools.spec index 4504362..b925360 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +#global candidate rc3 Name: uboot-tools Version: 2018.11 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,6 +20,7 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch +Patch4: make-tools-all-defconfig-a-thing.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -29,6 +30,7 @@ Patch13: tegra186-jetson-tx2-disable-onboard-emmc.patch Patch14: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch Patch15: tegra-fix-tx1.patch Patch16: sunxi-DT-A64-add-Pine64-LTS-support.patch +Patch17: mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch BuildRequires: bc BuildRequires: dtc @@ -161,7 +163,7 @@ done %endif -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" defconfig V=1 O=builds/ +make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all_defconfig V=1 O=builds/ make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all V=1 O=builds/ %install @@ -315,6 +317,11 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 4 2018 Peter Robinson 2018.11-1 +- 2018.11 +- Build with ATF 2.0 +- Fix Hummingboard and CuBox-i devices + * Tue Oct 30 2018 Peter Robinson 2018.11-0.1.rc3 - 2018.11 RC3 From 1ecd9b94d2317ab09d243777a6e1add1b3bf5f8c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 4 Dec 2018 15:40:35 +0000 Subject: [PATCH 004/351] 2019.01 RC1, new devices --- aarch64-boards | 3 + arm-boards | 1 + make-tools-all-defconfig-a-thing.patch | 37 ---------- ...-the-DT-provided-by-the-Raspberry-Pi.patch | 36 +++++----- sources | 2 +- sunxi-DT-A64-add-Pine64-LTS-support.patch | 67 ------------------- ...ric-config-for-native-tools-building.patch | 63 +++++++++++++++++ uboot-tools.spec | 15 +++-- usb-kbd-fixes.patch | 22 +++--- 9 files changed, 106 insertions(+), 140 deletions(-) delete mode 100644 make-tools-all-defconfig-a-thing.patch delete mode 100644 sunxi-DT-A64-add-Pine64-LTS-support.patch create mode 100644 tools-add-a-generic-config-for-native-tools-building.patch diff --git a/aarch64-boards b/aarch64-boards index f882ee2..a65e72b 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -20,6 +20,7 @@ nanopi-k2 nanopi_neo2 nanopi_neo_plus2 odroid-c2 +orangepi_lite2 orangepi_one_plus orangepi_pc2 orangepi_prime @@ -30,7 +31,9 @@ p212 p2371-2180 p2771-0000-500 pine_h64 +pine64-lts pine64_plus +pinebook poplar rock960-rk3399 rpi_3 diff --git a/arm-boards b/arm-boards index 95c7f5a..4b1532a 100644 --- a/arm-boards +++ b/arm-boards @@ -17,6 +17,7 @@ Auxtek-T004 ba10_tv_box Bananapi bananapi_m2_berry +bananapi_m2_zero Bananapi_M2_Ultra Bananapro chiliboard diff --git a/make-tools-all-defconfig-a-thing.patch b/make-tools-all-defconfig-a-thing.patch deleted file mode 100644 index 1d6706d..0000000 --- a/make-tools-all-defconfig-a-thing.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 0775d5df2f7d076e7fdf15f517ca464623cce0fb Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 4 Dec 2018 10:27:54 +0000 -Subject: [PATCH] make tools-all defconfig a thing - -Signed-off-by: Peter Robinson ---- - configs/tools-all_defconfig | 3 +++ - tools/Makefile | 2 +- - 2 files changed, 4 insertions(+), 1 deletion(-) - create mode 100644 configs/tools-all_defconfig - -diff --git a/configs/tools-all_defconfig b/configs/tools-all_defconfig -new file mode 100644 -index 00000000000..be69bdf43ad ---- /dev/null -+++ b/configs/tools-all_defconfig -@@ -0,0 +1,3 @@ -+CONFIG_SYS_TEXT_BASE=0 -+CONFIG_FIT=y -+CONFIG_FIT_SIGNATURE=y -diff --git a/tools/Makefile b/tools/Makefile -index c93d17a42fd..29ff6ed221b 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -125,7 +125,7 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o - fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o - file2include-objs := file2include.o - --ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) -+ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),) - # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register - # the mxsimage support within tools/mxsimage.c . - HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS --- -2.19.2 - diff --git a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch index f3d20a6..0efd838 100644 --- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +++ b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -1,6 +1,6 @@ -From 44dd1455f924aa99e6bff0b124a9be0a85dcfa89 Mon Sep 17 00:00:00 2001 +From 7bf054b1b2e1e4105e94642e18fc74a63eccce97 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 4 Sep 2018 11:59:18 +0100 +Date: Tue, 4 Dec 2018 15:26:59 +0000 Subject: [PATCH] rpi: Use firmware provided device tree Signed-off-by: Peter Robinson @@ -13,70 +13,70 @@ Signed-off-by: Peter Robinson 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index d5bf01b76e..08f177f34a 100644 +index 66b0de31b60..9446465fdf7 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig -@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y +@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index a50a815759..0918c6c9ff 100644 +index ba75e52dda0..d324e2bdd33 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig -@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y +@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index ec395d29ed..22165bde53 100644 +index bbcdd91e909..46816cd1da7 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig -@@ -14,7 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y +@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index ac99f2000a..0ca298cd54 100644 +index 54b6303c2d8..f05ddf8f61f 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig -@@ -14,7 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y +@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index db42ffd135..0ec1365b1b 100644 +index e7820cb147b..d248873174d 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig -@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y +@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -- -2.19.0.rc0 +2.19.2 diff --git a/sources b/sources index 109b052..aa75875 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2018.11.tar.bz2) = 1ea0bbb5f5e6d4c60b3a6bd345d1fa6e9da025daf36f47e8392bab34cb432c2e3633d903efb260f71fff87dffd6f2bf09ac900e96b3d4247073958d83b89ceff +SHA512 (u-boot-2019.01-rc1.tar.bz2) = 415581e8aadd37210f5ccdaf4fb64f81b348d553f1b8732931a10aef89f55c0647f7d45fb759aa2ca0c4c624485269c15ee18b55a1cad73a48116af2d4634e40 diff --git a/sunxi-DT-A64-add-Pine64-LTS-support.patch b/sunxi-DT-A64-add-Pine64-LTS-support.patch deleted file mode 100644 index cf041af..0000000 --- a/sunxi-DT-A64-add-Pine64-LTS-support.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 82cc7aca5fb7c7103256229a3ead0b8075da5813 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 5 Sep 2018 17:00:25 +0100 -Subject: [PATCH] sunxi: DT: A64: add Pine64-LTS support - -The Pine64-LTS board is a new board version of the Pine64, though -actually it's a non-SoM version of the SoPine and its baseboard. -In contrast to the original Pine64 it features LPDDR3 DRAM, an eMMC -socket and a SPI flash chip for storing firmware (like U-Boot). -Add it as a variant to the existing SoPine defconfig, since from a -software point of view they are really not different. - -Signed-off-by: Andre Przywara -Signed-off-by: Peter Robinson ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun50i-a64-pine64-lts.dts | 13 +++++++++++++ - configs/sopine_baseboard_defconfig | 1 + - 3 files changed, 15 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-pine64-lts.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index ebfa227262..6cd440d6af 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -401,6 +401,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-nanopi-a64.dtb \ - sun50i-a64-olinuxino.dtb \ - sun50i-a64-orangepi-win.dtb \ -+ sun50i-a64-pine64-lts.dtb \ - sun50i-a64-pine64-plus.dtb \ - sun50i-a64-pine64.dtb \ - sun50i-a64-sopine-baseboard.dtb -diff --git a/arch/arm/dts/sun50i-a64-pine64-lts.dts b/arch/arm/dts/sun50i-a64-pine64-lts.dts -new file mode 100644 -index 0000000000..72d6961dc3 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pine64-lts.dts -@@ -0,0 +1,13 @@ -+/* -+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ * -+ * Copyright (c) 2018 ARM Ltd. -+ */ -+ -+#include "sun50i-a64-sopine-baseboard.dts" -+ -+/ { -+ model = "Pine64 LTS"; -+ compatible = "pine64,pine64-lts", "allwinner,sun50i-r18", -+ "allwinner,sun50i-a64"; -+}; -diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig -index 9ede081c08..eead38a1e3 100644 ---- a/configs/sopine_baseboard_defconfig -+++ b/configs/sopine_baseboard_defconfig -@@ -15,6 +15,7 @@ CONFIG_NR_DRAM_BANKS=1 - # CONFIG_SPL_DOS_PARTITION is not set - # CONFIG_SPL_EFI_PARTITION is not set - CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" -+CONFIG_OF_LIST="sun50i-a64-sopine-baseboard sun50i-a64-pine64-lts" - CONFIG_SUN8I_EMAC=y - CONFIG_USB_EHCI_HCD=y - CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y --- -2.19.0.rc0 - diff --git a/tools-add-a-generic-config-for-native-tools-building.patch b/tools-add-a-generic-config-for-native-tools-building.patch new file mode 100644 index 0000000..247457f --- /dev/null +++ b/tools-add-a-generic-config-for-native-tools-building.patch @@ -0,0 +1,63 @@ +From patchwork Tue Dec 4 11:24:51 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] tools: add a generic config for native tools building +X-Patchwork-Submitter: Otavio Salvador +X-Patchwork-Id: 1007581 +Message-Id: <20181204112452.10544-1-otavio@ossystems.com.br> +To: U-Boot Mailing List +Cc: Alexander Graf , Ryder Lee , + Otavio Salvador , + Vagrant Cascadian , + Heinrich Schuchardt , + Alexey Brodkin , + Michal Simek +Date: Tue, 4 Dec 2018 09:24:51 -0200 +From: Otavio Salvador +List-Id: U-Boot discussion + +The motivation for this is to allow distributions to distribute all +possible tools in a generic way, avoiding the need of specific tools +building for each machine. + +Especially on OpenEmbedded / Yocto Project ecosystem, it is very +common each BSP to end providing their specific tools when they need +to generate images for some SoC (e.g MX23 / MX28 in meta-freescale +case). + +Using this, we can package the tools doing: + +$: make tools-all_defconfig +$: make tools-all + +Signed-off-by: Otavio Salvador +--- + + configs/tools-all_defconfig | 3 +++ + tools/Makefile | 2 +- + 2 files changed, 4 insertions(+), 1 deletion(-) + create mode 100644 configs/tools-all_defconfig + +diff --git a/configs/tools-all_defconfig b/configs/tools-all_defconfig +new file mode 100644 +index 0000000000..be69bdf43a +--- /dev/null ++++ b/configs/tools-all_defconfig +@@ -0,0 +1,3 @@ ++CONFIG_SYS_TEXT_BASE=0 ++CONFIG_FIT=y ++CONFIG_FIT_SIGNATURE=y +diff --git a/tools/Makefile b/tools/Makefile +index c93d17a42f..29ff6ed221 100644 +--- a/tools/Makefile ++++ b/tools/Makefile +@@ -125,7 +125,7 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o + fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o + file2include-objs := file2include.o + +-ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) ++ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),) + # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register + # the mxsimage support within tools/mxsimage.c . + HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS diff --git a/uboot-tools.spec b/uboot-tools.spec index b925360..85f0022 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc3 +%global candidate rc1 Name: uboot-tools -Version: 2018.11 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2019.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,7 +20,7 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch -Patch4: make-tools-all-defconfig-a-thing.patch +Patch4: tools-add-a-generic-config-for-native-tools-building.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -29,8 +29,7 @@ Patch12: dragonboard-fixes.patch Patch13: tegra186-jetson-tx2-disable-onboard-emmc.patch Patch14: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch Patch15: tegra-fix-tx1.patch -Patch16: sunxi-DT-A64-add-Pine64-LTS-support.patch -Patch17: mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch +Patch16: mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch BuildRequires: bc BuildRequires: dtc @@ -317,6 +316,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 4 2018 Peter Robinson 2019.01-0.1-rc1 +- 2019.01 RC1 +- Enable new devices + * Tue Dec 4 2018 Peter Robinson 2018.11-1 - 2018.11 - Build with ATF 2.0 diff --git a/usb-kbd-fixes.patch b/usb-kbd-fixes.patch index 095029a..fb6a0e0 100644 --- a/usb-kbd-fixes.patch +++ b/usb-kbd-fixes.patch @@ -1,19 +1,19 @@ -From 1a8fa60aedff8a2368ac357a51dc15357065fabe Mon Sep 17 00:00:00 2001 +From a49845f198af088c4e5e0019edbf519344d78c97 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 5 Dec 2017 00:11:54 +0000 -Subject: [PATCH 3/5] usb kbd fixes +Date: Tue, 4 Dec 2018 15:29:14 +0000 +Subject: [PATCH] usb kbd fixes Signed-off-by: Peter Robinson --- - common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++++++++-------------- + common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++------------ include/console.h | 2 -- 2 files changed, 50 insertions(+), 18 deletions(-) diff --git a/common/usb_kbd.c b/common/usb_kbd.c -index 8cbdba6ac2..82ad93f6ca 100644 +index 020f0d4117f..47674ce4458 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c -@@ -516,25 +516,59 @@ static int probe_usb_keyboard(struct usb_device *dev) +@@ -518,25 +518,59 @@ static int probe_usb_keyboard(struct usb_device *dev) return error; stdinname = env_get("stdin"); @@ -87,8 +87,8 @@ index 8cbdba6ac2..82ad93f6ca 100644 +#endif } - #ifndef CONFIG_DM_USB -@@ -640,7 +674,7 @@ static int usb_kbd_remove(struct udevice *dev) + #if !CONFIG_IS_ENABLED(DM_USB) +@@ -642,7 +676,7 @@ static int usb_kbd_remove(struct udevice *dev) return 0; err: @@ -98,10 +98,10 @@ index 8cbdba6ac2..82ad93f6ca 100644 } diff --git a/include/console.h b/include/console.h -index cea29ed6dc..7dfd36d7d1 100644 +index e935c601f12..6382ec8e0d6 100644 --- a/include/console.h +++ b/include/console.h -@@ -57,8 +57,6 @@ int console_announce_r(void); +@@ -56,8 +56,6 @@ int console_announce_r(void); /* * CONSOLE multiplexing. */ @@ -111,5 +111,5 @@ index cea29ed6dc..7dfd36d7d1 100644 #endif -- -2.14.3 +2.19.2 From 7251616ca06cfd96f2e8efaeb60c314e70a719b0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 4 Dec 2018 15:50:20 +0000 Subject: [PATCH 005/351] fix name of README.odroid-c2 file --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 85f0022..814c0ac 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -272,7 +272,7 @@ install -p -m 0755 %{SOURCE5} $RPM_BUILD_ROOT/lib/kernel/install.d/ # Copy sone useful docs over mkdir -p builds/docs -cp -p board/amlogic/odroid-c2/README builds/docs/README.odroid-c2 +cp -p board/amlogic/odroid-c2/README.odroid-c2 builds/docs/README.odroid-c2 cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820 From 0af9e0dfb65ace536e438c7b5af7e4ccfab3a694 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 12 Dec 2018 06:57:00 +0000 Subject: [PATCH 006/351] ATF tweaks and fixes, Enable amarula_a64_relic, nanopi_a64, puma-rk3399 --- aarch64-boards | 7 +++++-- uboot-tools.spec | 14 +++++++++----- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index a65e72b..a744097 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,4 +1,5 @@ a64-olinuxino +amarula_a64_relic avnet_ultra96_rev1 bananapi_m64 dragonboard410c @@ -12,10 +13,11 @@ geekbox hikey khadas-vim khadas-vim2 -libretech-cc libretech_all_h3_cc_h5 +libretech-cc mvebu_espressobin-88f3720 mvebu_mcbin-88f8040 +nanopi_a64 nanopi-k2 nanopi_neo2 nanopi_neo_plus2 @@ -30,11 +32,12 @@ orangepi_zero_plus2 p212 p2371-2180 p2771-0000-500 -pine_h64 pine64-lts pine64_plus pinebook +pine_h64 poplar +puma-rk3399 rock960-rk3399 rpi_3 sopine_baseboard diff --git a/uboot-tools.spec b/uboot-tools.spec index 814c0ac..d079327 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -133,17 +133,17 @@ do echo "Building board: $board" mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino bananapi_m64 libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64_plus sopine_baseboard) + sun50i=(a64-olinuxino amarula_a64_relic bananapi_m64 nanopi_a64 orangepi_win pine64-lts pine64_plus pinebook sopine_baseboard libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_zero_plus2 orangepi_zero_plus) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ fi - sun50i=(orangepi_one_plus pine_h64) - if [[ " ${sun50i[*]} " == *" $board "* ]]; then + sun50h6=(orangepi_lite2 orangepi_one_plus pine_h64) + if [[ " ${sun50h6[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 firefly-rk3399 rock960-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 puma-rk3399 rock960-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -316,6 +316,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Dec 12 2018 Peter Robinson 2019.01-0.2-rc1 +- ATF tweaks and fixes +- Enable amarula_a64_relic, nanopi_a64, puma-rk3399 + * Tue Dec 4 2018 Peter Robinson 2019.01-0.1-rc1 - 2019.01 RC1 - Enable new devices From 8b18f846e5808b269485542e21ed304221976bcb Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 18 Dec 2018 13:56:46 +0000 Subject: [PATCH 007/351] 2019.01 RC2 --- rk3399-Rock960-Ficus-board-support.patch | 2975 ----------------- sources | 2 +- ...ric-config-for-native-tools-building.patch | 63 - uboot-tools.spec | 14 +- 4 files changed, 9 insertions(+), 3045 deletions(-) delete mode 100644 rk3399-Rock960-Ficus-board-support.patch delete mode 100644 tools-add-a-generic-config-for-native-tools-building.patch diff --git a/rk3399-Rock960-Ficus-board-support.patch b/rk3399-Rock960-Ficus-board-support.patch deleted file mode 100644 index 7562922..0000000 --- a/rk3399-Rock960-Ficus-board-support.patch +++ /dev/null @@ -1,2975 +0,0 @@ -From patchwork Thu Sep 27 19:02:58 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, - 1/4] arm: dts: rockchip: add some common pin-settings to rk3399 -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 975858 -X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com -Message-Id: <20180927190301.9642-2-manivannan.sadhasivam@linaro.org> -To: sjg@chromium.org, - philipp.tomsich@theobroma-systems.com -Cc: Randy Li , tom@vamrs.com, daniel.lezcano@linaro.org, - amit.kucheria@linaro.org, dev@vamrs.com, u-boot@lists.denx.de, - Manivannan Sadhasivam , stephen@vamrs.com -Date: Fri, 28 Sep 2018 00:32:58 +0530 -From: Manivannan Sadhasivam -List-Id: U-Boot discussion - -From: Randy Li - -Those pins would be used by many boards. - -Commit grabbed from Linux: - -commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f -Author: Randy Li -Date: Thu Jun 21 21:32:10 2018 +0800 - - arm64: dts: rockchip: add some common pin-settings to rk3399 - - Those pins would be used by many boards. - - Signed-off-by: Randy Li - Signed-off-by: Heiko Stuebner - -Acked-by: Philipp Tomsich -Signed-off-by: Randy Li -Signed-off-by: Heiko Stuebner -Signed-off-by: Ezequiel Garcia ---- - -Changes in v3: None - -Changes in v2: None - - arch/arm/dts/rk3399.dtsi | 55 +++++++++++++++++++++++++++++++++++----- - 1 file changed, 49 insertions(+), 6 deletions(-) - -diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi -index 83c257b1228..8349451b03d 100644 ---- a/arch/arm/dts/rk3399.dtsi -+++ b/arch/arm/dts/rk3399.dtsi -@@ -1602,19 +1602,49 @@ - drive-strength = <12>; - }; - -+ pcfg_pull_none_13ma: pcfg-pull-none-13ma { -+ bias-disable; -+ drive-strength = <13>; -+ }; -+ -+ pcfg_pull_none_18ma: pcfg-pull-none-18ma { -+ bias-disable; -+ drive-strength = <18>; -+ }; -+ -+ pcfg_pull_none_20ma: pcfg-pull-none-20ma { -+ bias-disable; -+ drive-strength = <20>; -+ }; -+ -+ pcfg_pull_up_2ma: pcfg-pull-up-2ma { -+ bias-pull-up; -+ drive-strength = <2>; -+ }; -+ - pcfg_pull_up_8ma: pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <8>; - }; - -+ pcfg_pull_up_18ma: pcfg-pull-up-18ma { -+ bias-pull-up; -+ drive-strength = <18>; -+ }; -+ -+ pcfg_pull_up_20ma: pcfg-pull-up-20ma { -+ bias-pull-up; -+ drive-strength = <20>; -+ }; -+ - pcfg_pull_down_4ma: pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <4>; - }; - -- pcfg_pull_up_2ma: pcfg-pull-up-2ma { -- bias-pull-up; -- drive-strength = <2>; -+ pcfg_pull_down_8ma: pcfg-pull-down-8ma { -+ bias-pull-down; -+ drive-strength = <8>; - }; - - pcfg_pull_down_12ma: pcfg-pull-down-12ma { -@@ -1622,9 +1652,22 @@ - drive-strength = <12>; - }; - -- pcfg_pull_none_13ma: pcfg-pull-none-13ma { -- bias-disable; -- drive-strength = <13>; -+ pcfg_pull_down_18ma: pcfg-pull-down-18ma { -+ bias-pull-down; -+ drive-strength = <18>; -+ }; -+ -+ pcfg_pull_down_20ma: pcfg-pull-down-20ma { -+ bias-pull-down; -+ drive-strength = <20>; -+ }; -+ -+ pcfg_output_high: pcfg-output-high { -+ output-high; -+ }; -+ -+ pcfg_output_low: pcfg-output-low { -+ output-low; - }; - - clock { - -From patchwork Thu Sep 27 19:02:59 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, - 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 975861 -X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com -Message-Id: <20180927190301.9642-3-manivannan.sadhasivam@linaro.org> -To: sjg@chromium.org, - philipp.tomsich@theobroma-systems.com -Cc: tom@vamrs.com, daniel.lezcano@linaro.org, amit.kucheria@linaro.org, - dev@vamrs.com, u-boot@lists.denx.de, - Manivannan Sadhasivam , stephen@vamrs.com -Date: Fri, 28 Sep 2018 00:32:59 +0530 -From: Manivannan Sadhasivam -List-Id: U-Boot discussion - -Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs. -It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition) -96Boards. - -Below are some of the key differences between both Rock960 and Ficus -boards: - -1. Different host enable GPIO for USB -2. Different power and reset GPIO for PCI-E -3. No Ethernet port on Rock960 - -The common board support will be utilized by both boards. The device -tree has been organized in such a way that only the properties which -differ between both boards are placed in the board specific dts and -the reset of the nodes are placed in common dtsi file. - -Signed-off-by: Manivannan Sadhasivam -[Added instructions for SD card boot] -Signed-off-by: Ezequiel Garcia ---- - -Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL - -Changes in v2: None - - arch/arm/dts/rk3399-rock960.dtsi | 506 ++++++++++++++++++++ - arch/arm/mach-rockchip/rk3399/Kconfig | 26 + - board/vamrs/rock960_rk3399/Kconfig | 15 + - board/vamrs/rock960_rk3399/MAINTAINERS | 6 + - board/vamrs/rock960_rk3399/Makefile | 6 + - board/vamrs/rock960_rk3399/README | 152 ++++++ - board/vamrs/rock960_rk3399/rock960-rk3399.c | 50 ++ - include/configs/rock960_rk3399.h | 15 + - 8 files changed, 776 insertions(+) - create mode 100644 arch/arm/dts/rk3399-rock960.dtsi - create mode 100644 board/vamrs/rock960_rk3399/Kconfig - create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS - create mode 100644 board/vamrs/rock960_rk3399/Makefile - create mode 100644 board/vamrs/rock960_rk3399/README - create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c - create mode 100644 include/configs/rock960_rk3399.h - -diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi -new file mode 100644 -index 00000000000..51644d6d02d ---- /dev/null -+++ b/arch/arm/dts/rk3399-rock960.dtsi -@@ -0,0 +1,506 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2018 Linaro Ltd. -+ */ -+ -+#include -+#include -+#include "rk3399.dtsi" -+ -+/ { -+ vcc1v8_s0: vcc1v8-s0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc1v8_s0"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ vcc3v3_sys: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+ vcc3v3_pcie: vcc3v3-pcie-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_drv>; -+ regulator-boot-on; -+ regulator-name = "vcc3v3_pcie"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ vcc5v0_host: vcc5v0-host-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host_vbus_drv>; -+ regulator-name = "vcc5v0_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+ vdd_log: vdd-log { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm2 0 25000 0>; -+ regulator-name = "vdd_log"; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-rising-time-ns = <168>; -+ i2c-scl-falling-time-ns = <4>; -+ status = "okay"; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc_sys>; -+ status = "okay"; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc_sys>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc_sys>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc_sys>; -+ vcc10-supply = <&vcc_sys>; -+ vcc11-supply = <&vcc_sys>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vddio-supply = <&vcc_1v8>; -+ -+ regulators { -+ vdd_center: DCDC_REG1 { -+ regulator-name = "vdd_center"; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc1v8_dvp: LDO_REG1 { -+ regulator-name = "vcc1v8_dvp"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcca1v8_hdmi: LDO_REG2 { -+ regulator-name = "vcca1v8_hdmi"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcca_1v8: LDO_REG3 { -+ regulator-name = "vcca_1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG4 { -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc3v0_sd: LDO_REG5 { -+ regulator-name = "vcc3v0_sd"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca0v9_hdmi: LDO_REG7 { -+ regulator-name = "vcca0v9_hdmi"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <900000>; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-name = "vcc_3v0"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+}; -+ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&i2c3 { -+ status = "okay"; -+}; -+ -+&i2c4 { -+ status = "okay"; -+}; -+ -+&io_domains { -+ bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ -+ audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ -+ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ -+ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ -+ status = "okay"; -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ num-lanes = <4>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn_cpm>; -+ vpcie3v3-supply = <&vcc3v3_pcie>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ pmu1830-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ sdmmc { -+ sdmmc_bus1: sdmmc-bus1 { -+ rockchip,pins = -+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = -+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = -+ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = -+ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = -+ <1 21 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ vsel1_gpio: vsel1-gpio { -+ rockchip,pins = -+ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_gpio: vsel2-gpio { -+ rockchip,pins = -+ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&pwm3 { -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ mmc-hs400-1_8v; -+ mmc-hs400-enhanced-strobe; -+ non-removable; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ clock-frequency = <100000000>; -+ clock-freq-min-max = <100000 100000000>; -+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ sd-uhs-sdr104; -+ vqmmc-supply = <&vcc_sd>; -+ card-detect-delay = <800>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_xfer &uart0_cts>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+}; -+ -+&u2phy0_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&u2phy1_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&u2phy0_otg { -+ status = "okay"; -+}; -+ -+&u2phy1_otg { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig -index 415466a49bb..8f18e33c76f 100644 ---- a/arch/arm/mach-rockchip/rk3399/Kconfig -+++ b/arch/arm/mach-rockchip/rk3399/Kconfig -@@ -28,6 +28,31 @@ config TARGET_PUMA_RK3399 - * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI - * SPI, I2C, I2S, UART, GPIO, ... - -+config TARGET_ROCK960_RK3399 -+ bool "Vamrs Limited Rock960 board family" -+ help -+ Support for Rock960 board family by Vamrs Limited. This board -+ family consists of Rock960 (Consumer Edition) and Ficus -+ (Enterprise Edition) 96Boards. -+ -+ Common features implemented on both boards: -+ * Rockchip RK3399 SoC (2xCortex A72, 4xCortex A53, ARM Mali T860MP4) -+ * 16/32GB eMMC, uSD slot -+ * HDMI/DP/MIPI -+ * 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons -+ -+ Additional features of Rock960: -+ * 2GiB/4GiB LPDDR3 RAM -+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only), -+ 1x USB 3.0 type C OTG -+ -+ Additional features of Ficus: -+ * 2GiB/4GiB DDR3 RAM -+ * Ethernet -+ * Dual SATA -+ * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only), -+ 1x USB 3.0 type C OTG -+ - endchoice - - config SYS_SOC -@@ -38,5 +63,6 @@ config SYS_MALLOC_F_LEN - - source "board/rockchip/evb_rk3399/Kconfig" - source "board/theobroma-systems/puma_rk3399/Kconfig" -+source "board/vamrs/rock960_rk3399/Kconfig" - - endif -diff --git a/board/vamrs/rock960_rk3399/Kconfig b/board/vamrs/rock960_rk3399/Kconfig -new file mode 100644 -index 00000000000..cacc53f3780 ---- /dev/null -+++ b/board/vamrs/rock960_rk3399/Kconfig -@@ -0,0 +1,15 @@ -+if TARGET_ROCK960_RK3399 -+ -+config SYS_BOARD -+ default "rock960_rk3399" -+ -+config SYS_VENDOR -+ default "vamrs" -+ -+config SYS_CONFIG_NAME -+ default "rock960_rk3399" -+ -+config BOARD_SPECIFIC_OPTIONS # dummy -+ def_bool y -+ -+endif -diff --git a/board/vamrs/rock960_rk3399/MAINTAINERS b/board/vamrs/rock960_rk3399/MAINTAINERS -new file mode 100644 -index 00000000000..9f3fe75f4fb ---- /dev/null -+++ b/board/vamrs/rock960_rk3399/MAINTAINERS -@@ -0,0 +1,6 @@ -+ROCK960-RK3399 -+M: Manivannan Sadhasivam manivannan.sadhasivam@linaro.org -+S: Maintained -+F: board/rockchip/rock960_rk3399 -+F: include/configs/rock960_rk3399.h -+F: configs/rock960-rk3399_defconfig -diff --git a/board/vamrs/rock960_rk3399/Makefile b/board/vamrs/rock960_rk3399/Makefile -new file mode 100644 -index 00000000000..6c3e475b3a8 ---- /dev/null -+++ b/board/vamrs/rock960_rk3399/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# Copyright (C) 2018 Manivannan Sadhasivam -+# -+ -+obj-y += rock960-rk3399.o -diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README -new file mode 100644 -index 00000000000..d14399090e2 ---- /dev/null -+++ b/board/vamrs/rock960_rk3399/README -@@ -0,0 +1,152 @@ -+Contents -+======== -+ -+1. Introduction -+2. Get the Source and prebuild binary -+3. Compile the U-Boot -+4. Compile the rkdeveloptool -+5. Package the image -+ 5.1. Package the image for U-Boot SPL(option 1) -+ 5.2. Package the image for Rockchip miniloader(option 2) -+6. Bootloader storage options -+7. Flash the image to eMMC -+ 7.1. Flash the image with U-Boot SPL(option 1) -+ 7.2. Flash the image with Rockchip miniloader(option 2) -+8. Create a bootable SD/MMC -+9. And that is it -+ -+Introduction -+============ -+ -+Rock960 board family consists of Rock960 (Consumer Edition) and -+Ficus (Enterprise Edition) 96Boards featuring Rockchip RK3399 SoC. -+ -+Common features implemented on both boards: -+ * CPU: ARMv8 64bit Big-Little architecture, -+ * Big: dual-core Cortex-A72 -+ * Little: quad-core Cortex-A53 -+ * IRAM: 200KB -+ * eMMC: 16/32GB eMMC 5.1 -+ * PMU: RK808 -+ * SD/MMC -+ * Display: HDMI/DP/MIPI -+ * Low Speed Expansion Connector -+ * High Speed Expansion Connector -+ -+Additional features of Rock960: -+ * DRAM: 2GB/4GB LPDDR3 @ 1866MHz -+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only), -+ 1x USB 3.0 type C OTG -+ -+Additional features of Ficus: -+ * DRAM: 2GB/4GB DDR3 @ 1600MHz -+ * Ethernet -+ * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only), -+ 1x USB 3.0 type C OTG -+ -+Here is the step-by-step to boot to U-Boot on Rock960 boards. -+ -+Get the Source and prebuild binary -+================================== -+ -+ > git clone https://github.com/96rocks/rkbin.git -+ > git clone https://github.com/rockchip-linux/rkdeveloptool.git -+ -+Compile the U-Boot -+================== -+ -+ > cd ../u-boot -+ > cp ../rkbin/rk33/rk3399_bl31_v1.00.elf ./bl31.elf -+ > export ARCH=arm64 -+ > export CROSS_COMPILE=aarch64-linux-gnu- -+ > make rock960-rk3399_defconfig -+ > make -+ > make u-boot.itb -+ -+Compile the rkdeveloptool -+========================= -+ -+Follow instructions in latest README -+ > cd ../rkdeveloptool -+ > autoreconf -i -+ > ./configure -+ > make -+ > sudo make install -+ -+Package the image -+================= -+ -+Package the image for U-Boot SPL(option 1) -+-------------------------------- -+ > cd .. -+ > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img -+ -+ Get idbspl.img in this step. -+ -+Package the image for Rockchip miniloader(option 2) -+------------------------------------------ -+ > cd ../rkbin -+ > ./tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img 0x200000 -+ -+ > ../u-boot/tools/mkimage -n rk3399 -T rksd -d rk3399_ddr_933MHz_v1.08.bin idbloader.img -+ > cat ./rk33/rk3399_miniloader_v1.06.bin >> idbloader.img -+ -+ Get uboot.img and idbloader.img in this step. -+ -+Bootloader storage options -+========================== -+ -+There are a few different storage options for the bootloader. -+This document explores two of these: eMMC and removable SD/MMC. -+ -+Flash the image to eMMC -+======================= -+ -+Flash the image with U-Boot SPL(option 1) -+------------------------------- -+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then: -+ > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin -+ > rkdeveloptool wl 64 u-boot/idbspl.img -+ > rkdeveloptool wl 0x4000 u-boot/u-boot.itb -+ > rkdeveloptool rd -+ -+Flash the image with Rockchip miniloader(option 2) -+---------------------------------------- -+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then: -+ > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin -+ > rkdeveloptool wl 0x40 idbloader.img -+ > rkdeveloptool wl 0x4000 uboot.img -+ > rkdeveloptool wl 0x6000 ./img/rk3399/trust.img -+ > rkdeveloptool rd -+ -+Create a bootable SD/MMC -+======================== -+ -+The idbspl.img contains the first stage, and the u-boot.img the second stage. -+As explained in the Rockchip partition table reference [1], the first stage -+(aka loader1) start sector is 64, and the second stage start sector is 16384. -+ -+Each sector is 512 bytes, which means the first stage offset is 32 KiB, -+and the second stage offset is 8 MiB. -+ -+Note: the second stage location is actually not as per the spec, -+but defined by the SPL. Mainline SPL defines an 8 MiB offset for the second -+stage. -+ -+Assuming the SD card is exposed by device /dev/mmcblk0, the commands -+to write the two stages are: -+ -+ > dd if=idbspl.img of=/dev/mmcblk0 bs=1k seek=32 -+ > dd if=u-boot.itb of=/dev/mmcblk0 bs=1k seek=8192 -+ -+Setting up the kernel and rootfs is beyond the scope of this document. -+ -+And that is it -+============== -+ -+You should be able to get U-Boot log in console/UART2(baurdrate 1500000) -+ -+For more detail, please reference [2]. -+ -+[1] http://opensource.rock-chips.com/wiki_Partitions -+[2] http://opensource.rock-chips.com/wiki_Boot_option -diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c -new file mode 100644 -index 00000000000..d3775b22191 ---- /dev/null -+++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c -@@ -0,0 +1,50 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 Manivannan Sadhasivam -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+int board_init(void) -+{ -+ int ret; -+ -+ ret = regulators_enable_boot_on(false); -+ if (ret) -+ debug("%s: Cannot enable boot on regulator\n", __func__); -+ -+ return 0; -+} -+ -+void spl_board_init(void) -+{ -+ struct udevice *pinctrl; -+ int ret; -+ -+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); -+ if (ret) { -+ debug("%s: Cannot find pinctrl device\n", __func__); -+ goto err; -+ } -+ -+ /* Enable debug UART */ -+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG); -+ if (ret) { -+ debug("%s: Failed to set up console UART\n", __func__); -+ goto err; -+ } -+ -+ preloader_console_init(); -+ return; -+err: -+ printf("%s: Error %d\n", __func__, ret); -+ -+ /* No way to report error here */ -+ hang(); -+} -diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h -new file mode 100644 -index 00000000000..746d24cbff5 ---- /dev/null -+++ b/include/configs/rock960_rk3399.h -@@ -0,0 +1,15 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 Manivannan Sadhasivam -+ */ -+ -+#ifndef __ROCK960_RK3399_H -+#define __ROCK960_RK3399_H -+ -+#include -+ -+#define CONFIG_SYS_MMC_ENV_DEV 1 -+ -+#define SDRAM_BANK_SIZE (2UL << 30) -+ -+#endif - -From patchwork Thu Sep 27 19:03:00 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,3/4] rockchip: rk3399: Add Rock960 CE board support -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 975860 -X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com -Message-Id: <20180927190301.9642-4-manivannan.sadhasivam@linaro.org> -To: sjg@chromium.org, - philipp.tomsich@theobroma-systems.com -Cc: tom@vamrs.com, daniel.lezcano@linaro.org, amit.kucheria@linaro.org, - dev@vamrs.com, u-boot@lists.denx.de, - Manivannan Sadhasivam , stephen@vamrs.com -Date: Fri, 28 Sep 2018 00:33:00 +0530 -From: Manivannan Sadhasivam -List-Id: U-Boot discussion - -Add board support for Rock960 CE board from Vamrs. This board utilizes -common Rock960 family support. - -Following peripherals are tested and known to work: -* USB 2.0 -* MMC - -This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which -is being used on the board. - -Signed-off-by: Manivannan Sadhasivam ---- - -Changes in v3: - -* Add config options for USB to Ethernet and USB2 PHY - -Changes in v2: - -* Added missing config options for USB/uSD -* Fixed the commit description for DDR speed - - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-rock960.dts | 45 + - .../arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi | 1536 +++++++++++++++++ - configs/rock960-rk3399_defconfig | 69 + - 4 files changed, 1651 insertions(+) - create mode 100644 arch/arm/dts/rk3399-rock960.dts - create mode 100644 arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi - create mode 100644 configs/rock960-rk3399_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index ebfa2272627..9b891826b73 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -51,6 +51,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3399-puma-ddr1333.dtb \ - rk3399-puma-ddr1600.dtb \ - rk3399-puma-ddr1866.dtb \ -+ rk3399-rock960.dtb \ - rv1108-evb.dtb - dtb-$(CONFIG_ARCH_MESON) += \ - meson-gxbb-nanopi-k2.dtb \ -diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts -new file mode 100644 -index 00000000000..25c58b42611 ---- /dev/null -+++ b/arch/arm/dts/rk3399-rock960.dts -@@ -0,0 +1,45 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 Manivannan Sadhasivam -+ */ -+ -+/dts-v1/; -+#include "rk3399-rock960.dtsi" -+#include "rk3399-sdram-lpddr3-2GB-1600.dtsi" -+ -+/ { -+ model = "96boards Rock960"; -+ compatible = "vamrs,rock960", "rockchip,rk3399"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+}; -+ -+&pcie0 { -+ ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; -+}; -+ -+&pinctrl { -+ pcie { -+ pcie_drv: pcie-drv { -+ rockchip,pins = -+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb2 { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = -+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&vcc3v3_pcie { -+ gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; -+}; -+ -+&vcc5v0_host { -+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; -+}; -diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi -new file mode 100644 -index 00000000000..d14e833d228 ---- /dev/null -+++ b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi -@@ -0,0 +1,1536 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd -+ * (C) Copyright 2018 Manivannan Sadhasivam -+ */ -+ -+&dmc { -+ rockchip,sdram-params = < -+ 0x1 -+ 0xa -+ 0x3 -+ 0x2 -+ 0x2 -+ 0x0 -+ 0xf -+ 0xf -+ 1 -+ 0x1d191519 -+ 0x14040808 -+ 0x00000002 -+ 0x00006226 -+ 0x00000054 -+ 0x00000000 -+ 0x1 -+ 0xa -+ 0x3 -+ 0x2 -+ 0x2 -+ 0x0 -+ 0xf -+ 0xf -+ 1 -+ 0x1d191519 -+ 0x14040808 -+ 0x00000002 -+ 0x00006226 -+ 0x00000054 -+ 0x00000000 -+ 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0x01010000 -+ 0x00000000 -+ >; -+}; -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -new file mode 100644 -index 00000000000..bb10ee9a435 ---- /dev/null -+++ b/configs/rock960-rk3399_defconfig -@@ -0,0 +1,69 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_SYS_MALLOC_F_LEN=0x4000 -+CONFIG_ROCKCHIP_RK3399=y -+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 -+CONFIG_TARGET_ROCK960_RK3399=y -+CONFIG_DEBUG_UART_BASE=0xFF1A0000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_BAUDRATE=1500000 -+CONFIG_SPL_STACK_R_ADDR=0x80000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" -+CONFIG_DEBUG_UART=y -+CONFIG_FIT=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" -+CONFIG_SYS_PROMPT="rock960 => " -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_PINCTRL_ROCKCHIP_RK3399=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_STORAGE=y -+CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USE_TINY_PRINTF=y -+CONFIG_ERRNO_STR=y - -From patchwork Thu Sep 27 19:03:01 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,4/4] rockchip: rk3399: Add Ficus EE board support -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 975859 -X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com -Message-Id: <20180927190301.9642-5-manivannan.sadhasivam@linaro.org> -To: sjg@chromium.org, - philipp.tomsich@theobroma-systems.com -Cc: tom@vamrs.com, daniel.lezcano@linaro.org, amit.kucheria@linaro.org, - dev@vamrs.com, u-boot@lists.denx.de, - Manivannan Sadhasivam , stephen@vamrs.com -Date: Fri, 28 Sep 2018 00:33:01 +0530 -From: Manivannan Sadhasivam -List-Id: U-Boot discussion - -Add board support for Ficus EE board from Vamrs. This board utilizes -common Rock960 family support. - -Following peripherals are tested and known to work: -* Gigabit Ethernet -* USB 2.0 -* MMC - -Signed-off-by: Ezequiel Garcia -[Reworked based on common Rock960 family support] -Signed-off-by: Manivannan Sadhasivam ---- - -Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3 - -Changes in v2: None - - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-ficus.dts | 78 ++++++++++++++++++++++++++++++++++ - configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++ - 3 files changed, 150 insertions(+) - create mode 100644 arch/arm/dts/rk3399-ficus.dts - create mode 100644 configs/ficus-rk3399_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 9b891826b73..e2bd9822aa2 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3288-veyron-minnie.dtb \ - rk3288-vyasa.dtb \ - rk3328-evb.dtb \ -+ rk3399-ficus.dtb \ - rk3368-lion.dtb \ - rk3368-sheep.dtb \ - rk3368-geekbox.dtb \ -diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts -new file mode 100644 -index 00000000000..4af0e4e3834 ---- /dev/null -+++ b/arch/arm/dts/rk3399-ficus.dts -@@ -0,0 +1,78 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2018 Collabora Ltd. -+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. -+ * -+ * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw -+ */ -+ -+/dts-v1/; -+#include "rk3399-rock960.dtsi" -+#include "rk3399-sdram-ddr3-1600.dtsi" -+ -+/ { -+ model = "96boards RK3399 Ficus"; -+ compatible = "vamrs,ficus", "rockchip,rk3399"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ clkin_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "clkin_gmac"; -+ #clock-cells = <0>; -+ }; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_RMII_SRC>; -+ assigned-clock-parents = <&clkin_gmac>; -+ clock_in_out = "input"; -+ phy-supply = <&vcc3v3_sys>; -+ phy-mode = "rgmii"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 50000>; -+ tx_delay = <0x28>; -+ rx_delay = <0x11>; -+ status = "okay"; -+}; -+ -+&pcie0 { -+ ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; -+}; -+ -+&pinctrl { -+ gmac { -+ rgmii_sleep_pins: rgmii-sleep-pins { -+ rockchip,pins = -+ <3 15 RK_FUNC_GPIO &pcfg_output_low>; -+ }; -+ }; -+ -+ pcie { -+ pcie_drv: pcie-drv { -+ rockchip,pins = -+ <1 24 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb2 { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = -+ <4 27 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&vcc3v3_pcie { -+ gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; -+}; -+ -+&vcc5v0_host { -+ gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; -+}; -diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig -new file mode 100644 -index 00000000000..e890bc25238 ---- /dev/null -+++ b/configs/ficus-rk3399_defconfig -@@ -0,0 +1,71 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_SYS_MALLOC_F_LEN=0x4000 -+CONFIG_ROCKCHIP_RK3399=y -+CONFIG_TARGET_ROCK960_RK3399=y -+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 -+CONFIG_DEBUG_UART_BASE=0xFF1A0000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_STACK_R_ADDR=0x80000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" -+CONFIG_DEBUG_UART=y -+CONFIG_FIT=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_ETH=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_RGMII=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_PINCTRL_ROCKCHIP_RK3399=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_STORAGE=y -+CONFIG_USE_TINY_PRINTF=y -+CONFIG_ERRNO_STR=y diff --git a/sources b/sources index aa75875..9559de3 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.01-rc1.tar.bz2) = 415581e8aadd37210f5ccdaf4fb64f81b348d553f1b8732931a10aef89f55c0647f7d45fb759aa2ca0c4c624485269c15ee18b55a1cad73a48116af2d4634e40 +SHA512 (u-boot-2019.01-rc2.tar.bz2) = d1c76fba9935c3bb7bee67219106af3a05f020cbad6ea2bf4865877d2c67d5ef76ba2d5d49ac623fe8db72fd5adfa5f13894ca80a22d1b0bdbc2549ffdab0815 diff --git a/tools-add-a-generic-config-for-native-tools-building.patch b/tools-add-a-generic-config-for-native-tools-building.patch deleted file mode 100644 index 247457f..0000000 --- a/tools-add-a-generic-config-for-native-tools-building.patch +++ /dev/null @@ -1,63 +0,0 @@ -From patchwork Tue Dec 4 11:24:51 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] tools: add a generic config for native tools building -X-Patchwork-Submitter: Otavio Salvador -X-Patchwork-Id: 1007581 -Message-Id: <20181204112452.10544-1-otavio@ossystems.com.br> -To: U-Boot Mailing List -Cc: Alexander Graf , Ryder Lee , - Otavio Salvador , - Vagrant Cascadian , - Heinrich Schuchardt , - Alexey Brodkin , - Michal Simek -Date: Tue, 4 Dec 2018 09:24:51 -0200 -From: Otavio Salvador -List-Id: U-Boot discussion - -The motivation for this is to allow distributions to distribute all -possible tools in a generic way, avoiding the need of specific tools -building for each machine. - -Especially on OpenEmbedded / Yocto Project ecosystem, it is very -common each BSP to end providing their specific tools when they need -to generate images for some SoC (e.g MX23 / MX28 in meta-freescale -case). - -Using this, we can package the tools doing: - -$: make tools-all_defconfig -$: make tools-all - -Signed-off-by: Otavio Salvador ---- - - configs/tools-all_defconfig | 3 +++ - tools/Makefile | 2 +- - 2 files changed, 4 insertions(+), 1 deletion(-) - create mode 100644 configs/tools-all_defconfig - -diff --git a/configs/tools-all_defconfig b/configs/tools-all_defconfig -new file mode 100644 -index 0000000000..be69bdf43a ---- /dev/null -+++ b/configs/tools-all_defconfig -@@ -0,0 +1,3 @@ -+CONFIG_SYS_TEXT_BASE=0 -+CONFIG_FIT=y -+CONFIG_FIT_SIGNATURE=y -diff --git a/tools/Makefile b/tools/Makefile -index c93d17a42f..29ff6ed221 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -125,7 +125,7 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o - fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o - file2include-objs := file2include.o - --ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) -+ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),) - # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register - # the mxsimage support within tools/mxsimage.c . - HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS diff --git a/uboot-tools.spec b/uboot-tools.spec index d079327..2a5e4c6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2019.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,11 +20,10 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch -Patch4: tools-add-a-generic-config-for-native-tools-building.patch +Patch4: efi_loader-Make-RTS-relocation-more-robust.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch11: rk3399-Rock960-Ficus-board-support.patch Patch12: dragonboard-fixes.patch Patch13: tegra186-jetson-tx2-disable-onboard-emmc.patch Patch14: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch @@ -162,8 +161,8 @@ done %endif -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all_defconfig V=1 O=builds/ -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all V=1 O=builds/ +make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only_defconfig V=1 O=builds/ +make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only V=1 O=builds/ %install mkdir -p $RPM_BUILD_ROOT%{_bindir} @@ -316,6 +315,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 18 2018 Peter Robinson 2019.01-0.3-rc2 +- 2019.01 RC2 + * Wed Dec 12 2018 Peter Robinson 2019.01-0.2-rc1 - ATF tweaks and fixes - Enable amarula_a64_relic, nanopi_a64, puma-rk3399 From ff742d18c6433bcfa53f34a934546743abbd9113 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 19 Dec 2018 03:03:23 +0000 Subject: [PATCH 008/351] add efi patch --- ...ader-Make-RTS-relocation-more-robust.patch | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 efi_loader-Make-RTS-relocation-more-robust.patch diff --git a/efi_loader-Make-RTS-relocation-more-robust.patch b/efi_loader-Make-RTS-relocation-more-robust.patch new file mode 100644 index 0000000..84f6b7b --- /dev/null +++ b/efi_loader-Make-RTS-relocation-more-robust.patch @@ -0,0 +1,106 @@ +From patchwork Tue Dec 11 09:00:42 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2] efi_loader: Make RTS relocation more robust +X-Patchwork-Submitter: Alexander Graf +X-Patchwork-Id: 1010906 +Message-Id: <20181211090042.89935-1-agraf@suse.de> +To: u-boot@lists.denx.de +Cc: Heinrich Schuchardt , + Guillaume GARDET , + Loic Devulder +Date: Tue, 11 Dec 2018 10:00:42 +0100 +From: Alexander Graf +List-Id: U-Boot discussion + +While changing the RTS alignment to 64KB in commit 7a82c3051c8f +("efi_loader: Align runtime section to 64kb") the relocation code +started to break. + +The reason for that is that we didn't actually look at the real +relocation data. We merely took the RUNTIME_CODE section as a +hint and started to relocate based on self calculated data from +that point on. That calculation was now out of sync though. + +To ensure we're not running into such a situation again, this patch +makes the runtime relocation code a bit more robust. We can just +trust the phys/virt hints from the payload. We also should check that +we really only have a single section, as the code doesn't handle +multiple code relocations yet. + +Fixes: 7a82c3051c8f ("efi_loader: Align runtime section to 64kb") +Reported-by: Heinrich Schuchardt +Reported-by: Loic Devulder +Signed-off-by: Alexander Graf +Reviewed-by: Heinrich Schuchardt +Tested-by: Loic Devulder +Tested-by: Jonathan Gray +--- + +v1 -> v2: + + - Add more verbose comment explaining why we have the + sanity check. +--- + lib/efi_loader/efi_runtime.c | 34 +++++++++++++++++++++++++++++++--- + 1 file changed, 31 insertions(+), 3 deletions(-) + +diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c +index 95844efdb0..fff93f0960 100644 +--- a/lib/efi_loader/efi_runtime.c ++++ b/lib/efi_loader/efi_runtime.c +@@ -436,14 +436,42 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( + uint32_t descriptor_version, + struct efi_mem_desc *virtmap) + { +- ulong runtime_start = (ulong)&__efi_runtime_start & +- ~(ulong)EFI_PAGE_MASK; + int n = memory_map_size / descriptor_size; + int i; ++ int rt_code_sections = 0; + + EFI_ENTRY("%lx %lx %x %p", memory_map_size, descriptor_size, + descriptor_version, virtmap); + ++ /* ++ * TODO: ++ * Further down we are cheating. While really we should implement ++ * SetVirtualAddressMap() events and ConvertPointer() to allow ++ * dynamically loaded drivers to expose runtime services, we don't ++ * today. ++ * ++ * So let's ensure we see exactly one single runtime section, as ++ * that is the built-in one. If we see more (or less), someone must ++ * have tried adding or removing to that which we don't support yet. ++ * In that case, let's better fail rather than expose broken runtime ++ * services. ++ */ ++ for (i = 0; i < n; i++) { ++ struct efi_mem_desc *map = (void*)virtmap + ++ (descriptor_size * i); ++ ++ if (map->type == EFI_RUNTIME_SERVICES_CODE) ++ rt_code_sections++; ++ } ++ ++ if (rt_code_sections != 1) { ++ /* ++ * We expose exactly one single runtime code section, so ++ * something is definitely going wrong. ++ */ ++ return EFI_EXIT(EFI_INVALID_PARAMETER); ++ } ++ + /* Rebind mmio pointers */ + for (i = 0; i < n; i++) { + struct efi_mem_desc *map = (void*)virtmap + +@@ -483,7 +511,7 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( + map = (void*)virtmap + (descriptor_size * i); + if (map->type == EFI_RUNTIME_SERVICES_CODE) { + ulong new_offset = map->virtual_start - +- (runtime_start - gd->relocaddr); ++ map->physical_start + gd->relocaddr; + + efi_runtime_relocate(new_offset, map); + /* Once we're virtual, we can no longer handle From 3e7633feba8db27e9fd40bb455abf489b5cbcea0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 8 Jan 2019 06:28:06 +0000 Subject: [PATCH 009/351] 2019.01 RC3 --- ...ader-Make-RTS-relocation-more-robust.patch | 106 ------------------ ...artition-init-for-non-DM-MMC-drivers.patch | 47 ++++++++ sources | 2 +- uboot-tools.spec | 11 +- 4 files changed, 55 insertions(+), 111 deletions(-) delete mode 100644 efi_loader-Make-RTS-relocation-more-robust.patch create mode 100644 mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch diff --git a/efi_loader-Make-RTS-relocation-more-robust.patch b/efi_loader-Make-RTS-relocation-more-robust.patch deleted file mode 100644 index 84f6b7b..0000000 --- a/efi_loader-Make-RTS-relocation-more-robust.patch +++ /dev/null @@ -1,106 +0,0 @@ -From patchwork Tue Dec 11 09:00:42 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2] efi_loader: Make RTS relocation more robust -X-Patchwork-Submitter: Alexander Graf -X-Patchwork-Id: 1010906 -Message-Id: <20181211090042.89935-1-agraf@suse.de> -To: u-boot@lists.denx.de -Cc: Heinrich Schuchardt , - Guillaume GARDET , - Loic Devulder -Date: Tue, 11 Dec 2018 10:00:42 +0100 -From: Alexander Graf -List-Id: U-Boot discussion - -While changing the RTS alignment to 64KB in commit 7a82c3051c8f -("efi_loader: Align runtime section to 64kb") the relocation code -started to break. - -The reason for that is that we didn't actually look at the real -relocation data. We merely took the RUNTIME_CODE section as a -hint and started to relocate based on self calculated data from -that point on. That calculation was now out of sync though. - -To ensure we're not running into such a situation again, this patch -makes the runtime relocation code a bit more robust. We can just -trust the phys/virt hints from the payload. We also should check that -we really only have a single section, as the code doesn't handle -multiple code relocations yet. - -Fixes: 7a82c3051c8f ("efi_loader: Align runtime section to 64kb") -Reported-by: Heinrich Schuchardt -Reported-by: Loic Devulder -Signed-off-by: Alexander Graf -Reviewed-by: Heinrich Schuchardt -Tested-by: Loic Devulder -Tested-by: Jonathan Gray ---- - -v1 -> v2: - - - Add more verbose comment explaining why we have the - sanity check. ---- - lib/efi_loader/efi_runtime.c | 34 +++++++++++++++++++++++++++++++--- - 1 file changed, 31 insertions(+), 3 deletions(-) - -diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c -index 95844efdb0..fff93f0960 100644 ---- a/lib/efi_loader/efi_runtime.c -+++ b/lib/efi_loader/efi_runtime.c -@@ -436,14 +436,42 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( - uint32_t descriptor_version, - struct efi_mem_desc *virtmap) - { -- ulong runtime_start = (ulong)&__efi_runtime_start & -- ~(ulong)EFI_PAGE_MASK; - int n = memory_map_size / descriptor_size; - int i; -+ int rt_code_sections = 0; - - EFI_ENTRY("%lx %lx %x %p", memory_map_size, descriptor_size, - descriptor_version, virtmap); - -+ /* -+ * TODO: -+ * Further down we are cheating. While really we should implement -+ * SetVirtualAddressMap() events and ConvertPointer() to allow -+ * dynamically loaded drivers to expose runtime services, we don't -+ * today. -+ * -+ * So let's ensure we see exactly one single runtime section, as -+ * that is the built-in one. If we see more (or less), someone must -+ * have tried adding or removing to that which we don't support yet. -+ * In that case, let's better fail rather than expose broken runtime -+ * services. -+ */ -+ for (i = 0; i < n; i++) { -+ struct efi_mem_desc *map = (void*)virtmap + -+ (descriptor_size * i); -+ -+ if (map->type == EFI_RUNTIME_SERVICES_CODE) -+ rt_code_sections++; -+ } -+ -+ if (rt_code_sections != 1) { -+ /* -+ * We expose exactly one single runtime code section, so -+ * something is definitely going wrong. -+ */ -+ return EFI_EXIT(EFI_INVALID_PARAMETER); -+ } -+ - /* Rebind mmio pointers */ - for (i = 0; i < n; i++) { - struct efi_mem_desc *map = (void*)virtmap + -@@ -483,7 +511,7 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( - map = (void*)virtmap + (descriptor_size * i); - if (map->type == EFI_RUNTIME_SERVICES_CODE) { - ulong new_offset = map->virtual_start - -- (runtime_start - gd->relocaddr); -+ map->physical_start + gd->relocaddr; - - efi_runtime_relocate(new_offset, map); - /* Once we're virtual, we can no longer handle diff --git a/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch b/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch new file mode 100644 index 0000000..3f3b5a7 --- /dev/null +++ b/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch @@ -0,0 +1,47 @@ +From patchwork Mon Dec 17 10:05:45 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,2/2] mmc: bring back partition init for non-DM MMC drivers +X-Patchwork-Submitter: Andre Przywara +X-Patchwork-Id: 1014381 +X-Patchwork-Delegate: jagannadh.teki@gmail.com +Message-Id: <20181217100545.28369-3-andre.przywara@arm.com> +To: Maxime Ripard , + Jagan Teki , Jaehoon Chung +Cc: Tom Rini , u-boot@lists.denx.de +Date: Mon, 17 Dec 2018 10:05:45 +0000 +From: Andre Przywara +List-Id: U-Boot discussion + +Commit d0851c893706 ("blk: Call part_init() in the post_probe() method") +removed the call to part_init() in mmc.c, as this is done by the DM_MMC +framework. +However Allwinner is (still) relying on a non-DM MMC driver, so we are +now missing the implicit partition init, leading to failing MMC accesses +due to the missing partition information. + +Bring the call back just for non-DM MMC driver to fix this regression. + +Signed-off-by: Andre Przywara +Reviewed-by: Simon Glass +Tested-by: Soeren Moch +--- + drivers/mmc/mmc.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c +index f5c821e308..d858127132 100644 +--- a/drivers/mmc/mmc.c ++++ b/drivers/mmc/mmc.c +@@ -2449,6 +2449,10 @@ static int mmc_startup(struct mmc *mmc) + bdesc->revision[0] = 0; + #endif + ++#if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)) ++ part_init(bdesc); ++#endif ++ + return 0; + } + diff --git a/sources b/sources index 9559de3..5eba67d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.01-rc2.tar.bz2) = d1c76fba9935c3bb7bee67219106af3a05f020cbad6ea2bf4865877d2c67d5ef76ba2d5d49ac623fe8db72fd5adfa5f13894ca80a22d1b0bdbc2549ffdab0815 +SHA512 (u-boot-2019.01-rc3.tar.bz2) = aa7dffd176519912c163d640dbb53aa0893283ab45c5567d031d11cb168fb68e4af5fb9a6f6b311d21cb53e5db4b09d34928852d1b7333f98c515301693af7d9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2a5e4c6..2d83bdc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2019.01 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,7 +20,7 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch -Patch4: efi_loader-Make-RTS-relocation-more-robust.patch +Patch4: mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -162,7 +162,7 @@ done %endif make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only_defconfig V=1 O=builds/ -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only V=1 O=builds/ +make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all V=1 O=builds/ %install mkdir -p $RPM_BUILD_ROOT%{_bindir} @@ -315,6 +315,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jan 8 2019 Peter Robinson 2019.01-0.4-rc3 +- 2019.01 RC3 + * Tue Dec 18 2018 Peter Robinson 2019.01-0.3-rc2 - 2019.01 RC2 From 965068b7e0041107109fc156ebc92e8c6f5316aa Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Jan 2019 07:03:28 +0000 Subject: [PATCH 010/351] 2019.01 --- ...artition-init-for-non-DM-MMC-drivers.patch | 47 ---------- ...finite-loop-in-esdhc_send_cmd_common.patch | 85 ------------------- sources | 2 +- uboot-tools.spec | 17 ++-- 4 files changed, 10 insertions(+), 141 deletions(-) delete mode 100644 mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch delete mode 100644 mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch diff --git a/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch b/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch deleted file mode 100644 index 3f3b5a7..0000000 --- a/mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch +++ /dev/null @@ -1,47 +0,0 @@ -From patchwork Mon Dec 17 10:05:45 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,2/2] mmc: bring back partition init for non-DM MMC drivers -X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1014381 -X-Patchwork-Delegate: jagannadh.teki@gmail.com -Message-Id: <20181217100545.28369-3-andre.przywara@arm.com> -To: Maxime Ripard , - Jagan Teki , Jaehoon Chung -Cc: Tom Rini , u-boot@lists.denx.de -Date: Mon, 17 Dec 2018 10:05:45 +0000 -From: Andre Przywara -List-Id: U-Boot discussion - -Commit d0851c893706 ("blk: Call part_init() in the post_probe() method") -removed the call to part_init() in mmc.c, as this is done by the DM_MMC -framework. -However Allwinner is (still) relying on a non-DM MMC driver, so we are -now missing the implicit partition init, leading to failing MMC accesses -due to the missing partition information. - -Bring the call back just for non-DM MMC driver to fix this regression. - -Signed-off-by: Andre Przywara -Reviewed-by: Simon Glass -Tested-by: Soeren Moch ---- - drivers/mmc/mmc.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c -index f5c821e308..d858127132 100644 ---- a/drivers/mmc/mmc.c -+++ b/drivers/mmc/mmc.c -@@ -2449,6 +2449,10 @@ static int mmc_startup(struct mmc *mmc) - bdesc->revision[0] = 0; - #endif - -+#if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)) -+ part_init(bdesc); -+#endif -+ - return 0; - } - diff --git a/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch b/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch deleted file mode 100644 index 703603c..0000000 --- a/mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch +++ /dev/null @@ -1,85 +0,0 @@ -From patchwork Mon Nov 19 12:31:53 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, - v2] mmc: fsl_esdhc: Avoid infinite loop in esdhc_send_cmd_common() -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 999792 -Message-Id: <1542630713-30355-1-git-send-email-festevam@gmail.com> -To: jh80.chung@samsung.com -Cc: baruch@tkos.co.il, u-boot@lists.denx.de -Date: Mon, 19 Nov 2018 10:31:53 -0200 -From: Fabio Estevam -List-Id: U-Boot discussion - -The following hang is observed on a Hummingboard 2 MicroSOM -i2eX iMX6D - rev 1.3 with no eMMC populated on board: - -U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000) -Trying to boot from MMC1 - -U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000) - -CPU: Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz) -CPU: Extended Commercial temperature grade (-20C to 105C) at 33C -Reset cause: POR -Board: MX6 HummingBoard2 -DRAM: 1 GiB -MMC: FSL_SDHC: 0, FSL_SDHC: 1 -Loading Environment from MMC... *** Warning - bad CRC, using default environment - -No panel detected: default to HDMI -Display: HDMI (1024x768) -In: serial -Out: serial -Err: serial ----> hangs - -which is caused by the following infinite loop inside esdhc_send_cmd_common() - - while (!(esdhc_read32(®s->irqstat) & flags)) - ; - -Instead of looping forever, provide an exit path so that a timeout -error can be propagated in the case irqstat does not report -any interrupts, which may happen when no eMMC is populated on -board. - -Reported-by: Ricardo Salveti -Signed-off-by: Fabio Estevam ---- -Changes since v1: -- Jump to the label out on error path (Baruch). - - drivers/mmc/fsl_esdhc.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c -index 3cdfa7f..b8d0b00 100644 ---- a/drivers/mmc/fsl_esdhc.c -+++ b/drivers/mmc/fsl_esdhc.c -@@ -396,6 +396,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, - uint irqstat; - u32 flags = IRQSTAT_CC | IRQSTAT_CTOE; - struct fsl_esdhc *regs = priv->esdhc_regs; -+ unsigned long start; - - #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111 - if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) -@@ -453,8 +454,13 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, - flags = IRQSTAT_BRR; - - /* Wait for the command to complete */ -- while (!(esdhc_read32(®s->irqstat) & flags)) -- ; -+ start = get_timer(0); -+ while (!(esdhc_read32(®s->irqstat) & flags)) { -+ if (get_timer(start) > 1000) { -+ err = -ETIMEDOUT; -+ goto out; -+ } -+ } - - irqstat = esdhc_read32(®s->irqstat); - diff --git a/sources b/sources index 5eba67d..36998fd 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.01-rc3.tar.bz2) = aa7dffd176519912c163d640dbb53aa0893283ab45c5567d031d11cb168fb68e4af5fb9a6f6b311d21cb53e5db4b09d34928852d1b7333f98c515301693af7d9 +SHA512 (u-boot-2019.01.tar.bz2) = d9699cd22afe9bc747d64208068c2cf8a2c3143d161ede24536f6fd6adfd6b81e28920589722639e2e48fcf34e8dbde3ead7f691f14cbcc38cd75694d14d719b diff --git a/uboot-tools.spec b/uboot-tools.spec index 2d83bdc..52ad23c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +#global candidate rc3 Name: uboot-tools Version: 2019.01 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,15 +20,13 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch -Patch4: mmc-bring-back-partition-init-for-non-DM-MMC-drivers.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch12: dragonboard-fixes.patch -Patch13: tegra186-jetson-tx2-disable-onboard-emmc.patch -Patch14: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch -Patch15: tegra-fix-tx1.patch -Patch16: mmc-fsl_esdhc-Avoid-infinite-loop-in-esdhc_send_cmd_common.patch +Patch11: dragonboard-fixes.patch +Patch12: tegra186-jetson-tx2-disable-onboard-emmc.patch +Patch13: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch +Patch14: tegra-fix-tx1.patch BuildRequires: bc BuildRequires: dtc @@ -315,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jan 15 2019 Peter Robinson 2019.01-1 +- 2019.01 + * Tue Jan 8 2019 Peter Robinson 2019.01-0.4-rc3 - 2019.01 RC3 From c51339ee3eb51853824e3fe2996dcaaace317b63 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sun, 3 Feb 2019 10:37:43 +0000 Subject: [PATCH 011/351] - Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 52ad23c..e09805a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -313,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Feb 03 2019 Fedora Release Engineering - 2019.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild + * Tue Jan 15 2019 Peter Robinson 2019.01-1 - 2019.01 From 8cce6b78d6e9d8eae6af530e27190f17c27d20bd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 8 Feb 2019 07:47:28 +0000 Subject: [PATCH 012/351] 2019.04 RC1 --- arm-boards | 2 -- sources | 2 +- uboot-tools.spec | 9 ++++++--- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arm-boards b/arm-boards index 4b1532a..655570e 100644 --- a/arm-boards +++ b/arm-boards @@ -6,9 +6,7 @@ A20-Olimex-SOM-EVB A20-OLinuXino-Lime A20-OLinuXino-Lime2 A20-OLinuXino_MICRO -am335x_boneblack am335x_evm -am335x_evm_usbspl am57xx_evm Ampe_A76 arndale diff --git a/sources b/sources index 36998fd..b32af2a 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.01.tar.bz2) = d9699cd22afe9bc747d64208068c2cf8a2c3143d161ede24536f6fd6adfd6b81e28920589722639e2e48fcf34e8dbde3ead7f691f14cbcc38cd75694d14d719b +SHA512 (u-boot-2019.04-rc1.tar.bz2) = 1c7fc10925706b629bc4f37b41cb47ef45ed47a2b0e84ffed173a53d387182b23ab8575b567ec6bac3c6368caffac1e176442822cc298fd824b779e619f170df diff --git a/uboot-tools.spec b/uboot-tools.spec index e09805a..22b8c5e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc3 +%global candidate rc1 Name: uboot-tools -Version: 2019.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2019.04 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -313,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Fri Feb 8 2019 Peter Robinson 2019.04-0.1-rc1 +- 2019.04 RC1 + * Sun Feb 03 2019 Fedora Release Engineering - 2019.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild From 5c08e035b3ce5d02b3acfa77db2e93909b20a8f2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 8 Feb 2019 11:54:11 +0000 Subject: [PATCH 013/351] Disable turris_omnia as it fails build with gcc9 due to the SPL being oversize --- arm-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/arm-boards b/arm-boards index 655570e..0916718 100644 --- a/arm-boards +++ b/arm-boards @@ -124,7 +124,6 @@ sunxi_Gemei_G9 tbs_a711 tinker-rk3288 trimslice -turris_omnia udoo udoo_neo usbarmory From 652ffd7e0310a243172e4241eb3b644e267e0842 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 9 Feb 2019 20:01:18 +0000 Subject: [PATCH 014/351] rebuild for new ATF snapshot --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 22b8c5e..0412e78 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -313,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Feb 9 2019 Peter Robinson 2019.04-0.2-rc1 +- Build against new ATF snapshot + * Fri Feb 8 2019 Peter Robinson 2019.04-0.1-rc1 - 2019.04 RC1 From 9823edcb940f37823bf369303c20dae2158a0a4a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 19 Feb 2019 09:01:34 +0000 Subject: [PATCH 015/351] 2019.04 RC2 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index b32af2a..806e2a9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04-rc1.tar.bz2) = 1c7fc10925706b629bc4f37b41cb47ef45ed47a2b0e84ffed173a53d387182b23ab8575b567ec6bac3c6368caffac1e176442822cc298fd824b779e619f170df +SHA512 (u-boot-2019.04-rc2.tar.bz2) = 3403413b4a34f736aa08c67055a8e3914dc2a2326c0533bd66730284fadca6ed26ada0c6f58f4f1c2bc40865fb4f0a835cffac759f29e1cd5ce22bd743ada312 diff --git a/uboot-tools.spec b/uboot-tools.spec index 0412e78..0b2d93f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2019.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -313,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Feb 19 2019 Peter Robinson 2019.04-0.3-rc2 +- 2019.04 RC2 + * Sat Feb 9 2019 Peter Robinson 2019.04-0.2-rc1 - Build against new ATF snapshot From cb3945e319d196827fb7f13799e630eceb5e9a19 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 2 Mar 2019 11:38:36 +0000 Subject: [PATCH 016/351] add bananapi_m2_plus_h5 --- aarch64-boards | 1 + uboot-tools.spec | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index a744097..d83468e 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,6 +1,7 @@ a64-olinuxino amarula_a64_relic avnet_ultra96_rev1 +bananapi_m2_plus_h5 bananapi_m64 dragonboard410c dragonboard820c diff --git a/uboot-tools.spec b/uboot-tools.spec index 0b2d93f..765d939 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -130,7 +130,7 @@ do echo "Building board: $board" mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino amarula_a64_relic bananapi_m64 nanopi_a64 orangepi_win pine64-lts pine64_plus pinebook sopine_baseboard libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_zero_plus2 orangepi_zero_plus) + sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 nanopi_a64 orangepi_win pine64-lts pine64_plus pinebook sopine_baseboard libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_zero_plus2 orangepi_zero_plus) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ From 445d67aa7538b103d713998614a6b12106ea4385 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 5 Mar 2019 08:11:23 +0000 Subject: [PATCH 017/351] 2019.04 RC3 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 806e2a9..2adf600 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04-rc2.tar.bz2) = 3403413b4a34f736aa08c67055a8e3914dc2a2326c0533bd66730284fadca6ed26ada0c6f58f4f1c2bc40865fb4f0a835cffac759f29e1cd5ce22bd743ada312 +SHA512 (u-boot-2019.04-rc3.tar.bz2) = d3b4a41ffcb593919dedb9f6fd25f3e77220cddada845b6f34193741324e3ceaa0e2645635d8ce155c32ae5e9772d2aa1366869abc8a290d4cc5121e995d34b9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 765d939..8313ad0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2019.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -313,6 +313,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Mar 5 2019 Peter Robinson 2019.04-0.4-rc3 +- 2019.04 RC3 + * Tue Feb 19 2019 Peter Robinson 2019.04-0.3-rc2 - 2019.04 RC2 From 7456ce2f7ae1cf6770199ac46b335504c4f94481 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 5 Mar 2019 13:45:11 +0000 Subject: [PATCH 018/351] fix/update BananaPi board naming --- arm-boards | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arm-boards b/arm-boards index 0916718..e13b078 100644 --- a/arm-boards +++ b/arm-boards @@ -14,9 +14,12 @@ Auxtek-T003 Auxtek-T004 ba10_tv_box Bananapi +bananapi_m1_plus bananapi_m2_berry +bananapi_m2_plus_h3 bananapi_m2_zero Bananapi_M2_Ultra +Bananapi_m2m Bananapro chiliboard CHIP @@ -116,7 +119,6 @@ rpi_2 rpi_3_32b Sinlinx_SinA31s Sinovoip_BPI_M2 -Sinovoip_BPI_M2_Plus Sinovoip_BPI_M3 smdkv310 stih410-b2260 From 982620b114a41594ead79a74a8923a894d94b57b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 19 Mar 2019 10:53:38 +0000 Subject: [PATCH 019/351] 2019.04 RC4 --- sources | 2 +- uboot-tools.spec | 21 ++++++--------------- uefi-use-Fedora-specific-path-name.patch | 23 +++++++++++++---------- 3 files changed, 20 insertions(+), 26 deletions(-) diff --git a/sources b/sources index 2adf600..71120c2 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04-rc3.tar.bz2) = d3b4a41ffcb593919dedb9f6fd25f3e77220cddada845b6f34193741324e3ceaa0e2645635d8ce155c32ae5e9772d2aa1366869abc8a290d4cc5121e995d34b9 +SHA512 (u-boot-2019.04-rc4.tar.bz2) = 33a57e4acb51dbe04123055b159a5b3a933ea8340aa81a4148572ee5fc12288413a6c6c0b80b6fe099ac79ea6359be2d9034ead1edfcc0403895f3f8eb56746e diff --git a/uboot-tools.spec b/uboot-tools.spec index 8313ad0..8c6452b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2019.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -40,7 +40,6 @@ BuildRequires: devtoolset-7-gcc BuildRequires: gcc %endif BuildRequires: flex bison -BuildRequires: git-core BuildRequires: openssl-devel %if 0%{?fedora} BuildRequires: python-unversioned-command @@ -101,18 +100,7 @@ u-boot bootloader ELF binaries for use with qemu and other platforms %endif %prep -%setup -q -n u-boot-%{version}%{?candidate:-%{candidate}} - -git init -git config --global gc.auto 0 -git config user.email "noone@example.com" -git config user.name "no one" -git add . -git commit -a -q -m "%{version} baseline" -git am %{patches} 2019.04-0.5-rc4 +- 2019.04 RC4 + * Tue Mar 5 2019 Peter Robinson 2019.04-0.4-rc3 - 2019.04 RC3 diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index 7f61250..69dcc8b 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -1,27 +1,30 @@ -From 2b411f6edf298899098e2077a5ca2dfdaf3d882f Mon Sep 17 00:00:00 2001 +From c8e3063259c19e8f03c9f3e053ec6384d2d3f861 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 7 Feb 2018 12:37:58 +0000 +Date: Tue, 19 Mar 2019 10:48:48 +0000 Subject: [PATCH] use Fedora specific EFI path/name Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) + include/config_distro_bootcmd.h | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index f567cebd38..7746366ec8 100644 +index 4993303f4d..1aba509962 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h -@@ -93,7 +93,7 @@ +@@ -92,9 +92,9 @@ #ifdef CONFIG_EFI_LOADER #if defined(CONFIG_ARM64) -#define BOOTEFI_NAME "bootaa64.efi" +#define BOOTEFI_NAME "grubaa64.efi" #elif defined(CONFIG_ARM) - #define BOOTEFI_NAME "bootarm.efi" +-#define BOOTEFI_NAME "bootarm.efi" ++#define BOOTEFI_NAME "grubarm.efi" #elif defined(CONFIG_X86_RUN_32BIT) -@@ -127,7 +127,7 @@ + #define BOOTEFI_NAME "bootia32.efi" + #elif defined(CONFIG_X86_RUN_64BIT) +@@ -130,7 +130,7 @@ "bootefi bootmgr ${fdtcontroladdr};" \ "fi;" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ @@ -30,7 +33,7 @@ index f567cebd38..7746366ec8 100644 "if fdt addr ${fdt_addr_r}; then " \ "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ -@@ -150,9 +150,9 @@ +@@ -153,9 +153,9 @@ "fi;" \ "done;" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ @@ -43,5 +46,5 @@ index f567cebd38..7746366ec8 100644 "echo EFI LOAD FAILED: continuing...; " \ "fi; " \ -- -2.14.3 +2.20.1 From dca146ee9f8fcc2fb4ca8a58391dc7edc29429e1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 20 Mar 2019 11:39:59 +0000 Subject: [PATCH 020/351] Tegra Jetson TX-series improvements --- ...IA-Jetson-Nano-Developer-Kit-support.patch | 3236 +++++++++++++++++ aarch64-boards | 1 + ...-MAC-address-to-hardware-after-probe.patch | 147 + ...-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch | 36 +- tegra-fix-tx1.patch | 472 --- ...80-Build-position-independent-binary.patch | 37 + uboot-tools.spec | 12 +- 7 files changed, 3452 insertions(+), 489 deletions(-) create mode 100644 ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch create mode 100644 net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch rename tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch => tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch (62%) delete mode 100644 tegra-fix-tx1.patch create mode 100644 tegra-p2371-2180-Build-position-independent-binary.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch new file mode 100644 index 0000000..2f662b1 --- /dev/null +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch @@ -0,0 +1,3236 @@ +From patchwork Mon Mar 18 23:24:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,01/15] ARM: tegra: Use common header for PMU declarations +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058145 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-2-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:08 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +There's no need to replicate the pmu.h header file for every Tegra SoC +generation. Use a single header that is shared across generations. + +Signed-off-by: Thierry Reding +--- + .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- + arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ + arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ + arch/arm/mach-tegra/board2.c | 2 +- + arch/arm/mach-tegra/emc.c | 2 +- + 7 files changed, 5 insertions(+), 55 deletions(-) + rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) + delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h + +diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h +similarity index 73% +rename from arch/arm/include/asm/arch-tegra20/pmu.h +rename to arch/arm/include/asm/arch-tegra/pmu.h +index 18766dfed2bb..e850875d3166 100644 +--- a/arch/arm/include/asm/arch-tegra20/pmu.h ++++ b/arch/arm/include/asm/arch-tegra/pmu.h +@@ -4,10 +4,10 @@ + * NVIDIA Corporation + */ + +-#ifndef _ARCH_PMU_H_ +-#define _ARCH_PMU_H_ ++#ifndef _TEGRA_PMU_H_ ++#define _TEGRA_PMU_H_ + + /* Set core and CPU voltages to nominal levels */ + int pmu_set_nominal(void); + +-#endif /* _ARCH_PMU_H_ */ ++#endif /* _TEGRA_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h +deleted file mode 100644 +index 1e571ee7b317..000000000000 +--- a/arch/arm/include/asm/arch-tegra114/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA114_PMU_H_ +-#define _TEGRA114_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA114_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h +deleted file mode 100644 +index c38393edefda..000000000000 +--- a/arch/arm/include/asm/arch-tegra124/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2013 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA124_PMU_H_ +-#define _TEGRA124_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA124_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h +deleted file mode 100644 +index 6ea36aa41876..000000000000 +--- a/arch/arm/include/asm/arch-tegra210/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2015 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA210_PMU_H_ +-#define _TEGRA210_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA210_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h +deleted file mode 100644 +index a823f0fbfc61..000000000000 +--- a/arch/arm/include/asm/arch-tegra30/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA30_PMU_H_ +-#define _TEGRA30_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA30_PMU_H_ */ +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index 12257a42b51b..b8d5ef0322cb 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -24,7 +25,6 @@ + #include + #include + #include +-#include + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include +diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c +index 6697909d9a3e..66628933b653 100644 +--- a/arch/arm/mach-tegra/emc.c ++++ b/arch/arm/mach-tegra/emc.c +@@ -8,10 +8,10 @@ + #include + #include + #include +-#include + #include + #include + #include ++#include + #include + + DECLARE_GLOBAL_DATA_PTR; + +From patchwork Mon Mar 18 23:24:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,02/15] ARM: tegra: Guard clock code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058147 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-3-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:09 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Clock code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 2 ++ + arch/arm/mach-tegra/board2.c | 12 ++++++++++-- + 4 files changed, 18 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 86b1cd11f752..ee078fec9adc 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT + config SPL_SERIAL_SUPPORT + default y + ++config TEGRA_CLKRST ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON + select SPL + select SPL_BOARD_INIT if SPL + select SUPPORT_SPL ++ select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_NO_BPMP +@@ -100,6 +104,7 @@ config TEGRA124 + config TEGRA210 + bool "Tegra210 family" + select TEGRA_ARMV8_COMMON ++ select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_NO_BPMP + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index d4b4666fb1e2..0e812818d7a2 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -16,7 +16,7 @@ endif + obj-y += ap.o + obj-y += board.o board2.o + obj-y += cache.o +-obj-y += clock.o ++obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-y += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index f8fc042a1dcc..ecd5001de4c5 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -9,7 +9,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b8d5ef0322cb..b94077221f77 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -22,7 +22,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +@@ -109,8 +111,10 @@ int board_init(void) + __maybe_unused int board_id; + + /* Do clocks and UART first so that printf() works */ ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + clock_init(); + clock_verify(); ++#endif + + tegra_gpu_config(); + +@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); + + int board_early_init_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + if (!clock_early_init_done()) + clock_early_init(); ++#endif + + #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) + #define USBCMD_FS2 (1 << 15) +@@ -193,10 +199,12 @@ int board_early_init_f(void) + #endif + + /* Do any special system timer/TSC setup */ +-#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) ++# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +-#endif ++# endif + arch_timer_init(); ++#endif + + pinmux_init(); + board_init_uart_f(); + +From patchwork Mon Mar 18 23:24:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 03/15] ARM: tegra: Guard GP pad control code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058148 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-4-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:10 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The GP pad control code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cache.c | 2 ++ + 3 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index ee078fec9adc..265051b18aaf 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT + config TEGRA_CLKRST + bool + ++config TEGRA_GP_PADCTRL ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -106,6 +110,7 @@ config TEGRA210 + select TEGRA_ARMV8_COMMON + select TEGRA_CLKRST + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 0e812818d7a2..69f802c01b45 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -13,7 +13,7 @@ else + obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o + endif + +-obj-y += ap.o ++obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c +index be414e4e4aca..d7063490e222 100644 +--- a/arch/arm/mach-tegra/cache.c ++++ b/arch/arm/mach-tegra/cache.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) + #include ++#endif + + #ifndef CONFIG_ARM64 + void config_cache(void) + +From patchwork Mon Mar 18 23:24:11 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 04/15] ARM: tegra: Guard memory controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058146 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-5-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:11 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Memory controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/board.c | 7 +++++++ + 2 files changed, 12 insertions(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 265051b18aaf..5763c4ae3cd1 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -26,6 +26,9 @@ config TEGRA_IVC + U-Boot, it is typically used for communication between the main CPU + and various auxiliary processors. + ++config TEGRA_MC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -111,6 +115,7 @@ config TEGRA210 + select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index ecd5001de4c5..7ef5a67edd1f 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -13,7 +13,9 @@ + #include + #endif + #include ++#if IS_ENABLED(CONFIG_TEGRA_MC) + #include ++#endif + #include + #include + #include +@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) + } + #endif + ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* Read the RAM size directly from the memory controller */ + static phys_size_t query_sdram_size(void) + { +@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) + + return size_bytes; + } ++#endif + + int dram_init(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); ++#endif ++ + return 0; + } + + +From patchwork Mon Mar 18 23:24:12 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 05/15] ARM: tegra: Guard pin controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058156 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-6-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:12 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pin controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 6 ++++++ + arch/arm/mach-tegra/board2.c | 2 ++ + 4 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 5763c4ae3cd1..be20ac2e804e 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -29,6 +29,9 @@ config TEGRA_IVC + config TEGRA_MC + bool + ++config TEGRA_PINCTRL ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -117,6 +121,7 @@ config TEGRA210 + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 69f802c01b45..395e0191a458 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +-obj-y += pinmux-common.o ++obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o + endif +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 7ef5a67edd1f..b65bdde5a78d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -12,7 +12,9 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include ++#endif + #if IS_ENABLED(CONFIG_TEGRA_MC) + #include + #endif +@@ -132,6 +134,7 @@ int dram_init(void) + return 0; + } + ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + static int uart_configs[] = { + #if defined(CONFIG_TEGRA20) + #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) +@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) + } + } + } ++#endif + + void board_init_uart_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + int uart_ids = 0; /* bit mask of which UART ids to enable */ + + #ifdef CONFIG_TEGRA_ENABLE_UARTA +@@ -220,6 +225,7 @@ void board_init_uart_f(void) + uart_ids |= UARTE; + #endif + setup_uarts(uart_ids); ++#endif + } + + #if !CONFIG_IS_ENABLED(OF_CONTROL) +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b94077221f77..ce1c9346959d 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -25,8 +25,10 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include + #include ++#endif + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include + +From patchwork Mon Mar 18 23:24:13 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 06/15] ARM: tegra: Guard powergate code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058150 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-7-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:13 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Powergate code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index be20ac2e804e..db9198348d3f 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -32,6 +32,9 @@ config TEGRA_MC + config TEGRA_PINCTRL + bool + ++config TEGRA_PMC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -122,6 +126,7 @@ config TEGRA210 + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 395e0191a458..517be21ee5f5 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -18,7 +18,7 @@ obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o +-obj-y += powergate.o ++obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + endif + + +From patchwork Mon Mar 18 23:24:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,07/15] ARM: tegra: Fix save_boot_params() prototype +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058149 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-8-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:14 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The save_boot_params() function takes as its first four arguments the +first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of +which are 32 bits wide. However, on 64-bit ARM thene registers are x0, +x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing +the save_boot_params() implementation on 64-bit ARM, change it to take +unsigned long parameters rather than the fixed size 32-bit integers. +This ensures that the correct values are passed. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/board.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index b65bdde5a78d..59d2f347485d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -42,7 +42,8 @@ enum { + static bool from_spl __attribute__ ((section(".data"))); + + #ifndef CONFIG_SPL_BUILD +-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) ++void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, ++ unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; + save_boot_params_ret(); + +From patchwork Mon Mar 18 23:24:15 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 08/15] ARM: tegra: Allow boards to override boot target devices +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058152 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-9-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:15 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Boards may not support all the boot target devices in the default list +for Tegra devices. Allow a board to override the list and default to the +standard list only if the board hasn't specified one itself. + +Signed-off-by: Thierry Reding +--- + include/configs/tegra-common-post.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h +index e54428ba43e2..9685ee5059ab 100644 +--- a/include/configs/tegra-common-post.h ++++ b/include/configs/tegra-common-post.h +@@ -21,12 +21,14 @@ + #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ + + #ifndef CONFIG_SPL_BUILD ++#ifndef BOOT_TARGET_DEVICES + #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) ++#endif + #include + #else + #define BOOTENV + +From patchwork Mon Mar 18 23:24:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,09/15] ARM: tegra: Support TZ-only access to PMC +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058153 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-10-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:16 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Some devices may restrict access to the PMC to TrustZone software only. +Non-TZ software can detect this and use SMC calls to the firmware that +runs in the TrustZone to perform accesses to PMC registers. + +Note that this also fixes reset_cpu() and the enterrcm command on +Tegra186 where they were previously trying to access the PMC at a wrong +physical address. + +Based on work by Kalyani Chidambaram and Tom +Warren . + +Signed-off-by: Thierry Reding +--- + arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- + arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ + arch/arm/mach-tegra/Kconfig | 5 ++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/clock.c | 13 ++-- + arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- + arch/arm/mach-tegra/cpu.c | 20 +++--- + arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- + arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ + arch/arm/mach-tegra/powergate.c | 11 +-- + 10 files changed, 151 insertions(+), 65 deletions(-) + delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S + create mode 100644 arch/arm/mach-tegra/pmc.c + +diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h +index 34bbe75d5fdb..1524bf291164 100644 +--- a/arch/arm/include/asm/arch-tegra/pmc.h ++++ b/arch/arm/include/asm/arch-tegra/pmc.h +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * (C) Copyright 2010-2015 ++ * (C) Copyright 2010-2019 + * NVIDIA Corporation + */ + +@@ -388,4 +388,22 @@ struct pmc_ctlr { + /* APBDEV_PMC_CNTRL2_0 0x440 */ + #define HOLD_CKE_LOW_EN (1 << 12) + ++/* PMC read/write functions */ ++u32 tegra_pmc_readl(unsigned long offset); ++void tegra_pmc_writel(u32 value, unsigned long offset); ++ ++#define PMC_CNTRL 0x0 ++#define PMC_CNTRL_MAIN_RST BIT(4) ++ ++#if IS_ENABLED(CONFIG_TEGRA186) ++# define PMC_SCRATCH0 0x32000 ++#else ++# define PMC_SCRATCH0 0x00050 ++#endif ++ ++/* for secure PMC */ ++#define TEGRA_SMC_PMC 0xc2fffe00 ++#define TEGRA_SMC_PMC_READ 0xaa ++#define TEGRA_SMC_PMC_WRITE 0xbb ++ + #endif /* PMC_H */ +diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h +index 7ae0129e2db3..7a4e0972fb76 100644 +--- a/arch/arm/include/asm/arch-tegra/tegra.h ++++ b/arch/arm/include/asm/arch-tegra/tegra.h +@@ -30,7 +30,13 @@ + #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) + #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) + #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) ++#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ ++ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ ++ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) + #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) ++#else ++#define NV_PA_PMC_BASE 0xc360000 ++#endif + #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) + #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) + #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index db9198348d3f..28914a34a1b5 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -35,6 +35,10 @@ config TEGRA_PINCTRL + config TEGRA_PMC + bool + ++config TEGRA_PMC_SECURE ++ bool ++ depends on TEGRA_PMC ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -127,6 +131,7 @@ config TEGRA210 + select TEGRA_NO_BPMP + select TEGRA_PINCTRL + select TEGRA_PMC ++ select TEGRA_PMC_SECURE + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 517be21ee5f5..f8bc65aa8b18 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0+ + # +-# (C) Copyright 2010-2015 Nvidia Corporation. ++# (C) Copyright 2010-2019 Nvidia Corporation. + # + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. +@@ -27,11 +27,11 @@ obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o + obj-$(CONFIG_TEGRA_IVC) += ivc.o +-obj-y += lowlevel_init.o + ifndef CONFIG_SPL_BUILD + obj-$(CONFIG_ARMV7_PSCI) += psci.o + endif + obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o ++obj-y += pmc.o + + obj-$(CONFIG_TEGRA20) += tegra20/ + obj-$(CONFIG_TEGRA30) += tegra30/ +diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c +index 096330748f2b..c9cd4e6aaeb7 100644 +--- a/arch/arm/mach-tegra/clock.c ++++ b/arch/arm/mach-tegra/clock.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + /* Tegra SoC common clock control functions */ +@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) + + int clock_external_output(int clk_id) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; ++ u32 val; + + if (clk_id >= 1 && clk_id <= 3) { +- setbits_le32(&pmc->pmc_clk_out_cntrl, +- 1 << (2 + (clk_id - 1) * 8)); ++ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ val |= 1 << (2 + (clk_id - 1) * 8); ++ tegra_pmc_writel(val, ++ offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; +diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c +index 4e6beb3e5bb4..4a889f0e3422 100644 +--- a/arch/arm/mach-tegra/cmd_enterrcm.c ++++ b/arch/arm/mach-tegra/cmd_enterrcm.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. + * + * Derived from code (arch/arm/lib/reset.c) that is: + * +@@ -31,12 +31,10 @@ + static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- + puts("Entering RCM...\n"); + udelay(50000); + +- pmc->pmc_scratch0 = 2; ++ tegra_pmc_writel(2, PMC_SCRATCH0); + disable_interrupts(); + reset_cpu(0); + +diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c +index 1b6ad074ed8f..3d140760e68f 100644 +--- a/arch/arm/mach-tegra/cpu.c ++++ b/arch/arm/mach-tegra/cpu.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) + + static int is_cpu_powered(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- +- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; ++ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; + } + + static void remove_cpu_io_clamps(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + debug("%s entry\n", __func__); + + /* Remove the clamps on the CPU I/O signals */ +- reg = readl(&pmc->pmc_remove_clamping); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); + reg |= CPU_CLMP; +- writel(reg, &pmc->pmc_remove_clamping); ++ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); + + /* Give I/O signals time to stabilize */ + udelay(IO_STABILIZATION_DELAY); +@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) + + void powerup_cpu(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + int timeout = IO_STABILIZATION_DELAY; + debug("%s entry\n", __func__); + + if (!is_cpu_powered()) { + /* Toggle the CPU power state (OFF -> ON) */ +- reg = readl(&pmc->pmc_pwrgate_toggle); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + reg &= PARTID_CP; + reg |= START_CP; +- writel(reg, &pmc->pmc_pwrgate_toggle); ++ tegra_pmc_writel(reg, ++ offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + + /* Wait for the power to come up */ + while (!is_cpu_powered()) { +diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S +deleted file mode 100644 +index 626f1b642745..000000000000 +--- a/arch/arm/mach-tegra/lowlevel_init.S ++++ /dev/null +@@ -1,39 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * SoC-specific setup info +- * +- * (C) Copyright 2010,2011 +- * NVIDIA Corporation +- */ +- +-#include +-#include +- +-#ifdef CONFIG_ARM64 +- .align 5 +-ENTRY(reset_cpu) +- /* get address for global reset register */ +- ldr x1, =PRM_RSTCTRL +- ldr w3, [x1] +- /* force reset */ +- orr w3, w3, #0x10 +- str w3, [x1] +- mov w0, w0 +-1: +- b 1b +-ENDPROC(reset_cpu) +-#else +- .align 5 +-ENTRY(reset_cpu) +- ldr r1, rstctl @ get addr for global reset +- @ reg +- ldr r3, [r1] +- orr r3, r3, #0x10 +- str r3, [r1] @ force reset +- mov r0, r0 +-_loop_forever: +- b _loop_forever +-rstctl: +- .word PRM_RSTCTRL +-ENDPROC(reset_cpu) +-#endif +diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c +new file mode 100644 +index 000000000000..afd3c54179c1 +--- /dev/null ++++ b/arch/arm/mach-tegra/pmc.c +@@ -0,0 +1,92 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. ++ */ ++ ++#include ++ ++#include ++ ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++static bool tegra_pmc_detect_tz_only(void) ++{ ++ static bool initialized = false; ++ static bool is_tz_only = false; ++ u32 value, saved; ++ ++ if (!initialized) { ++ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = saved ^ 0xffffffff; ++ ++ if (value == 0xffffffff) ++ value = 0xdeadbeef; ++ ++ /* write pattern and read it back */ ++ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ ++ /* if we read all-zeroes, access is restricted to TZ only */ ++ if (value == 0) { ++ debug("access to PMC is restricted to TZ\n"); ++ is_tz_only = true; ++ } else { ++ /* restore original value */ ++ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ } ++ ++ initialized = true; ++ } ++ ++ return is_tz_only; ++} ++#endif ++ ++uint32_t tegra_pmc_readl(unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, ++ 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return res.a1; ++ } ++#endif ++ ++ return readl(NV_PA_PMC_BASE + offset); ++} ++ ++void tegra_pmc_writel(u32 value, unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, ++ value, 0, 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return; ++ } ++#endif ++ ++ writel(value, NV_PA_PMC_BASE + offset); ++} ++ ++void reset_cpu(ulong addr) ++{ ++ u32 value; ++ ++ value = tegra_pmc_readl(PMC_CNTRL); ++ value |= PMC_CNTRL_MAIN_RST; ++ tegra_pmc_writel(value, PMC_CNTRL); ++} +diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c +index e45f0961b242..761c9ef19e3b 100644 +--- a/arch/arm/mach-tegra/powergate.c ++++ b/arch/arm/mach-tegra/powergate.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -11,6 +11,7 @@ + + #include + #include ++#include + + #define PWRGATE_TOGGLE 0x30 + #define PWRGATE_TOGGLE_START (1 << 8) +@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) + u32 value, mask = state ? (1 << id) : 0, old_mask; + unsigned long start, timeout = 25; + +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + old_mask = value & (1 << id); + + if (mask == old_mask) + return 0; + +- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); ++ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); + + start = get_timer(0); + + while (get_timer(start) < timeout) { +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + if ((value & (1 << id)) == mask) + return 0; + } +@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) + else + value = 1 << id; + +- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); ++ tegra_pmc_writel(value, REMOVE_CLAMPING); + + return 0; + } + +From patchwork Mon Mar 18 23:24:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 10/15] ARM: tegra: Workaround UDC boot issues only if necessary +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058157 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-11-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:17 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Resetting the USB device controller on boot is only necessary if the SoC +actually has a UDC controller and U-Boot enables support for it. All the +Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on +boot workaround depend on the ChipIdea UDC driver. + +This prevents a crash on Tegra186 which does not have the ChipIdea UDC. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 28914a34a1b5..faa73559fd42 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -148,6 +148,7 @@ endchoice + + config TEGRA_DISCONNECT_UDC_ON_BOOT + bool "Disconnect USB device mode controller on boot" ++ depends on CI_UDC + default y + help + When loading U-Boot into RAM over USB protocols using tools such as + +From patchwork Mon Mar 18 23:24:18 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,11/15] ARM: tegra: Restore DRAM bank count +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058154 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-12-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:18 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced +the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 +boards. + +However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: +increase max DRAM bank count"), the platform can have a large number of +unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks +are needed to describe the worst-case situation. + +In practice the number of DRAM banks needed will typically be much +lower, but we should be prepared to properly deal with the worst case. + +Signed-off-by: Thierry Reding +--- + configs/p2771-0000-000_defconfig | 2 +- + configs/p2771-0000-500_defconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index ac85efa37b3b..ad0802067e73 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index df4d914d85cf..459b67fd195f 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + +From patchwork Mon Mar 18 23:24:19 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,12/15] ARM: tegra: Unify Tegra186 builds +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058151 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-13-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:19 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Tegra186 build are currently dealt with in very special ways, which is +because Tegra186 is fundamentally different in many respects. It is no +longer necessary to do many of the low-level programming because early +boot firmware will already have taken care of it. + +Unfortunately, separating Tegra186 builds from the rest in this way +makes it difficult to share code with prior generations of Tegra. With +all of the low-level programming code behind Kconfig guards, the build +for Tegra186 can again be unified. + +As a side-effect, and partial reason for this change, other Tegra SoC +generations can now make use of the code that deals with taking over a +boot from earlier bootloaders. This used to be nvtboot, but has been +replaced by cboot nowadays. Rename the files and functions related to +this to avoid confusion. The implemented protocols are unchanged. + +Signed-off-by: Thierry Reding +--- + arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/board.c | 23 ++ + arch/arm/mach-tegra/board186.c | 32 --- + arch/arm/mach-tegra/board2.c | 21 ++ + .../{tegra186/nvtboot_board.c => cboot.c} | 202 ++++++++++++++++-- + .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- + arch/arm/mach-tegra/tegra186/Makefile | 4 - + arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- + board/nvidia/p2771-0000/p2771-0000.c | 10 +- + 10 files changed, 279 insertions(+), 240 deletions(-) + create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h + delete mode 100644 arch/arm/mach-tegra/board186.c + rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (55%) + rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) + delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +new file mode 100644 +index 000000000000..b3441ec178b3 +--- /dev/null ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _TEGRA_CBOOT_H_ ++#define _TEGRA_CBOOT_H_ ++ ++#ifdef CONFIG_ARM64 ++extern unsigned long cboot_boot_x0; ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3); ++int cboot_dram_init(void); ++int cboot_dram_init_banksize(void); ++ulong cboot_get_usable_ram_top(ulong total_size); ++#else ++static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++} ++ ++static inline int cboot_dram_init(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline int cboot_dram_init_banksize(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return 0; ++} ++#endif ++ ++#endif +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index f8bc65aa8b18..41ba674edff4 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -5,7 +5,6 @@ + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +-ifndef CONFIG_TEGRA186 + ifdef CONFIG_SPL_BUILD + obj-y += spl.o + obj-y += cpu.o +@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o +-endif + +-obj-$(CONFIG_ARM64) += arm64-mmu.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 59d2f347485d..c3ba00811e83 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, + unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; ++ ++ /* ++ * The logic for this is somewhat indirect. The purpose of the marker ++ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot ++ * was loaded from a read-only instance of itself, which is something ++ * that can happen in secure boot setups. So basically the presence ++ * of the marker is an indication that U-Boot was loaded by one such ++ * special variant of U-Boot. Conversely, the absence of the marker ++ * indicates that this instance of U-Boot was loaded by something ++ * other than a special U-Boot. This could be SPL, but it could just ++ * as well be one of any number of other first stage bootloaders. ++ */ ++ if (from_spl) ++ cboot_save_boot_params(r0, r1, r2, r3); ++ + save_boot_params_ret(); + } + #endif +@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) + + int dram_init(void) + { ++ int err; ++ ++ /* try to initialize DRAM from cboot DTB first */ ++ err = cboot_dram_init(); ++ if (err == 0) ++ return 0; ++ + #if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); +diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c +deleted file mode 100644 +index 80b55707e90f..000000000000 +--- a/arch/arm/mach-tegra/board186.c ++++ /dev/null +@@ -1,32 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016, NVIDIA CORPORATION. +- */ +- +-#include +-#include +- +-int board_early_init_f(void) +-{ +- return 0; +-} +- +-__weak int tegra_board_init(void) +-{ +- return 0; +-} +- +-int board_init(void) +-{ +- return tegra_board_init(); +-} +- +-__weak int tegra_soc_board_init_late(void) +-{ +- return 0; +-} +- +-int board_late_init(void) +-{ +- return tegra_soc_board_init_late(); +-} +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index ce1c9346959d..bbc487aa3bf6 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} + __weak void gpio_early_init_uart(void) {} + __weak void pin_mux_display(void) {} + __weak void start_cpu_fan(void) {} ++__weak void cboot_late_init(void) {} + + #if defined(CONFIG_TEGRA_NAND) + __weak void pin_mux_nand(void) +@@ -243,6 +245,7 @@ int board_late_init(void) + } + #endif + start_cpu_fan(); ++ cboot_late_init(); + + return 0; + } +@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) + */ + int dram_init_banksize(void) + { ++ int err; ++ ++ /* try to compute DRAM bank size based on cboot DTB first */ ++ err = cboot_dram_init_banksize(); ++ if (err == 0) ++ return err; ++ ++ /* fall back to default DRAM bank size computation */ ++ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); + +@@ -370,5 +382,14 @@ int dram_init_banksize(void) + */ + ulong board_get_usable_ram_top(ulong total_size) + { ++ ulong ram_top; ++ ++ /* try to get top of usable RAM based on cboot DTB first */ ++ ram_top = cboot_get_usable_ram_top(total_size); ++ if (ram_top > 0) ++ return ram_top; ++ ++ /* fall back to default usable RAM computation */ ++ + return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c +similarity index 55% +rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c +rename to arch/arm/mach-tegra/cboot.c +index 83c0e931ea24..2bca98c92898 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -3,14 +3,182 @@ + * Copyright (c) 2016-2018, NVIDIA CORPORATION. + */ + +-#include + #include + #include + #include ++#include ++ ++#include ++ + #include ++#include + #include + +-extern unsigned long nvtboot_boot_x0; ++/* ++ * Size of a region that's large enough to hold the relocated U-Boot and all ++ * other allocations made around it (stack, heap, page tables, etc.) ++ * In practice, running "bdinfo" at the shell prompt, the stack reaches about ++ * 5MB from the address selected for ram_top as of the time of writing, ++ * so a 16MB region should be plenty. ++ */ ++#define MIN_USABLE_RAM_SIZE SZ_16M ++/* ++ * The amount of space we expect to require for stack usage. Used to validate ++ * that all reservations fit into the region selected for the relocation target ++ */ ++#define MIN_USABLE_STACK_SIZE SZ_1M ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++extern struct mm_region tegra_mem_map[]; ++ ++/* ++ * These variables are written to before relocation, and hence cannot be ++ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. ++ * The section attribute forces this into .data and avoids this issue. This ++ * also has the nice side-effect of the content being valid after relocation. ++ */ ++ ++/* The number of valid entries in ram_banks[] */ ++static int ram_bank_count __attribute__((section(".data"))); ++ ++/* ++ * The usable top-of-RAM for U-Boot. This is both: ++ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. ++ * b) At the end of a region that has enough space to hold the relocated U-Boot ++ * and all other allocations made around it (stack, heap, page tables, etc.) ++ */ ++static u64 ram_top __attribute__((section(".data"))); ++/* The base address of the region of RAM that ends at ram_top */ ++static u64 region_base __attribute__((section(".data"))); ++ ++int cboot_dram_init(void) ++{ ++ unsigned int na, ns; ++ const void *cboot_blob = (void *)cboot_boot_x0; ++ int node, len, i; ++ const u32 *prop; ++ ++ if (!cboot_blob) ++ return -EINVAL; ++ ++ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); ++ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); ++ ++ node = fdt_path_offset(cboot_blob, "/memory"); ++ if (node < 0) { ++ pr_err("Can't find /memory node in cboot DTB"); ++ hang(); ++ } ++ prop = fdt_getprop(cboot_blob, node, "reg", &len); ++ if (!prop) { ++ pr_err("Can't find /memory/reg property in cboot DTB"); ++ hang(); ++ } ++ ++ /* Calculate the true # of base/size pairs to read */ ++ len /= 4; /* Convert bytes to number of cells */ ++ len /= (na + ns); /* Convert cells to number of banks */ ++ if (len > CONFIG_NR_DRAM_BANKS) ++ len = CONFIG_NR_DRAM_BANKS; ++ ++ /* Parse the /memory node, and save useful entries */ ++ gd->ram_size = 0; ++ ram_bank_count = 0; ++ for (i = 0; i < len; i++) { ++ u64 bank_start, bank_end, bank_size, usable_bank_size; ++ ++ /* Extract raw memory region data from DTB */ ++ bank_start = fdt_read_number(prop, na); ++ prop += na; ++ bank_size = fdt_read_number(prop, ns); ++ prop += ns; ++ gd->ram_size += bank_size; ++ bank_end = bank_start + bank_size; ++ debug("Bank %d: %llx..%llx (+%llx)\n", i, ++ bank_start, bank_end, bank_size); ++ ++ /* ++ * Align the bank to MMU section size. This is not strictly ++ * necessary, since the translation table construction code ++ * handles page granularity without issue. However, aligning ++ * the MMU entries reduces the size and number of levels in the ++ * page table, so is worth it. ++ */ ++ bank_start = ROUND(bank_start, SZ_2M); ++ bank_end = bank_end & ~(SZ_2M - 1); ++ bank_size = bank_end - bank_start; ++ debug(" aligned: %llx..%llx (+%llx)\n", ++ bank_start, bank_end, bank_size); ++ if (bank_end <= bank_start) ++ continue; ++ ++ /* Record data used to create MMU translation tables */ ++ ram_bank_count++; ++ /* Index below is deliberately 1-based to skip MMIO entry */ ++ tegra_mem_map[ram_bank_count].virt = bank_start; ++ tegra_mem_map[ram_bank_count].phys = bank_start; ++ tegra_mem_map[ram_bank_count].size = bank_size; ++ tegra_mem_map[ram_bank_count].attrs = ++ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; ++ ++ /* Determine best bank to relocate U-Boot into */ ++ if (bank_end > SZ_4G) ++ bank_end = SZ_4G; ++ debug(" end %llx (usable)\n", bank_end); ++ usable_bank_size = bank_end - bank_start; ++ debug(" size %llx (usable)\n", usable_bank_size); ++ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && ++ (bank_end > ram_top)) { ++ ram_top = bank_end; ++ region_base = bank_start; ++ debug("ram top now %llx\n", ram_top); ++ } ++ } ++ ++ /* Ensure memory map contains the desired sentinel entry */ ++ tegra_mem_map[ram_bank_count + 1].virt = 0; ++ tegra_mem_map[ram_bank_count + 1].phys = 0; ++ tegra_mem_map[ram_bank_count + 1].size = 0; ++ tegra_mem_map[ram_bank_count + 1].attrs = 0; ++ ++ /* Error out if a relocation target couldn't be found */ ++ if (!ram_top) { ++ pr_err("Can't find a usable RAM top"); ++ hang(); ++ } ++ ++ return 0; ++} ++ ++int cboot_dram_init_banksize(void) ++{ ++ int i; ++ ++ if (ram_bank_count == 0) ++ return -EINVAL; ++ ++ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { ++ pr_err("Reservations exceed chosen region size"); ++ hang(); ++ } ++ ++ for (i = 0; i < ram_bank_count; i++) { ++ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; ++ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; ++ } ++ ++#ifdef CONFIG_PCI ++ gd->pci_ram_top = ram_top; ++#endif ++ ++ return 0; ++} ++ ++ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return ram_top; ++} + + /* + * The following few functions run late during the boot process and dynamically +@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; + * list of RAM banks into some private data structure before running. + */ + +-extern struct mm_region tegra_mem_map[]; +- + static char *gen_varname(const char *var, const char *ext) + { + size_t len_var = strlen(var); +@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) + dump_ram_banks(); + #endif + +- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); ++ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); + + #ifdef DEBUG + printf("RAM after reserving cboot DTB:\n"); +@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) + debug("%s: var: %s\n", __func__, var); + set_calculated_env_var(var); + #ifdef DEBUG +- printf("RAM banks affter allocating %s:\n", var); ++ printf("RAM banks after allocating %s:\n", var); + dump_ram_banks(); + #endif + } +@@ -274,9 +440,9 @@ static int set_fdt_addr(void) + { + int ret; + +- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); ++ ret = env_set_hex("fdtaddr", cboot_boot_x0); + if (ret) { +- printf("Failed to set fdt_addr to point at DTB: %d\n", ret); ++ printf("Failed to set fdtaddr to point at DTB: %d\n", ret); + return ret; + } + +@@ -284,12 +450,12 @@ static int set_fdt_addr(void) + } + + /* +- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's ++ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_nvtboot(void) ++static int set_ethaddr_from_cboot(void) + { +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; ++ const void *cboot_blob = (void *)cboot_boot_x0; + int ret, node, len; + const u32 *prop; + +@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) + if (env_get("ethaddr")) + return 0; + +- node = fdt_path_offset(nvtboot_blob, "/chosen"); ++ node = fdt_path_offset(cboot_blob, "/chosen"); + if (node < 0) { +- printf("Can't find /chosen node in nvtboot DTB\n"); ++ printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); ++ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); + if (!prop) { +- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); ++ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + + ret = env_set("ethaddr", (void *)prop); + if (ret) { +- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); ++ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); + return ret; + } + + return 0; + } + +-int tegra_soc_board_init_late(void) ++int cboot_late_init(void) + { + set_calculated_env_vars(); + /* +@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) + */ + set_fdt_addr(); + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_nvtboot(); ++ set_ethaddr_from_cboot(); + + return 0; + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +similarity index 57% +rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S +rename to arch/arm/mach-tegra/cboot_ll.S +index aa7a863d9702..4c9ddacc2b39 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S ++++ b/arch/arm/mach-tegra/cboot_ll.S +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * Save nvtboot-related boot-time CPU state ++ * Save cboot-related boot-time CPU state + * + * (C) Copyright 2015-2016 NVIDIA Corporation + */ +@@ -9,12 +9,12 @@ + #include + + .align 8 +-.globl nvtboot_boot_x0 +-nvtboot_boot_x0: ++.globl cboot_boot_x0 ++cboot_boot_x0: + .dword 0 + +-ENTRY(save_boot_params) +- adr x8, nvtboot_boot_x0 ++ENTRY(cboot_save_boot_params) ++ adr x8, cboot_boot_x0 + str x0, [x8] + b save_boot_params_ret +-ENDPROC(save_boot_params) ++ENDPROC(cboot_save_boot_params) +diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile +index 56f3378ecea3..3a2405027704 100644 +--- a/arch/arm/mach-tegra/tegra186/Makefile ++++ b/arch/arm/mach-tegra/tegra186/Makefile +@@ -2,8 +2,4 @@ + # + # SPDX-License-Identifier: GPL-2.0 + +-obj-y += ../board186.o + obj-y += cache.o +-obj-y += nvtboot_board.o +-obj-y += nvtboot_ll.o +-obj-y += nvtboot_mem.o +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +deleted file mode 100644 +index 62142821a595..000000000000 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c ++++ /dev/null +@@ -1,172 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016-2018, NVIDIA CORPORATION. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-/* +- * Size of a region that's large enough to hold the relocated U-Boot and all +- * other allocations made around it (stack, heap, page tables, etc.) +- * In practice, running "bdinfo" at the shell prompt, the stack reaches about +- * 5MB from the address selected for ram_top as of the time of writing, +- * so a 16MB region should be plenty. +- */ +-#define MIN_USABLE_RAM_SIZE SZ_16M +-/* +- * The amount of space we expect to require for stack usage. Used to validate +- * that all reservations fit into the region selected for the relocation target +- */ +-#define MIN_USABLE_STACK_SIZE SZ_1M +- +-DECLARE_GLOBAL_DATA_PTR; +- +-extern unsigned long nvtboot_boot_x0; +-extern struct mm_region tegra_mem_map[]; +- +-/* +- * These variables are written to before relocation, and hence cannot be +- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. +- * The section attribute forces this into .data and avoids this issue. This +- * also has the nice side-effect of the content being valid after relocation. +- */ +- +-/* The number of valid entries in ram_banks[] */ +-static int ram_bank_count __attribute__((section(".data"))); +- +-/* +- * The usable top-of-RAM for U-Boot. This is both: +- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. +- * b) At the end of a region that has enough space to hold the relocated U-Boot +- * and all other allocations made around it (stack, heap, page tables, etc.) +- */ +-static u64 ram_top __attribute__((section(".data"))); +-/* The base address of the region of RAM that ends at ram_top */ +-static u64 region_base __attribute__((section(".data"))); +- +-int dram_init(void) +-{ +- unsigned int na, ns; +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; +- int node, len, i; +- const u32 *prop; +- +- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); +- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); +- +- node = fdt_path_offset(nvtboot_blob, "/memory"); +- if (node < 0) { +- pr_err("Can't find /memory node in nvtboot DTB"); +- hang(); +- } +- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); +- if (!prop) { +- pr_err("Can't find /memory/reg property in nvtboot DTB"); +- hang(); +- } +- +- /* Calculate the true # of base/size pairs to read */ +- len /= 4; /* Convert bytes to number of cells */ +- len /= (na + ns); /* Convert cells to number of banks */ +- if (len > CONFIG_NR_DRAM_BANKS) +- len = CONFIG_NR_DRAM_BANKS; +- +- /* Parse the /memory node, and save useful entries */ +- gd->ram_size = 0; +- ram_bank_count = 0; +- for (i = 0; i < len; i++) { +- u64 bank_start, bank_end, bank_size, usable_bank_size; +- +- /* Extract raw memory region data from DTB */ +- bank_start = fdt_read_number(prop, na); +- prop += na; +- bank_size = fdt_read_number(prop, ns); +- prop += ns; +- gd->ram_size += bank_size; +- bank_end = bank_start + bank_size; +- debug("Bank %d: %llx..%llx (+%llx)\n", i, +- bank_start, bank_end, bank_size); +- +- /* +- * Align the bank to MMU section size. This is not strictly +- * necessary, since the translation table construction code +- * handles page granularity without issue. However, aligning +- * the MMU entries reduces the size and number of levels in the +- * page table, so is worth it. +- */ +- bank_start = ROUND(bank_start, SZ_2M); +- bank_end = bank_end & ~(SZ_2M - 1); +- bank_size = bank_end - bank_start; +- debug(" aligned: %llx..%llx (+%llx)\n", +- bank_start, bank_end, bank_size); +- if (bank_end <= bank_start) +- continue; +- +- /* Record data used to create MMU translation tables */ +- ram_bank_count++; +- /* Index below is deliberately 1-based to skip MMIO entry */ +- tegra_mem_map[ram_bank_count].virt = bank_start; +- tegra_mem_map[ram_bank_count].phys = bank_start; +- tegra_mem_map[ram_bank_count].size = bank_size; +- tegra_mem_map[ram_bank_count].attrs = +- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; +- +- /* Determine best bank to relocate U-Boot into */ +- if (bank_end > SZ_4G) +- bank_end = SZ_4G; +- debug(" end %llx (usable)\n", bank_end); +- usable_bank_size = bank_end - bank_start; +- debug(" size %llx (usable)\n", usable_bank_size); +- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && +- (bank_end > ram_top)) { +- ram_top = bank_end; +- region_base = bank_start; +- debug("ram top now %llx\n", ram_top); +- } +- } +- +- /* Ensure memory map contains the desired sentinel entry */ +- tegra_mem_map[ram_bank_count + 1].virt = 0; +- tegra_mem_map[ram_bank_count + 1].phys = 0; +- tegra_mem_map[ram_bank_count + 1].size = 0; +- tegra_mem_map[ram_bank_count + 1].attrs = 0; +- +- /* Error out if a relocation target couldn't be found */ +- if (!ram_top) { +- pr_err("Can't find a usable RAM top"); +- hang(); +- } +- +- return 0; +-} +- +-int dram_init_banksize(void) +-{ +- int i; +- +- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { +- pr_err("Reservations exceed chosen region size"); +- hang(); +- } +- +- for (i = 0; i < ram_bank_count; i++) { +- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; +- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; +- } +- +-#ifdef CONFIG_PCI +- gd->pci_ram_top = ram_top; +-#endif +- +- return 0; +-} +- +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- return ram_top; +-} +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 496e8a02111e..6f88010c18c3 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -7,7 +7,7 @@ + #include + #include "../p2571/max77620_init.h" + +-int tegra_board_init(void) ++void pin_mux_mmc(void) + { + struct udevice *dev; + uchar val; +@@ -18,19 +18,18 @@ int tegra_board_init(void) + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +- return ret; ++ return; + } + /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xF2; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); + if (ret) { + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +- return ret; ++ return; + } +- +- return 0; + } + ++#ifdef CONFIG_PCI_TEGRA + int tegra_pcie_board_init(void) + { + struct udevice *dev; +@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) + + return 0; + } ++#endif + +From patchwork Mon Mar 18 23:24:20 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 13/15] ARM: tegra: Implement cboot_save_boot_params() in C +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058159 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-14-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:20 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This is easier to deal with and works just as well for this simple +function. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ + arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- + 3 files changed, 13 insertions(+), 21 deletions(-) + delete mode 100644 arch/arm/mach-tegra/cboot_ll.S + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 41ba674edff4..7165d70a60da 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + +-obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 2bca98c92898..8708c4ec9727 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); + /* The base address of the region of RAM that ends at ram_top */ + static u64 region_base __attribute__((section(".data"))); + ++/* ++ * Explicitly put this in the .data section because it is written before the ++ * .bss section is zeroed out but it needs to persist. ++ */ ++unsigned long cboot_boot_x0 __attribute__((section(".data"))); ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++ cboot_boot_x0 = x0; ++} ++ + int cboot_dram_init(void) + { + unsigned int na, ns; +diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +deleted file mode 100644 +index 4c9ddacc2b39..000000000000 +--- a/arch/arm/mach-tegra/cboot_ll.S ++++ /dev/null +@@ -1,20 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Save cboot-related boot-time CPU state +- * +- * (C) Copyright 2015-2016 NVIDIA Corporation +- */ +- +-#include +-#include +- +-.align 8 +-.globl cboot_boot_x0 +-cboot_boot_x0: +- .dword 0 +- +-ENTRY(cboot_save_boot_params) +- adr x8, cboot_boot_x0 +- str x0, [x8] +- b save_boot_params_ret +-ENDPROC(cboot_save_boot_params) + +From patchwork Mon Mar 18 23:24:21 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v2,14/15] ARM: tegra: Implement cboot_get_ethaddr() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058160 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-15-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:21 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function will attempt to look up an ethernet address in the DTB +that was passed in from cboot. It does so by first trying to locate the +primary ethernet device for the board (identified by the "ethernet" +alias) and if found, reads the "local-mac-address" property. If the +"ethernet" alias does not exist, or if it points to a device tree node +that doesn't exist, or if the device tree node that it points to does +not have a "local-mac-address" property or if the value is invalid, it +will fall back to the legacy mechanism of looking for the MAC address +stored in the "nvidia,ethernet-mac" property of the "/chosen" node. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- make dummy static inline to avoid duplicate definitions +--- + arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ + arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- + 2 files changed, 69 insertions(+), 15 deletions(-) + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +index b3441ec178b3..021c24617575 100644 +--- a/arch/arm/include/asm/arch-tegra/cboot.h ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, + int cboot_dram_init(void); + int cboot_dram_init_banksize(void); + ulong cboot_get_usable_ram_top(ulong total_size); ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); + #else + static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, + unsigned long x2, unsigned long x3) +@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) + { + return 0; + } ++ ++static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ return -ENOSYS; ++} + #endif + + #endif +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 8708c4ec9727..c7a38d258cce 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -4,6 +4,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -465,46 +466,93 @@ static int set_fdt_addr(void) + * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_cboot(void) ++static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) + { +- const void *cboot_blob = (void *)cboot_boot_x0; +- int ret, node, len; +- const u32 *prop; +- +- /* Already a valid address in the environment? If so, keep it */ +- if (env_get("ethaddr")) +- return 0; ++ const char *prop; ++ int node, len; + +- node = fdt_path_offset(cboot_blob, "/chosen"); ++ node = fdt_path_offset(fdt, "/chosen"); + if (node < 0) { + printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); ++ ++ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); + if (!prop) { + printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + +- ret = env_set("ethaddr", (void *)prop); +- if (ret) { +- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); +- return ret; ++ eth_parse_enetaddr(prop, mac); ++ ++ if (!is_valid_ethaddr(mac)) { ++ printf("Invalid MAC address: %s\n", prop); ++ return -EINVAL; + } + ++ debug("Legacy MAC address: %pM\n", mac); ++ + return 0; + } + ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ int node, len, err = 0; ++ const uchar *prop; ++ const char *path; ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ node = fdt_path_offset(fdt, path); ++ if (node < 0) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ prop = fdt_getprop(fdt, node, "local-mac-address", &len); ++ if (!prop) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ if (len != ETH_ALEN) { ++ err = -EINVAL; ++ goto out; ++ } ++ ++ debug("MAC address: %pM\n", prop); ++ memcpy(mac, prop, ETH_ALEN); ++ ++out: ++ if (err < 0) ++ err = cboot_get_ethaddr_legacy(fdt, mac); ++ ++ return err; ++} ++ + int cboot_late_init(void) + { ++ const void *fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN]; ++ int err; ++ + set_calculated_env_vars(); + /* + * Ignore errors here; the value may not be used depending on + * extlinux.conf or boot script content. + */ + set_fdt_addr(); ++ + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_cboot(); ++ err = cboot_get_ethaddr(fdt, mac); ++ if (!err) ++ eth_env_set_enetaddr("ethaddr", mac); + + return 0; + } + +From patchwork Mon Mar 18 23:24:22 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v2, + 15/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1058155 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190318232422.24404-16-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Tue, 19 Mar 2019 00:24:22 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The Jetson Nano Developer Kit is a Tegra X1 based development board. It +is similar to Jetson TX1 but it is not pin compatible. It features 4 GB +of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot +used for storage. + +HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 +and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI +Ethernet controller provides onboard network connectivity. + +A 40-pin header on the board can be used to extend the capabilities and +exposed interfaces of the Jetson Nano. + +Signed-off-by: Thierry Reding +--- + arch/arm/dts/tegra210-p3450-0000.dts | 130 +++++++++ + arch/arm/mach-tegra/tegra210/Kconfig | 7 + + board/nvidia/p3450-0000/Kconfig | 12 + + board/nvidia/p3450-0000/MAINTAINERS | 6 + + board/nvidia/p3450-0000/Makefile | 8 + + board/nvidia/p3450-0000/p3450-0000.c | 143 ++++++++++ + .../p3450-0000/pinmux-config-p3450-0000.h | 257 ++++++++++++++++++ + configs/p3450-0000_defconfig | 54 ++++ + include/configs/p3450-0000.h | 44 +++ + 9 files changed, 661 insertions(+) + create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts + create mode 100644 board/nvidia/p3450-0000/Kconfig + create mode 100644 board/nvidia/p3450-0000/MAINTAINERS + create mode 100644 board/nvidia/p3450-0000/Makefile + create mode 100644 board/nvidia/p3450-0000/p3450-0000.c + create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h + create mode 100644 configs/p3450-0000_defconfig + create mode 100644 include/configs/p3450-0000.h + +diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts +new file mode 100644 +index 000000000000..a2119165e2f6 +--- /dev/null ++++ b/arch/arm/dts/tegra210-p3450-0000.dts +@@ -0,0 +1,130 @@ ++/dts-v1/; ++ ++#include "tegra210.dtsi" ++ ++/ { ++ model = "NVIDIA Jetson Nano Development Kit"; ++ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; ++ ++ chosen { ++ stdout-path = &uarta; ++ }; ++ ++ aliases { ++ i2c0 = "/i2c@7000d000"; ++ i2c2 = "/i2c@7000c400"; ++ i2c3 = "/i2c@7000c500"; ++ i2c4 = "/i2c@7000c700"; ++ sdhci0 = "/sdhci@700b0600"; ++ sdhci1 = "/sdhci@700b0000"; ++ spi0 = "/spi@70410000"; ++ usb0 = "/usb@7d000000"; ++ }; ++ ++ memory { ++ reg = <0x0 0x80000000 0x0 0xc0000000>; ++ }; ++ ++ pcie-controller@01003000 { ++ status = "okay"; ++ ++ pci@1,0 { ++ status = "okay"; ++ }; ++ ++ pci@2,0 { ++ status = "okay"; ++ }; ++ }; ++ ++ serial@70006000 { ++ status = "okay"; ++ }; ++ ++ padctl@7009f000 { ++ pinctrl-0 = <&padctl_default>; ++ pinctrl-names = "default"; ++ ++ padctl_default: pinmux { ++ xusb { ++ nvidia,lanes = "otg-1", "otg-2"; ++ nvidia,function = "xusb"; ++ nvidia,iddq = <0>; ++ }; ++ ++ usb3 { ++ nvidia,lanes = "pcie-5", "pcie-6"; ++ nvidia,function = "usb3"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x1 { ++ nvidia,lanes = "pcie-0"; ++ nvidia,function = "pcie-x1"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x4 { ++ nvidia,lanes = "pcie-1", "pcie-2", ++ "pcie-3", "pcie-4"; ++ nvidia,function = "pcie-x4"; ++ nvidia,iddq = <0>; ++ }; ++ ++ sata { ++ nvidia,lanes = "sata-0"; ++ nvidia,function = "sata"; ++ nvidia,iddq = <0>; ++ }; ++ }; ++ }; ++ ++ sdhci@700b0000 { ++ status = "okay"; ++ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; ++ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ }; ++ ++ i2c@7000c400 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c500 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c700 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000d000 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ spi@70410000 { ++ status = "okay"; ++ }; ++ ++ usb@7d000000 { ++ status = "okay"; ++ dr_mode = "peripheral"; ++ }; ++ ++ clocks { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ clk32k_in: clock@0 { ++ compatible = "fixed-clock"; ++ reg = <0>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig +index 250738aed312..60dde5435940 100644 +--- a/arch/arm/mach-tegra/tegra210/Kconfig ++++ b/arch/arm/mach-tegra/tegra210/Kconfig +@@ -35,6 +35,12 @@ config TARGET_P2571 + help + P2571 is a P2530 married to a P1963 I/O board + ++config TARGET_P3450_0000 ++ bool "NVIDIA Jetson Nano Development Kit" ++ select BOARD_LATE_INIT ++ help ++ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. ++ + endchoice + + config SYS_SOC +@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" + source "board/nvidia/p2371-0000/Kconfig" + source "board/nvidia/p2371-2180/Kconfig" + source "board/nvidia/p2571/Kconfig" ++source "board/nvidia/p3450-0000/Kconfig" + + endif +diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig +new file mode 100644 +index 000000000000..7a08cd88675f +--- /dev/null ++++ b/board/nvidia/p3450-0000/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_P3450_0000 ++ ++config SYS_BOARD ++ default "p3450-0000" ++ ++config SYS_VENDOR ++ default "nvidia" ++ ++config SYS_CONFIG_NAME ++ default "p3450-0000" ++ ++endif +diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS +new file mode 100644 +index 000000000000..40700066bf39 +--- /dev/null ++++ b/board/nvidia/p3450-0000/MAINTAINERS +@@ -0,0 +1,6 @@ ++P3450-0000 BOARD ++M: Tom Warren ++S: Maintained ++F: board/nvidia/p3450-0000/ ++F: include/configs/p3450-0000.h ++F: configs/p3450-0000_defconfig +diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile +new file mode 100644 +index 000000000000..993c506d8200 +--- /dev/null ++++ b/board/nvidia/p3450-0000/Makefile +@@ -0,0 +1,8 @@ ++# ++# (C) Copyright 2018 ++# NVIDIA Corporation ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += p3450-0000.o +diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c +new file mode 100644 +index 000000000000..fc13185c36b6 +--- /dev/null ++++ b/board/nvidia/p3450-0000/p3450-0000.c +@@ -0,0 +1,143 @@ ++/* ++ * (C) Copyright 2018 ++ * NVIDIA Corporation ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../p2571/max77620_init.h" ++#include "pinmux-config-p3450-0000.h" ++ ++void pin_mux_mmc(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ ++ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return; ++ } ++ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xF2; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); ++ ++ /* Disable LDO4 discharge */ ++ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) { ++ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); ++ } else { ++ val &= ~BIT(1); /* ADE */ ++ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); ++ } ++ ++ /* Set MBLPD */ ++ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) { ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } else { ++ val |= BIT(6); /* MBLPD */ ++ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } ++} ++ ++/* ++ * Routine: pinmux_init ++ * Description: Do individual peripheral pinmux configs ++ */ ++void pinmux_init(void) ++{ ++ pinmux_clear_tristate_input_clamping(); ++ ++ gpio_config_table(p3450_0000_gpio_inits, ++ ARRAY_SIZE(p3450_0000_gpio_inits)); ++ ++ pinmux_config_pingrp_table(p3450_0000_pingrps, ++ ARRAY_SIZE(p3450_0000_pingrps)); ++ ++ pinmux_config_drvgrp_table(p3450_0000_drvgrps, ++ ARRAY_SIZE(p3450_0000_drvgrps)); ++} ++ ++#ifdef CONFIG_PCI_TEGRA ++int tegra_pcie_board_init(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ ++ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return -1; ++ } ++ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xCA; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); ++ ++ return 0; ++} ++#endif /* PCI */ ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return 0; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) ++ return 0; ++ ++ debug("PCI ethernet device tree node found\n"); ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++ ++ return 0; ++} +diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +new file mode 100644 +index 000000000000..d491bffccd72 +--- /dev/null ++++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +@@ -0,0 +1,257 @@ ++/* ++ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* ++ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! ++ * ++ * To generate this file, use the tegra-pinmux-scripts tool available from ++ * https://github.com/NVIDIA/tegra-pinmux-scripts ++ * Run "board-to-uboot.py p3450-0000". ++ */ ++ ++#ifndef _PINMUX_CONFIG_P3450_0000_H_ ++#define _PINMUX_CONFIG_P3450_0000_H_ ++ ++#define GPIO_INIT(_port, _gpio, _init) \ ++ { \ ++ .gpio = TEGRA_GPIO(_port, _gpio), \ ++ .init = TEGRA_GPIO_INIT_##_init, \ ++ } ++ ++static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { ++ /* port, pin, init_val */ ++ GPIO_INIT(A, 5, IN), ++ GPIO_INIT(A, 6, OUT0), ++ GPIO_INIT(B, 4, IN), ++ GPIO_INIT(B, 5, IN), ++ GPIO_INIT(B, 6, IN), ++ GPIO_INIT(B, 7, IN), ++ GPIO_INIT(C, 0, IN), ++ GPIO_INIT(C, 1, IN), ++ GPIO_INIT(C, 2, IN), ++ GPIO_INIT(C, 3, IN), ++ GPIO_INIT(C, 4, IN), ++ GPIO_INIT(E, 6, IN), ++ GPIO_INIT(G, 2, IN), ++ GPIO_INIT(G, 3, IN), ++ GPIO_INIT(H, 0, OUT0), ++ GPIO_INIT(H, 2, IN), ++ GPIO_INIT(H, 3, OUT0), ++ GPIO_INIT(H, 4, OUT0), ++ GPIO_INIT(H, 5, IN), ++ GPIO_INIT(H, 6, IN), ++ GPIO_INIT(H, 7, OUT0), ++ GPIO_INIT(I, 0, OUT0), ++ GPIO_INIT(I, 1, IN), ++ GPIO_INIT(I, 2, OUT0), ++ GPIO_INIT(J, 4, IN), ++ GPIO_INIT(J, 5, IN), ++ GPIO_INIT(J, 6, IN), ++ GPIO_INIT(J, 7, IN), ++ GPIO_INIT(S, 5, IN), ++ GPIO_INIT(S, 7, OUT0), ++ GPIO_INIT(T, 0, OUT0), ++ GPIO_INIT(V, 0, IN), ++ GPIO_INIT(V, 1, IN), ++ GPIO_INIT(X, 3, OUT1), ++ GPIO_INIT(X, 4, IN), ++ GPIO_INIT(X, 5, IN), ++ GPIO_INIT(X, 6, IN), ++ GPIO_INIT(Y, 1, IN), ++ GPIO_INIT(Y, 2, IN), ++ GPIO_INIT(Z, 0, IN), ++ GPIO_INIT(Z, 2, IN), ++ GPIO_INIT(Z, 3, OUT0), ++ GPIO_INIT(BB, 0, IN), ++ GPIO_INIT(CC, 4, IN), ++ GPIO_INIT(DD, 0, IN), ++}; ++ ++#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ ++ { \ ++ .pingrp = PMUX_PINGRP_##_pingrp, \ ++ .func = PMUX_FUNC_##_mux, \ ++ .pull = PMUX_PULL_##_pull, \ ++ .tristate = PMUX_TRI_##_tri, \ ++ .io = PMUX_PIN_##_io, \ ++ .od = PMUX_PIN_OD_##_od, \ ++ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ ++ .lock = PMUX_PIN_LOCK_DEFAULT, \ ++ } ++ ++static const struct pmux_pingrp_config p3450_0000_pingrps[] = { ++ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ ++ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), ++ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), ++ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++}; ++ ++#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ ++ { \ ++ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ ++ .slwf = _slwf, \ ++ .slwr = _slwr, \ ++ .drvup = _drvup, \ ++ .drvdn = _drvdn, \ ++ .lpmd = PMUX_LPMD_##_lpmd, \ ++ .schmt = PMUX_SCHMT_##_schmt, \ ++ .hsm = PMUX_HSM_##_hsm, \ ++ } ++ ++static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { ++}; ++ ++#endif /* PINMUX_CONFIG_P3450_0000_H */ +diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig +new file mode 100644 +index 000000000000..32c2b65a2979 +--- /dev/null ++++ b/configs/p3450-0000_defconfig +@@ -0,0 +1,54 @@ ++CONFIG_ARM=y ++CONFIG_TEGRA=y ++CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_TEGRA210=y ++CONFIG_TARGET_P3450_0000=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_STDIO_DEREGISTER=y ++CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_CMD_NFS is not set ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_OF_LIVE=y ++CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_SYS_I2C_TEGRA=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_RTL8169=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCI_TEGRA=y ++CONFIG_SYS_NS16550=y ++CONFIG_TEGRA114_SPI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_TEGRA=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0955 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x701a ++CONFIG_CI_UDC=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++# CONFIG_ENV_IS_IN_MMC is not set +diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h +new file mode 100644 +index 000000000000..37c71421acbb +--- /dev/null ++++ b/include/configs/p3450-0000.h +@@ -0,0 +1,44 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _P3450_0000_H ++#define _P3450_0000_H ++ ++#include ++ ++#include "tegra210-common.h" ++ ++/* High-level configuration options */ ++#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" ++ ++/* Board-specific serial config */ ++#define CONFIG_TEGRA_ENABLE_UARTA ++ ++/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 0) \ ++ func(PXE, pxe, na) \ ++ func(DHCP, dhcp, na) ++ ++/* SPI */ ++#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 ++#define CONFIG_SF_DEFAULT_SPEED 24000000 ++#define CONFIG_SPI_FLASH_SIZE (4 << 20) ++ ++#define CONFIG_PREBOOT ++ ++#define BOARD_EXTRA_ENV_SETTINGS \ ++ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ ++ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ ++ "source ${scriptaddr}; " \ ++ "fi\0" ++ ++#include "tegra-common-usb-gadget.h" ++#include "tegra-common-post.h" ++ ++/* Crystal is 38.4MHz. clk_m runs at half that rate */ ++#define COUNTER_FREQUENCY 19200000 ++ ++#endif /* _P3450_0000_H */ diff --git a/aarch64-boards b/aarch64-boards index d83468e..e0e0170 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -33,6 +33,7 @@ orangepi_zero_plus2 p212 p2371-2180 p2771-0000-500 +p3450-0000 pine64-lts pine64_plus pinebook diff --git a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch new file mode 100644 index 0000000..2896af8 --- /dev/null +++ b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch @@ -0,0 +1,147 @@ +From patchwork Fri Mar 8 19:51:25 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, + 1/3] net: eth-uclass: Write MAC address to hardware after probe +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1053669 +Message-Id: <20190308195127.32711-1-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de, Stephen Warren , + Tom Warren +Date: Fri, 8 Mar 2019 20:51:25 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +In order for the device to use the proper MAC address, which can have +been configured in the environment prior to the device being registered, +ensure that the MAC address is written after the device has been probed. +For devices that are registered before the network stack is initialized, +this is already done during eth_initialize(). If the Ethernet device is +on a bus that is not initialized on early boot, such as PCI, the device +is not available at the time eth_initialize() is called, so we need the +MAC address programming to also happen after probe. + +Signed-off-by: Thierry Reding +--- + net/eth-uclass.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/net/eth-uclass.c b/net/eth-uclass.c +index 2ef20df19203..4225aabf1fa1 100644 +--- a/net/eth-uclass.c ++++ b/net/eth-uclass.c +@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev) + #endif + } + ++ eth_write_hwaddr(dev); ++ + return 0; + } + + +From patchwork Fri Mar 8 19:51:26 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,2/3] net: rtl8169: Implement ->hwaddr_write() callback +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1053670 +Message-Id: <20190308195127.32711-2-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de, Stephen Warren , + Tom Warren +Date: Fri, 8 Mar 2019 20:51:26 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Implement this callback that allows the MAC address to be set for the +Ethernet card. This is necessary in order for the device to be able to +receive packets for the MAC address that U-Boot advertises. + +Signed-off-by: Thierry Reding +--- + drivers/net/rtl8169.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index a78f3d233f1a..27e27b34176b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) + } + #endif + ++#ifdef CONFIG_DM_ETH ++static int rtl8169_write_hwaddr(struct udevice *dev) ++{ ++ struct eth_pdata *plat = dev_get_platdata(dev); ++ unsigned int i; ++ ++ RTL_W8(Cfg9346, Cfg9346_Unlock); ++ ++ for (i = 0; i < MAC_ADDR_LEN; i++) ++ RTL_W8(MAC0 + i, plat->enetaddr[i]); ++ ++ RTL_W8(Cfg9346, Cfg9346_Lock); ++ ++ return 0; ++} ++#endif ++ + /************************************************************************** + INIT - Look for an adapter, this routine's visible to the outside + ***************************************************************************/ +@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { + .send = rtl8169_eth_send, + .recv = rtl8169_eth_recv, + .stop = rtl8169_eth_stop, ++ .write_hwaddr = rtl8169_write_hwaddr, + }; + + static const struct udevice_id rtl8169_eth_ids[] = { + +From patchwork Fri Mar 8 19:51:27 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,3/3] net: rtl8169: Support RTL-8168h/8111h +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1053671 +Message-Id: <20190308195127.32711-3-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de, Stephen Warren , + Tom Warren +Date: Fri, 8 Mar 2019 20:51:27 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This version of the RTL-8168 is present on some development boards and +is compatible with this driver. Add support for identifying this version +of the chip so that U-Boot won't complain about it being unknown. + +Signed-off-by: Thierry Reding +--- + drivers/net/rtl8169.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index 27e27b34176b..bc052e72564b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -257,6 +257,7 @@ static struct { + {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, + {"RTL-8101e", 0x34, 0xff7e1880,}, + {"RTL-8100e", 0x32, 0xff7e1880,}, ++ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, + }; + + enum _DescStatusBit { diff --git a/tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch b/tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch similarity index 62% rename from tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch rename to tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch index 3364bb1..20fa98d 100644 --- a/tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch +++ b/tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch @@ -1,20 +1,18 @@ -From c8b9f0c2ca0a4270db811867ad051e75efa4100a Mon Sep 17 00:00:00 2001 +From 80dda7644f2691d599bc87a7a96645bda0305424 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 5 Sep 2018 11:13:40 +0100 -Subject: [PATCH] tegra: TXx: Add CONFIG_EFI_LOADER_BOUNCE_BUFFER - -The Jetson TX series needs EFI loader bounce buffer enabled otherwise grub doesn't see -the storage when it loads. +Date: Wed, 20 Mar 2019 09:29:49 +0000 +Subject: [PATCH] tegra: TX: Add CONFIG_EFI_LOADER_BOUNCE_BUFFER Signed-off-by: Peter Robinson --- configs/p2371-2180_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + - 3 files changed, 3 insertions(+) + configs/p3450-0000_defconfig | 1 + + 4 files changed, 4 insertions(+) diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index d9dcf7e014..156a1cbcf9 100644 +index b662ef1431..c1b87a8071 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -5,6 +5,7 @@ CONFIG_TEGRA210=y @@ -26,29 +24,41 @@ index d9dcf7e014..156a1cbcf9 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index 2bf2e31359..15ea2fc6d6 100644 +index ad0802067e..799a06e454 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=8 + CONFIG_NR_DRAM_BANKS=1026 CONFIG_OF_SYSTEM_SETUP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index 1e33c1f95b..a32b6a866e 100644 +index 459b67fd19..6193cff822 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=8 + CONFIG_NR_DRAM_BANKS=1026 CONFIG_OF_SYSTEM_SETUP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " +diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig +index 32c2b65a29..6da9daebe5 100644 +--- a/configs/p3450-0000_defconfig ++++ b/configs/p3450-0000_defconfig +@@ -7,6 +7,7 @@ CONFIG_TARGET_P3450_0000=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_OF_BOARD_SETUP=y ++CONFIG_EFI_LOADER_BOUNCE_BUFFER=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " -- -2.19.0.rc0 +2.20.1 diff --git a/tegra-fix-tx1.patch b/tegra-fix-tx1.patch deleted file mode 100644 index 9c03262..0000000 --- a/tegra-fix-tx1.patch +++ /dev/null @@ -1,472 +0,0 @@ -From a2872b1e2f81e04f92f0970e18c6c8a40640eea8 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 5 Sep 2018 12:11:40 +0100 -Subject: [PATCH] tegra fix tx1 - -Signed-off-by: Peter Robinson ---- - arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + - arch/arm/mach-tegra/board.c | 4 +- - arch/arm/mach-tegra/board2.c | 12 ++++ - arch/arm/mach-tegra/dt-setup.c | 5 +- - arch/arm/mach-tegra/gpu.c | 2 + - .../mach-tegra/{tegra186 => }/nvtboot_board.c | 70 +++++++++++++++++++ - .../mach-tegra/{tegra186 => }/nvtboot_ll.S | 0 - .../mach-tegra/{tegra186 => }/nvtboot_mem.c | 0 - arch/arm/mach-tegra/tegra186/Makefile | 6 +- - arch/arm/mach-tegra/tegra210/Makefile | 3 + - arch/arm/mach-tegra/tegra210/clock.c | 19 ----- - arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 +++++++++++------- - arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ - configs/p2371-0000_defconfig | 2 +- - configs/p2371-2180_defconfig | 2 +- - configs/p2571_defconfig | 2 +- - 16 files changed, 146 insertions(+), 54 deletions(-) - rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_board.c (84%) - rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_ll.S (100%) - rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_mem.c (100%) - -diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h -index deccdf455d..7e14d8109d 100644 ---- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h -+++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h -@@ -16,6 +16,7 @@ struct tegra_xusb_phy; - struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type); - - void tegra_xusb_padctl_init(void); -+void tegra_xusb_padctl_exit(void); - int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy); - int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy); - int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy); -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index f8fc042a1d..ddef228831 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -35,7 +35,7 @@ enum { - - static bool from_spl __attribute__ ((section(".data"))); - --#ifndef CONFIG_SPL_BUILD -+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TEGRA210) - void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; -@@ -66,6 +66,7 @@ bool tegra_cpu_is_non_secure(void) - } - #endif - -+#if !defined(CONFIG_ARM64) - /* Read the RAM size directly from the memory controller */ - static phys_size_t query_sdram_size(void) - { -@@ -122,6 +123,7 @@ int dram_init(void) - gd->ram_size = query_sdram_size(); - return 0; - } -+#endif - - static int uart_configs[] = { - #if defined(CONFIG_TEGRA20) -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 421a71b301..22ecd99760 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -171,6 +171,12 @@ int board_init(void) - return nvidia_board_init(); - } - -+void board_cleanup_before_linux(void) -+{ -+ /* power down UPHY PLL */ -+ tegra_xusb_padctl_exit(); -+} -+ - #ifdef CONFIG_BOARD_EARLY_INIT_F - static void __gpio_early_init(void) - { -@@ -220,9 +226,14 @@ int board_late_init(void) - #endif - start_cpu_fan(); - -+#if defined(CONFIG_TEGRA210) -+ tegra_soc_board_init_late(); -+#endif -+ - return 0; - } - -+#ifndef CONFIG_TEGRA210 - /* - * In some SW environments, a memory carve-out exists to house a secure - * monitor, a trusted OS, and/or various statically allocated media buffers. -@@ -348,3 +359,4 @@ ulong board_get_usable_ram_top(ulong total_size) - { - return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); - } -+#endif -diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c -index 8ac723f41e..a961fab20f 100644 ---- a/arch/arm/mach-tegra/dt-setup.c -+++ b/arch/arm/mach-tegra/dt-setup.c -@@ -12,12 +12,10 @@ - */ - int ft_system_setup(void *blob, bd_t *bd) - { -+#if !defined(CONFIG_ARM64) - const char *gpu_compats[] = { - #if defined(CONFIG_TEGRA124) - "nvidia,gk20a", --#endif --#if defined(CONFIG_TEGRA210) -- "nvidia,gm20b", - #endif - }; - int i, ret; -@@ -28,6 +26,7 @@ int ft_system_setup(void *blob, bd_t *bd) - if (ret) - return ret; - } -+#endif - - return 0; - } -diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c -index e047f67821..3b8c1a0434 100644 ---- a/arch/arm/mach-tegra/gpu.c -+++ b/arch/arm/mach-tegra/gpu.c -@@ -17,6 +17,7 @@ static bool _configured; - - void tegra_gpu_config(void) - { -+#if !defined(CONFIG_ARM64) - struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; - - #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) -@@ -34,6 +35,7 @@ void tegra_gpu_config(void) - debug("configured VPR\n"); - - _configured = true; -+#endif - } - - #if defined(CONFIG_OF_LIBFDT) -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/nvtboot_board.c -similarity index 84% -rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c -rename to arch/arm/mach-tegra/nvtboot_board.c -index 83c0e931ea..7b98b502ef 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c -+++ b/arch/arm/mach-tegra/nvtboot_board.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -270,6 +271,27 @@ static void set_calculated_env_vars(void) - free(vars); - } - -+char *strstrip(char *s) -+{ -+ size_t size; -+ char *end; -+ -+ size = strlen(s); -+ -+ if (!size) -+ return s; -+ -+ end = s + size - 1; -+ while (end >= s && isblank(*end)) -+ end--; -+ *(end + 1) = '\0'; -+ -+ while (*s && isblank(*s)) -+ s++; -+ -+ return s; -+} -+ - static int set_fdt_addr(void) - { - int ret; -@@ -283,6 +305,7 @@ static int set_fdt_addr(void) - return 0; - } - -+#if defined(CONFIG_TEGRA186) - /* - * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's - * ethaddr environment variable if possible. -@@ -316,6 +339,49 @@ static int set_ethaddr_from_nvtboot(void) - - return 0; - } -+#endif -+ -+static int set_cbootargs(void) -+{ -+ const void *nvtboot_blob = (void *)nvtboot_boot_x0; -+ const void *prop; -+ char *bargs, *s; -+ int node, len, ret = 0; -+ -+ /* -+ * Save the bootargs passed in the DTB by the previous bootloader -+ * (CBoot) to the env. (pointer in reg x0) -+ */ -+ -+ debug("%s: nvtboot_blob = %p\n", __func__, nvtboot_blob); -+ -+ node = fdt_path_offset(nvtboot_blob, "/chosen"); -+ if (node < 0) { -+ pr_err("Can't find /chosen node in nvtboot DTB"); -+ return node; -+ } -+ debug("%s: found 'chosen' node: %d\n", __func__, node); -+ -+ prop = fdt_getprop(nvtboot_blob, node, "bootargs", &len); -+ if (!prop) { -+ pr_err("Can't find /chosen/bootargs property in nvtboot DTB"); -+ return -ENOENT; -+ } -+ debug("%s: found 'bootargs' property, len =%d\n", __func__, len); -+ -+ /* CBoot seems to add trailing whitespace - strip it here */ -+ s = strdup((char *)prop); -+ bargs = strstrip(s); -+ debug("%s: bootargs = %s!\n", __func__, bargs); -+ -+ /* Set cbootargs to env for later use by extlinux files */ -+ ret = env_set("cbootargs", bargs); -+ if (ret) -+ printf("Failed to set cbootargs from cboot DTB: %d\n", ret); -+ -+ free(s); -+ return ret; -+} - - int tegra_soc_board_init_late(void) - { -@@ -325,8 +391,12 @@ int tegra_soc_board_init_late(void) - * extlinux.conf or boot script content. - */ - set_fdt_addr(); -+#if defined(CONFIG_TEGRA186) - /* Ignore errors here; not all cases care about Ethernet addresses */ - set_ethaddr_from_nvtboot(); -+#endif -+ /* Save CBoot bootargs to env */ -+ set_cbootargs(); - - return 0; - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/nvtboot_ll.S -similarity index 100% -rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S -rename to arch/arm/mach-tegra/nvtboot_ll.S -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/nvtboot_mem.c -similarity index 100% -rename from arch/arm/mach-tegra/tegra186/nvtboot_mem.c -rename to arch/arm/mach-tegra/nvtboot_mem.c -diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile -index 56f3378ece..1a43ef7a45 100644 ---- a/arch/arm/mach-tegra/tegra186/Makefile -+++ b/arch/arm/mach-tegra/tegra186/Makefile -@@ -4,6 +4,6 @@ - - obj-y += ../board186.o - obj-y += cache.o --obj-y += nvtboot_board.o --obj-y += nvtboot_ll.o --obj-y += nvtboot_mem.o -+obj-y += ../nvtboot_board.o -+obj-y += ../nvtboot_ll.o -+obj-y += ../nvtboot_mem.o -diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile -index b6012fc7ba..6de6d810eb 100644 ---- a/arch/arm/mach-tegra/tegra210/Makefile -+++ b/arch/arm/mach-tegra/tegra210/Makefile -@@ -8,5 +8,8 @@ - obj-y += clock.o - obj-y += funcmux.o - obj-y += pinmux.o -+obj-y += ../nvtboot_board.o -+obj-y += ../nvtboot_ll.o -+obj-y += ../nvtboot_mem.o - obj-y += xusb-padctl.o - obj-y += ../xusb-padctl-common.o -diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c -index 06068c4b7b..341c97f16d 100644 ---- a/arch/arm/mach-tegra/tegra210/clock.c -+++ b/arch/arm/mach-tegra/tegra210/clock.c -@@ -1235,25 +1235,6 @@ int tegra_plle_enable(void) - value &= ~PLLE_SS_CNTL_INTERP_RESET; - writel(value, NV_PA_CLK_RST_BASE + PLLE_SS_CNTL); - -- /* 7. Enable HW power sequencer for PLLE */ -- -- value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); -- value &= ~PLLE_MISC_IDDQ_SWCTL; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); -- -- value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); -- value &= ~PLLE_AUX_SS_SWCTL; -- value &= ~PLLE_AUX_ENABLE_SWCTL; -- value |= PLLE_AUX_SS_SEQ_INCLUDE; -- value |= PLLE_AUX_USE_LOCKDET; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); -- -- /* 8. Wait 1 us */ -- -- udelay(1); -- value |= PLLE_AUX_SEQ_ENABLE; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); -- - return 0; - } - -diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c -index ab6684f027..64dc297ae2 100644 ---- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c -+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c -@@ -170,6 +170,17 @@ static int phy_unprepare(struct tegra_xusb_phy *phy) - return tegra_xusb_padctl_disable(phy->padctl); - } - -+#define XUSB_PADCTL_USB3_PAD_MUX 0x28 -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE (1 << 0) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 (1 << 1) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 (1 << 2) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 (1 << 3) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 (1 << 4) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 (1 << 5) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 (1 << 6) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 (1 << 7) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 (1 << 8) -+ - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK (0xff << 20) - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(x) (((x) & 0xff) << 20) -@@ -366,31 +377,6 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) - value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; - padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); - -- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- value &= ~CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; -- value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL; -- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET; -- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ; -- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); -- -- udelay(1); -- -- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- value |= CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE; -- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- - debug("< %s()\n", __func__); - return 0; - } -@@ -454,3 +440,35 @@ void tegra_xusb_padctl_init(void) - ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata); - debug("%s: done, ret=%d\n", __func__, ret); - } -+ -+void tegra_xusb_padctl_exit(void) -+{ -+ u32 value; -+ -+ debug("> %s\n", __func__); -+ -+ value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX); -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0; -+ padctl_writel(&padctl, value, XUSB_PADCTL_USB3_PAD_MUX); -+ -+ value = padctl_readl(&padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ; -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK; -+ value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(3); -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE; -+ padctl_writel(&padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -+ -+ reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1); -+ while (padctl.enable) -+ tegra_xusb_padctl_disable(&padctl); -+ -+ debug("< %s()\n", __func__); -+} -diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c -index 3ec27a2e3a..f2d90302f6 100644 ---- a/arch/arm/mach-tegra/xusb-padctl-dummy.c -+++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c -@@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy) - void __weak tegra_xusb_padctl_init(void) - { - } -+ -+void __weak tegra_xusb_padctl_exit(void) -+{ -+} -diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig -index 02a7569205..d9b8be15e7 100644 ---- a/configs/p2371-0000_defconfig -+++ b/configs/p2371-0000_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_0000=y - CONFIG_NR_DRAM_BANKS=2 -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index 156a1cbcf9..602c5c1fad 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 -diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig -index 5cbb1c3201..29929e2d99 100644 ---- a/configs/p2571_defconfig -+++ b/configs/p2571_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2571=y - CONFIG_NR_DRAM_BANKS=2 --- -2.19.0.rc0 - diff --git a/tegra-p2371-2180-Build-position-independent-binary.patch b/tegra-p2371-2180-Build-position-independent-binary.patch new file mode 100644 index 0000000..eb9f5c5 --- /dev/null +++ b/tegra-p2371-2180-Build-position-independent-binary.patch @@ -0,0 +1,37 @@ +From patchwork Fri Mar 8 20:10:23 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] p2371-2180: Build position independent binary +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1053674 +Message-Id: <20190308201023.2145-1-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Fri, 8 Mar 2019 21:10:23 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +In order to support chainloading of U-Boot by an earlier bootloader, +make sure the binary is position independent, so that the earlier boot- +loader can relocate it if necessary. + +Signed-off-by: Thierry Reding +--- + configs/p2371-2180_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index b66459e379ac..8d7cf3fb5346 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -1,6 +1,7 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_POSITION_INDEPENDENT=y + CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_2180=y + CONFIG_NR_DRAM_BANKS=2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 8c6452b..e05f4bd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,9 +24,10 @@ Patch3: usb-kbd-fixes.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch11: dragonboard-fixes.patch -Patch12: tegra186-jetson-tx2-disable-onboard-emmc.patch -Patch13: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch -Patch14: tegra-fix-tx1.patch + +Patch12: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +Patch13: tegra-p2371-2180-Build-position-independent-binary.patch +Patch14: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch BuildRequires: bc BuildRequires: dtc @@ -301,6 +302,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Mar 20 2019 Peter Robinson 2019.04-0.6-rc4 +- Tegra Jetson TX-series improvements + * Tue Mar 19 2019 Peter Robinson 2019.04-0.5-rc4 - 2019.04 RC4 From d6082cf8542ab100decdff2e7bb447483395c50e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Mar 2019 15:54:54 +0000 Subject: [PATCH 021/351] Minor UEFI fixes, Tegra Jetson TX series rebase --- ...IA-Jetson-Nano-Developer-Kit-support.patch | 2459 -------------- ...dd-support-for-framebuffer-carveouts.patch | 1685 ++++++++++ ARM-tegra-Miscellaneous-improvements.patch | 2949 +++++++++++++++++ ...80-Build-position-independent-binary.patch | 37 - ...35x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch | 183 + uboot-tools.spec | 14 +- uefi-rc5-fixes.patch | 245 ++ 7 files changed, 5071 insertions(+), 2501 deletions(-) create mode 100644 ARM-tegra-Add-support-for-framebuffer-carveouts.patch create mode 100644 ARM-tegra-Miscellaneous-improvements.patch delete mode 100644 tegra-p2371-2180-Build-position-independent-binary.patch create mode 100644 ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch create mode 100644 uefi-rc5-fixes.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch index 2f662b1..70bb946 100644 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch @@ -1,2462 +1,3 @@ -From patchwork Mon Mar 18 23:24:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,01/15] ARM: tegra: Use common header for PMU declarations -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058145 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:08 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -There's no need to replicate the pmu.h header file for every Tegra SoC -generation. Use a single header that is shared across generations. - -Signed-off-by: Thierry Reding ---- - .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- - arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ - arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ - arch/arm/mach-tegra/board2.c | 2 +- - arch/arm/mach-tegra/emc.c | 2 +- - 7 files changed, 5 insertions(+), 55 deletions(-) - rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) - delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h - -diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h -similarity index 73% -rename from arch/arm/include/asm/arch-tegra20/pmu.h -rename to arch/arm/include/asm/arch-tegra/pmu.h -index 18766dfed2bb..e850875d3166 100644 ---- a/arch/arm/include/asm/arch-tegra20/pmu.h -+++ b/arch/arm/include/asm/arch-tegra/pmu.h -@@ -4,10 +4,10 @@ - * NVIDIA Corporation - */ - --#ifndef _ARCH_PMU_H_ --#define _ARCH_PMU_H_ -+#ifndef _TEGRA_PMU_H_ -+#define _TEGRA_PMU_H_ - - /* Set core and CPU voltages to nominal levels */ - int pmu_set_nominal(void); - --#endif /* _ARCH_PMU_H_ */ -+#endif /* _TEGRA_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h -deleted file mode 100644 -index 1e571ee7b317..000000000000 ---- a/arch/arm/include/asm/arch-tegra114/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA114_PMU_H_ --#define _TEGRA114_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA114_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h -deleted file mode 100644 -index c38393edefda..000000000000 ---- a/arch/arm/include/asm/arch-tegra124/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2013 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA124_PMU_H_ --#define _TEGRA124_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA124_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h -deleted file mode 100644 -index 6ea36aa41876..000000000000 ---- a/arch/arm/include/asm/arch-tegra210/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2015 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA210_PMU_H_ --#define _TEGRA210_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA210_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h -deleted file mode 100644 -index a823f0fbfc61..000000000000 ---- a/arch/arm/include/asm/arch-tegra30/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA30_PMU_H_ --#define _TEGRA30_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA30_PMU_H_ */ -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 12257a42b51b..b8d5ef0322cb 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -24,7 +25,6 @@ - #include - #include - #include --#include - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include -diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c -index 6697909d9a3e..66628933b653 100644 ---- a/arch/arm/mach-tegra/emc.c -+++ b/arch/arm/mach-tegra/emc.c -@@ -8,10 +8,10 @@ - #include - #include - #include --#include - #include - #include - #include -+#include - #include - - DECLARE_GLOBAL_DATA_PTR; - -From patchwork Mon Mar 18 23:24:09 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,02/15] ARM: tegra: Guard clock code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058147 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:09 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Clock code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 2 ++ - arch/arm/mach-tegra/board2.c | 12 ++++++++++-- - 4 files changed, 18 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 86b1cd11f752..ee078fec9adc 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT - config SPL_SERIAL_SUPPORT - default y - -+config TEGRA_CLKRST -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON - select SPL - select SPL_BOARD_INIT if SPL - select SUPPORT_SPL -+ select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_NO_BPMP -@@ -100,6 +104,7 @@ config TEGRA124 - config TEGRA210 - bool "Tegra210 family" - select TEGRA_ARMV8_COMMON -+ select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_NO_BPMP - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index d4b4666fb1e2..0e812818d7a2 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -16,7 +16,7 @@ endif - obj-y += ap.o - obj-y += board.o board2.o - obj-y += cache.o --obj-y += clock.o -+obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-y += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index f8fc042a1dcc..ecd5001de4c5 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -9,7 +9,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b8d5ef0322cb..b94077221f77 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -22,7 +22,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -@@ -109,8 +111,10 @@ int board_init(void) - __maybe_unused int board_id; - - /* Do clocks and UART first so that printf() works */ -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - clock_init(); - clock_verify(); -+#endif - - tegra_gpu_config(); - -@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); - - int board_early_init_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - if (!clock_early_init_done()) - clock_early_init(); -+#endif - - #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) - #define USBCMD_FS2 (1 << 15) -@@ -193,10 +199,12 @@ int board_early_init_f(void) - #endif - - /* Do any special system timer/TSC setup */ --#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) -+# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (!tegra_cpu_is_non_secure()) --#endif -+# endif - arch_timer_init(); -+#endif - - pinmux_init(); - board_init_uart_f(); - -From patchwork Mon Mar 18 23:24:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 03/15] ARM: tegra: Guard GP pad control code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058148 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:10 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The GP pad control code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cache.c | 2 ++ - 3 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index ee078fec9adc..265051b18aaf 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT - config TEGRA_CLKRST - bool - -+config TEGRA_GP_PADCTRL -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -106,6 +110,7 @@ config TEGRA210 - select TEGRA_ARMV8_COMMON - select TEGRA_CLKRST - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 0e812818d7a2..69f802c01b45 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -13,7 +13,7 @@ else - obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o - endif - --obj-y += ap.o -+obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o -diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c -index be414e4e4aca..d7063490e222 100644 ---- a/arch/arm/mach-tegra/cache.c -+++ b/arch/arm/mach-tegra/cache.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) - #include -+#endif - - #ifndef CONFIG_ARM64 - void config_cache(void) - -From patchwork Mon Mar 18 23:24:11 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 04/15] ARM: tegra: Guard memory controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058146 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:11 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Memory controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/board.c | 7 +++++++ - 2 files changed, 12 insertions(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 265051b18aaf..5763c4ae3cd1 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -26,6 +26,9 @@ config TEGRA_IVC - U-Boot, it is typically used for communication between the main CPU - and various auxiliary processors. - -+config TEGRA_MC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -111,6 +115,7 @@ config TEGRA210 - select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index ecd5001de4c5..7ef5a67edd1f 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -13,7 +13,9 @@ - #include - #endif - #include -+#if IS_ENABLED(CONFIG_TEGRA_MC) - #include -+#endif - #include - #include - #include -@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) - } - #endif - -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* Read the RAM size directly from the memory controller */ - static phys_size_t query_sdram_size(void) - { -@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) - - return size_bytes; - } -+#endif - - int dram_init(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -+#endif -+ - return 0; - } - - -From patchwork Mon Mar 18 23:24:12 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 05/15] ARM: tegra: Guard pin controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058156 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:12 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Pin controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 6 ++++++ - arch/arm/mach-tegra/board2.c | 2 ++ - 4 files changed, 14 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 5763c4ae3cd1..be20ac2e804e 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -29,6 +29,9 @@ config TEGRA_IVC - config TEGRA_MC - bool - -+config TEGRA_PINCTRL -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -117,6 +121,7 @@ config TEGRA210 - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 69f802c01b45..395e0191a458 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o --obj-y += pinmux-common.o -+obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o - endif -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 7ef5a67edd1f..b65bdde5a78d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -12,7 +12,9 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include -+#endif - #if IS_ENABLED(CONFIG_TEGRA_MC) - #include - #endif -@@ -132,6 +134,7 @@ int dram_init(void) - return 0; - } - -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - static int uart_configs[] = { - #if defined(CONFIG_TEGRA20) - #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) -@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) - } - } - } -+#endif - - void board_init_uart_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - int uart_ids = 0; /* bit mask of which UART ids to enable */ - - #ifdef CONFIG_TEGRA_ENABLE_UARTA -@@ -220,6 +225,7 @@ void board_init_uart_f(void) - uart_ids |= UARTE; - #endif - setup_uarts(uart_ids); -+#endif - } - - #if !CONFIG_IS_ENABLED(OF_CONTROL) -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b94077221f77..ce1c9346959d 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -25,8 +25,10 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include - #include -+#endif - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include - -From patchwork Mon Mar 18 23:24:13 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 06/15] ARM: tegra: Guard powergate code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058150 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:13 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Powergate code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - 2 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index be20ac2e804e..db9198348d3f 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -32,6 +32,9 @@ config TEGRA_MC - config TEGRA_PINCTRL - bool - -+config TEGRA_PMC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -122,6 +126,7 @@ config TEGRA210 - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 395e0191a458..517be21ee5f5 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -18,7 +18,7 @@ obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o --obj-y += powergate.o -+obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - endif - - -From patchwork Mon Mar 18 23:24:14 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,07/15] ARM: tegra: Fix save_boot_params() prototype -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058149 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:14 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The save_boot_params() function takes as its first four arguments the -first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of -which are 32 bits wide. However, on 64-bit ARM thene registers are x0, -x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing -the save_boot_params() implementation on 64-bit ARM, change it to take -unsigned long parameters rather than the fixed size 32-bit integers. -This ensures that the correct values are passed. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/board.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index b65bdde5a78d..59d2f347485d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -42,7 +42,8 @@ enum { - static bool from_spl __attribute__ ((section(".data"))); - - #ifndef CONFIG_SPL_BUILD --void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) -+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, -+ unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; - save_boot_params_ret(); - -From patchwork Mon Mar 18 23:24:15 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 08/15] ARM: tegra: Allow boards to override boot target devices -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058152 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:15 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Boards may not support all the boot target devices in the default list -for Tegra devices. Allow a board to override the list and default to the -standard list only if the board hasn't specified one itself. - -Signed-off-by: Thierry Reding ---- - include/configs/tegra-common-post.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h -index e54428ba43e2..9685ee5059ab 100644 ---- a/include/configs/tegra-common-post.h -+++ b/include/configs/tegra-common-post.h -@@ -21,12 +21,14 @@ - #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ - - #ifndef CONFIG_SPL_BUILD -+#ifndef BOOT_TARGET_DEVICES - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) -+#endif - #include - #else - #define BOOTENV - -From patchwork Mon Mar 18 23:24:16 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,09/15] ARM: tegra: Support TZ-only access to PMC -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058153 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:16 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Some devices may restrict access to the PMC to TrustZone software only. -Non-TZ software can detect this and use SMC calls to the firmware that -runs in the TrustZone to perform accesses to PMC registers. - -Note that this also fixes reset_cpu() and the enterrcm command on -Tegra186 where they were previously trying to access the PMC at a wrong -physical address. - -Based on work by Kalyani Chidambaram and Tom -Warren . - -Signed-off-by: Thierry Reding ---- - arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- - arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ - arch/arm/mach-tegra/Kconfig | 5 ++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/clock.c | 13 ++-- - arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- - arch/arm/mach-tegra/cpu.c | 20 +++--- - arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- - arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ - arch/arm/mach-tegra/powergate.c | 11 +-- - 10 files changed, 151 insertions(+), 65 deletions(-) - delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S - create mode 100644 arch/arm/mach-tegra/pmc.c - -diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h -index 34bbe75d5fdb..1524bf291164 100644 ---- a/arch/arm/include/asm/arch-tegra/pmc.h -+++ b/arch/arm/include/asm/arch-tegra/pmc.h -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * (C) Copyright 2010-2015 -+ * (C) Copyright 2010-2019 - * NVIDIA Corporation - */ - -@@ -388,4 +388,22 @@ struct pmc_ctlr { - /* APBDEV_PMC_CNTRL2_0 0x440 */ - #define HOLD_CKE_LOW_EN (1 << 12) - -+/* PMC read/write functions */ -+u32 tegra_pmc_readl(unsigned long offset); -+void tegra_pmc_writel(u32 value, unsigned long offset); -+ -+#define PMC_CNTRL 0x0 -+#define PMC_CNTRL_MAIN_RST BIT(4) -+ -+#if IS_ENABLED(CONFIG_TEGRA186) -+# define PMC_SCRATCH0 0x32000 -+#else -+# define PMC_SCRATCH0 0x00050 -+#endif -+ -+/* for secure PMC */ -+#define TEGRA_SMC_PMC 0xc2fffe00 -+#define TEGRA_SMC_PMC_READ 0xaa -+#define TEGRA_SMC_PMC_WRITE 0xbb -+ - #endif /* PMC_H */ -diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h -index 7ae0129e2db3..7a4e0972fb76 100644 ---- a/arch/arm/include/asm/arch-tegra/tegra.h -+++ b/arch/arm/include/asm/arch-tegra/tegra.h -@@ -30,7 +30,13 @@ - #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) - #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) - #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) -+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -+ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ -+ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) - #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) -+#else -+#define NV_PA_PMC_BASE 0xc360000 -+#endif - #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) - #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) - #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index db9198348d3f..28914a34a1b5 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -35,6 +35,10 @@ config TEGRA_PINCTRL - config TEGRA_PMC - bool - -+config TEGRA_PMC_SECURE -+ bool -+ depends on TEGRA_PMC -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -127,6 +131,7 @@ config TEGRA210 - select TEGRA_NO_BPMP - select TEGRA_PINCTRL - select TEGRA_PMC -+ select TEGRA_PMC_SECURE - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 517be21ee5f5..f8bc65aa8b18 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0+ - # --# (C) Copyright 2010-2015 Nvidia Corporation. -+# (C) Copyright 2010-2019 Nvidia Corporation. - # - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -@@ -27,11 +27,11 @@ obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o - obj-$(CONFIG_TEGRA_IVC) += ivc.o --obj-y += lowlevel_init.o - ifndef CONFIG_SPL_BUILD - obj-$(CONFIG_ARMV7_PSCI) += psci.o - endif - obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o -+obj-y += pmc.o - - obj-$(CONFIG_TEGRA20) += tegra20/ - obj-$(CONFIG_TEGRA30) += tegra30/ -diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c -index 096330748f2b..c9cd4e6aaeb7 100644 ---- a/arch/arm/mach-tegra/clock.c -+++ b/arch/arm/mach-tegra/clock.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - /* Tegra SoC common clock control functions */ -@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) - - int clock_external_output(int clk_id) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -+ u32 val; - - if (clk_id >= 1 && clk_id <= 3) { -- setbits_le32(&pmc->pmc_clk_out_cntrl, -- 1 << (2 + (clk_id - 1) * 8)); -+ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ val |= 1 << (2 + (clk_id - 1) * 8); -+ tegra_pmc_writel(val, -+ offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ - } else { - printf("%s: Unknown output clock id %d\n", __func__, clk_id); - return -EINVAL; -diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c -index 4e6beb3e5bb4..4a889f0e3422 100644 ---- a/arch/arm/mach-tegra/cmd_enterrcm.c -+++ b/arch/arm/mach-tegra/cmd_enterrcm.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. - * - * Derived from code (arch/arm/lib/reset.c) that is: - * -@@ -31,12 +31,10 @@ - static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- - puts("Entering RCM...\n"); - udelay(50000); - -- pmc->pmc_scratch0 = 2; -+ tegra_pmc_writel(2, PMC_SCRATCH0); - disable_interrupts(); - reset_cpu(0); - -diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c -index 1b6ad074ed8f..3d140760e68f 100644 ---- a/arch/arm/mach-tegra/cpu.c -+++ b/arch/arm/mach-tegra/cpu.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) - - static int is_cpu_powered(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- -- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; -+ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; - } - - static void remove_cpu_io_clamps(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - debug("%s entry\n", __func__); - - /* Remove the clamps on the CPU I/O signals */ -- reg = readl(&pmc->pmc_remove_clamping); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); - reg |= CPU_CLMP; -- writel(reg, &pmc->pmc_remove_clamping); -+ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); - - /* Give I/O signals time to stabilize */ - udelay(IO_STABILIZATION_DELAY); -@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) - - void powerup_cpu(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - int timeout = IO_STABILIZATION_DELAY; - debug("%s entry\n", __func__); - - if (!is_cpu_powered()) { - /* Toggle the CPU power state (OFF -> ON) */ -- reg = readl(&pmc->pmc_pwrgate_toggle); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - reg &= PARTID_CP; - reg |= START_CP; -- writel(reg, &pmc->pmc_pwrgate_toggle); -+ tegra_pmc_writel(reg, -+ offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - - /* Wait for the power to come up */ - while (!is_cpu_powered()) { -diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S -deleted file mode 100644 -index 626f1b642745..000000000000 ---- a/arch/arm/mach-tegra/lowlevel_init.S -+++ /dev/null -@@ -1,39 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * SoC-specific setup info -- * -- * (C) Copyright 2010,2011 -- * NVIDIA Corporation -- */ -- --#include --#include -- --#ifdef CONFIG_ARM64 -- .align 5 --ENTRY(reset_cpu) -- /* get address for global reset register */ -- ldr x1, =PRM_RSTCTRL -- ldr w3, [x1] -- /* force reset */ -- orr w3, w3, #0x10 -- str w3, [x1] -- mov w0, w0 --1: -- b 1b --ENDPROC(reset_cpu) --#else -- .align 5 --ENTRY(reset_cpu) -- ldr r1, rstctl @ get addr for global reset -- @ reg -- ldr r3, [r1] -- orr r3, r3, #0x10 -- str r3, [r1] @ force reset -- mov r0, r0 --_loop_forever: -- b _loop_forever --rstctl: -- .word PRM_RSTCTRL --ENDPROC(reset_cpu) --#endif -diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c -new file mode 100644 -index 000000000000..afd3c54179c1 ---- /dev/null -+++ b/arch/arm/mach-tegra/pmc.c -@@ -0,0 +1,92 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+ */ -+ -+#include -+ -+#include -+ -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+static bool tegra_pmc_detect_tz_only(void) -+{ -+ static bool initialized = false; -+ static bool is_tz_only = false; -+ u32 value, saved; -+ -+ if (!initialized) { -+ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = saved ^ 0xffffffff; -+ -+ if (value == 0xffffffff) -+ value = 0xdeadbeef; -+ -+ /* write pattern and read it back */ -+ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ -+ /* if we read all-zeroes, access is restricted to TZ only */ -+ if (value == 0) { -+ debug("access to PMC is restricted to TZ\n"); -+ is_tz_only = true; -+ } else { -+ /* restore original value */ -+ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ } -+ -+ initialized = true; -+ } -+ -+ return is_tz_only; -+} -+#endif -+ -+uint32_t tegra_pmc_readl(unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, -+ 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return res.a1; -+ } -+#endif -+ -+ return readl(NV_PA_PMC_BASE + offset); -+} -+ -+void tegra_pmc_writel(u32 value, unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, -+ value, 0, 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return; -+ } -+#endif -+ -+ writel(value, NV_PA_PMC_BASE + offset); -+} -+ -+void reset_cpu(ulong addr) -+{ -+ u32 value; -+ -+ value = tegra_pmc_readl(PMC_CNTRL); -+ value |= PMC_CNTRL_MAIN_RST; -+ tegra_pmc_writel(value, PMC_CNTRL); -+} -diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c -index e45f0961b242..761c9ef19e3b 100644 ---- a/arch/arm/mach-tegra/powergate.c -+++ b/arch/arm/mach-tegra/powergate.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -11,6 +11,7 @@ - - #include - #include -+#include - - #define PWRGATE_TOGGLE 0x30 - #define PWRGATE_TOGGLE_START (1 << 8) -@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) - u32 value, mask = state ? (1 << id) : 0, old_mask; - unsigned long start, timeout = 25; - -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - old_mask = value & (1 << id); - - if (mask == old_mask) - return 0; - -- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); -+ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); - - start = get_timer(0); - - while (get_timer(start) < timeout) { -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - if ((value & (1 << id)) == mask) - return 0; - } -@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) - else - value = 1 << id; - -- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); -+ tegra_pmc_writel(value, REMOVE_CLAMPING); - - return 0; - } - -From patchwork Mon Mar 18 23:24:17 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 10/15] ARM: tegra: Workaround UDC boot issues only if necessary -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058157 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:17 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Resetting the USB device controller on boot is only necessary if the SoC -actually has a UDC controller and U-Boot enables support for it. All the -Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on -boot workaround depend on the ChipIdea UDC driver. - -This prevents a crash on Tegra186 which does not have the ChipIdea UDC. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 28914a34a1b5..faa73559fd42 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -148,6 +148,7 @@ endchoice - - config TEGRA_DISCONNECT_UDC_ON_BOOT - bool "Disconnect USB device mode controller on boot" -+ depends on CI_UDC - default y - help - When loading U-Boot into RAM over USB protocols using tools such as - -From patchwork Mon Mar 18 23:24:18 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,11/15] ARM: tegra: Restore DRAM bank count -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058154 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:18 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced -the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 -boards. - -However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: -increase max DRAM bank count"), the platform can have a large number of -unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks -are needed to describe the worst-case situation. - -In practice the number of DRAM banks needed will typically be much -lower, but we should be prepared to properly deal with the worst case. - -Signed-off-by: Thierry Reding ---- - configs/p2771-0000-000_defconfig | 2 +- - configs/p2771-0000-500_defconfig | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index ac85efa37b3b..ad0802067e73 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index df4d914d85cf..459b67fd195f 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - -From patchwork Mon Mar 18 23:24:19 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,12/15] ARM: tegra: Unify Tegra186 builds -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058151 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:19 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Tegra186 build are currently dealt with in very special ways, which is -because Tegra186 is fundamentally different in many respects. It is no -longer necessary to do many of the low-level programming because early -boot firmware will already have taken care of it. - -Unfortunately, separating Tegra186 builds from the rest in this way -makes it difficult to share code with prior generations of Tegra. With -all of the low-level programming code behind Kconfig guards, the build -for Tegra186 can again be unified. - -As a side-effect, and partial reason for this change, other Tegra SoC -generations can now make use of the code that deals with taking over a -boot from earlier bootloaders. This used to be nvtboot, but has been -replaced by cboot nowadays. Rename the files and functions related to -this to avoid confusion. The implemented protocols are unchanged. - -Signed-off-by: Thierry Reding ---- - arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/board.c | 23 ++ - arch/arm/mach-tegra/board186.c | 32 --- - arch/arm/mach-tegra/board2.c | 21 ++ - .../{tegra186/nvtboot_board.c => cboot.c} | 202 ++++++++++++++++-- - .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- - arch/arm/mach-tegra/tegra186/Makefile | 4 - - arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- - board/nvidia/p2771-0000/p2771-0000.c | 10 +- - 10 files changed, 279 insertions(+), 240 deletions(-) - create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h - delete mode 100644 arch/arm/mach-tegra/board186.c - rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (55%) - rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) - delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -new file mode 100644 -index 000000000000..b3441ec178b3 ---- /dev/null -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -0,0 +1,39 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _TEGRA_CBOOT_H_ -+#define _TEGRA_CBOOT_H_ -+ -+#ifdef CONFIG_ARM64 -+extern unsigned long cboot_boot_x0; -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3); -+int cboot_dram_init(void); -+int cboot_dram_init_banksize(void); -+ulong cboot_get_usable_ram_top(ulong total_size); -+#else -+static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+} -+ -+static inline int cboot_dram_init(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline int cboot_dram_init_banksize(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return 0; -+} -+#endif -+ -+#endif -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index f8bc65aa8b18..41ba674edff4 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -5,7 +5,6 @@ - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. - --ifndef CONFIG_TEGRA186 - ifdef CONFIG_SPL_BUILD - obj-y += spl.o - obj-y += cpu.o -@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o --endif - --obj-$(CONFIG_ARM64) += arm64-mmu.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 59d2f347485d..c3ba00811e83 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, - unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; -+ -+ /* -+ * The logic for this is somewhat indirect. The purpose of the marker -+ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot -+ * was loaded from a read-only instance of itself, which is something -+ * that can happen in secure boot setups. So basically the presence -+ * of the marker is an indication that U-Boot was loaded by one such -+ * special variant of U-Boot. Conversely, the absence of the marker -+ * indicates that this instance of U-Boot was loaded by something -+ * other than a special U-Boot. This could be SPL, but it could just -+ * as well be one of any number of other first stage bootloaders. -+ */ -+ if (from_spl) -+ cboot_save_boot_params(r0, r1, r2, r3); -+ - save_boot_params_ret(); - } - #endif -@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) - - int dram_init(void) - { -+ int err; -+ -+ /* try to initialize DRAM from cboot DTB first */ -+ err = cboot_dram_init(); -+ if (err == 0) -+ return 0; -+ - #if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c -deleted file mode 100644 -index 80b55707e90f..000000000000 ---- a/arch/arm/mach-tegra/board186.c -+++ /dev/null -@@ -1,32 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016, NVIDIA CORPORATION. -- */ -- --#include --#include -- --int board_early_init_f(void) --{ -- return 0; --} -- --__weak int tegra_board_init(void) --{ -- return 0; --} -- --int board_init(void) --{ -- return tegra_board_init(); --} -- --__weak int tegra_soc_board_init_late(void) --{ -- return 0; --} -- --int board_late_init(void) --{ -- return tegra_soc_board_init_late(); --} -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index ce1c9346959d..bbc487aa3bf6 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} - __weak void gpio_early_init_uart(void) {} - __weak void pin_mux_display(void) {} - __weak void start_cpu_fan(void) {} -+__weak void cboot_late_init(void) {} - - #if defined(CONFIG_TEGRA_NAND) - __weak void pin_mux_nand(void) -@@ -243,6 +245,7 @@ int board_late_init(void) - } - #endif - start_cpu_fan(); -+ cboot_late_init(); - - return 0; - } -@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) - */ - int dram_init_banksize(void) - { -+ int err; -+ -+ /* try to compute DRAM bank size based on cboot DTB first */ -+ err = cboot_dram_init_banksize(); -+ if (err == 0) -+ return err; -+ -+ /* fall back to default DRAM bank size computation */ -+ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); - -@@ -370,5 +382,14 @@ int dram_init_banksize(void) - */ - ulong board_get_usable_ram_top(ulong total_size) - { -+ ulong ram_top; -+ -+ /* try to get top of usable RAM based on cboot DTB first */ -+ ram_top = cboot_get_usable_ram_top(total_size); -+ if (ram_top > 0) -+ return ram_top; -+ -+ /* fall back to default usable RAM computation */ -+ - return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c -similarity index 55% -rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c -rename to arch/arm/mach-tegra/cboot.c -index 83c0e931ea24..2bca98c92898 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -3,14 +3,182 @@ - * Copyright (c) 2016-2018, NVIDIA CORPORATION. - */ - --#include - #include - #include - #include -+#include -+ -+#include -+ - #include -+#include - #include - --extern unsigned long nvtboot_boot_x0; -+/* -+ * Size of a region that's large enough to hold the relocated U-Boot and all -+ * other allocations made around it (stack, heap, page tables, etc.) -+ * In practice, running "bdinfo" at the shell prompt, the stack reaches about -+ * 5MB from the address selected for ram_top as of the time of writing, -+ * so a 16MB region should be plenty. -+ */ -+#define MIN_USABLE_RAM_SIZE SZ_16M -+/* -+ * The amount of space we expect to require for stack usage. Used to validate -+ * that all reservations fit into the region selected for the relocation target -+ */ -+#define MIN_USABLE_STACK_SIZE SZ_1M -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+extern struct mm_region tegra_mem_map[]; -+ -+/* -+ * These variables are written to before relocation, and hence cannot be -+ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -+ * The section attribute forces this into .data and avoids this issue. This -+ * also has the nice side-effect of the content being valid after relocation. -+ */ -+ -+/* The number of valid entries in ram_banks[] */ -+static int ram_bank_count __attribute__((section(".data"))); -+ -+/* -+ * The usable top-of-RAM for U-Boot. This is both: -+ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -+ * b) At the end of a region that has enough space to hold the relocated U-Boot -+ * and all other allocations made around it (stack, heap, page tables, etc.) -+ */ -+static u64 ram_top __attribute__((section(".data"))); -+/* The base address of the region of RAM that ends at ram_top */ -+static u64 region_base __attribute__((section(".data"))); -+ -+int cboot_dram_init(void) -+{ -+ unsigned int na, ns; -+ const void *cboot_blob = (void *)cboot_boot_x0; -+ int node, len, i; -+ const u32 *prop; -+ -+ if (!cboot_blob) -+ return -EINVAL; -+ -+ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); -+ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); -+ -+ node = fdt_path_offset(cboot_blob, "/memory"); -+ if (node < 0) { -+ pr_err("Can't find /memory node in cboot DTB"); -+ hang(); -+ } -+ prop = fdt_getprop(cboot_blob, node, "reg", &len); -+ if (!prop) { -+ pr_err("Can't find /memory/reg property in cboot DTB"); -+ hang(); -+ } -+ -+ /* Calculate the true # of base/size pairs to read */ -+ len /= 4; /* Convert bytes to number of cells */ -+ len /= (na + ns); /* Convert cells to number of banks */ -+ if (len > CONFIG_NR_DRAM_BANKS) -+ len = CONFIG_NR_DRAM_BANKS; -+ -+ /* Parse the /memory node, and save useful entries */ -+ gd->ram_size = 0; -+ ram_bank_count = 0; -+ for (i = 0; i < len; i++) { -+ u64 bank_start, bank_end, bank_size, usable_bank_size; -+ -+ /* Extract raw memory region data from DTB */ -+ bank_start = fdt_read_number(prop, na); -+ prop += na; -+ bank_size = fdt_read_number(prop, ns); -+ prop += ns; -+ gd->ram_size += bank_size; -+ bank_end = bank_start + bank_size; -+ debug("Bank %d: %llx..%llx (+%llx)\n", i, -+ bank_start, bank_end, bank_size); -+ -+ /* -+ * Align the bank to MMU section size. This is not strictly -+ * necessary, since the translation table construction code -+ * handles page granularity without issue. However, aligning -+ * the MMU entries reduces the size and number of levels in the -+ * page table, so is worth it. -+ */ -+ bank_start = ROUND(bank_start, SZ_2M); -+ bank_end = bank_end & ~(SZ_2M - 1); -+ bank_size = bank_end - bank_start; -+ debug(" aligned: %llx..%llx (+%llx)\n", -+ bank_start, bank_end, bank_size); -+ if (bank_end <= bank_start) -+ continue; -+ -+ /* Record data used to create MMU translation tables */ -+ ram_bank_count++; -+ /* Index below is deliberately 1-based to skip MMIO entry */ -+ tegra_mem_map[ram_bank_count].virt = bank_start; -+ tegra_mem_map[ram_bank_count].phys = bank_start; -+ tegra_mem_map[ram_bank_count].size = bank_size; -+ tegra_mem_map[ram_bank_count].attrs = -+ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -+ -+ /* Determine best bank to relocate U-Boot into */ -+ if (bank_end > SZ_4G) -+ bank_end = SZ_4G; -+ debug(" end %llx (usable)\n", bank_end); -+ usable_bank_size = bank_end - bank_start; -+ debug(" size %llx (usable)\n", usable_bank_size); -+ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -+ (bank_end > ram_top)) { -+ ram_top = bank_end; -+ region_base = bank_start; -+ debug("ram top now %llx\n", ram_top); -+ } -+ } -+ -+ /* Ensure memory map contains the desired sentinel entry */ -+ tegra_mem_map[ram_bank_count + 1].virt = 0; -+ tegra_mem_map[ram_bank_count + 1].phys = 0; -+ tegra_mem_map[ram_bank_count + 1].size = 0; -+ tegra_mem_map[ram_bank_count + 1].attrs = 0; -+ -+ /* Error out if a relocation target couldn't be found */ -+ if (!ram_top) { -+ pr_err("Can't find a usable RAM top"); -+ hang(); -+ } -+ -+ return 0; -+} -+ -+int cboot_dram_init_banksize(void) -+{ -+ int i; -+ -+ if (ram_bank_count == 0) -+ return -EINVAL; -+ -+ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -+ pr_err("Reservations exceed chosen region size"); -+ hang(); -+ } -+ -+ for (i = 0; i < ram_bank_count; i++) { -+ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -+ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -+ } -+ -+#ifdef CONFIG_PCI -+ gd->pci_ram_top = ram_top; -+#endif -+ -+ return 0; -+} -+ -+ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return ram_top; -+} - - /* - * The following few functions run late during the boot process and dynamically -@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; - * list of RAM banks into some private data structure before running. - */ - --extern struct mm_region tegra_mem_map[]; -- - static char *gen_varname(const char *var, const char *ext) - { - size_t len_var = strlen(var); -@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) - dump_ram_banks(); - #endif - -- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); -+ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); - - #ifdef DEBUG - printf("RAM after reserving cboot DTB:\n"); -@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) - debug("%s: var: %s\n", __func__, var); - set_calculated_env_var(var); - #ifdef DEBUG -- printf("RAM banks affter allocating %s:\n", var); -+ printf("RAM banks after allocating %s:\n", var); - dump_ram_banks(); - #endif - } -@@ -274,9 +440,9 @@ static int set_fdt_addr(void) - { - int ret; - -- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); -+ ret = env_set_hex("fdtaddr", cboot_boot_x0); - if (ret) { -- printf("Failed to set fdt_addr to point at DTB: %d\n", ret); -+ printf("Failed to set fdtaddr to point at DTB: %d\n", ret); - return ret; - } - -@@ -284,12 +450,12 @@ static int set_fdt_addr(void) - } - - /* -- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's -+ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_nvtboot(void) -+static int set_ethaddr_from_cboot(void) - { -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -+ const void *cboot_blob = (void *)cboot_boot_x0; - int ret, node, len; - const u32 *prop; - -@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) - if (env_get("ethaddr")) - return 0; - -- node = fdt_path_offset(nvtboot_blob, "/chosen"); -+ node = fdt_path_offset(cboot_blob, "/chosen"); - if (node < 0) { -- printf("Can't find /chosen node in nvtboot DTB\n"); -+ printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); -+ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); - if (!prop) { -- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); -+ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); - return -ENOENT; - } - - ret = env_set("ethaddr", (void *)prop); - if (ret) { -- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); -+ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); - return ret; - } - - return 0; - } - --int tegra_soc_board_init_late(void) -+int cboot_late_init(void) - { - set_calculated_env_vars(); - /* -@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) - */ - set_fdt_addr(); - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_nvtboot(); -+ set_ethaddr_from_cboot(); - - return 0; - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -similarity index 57% -rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S -rename to arch/arm/mach-tegra/cboot_ll.S -index aa7a863d9702..4c9ddacc2b39 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S -+++ b/arch/arm/mach-tegra/cboot_ll.S -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * Save nvtboot-related boot-time CPU state -+ * Save cboot-related boot-time CPU state - * - * (C) Copyright 2015-2016 NVIDIA Corporation - */ -@@ -9,12 +9,12 @@ - #include - - .align 8 --.globl nvtboot_boot_x0 --nvtboot_boot_x0: -+.globl cboot_boot_x0 -+cboot_boot_x0: - .dword 0 - --ENTRY(save_boot_params) -- adr x8, nvtboot_boot_x0 -+ENTRY(cboot_save_boot_params) -+ adr x8, cboot_boot_x0 - str x0, [x8] - b save_boot_params_ret --ENDPROC(save_boot_params) -+ENDPROC(cboot_save_boot_params) -diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile -index 56f3378ecea3..3a2405027704 100644 ---- a/arch/arm/mach-tegra/tegra186/Makefile -+++ b/arch/arm/mach-tegra/tegra186/Makefile -@@ -2,8 +2,4 @@ - # - # SPDX-License-Identifier: GPL-2.0 - --obj-y += ../board186.o - obj-y += cache.o --obj-y += nvtboot_board.o --obj-y += nvtboot_ll.o --obj-y += nvtboot_mem.o -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -deleted file mode 100644 -index 62142821a595..000000000000 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -+++ /dev/null -@@ -1,172 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016-2018, NVIDIA CORPORATION. -- */ -- --#include --#include --#include --#include --#include --#include -- --/* -- * Size of a region that's large enough to hold the relocated U-Boot and all -- * other allocations made around it (stack, heap, page tables, etc.) -- * In practice, running "bdinfo" at the shell prompt, the stack reaches about -- * 5MB from the address selected for ram_top as of the time of writing, -- * so a 16MB region should be plenty. -- */ --#define MIN_USABLE_RAM_SIZE SZ_16M --/* -- * The amount of space we expect to require for stack usage. Used to validate -- * that all reservations fit into the region selected for the relocation target -- */ --#define MIN_USABLE_STACK_SIZE SZ_1M -- --DECLARE_GLOBAL_DATA_PTR; -- --extern unsigned long nvtboot_boot_x0; --extern struct mm_region tegra_mem_map[]; -- --/* -- * These variables are written to before relocation, and hence cannot be -- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -- * The section attribute forces this into .data and avoids this issue. This -- * also has the nice side-effect of the content being valid after relocation. -- */ -- --/* The number of valid entries in ram_banks[] */ --static int ram_bank_count __attribute__((section(".data"))); -- --/* -- * The usable top-of-RAM for U-Boot. This is both: -- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -- * b) At the end of a region that has enough space to hold the relocated U-Boot -- * and all other allocations made around it (stack, heap, page tables, etc.) -- */ --static u64 ram_top __attribute__((section(".data"))); --/* The base address of the region of RAM that ends at ram_top */ --static u64 region_base __attribute__((section(".data"))); -- --int dram_init(void) --{ -- unsigned int na, ns; -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -- int node, len, i; -- const u32 *prop; -- -- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); -- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); -- -- node = fdt_path_offset(nvtboot_blob, "/memory"); -- if (node < 0) { -- pr_err("Can't find /memory node in nvtboot DTB"); -- hang(); -- } -- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); -- if (!prop) { -- pr_err("Can't find /memory/reg property in nvtboot DTB"); -- hang(); -- } -- -- /* Calculate the true # of base/size pairs to read */ -- len /= 4; /* Convert bytes to number of cells */ -- len /= (na + ns); /* Convert cells to number of banks */ -- if (len > CONFIG_NR_DRAM_BANKS) -- len = CONFIG_NR_DRAM_BANKS; -- -- /* Parse the /memory node, and save useful entries */ -- gd->ram_size = 0; -- ram_bank_count = 0; -- for (i = 0; i < len; i++) { -- u64 bank_start, bank_end, bank_size, usable_bank_size; -- -- /* Extract raw memory region data from DTB */ -- bank_start = fdt_read_number(prop, na); -- prop += na; -- bank_size = fdt_read_number(prop, ns); -- prop += ns; -- gd->ram_size += bank_size; -- bank_end = bank_start + bank_size; -- debug("Bank %d: %llx..%llx (+%llx)\n", i, -- bank_start, bank_end, bank_size); -- -- /* -- * Align the bank to MMU section size. This is not strictly -- * necessary, since the translation table construction code -- * handles page granularity without issue. However, aligning -- * the MMU entries reduces the size and number of levels in the -- * page table, so is worth it. -- */ -- bank_start = ROUND(bank_start, SZ_2M); -- bank_end = bank_end & ~(SZ_2M - 1); -- bank_size = bank_end - bank_start; -- debug(" aligned: %llx..%llx (+%llx)\n", -- bank_start, bank_end, bank_size); -- if (bank_end <= bank_start) -- continue; -- -- /* Record data used to create MMU translation tables */ -- ram_bank_count++; -- /* Index below is deliberately 1-based to skip MMIO entry */ -- tegra_mem_map[ram_bank_count].virt = bank_start; -- tegra_mem_map[ram_bank_count].phys = bank_start; -- tegra_mem_map[ram_bank_count].size = bank_size; -- tegra_mem_map[ram_bank_count].attrs = -- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -- -- /* Determine best bank to relocate U-Boot into */ -- if (bank_end > SZ_4G) -- bank_end = SZ_4G; -- debug(" end %llx (usable)\n", bank_end); -- usable_bank_size = bank_end - bank_start; -- debug(" size %llx (usable)\n", usable_bank_size); -- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -- (bank_end > ram_top)) { -- ram_top = bank_end; -- region_base = bank_start; -- debug("ram top now %llx\n", ram_top); -- } -- } -- -- /* Ensure memory map contains the desired sentinel entry */ -- tegra_mem_map[ram_bank_count + 1].virt = 0; -- tegra_mem_map[ram_bank_count + 1].phys = 0; -- tegra_mem_map[ram_bank_count + 1].size = 0; -- tegra_mem_map[ram_bank_count + 1].attrs = 0; -- -- /* Error out if a relocation target couldn't be found */ -- if (!ram_top) { -- pr_err("Can't find a usable RAM top"); -- hang(); -- } -- -- return 0; --} -- --int dram_init_banksize(void) --{ -- int i; -- -- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -- pr_err("Reservations exceed chosen region size"); -- hang(); -- } -- -- for (i = 0; i < ram_bank_count; i++) { -- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -- } -- --#ifdef CONFIG_PCI -- gd->pci_ram_top = ram_top; --#endif -- -- return 0; --} -- --ulong board_get_usable_ram_top(ulong total_size) --{ -- return ram_top; --} -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index 496e8a02111e..6f88010c18c3 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -7,7 +7,7 @@ - #include - #include "../p2571/max77620_init.h" - --int tegra_board_init(void) -+void pin_mux_mmc(void) - { - struct udevice *dev; - uchar val; -@@ -18,19 +18,18 @@ int tegra_board_init(void) - ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); - if (ret) { - printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -- return ret; -+ return; - } - /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ - val = 0xF2; - ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); - if (ret) { - printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -- return ret; -+ return; - } -- -- return 0; - } - -+#ifdef CONFIG_PCI_TEGRA - int tegra_pcie_board_init(void) - { - struct udevice *dev; -@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) - - return 0; - } -+#endif - -From patchwork Mon Mar 18 23:24:20 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 13/15] ARM: tegra: Implement cboot_save_boot_params() in C -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058159 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:20 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This is easier to deal with and works just as well for this simple -function. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ - arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- - 3 files changed, 13 insertions(+), 21 deletions(-) - delete mode 100644 arch/arm/mach-tegra/cboot_ll.S - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 41ba674edff4..7165d70a60da 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - --obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 2bca98c92898..8708c4ec9727 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); - /* The base address of the region of RAM that ends at ram_top */ - static u64 region_base __attribute__((section(".data"))); - -+/* -+ * Explicitly put this in the .data section because it is written before the -+ * .bss section is zeroed out but it needs to persist. -+ */ -+unsigned long cboot_boot_x0 __attribute__((section(".data"))); -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+ cboot_boot_x0 = x0; -+} -+ - int cboot_dram_init(void) - { - unsigned int na, ns; -diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -deleted file mode 100644 -index 4c9ddacc2b39..000000000000 ---- a/arch/arm/mach-tegra/cboot_ll.S -+++ /dev/null -@@ -1,20 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Save cboot-related boot-time CPU state -- * -- * (C) Copyright 2015-2016 NVIDIA Corporation -- */ -- --#include --#include -- --.align 8 --.globl cboot_boot_x0 --cboot_boot_x0: -- .dword 0 -- --ENTRY(cboot_save_boot_params) -- adr x8, cboot_boot_x0 -- str x0, [x8] -- b save_boot_params_ret --ENDPROC(cboot_save_boot_params) - -From patchwork Mon Mar 18 23:24:21 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,14/15] ARM: tegra: Implement cboot_get_ethaddr() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058160 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:21 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This function will attempt to look up an ethernet address in the DTB -that was passed in from cboot. It does so by first trying to locate the -primary ethernet device for the board (identified by the "ethernet" -alias) and if found, reads the "local-mac-address" property. If the -"ethernet" alias does not exist, or if it points to a device tree node -that doesn't exist, or if the device tree node that it points to does -not have a "local-mac-address" property or if the value is invalid, it -will fall back to the legacy mechanism of looking for the MAC address -stored in the "nvidia,ethernet-mac" property of the "/chosen" node. - -Signed-off-by: Thierry Reding ---- -Changes in v2: -- make dummy static inline to avoid duplicate definitions ---- - arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- - 2 files changed, 69 insertions(+), 15 deletions(-) - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -index b3441ec178b3..021c24617575 100644 ---- a/arch/arm/include/asm/arch-tegra/cboot.h -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, - int cboot_dram_init(void); - int cboot_dram_init_banksize(void); - ulong cboot_get_usable_ram_top(ulong total_size); -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); - #else - static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, - unsigned long x2, unsigned long x3) -@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) - { - return 0; - } -+ -+static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ return -ENOSYS; -+} - #endif - - #endif -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 8708c4ec9727..c7a38d258cce 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -4,6 +4,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -465,46 +466,93 @@ static int set_fdt_addr(void) - * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_cboot(void) -+static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) - { -- const void *cboot_blob = (void *)cboot_boot_x0; -- int ret, node, len; -- const u32 *prop; -- -- /* Already a valid address in the environment? If so, keep it */ -- if (env_get("ethaddr")) -- return 0; -+ const char *prop; -+ int node, len; - -- node = fdt_path_offset(cboot_blob, "/chosen"); -+ node = fdt_path_offset(fdt, "/chosen"); - if (node < 0) { - printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); -+ -+ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); - if (!prop) { - printf("Can't find nvidia,ether-mac property in cboot DTB\n"); - return -ENOENT; - } - -- ret = env_set("ethaddr", (void *)prop); -- if (ret) { -- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); -- return ret; -+ eth_parse_enetaddr(prop, mac); -+ -+ if (!is_valid_ethaddr(mac)) { -+ printf("Invalid MAC address: %s\n", prop); -+ return -EINVAL; - } - -+ debug("Legacy MAC address: %pM\n", mac); -+ - return 0; - } - -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ int node, len, err = 0; -+ const uchar *prop; -+ const char *path; -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ node = fdt_path_offset(fdt, path); -+ if (node < 0) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ prop = fdt_getprop(fdt, node, "local-mac-address", &len); -+ if (!prop) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ if (len != ETH_ALEN) { -+ err = -EINVAL; -+ goto out; -+ } -+ -+ debug("MAC address: %pM\n", prop); -+ memcpy(mac, prop, ETH_ALEN); -+ -+out: -+ if (err < 0) -+ err = cboot_get_ethaddr_legacy(fdt, mac); -+ -+ return err; -+} -+ - int cboot_late_init(void) - { -+ const void *fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN]; -+ int err; -+ - set_calculated_env_vars(); - /* - * Ignore errors here; the value may not be used depending on - * extlinux.conf or boot script content. - */ - set_fdt_addr(); -+ - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_cboot(); -+ err = cboot_get_ethaddr(fdt, mac); -+ if (!err) -+ eth_env_set_enetaddr("ethaddr", mac); - - return 0; - } - From patchwork Mon Mar 18 23:24:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 diff --git a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch new file mode 100644 index 0000000..3e1dc09 --- /dev/null +++ b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch @@ -0,0 +1,1685 @@ +From patchwork Thu Mar 21 18:09:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,01/13] libfdt: Add phandle generation helper +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060358 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-2-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:09:58 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The new fdt_generate_phandle() function can be used to generate a new, +unused phandle given a specific device tree blob. The implementation is +somewhat naive in that it simply walks the entire device tree to find +the highest phandle value and then returns a phandle value one higher +than that. A more clever implementation might try to find holes in the +current set of phandle values and fill them. But this implementation is +relatively simple and works reliably. + +Also add a test that validates that phandles generated by this new API +are indeed unique. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v3: +- update to latest upstream commit + + lib/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ + scripts/dtc/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ + scripts/dtc/libfdt/libfdt.h | 19 +++++++++++++++++++ + scripts/dtc/libfdt/libfdt_env.h | 1 + + 4 files changed, 82 insertions(+) + +diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c +index b6ca4e0b0c30..693de9aa5ad8 100644 +--- a/lib/libfdt/fdt_ro.c ++++ b/lib/libfdt/fdt_ro.c +@@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) + return 0; + } + ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max = 0; ++ int offset = -1; ++ ++ while (true) { ++ uint32_t value; ++ ++ offset = fdt_next_node(fdt, offset, NULL); ++ if (offset < 0) { ++ if (offset == -FDT_ERR_NOTFOUND) ++ break; ++ ++ return offset; ++ } ++ ++ value = fdt_get_phandle(fdt, offset); ++ ++ if (value > max) ++ max = value; ++ } ++ ++ if (max == FDT_MAX_PHANDLE) ++ return -FDT_ERR_NOPHANDLES; ++ ++ if (phandle) ++ *phandle = max + 1; ++ ++ return 0; ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { + FDT_CHECK_HEADER(fdt); +diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c +index dfb3236da388..dc499884e4d1 100644 +--- a/scripts/dtc/libfdt/fdt_ro.c ++++ b/scripts/dtc/libfdt/fdt_ro.c +@@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) + return 0; + } + ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max = 0; ++ int offset = -1; ++ ++ while (true) { ++ uint32_t value; ++ ++ offset = fdt_next_node(fdt, offset, NULL); ++ if (offset < 0) { ++ if (offset == -FDT_ERR_NOTFOUND) ++ break; ++ ++ return offset; ++ } ++ ++ value = fdt_get_phandle(fdt, offset); ++ ++ if (value > max) ++ max = value; ++ } ++ ++ if (max == FDT_MAX_PHANDLE) ++ return -FDT_ERR_NOPHANDLES; ++ ++ if (phandle) ++ *phandle = max + 1; ++ ++ return 0; ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { + FDT_CHECK_HEADER(fdt); +diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h +index fd73688f9e9f..cf86ddba8811 100644 +--- a/scripts/dtc/libfdt/libfdt.h ++++ b/scripts/dtc/libfdt/libfdt.h +@@ -139,6 +139,10 @@ + + #define FDT_ERR_MAX 17 + ++/* constants */ ++#define FDT_MAX_PHANDLE 0xfffffffe ++ /* Valid values for phandles range from 1 to 2^32-2. */ ++ + /**********************************************************************/ + /* Low-level functions (you probably don't need these) */ + /**********************************************************************/ +@@ -313,6 +317,21 @@ const char *fdt_string(const void *fdt, int stroffset); + */ + uint32_t fdt_get_max_phandle(const void *fdt); + ++/** ++ * fdt_generate_phandle - return a new, unused phandle for a device tree blob ++ * @fdt: pointer to the device tree blob ++ * @phandle: return location for the new phandle ++ * ++ * Walks the device tree blob and looks for the highest phandle value. On ++ * success, the new, unused phandle value (one higher than the previously ++ * highest phandle value in the device tree blob) will be returned in the ++ * @phandle parameter. ++ * ++ * Returns: ++ * 0 on success or a negative error-code on failure ++ */ ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle); ++ + /** + * fdt_num_mem_rsv - retrieve the number of memory reserve map entries + * @fdt: pointer to the device tree blob +diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h +index bd2474628775..3ff9e2863075 100644 +--- a/scripts/dtc/libfdt/libfdt_env.h ++++ b/scripts/dtc/libfdt/libfdt_env.h +@@ -52,6 +52,7 @@ + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + ++#include + #include + #include + #include + +From patchwork Thu Mar 21 18:09:59 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,02/13] fdtdec: Add cpu_to_fdt_{addr, size}() macros +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060376 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-3-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:09:59 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +These macros are useful for converting the endianness of variables of +type fdt_addr_t and fdt_size_t. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v2: +- add Reviewed-by from Simon + + include/fdtdec.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index b7e35cd87c55..a965c33157c9 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t; + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) + #define fdt_size_to_cpu(reg) be64_to_cpu(reg) ++#define cpu_to_fdt_addr(reg) cpu_to_be64(reg) ++#define cpu_to_fdt_size(reg) cpu_to_be64(reg) + typedef fdt64_t fdt_val_t; + #else + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) + #define fdt_size_to_cpu(reg) be32_to_cpu(reg) ++#define cpu_to_fdt_addr(reg) cpu_to_be32(reg) ++#define cpu_to_fdt_size(reg) cpu_to_be32(reg) + typedef fdt32_t fdt_val_t; + #endif + + +From patchwork Thu Mar 21 18:10:00 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060360 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-4-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:00 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +These helpers can be used to unpack variables of type fdt_addr_t and +fdt_size_t into a pair of 32-bit variables. This is useful in cases +where such variables need to be written to properties (such as "reg") +of a device tree node where they need to be split into cells. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- new patch + + include/fdtdec.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index a965c33157c9..a0ba57c6318b 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -23,6 +23,31 @@ + */ + typedef phys_addr_t fdt_addr_t; + typedef phys_size_t fdt_size_t; ++ ++static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) ++{ ++ if (upper) ++#ifdef CONFIG_PHYS_64BIT ++ *upper = addr >> 32; ++#else ++ *upper = 0; ++#endif ++ ++ return addr; ++} ++ ++static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) ++{ ++ if (upper) ++#ifdef CONFIG_PHYS_64BIT ++ *upper = size >> 32; ++#else ++ *upper = 0; ++#endif ++ ++ return size; ++} ++ + #ifdef CONFIG_PHYS_64BIT + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) + +From patchwork Thu Mar 21 18:10:01 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,04/13] fdtdec: Implement fdtdec_set_phandle() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060366 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-5-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:01 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to set a phandle for a given node. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- don't emit deprecated linux,phandle property + + include/fdtdec.h | 11 +++++++++++ + lib/fdtdec.c | 7 +++++++ + 2 files changed, 18 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index a0ba57c6318b..55600026c488 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void); + */ + int fdtdec_setup_memory_banksize(void); + ++/** ++ * fdtdec_set_phandle() - sets the phandle of a given node ++ * ++ * @param blob FDT blob ++ * @param node offset in the FDT blob of the node whose phandle is to ++ * be set ++ * @param phandle phandle to set for the given node ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 09a7e133a539..00db90e3cdfd 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void) + } + #endif + ++int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) ++{ ++ fdt32_t value = cpu_to_fdt32(phandle); ++ ++ return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:02 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,05/13] fdtdec: Implement fdtdec_add_reserved_memory() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060362 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-6-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:02 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to add subnodes in the /reserved-memory node. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v3: +- use fdt_generate_phandle() instead of fdtdec_generate_phandle() +- add device tree bindings for /reserved-memory +- add examples to code comments + +Changes in v2: +- split fdt_{addr,size}_unpack() helpers into separate patch +- use name@x,y notation only if the upper cell is > 0 +- use debug() instead of printf() to save code size +- properly compute number of cells in reg property +- fix carveout size computations, was off by one +- use #size-cells where appropriate + + .../reserved-memory/reserved-memory.txt | 136 ++++++++++++++++++ + include/fdtdec.h | 48 +++++++ + lib/fdtdec.c | 131 +++++++++++++++++ + 3 files changed, 315 insertions(+) + create mode 100644 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + +diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +new file mode 100644 +index 000000000000..bac4afa3b197 +--- /dev/null ++++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +@@ -0,0 +1,136 @@ ++*** Reserved memory regions *** ++ ++Reserved memory is specified as a node under the /reserved-memory node. ++The operating system shall exclude reserved memory from normal usage ++one can create child nodes describing particular reserved (excluded from ++normal use) memory regions. Such memory regions are usually designed for ++the special usage by various device drivers. ++ ++Parameters for each memory region can be encoded into the device tree ++with the following nodes: ++ ++/reserved-memory node ++--------------------- ++#address-cells, #size-cells (required) - standard definition ++ - Should use the same values as the root node ++ranges (required) - standard definition ++ - Should be empty ++ ++/reserved-memory/ child nodes ++----------------------------- ++Each child of the reserved-memory node specifies one or more regions of ++reserved memory. Each child node may either use a 'reg' property to ++specify a specific range of reserved memory, or a 'size' property with ++optional constraints to request a dynamically allocated block of memory. ++ ++Following the generic-names recommended practice, node names should ++reflect the purpose of the node (ie. "framebuffer" or "dma-pool"). Unit ++address (@
) should be appended to the name if the node is a ++static allocation. ++ ++Properties: ++Requires either a) or b) below. ++a) static allocation ++ reg (required) - standard definition ++b) dynamic allocation ++ size (required) - length based on parent's #size-cells ++ - Size in bytes of memory to reserve. ++ alignment (optional) - length based on parent's #size-cells ++ - Address boundary for alignment of allocation. ++ alloc-ranges (optional) - prop-encoded-array (address, length pairs). ++ - Specifies regions of memory that are ++ acceptable to allocate from. ++ ++If both reg and size are present, then the reg property takes precedence ++and size is ignored. ++ ++Additional properties: ++compatible (optional) - standard definition ++ - may contain the following strings: ++ - shared-dma-pool: This indicates a region of memory meant to be ++ used as a shared pool of DMA buffers for a set of devices. It can ++ be used by an operating system to instantiate the necessary pool ++ management subsystem if necessary. ++ - vendor specific string in the form ,[-] ++no-map (optional) - empty property ++ - Indicates the operating system must not create a virtual mapping ++ of the region as part of its standard mapping of system memory, ++ nor permit speculative access to it under any circumstances other ++ than under the control of the device driver using the region. ++reusable (optional) - empty property ++ - The operating system can use the memory in this region with the ++ limitation that the device driver(s) owning the region need to be ++ able to reclaim it back. Typically that means that the operating ++ system can use that region to store volatile or cached data that ++ can be otherwise regenerated or migrated elsewhere. ++ ++Linux implementation note: ++- If a "linux,cma-default" property is present, then Linux will use the ++ region for the default pool of the contiguous memory allocator. ++ ++- If a "linux,dma-default" property is present, then Linux will use the ++ region for the default pool of the consistent DMA allocator. ++ ++Device node references to reserved memory ++----------------------------------------- ++Regions in the /reserved-memory node may be referenced by other device ++nodes by adding a memory-region property to the device node. ++ ++memory-region (optional) - phandle, specifier pairs to children of /reserved-memory ++ ++Example ++------- ++This example defines 3 contiguous regions are defined for Linux kernel: ++one default of all device drivers (named linux,cma@72000000 and 64MiB in size), ++one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB), and ++one for multimedia processing (named multimedia-memory@77000000, 64MiB). ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ memory { ++ reg = <0x40000000 0x40000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ /* global autoconfigured region for contiguous allocations */ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x4000000>; ++ alignment = <0x2000>; ++ linux,cma-default; ++ }; ++ ++ display_reserved: framebuffer@78000000 { ++ reg = <0x78000000 0x800000>; ++ }; ++ ++ multimedia_reserved: multimedia@77000000 { ++ compatible = "acme,multimedia-memory"; ++ reg = <0x77000000 0x4000000>; ++ }; ++ }; ++ ++ /* ... */ ++ ++ fb0: video@12300000 { ++ memory-region = <&display_reserved>; ++ /* ... */ ++ }; ++ ++ scaler: scaler@12500000 { ++ memory-region = <&multimedia_reserved>; ++ /* ... */ ++ }; ++ ++ codec: codec@12600000 { ++ memory-region = <&multimedia_reserved>; ++ /* ... */ ++ }; ++}; +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 55600026c488..b54ed38fb362 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -992,6 +992,54 @@ int fdtdec_setup_memory_banksize(void); + */ + int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); + ++/** ++ * fdtdec_add_reserved_memory() - add or find a reserved-memory node ++ * ++ * If a reserved-memory node already exists for the given carveout, a phandle ++ * for that node will be returned. Otherwise a new node will be created and a ++ * phandle corresponding to it will be returned. ++ * ++ * See Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt ++ * for details on how to use reserved memory regions. ++ * ++ * As an example, consider the following code snippet: ++ * ++ * struct fdt_memory fb = { ++ * .start = 0x92cb3000, ++ * .end = 0x934b2fff, ++ * }; ++ * uint32_t phandle; ++ * ++ * fdtdec_add_reserved_memory(fdt, "framebuffer", &fb, &phandle); ++ * ++ * This results in the following subnode being added to the top-level ++ * /reserved-memory node: ++ * ++ * reserved-memory { ++ * #address-cells = <0x00000002>; ++ * #size-cells = <0x00000002>; ++ * ranges; ++ * ++ * framebuffer@92cb3000 { ++ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; ++ * phandle = <0x0000004d>; ++ * }; ++ * }; ++ * ++ * If the top-level /reserved-memory node does not exist, it will be created. ++ * The phandle returned from the function call can be used to reference this ++ * reserved memory region from other nodes. ++ * ++ * @param blob FDT blob ++ * @param basename base name of the node to create ++ * @param carveout information about the carveout region ++ * @param phandlep return location for the phandle of the carveout region ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_add_reserved_memory(void *blob, const char *basename, ++ const struct fdt_memory *carveout, ++ uint32_t *phandlep); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 00db90e3cdfd..be54ad5bd092 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1250,6 +1250,137 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) + return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); + } + ++static int fdtdec_init_reserved_memory(void *blob) ++{ ++ int na, ns, node, err; ++ fdt32_t value; ++ ++ /* inherit #address-cells and #size-cells from the root node */ ++ na = fdt_address_cells(blob, 0); ++ ns = fdt_size_cells(blob, 0); ++ ++ node = fdt_add_subnode(blob, 0, "reserved-memory"); ++ if (node < 0) ++ return node; ++ ++ err = fdt_setprop(blob, node, "ranges", NULL, 0); ++ if (err < 0) ++ return err; ++ ++ value = cpu_to_fdt32(ns); ++ ++ err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value)); ++ if (err < 0) ++ return err; ++ ++ value = cpu_to_fdt32(na); ++ ++ err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value)); ++ if (err < 0) ++ return err; ++ ++ return node; ++} ++ ++int fdtdec_add_reserved_memory(void *blob, const char *basename, ++ const struct fdt_memory *carveout, ++ uint32_t *phandlep) ++{ ++ fdt32_t cells[4] = {}, *ptr = cells; ++ uint32_t upper, lower, phandle; ++ int parent, node, na, ns, err; ++ char name[64]; ++ ++ /* create an empty /reserved-memory node if one doesn't exist */ ++ parent = fdt_path_offset(blob, "/reserved-memory"); ++ if (parent < 0) { ++ parent = fdtdec_init_reserved_memory(blob); ++ if (parent < 0) ++ return parent; ++ } ++ ++ /* only 1 or 2 #address-cells and #size-cells are supported */ ++ na = fdt_address_cells(blob, parent); ++ if (na < 1 || na > 2) ++ return -FDT_ERR_BADNCELLS; ++ ++ ns = fdt_size_cells(blob, parent); ++ if (ns < 1 || ns > 2) ++ return -FDT_ERR_BADNCELLS; ++ ++ /* find a matching node and return the phandle to that */ ++ fdt_for_each_subnode(node, blob, parent) { ++ const char *name = fdt_get_name(blob, node, NULL); ++ phys_addr_t addr, size; ++ ++ addr = fdtdec_get_addr_size(blob, node, "reg", &size); ++ if (addr == FDT_ADDR_T_NONE) { ++ debug("failed to read address/size for %s\n", name); ++ continue; ++ } ++ ++ if (addr == carveout->start && (addr + size) == carveout->end) { ++ *phandlep = fdt_get_phandle(blob, node); ++ return 0; ++ } ++ } ++ ++ /* ++ * Unpack the start address and generate the name of the new node ++ * base on the basename and the unit-address. ++ */ ++ lower = fdt_addr_unpack(carveout->start, &upper); ++ ++ if (na > 1 && upper > 0) ++ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, ++ lower); ++ else { ++ if (upper > 0) { ++ debug("address %08x:%08x exceeds addressable space\n", ++ upper, lower); ++ return -FDT_ERR_BADVALUE; ++ } ++ ++ snprintf(name, sizeof(name), "%s@%x", basename, lower); ++ } ++ ++ node = fdt_add_subnode(blob, parent, name); ++ if (node < 0) ++ return node; ++ ++ err = fdt_generate_phandle(blob, &phandle); ++ if (err < 0) ++ return err; ++ ++ err = fdtdec_set_phandle(blob, node, phandle); ++ if (err < 0) ++ return err; ++ ++ /* store one or two address cells */ ++ if (na > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ /* store one or two size cells */ ++ lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); ++ ++ if (ns > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells)); ++ if (err < 0) ++ return err; ++ ++ /* return the phandle for the new node for the caller to use */ ++ if (phandlep) ++ *phandlep = phandle; ++ ++ return 0; ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:03 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,06/13] fdtdec: Implement carveout support functions +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060373 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-7-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:03 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used +to read a carveout from a given node or add a carveout to a given node +using the standard device tree bindings (involving reserved-memory nodes +and the memory-region property). + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v3: +- add examples to code comments + +Changes in v2: +- use debug() instead of printf() to save code size +- fix carveout size computations, was off by one +- use fdtdec_get_addr_size_auto_noparent() + + include/fdtdec.h | 81 ++++++++++++++++++++++++++++++++++++++++++++ + lib/fdtdec.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 168 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index b54ed38fb362..13b743f59ab1 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -1030,6 +1030,8 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); + * The phandle returned from the function call can be used to reference this + * reserved memory region from other nodes. + * ++ * See fdtdec_set_carveout() for a more elaborate example. ++ * + * @param blob FDT blob + * @param basename base name of the node to create + * @param carveout information about the carveout region +@@ -1040,6 +1042,85 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + const struct fdt_memory *carveout, + uint32_t *phandlep); + ++/** ++ * fdtdec_get_carveout() - reads a carveout from an FDT ++ * ++ * Reads information about a carveout region from an FDT. The carveout is a ++ * referenced by its phandle that is read from a given property in a given ++ * node. ++ * ++ * @param blob FDT blob ++ * @param node name of a node ++ * @param name name of the property in the given node that contains ++ * the phandle for the carveout ++ * @param index index of the phandle for which to read the carveout ++ * @param carveout return location for the carveout information ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_get_carveout(const void *blob, const char *node, const char *name, ++ unsigned int index, struct fdt_memory *carveout); ++ ++/** ++ * fdtdec_set_carveout() - sets a carveout region for a given node ++ * ++ * Sets a carveout region for a given node. If a reserved-memory node already ++ * exists for the carveout, the phandle for that node will be reused. If no ++ * such node exists, a new one will be created and a phandle to it stored in ++ * a specified property of the given node. ++ * ++ * As an example, consider the following code snippet: ++ * ++ * const char *node = "/host1x@50000000/dc@54240000"; ++ * struct fdt_memory fb = { ++ * .start = 0x92cb3000, ++ * .end = 0x934b2fff, ++ * }; ++ * ++ * fdtdec_set_carveout(fdt, node, "memory-region", 0, "framebuffer", &fb); ++ * ++ * dc@54200000 is a display controller and was set up by the bootloader to ++ * scan out the framebuffer specified by "fb". This would cause the following ++ * reserved memory region to be added: ++ * ++ * reserved-memory { ++ * #address-cells = <0x00000002>; ++ * #size-cells = <0x00000002>; ++ * ranges; ++ * ++ * framebuffer@92cb3000 { ++ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; ++ * phandle = <0x0000004d>; ++ * }; ++ * }; ++ * ++ * A "memory-region" property will also be added to the node referenced by the ++ * offset parameter. ++ * ++ * host1x@50000000 { ++ * ... ++ * ++ * dc@54240000 { ++ * ... ++ * memory-region = <0x0000004d>; ++ * ... ++ * }; ++ * ++ * ... ++ * }; ++ * ++ * @param blob FDT blob ++ * @param node name of the node to add the carveout to ++ * @param prop_name name of the property in which to store the phandle of ++ * the carveout ++ * @param index index of the phandle to store ++ * @param name base name of the reserved-memory node to create ++ * @param carveout information about the carveout to add ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, ++ unsigned int index, const char *name, ++ const struct fdt_memory *carveout); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index be54ad5bd092..bd05ab90fce1 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1381,6 +1381,93 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + return 0; + } + ++int fdtdec_get_carveout(const void *blob, const char *node, const char *name, ++ unsigned int index, struct fdt_memory *carveout) ++{ ++ const fdt32_t *prop; ++ uint32_t phandle; ++ int offset, len; ++ fdt_size_t size; ++ ++ offset = fdt_path_offset(blob, node); ++ if (offset < 0) ++ return offset; ++ ++ prop = fdt_getprop(blob, offset, name, &len); ++ if (!prop) { ++ debug("failed to get %s for %s\n", name, node); ++ return -FDT_ERR_NOTFOUND; ++ } ++ ++ if ((len % sizeof(phandle)) != 0) { ++ debug("invalid phandle property\n"); ++ return -FDT_ERR_BADPHANDLE; ++ } ++ ++ if (len < (sizeof(phandle) * (index + 1))) { ++ debug("invalid phandle index\n"); ++ return -FDT_ERR_BADPHANDLE; ++ } ++ ++ phandle = fdt32_to_cpu(prop[index]); ++ ++ offset = fdt_node_offset_by_phandle(blob, phandle); ++ if (offset < 0) { ++ debug("failed to find node for phandle %u\n", phandle); ++ return offset; ++ } ++ ++ carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset, ++ "reg", 0, &size, ++ true); ++ if (carveout->start == FDT_ADDR_T_NONE) { ++ debug("failed to read address/size from \"reg\" property\n"); ++ return -FDT_ERR_NOTFOUND; ++ } ++ ++ carveout->end = carveout->start + size - 1; ++ ++ return 0; ++} ++ ++int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, ++ unsigned int index, const char *name, ++ const struct fdt_memory *carveout) ++{ ++ uint32_t phandle; ++ int err, offset; ++ fdt32_t value; ++ ++ /* XXX implement support for multiple phandles */ ++ if (index > 0) { ++ debug("invalid index %u\n", index); ++ return -FDT_ERR_BADOFFSET; ++ } ++ ++ err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle); ++ if (err < 0) { ++ debug("failed to add reserved memory: %d\n", err); ++ return err; ++ } ++ ++ offset = fdt_path_offset(blob, node); ++ if (offset < 0) { ++ debug("failed to find offset for node %s: %d\n", node, offset); ++ return offset; ++ } ++ ++ value = cpu_to_fdt32(phandle); ++ ++ err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value)); ++ if (err < 0) { ++ debug("failed to set %s property for node %s: %d\n", prop_name, ++ node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:04 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,07/13] fdtdec: Add Kconfig symbol for tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060374 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-8-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:04 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Runtime tests are provided as a test_fdtdec command implementation. Add +a Kconfig symbol that allows this command to be built so that the tests +can be used. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/Kconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/lib/Kconfig b/lib/Kconfig +index 366d164cd760..b1fccf7e8dff 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -423,4 +423,8 @@ source lib/efi/Kconfig + source lib/efi_loader/Kconfig + source lib/optee/Kconfig + ++config TEST_FDTDEC ++ bool "enable fdtdec test" ++ depends on OF_LIBFDT ++ + endmenu + +From patchwork Thu Mar 21 18:10:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,08/13] fdtdec: test: Fix build warning +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060368 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-9-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:05 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Hide the declaration of the "fd" variable When not building a DEBUG +configuration, to avoid the variable being unused. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index a82e27de942f..065fed278cf3 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -79,7 +79,9 @@ static int make_fdt(void *fdt, int size, const char *aliases, + { + char name[20], value[20]; + const char *s; ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) + int fd; ++#endif + + CHECK(fdt_create(fdt, size)); + CHECK(fdt_finish_reservemap(fdt)); + +From patchwork Thu Mar 21 18:10:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,09/13] fdtdec: test: Use compound statement macros +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060361 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-10-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:06 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This eliminates the need for intermediate helper functions and allow the +macros to return a value so that it can be used subsequently. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 64 ++++++++++++++++------------------------------- + 1 file changed, 22 insertions(+), 42 deletions(-) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index 065fed278cf3..928950918413 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -15,48 +15,28 @@ + /* The size of our test fdt blob */ + #define FDT_SIZE (16 * 1024) + +-/** +- * Check if an operation failed, and if so, print an error +- * +- * @param oper_name Name of operation +- * @param err Error code to check +- * +- * @return 0 if ok, -1 if there was an error +- */ +-static int fdt_checkerr(const char *oper_name, int err) +-{ +- if (err) { +- printf("%s: %s: %s\n", __func__, oper_name, fdt_strerror(err)); +- return -1; +- } +- +- return 0; +-} +- +-/** +- * Check the result of an operation and if incorrect, print an error +- * +- * @param oper_name Name of operation +- * @param expected Expected value +- * @param value Actual value +- * +- * @return 0 if ok, -1 if there was an error +- */ +-static int checkval(const char *oper_name, int expected, int value) +-{ +- if (expected != value) { +- printf("%s: %s: expected %d, but returned %d\n", __func__, +- oper_name, expected, value); +- return -1; +- } +- +- return 0; +-} ++#define CHECK(op) ({ \ ++ int err = op; \ ++ if (err < 0) { \ ++ printf("%s: %s: %s\n", __func__, #op, \ ++ fdt_strerror(err)); \ ++ return err; \ ++ } \ ++ \ ++ err; \ ++ }) ++ ++#define CHECKVAL(op, expected) ({ \ ++ int err = op; \ ++ if (err != expected) { \ ++ printf("%s: %s: expected %d, but returned %d\n",\ ++ __func__, #op, expected, err); \ ++ return err; \ ++ } \ ++ \ ++ err; \ ++ }) + +-#define CHECK(op) if (fdt_checkerr(#op, op)) return -1 +-#define CHECKVAL(op, expected) \ +- if (checkval(#op, expected, op)) \ +- return -1 + #define CHECKOK(op) CHECKVAL(op, 0) + + /* maximum number of nodes / aliases to generate */ +@@ -138,7 +118,7 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) + CHECKVAL(make_fdt(blob, FDT_SIZE, aliases, nodes), 0); + CHECKVAL(fdtdec_find_aliases_for_id(blob, "i2c", + COMPAT_UNKNOWN, +- list, ARRAY_SIZE(list)), strlen(expect)); ++ list, ARRAY_SIZE(list)), (int)strlen(expect)); + + /* Check we got the right ones */ + for (i = 0, s = expect; *s; s++, i++) { + +From patchwork Thu Mar 21 18:10:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,10/13] fdtdec: test: Add carveout tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060375 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-11-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:07 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Implement carveout tests for 32-bit and 64-bit builds. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 152 insertions(+) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index 928950918413..f6defe16c5a6 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -141,6 +141,156 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) + return 0; + } + ++static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) ++{ ++ const char *basename = "/display"; ++ struct fdt_memory carveout = { ++#ifdef CONFIG_PHYS_64BIT ++ .start = 0x180000000, ++ .end = 0x18fffffff, ++#else ++ .start = 0x80000000, ++ .end = 0x8fffffff, ++#endif ++ }; ++ fdt32_t cells[4], *ptr = cells; ++ uint32_t upper, lower; ++ char name[32]; ++ int offset; ++ ++ /* store one or two address cells */ ++ lower = fdt_addr_unpack(carveout.start, &upper); ++ ++ if (na > 1 && upper > 0) ++ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, ++ lower); ++ else ++ snprintf(name, sizeof(name), "%s@%x", basename, lower); ++ ++ if (na > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ /* store one or two size cells */ ++ lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); ++ ++ if (ns > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ offset = CHECK(fdt_add_subnode(fdt, 0, name + 1)); ++ CHECK(fdt_setprop(fdt, offset, "reg", cells, (na + ns) * sizeof(*cells))); ++ ++ return fdtdec_set_carveout(fdt, name, "memory-region", 0, ++ "framebuffer", &carveout); ++} ++ ++static int check_fdt_carveout(void *fdt, uint32_t address_cells, ++ uint32_t size_cells) ++{ ++#ifdef CONFIG_PHYS_64BIT ++ const char *name = "/display@1,80000000"; ++ const struct fdt_memory expected = { ++ .start = 0x180000000, ++ .end = 0x18fffffff, ++ }; ++#else ++ const char *name = "/display@80000000"; ++ const struct fdt_memory expected = { ++ .start = 0x80000000, ++ .end = 0x8fffffff, ++ }; ++#endif ++ struct fdt_memory carveout; ++ ++ printf("carveout: %pap-%pap na=%u ns=%u: ", &expected.start, ++ &expected.end, address_cells, size_cells); ++ ++ CHECK(fdtdec_get_carveout(fdt, name, "memory-region", 0, &carveout)); ++ ++ if ((carveout.start != expected.start) || ++ (carveout.end != expected.end)) { ++ printf("carveout: %pap-%pap, expected %pap-%pap\n", ++ &carveout.start, &carveout.end, ++ &expected.start, &expected.end); ++ return 1; ++ } ++ ++ printf("pass\n"); ++ return 0; ++} ++ ++static int make_fdt_carveout(void *fdt, int size, uint32_t address_cells, ++ uint32_t size_cells) ++{ ++ fdt32_t na = cpu_to_fdt32(address_cells); ++ fdt32_t ns = cpu_to_fdt32(size_cells); ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) ++ char filename[512]; ++ int fd; ++#endif ++ int err; ++ ++ CHECK(fdt_create(fdt, size)); ++ CHECK(fdt_finish_reservemap(fdt)); ++ CHECK(fdt_begin_node(fdt, "")); ++ CHECK(fdt_property(fdt, "#address-cells", &na, sizeof(na))); ++ CHECK(fdt_property(fdt, "#size-cells", &ns, sizeof(ns))); ++ CHECK(fdt_end_node(fdt)); ++ CHECK(fdt_finish(fdt)); ++ CHECK(fdt_pack(fdt)); ++ ++ CHECK(fdt_open_into(fdt, fdt, FDT_SIZE)); ++ ++ err = make_fdt_carveout_device(fdt, address_cells, size_cells); ++ ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) ++ snprintf(filename, sizeof(filename), "/tmp/fdtdec-carveout-%u-%u.dtb", ++ address_cells, size_cells); ++ ++ fd = os_open(filename, OS_O_CREAT | OS_O_WRONLY); ++ if (fd < 0) { ++ printf("could not open .dtb file to write\n"); ++ goto out; ++ } ++ ++ os_write(fd, fdt, size); ++ os_close(fd); ++ ++out: ++#endif ++ return err; ++} ++ ++static int check_carveout(void) ++{ ++ void *fdt; ++ ++ fdt = malloc(FDT_SIZE); ++ if (!fdt) { ++ printf("%s: out of memory\n", __func__); ++ return 1; ++ } ++ ++#ifndef CONFIG_PHYS_64BIT ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), 0); ++ CHECKOK(check_fdt_carveout(fdt, 1, 1)); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), 0); ++ CHECKOK(check_fdt_carveout(fdt, 1, 2)); ++#else ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), -FDT_ERR_BADVALUE); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), -FDT_ERR_BADVALUE); ++#endif ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 1), 0); ++ CHECKOK(check_fdt_carveout(fdt, 2, 1)); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0); ++ CHECKOK(check_fdt_carveout(fdt, 2, 2)); ++ ++ return 0; ++} ++ + static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) + { +@@ -182,6 +332,8 @@ static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, + CHECKOK(run_test("2a 1a 0a", "a", " a")); + CHECKOK(run_test("0a 1a 2a", "a", "a")); + ++ CHECKOK(check_carveout()); ++ + printf("Test passed\n"); + return 0; + } + +From patchwork Thu Mar 21 18:10:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,11/13] sandbox: Enable fdtdec tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060364 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-12-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:08 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Enable fdtdec tests on sandbox configurations so that they can be run to +validate the fdtdec implementation. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + configs/sandbox64_defconfig | 1 + + configs/sandbox_defconfig | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig +index da4bdced3105..c04ecd915ae7 100644 +--- a/configs/sandbox64_defconfig ++++ b/configs/sandbox64_defconfig +@@ -194,6 +194,7 @@ CONFIG_CMD_DHRYSTONE=y + CONFIG_TPM=y + CONFIG_LZ4=y + CONFIG_ERRNO_STR=y ++CONFIG_TEST_FDTDEC=y + CONFIG_UNIT_TEST=y + CONFIG_UT_TIME=y + CONFIG_UT_DM=y +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index 193e41896cb7..bb508a8d02e2 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -215,6 +215,7 @@ CONFIG_CMD_DHRYSTONE=y + CONFIG_TPM=y + CONFIG_LZ4=y + CONFIG_ERRNO_STR=y ++CONFIG_TEST_FDTDEC=y + CONFIG_UNIT_TEST=y + CONFIG_UT_TIME=y + CONFIG_UT_DM=y + +From patchwork Thu Mar 21 18:10:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,12/13] p2371-2180: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060367 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-13-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:09 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index a444d692d7ea..4985302d6bc2 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -6,6 +6,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) + } + } + ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ continue; ++ } ++ } ++} ++ + int ft_board_setup(void *fdt, bd_t *bd) + { + ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } + +From patchwork Thu Mar 21 18:10:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,13/13] p2771-0000: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060363 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-14-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:10 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- + 1 file changed, 62 insertions(+), 4 deletions(-) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index fe22067f6571..d294c7ae0136 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -5,6 +5,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + } + #endif + +-int ft_board_setup(void *fdt, bd_t *bd) ++static void ft_mac_address_setup(void *fdt) + { + const void *cboot_fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; +@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + + path = fdt_get_alias(fdt, "ethernet"); + if (!path) +- return 0; ++ return; + + debug("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); +- if (offset < 0) +- return 0; ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } + + if (is_valid_ethaddr(local_mac)) { + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, +@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) + debug("MAC address set: %pM\n", mac); + } + } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@13e00000/display-hub@15200000/display@15200000", ++ "/host1x@13e00000/display-hub@15200000/display@15210000", ++ "/host1x@13e00000/display-hub@15200000/display@15220000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch new file mode 100644 index 0000000..61790a1 --- /dev/null +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -0,0 +1,2949 @@ +From patchwork Thu Mar 21 18:01:00 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,01/19] ARM: tegra: Use common header for PMU declarations +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060337 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-2-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:00 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +There's no need to replicate the pmu.h header file for every Tegra SoC +generation. Use a single header that is shared across generations. + +Signed-off-by: Thierry Reding +--- + .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- + arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ + arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ + arch/arm/mach-tegra/board2.c | 2 +- + arch/arm/mach-tegra/emc.c | 2 +- + 7 files changed, 5 insertions(+), 55 deletions(-) + rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) + delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h + +diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h +similarity index 73% +rename from arch/arm/include/asm/arch-tegra20/pmu.h +rename to arch/arm/include/asm/arch-tegra/pmu.h +index 18766dfed2bb..e850875d3166 100644 +--- a/arch/arm/include/asm/arch-tegra20/pmu.h ++++ b/arch/arm/include/asm/arch-tegra/pmu.h +@@ -4,10 +4,10 @@ + * NVIDIA Corporation + */ + +-#ifndef _ARCH_PMU_H_ +-#define _ARCH_PMU_H_ ++#ifndef _TEGRA_PMU_H_ ++#define _TEGRA_PMU_H_ + + /* Set core and CPU voltages to nominal levels */ + int pmu_set_nominal(void); + +-#endif /* _ARCH_PMU_H_ */ ++#endif /* _TEGRA_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h +deleted file mode 100644 +index 1e571ee7b317..000000000000 +--- a/arch/arm/include/asm/arch-tegra114/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA114_PMU_H_ +-#define _TEGRA114_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA114_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h +deleted file mode 100644 +index c38393edefda..000000000000 +--- a/arch/arm/include/asm/arch-tegra124/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2013 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA124_PMU_H_ +-#define _TEGRA124_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA124_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h +deleted file mode 100644 +index 6ea36aa41876..000000000000 +--- a/arch/arm/include/asm/arch-tegra210/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2015 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA210_PMU_H_ +-#define _TEGRA210_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA210_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h +deleted file mode 100644 +index a823f0fbfc61..000000000000 +--- a/arch/arm/include/asm/arch-tegra30/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA30_PMU_H_ +-#define _TEGRA30_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA30_PMU_H_ */ +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index 12257a42b51b..b8d5ef0322cb 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -24,7 +25,6 @@ + #include + #include + #include +-#include + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include +diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c +index 6697909d9a3e..66628933b653 100644 +--- a/arch/arm/mach-tegra/emc.c ++++ b/arch/arm/mach-tegra/emc.c +@@ -8,10 +8,10 @@ + #include + #include + #include +-#include + #include + #include + #include ++#include + #include + + DECLARE_GLOBAL_DATA_PTR; + +From patchwork Thu Mar 21 18:01:01 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060347 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-3-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:01 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Clock code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 2 ++ + arch/arm/mach-tegra/board2.c | 12 ++++++++++-- + 4 files changed, 18 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 86b1cd11f752..ee078fec9adc 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT + config SPL_SERIAL_SUPPORT + default y + ++config TEGRA_CLKRST ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON + select SPL + select SPL_BOARD_INIT if SPL + select SUPPORT_SPL ++ select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_NO_BPMP +@@ -100,6 +104,7 @@ config TEGRA124 + config TEGRA210 + bool "Tegra210 family" + select TEGRA_ARMV8_COMMON ++ select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_NO_BPMP + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index d4b4666fb1e2..0e812818d7a2 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -16,7 +16,7 @@ endif + obj-y += ap.o + obj-y += board.o board2.o + obj-y += cache.o +-obj-y += clock.o ++obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-y += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index f8fc042a1dcc..ecd5001de4c5 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -9,7 +9,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b8d5ef0322cb..b94077221f77 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -22,7 +22,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +@@ -109,8 +111,10 @@ int board_init(void) + __maybe_unused int board_id; + + /* Do clocks and UART first so that printf() works */ ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + clock_init(); + clock_verify(); ++#endif + + tegra_gpu_config(); + +@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); + + int board_early_init_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + if (!clock_early_init_done()) + clock_early_init(); ++#endif + + #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) + #define USBCMD_FS2 (1 << 15) +@@ -193,10 +199,12 @@ int board_early_init_f(void) + #endif + + /* Do any special system timer/TSC setup */ +-#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) ++# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +-#endif ++# endif + arch_timer_init(); ++#endif + + pinmux_init(); + board_init_uart_f(); + +From patchwork Thu Mar 21 18:01:02 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060338 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-4-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:02 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The GP pad control code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cache.c | 2 ++ + 3 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index ee078fec9adc..265051b18aaf 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT + config TEGRA_CLKRST + bool + ++config TEGRA_GP_PADCTRL ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -106,6 +110,7 @@ config TEGRA210 + select TEGRA_ARMV8_COMMON + select TEGRA_CLKRST + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 0e812818d7a2..69f802c01b45 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -13,7 +13,7 @@ else + obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o + endif + +-obj-y += ap.o ++obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c +index be414e4e4aca..d7063490e222 100644 +--- a/arch/arm/mach-tegra/cache.c ++++ b/arch/arm/mach-tegra/cache.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) + #include ++#endif + + #ifndef CONFIG_ARM64 + void config_cache(void) + +From patchwork Thu Mar 21 18:01:03 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060339 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-5-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:03 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Memory controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/board.c | 7 +++++++ + 2 files changed, 12 insertions(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 265051b18aaf..5763c4ae3cd1 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -26,6 +26,9 @@ config TEGRA_IVC + U-Boot, it is typically used for communication between the main CPU + and various auxiliary processors. + ++config TEGRA_MC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -111,6 +115,7 @@ config TEGRA210 + select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index ecd5001de4c5..7ef5a67edd1f 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -13,7 +13,9 @@ + #include + #endif + #include ++#if IS_ENABLED(CONFIG_TEGRA_MC) + #include ++#endif + #include + #include + #include +@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) + } + #endif + ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* Read the RAM size directly from the memory controller */ + static phys_size_t query_sdram_size(void) + { +@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) + + return size_bytes; + } ++#endif + + int dram_init(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); ++#endif ++ + return 0; + } + + +From patchwork Thu Mar 21 18:01:04 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060345 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-6-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:04 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pin controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 6 ++++++ + arch/arm/mach-tegra/board2.c | 2 ++ + 4 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 5763c4ae3cd1..be20ac2e804e 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -29,6 +29,9 @@ config TEGRA_IVC + config TEGRA_MC + bool + ++config TEGRA_PINCTRL ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -117,6 +121,7 @@ config TEGRA210 + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 69f802c01b45..395e0191a458 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +-obj-y += pinmux-common.o ++obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o + endif +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 7ef5a67edd1f..b65bdde5a78d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -12,7 +12,9 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include ++#endif + #if IS_ENABLED(CONFIG_TEGRA_MC) + #include + #endif +@@ -132,6 +134,7 @@ int dram_init(void) + return 0; + } + ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + static int uart_configs[] = { + #if defined(CONFIG_TEGRA20) + #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) +@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) + } + } + } ++#endif + + void board_init_uart_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + int uart_ids = 0; /* bit mask of which UART ids to enable */ + + #ifdef CONFIG_TEGRA_ENABLE_UARTA +@@ -220,6 +225,7 @@ void board_init_uart_f(void) + uart_ids |= UARTE; + #endif + setup_uarts(uart_ids); ++#endif + } + + #if !CONFIG_IS_ENABLED(OF_CONTROL) +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b94077221f77..ce1c9346959d 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -25,8 +25,10 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include + #include ++#endif + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include + +From patchwork Thu Mar 21 18:01:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060355 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-7-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:05 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Powergate code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index be20ac2e804e..db9198348d3f 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -32,6 +32,9 @@ config TEGRA_MC + config TEGRA_PINCTRL + bool + ++config TEGRA_PMC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -122,6 +126,7 @@ config TEGRA210 + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 395e0191a458..517be21ee5f5 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -18,7 +18,7 @@ obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o +-obj-y += powergate.o ++obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + endif + + +From patchwork Thu Mar 21 18:01:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,07/19] ARM: tegra: Fix save_boot_params() prototype +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060346 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-8-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:06 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The save_boot_params() function takes as its first four arguments the +first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of +which are 32 bits wide. However, on 64-bit ARM thene registers are x0, +x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing +the save_boot_params() implementation on 64-bit ARM, change it to take +unsigned long parameters rather than the fixed size 32-bit integers. +This ensures that the correct values are passed. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/board.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index b65bdde5a78d..59d2f347485d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -42,7 +42,8 @@ enum { + static bool from_spl __attribute__ ((section(".data"))); + + #ifndef CONFIG_SPL_BUILD +-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) ++void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, ++ unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; + save_boot_params_ret(); + +From patchwork Thu Mar 21 18:01:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 08/19] ARM: tegra: Allow boards to override boot target devices +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060348 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-9-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:07 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Boards may not support all the boot target devices in the default list +for Tegra devices. Allow a board to override the list and default to the +standard list only if the board hasn't specified one itself. + +Signed-off-by: Thierry Reding +--- + include/configs/tegra-common-post.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h +index e54428ba43e2..9685ee5059ab 100644 +--- a/include/configs/tegra-common-post.h ++++ b/include/configs/tegra-common-post.h +@@ -21,12 +21,14 @@ + #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ + + #ifndef CONFIG_SPL_BUILD ++#ifndef BOOT_TARGET_DEVICES + #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) ++#endif + #include + #else + #define BOOTENV + +From patchwork Thu Mar 21 18:01:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,09/19] ARM: tegra: Support TZ-only access to PMC +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060350 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-10-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:08 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Some devices may restrict access to the PMC to TrustZone software only. +Non-TZ software can detect this and use SMC calls to the firmware that +runs in the TrustZone to perform accesses to PMC registers. + +Note that this also fixes reset_cpu() and the enterrcm command on +Tegra186 where they were previously trying to access the PMC at a wrong +physical address. + +Based on work by Kalyani Chidambaram and Tom +Warren . + +Signed-off-by: Thierry Reding +--- + arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- + arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ + arch/arm/mach-tegra/Kconfig | 5 ++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/clock.c | 13 ++-- + arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- + arch/arm/mach-tegra/cpu.c | 20 +++--- + arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- + arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ + arch/arm/mach-tegra/powergate.c | 11 +-- + 10 files changed, 151 insertions(+), 65 deletions(-) + delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S + create mode 100644 arch/arm/mach-tegra/pmc.c + +diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h +index 34bbe75d5fdb..1524bf291164 100644 +--- a/arch/arm/include/asm/arch-tegra/pmc.h ++++ b/arch/arm/include/asm/arch-tegra/pmc.h +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * (C) Copyright 2010-2015 ++ * (C) Copyright 2010-2019 + * NVIDIA Corporation + */ + +@@ -388,4 +388,22 @@ struct pmc_ctlr { + /* APBDEV_PMC_CNTRL2_0 0x440 */ + #define HOLD_CKE_LOW_EN (1 << 12) + ++/* PMC read/write functions */ ++u32 tegra_pmc_readl(unsigned long offset); ++void tegra_pmc_writel(u32 value, unsigned long offset); ++ ++#define PMC_CNTRL 0x0 ++#define PMC_CNTRL_MAIN_RST BIT(4) ++ ++#if IS_ENABLED(CONFIG_TEGRA186) ++# define PMC_SCRATCH0 0x32000 ++#else ++# define PMC_SCRATCH0 0x00050 ++#endif ++ ++/* for secure PMC */ ++#define TEGRA_SMC_PMC 0xc2fffe00 ++#define TEGRA_SMC_PMC_READ 0xaa ++#define TEGRA_SMC_PMC_WRITE 0xbb ++ + #endif /* PMC_H */ +diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h +index 7ae0129e2db3..7a4e0972fb76 100644 +--- a/arch/arm/include/asm/arch-tegra/tegra.h ++++ b/arch/arm/include/asm/arch-tegra/tegra.h +@@ -30,7 +30,13 @@ + #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) + #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) + #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) ++#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ ++ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ ++ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) + #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) ++#else ++#define NV_PA_PMC_BASE 0xc360000 ++#endif + #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) + #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) + #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index db9198348d3f..28914a34a1b5 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -35,6 +35,10 @@ config TEGRA_PINCTRL + config TEGRA_PMC + bool + ++config TEGRA_PMC_SECURE ++ bool ++ depends on TEGRA_PMC ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -127,6 +131,7 @@ config TEGRA210 + select TEGRA_NO_BPMP + select TEGRA_PINCTRL + select TEGRA_PMC ++ select TEGRA_PMC_SECURE + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 517be21ee5f5..f8bc65aa8b18 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0+ + # +-# (C) Copyright 2010-2015 Nvidia Corporation. ++# (C) Copyright 2010-2019 Nvidia Corporation. + # + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. +@@ -27,11 +27,11 @@ obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o + obj-$(CONFIG_TEGRA_IVC) += ivc.o +-obj-y += lowlevel_init.o + ifndef CONFIG_SPL_BUILD + obj-$(CONFIG_ARMV7_PSCI) += psci.o + endif + obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o ++obj-y += pmc.o + + obj-$(CONFIG_TEGRA20) += tegra20/ + obj-$(CONFIG_TEGRA30) += tegra30/ +diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c +index 096330748f2b..c9cd4e6aaeb7 100644 +--- a/arch/arm/mach-tegra/clock.c ++++ b/arch/arm/mach-tegra/clock.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + /* Tegra SoC common clock control functions */ +@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) + + int clock_external_output(int clk_id) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; ++ u32 val; + + if (clk_id >= 1 && clk_id <= 3) { +- setbits_le32(&pmc->pmc_clk_out_cntrl, +- 1 << (2 + (clk_id - 1) * 8)); ++ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ val |= 1 << (2 + (clk_id - 1) * 8); ++ tegra_pmc_writel(val, ++ offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; +diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c +index 4e6beb3e5bb4..4a889f0e3422 100644 +--- a/arch/arm/mach-tegra/cmd_enterrcm.c ++++ b/arch/arm/mach-tegra/cmd_enterrcm.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. + * + * Derived from code (arch/arm/lib/reset.c) that is: + * +@@ -31,12 +31,10 @@ + static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- + puts("Entering RCM...\n"); + udelay(50000); + +- pmc->pmc_scratch0 = 2; ++ tegra_pmc_writel(2, PMC_SCRATCH0); + disable_interrupts(); + reset_cpu(0); + +diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c +index 1b6ad074ed8f..3d140760e68f 100644 +--- a/arch/arm/mach-tegra/cpu.c ++++ b/arch/arm/mach-tegra/cpu.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) + + static int is_cpu_powered(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- +- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; ++ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; + } + + static void remove_cpu_io_clamps(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + debug("%s entry\n", __func__); + + /* Remove the clamps on the CPU I/O signals */ +- reg = readl(&pmc->pmc_remove_clamping); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); + reg |= CPU_CLMP; +- writel(reg, &pmc->pmc_remove_clamping); ++ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); + + /* Give I/O signals time to stabilize */ + udelay(IO_STABILIZATION_DELAY); +@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) + + void powerup_cpu(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + int timeout = IO_STABILIZATION_DELAY; + debug("%s entry\n", __func__); + + if (!is_cpu_powered()) { + /* Toggle the CPU power state (OFF -> ON) */ +- reg = readl(&pmc->pmc_pwrgate_toggle); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + reg &= PARTID_CP; + reg |= START_CP; +- writel(reg, &pmc->pmc_pwrgate_toggle); ++ tegra_pmc_writel(reg, ++ offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + + /* Wait for the power to come up */ + while (!is_cpu_powered()) { +diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S +deleted file mode 100644 +index 626f1b642745..000000000000 +--- a/arch/arm/mach-tegra/lowlevel_init.S ++++ /dev/null +@@ -1,39 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * SoC-specific setup info +- * +- * (C) Copyright 2010,2011 +- * NVIDIA Corporation +- */ +- +-#include +-#include +- +-#ifdef CONFIG_ARM64 +- .align 5 +-ENTRY(reset_cpu) +- /* get address for global reset register */ +- ldr x1, =PRM_RSTCTRL +- ldr w3, [x1] +- /* force reset */ +- orr w3, w3, #0x10 +- str w3, [x1] +- mov w0, w0 +-1: +- b 1b +-ENDPROC(reset_cpu) +-#else +- .align 5 +-ENTRY(reset_cpu) +- ldr r1, rstctl @ get addr for global reset +- @ reg +- ldr r3, [r1] +- orr r3, r3, #0x10 +- str r3, [r1] @ force reset +- mov r0, r0 +-_loop_forever: +- b _loop_forever +-rstctl: +- .word PRM_RSTCTRL +-ENDPROC(reset_cpu) +-#endif +diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c +new file mode 100644 +index 000000000000..afd3c54179c1 +--- /dev/null ++++ b/arch/arm/mach-tegra/pmc.c +@@ -0,0 +1,92 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. ++ */ ++ ++#include ++ ++#include ++ ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++static bool tegra_pmc_detect_tz_only(void) ++{ ++ static bool initialized = false; ++ static bool is_tz_only = false; ++ u32 value, saved; ++ ++ if (!initialized) { ++ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = saved ^ 0xffffffff; ++ ++ if (value == 0xffffffff) ++ value = 0xdeadbeef; ++ ++ /* write pattern and read it back */ ++ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ ++ /* if we read all-zeroes, access is restricted to TZ only */ ++ if (value == 0) { ++ debug("access to PMC is restricted to TZ\n"); ++ is_tz_only = true; ++ } else { ++ /* restore original value */ ++ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ } ++ ++ initialized = true; ++ } ++ ++ return is_tz_only; ++} ++#endif ++ ++uint32_t tegra_pmc_readl(unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, ++ 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return res.a1; ++ } ++#endif ++ ++ return readl(NV_PA_PMC_BASE + offset); ++} ++ ++void tegra_pmc_writel(u32 value, unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, ++ value, 0, 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return; ++ } ++#endif ++ ++ writel(value, NV_PA_PMC_BASE + offset); ++} ++ ++void reset_cpu(ulong addr) ++{ ++ u32 value; ++ ++ value = tegra_pmc_readl(PMC_CNTRL); ++ value |= PMC_CNTRL_MAIN_RST; ++ tegra_pmc_writel(value, PMC_CNTRL); ++} +diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c +index e45f0961b242..761c9ef19e3b 100644 +--- a/arch/arm/mach-tegra/powergate.c ++++ b/arch/arm/mach-tegra/powergate.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -11,6 +11,7 @@ + + #include + #include ++#include + + #define PWRGATE_TOGGLE 0x30 + #define PWRGATE_TOGGLE_START (1 << 8) +@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) + u32 value, mask = state ? (1 << id) : 0, old_mask; + unsigned long start, timeout = 25; + +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + old_mask = value & (1 << id); + + if (mask == old_mask) + return 0; + +- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); ++ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); + + start = get_timer(0); + + while (get_timer(start) < timeout) { +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + if ((value & (1 << id)) == mask) + return 0; + } +@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) + else + value = 1 << id; + +- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); ++ tegra_pmc_writel(value, REMOVE_CLAMPING); + + return 0; + } + +From patchwork Thu Mar 21 18:01:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 10/19] ARM: tegra: Workaround UDC boot issues only if necessary +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060352 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-11-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:09 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Resetting the USB device controller on boot is only necessary if the SoC +actually has a UDC controller and U-Boot enables support for it. All the +Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on +boot workaround depend on the ChipIdea UDC driver. + +This prevents a crash on Tegra186 which does not have the ChipIdea UDC. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 28914a34a1b5..faa73559fd42 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -148,6 +148,7 @@ endchoice + + config TEGRA_DISCONNECT_UDC_ON_BOOT + bool "Disconnect USB device mode controller on boot" ++ depends on CI_UDC + default y + help + When loading U-Boot into RAM over USB protocols using tools such as + +From patchwork Thu Mar 21 18:01:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,11/19] ARM: tegra: Restore DRAM bank count +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060341 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-12-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:10 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced +the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 +boards. + +However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: +increase max DRAM bank count"), the platform can have a large number of +unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks +are needed to describe the worst-case situation. + +In practice the number of DRAM banks needed will typically be much +lower, but we should be prepared to properly deal with the worst case. + +Signed-off-by: Thierry Reding +--- + configs/p2771-0000-000_defconfig | 2 +- + configs/p2771-0000-500_defconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index ac85efa37b3b..ad0802067e73 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index df4d914d85cf..459b67fd195f 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + +From patchwork Thu Mar 21 18:01:11 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,12/19] ARM: tegra: Unify Tegra186 builds +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060344 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-13-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:11 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Tegra186 build are currently dealt with in very special ways, which is +because Tegra186 is fundamentally different in many respects. It is no +longer necessary to do many of the low-level programming because early +boot firmware will already have taken care of it. + +Unfortunately, separating Tegra186 builds from the rest in this way +makes it difficult to share code with prior generations of Tegra. With +all of the low-level programming code behind Kconfig guards, the build +for Tegra186 can again be unified. + +As a side-effect, and partial reason for this change, other Tegra SoC +generations can now make use of the code that deals with taking over a +boot from earlier bootloaders. This used to be nvtboot, but has been +replaced by cboot nowadays. Rename the files and functions related to +this to avoid confusion. The implemented protocols are unchanged. + +Signed-off-by: Thierry Reding +--- +Changes in v3: +- load cboot DTB address to fdt_addr instead of fdtaddr + + arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/board.c | 23 ++ + arch/arm/mach-tegra/board186.c | 32 --- + arch/arm/mach-tegra/board2.c | 21 ++ + .../{tegra186/nvtboot_board.c => cboot.c} | 200 ++++++++++++++++-- + .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- + arch/arm/mach-tegra/tegra186/Makefile | 4 - + arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- + board/nvidia/p2771-0000/p2771-0000.c | 10 +- + 10 files changed, 278 insertions(+), 239 deletions(-) + create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h + delete mode 100644 arch/arm/mach-tegra/board186.c + rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (56%) + rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) + delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +new file mode 100644 +index 000000000000..b3441ec178b3 +--- /dev/null ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _TEGRA_CBOOT_H_ ++#define _TEGRA_CBOOT_H_ ++ ++#ifdef CONFIG_ARM64 ++extern unsigned long cboot_boot_x0; ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3); ++int cboot_dram_init(void); ++int cboot_dram_init_banksize(void); ++ulong cboot_get_usable_ram_top(ulong total_size); ++#else ++static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++} ++ ++static inline int cboot_dram_init(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline int cboot_dram_init_banksize(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return 0; ++} ++#endif ++ ++#endif +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index f8bc65aa8b18..41ba674edff4 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -5,7 +5,6 @@ + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +-ifndef CONFIG_TEGRA186 + ifdef CONFIG_SPL_BUILD + obj-y += spl.o + obj-y += cpu.o +@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o +-endif + +-obj-$(CONFIG_ARM64) += arm64-mmu.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 59d2f347485d..c3ba00811e83 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, + unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; ++ ++ /* ++ * The logic for this is somewhat indirect. The purpose of the marker ++ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot ++ * was loaded from a read-only instance of itself, which is something ++ * that can happen in secure boot setups. So basically the presence ++ * of the marker is an indication that U-Boot was loaded by one such ++ * special variant of U-Boot. Conversely, the absence of the marker ++ * indicates that this instance of U-Boot was loaded by something ++ * other than a special U-Boot. This could be SPL, but it could just ++ * as well be one of any number of other first stage bootloaders. ++ */ ++ if (from_spl) ++ cboot_save_boot_params(r0, r1, r2, r3); ++ + save_boot_params_ret(); + } + #endif +@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) + + int dram_init(void) + { ++ int err; ++ ++ /* try to initialize DRAM from cboot DTB first */ ++ err = cboot_dram_init(); ++ if (err == 0) ++ return 0; ++ + #if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); +diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c +deleted file mode 100644 +index 80b55707e90f..000000000000 +--- a/arch/arm/mach-tegra/board186.c ++++ /dev/null +@@ -1,32 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016, NVIDIA CORPORATION. +- */ +- +-#include +-#include +- +-int board_early_init_f(void) +-{ +- return 0; +-} +- +-__weak int tegra_board_init(void) +-{ +- return 0; +-} +- +-int board_init(void) +-{ +- return tegra_board_init(); +-} +- +-__weak int tegra_soc_board_init_late(void) +-{ +- return 0; +-} +- +-int board_late_init(void) +-{ +- return tegra_soc_board_init_late(); +-} +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index ce1c9346959d..bbc487aa3bf6 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} + __weak void gpio_early_init_uart(void) {} + __weak void pin_mux_display(void) {} + __weak void start_cpu_fan(void) {} ++__weak void cboot_late_init(void) {} + + #if defined(CONFIG_TEGRA_NAND) + __weak void pin_mux_nand(void) +@@ -243,6 +245,7 @@ int board_late_init(void) + } + #endif + start_cpu_fan(); ++ cboot_late_init(); + + return 0; + } +@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) + */ + int dram_init_banksize(void) + { ++ int err; ++ ++ /* try to compute DRAM bank size based on cboot DTB first */ ++ err = cboot_dram_init_banksize(); ++ if (err == 0) ++ return err; ++ ++ /* fall back to default DRAM bank size computation */ ++ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); + +@@ -370,5 +382,14 @@ int dram_init_banksize(void) + */ + ulong board_get_usable_ram_top(ulong total_size) + { ++ ulong ram_top; ++ ++ /* try to get top of usable RAM based on cboot DTB first */ ++ ram_top = cboot_get_usable_ram_top(total_size); ++ if (ram_top > 0) ++ return ram_top; ++ ++ /* fall back to default usable RAM computation */ ++ + return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c +similarity index 56% +rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c +rename to arch/arm/mach-tegra/cboot.c +index 83c0e931ea24..95a097584ac6 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -3,14 +3,182 @@ + * Copyright (c) 2016-2018, NVIDIA CORPORATION. + */ + +-#include + #include + #include + #include ++#include ++ ++#include ++ + #include ++#include + #include + +-extern unsigned long nvtboot_boot_x0; ++/* ++ * Size of a region that's large enough to hold the relocated U-Boot and all ++ * other allocations made around it (stack, heap, page tables, etc.) ++ * In practice, running "bdinfo" at the shell prompt, the stack reaches about ++ * 5MB from the address selected for ram_top as of the time of writing, ++ * so a 16MB region should be plenty. ++ */ ++#define MIN_USABLE_RAM_SIZE SZ_16M ++/* ++ * The amount of space we expect to require for stack usage. Used to validate ++ * that all reservations fit into the region selected for the relocation target ++ */ ++#define MIN_USABLE_STACK_SIZE SZ_1M ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++extern struct mm_region tegra_mem_map[]; ++ ++/* ++ * These variables are written to before relocation, and hence cannot be ++ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. ++ * The section attribute forces this into .data and avoids this issue. This ++ * also has the nice side-effect of the content being valid after relocation. ++ */ ++ ++/* The number of valid entries in ram_banks[] */ ++static int ram_bank_count __attribute__((section(".data"))); ++ ++/* ++ * The usable top-of-RAM for U-Boot. This is both: ++ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. ++ * b) At the end of a region that has enough space to hold the relocated U-Boot ++ * and all other allocations made around it (stack, heap, page tables, etc.) ++ */ ++static u64 ram_top __attribute__((section(".data"))); ++/* The base address of the region of RAM that ends at ram_top */ ++static u64 region_base __attribute__((section(".data"))); ++ ++int cboot_dram_init(void) ++{ ++ unsigned int na, ns; ++ const void *cboot_blob = (void *)cboot_boot_x0; ++ int node, len, i; ++ const u32 *prop; ++ ++ if (!cboot_blob) ++ return -EINVAL; ++ ++ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); ++ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); ++ ++ node = fdt_path_offset(cboot_blob, "/memory"); ++ if (node < 0) { ++ pr_err("Can't find /memory node in cboot DTB"); ++ hang(); ++ } ++ prop = fdt_getprop(cboot_blob, node, "reg", &len); ++ if (!prop) { ++ pr_err("Can't find /memory/reg property in cboot DTB"); ++ hang(); ++ } ++ ++ /* Calculate the true # of base/size pairs to read */ ++ len /= 4; /* Convert bytes to number of cells */ ++ len /= (na + ns); /* Convert cells to number of banks */ ++ if (len > CONFIG_NR_DRAM_BANKS) ++ len = CONFIG_NR_DRAM_BANKS; ++ ++ /* Parse the /memory node, and save useful entries */ ++ gd->ram_size = 0; ++ ram_bank_count = 0; ++ for (i = 0; i < len; i++) { ++ u64 bank_start, bank_end, bank_size, usable_bank_size; ++ ++ /* Extract raw memory region data from DTB */ ++ bank_start = fdt_read_number(prop, na); ++ prop += na; ++ bank_size = fdt_read_number(prop, ns); ++ prop += ns; ++ gd->ram_size += bank_size; ++ bank_end = bank_start + bank_size; ++ debug("Bank %d: %llx..%llx (+%llx)\n", i, ++ bank_start, bank_end, bank_size); ++ ++ /* ++ * Align the bank to MMU section size. This is not strictly ++ * necessary, since the translation table construction code ++ * handles page granularity without issue. However, aligning ++ * the MMU entries reduces the size and number of levels in the ++ * page table, so is worth it. ++ */ ++ bank_start = ROUND(bank_start, SZ_2M); ++ bank_end = bank_end & ~(SZ_2M - 1); ++ bank_size = bank_end - bank_start; ++ debug(" aligned: %llx..%llx (+%llx)\n", ++ bank_start, bank_end, bank_size); ++ if (bank_end <= bank_start) ++ continue; ++ ++ /* Record data used to create MMU translation tables */ ++ ram_bank_count++; ++ /* Index below is deliberately 1-based to skip MMIO entry */ ++ tegra_mem_map[ram_bank_count].virt = bank_start; ++ tegra_mem_map[ram_bank_count].phys = bank_start; ++ tegra_mem_map[ram_bank_count].size = bank_size; ++ tegra_mem_map[ram_bank_count].attrs = ++ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; ++ ++ /* Determine best bank to relocate U-Boot into */ ++ if (bank_end > SZ_4G) ++ bank_end = SZ_4G; ++ debug(" end %llx (usable)\n", bank_end); ++ usable_bank_size = bank_end - bank_start; ++ debug(" size %llx (usable)\n", usable_bank_size); ++ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && ++ (bank_end > ram_top)) { ++ ram_top = bank_end; ++ region_base = bank_start; ++ debug("ram top now %llx\n", ram_top); ++ } ++ } ++ ++ /* Ensure memory map contains the desired sentinel entry */ ++ tegra_mem_map[ram_bank_count + 1].virt = 0; ++ tegra_mem_map[ram_bank_count + 1].phys = 0; ++ tegra_mem_map[ram_bank_count + 1].size = 0; ++ tegra_mem_map[ram_bank_count + 1].attrs = 0; ++ ++ /* Error out if a relocation target couldn't be found */ ++ if (!ram_top) { ++ pr_err("Can't find a usable RAM top"); ++ hang(); ++ } ++ ++ return 0; ++} ++ ++int cboot_dram_init_banksize(void) ++{ ++ int i; ++ ++ if (ram_bank_count == 0) ++ return -EINVAL; ++ ++ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { ++ pr_err("Reservations exceed chosen region size"); ++ hang(); ++ } ++ ++ for (i = 0; i < ram_bank_count; i++) { ++ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; ++ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; ++ } ++ ++#ifdef CONFIG_PCI ++ gd->pci_ram_top = ram_top; ++#endif ++ ++ return 0; ++} ++ ++ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return ram_top; ++} + + /* + * The following few functions run late during the boot process and dynamically +@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; + * list of RAM banks into some private data structure before running. + */ + +-extern struct mm_region tegra_mem_map[]; +- + static char *gen_varname(const char *var, const char *ext) + { + size_t len_var = strlen(var); +@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) + dump_ram_banks(); + #endif + +- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); ++ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); + + #ifdef DEBUG + printf("RAM after reserving cboot DTB:\n"); +@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) + debug("%s: var: %s\n", __func__, var); + set_calculated_env_var(var); + #ifdef DEBUG +- printf("RAM banks affter allocating %s:\n", var); ++ printf("RAM banks after allocating %s:\n", var); + dump_ram_banks(); + #endif + } +@@ -274,7 +440,7 @@ static int set_fdt_addr(void) + { + int ret; + +- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); ++ ret = env_set_hex("fdt_addr", cboot_boot_x0); + if (ret) { + printf("Failed to set fdt_addr to point at DTB: %d\n", ret); + return ret; +@@ -284,12 +450,12 @@ static int set_fdt_addr(void) + } + + /* +- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's ++ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_nvtboot(void) ++static int set_ethaddr_from_cboot(void) + { +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; ++ const void *cboot_blob = (void *)cboot_boot_x0; + int ret, node, len; + const u32 *prop; + +@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) + if (env_get("ethaddr")) + return 0; + +- node = fdt_path_offset(nvtboot_blob, "/chosen"); ++ node = fdt_path_offset(cboot_blob, "/chosen"); + if (node < 0) { +- printf("Can't find /chosen node in nvtboot DTB\n"); ++ printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); ++ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); + if (!prop) { +- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); ++ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + + ret = env_set("ethaddr", (void *)prop); + if (ret) { +- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); ++ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); + return ret; + } + + return 0; + } + +-int tegra_soc_board_init_late(void) ++int cboot_late_init(void) + { + set_calculated_env_vars(); + /* +@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) + */ + set_fdt_addr(); + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_nvtboot(); ++ set_ethaddr_from_cboot(); + + return 0; + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +similarity index 57% +rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S +rename to arch/arm/mach-tegra/cboot_ll.S +index aa7a863d9702..4c9ddacc2b39 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S ++++ b/arch/arm/mach-tegra/cboot_ll.S +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * Save nvtboot-related boot-time CPU state ++ * Save cboot-related boot-time CPU state + * + * (C) Copyright 2015-2016 NVIDIA Corporation + */ +@@ -9,12 +9,12 @@ + #include + + .align 8 +-.globl nvtboot_boot_x0 +-nvtboot_boot_x0: ++.globl cboot_boot_x0 ++cboot_boot_x0: + .dword 0 + +-ENTRY(save_boot_params) +- adr x8, nvtboot_boot_x0 ++ENTRY(cboot_save_boot_params) ++ adr x8, cboot_boot_x0 + str x0, [x8] + b save_boot_params_ret +-ENDPROC(save_boot_params) ++ENDPROC(cboot_save_boot_params) +diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile +index 56f3378ecea3..3a2405027704 100644 +--- a/arch/arm/mach-tegra/tegra186/Makefile ++++ b/arch/arm/mach-tegra/tegra186/Makefile +@@ -2,8 +2,4 @@ + # + # SPDX-License-Identifier: GPL-2.0 + +-obj-y += ../board186.o + obj-y += cache.o +-obj-y += nvtboot_board.o +-obj-y += nvtboot_ll.o +-obj-y += nvtboot_mem.o +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +deleted file mode 100644 +index 62142821a595..000000000000 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c ++++ /dev/null +@@ -1,172 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016-2018, NVIDIA CORPORATION. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-/* +- * Size of a region that's large enough to hold the relocated U-Boot and all +- * other allocations made around it (stack, heap, page tables, etc.) +- * In practice, running "bdinfo" at the shell prompt, the stack reaches about +- * 5MB from the address selected for ram_top as of the time of writing, +- * so a 16MB region should be plenty. +- */ +-#define MIN_USABLE_RAM_SIZE SZ_16M +-/* +- * The amount of space we expect to require for stack usage. Used to validate +- * that all reservations fit into the region selected for the relocation target +- */ +-#define MIN_USABLE_STACK_SIZE SZ_1M +- +-DECLARE_GLOBAL_DATA_PTR; +- +-extern unsigned long nvtboot_boot_x0; +-extern struct mm_region tegra_mem_map[]; +- +-/* +- * These variables are written to before relocation, and hence cannot be +- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. +- * The section attribute forces this into .data and avoids this issue. This +- * also has the nice side-effect of the content being valid after relocation. +- */ +- +-/* The number of valid entries in ram_banks[] */ +-static int ram_bank_count __attribute__((section(".data"))); +- +-/* +- * The usable top-of-RAM for U-Boot. This is both: +- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. +- * b) At the end of a region that has enough space to hold the relocated U-Boot +- * and all other allocations made around it (stack, heap, page tables, etc.) +- */ +-static u64 ram_top __attribute__((section(".data"))); +-/* The base address of the region of RAM that ends at ram_top */ +-static u64 region_base __attribute__((section(".data"))); +- +-int dram_init(void) +-{ +- unsigned int na, ns; +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; +- int node, len, i; +- const u32 *prop; +- +- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); +- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); +- +- node = fdt_path_offset(nvtboot_blob, "/memory"); +- if (node < 0) { +- pr_err("Can't find /memory node in nvtboot DTB"); +- hang(); +- } +- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); +- if (!prop) { +- pr_err("Can't find /memory/reg property in nvtboot DTB"); +- hang(); +- } +- +- /* Calculate the true # of base/size pairs to read */ +- len /= 4; /* Convert bytes to number of cells */ +- len /= (na + ns); /* Convert cells to number of banks */ +- if (len > CONFIG_NR_DRAM_BANKS) +- len = CONFIG_NR_DRAM_BANKS; +- +- /* Parse the /memory node, and save useful entries */ +- gd->ram_size = 0; +- ram_bank_count = 0; +- for (i = 0; i < len; i++) { +- u64 bank_start, bank_end, bank_size, usable_bank_size; +- +- /* Extract raw memory region data from DTB */ +- bank_start = fdt_read_number(prop, na); +- prop += na; +- bank_size = fdt_read_number(prop, ns); +- prop += ns; +- gd->ram_size += bank_size; +- bank_end = bank_start + bank_size; +- debug("Bank %d: %llx..%llx (+%llx)\n", i, +- bank_start, bank_end, bank_size); +- +- /* +- * Align the bank to MMU section size. This is not strictly +- * necessary, since the translation table construction code +- * handles page granularity without issue. However, aligning +- * the MMU entries reduces the size and number of levels in the +- * page table, so is worth it. +- */ +- bank_start = ROUND(bank_start, SZ_2M); +- bank_end = bank_end & ~(SZ_2M - 1); +- bank_size = bank_end - bank_start; +- debug(" aligned: %llx..%llx (+%llx)\n", +- bank_start, bank_end, bank_size); +- if (bank_end <= bank_start) +- continue; +- +- /* Record data used to create MMU translation tables */ +- ram_bank_count++; +- /* Index below is deliberately 1-based to skip MMIO entry */ +- tegra_mem_map[ram_bank_count].virt = bank_start; +- tegra_mem_map[ram_bank_count].phys = bank_start; +- tegra_mem_map[ram_bank_count].size = bank_size; +- tegra_mem_map[ram_bank_count].attrs = +- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; +- +- /* Determine best bank to relocate U-Boot into */ +- if (bank_end > SZ_4G) +- bank_end = SZ_4G; +- debug(" end %llx (usable)\n", bank_end); +- usable_bank_size = bank_end - bank_start; +- debug(" size %llx (usable)\n", usable_bank_size); +- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && +- (bank_end > ram_top)) { +- ram_top = bank_end; +- region_base = bank_start; +- debug("ram top now %llx\n", ram_top); +- } +- } +- +- /* Ensure memory map contains the desired sentinel entry */ +- tegra_mem_map[ram_bank_count + 1].virt = 0; +- tegra_mem_map[ram_bank_count + 1].phys = 0; +- tegra_mem_map[ram_bank_count + 1].size = 0; +- tegra_mem_map[ram_bank_count + 1].attrs = 0; +- +- /* Error out if a relocation target couldn't be found */ +- if (!ram_top) { +- pr_err("Can't find a usable RAM top"); +- hang(); +- } +- +- return 0; +-} +- +-int dram_init_banksize(void) +-{ +- int i; +- +- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { +- pr_err("Reservations exceed chosen region size"); +- hang(); +- } +- +- for (i = 0; i < ram_bank_count; i++) { +- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; +- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; +- } +- +-#ifdef CONFIG_PCI +- gd->pci_ram_top = ram_top; +-#endif +- +- return 0; +-} +- +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- return ram_top; +-} +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 496e8a02111e..6f88010c18c3 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -7,7 +7,7 @@ + #include + #include "../p2571/max77620_init.h" + +-int tegra_board_init(void) ++void pin_mux_mmc(void) + { + struct udevice *dev; + uchar val; +@@ -18,19 +18,18 @@ int tegra_board_init(void) + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +- return ret; ++ return; + } + /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xF2; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); + if (ret) { + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +- return ret; ++ return; + } +- +- return 0; + } + ++#ifdef CONFIG_PCI_TEGRA + int tegra_pcie_board_init(void) + { + struct udevice *dev; +@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) + + return 0; + } ++#endif + +From patchwork Thu Mar 21 18:01:12 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 13/19] ARM: tegra: Implement cboot_save_boot_params() in C +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060342 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-14-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:12 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This is easier to deal with and works just as well for this simple +function. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ + arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- + 3 files changed, 13 insertions(+), 21 deletions(-) + delete mode 100644 arch/arm/mach-tegra/cboot_ll.S + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 41ba674edff4..7165d70a60da 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + +-obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 95a097584ac6..acf33b4c4e0c 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); + /* The base address of the region of RAM that ends at ram_top */ + static u64 region_base __attribute__((section(".data"))); + ++/* ++ * Explicitly put this in the .data section because it is written before the ++ * .bss section is zeroed out but it needs to persist. ++ */ ++unsigned long cboot_boot_x0 __attribute__((section(".data"))); ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++ cboot_boot_x0 = x0; ++} ++ + int cboot_dram_init(void) + { + unsigned int na, ns; +diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +deleted file mode 100644 +index 4c9ddacc2b39..000000000000 +--- a/arch/arm/mach-tegra/cboot_ll.S ++++ /dev/null +@@ -1,20 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Save cboot-related boot-time CPU state +- * +- * (C) Copyright 2015-2016 NVIDIA Corporation +- */ +- +-#include +-#include +- +-.align 8 +-.globl cboot_boot_x0 +-cboot_boot_x0: +- .dword 0 +- +-ENTRY(cboot_save_boot_params) +- adr x8, cboot_boot_x0 +- str x0, [x8] +- b save_boot_params_ret +-ENDPROC(cboot_save_boot_params) + +From patchwork Thu Mar 21 18:01:13 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,14/19] ARM: tegra: Implement cboot_get_ethaddr() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060340 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-15-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:13 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function will attempt to look up an ethernet address in the DTB +that was passed in from cboot. It does so by first trying to locate the +primary ethernet device for the board (identified by the "ethernet" +alias) and if found, reads the "local-mac-address" property. If the +"ethernet" alias does not exist, or if it points to a device tree node +that doesn't exist, or if the device tree node that it points to does +not have a "local-mac-address" property or if the value is invalid, it +will fall back to the legacy mechanism of looking for the MAC address +stored in the "nvidia,ethernet-mac" property of the "/chosen" node. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- make dummy static inline to avoid duplicate definitions + + arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ + arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- + 2 files changed, 69 insertions(+), 15 deletions(-) + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +index b3441ec178b3..021c24617575 100644 +--- a/arch/arm/include/asm/arch-tegra/cboot.h ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, + int cboot_dram_init(void); + int cboot_dram_init_banksize(void); + ulong cboot_get_usable_ram_top(ulong total_size); ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); + #else + static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, + unsigned long x2, unsigned long x3) +@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) + { + return 0; + } ++ ++static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ return -ENOSYS; ++} + #endif + + #endif +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index acf33b4c4e0c..9735380bda59 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -4,6 +4,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -465,46 +466,93 @@ static int set_fdt_addr(void) + * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_cboot(void) ++static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) + { +- const void *cboot_blob = (void *)cboot_boot_x0; +- int ret, node, len; +- const u32 *prop; +- +- /* Already a valid address in the environment? If so, keep it */ +- if (env_get("ethaddr")) +- return 0; ++ const char *prop; ++ int node, len; + +- node = fdt_path_offset(cboot_blob, "/chosen"); ++ node = fdt_path_offset(fdt, "/chosen"); + if (node < 0) { + printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); ++ ++ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); + if (!prop) { + printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + +- ret = env_set("ethaddr", (void *)prop); +- if (ret) { +- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); +- return ret; ++ eth_parse_enetaddr(prop, mac); ++ ++ if (!is_valid_ethaddr(mac)) { ++ printf("Invalid MAC address: %s\n", prop); ++ return -EINVAL; + } + ++ debug("Legacy MAC address: %pM\n", mac); ++ + return 0; + } + ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ int node, len, err = 0; ++ const uchar *prop; ++ const char *path; ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ node = fdt_path_offset(fdt, path); ++ if (node < 0) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ prop = fdt_getprop(fdt, node, "local-mac-address", &len); ++ if (!prop) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ if (len != ETH_ALEN) { ++ err = -EINVAL; ++ goto out; ++ } ++ ++ debug("MAC address: %pM\n", prop); ++ memcpy(mac, prop, ETH_ALEN); ++ ++out: ++ if (err < 0) ++ err = cboot_get_ethaddr_legacy(fdt, mac); ++ ++ return err; ++} ++ + int cboot_late_init(void) + { ++ const void *fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN]; ++ int err; ++ + set_calculated_env_vars(); + /* + * Ignore errors here; the value may not be used depending on + * extlinux.conf or boot script content. + */ + set_fdt_addr(); ++ + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_cboot(); ++ err = cboot_get_ethaddr(fdt, mac); ++ if (!err) ++ eth_env_set_enetaddr("ethaddr", mac); + + return 0; + } + +From patchwork Thu Mar 21 18:01:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 15/19] ARM: tegra: Enable position independent build for 64-bit +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060357 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-16-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:14 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Note that U-Boot is always chainloaded from cboot starting with L4T +release 28. cboot always loads U-Boot to a fixed address, so making +the builds position independent isn't strictly necessary. However, +position independent builds can be convenient because if U-Boot is +ever loaded to an address different from its link address, it will +still be able to boot. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 1 + + configs/e2220-1170_defconfig | 2 +- + configs/p2371-0000_defconfig | 2 +- + configs/p2371-2180_defconfig | 2 +- + configs/p2571_defconfig | 2 +- + 5 files changed, 5 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index faa73559fd42..97e22ead5985 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -87,6 +87,7 @@ config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" + select ARM64 + select LINUX_KERNEL_IMAGE_HEADER ++ select POSITION_INDEPENDENT + select TEGRA_COMMON + + if TEGRA_ARMV8_COMMON +diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig +index fbca72ace6ed..87668f8e517f 100644 +--- a/configs/e2220-1170_defconfig ++++ b/configs/e2220-1170_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_OF_SYSTEM_SETUP=y +diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig +index c25872128e07..979cb8ec0a25 100644 +--- a/configs/p2371-0000_defconfig ++++ b/configs/p2371-0000_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_0000=y + CONFIG_NR_DRAM_BANKS=2 +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index b662ef143141..2fac69917a92 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_2180=y + CONFIG_NR_DRAM_BANKS=2 +diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig +index 5f0f8c519b4c..ff4654cea9b4 100644 +--- a/configs/p2571_defconfig ++++ b/configs/p2571_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2571=y + CONFIG_NR_DRAM_BANKS=2 + +From patchwork Thu Mar 21 18:01:15 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,16/19] p2371-2180: Pass Ethernet MAC to the kernel +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060351 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-17-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:15 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pass the ethernet MAC address to the kernel upon boot. This passes both +the local-mac-address property (as passed to U-Boot from cboot) and the +currently set MAC address via the mac-address property. The latter will +only be set if it is different from the address that was already passed +via the local-mac-address property. + +Signed-off-by: Thierry Reding +--- + board/nvidia/p2371-2180/p2371-2180.c | 50 ++++++++++++++++++++++++++++ + configs/p2371-2180_defconfig | 1 + + 2 files changed, 51 insertions(+) + +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index 212037da5ac0..a444d692d7ea 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -5,9 +5,12 @@ + */ + + #include ++#include + #include ++#include + #include + #include ++#include + #include "../p2571/max77620_init.h" + #include "pinmux-config-p2371-2180.h" + +@@ -94,3 +97,50 @@ int tegra_pcie_board_init(void) + return 0; + } + #endif /* PCI */ ++ ++static void ft_mac_address_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ++ return 0; ++} +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index 2fac69917a92..16afbba68ae7 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_2180=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " + +From patchwork Thu Mar 21 18:01:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,17/19] p2771-0000: Pass Ethernet MAC to the kernel +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060356 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-18-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:16 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pass the ethernet MAC address to the kernel upon boot. This passes both +the local-mac-address property (as passed to U-Boot from cboot) and the +currently set MAC address via the mac-address property. The latter will +only be set if it is different from the address that was already passed +via the local-mac-address property. + +Signed-off-by: Thierry Reding +--- + board/nvidia/p2771-0000/p2771-0000.c | 43 ++++++++++++++++++++++++++++ + configs/p2771-0000-000_defconfig | 1 + + configs/p2771-0000-500_defconfig | 1 + + 3 files changed, 45 insertions(+) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 6f88010c18c3..fe22067f6571 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -4,7 +4,10 @@ + */ + + #include ++#include + #include ++#include ++#include + #include "../p2571/max77620_init.h" + + void pin_mux_mmc(void) +@@ -52,3 +55,43 @@ int tegra_pcie_board_init(void) + return 0; + } + #endif ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return 0; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) ++ return 0; ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++ ++ return 0; ++} +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index ad0802067e73..91896e39a10f 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y + CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index 459b67fd195f..20d4393838d6 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y + CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " + +From patchwork Thu Mar 21 18:01:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,18/19] lib: Implement strndup() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060343 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-19-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:17 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Signed-off-by: Thierry Reding +--- + include/linux/string.h | 1 + + lib/string.c | 23 +++++++++++++++++++++++ + 2 files changed, 24 insertions(+) + +diff --git a/include/linux/string.h b/include/linux/string.h +index 36066207392e..5d63be4ce5b0 100644 +--- a/include/linux/string.h ++++ b/include/linux/string.h +@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); + #ifndef __HAVE_ARCH_STRDUP + extern char * strdup(const char *); + #endif ++extern char * strndup(const char *, size_t); + #ifndef __HAVE_ARCH_STRSWAB + extern char * strswab(const char *); + #endif +diff --git a/lib/string.c b/lib/string.c +index af17c16f616d..9b779ddc3bbe 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -326,6 +326,29 @@ char * strdup(const char *s) + } + #endif + ++char * strndup(const char *s, size_t n) ++{ ++ size_t len; ++ char *new; ++ ++ if (s == NULL) ++ return NULL; ++ ++ len = strlen(s); ++ ++ if (n < len) ++ len = n; ++ ++ new = malloc(len + 1); ++ if (new == NULL) ++ return NULL; ++ ++ strncpy(new, s, len); ++ new[len] = '\0'; ++ ++ return new; ++} ++ + #ifndef __HAVE_ARCH_STRSPN + /** + * strspn - Calculate the length of the initial substring of @s which only + +From patchwork Thu Mar 21 18:01:18 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,19/19] ARM: tegra: Import cbootargs value from cboot DTB +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060349 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-20-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:18 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Read the boot arguments passed by cboot via the /chosen/bootargs +property and store it in the cbootargs environment variable. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 9735380bda59..8bfcbcdc6e6d 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#include + ++#include + #include + + #include +@@ -536,10 +538,49 @@ out: + return err; + } + ++static char *strip(const char *ptr) ++{ ++ const char *end; ++ ++ while (*ptr && isblank(*ptr)) ++ ptr++; ++ ++ /* empty string */ ++ if (*ptr == '\0') ++ return strdup(ptr); ++ ++ end = ptr; ++ ++ while (end[1]) ++ end++; ++ ++ while (isblank(*end)) ++ end--; ++ ++ return strndup(ptr, end - ptr + 1); ++} ++ ++static char *cboot_get_bootargs(const void *fdt) ++{ ++ const char *args; ++ int offset, len; ++ ++ offset = fdt_path_offset(fdt, "/chosen"); ++ if (offset < 0) ++ return NULL; ++ ++ args = fdt_getprop(fdt, offset, "bootargs", &len); ++ if (!args) ++ return NULL; ++ ++ return strip(args); ++} ++ + int cboot_late_init(void) + { + const void *fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN]; ++ char *bootargs; + int err; + + set_calculated_env_vars(); +@@ -554,5 +595,11 @@ int cboot_late_init(void) + if (!err) + eth_env_set_enetaddr("ethaddr", mac); + ++ bootargs = cboot_get_bootargs(fdt); ++ if (bootargs) { ++ env_set("cbootargs", bootargs); ++ free(bootargs); ++ } ++ + return 0; + } diff --git a/tegra-p2371-2180-Build-position-independent-binary.patch b/tegra-p2371-2180-Build-position-independent-binary.patch deleted file mode 100644 index eb9f5c5..0000000 --- a/tegra-p2371-2180-Build-position-independent-binary.patch +++ /dev/null @@ -1,37 +0,0 @@ -From patchwork Fri Mar 8 20:10:23 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] p2371-2180: Build position independent binary -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053674 -Message-Id: <20190308201023.2145-1-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Fri, 8 Mar 2019 21:10:23 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -In order to support chainloading of U-Boot by an earlier bootloader, -make sure the binary is position independent, so that the earlier boot- -loader can relocate it if necessary. - -Signed-off-by: Thierry Reding ---- - configs/p2371-2180_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index b66459e379ac..8d7cf3fb5346 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -1,6 +1,7 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_POSITION_INDEPENDENT=y - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 diff --git a/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch b/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch new file mode 100644 index 0000000..8415e8f --- /dev/null +++ b/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch @@ -0,0 +1,183 @@ +From patchwork Tue Mar 19 11:19:21 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] ti: am335x_evm: Enable CONFIG_SPL_OF_CONTROL +X-Patchwork-Submitter: Tom Rini +X-Patchwork-Id: 1058350 +X-Patchwork-Delegate: trini@ti.com +Message-Id: <1552994361-32058-1-git-send-email-trini@konsulko.com> +To: u-boot@lists.denx.de +Date: Tue, 19 Mar 2019 07:19:21 -0400 +From: Tom Rini +List-Id: U-Boot discussion + +Enable support for SPL_OF_CONTROL on this platform. That means doing a +few things: +- Add u-boot,dm-pre-reloc to a number of nodes +- Drop static platdata in the board file. +- A lot of tweaks to the defconfig. We remove some things such as + SPL_USE_ARCH_MEMCPY/SET for space. Increase our malloc len. +- Drop, for now at least, USB SPL support as it's causing a hang. + +Cc: Faiz Abbas +Cc: Lokesh Vutla +Signed-off-by: Tom Rini +--- + arch/arm/dts/am335x-evm-u-boot.dtsi | 45 +++++++++++++++++++++++++++++++++++-- + board/ti/am335x/board.c | 30 ------------------------- + configs/am335x_evm_defconfig | 14 ++++++++---- + 3 files changed, 53 insertions(+), 36 deletions(-) + +diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi +index b6b97ed16d91..16a9f855ad1f 100644 +--- a/arch/arm/dts/am335x-evm-u-boot.dtsi ++++ b/arch/arm/dts/am335x-evm-u-boot.dtsi +@@ -3,11 +3,52 @@ + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + */ + ++#include "am33xx-u-boot.dtsi" + +-&mmc3 { +- status = "disabled"; ++&l4_wkup { ++ u-boot,dm-pre-reloc; ++}; ++ ++&scm { ++ u-boot,dm-pre-reloc; ++}; ++ ++&am33xx_pinmux { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart0_pins { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0_pins { ++ u-boot,dm-pre-reloc; + }; + + &usb0 { + dr_mode = "peripheral"; + }; ++ ++&mmc1 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&mmc1_pins { ++ u-boot,dm-pre-reloc; ++}; ++ ++&mmc3 { ++ status = "disabled"; ++}; +diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c +index d67f94ad47ba..bfad1a75a456 100644 +--- a/board/ti/am335x/board.c ++++ b/board/ti/am335x/board.c +@@ -1054,33 +1054,3 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) + secure_boot_verify_image(p_image, p_size); + } + #endif +- +-#if !CONFIG_IS_ENABLED(OF_CONTROL) +-static const struct omap_hsmmc_plat am335x_mmc0_platdata = { +- .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE, +- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT, +- .cfg.f_min = 400000, +- .cfg.f_max = 52000000, +- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, +- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +-}; +- +-U_BOOT_DEVICE(am335x_mmc0) = { +- .name = "omap_hsmmc", +- .platdata = &am335x_mmc0_platdata, +-}; +- +-static const struct omap_hsmmc_plat am335x_mmc1_platdata = { +- .base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE, +- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT, +- .cfg.f_min = 400000, +- .cfg.f_max = 52000000, +- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, +- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +-}; +- +-U_BOOT_DEVICE(am335x_mmc1) = { +- .name = "omap_hsmmc", +- .platdata = &am335x_mmc1_platdata, +-}; +-#endif +diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig +index 924116835251..dd690dcb495c 100644 +--- a/configs/am335x_evm_defconfig ++++ b/configs/am335x_evm_defconfig +@@ -1,23 +1,26 @@ + CONFIG_ARM=y ++# CONFIG_SPL_USE_ARCH_MEMCPY is not set ++# CONFIG_SPL_USE_ARCH_MEMSET is not set + CONFIG_ARCH_OMAP2PLUS=y + CONFIG_TI_COMMON_CMD_OPTIONS=y ++CONFIG_SYS_MALLOC_F_LEN=0x4000 + CONFIG_AM33XX=y ++CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 + CONFIG_SPL=y + CONFIG_DISTRO_DEFAULTS=y ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 + CONFIG_SPL_LOAD_FIT=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" ++CONFIG_LOGLEVEL=3 + CONFIG_SYS_CONSOLE_INFO_QUIET=y + CONFIG_VERSION_VARIABLE=y + CONFIG_ARCH_MISC_INIT=y + # CONFIG_SPL_FS_EXT4 is not set + CONFIG_SPL_MTD_SUPPORT=y +-CONFIG_SPL_MUSB_NEW_SUPPORT=y + CONFIG_SPL_NET_SUPPORT=y + CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL" + CONFIG_SPL_OS_BOOT=y +-CONFIG_SPL_USB_GADGET=y +-CONFIG_SPL_USB_ETHER=y + CONFIG_CMD_SPL=y + CONFIG_CMD_SPL_NAND_OFS=0x00080000 + # CONFIG_CMD_FLASH is not set +@@ -28,10 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand.0" + CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)" + # CONFIG_SPL_EFI_PARTITION is not set + CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y + CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" + CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2" ++CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-# CONFIG_BLK is not set ++CONFIG_SPL_OF_TRANSLATE=y + CONFIG_BOOTCOUNT_LIMIT=y + CONFIG_DFU_MMC=y + CONFIG_DFU_NAND=y +@@ -68,5 +73,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451 + CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 + CONFIG_USB_ETHER=y + CONFIG_DYNAMIC_CRC_TABLE=y ++CONFIG_SPL_TINY_MEMSET=y + CONFIG_RSA=y + CONFIG_LZO=y diff --git a/uboot-tools.spec b/uboot-tools.spec index e05f4bd..bdb9444 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,14 +20,15 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch +Patch4: uefi-rc5-fixes.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch11: dragonboard-fixes.patch - -Patch12: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch -Patch13: tegra-p2371-2180-Build-position-independent-binary.patch -Patch14: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +Patch12: ARM-tegra-Miscellaneous-improvements.patch +Patch13: ARM-tegra-Add-support-for-framebuffer-carveouts.patch +Patch14: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +Patch15: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch BuildRequires: bc BuildRequires: dtc @@ -302,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Mar 24 2019 Peter Robinson 2019.04-0.7-rc4 +- Minor UEFI fixes, Tegra Jetson TX series rebase + * Wed Mar 20 2019 Peter Robinson 2019.04-0.6-rc4 - Tegra Jetson TX-series improvements diff --git a/uefi-rc5-fixes.patch b/uefi-rc5-fixes.patch new file mode 100644 index 0000000..fd36553 --- /dev/null +++ b/uefi-rc5-fixes.patch @@ -0,0 +1,245 @@ +From 306b16718edddd660b84bf3c6627ce5d41b53ce7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Mon, 18 Mar 2019 20:01:59 +0100 +Subject: [PATCH 01/25] efi_loader: correct parameter size in efi_allocate_pool + +efi_allocate_pages() expects a (uint64_t *) pointer to pass the address of +the assigned memory. If we pass the address of a pointer here, an illegal +memory access occurs on 32bit systems. + +Fixes: 282a06cbcae8 ("efi_loader: Expose U-Boot addresses in memory map +for sandbox") +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_memory.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c +index ebd2b36c03..55622d2fb4 100644 +--- a/lib/efi_loader/efi_memory.c ++++ b/lib/efi_loader/efi_memory.c +@@ -440,6 +440,7 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages) + efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) + { + efi_status_t r; ++ u64 addr; + struct efi_pool_allocation *alloc; + u64 num_pages = efi_size_in_pages(size + + sizeof(struct efi_pool_allocation)); +@@ -453,9 +454,9 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) + } + + r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages, +- (uint64_t *)&alloc); +- ++ &addr); + if (r == EFI_SUCCESS) { ++ alloc = (struct efi_pool_allocation *)(uintptr_t)addr; + alloc->num_pages = num_pages; + *buffer = alloc->data; + } +-- +2.20.1 + +From bd3b7478d1e17b4d487d276f5cc0e4f4ef9fc4b7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 12:30:27 +0100 +Subject: [PATCH 02/25] efi_loader: endless loop in add_strings_package() + +Avoid an endless loop in add_strings_package(). + +Suggested-by: Takahiro Akashi +Reported-by: Coverity (CID 185833) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_hii.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/lib/efi_loader/efi_hii.c b/lib/efi_loader/efi_hii.c +index 3a966fa4df..61b71dec62 100644 +--- a/lib/efi_loader/efi_hii.c ++++ b/lib/efi_loader/efi_hii.c +@@ -227,9 +227,8 @@ out: + error: + if (stbl) { + free(stbl->language); +- if (idx > 0) +- while (--idx >= 0) +- free(stbl->strings[idx].string); ++ while (idx > 0) ++ free(stbl->strings[--idx].string); + free(stbl->strings); + } + free(stbl); +-- +2.20.1 + +From e7dae584b05feaf507c5b85a704a2c1d25abffc9 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:36:21 +0100 +Subject: [PATCH 03/25] efi_loader: missing return in + efi_get_next_variable_name() + +Add a missing return statement in efi_get_next_variable_name(). + +Reported-by: Coverity (CID 185834) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_variable.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c +index e0d7f5736d..699f4184d9 100644 +--- a/lib/efi_loader/efi_variable.c ++++ b/lib/efi_loader/efi_variable.c +@@ -335,7 +335,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, + EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); + + if (!variable_name_size || !variable_name || !vendor) +- EFI_EXIT(EFI_INVALID_PARAMETER); ++ return EFI_EXIT(EFI_INVALID_PARAMETER); + + if (variable_name[0]) { + /* check null-terminated string */ +-- +2.20.1 + +From 1fd7a4764103781e424ef687034da06de3cb60b7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:44:05 +0100 +Subject: [PATCH 04/25] efi_loader: memory leak in efi_dump_single_var() + +A misplaced return statement lead to a memory leak in +efi_dump_single_var(). + +Reported-by: Coverity (CID 185829) +Signed-off-by: Heinrich Schuchardt +--- + cmd/nvedit_efi.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c +index ca32566a61..e65b38dbf3 100644 +--- a/cmd/nvedit_efi.c ++++ b/cmd/nvedit_efi.c +@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid) + printf(", DataSize = 0x%zx\n", size); + print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true); + +- return; + out: + free(data); + } +-- +2.20.1 + +From d5974af7f7626777b5c41894f75c813ff35c1793 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:58:58 +0100 +Subject: [PATCH 05/25] efi_loader: remove superfluous check in + efi_setup_loaded_image() + +It does not make any sense to check if a pointer is NULL if we have +dereferenced it before. + +Reported-by: Coverity (CID 185827) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_boottime.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c +index bd8b8a17ae..4fc550d9f3 100644 +--- a/lib/efi_loader/efi_boottime.c ++++ b/lib/efi_loader/efi_boottime.c +@@ -1581,10 +1581,8 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path, + goto failure; + #endif + +- if (info_ptr) +- *info_ptr = info; +- if (handle_ptr) +- *handle_ptr = obj; ++ *info_ptr = info; ++ *handle_ptr = obj; + + return ret; + failure: +-- +2.20.1 + +From 1646e0928c8eb052bfa2283a6ab8d9f2a92a10e9 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 19:16:23 +0100 +Subject: [PATCH 06/25] efi_loader: superfluous conversion in efi_file_open() + +printf("%ls", ..) expects u16 * as argument to print. There is not need for +a conversion to wchar_t *. + +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_file.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c +index 3a7323765b..bc715218a1 100644 +--- a/lib/efi_loader/efi_file.c ++++ b/lib/efi_loader/efi_file.c +@@ -226,7 +226,7 @@ static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file, + efi_status_t ret; + + EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, +- (wchar_t *)file_name, open_mode, attributes); ++ file_name, open_mode, attributes); + + /* Check parameters */ + if (!file || !new_handle || !file_name) { +-- +2.20.1 + +From d0bd87612f410a723d5ddb3001e805485e3efb4f Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 20:08:46 +0100 +Subject: [PATCH 07/25] efi_selftest: fix test_hii_string_get_string() + +The check testing the string result of get_string() returned the wrong +result. The result was ignored. + +Use efi_st_strcmp_16_8() for the string comparison. + +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_selftest/efi_selftest_hii.c | 17 ++++------------- + 1 file changed, 4 insertions(+), 13 deletions(-) + +diff --git a/lib/efi_selftest/efi_selftest_hii.c b/lib/efi_selftest/efi_selftest_hii.c +index 8a0b3bc353..f4b70f7950 100644 +--- a/lib/efi_selftest/efi_selftest_hii.c ++++ b/lib/efi_selftest/efi_selftest_hii.c +@@ -783,19 +783,10 @@ static int test_hii_string_get_string(void) + goto out; + } + +-#if 1 +- u16 *c1, *c2; +- +- for (c1 = string, c2 = L"Japanese"; *c1 == *c2; c1++, c2++) +- ; +- if (!*c1 && !*c2) +- result = EFI_ST_SUCCESS; +- else +- result = EFI_ST_FAILURE; +-#else +- /* TODO: %ls */ +- efi_st_printf("got string is %s (can be wrong)\n", string); +-#endif ++ if (efi_st_strcmp_16_8(string, "Japanese")) { ++ efi_st_error("get_string returned incorrect string\n"); ++ goto out; ++ } + + result = EFI_ST_SUCCESS; + +-- +2.20.1 + From 5a26b77b90e1e8bbedaa6dcd2c6f595cf0880680 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 30 Mar 2019 01:09:06 +0000 Subject: [PATCH 022/351] Add config file check to see if we create kernel DT sym link to enable use of firmware DT --- 10-devicetree.install | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/10-devicetree.install b/10-devicetree.install index 752e5d0..3345391 100755 --- a/10-devicetree.install +++ b/10-devicetree.install @@ -9,6 +9,18 @@ KERNEL_VERSION="$2" #BOOT_DIR_ABS="$3" #KERNEL_IMAGE="$4" +[ -f /etc/u-boot.conf ] && source /etc/u-boot.conf || true +[ -z "$FIRMWAREDT" ] || FirmwareDT=$FIRMWAREDT + +if [[ $FirmwareDT == "True" ]] +then + # if we want to use firmware DT we remove symlink to current kernel DT + if [ -h /boot/dtb ]; then + rm -f /boot/dtb + fi + exit 0 +fi + # Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that # u-boot can find the correct dtb to load. # From bd4cc382b4484bc11c7d949cd981e12a690c6726 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 31 Mar 2019 12:45:47 +0100 Subject: [PATCH 023/351] Add ability to make creation of boot/dtb symlink configurable --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index bdb9444..d16be4f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -303,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Mar 31 2019 Peter Robinson 2019.04-0.8-rc4 +- Add ability to make creation of boot/dtb symlink configurable + * Sun Mar 24 2019 Peter Robinson 2019.04-0.7-rc4 - Minor UEFI fixes, Tegra Jetson TX series rebase From 7f3f828546447c73e816f11b1edc092301e2d2fb Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 5 Apr 2019 06:41:33 +0100 Subject: [PATCH 024/351] Latest Tegra patch revision --- ARM-tegra-Miscellaneous-improvements.patch | 353 ++++++++++++--------- uboot-tools.spec | 5 +- 2 files changed, 200 insertions(+), 158 deletions(-) diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch index 61790a1..f65ecd8 100644 --- a/ARM-tegra-Miscellaneous-improvements.patch +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -1,15 +1,16 @@ -From patchwork Thu Mar 21 18:01:00 2019 +From patchwork Thu Apr 4 11:59:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,01/19] ARM: tegra: Use common header for PMU declarations +Subject: [U-Boot,v4,01/19] ARM: tegra: Use common header for PMU declarations X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060337 +X-Patchwork-Id: 1077183 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:00 +0100 +Message-Id: <20190404115942.17947-2-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:24 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -166,18 +167,19 @@ index 6697909d9a3e..66628933b653 100644 DECLARE_GLOBAL_DATA_PTR; -From patchwork Thu Mar 21 18:01:01 2019 +From patchwork Thu Apr 4 11:59:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +Subject: [U-Boot,v4,02/19] ARM: tegra: Guard clock code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060347 +X-Patchwork-Id: 1077185 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:01 +0100 +Message-Id: <20190404115942.17947-3-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:25 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -307,19 +309,20 @@ index b8d5ef0322cb..b94077221f77 100644 pinmux_init(); board_init_uart_f(); -From patchwork Thu Mar 21 18:01:02 2019 +From patchwork Thu Apr 4 11:59:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060338 +X-Patchwork-Id: 1077187 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:02 +0100 +Message-Id: <20190404115942.17947-4-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:26 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -397,19 +400,20 @@ index be414e4e4aca..d7063490e222 100644 #ifndef CONFIG_ARM64 void config_cache(void) -From patchwork Thu Mar 21 18:01:03 2019 +From patchwork Thu Apr 4 11:59:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060339 +X-Patchwork-Id: 1077188 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:03 +0100 +Message-Id: <20190404115942.17947-5-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:27 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -497,19 +501,20 @@ index ecd5001de4c5..7ef5a67edd1f 100644 } -From patchwork Thu Mar 21 18:01:04 2019 +From patchwork Thu Apr 4 11:59:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060345 +X-Patchwork-Id: 1077207 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:04 +0100 +Message-Id: <20190404115942.17947-6-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:28 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -631,19 +636,20 @@ index b94077221f77..ce1c9346959d 100644 #ifdef CONFIG_TEGRA_CLOCK_SCALING #include -From patchwork Thu Mar 21 18:01:05 2019 +From patchwork Thu Apr 4 11:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060355 +X-Patchwork-Id: 1077193 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:05 +0100 +Message-Id: <20190404115942.17947-7-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:29 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -706,18 +712,19 @@ index 395e0191a458..517be21ee5f5 100644 endif -From patchwork Thu Mar 21 18:01:06 2019 +From patchwork Thu Apr 4 11:59:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,07/19] ARM: tegra: Fix save_boot_params() prototype +Subject: [U-Boot,v4,07/19] ARM: tegra: Fix save_boot_params() prototype X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060346 +X-Patchwork-Id: 1077195 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:06 +0100 +Message-Id: <20190404115942.17947-8-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:30 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -751,19 +758,20 @@ index b65bdde5a78d..59d2f347485d 100644 from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; save_boot_params_ret(); -From patchwork Thu Mar 21 18:01:07 2019 +From patchwork Thu Apr 4 11:59:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 08/19] ARM: tegra: Allow boards to override boot target devices X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060348 +X-Patchwork-Id: 1077192 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:07 +0100 +Message-Id: <20190404115942.17947-9-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:31 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -798,18 +806,19 @@ index e54428ba43e2..9685ee5059ab 100644 #else #define BOOTENV -From patchwork Thu Mar 21 18:01:08 2019 +From patchwork Thu Apr 4 11:59:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,09/19] ARM: tegra: Support TZ-only access to PMC +Subject: [U-Boot,v4,09/19] ARM: tegra: Support TZ-only access to PMC X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060350 +X-Patchwork-Id: 1077197 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:08 +0100 +Message-Id: <20190404115942.17947-10-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:32 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1257,19 +1266,20 @@ index e45f0961b242..761c9ef19e3b 100644 return 0; } -From patchwork Thu Mar 21 18:01:09 2019 +From patchwork Thu Apr 4 11:59:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 10/19] ARM: tegra: Workaround UDC boot issues only if necessary X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060352 +X-Patchwork-Id: 1077191 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:09 +0100 +Message-Id: <20190404115942.17947-11-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:33 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1300,18 +1310,19 @@ index 28914a34a1b5..faa73559fd42 100644 help When loading U-Boot into RAM over USB protocols using tools such as -From patchwork Thu Mar 21 18:01:10 2019 +From patchwork Thu Apr 4 11:59:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,11/19] ARM: tegra: Restore DRAM bank count +Subject: [U-Boot,v4,11/19] ARM: tegra: Restore DRAM bank count X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060341 +X-Patchwork-Id: 1077194 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:10 +0100 +Message-Id: <20190404115942.17947-12-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:34 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1362,18 +1373,19 @@ index df4d914d85cf..459b67fd195f 100644 CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y -From patchwork Thu Mar 21 18:01:11 2019 +From patchwork Thu Apr 4 11:59:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,12/19] ARM: tegra: Unify Tegra186 builds +Subject: [U-Boot,v4,12/19] ARM: tegra: Unify Tegra186 builds X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060344 +X-Patchwork-Id: 1077204 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:11 +0100 +Message-Id: <20190404115942.17947-13-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:35 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1397,6 +1409,9 @@ this to avoid confusion. The implemented protocols are unchanged. Signed-off-by: Thierry Reding --- +Changes in v4: +- consistently use /chosen/nvidia,ether-mac property + Changes in v3: - load cboot DTB address to fdt_addr instead of fdtaddr @@ -1634,7 +1649,7 @@ diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/ similarity index 56% rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c rename to arch/arm/mach-tegra/cboot.c -index 83c0e931ea24..95a097584ac6 100644 +index 83c0e931ea24..3ebf7b055553 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c +++ b/arch/arm/mach-tegra/cboot.c @@ -3,14 +3,182 @@ @@ -1863,7 +1878,7 @@ index 83c0e931ea24..95a097584ac6 100644 /* - * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's -+ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's ++ * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ -static int set_ethaddr_from_nvtboot(void) @@ -1886,7 +1901,7 @@ index 83c0e931ea24..95a097584ac6 100644 return node; } - prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); -+ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); ++ prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); if (!prop) { - printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); + printf("Can't find nvidia,ether-mac property in cboot DTB\n"); @@ -2183,19 +2198,20 @@ index 496e8a02111e..6f88010c18c3 100644 } +#endif -From patchwork Thu Mar 21 18:01:12 2019 +From patchwork Thu Apr 4 11:59:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 13/19] ARM: tegra: Implement cboot_save_boot_params() in C X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060342 +X-Patchwork-Id: 1077211 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:12 +0100 +Message-Id: <20190404115942.17947-14-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:36 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2226,7 +2242,7 @@ index 41ba674edff4..7165d70a60da 100644 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o obj-$(CONFIG_TEGRA_GPU) += gpu.o diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 95a097584ac6..acf33b4c4e0c 100644 +index 3ebf7b055553..a302ca45f39b 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); @@ -2275,18 +2291,19 @@ index 4c9ddacc2b39..000000000000 - b save_boot_params_ret -ENDPROC(cboot_save_boot_params) -From patchwork Thu Mar 21 18:01:13 2019 +From patchwork Thu Apr 4 11:59:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,14/19] ARM: tegra: Implement cboot_get_ethaddr() +Subject: [U-Boot,v4,14/19] ARM: tegra: Implement cboot_get_ethaddr() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060340 +X-Patchwork-Id: 1077213 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:13 +0100 +Message-Id: <20190404115942.17947-15-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:37 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2300,16 +2317,21 @@ alias) and if found, reads the "local-mac-address" property. If the that doesn't exist, or if the device tree node that it points to does not have a "local-mac-address" property or if the value is invalid, it will fall back to the legacy mechanism of looking for the MAC address -stored in the "nvidia,ethernet-mac" property of the "/chosen" node. +stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of +the "/chosen" node. Signed-off-by: Thierry Reding --- +Changes in v4: +- also check the /chosen/nvidia,ethernet-mac property for compatibility + with Tegra210 + Changes in v2: - make dummy static inline to avoid duplicate definitions arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- - 2 files changed, 69 insertions(+), 15 deletions(-) + arch/arm/mach-tegra/cboot.c | 92 ++++++++++++++++++++----- + 2 files changed, 81 insertions(+), 17 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index b3441ec178b3..021c24617575 100644 @@ -2336,7 +2358,7 @@ index b3441ec178b3..021c24617575 100644 #endif diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index acf33b4c4e0c..9735380bda59 100644 +index a302ca45f39b..6c6d06d89a5d 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -4,6 +4,7 @@ @@ -2347,8 +2369,8 @@ index acf33b4c4e0c..9735380bda59 100644 #include #include #include -@@ -465,46 +466,93 @@ static int set_fdt_addr(void) - * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's +@@ -465,46 +466,103 @@ static int set_fdt_addr(void) + * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ -static int set_ethaddr_from_cboot(void) @@ -2361,20 +2383,32 @@ index acf33b4c4e0c..9735380bda59 100644 - /* Already a valid address in the environment? If so, keep it */ - if (env_get("ethaddr")) - return 0; -+ const char *prop; -+ int node, len; - +- - node = fdt_path_offset(cboot_blob, "/chosen"); ++ const char *const properties[] = { ++ "nvidia,ethernet-mac", ++ "nvidia,ether-mac", ++ }; ++ const char *prop; ++ unsigned int i; ++ int node, len; ++ + node = fdt_path_offset(fdt, "/chosen"); if (node < 0) { printf("Can't find /chosen node in cboot DTB\n"); return node; } -- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); +- prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); ++ ++ for (i = 0; i < ARRAY_SIZE(properties); i++) { ++ prop = fdt_getprop(fdt, node, properties[i], &len); ++ if (prop) ++ break; ++ } + -+ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); if (!prop) { - printf("Can't find nvidia,ether-mac property in cboot DTB\n"); +- printf("Can't find nvidia,ether-mac property in cboot DTB\n"); ++ printf("Can't find Ethernet MAC address in cboot DTB\n"); return -ENOENT; } @@ -2457,19 +2491,20 @@ index acf33b4c4e0c..9735380bda59 100644 return 0; } -From patchwork Thu Mar 21 18:01:14 2019 +From patchwork Thu Apr 4 11:59:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 15/19] ARM: tegra: Enable position independent build for 64-bit X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060357 +X-Patchwork-Id: 1077212 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:14 +0100 +Message-Id: <20190404115942.17947-16-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:38 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2504,7 +2539,7 @@ index faa73559fd42..97e22ead5985 100644 if TEGRA_ARMV8_COMMON diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig -index fbca72ace6ed..87668f8e517f 100644 +index af3f80edb117..baabb0ccf8cc 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -1,6 +1,6 @@ @@ -2516,7 +2551,7 @@ index fbca72ace6ed..87668f8e517f 100644 CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig -index c25872128e07..979cb8ec0a25 100644 +index 6b564366a825..aa8b73a2ba08 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -1,6 +1,6 @@ @@ -2528,7 +2563,7 @@ index c25872128e07..979cb8ec0a25 100644 CONFIG_TARGET_P2371_0000=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index b662ef143141..2fac69917a92 100644 +index a790cd83b82d..4923d330de6c 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,6 +1,6 @@ @@ -2540,7 +2575,7 @@ index b662ef143141..2fac69917a92 100644 CONFIG_TARGET_P2371_2180=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig -index 5f0f8c519b4c..ff4654cea9b4 100644 +index e48e0a1a14ec..8e9c45690dce 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -1,6 +1,6 @@ @@ -2552,18 +2587,19 @@ index 5f0f8c519b4c..ff4654cea9b4 100644 CONFIG_TARGET_P2571=y CONFIG_NR_DRAM_BANKS=2 -From patchwork Thu Mar 21 18:01:15 2019 +From patchwork Thu Apr 4 11:59:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,16/19] p2371-2180: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v4,16/19] p2371-2180: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060351 +X-Patchwork-Id: 1077196 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-17-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:15 +0100 +Message-Id: <20190404115942.17947-17-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:39 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2650,7 +2686,7 @@ index 212037da5ac0..a444d692d7ea 100644 + return 0; +} diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index 2fac69917a92..16afbba68ae7 100644 +index 4923d330de6c..0ee4913a0469 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -5,6 +5,7 @@ CONFIG_TEGRA210=y @@ -2662,18 +2698,19 @@ index 2fac69917a92..16afbba68ae7 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " -From patchwork Thu Mar 21 18:01:16 2019 +From patchwork Thu Apr 4 11:59:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,17/19] p2771-0000: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v4,17/19] p2771-0000: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060356 +X-Patchwork-Id: 1077208 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-18-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:16 +0100 +Message-Id: <20190404115942.17947-18-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:40 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2776,18 +2813,19 @@ index 459b67fd195f..20d4393838d6 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " -From patchwork Thu Mar 21 18:01:17 2019 +From patchwork Thu Apr 4 11:59:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,18/19] lib: Implement strndup() +Subject: [U-Boot,v4,18/19] lib: Implement strndup() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060343 +X-Patchwork-Id: 1077221 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-19-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:17 +0100 +Message-Id: <20190404115942.17947-19-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:41 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2846,18 +2884,19 @@ index af17c16f616d..9b779ddc3bbe 100644 /** * strspn - Calculate the length of the initial substring of @s which only -From patchwork Thu Mar 21 18:01:18 2019 +From patchwork Thu Apr 4 11:59:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,19/19] ARM: tegra: Import cbootargs value from cboot DTB +Subject: [U-Boot,v4,19/19] ARM: tegra: Import cbootargs value from cboot DTB X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060349 +X-Patchwork-Id: 1077205 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-20-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:18 +0100 +Message-Id: <20190404115942.17947-20-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:42 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2872,7 +2911,7 @@ Signed-off-by: Thierry Reding 1 file changed, 47 insertions(+) diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 9735380bda59..8bfcbcdc6e6d 100644 +index 6c6d06d89a5d..3f42ffeb73c0 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -8,7 +8,9 @@ @@ -2885,7 +2924,7 @@ index 9735380bda59..8bfcbcdc6e6d 100644 #include #include -@@ -536,10 +538,49 @@ out: +@@ -546,10 +548,49 @@ out: return err; } @@ -2935,7 +2974,7 @@ index 9735380bda59..8bfcbcdc6e6d 100644 int err; set_calculated_env_vars(); -@@ -554,5 +595,11 @@ int cboot_late_init(void) +@@ -564,5 +605,11 @@ int cboot_late_init(void) if (!err) eth_env_set_enetaddr("ethaddr", mac); diff --git a/uboot-tools.spec b/uboot-tools.spec index d16be4f..688536a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 0.9%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -303,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Apr 4 2019 Peter Robinson 2019.04-0.9-rc4 +- Latest Tegra patch revision + * Sun Mar 31 2019 Peter Robinson 2019.04-0.8-rc4 - Add ability to make creation of boot/dtb symlink configurable From 178f1bba0fcc45cba879b274419c19e8cb6f39f5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 18 Apr 2019 15:53:13 +0100 Subject: [PATCH 025/351] 2019.04, Fixes for AllWinner and NVIDIA Jetson devices --- ...IA-Jetson-Nano-Developer-Kit-support.patch | 777 ------ ...dd-support-for-framebuffer-carveouts.patch | 761 +++--- ARM-tegra-Miscellaneous-improvements.patch | 2237 ++++++++++++++--- ...egra-defaine-fdtfile-for-all-devices.patch | 162 ++ ...-MAC-address-to-hardware-after-probe.patch | 224 +- ...69-Implement---hwaddr_write-callback.patch | 102 + sources | 2 +- uboot-tools.spec | 22 +- ...m-runtime-data-to-boot-services-data.patch | 54 + ...lculation-overflow-on-32-bit-systems.patch | 46 + uefi-rc5-fixes.patch | 245 -- 11 files changed, 2757 insertions(+), 1875 deletions(-) delete mode 100644 ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch create mode 100644 arm-tegra-defaine-fdtfile-for-all-devices.patch create mode 100644 net-rtl8169-Implement---hwaddr_write-callback.patch create mode 100644 uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch create mode 100644 uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch delete mode 100644 uefi-rc5-fixes.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch deleted file mode 100644 index 70bb946..0000000 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +++ /dev/null @@ -1,777 +0,0 @@ -From patchwork Mon Mar 18 23:24:22 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 15/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058155 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:22 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The Jetson Nano Developer Kit is a Tegra X1 based development board. It -is similar to Jetson TX1 but it is not pin compatible. It features 4 GB -of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot -used for storage. - -HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 -and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI -Ethernet controller provides onboard network connectivity. - -A 40-pin header on the board can be used to extend the capabilities and -exposed interfaces of the Jetson Nano. - -Signed-off-by: Thierry Reding ---- - arch/arm/dts/tegra210-p3450-0000.dts | 130 +++++++++ - arch/arm/mach-tegra/tegra210/Kconfig | 7 + - board/nvidia/p3450-0000/Kconfig | 12 + - board/nvidia/p3450-0000/MAINTAINERS | 6 + - board/nvidia/p3450-0000/Makefile | 8 + - board/nvidia/p3450-0000/p3450-0000.c | 143 ++++++++++ - .../p3450-0000/pinmux-config-p3450-0000.h | 257 ++++++++++++++++++ - configs/p3450-0000_defconfig | 54 ++++ - include/configs/p3450-0000.h | 44 +++ - 9 files changed, 661 insertions(+) - create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts - create mode 100644 board/nvidia/p3450-0000/Kconfig - create mode 100644 board/nvidia/p3450-0000/MAINTAINERS - create mode 100644 board/nvidia/p3450-0000/Makefile - create mode 100644 board/nvidia/p3450-0000/p3450-0000.c - create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h - create mode 100644 configs/p3450-0000_defconfig - create mode 100644 include/configs/p3450-0000.h - -diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts -new file mode 100644 -index 000000000000..a2119165e2f6 ---- /dev/null -+++ b/arch/arm/dts/tegra210-p3450-0000.dts -@@ -0,0 +1,130 @@ -+/dts-v1/; -+ -+#include "tegra210.dtsi" -+ -+/ { -+ model = "NVIDIA Jetson Nano Development Kit"; -+ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; -+ -+ chosen { -+ stdout-path = &uarta; -+ }; -+ -+ aliases { -+ i2c0 = "/i2c@7000d000"; -+ i2c2 = "/i2c@7000c400"; -+ i2c3 = "/i2c@7000c500"; -+ i2c4 = "/i2c@7000c700"; -+ sdhci0 = "/sdhci@700b0600"; -+ sdhci1 = "/sdhci@700b0000"; -+ spi0 = "/spi@70410000"; -+ usb0 = "/usb@7d000000"; -+ }; -+ -+ memory { -+ reg = <0x0 0x80000000 0x0 0xc0000000>; -+ }; -+ -+ pcie-controller@01003000 { -+ status = "okay"; -+ -+ pci@1,0 { -+ status = "okay"; -+ }; -+ -+ pci@2,0 { -+ status = "okay"; -+ }; -+ }; -+ -+ serial@70006000 { -+ status = "okay"; -+ }; -+ -+ padctl@7009f000 { -+ pinctrl-0 = <&padctl_default>; -+ pinctrl-names = "default"; -+ -+ padctl_default: pinmux { -+ xusb { -+ nvidia,lanes = "otg-1", "otg-2"; -+ nvidia,function = "xusb"; -+ nvidia,iddq = <0>; -+ }; -+ -+ usb3 { -+ nvidia,lanes = "pcie-5", "pcie-6"; -+ nvidia,function = "usb3"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x1 { -+ nvidia,lanes = "pcie-0"; -+ nvidia,function = "pcie-x1"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x4 { -+ nvidia,lanes = "pcie-1", "pcie-2", -+ "pcie-3", "pcie-4"; -+ nvidia,function = "pcie-x4"; -+ nvidia,iddq = <0>; -+ }; -+ -+ sata { -+ nvidia,lanes = "sata-0"; -+ nvidia,function = "sata"; -+ nvidia,iddq = <0>; -+ }; -+ }; -+ }; -+ -+ sdhci@700b0000 { -+ status = "okay"; -+ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; -+ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ }; -+ -+ i2c@7000c400 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c500 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c700 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000d000 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ spi@70410000 { -+ status = "okay"; -+ }; -+ -+ usb@7d000000 { -+ status = "okay"; -+ dr_mode = "peripheral"; -+ }; -+ -+ clocks { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ clk32k_in: clock@0 { -+ compatible = "fixed-clock"; -+ reg = <0>; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig -index 250738aed312..60dde5435940 100644 ---- a/arch/arm/mach-tegra/tegra210/Kconfig -+++ b/arch/arm/mach-tegra/tegra210/Kconfig -@@ -35,6 +35,12 @@ config TARGET_P2571 - help - P2571 is a P2530 married to a P1963 I/O board - -+config TARGET_P3450_0000 -+ bool "NVIDIA Jetson Nano Development Kit" -+ select BOARD_LATE_INIT -+ help -+ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. -+ - endchoice - - config SYS_SOC -@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" - source "board/nvidia/p2371-0000/Kconfig" - source "board/nvidia/p2371-2180/Kconfig" - source "board/nvidia/p2571/Kconfig" -+source "board/nvidia/p3450-0000/Kconfig" - - endif -diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig -new file mode 100644 -index 000000000000..7a08cd88675f ---- /dev/null -+++ b/board/nvidia/p3450-0000/Kconfig -@@ -0,0 +1,12 @@ -+if TARGET_P3450_0000 -+ -+config SYS_BOARD -+ default "p3450-0000" -+ -+config SYS_VENDOR -+ default "nvidia" -+ -+config SYS_CONFIG_NAME -+ default "p3450-0000" -+ -+endif -diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS -new file mode 100644 -index 000000000000..40700066bf39 ---- /dev/null -+++ b/board/nvidia/p3450-0000/MAINTAINERS -@@ -0,0 +1,6 @@ -+P3450-0000 BOARD -+M: Tom Warren -+S: Maintained -+F: board/nvidia/p3450-0000/ -+F: include/configs/p3450-0000.h -+F: configs/p3450-0000_defconfig -diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile -new file mode 100644 -index 000000000000..993c506d8200 ---- /dev/null -+++ b/board/nvidia/p3450-0000/Makefile -@@ -0,0 +1,8 @@ -+# -+# (C) Copyright 2018 -+# NVIDIA Corporation -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += p3450-0000.o -diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c -new file mode 100644 -index 000000000000..fc13185c36b6 ---- /dev/null -+++ b/board/nvidia/p3450-0000/p3450-0000.c -@@ -0,0 +1,143 @@ -+/* -+ * (C) Copyright 2018 -+ * NVIDIA Corporation -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../p2571/max77620_init.h" -+#include "pinmux-config-p3450-0000.h" -+ -+void pin_mux_mmc(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ -+ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return; -+ } -+ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xF2; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -+ -+ /* Disable LDO4 discharge */ -+ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) { -+ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); -+ } else { -+ val &= ~BIT(1); /* ADE */ -+ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); -+ } -+ -+ /* Set MBLPD */ -+ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) { -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } else { -+ val |= BIT(6); /* MBLPD */ -+ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } -+} -+ -+/* -+ * Routine: pinmux_init -+ * Description: Do individual peripheral pinmux configs -+ */ -+void pinmux_init(void) -+{ -+ pinmux_clear_tristate_input_clamping(); -+ -+ gpio_config_table(p3450_0000_gpio_inits, -+ ARRAY_SIZE(p3450_0000_gpio_inits)); -+ -+ pinmux_config_pingrp_table(p3450_0000_pingrps, -+ ARRAY_SIZE(p3450_0000_pingrps)); -+ -+ pinmux_config_drvgrp_table(p3450_0000_drvgrps, -+ ARRAY_SIZE(p3450_0000_drvgrps)); -+} -+ -+#ifdef CONFIG_PCI_TEGRA -+int tegra_pcie_board_init(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ -+ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return -1; -+ } -+ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xCA; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); -+ -+ return 0; -+} -+#endif /* PCI */ -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return 0; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) -+ return 0; -+ -+ debug("PCI ethernet device tree node found\n"); -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+ -+ return 0; -+} -diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -new file mode 100644 -index 000000000000..d491bffccd72 ---- /dev/null -+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -@@ -0,0 +1,257 @@ -+/* -+ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+/* -+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -+ * -+ * To generate this file, use the tegra-pinmux-scripts tool available from -+ * https://github.com/NVIDIA/tegra-pinmux-scripts -+ * Run "board-to-uboot.py p3450-0000". -+ */ -+ -+#ifndef _PINMUX_CONFIG_P3450_0000_H_ -+#define _PINMUX_CONFIG_P3450_0000_H_ -+ -+#define GPIO_INIT(_port, _gpio, _init) \ -+ { \ -+ .gpio = TEGRA_GPIO(_port, _gpio), \ -+ .init = TEGRA_GPIO_INIT_##_init, \ -+ } -+ -+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { -+ /* port, pin, init_val */ -+ GPIO_INIT(A, 5, IN), -+ GPIO_INIT(A, 6, OUT0), -+ GPIO_INIT(B, 4, IN), -+ GPIO_INIT(B, 5, IN), -+ GPIO_INIT(B, 6, IN), -+ GPIO_INIT(B, 7, IN), -+ GPIO_INIT(C, 0, IN), -+ GPIO_INIT(C, 1, IN), -+ GPIO_INIT(C, 2, IN), -+ GPIO_INIT(C, 3, IN), -+ GPIO_INIT(C, 4, IN), -+ GPIO_INIT(E, 6, IN), -+ GPIO_INIT(G, 2, IN), -+ GPIO_INIT(G, 3, IN), -+ GPIO_INIT(H, 0, OUT0), -+ GPIO_INIT(H, 2, IN), -+ GPIO_INIT(H, 3, OUT0), -+ GPIO_INIT(H, 4, OUT0), -+ GPIO_INIT(H, 5, IN), -+ GPIO_INIT(H, 6, IN), -+ GPIO_INIT(H, 7, OUT0), -+ GPIO_INIT(I, 0, OUT0), -+ GPIO_INIT(I, 1, IN), -+ GPIO_INIT(I, 2, OUT0), -+ GPIO_INIT(J, 4, IN), -+ GPIO_INIT(J, 5, IN), -+ GPIO_INIT(J, 6, IN), -+ GPIO_INIT(J, 7, IN), -+ GPIO_INIT(S, 5, IN), -+ GPIO_INIT(S, 7, OUT0), -+ GPIO_INIT(T, 0, OUT0), -+ GPIO_INIT(V, 0, IN), -+ GPIO_INIT(V, 1, IN), -+ GPIO_INIT(X, 3, OUT1), -+ GPIO_INIT(X, 4, IN), -+ GPIO_INIT(X, 5, IN), -+ GPIO_INIT(X, 6, IN), -+ GPIO_INIT(Y, 1, IN), -+ GPIO_INIT(Y, 2, IN), -+ GPIO_INIT(Z, 0, IN), -+ GPIO_INIT(Z, 2, IN), -+ GPIO_INIT(Z, 3, OUT0), -+ GPIO_INIT(BB, 0, IN), -+ GPIO_INIT(CC, 4, IN), -+ GPIO_INIT(DD, 0, IN), -+}; -+ -+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -+ { \ -+ .pingrp = PMUX_PINGRP_##_pingrp, \ -+ .func = PMUX_FUNC_##_mux, \ -+ .pull = PMUX_PULL_##_pull, \ -+ .tristate = PMUX_TRI_##_tri, \ -+ .io = PMUX_PIN_##_io, \ -+ .od = PMUX_PIN_OD_##_od, \ -+ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -+ .lock = PMUX_PIN_LOCK_DEFAULT, \ -+ } -+ -+static const struct pmux_pingrp_config p3450_0000_pingrps[] = { -+ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -+ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+}; -+ -+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -+ { \ -+ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -+ .slwf = _slwf, \ -+ .slwr = _slwr, \ -+ .drvup = _drvup, \ -+ .drvdn = _drvdn, \ -+ .lpmd = PMUX_LPMD_##_lpmd, \ -+ .schmt = PMUX_SCHMT_##_schmt, \ -+ .hsm = PMUX_HSM_##_hsm, \ -+ } -+ -+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { -+}; -+ -+#endif /* PINMUX_CONFIG_P3450_0000_H */ -diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig -new file mode 100644 -index 000000000000..32c2b65a2979 ---- /dev/null -+++ b/configs/p3450-0000_defconfig -@@ -0,0 +1,54 @@ -+CONFIG_ARM=y -+CONFIG_TEGRA=y -+CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_POSITION_INDEPENDENT=y -+CONFIG_TEGRA210=y -+CONFIG_TARGET_P3450_0000=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_CONSOLE_MUX=y -+CONFIG_SYS_STDIO_DEREGISTER=y -+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_DFU=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+# CONFIG_CMD_NFS is not set -+CONFIG_CMD_EXT4_WRITE=y -+CONFIG_OF_LIVE=y -+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" -+CONFIG_DFU_MMC=y -+CONFIG_DFU_RAM=y -+CONFIG_DFU_SF=y -+CONFIG_SYS_I2C_TEGRA=y -+CONFIG_SPI_FLASH=y -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_RTL8169=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_DM_PCI_COMPAT=y -+CONFIG_PCI_TEGRA=y -+CONFIG_SYS_NS16550=y -+CONFIG_TEGRA114_SPI=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_TEGRA=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a -+CONFIG_CI_UDC=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+# CONFIG_ENV_IS_IN_MMC is not set -diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h -new file mode 100644 -index 000000000000..37c71421acbb ---- /dev/null -+++ b/include/configs/p3450-0000.h -@@ -0,0 +1,44 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _P3450_0000_H -+#define _P3450_0000_H -+ -+#include -+ -+#include "tegra210-common.h" -+ -+/* High-level configuration options */ -+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" -+ -+/* Board-specific serial config */ -+#define CONFIG_TEGRA_ENABLE_UARTA -+ -+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+/* SPI */ -+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -+#define CONFIG_SF_DEFAULT_SPEED 24000000 -+#define CONFIG_SPI_FLASH_SIZE (4 << 20) -+ -+#define CONFIG_PREBOOT -+ -+#define BOARD_EXTRA_ENV_SETTINGS \ -+ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ -+ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ -+ "source ${scriptaddr}; " \ -+ "fi\0" -+ -+#include "tegra-common-usb-gadget.h" -+#include "tegra-common-post.h" -+ -+/* Crystal is 38.4MHz. clk_m runs at half that rate */ -+#define COUNTER_FREQUENCY 19200000 -+ -+#endif /* _P3450_0000_H */ diff --git a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch index 3e1dc09..5672527 100644 --- a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch +++ b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch @@ -1,20 +1,75 @@ -From patchwork Thu Mar 21 18:09:58 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,01/13] libfdt: Add phandle generation helper -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060358 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-2-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:09:58 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 87409c02ff1cc7249f0fdccbb44c607931cb9bb2 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Fri, 1 Mar 2019 19:20:48 +0100 +Subject: [PATCH 01/12] fdt: Remove duplicate code + +Commit 6d29cc7dcf2d ("fdt: Fixup only valid memory banks") ended up +being merged twice, first as: + + commit 6d29cc7dcf2d35966aa0b6119fd1cbca0d21d5e6 + Author: Thierry Reding + AuthorDate: Tue Jan 30 11:34:17 2018 +0100 + Commit: Simon Glass + CommitDate: Sun Feb 18 12:53:38 2018 -0700 + + fdt: Fixup only valid memory banks + + Memory banks with address 0 and size 0 are empty and should not be + passed to the OS via device tree. + + Signed-off-by: Thierry Reding + Acked-by: Stephen Warren + +and later again, though this time it was v2: + + commit ed5af03f9bb8905f1e94d68ab49f22d7f061d75f + Author: Thierry Reding + AuthorDate: Thu Feb 15 19:05:59 2018 +0100 + Commit: Tom Rini + CommitDate: Fri Feb 23 10:40:50 2018 -0500 + + fdt: Fixup only valid memory banks + + Memory banks with address 0 and size 0 are empty and should not be + passed to the OS via device tree. + + Acked-by: Stephen Warren + Signed-off-by: Thierry Reding + +The second version was slightly different, so the main hunk of the patch +was applied twice. This isn't harmful because the code is idempotent, +but it's wasteful to run the same code twice. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + common/fdt_support.c | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/common/fdt_support.c b/common/fdt_support.c +index 42583e3ed8..ab08a0114f 100644 +--- a/common/fdt_support.c ++++ b/common/fdt_support.c +@@ -456,12 +456,6 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) + if (!banks) + return 0; + +- for (i = 0; i < banks; i++) +- if (start[i] == 0 && size[i] == 0) +- break; +- +- banks = i; +- + len = fdt_pack_reg(blob, tmp, start, size, banks); + + err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); +-- +2.21.0 + +From abf9afc43916b5e16972bd595d2d34c3abff3613 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Thu, 21 Mar 2019 19:09:58 +0100 +Subject: [PATCH 02/12] libfdt: Add phandle generation helper The new fdt_generate_phandle() function can be used to generate a new, unused phandle given a specific device tree blob. The implementation is @@ -30,9 +85,6 @@ are indeed unique. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v3: -- update to latest upstream commit - lib/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ scripts/dtc/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ scripts/dtc/libfdt/libfdt.h | 19 +++++++++++++++++++ @@ -40,7 +92,7 @@ Changes in v3: 4 files changed, 82 insertions(+) diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c -index b6ca4e0b0c30..693de9aa5ad8 100644 +index b6ca4e0b0c..693de9aa5a 100644 --- a/lib/libfdt/fdt_ro.c +++ b/lib/libfdt/fdt_ro.c @@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) @@ -82,7 +134,7 @@ index b6ca4e0b0c30..693de9aa5ad8 100644 { FDT_CHECK_HEADER(fdt); diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c -index dfb3236da388..dc499884e4d1 100644 +index dfb3236da3..dc499884e4 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) @@ -124,7 +176,7 @@ index dfb3236da388..dc499884e4d1 100644 { FDT_CHECK_HEADER(fdt); diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h -index fd73688f9e9f..cf86ddba8811 100644 +index fd73688f9e..cf86ddba88 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -139,6 +139,10 @@ @@ -161,7 +213,7 @@ index fd73688f9e9f..cf86ddba8811 100644 * fdt_num_mem_rsv - retrieve the number of memory reserve map entries * @fdt: pointer to the device tree blob diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h -index bd2474628775..3ff9e2863075 100644 +index bd24746287..3ff9e28630 100644 --- a/scripts/dtc/libfdt/libfdt_env.h +++ b/scripts/dtc/libfdt/libfdt_env.h @@ -52,6 +52,7 @@ @@ -172,24 +224,13 @@ index bd2474628775..3ff9e2863075 100644 #include #include #include +-- +2.21.0 -From patchwork Thu Mar 21 18:09:59 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,02/13] fdtdec: Add cpu_to_fdt_{addr, size}() macros -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060376 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-3-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:09:59 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 57d9e1ba51831b787ac114c8b5ab17cc44a22977 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:09:59 +0100 +Subject: [PATCH 03/12] fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. @@ -197,14 +238,11 @@ type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v2: -- add Reviewed-by from Simon - include/fdtdec.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index b7e35cd87c55..a965c33157c9 100644 +index b7e35cd87c..a965c33157 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t; @@ -223,24 +261,13 @@ index b7e35cd87c55..a965c33157c9 100644 typedef fdt32_t fdt_val_t; #endif +-- +2.21.0 -From patchwork Thu Mar 21 18:10:00 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060360 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-4-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:00 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 30086fd2012b1f00cc1d4d11e962634236277d17 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:00 +0100 +Subject: [PATCH 04/12] fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases @@ -249,14 +276,11 @@ of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding --- -Changes in v2: -- new patch - include/fdtdec.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index a965c33157c9..a0ba57c6318b 100644 +index a965c33157..a0ba57c631 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -23,6 +23,31 @@ @@ -291,38 +315,24 @@ index a965c33157c9..a0ba57c6318b 100644 #ifdef CONFIG_PHYS_64BIT #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:01 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,04/13] fdtdec: Implement fdtdec_set_phandle() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060366 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-5-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:01 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 33c157fbae9cf088c8374543daf012487e3d3c07 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:01 +0100 +Subject: [PATCH 05/12] fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding --- -Changes in v2: -- don't emit deprecated linux,phandle property - include/fdtdec.h | 11 +++++++++++ lib/fdtdec.c | 7 +++++++ 2 files changed, 18 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index a0ba57c6318b..55600026c488 100644 +index a0ba57c631..55600026c4 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void); @@ -344,7 +354,7 @@ index a0ba57c6318b..55600026c488 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 09a7e133a539..00db90e3cdfd 100644 +index 09a7e133a5..00db90e3cd 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void) @@ -361,43 +371,19 @@ index 09a7e133a539..00db90e3cdfd 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:02 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,05/13] fdtdec: Implement fdtdec_add_reserved_memory() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060362 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-6-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:02 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 9c2ed8c44b3d62e01e2885f0e2b077407bf6056b Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:02 +0100 +Subject: [PATCH 06/12] fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v3: -- use fdt_generate_phandle() instead of fdtdec_generate_phandle() -- add device tree bindings for /reserved-memory -- add examples to code comments - -Changes in v2: -- split fdt_{addr,size}_unpack() helpers into separate patch -- use name@x,y notation only if the upper cell is > 0 -- use debug() instead of printf() to save code size -- properly compute number of cells in reg property -- fix carveout size computations, was off by one -- use #size-cells where appropriate - .../reserved-memory/reserved-memory.txt | 136 ++++++++++++++++++ include/fdtdec.h | 48 +++++++ lib/fdtdec.c | 131 +++++++++++++++++ @@ -406,7 +392,7 @@ Changes in v2: diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt new file mode 100644 -index 000000000000..bac4afa3b197 +index 0000000000..bac4afa3b1 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt @@ -0,0 +1,136 @@ @@ -547,7 +533,7 @@ index 000000000000..bac4afa3b197 + }; +}; diff --git a/include/fdtdec.h b/include/fdtdec.h -index 55600026c488..b54ed38fb362 100644 +index 55600026c4..b54ed38fb3 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -992,6 +992,54 @@ int fdtdec_setup_memory_banksize(void); @@ -606,7 +592,7 @@ index 55600026c488..b54ed38fb362 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 00db90e3cdfd..be54ad5bd092 100644 +index 00db90e3cd..be54ad5bd0 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1250,6 +1250,137 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) @@ -747,24 +733,13 @@ index 00db90e3cdfd..be54ad5bd092 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:03 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,06/13] fdtdec: Implement carveout support functions -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060373 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-7-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:03 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 58eb0f1af300064b91809e52d96479fd02ce9091 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:03 +0100 +Subject: [PATCH 07/12] fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node @@ -774,20 +749,12 @@ and the memory-region property). Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v3: -- add examples to code comments - -Changes in v2: -- use debug() instead of printf() to save code size -- fix carveout size computations, was off by one -- use fdtdec_get_addr_size_auto_noparent() - include/fdtdec.h | 81 ++++++++++++++++++++++++++++++++++++++++++++ lib/fdtdec.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index b54ed38fb362..13b743f59ab1 100644 +index b54ed38fb3..13b743f59a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -1030,6 +1030,8 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); @@ -886,7 +853,7 @@ index b54ed38fb362..13b743f59ab1 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index be54ad5bd092..bd05ab90fce1 100644 +index be54ad5bd0..bd05ab90fc 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1381,6 +1381,93 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, @@ -983,24 +950,13 @@ index be54ad5bd092..bd05ab90fce1 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:04 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,07/13] fdtdec: Add Kconfig symbol for tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060374 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-8-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:04 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 1c1d7d2d6d85003ac2df657588a2c5a78f7db8ad Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:04 +0100 +Subject: [PATCH 08/12] fdtdec: Add Kconfig symbol for tests Runtime tests are provided as a test_fdtdec command implementation. Add a Kconfig symbol that allows this command to be built so that the tests @@ -1009,14 +965,11 @@ can be used. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/Kconfig b/lib/Kconfig -index 366d164cd760..b1fccf7e8dff 100644 +index 366d164cd7..b1fccf7e8d 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -423,4 +423,8 @@ source lib/efi/Kconfig @@ -1028,24 +981,13 @@ index 366d164cd760..b1fccf7e8dff 100644 + depends on OF_LIBFDT + endmenu +-- +2.21.0 -From patchwork Thu Mar 21 18:10:05 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,08/13] fdtdec: test: Fix build warning -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060368 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-9-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:05 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From aa6715267b997d800b7934ce14cf4e5cc6f9bcf9 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:05 +0100 +Subject: [PATCH 09/12] fdtdec: test: Fix build warning Hide the declaration of the "fd" variable When not building a DEBUG configuration, to avoid the variable being unused. @@ -1053,14 +995,11 @@ configuration, to avoid the variable being unused. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index a82e27de942f..065fed278cf3 100644 +index a82e27de94..065fed278c 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -79,7 +79,9 @@ static int make_fdt(void *fdt, int size, const char *aliases, @@ -1073,24 +1012,13 @@ index a82e27de942f..065fed278cf3 100644 CHECK(fdt_create(fdt, size)); CHECK(fdt_finish_reservemap(fdt)); +-- +2.21.0 -From patchwork Thu Mar 21 18:10:06 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,09/13] fdtdec: test: Use compound statement macros -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060361 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-10-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:06 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 952f7a32bc2249e28e0dc08890d663a3b55f74b8 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:06 +0100 +Subject: [PATCH 10/12] fdtdec: test: Use compound statement macros This eliminates the need for intermediate helper functions and allow the macros to return a value so that it can be used subsequently. @@ -1098,14 +1026,11 @@ macros to return a value so that it can be used subsequently. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 64 ++++++++++++++++------------------------------- 1 file changed, 22 insertions(+), 42 deletions(-) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 065fed278cf3..928950918413 100644 +index 065fed278c..9289509184 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -15,48 +15,28 @@ @@ -1187,38 +1112,24 @@ index 065fed278cf3..928950918413 100644 /* Check we got the right ones */ for (i = 0, s = expect; *s; s++, i++) { +-- +2.21.0 -From patchwork Thu Mar 21 18:10:07 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,10/13] fdtdec: test: Add carveout tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060375 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-11-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:07 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From cd380b7093b9a342244a1cd732621cb960bc1668 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:07 +0100 +Subject: [PATCH 11/12] fdtdec: test: Add carveout tests Implement carveout tests for 32-bit and 64-bit builds. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 928950918413..f6defe16c5a6 100644 +index 9289509184..f6defe16c5 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -141,6 +141,156 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) @@ -1387,24 +1298,13 @@ index 928950918413..f6defe16c5a6 100644 printf("Test passed\n"); return 0; } +-- +2.21.0 -From patchwork Thu Mar 21 18:10:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,11/13] sandbox: Enable fdtdec tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060364 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-12-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:08 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From ac9681d2d1fa09977106a32c1e2194c7bc6b5c80 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:08 +0100 +Subject: [PATCH 12/12] sandbox: Enable fdtdec tests Enable fdtdec tests on sandbox configurations so that they can be run to validate the fdtdec implementation. @@ -1412,15 +1312,12 @@ validate the fdtdec implementation. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index da4bdced3105..c04ecd915ae7 100644 +index da4bdced31..c04ecd915a 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -194,6 +194,7 @@ CONFIG_CMD_DHRYSTONE=y @@ -1432,7 +1329,7 @@ index da4bdced3105..c04ecd915ae7 100644 CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 193e41896cb7..bb508a8d02e2 100644 +index 193e41896c..bb508a8d02 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -215,6 +215,7 @@ CONFIG_CMD_DHRYSTONE=y @@ -1443,243 +1340,193 @@ index 193e41896cb7..bb508a8d02e2 100644 CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y +-- +2.21.0 -From patchwork Thu Mar 21 18:10:09 2019 +From patchwork Mon Apr 15 08:08:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,12/13] p2371-2180: Add support for framebuffer carveouts +Subject: [U-Boot,1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060367 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-13-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:09 +0100 +X-Patchwork-Id: 1085479 +X-Patchwork-Delegate: sjg@chromium.org +Message-Id: <20190415080821.441-1-thierry.reding@gmail.com> +To: Simon Glass +Cc: u-boot@lists.denx.de +Date: Mon, 15 Apr 2019 10:08:20 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. +The fdt_setprop_u32() function does everything that we need, so we +really only use the function as a convenience wrapper, in which case it +can simply be a static inline function. Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass --- - board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ - 1 file changed, 47 insertions(+) + include/fdtdec.h | 5 ++++- + lib/fdtdec.c | 7 ------- + 2 files changed, 4 insertions(+), 8 deletions(-) -diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c -index a444d692d7ea..4985302d6bc2 100644 ---- a/board/nvidia/p2371-2180/p2371-2180.c -+++ b/board/nvidia/p2371-2180/p2371-2180.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) - } - } - -+static int ft_copy_carveout(void *dst, const void *src, const char *node) +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 266c58271f0b..110aa6ab6dea 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -1029,7 +1029,10 @@ int fdtdec_setup_memory_banksize(void); + * @param phandle phandle to set for the given node + * @return 0 on success or a negative error code on failure + */ +-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); ++static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) +{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; ++ return fdt_setprop_u32(blob, node, "phandle", phandle); +} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@50000000/dc@54200000", -+ "/host1x@50000000/dc@54240000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ continue; -+ } -+ } -+} -+ - int ft_board_setup(void *fdt, bd_t *bd) - { - ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); - return 0; - } - -From patchwork Thu Mar 21 18:10:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,13/13] p2771-0000: Add support for framebuffer carveouts -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060363 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-14-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:10 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- - 1 file changed, 62 insertions(+), 4 deletions(-) - -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index fe22067f6571..d294c7ae0136 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + /** + * fdtdec_add_reserved_memory() - add or find a reserved-memory node +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 9c9c30234732..fea44a9a8c65 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1261,13 +1261,6 @@ __weak void *board_fdt_blob_setup(void) } #endif --int ft_board_setup(void *fdt, bd_t *bd) -+static void ft_mac_address_setup(void *fdt) +-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) +-{ +- fdt32_t value = cpu_to_fdt32(phandle); +- +- return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); +-} +- + static int fdtdec_init_reserved_memory(void *blob) { - const void *cboot_fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + int na, ns, node, err; + +From patchwork Mon Apr 15 08:08:21 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,2/2] fdtdec: Remove fdt_{addr,size}_unpack() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085480 +X-Patchwork-Delegate: sjg@chromium.org +Message-Id: <20190415080821.441-2-thierry.reding@gmail.com> +To: Simon Glass +Cc: u-boot@lists.denx.de +Date: Mon, 15 Apr 2019 10:08:21 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +U-Boot already defines the {upper,lower}_32_bits() macros that have the +same purpose. Use the existing macros instead of defining new APIs. + +Signed-off-by: Thierry Reding +--- + include/fdtdec.h | 24 ------------------------ + lib/fdtdec.c | 8 ++++++-- + lib/fdtdec_test.c | 8 ++++++-- + 3 files changed, 12 insertions(+), 28 deletions(-) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 110aa6ab6dea..fa8e34f6f960 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -24,30 +24,6 @@ + typedef phys_addr_t fdt_addr_t; + typedef phys_size_t fdt_size_t; - path = fdt_get_alias(fdt, "ethernet"); - if (!path) -- return 0; -+ return; +-static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) +-{ +- if (upper) +-#ifdef CONFIG_PHYS_64BIT +- *upper = addr >> 32; +-#else +- *upper = 0; +-#endif +- +- return addr; +-} +- +-static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) +-{ +- if (upper) +-#ifdef CONFIG_PHYS_64BIT +- *upper = size >> 32; +-#else +- *upper = 0; +-#endif +- +- return size; +-} +- + #ifdef CONFIG_PHYS_64BIT + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index fea44a9a8c65..d0ba88897335 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + fdt32_t cells[4] = {}, *ptr = cells; + uint32_t upper, lower, phandle; + int parent, node, na, ns, err; ++ fdt_size_t size; + char name[64]; - debug("ethernet alias found: %s\n", path); + /* create an empty /reserved-memory node if one doesn't exist */ +@@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + * Unpack the start address and generate the name of the new node + * base on the basename and the unit-address. + */ +- lower = fdt_addr_unpack(carveout->start, &upper); ++ upper = upper_32_bits(carveout->start); ++ lower = lower_32_bits(carveout->start); - offset = fdt_path_offset(fdt, path); -- if (offset < 0) -- return 0; -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } + if (na > 1 && upper > 0) + snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, +@@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + *ptr++ = cpu_to_fdt32(lower); - if (is_valid_ethaddr(local_mac)) { - err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) - debug("MAC address set: %pM\n", mac); - } - } -+} -+ -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@13e00000/display-hub@15200000/display@15200000", -+ "/host1x@13e00000/display-hub@15200000/display@15210000", -+ "/host1x@13e00000/display-hub@15200000/display@15220000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ printf("copying carveout for %s...\n", nodes[i]); -+ -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ -+ continue; -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); + /* store one or two size cells */ +- lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); ++ size = carveout->end - carveout->start + 1; ++ upper = upper_32_bits(size); ++ lower = lower_32_bits(size); - return 0; - } + if (ns > 1) + *ptr++ = cpu_to_fdt32(upper); +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index f6defe16c5a6..1f4f27054057 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) + }; + fdt32_t cells[4], *ptr = cells; + uint32_t upper, lower; ++ fdt_size_t size; + char name[32]; + int offset; + + /* store one or two address cells */ +- lower = fdt_addr_unpack(carveout.start, &upper); ++ upper = upper_32_bits(carveout.start); ++ lower = lower_32_bits(carveout.start); + + if (na > 1 && upper > 0) + snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, +@@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) + *ptr++ = cpu_to_fdt32(lower); + + /* store one or two size cells */ +- lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); ++ size = carveout.end - carveout.start + 1; ++ upper = upper_32_bits(size); ++ lower = lower_32_bits(size); + + if (ns > 1) + *ptr++ = cpu_to_fdt32(upper); diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch index f65ecd8..03d2da9 100644 --- a/ARM-tegra-Miscellaneous-improvements.patch +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -1,16 +1,303 @@ -From patchwork Thu Apr 4 11:59:24 2019 +From patchwork Mon Apr 15 09:32:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,01/19] ARM: tegra: Use common header for PMU declarations +Subject: [U-Boot,v5,01/27] fdtdec: Add fdtdec_set_ethernet_mac_address() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077183 +X-Patchwork-Id: 1085515 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:24 +0200 +Message-Id: <20190415093239.27509-2-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:13 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to set the local MAC address for the default +Ethernet interface in its device tree node. The default interface is +identified by the "ethernet" alias. + +One case where this is useful is for devices that store their MAC +address in a custom location. Once extracted, board code can store the +MAC address in U-Boot's control DTB so that it will automatically be +used by the Ethernet uclass. + +Signed-off-by: Thierry Reding +--- + include/fdtdec.h | 24 ++++++++++++++++++++++++ + lib/fdtdec.c | 29 +++++++++++++++++++++++++++++ + 2 files changed, 53 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index fa8e34f6f960..e6c22dd5cd5c 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -996,6 +996,30 @@ int fdtdec_setup_memory_banksize_fdt(const void *blob); + */ + int fdtdec_setup_memory_banksize(void); + ++/** ++ * fdtdec_set_ethernet_mac_address() - set MAC address for default interface ++ * ++ * Looks up the default interface via the "ethernet" alias (in the /aliases ++ * node) and stores the given MAC in its "local-mac-address" property. This ++ * is useful on platforms that store the MAC address in a custom location. ++ * Board code can call this in the late init stage to make sure that the ++ * interface device tree node has the right MAC address configured for the ++ * Ethernet uclass to pick it up. ++ * ++ * Typically the FDT passed into this function will be U-Boot's control DTB. ++ * Given that a lot of code may be holding offsets to various nodes in that ++ * tree, this code will only set the "local-mac-address" property in-place, ++ * which means that it needs to exist and have space for the 6-byte address. ++ * This ensures that the operation is non-destructive and does not invalidate ++ * offsets that other drivers may be using. ++ * ++ * @param fdt FDT blob ++ * @param mac buffer containing the MAC address to set ++ * @param size size of MAC address ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size); ++ + /** + * fdtdec_set_phandle() - sets the phandle of a given node + * +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index d0ba88897335..3ee786b57940 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1261,6 +1261,35 @@ __weak void *board_fdt_blob_setup(void) + } + #endif + ++int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) ++{ ++ const char *path; ++ int offset, err; ++ ++ if (!is_valid_ethaddr(mac)) ++ return -EINVAL; ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return 0; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ debug("ethernet alias points to absent node %s\n", path); ++ return -ENOENT; ++ } ++ ++ err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size); ++ if (err < 0) ++ return err; ++ ++ debug("MAC address: %pM\n", mac); ++ ++ return 0; ++} ++ + static int fdtdec_init_reserved_memory(void *blob) + { + int na, ns, node, err; + +From patchwork Mon Apr 15 09:32:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,02/27] lib: Implement strndup() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085516 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-3-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:14 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Signed-off-by: Thierry Reding +--- + include/linux/string.h | 1 + + lib/string.c | 23 +++++++++++++++++++++++ + 2 files changed, 24 insertions(+) + +diff --git a/include/linux/string.h b/include/linux/string.h +index 36066207392e..5d63be4ce5b0 100644 +--- a/include/linux/string.h ++++ b/include/linux/string.h +@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); + #ifndef __HAVE_ARCH_STRDUP + extern char * strdup(const char *); + #endif ++extern char * strndup(const char *, size_t); + #ifndef __HAVE_ARCH_STRSWAB + extern char * strswab(const char *); + #endif +diff --git a/lib/string.c b/lib/string.c +index af17c16f616d..9b779ddc3bbe 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -326,6 +326,29 @@ char * strdup(const char *s) + } + #endif + ++char * strndup(const char *s, size_t n) ++{ ++ size_t len; ++ char *new; ++ ++ if (s == NULL) ++ return NULL; ++ ++ len = strlen(s); ++ ++ if (n < len) ++ len = n; ++ ++ new = malloc(len + 1); ++ if (new == NULL) ++ return NULL; ++ ++ strncpy(new, s, len); ++ new[len] = '\0'; ++ ++ return new; ++} ++ + #ifndef __HAVE_ARCH_STRSPN + /** + * strspn - Calculate the length of the initial substring of @s which only + +From patchwork Mon Apr 15 09:32:15 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 03/27] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085517 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-4-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:15 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +On Tegra210 the parents for the disp1 and disp2 clocks are slightly +different from earlier chips. Only pll_p, pll_d_out0, pll_d2_out0 and +clk_m are valid parents (technically pll_d_out is as well, but U-Boot +doesn't know anything about it). Fix up the type name and the mux +definition. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/tegra210/clock.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index 06068c4b7b8d..0d7cafea2017 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -40,7 +40,7 @@ enum clock_type_id { + CLOCK_TYPE_PDCT, + CLOCK_TYPE_ACPT, + CLOCK_TYPE_ASPTE, +- CLOCK_TYPE_PMDACD2T, ++ CLOCK_TYPE_PDD2T, + CLOCK_TYPE_PCST, + CLOCK_TYPE_DP, + +@@ -97,8 +97,8 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = { + { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC), + CLK(EPCI), CLK(NONE), CLK(NONE), CLK(NONE), + MASK_BITS_31_29}, +- { CLK(PERIPH), CLK(MEMORY), CLK(DISPLAY), CLK(AUDIO), +- CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE), ++ { CLK(PERIPH), CLK(NONE), CLK(DISPLAY), CLK(NONE), ++ CLK(NONE), CLK(DISPLAY2), CLK(OSC), CLK(NONE), + MASK_BITS_31_29}, + { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC), + CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), +@@ -174,8 +174,8 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = { + TYPE(PERIPHC_0bh, CLOCK_TYPE_NONE), + TYPE(PERIPHC_0ch, CLOCK_TYPE_NONE), + TYPE(PERIPHC_SBC1, CLOCK_TYPE_PC2CC3M_T), +- TYPE(PERIPHC_DISP1, CLOCK_TYPE_PMDACD2T), +- TYPE(PERIPHC_DISP2, CLOCK_TYPE_PMDACD2T), ++ TYPE(PERIPHC_DISP1, CLOCK_TYPE_PDD2T), ++ TYPE(PERIPHC_DISP2, CLOCK_TYPE_PDD2T), + + /* 0x10 */ + TYPE(PERIPHC_10h, CLOCK_TYPE_NONE), + +From patchwork Mon Apr 15 09:32:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 04/27] ARM: tegra: Remove disp1 clock initialization on Tegra210 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085526 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-5-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:16 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +pll_c is not a valid parent for the disp1 clock, so trying to set it +will fail. Given that display is not used in U-Boot, remove the init +table entry so that disp1 will keep its default parent (clk_m). + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/tegra210/clock.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index 0d7cafea2017..b240860f08cf 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = { + { PERIPH_ID_SBC5, CLOCK_ID_PERIPH }, + { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, + { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, +- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, + { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, + { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, + { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, + +From patchwork Mon Apr 15 09:32:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,05/27] ARM: tegra: Use common header for PMU declarations +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085523 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-6-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:17 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -167,19 +454,19 @@ index 6697909d9a3e..66628933b653 100644 DECLARE_GLOBAL_DATA_PTR; -From patchwork Thu Apr 4 11:59:25 2019 +From patchwork Mon Apr 15 09:32:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +Subject: [U-Boot,v5,06/27] ARM: tegra: Guard clock code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077185 +X-Patchwork-Id: 1085522 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:25 +0200 +Message-Id: <20190415093239.27509-7-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:18 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -309,20 +596,20 @@ index b8d5ef0322cb..b94077221f77 100644 pinmux_init(); board_init_uart_f(); -From patchwork Thu Apr 4 11:59:26 2019 +From patchwork Mon Apr 15 09:32:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol +Subject: [U-Boot, v5, + 07/27] ARM: tegra: Guard GP pad control code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077187 +X-Patchwork-Id: 1085520 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:26 +0200 +Message-Id: <20190415093239.27509-8-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:19 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -400,20 +687,20 @@ index be414e4e4aca..d7063490e222 100644 #ifndef CONFIG_ARM64 void config_cache(void) -From patchwork Thu Apr 4 11:59:27 2019 +From patchwork Mon Apr 15 09:32:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol +Subject: [U-Boot, v5, + 08/27] ARM: tegra: Guard memory controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077188 +X-Patchwork-Id: 1085531 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:27 +0200 +Message-Id: <20190415093239.27509-9-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:20 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -501,20 +788,20 @@ index ecd5001de4c5..7ef5a67edd1f 100644 } -From patchwork Thu Apr 4 11:59:28 2019 +From patchwork Mon Apr 15 09:32:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol +Subject: [U-Boot, v5, + 09/27] ARM: tegra: Guard pin controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077207 +X-Patchwork-Id: 1085527 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:28 +0200 +Message-Id: <20190415093239.27509-10-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:21 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -636,20 +923,20 @@ index b94077221f77..ce1c9346959d 100644 #ifdef CONFIG_TEGRA_CLOCK_SCALING #include -From patchwork Thu Apr 4 11:59:29 2019 +From patchwork Mon Apr 15 09:32:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol +Subject: [U-Boot, v5, + 10/27] ARM: tegra: Guard powergate code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077193 +X-Patchwork-Id: 1085529 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:29 +0200 +Message-Id: <20190415093239.27509-11-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:22 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -712,19 +999,19 @@ index 395e0191a458..517be21ee5f5 100644 endif -From patchwork Thu Apr 4 11:59:30 2019 +From patchwork Mon Apr 15 09:32:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,07/19] ARM: tegra: Fix save_boot_params() prototype +Subject: [U-Boot,v5,11/27] ARM: tegra: Fix save_boot_params() prototype X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077195 +X-Patchwork-Id: 1085528 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:30 +0200 +Message-Id: <20190415093239.27509-12-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:23 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -758,20 +1045,20 @@ index b65bdde5a78d..59d2f347485d 100644 from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; save_boot_params_ret(); -From patchwork Thu Apr 4 11:59:31 2019 +From patchwork Mon Apr 15 09:32:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 08/19] ARM: tegra: Allow boards to override boot target devices +Subject: [U-Boot, v5, + 12/27] ARM: tegra: Allow boards to override boot target devices X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077192 +X-Patchwork-Id: 1085524 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:31 +0200 +Message-Id: <20190415093239.27509-13-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:24 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -806,19 +1093,19 @@ index e54428ba43e2..9685ee5059ab 100644 #else #define BOOTENV -From patchwork Thu Apr 4 11:59:32 2019 +From patchwork Mon Apr 15 09:32:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,09/19] ARM: tegra: Support TZ-only access to PMC +Subject: [U-Boot,v5,13/27] ARM: tegra: Support TZ-only access to PMC X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077197 +X-Patchwork-Id: 1085544 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:32 +0200 +Message-Id: <20190415093239.27509-14-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:25 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1266,20 +1553,20 @@ index e45f0961b242..761c9ef19e3b 100644 return 0; } -From patchwork Thu Apr 4 11:59:33 2019 +From patchwork Mon Apr 15 09:32:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 10/19] ARM: tegra: Workaround UDC boot issues only if necessary +Subject: [U-Boot, v5, + 14/27] ARM: tegra: Workaround UDC boot issues only if necessary X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077191 +X-Patchwork-Id: 1085541 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:33 +0200 +Message-Id: <20190415093239.27509-15-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:26 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1310,19 +1597,19 @@ index 28914a34a1b5..faa73559fd42 100644 help When loading U-Boot into RAM over USB protocols using tools such as -From patchwork Thu Apr 4 11:59:34 2019 +From patchwork Mon Apr 15 09:32:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,11/19] ARM: tegra: Restore DRAM bank count +Subject: [U-Boot,v5,15/27] ARM: tegra: Restore DRAM bank count X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077194 +X-Patchwork-Id: 1085532 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:34 +0200 +Message-Id: <20190415093239.27509-16-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:27 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1373,19 +1660,19 @@ index df4d914d85cf..459b67fd195f 100644 CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y -From patchwork Thu Apr 4 11:59:35 2019 +From patchwork Mon Apr 15 09:32:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,12/19] ARM: tegra: Unify Tegra186 builds +Subject: [U-Boot,v5,16/27] ARM: tegra: Unify Tegra186 builds X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077204 +X-Patchwork-Id: 1085533 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:35 +0200 +Message-Id: <20190415093239.27509-17-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:28 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2198,20 +2485,20 @@ index 496e8a02111e..6f88010c18c3 100644 } +#endif -From patchwork Thu Apr 4 11:59:36 2019 +From patchwork Mon Apr 15 09:32:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 13/19] ARM: tegra: Implement cboot_save_boot_params() in C +Subject: [U-Boot, v5, + 17/27] ARM: tegra: Implement cboot_save_boot_params() in C X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077211 +X-Patchwork-Id: 1085530 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:36 +0200 +Message-Id: <20190415093239.27509-18-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:29 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2291,27 +2578,27 @@ index 4c9ddacc2b39..000000000000 - b save_boot_params_ret -ENDPROC(cboot_save_boot_params) -From patchwork Thu Apr 4 11:59:37 2019 +From patchwork Mon Apr 15 09:32:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,14/19] ARM: tegra: Implement cboot_get_ethaddr() +Subject: [U-Boot,v5,18/27] ARM: tegra: Implement cboot_get_ethaddr() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077213 +X-Patchwork-Id: 1085543 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:37 +0200 +Message-Id: <20190415093239.27509-19-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:30 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -This function will attempt to look up an ethernet address in the DTB +This function will attempt to look up an Ethernet address in the DTB that was passed in from cboot. It does so by first trying to locate the -primary ethernet device for the board (identified by the "ethernet" +default Ethernet device for the board (identified by the "ethernet" alias) and if found, reads the "local-mac-address" property. If the "ethernet" alias does not exist, or if it points to a device tree node that doesn't exist, or if the device tree node that it points to does @@ -2320,8 +2607,16 @@ will fall back to the legacy mechanism of looking for the MAC address stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of the "/chosen" node. +The MAC address is then written to the default Ethernet device for the +board (again identified by the "ethernet" alias) in U-Boot's control +DTB. This allows the device driver for that device to read the MAC +address from the standard location in device tree. + Signed-off-by: Thierry Reding --- +Changes in v5: +- write MAC to DT rather than an environment variable + Changes in v4: - also check the /chosen/nvidia,ethernet-mac property for compatibility with Tegra210 @@ -2330,8 +2625,8 @@ Changes in v2: - make dummy static inline to avoid duplicate definitions arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 92 ++++++++++++++++++++----- - 2 files changed, 81 insertions(+), 17 deletions(-) + arch/arm/mach-tegra/cboot.c | 97 ++++++++++++++++++++----- + 2 files changed, 86 insertions(+), 17 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index b3441ec178b3..021c24617575 100644 @@ -2358,7 +2653,7 @@ index b3441ec178b3..021c24617575 100644 #endif diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index a302ca45f39b..6c6d06d89a5d 100644 +index a302ca45f39b..628909f29137 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -4,6 +4,7 @@ @@ -2369,7 +2664,7 @@ index a302ca45f39b..6c6d06d89a5d 100644 #include #include #include -@@ -465,46 +466,103 @@ static int set_fdt_addr(void) +@@ -465,46 +466,108 @@ static int set_fdt_addr(void) * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ @@ -2485,26 +2780,134 @@ index a302ca45f39b..6c6d06d89a5d 100644 /* Ignore errors here; not all cases care about Ethernet addresses */ - set_ethaddr_from_cboot(); + err = cboot_get_ethaddr(fdt, mac); -+ if (!err) -+ eth_env_set_enetaddr("ethaddr", mac); ++ if (!err) { ++ void *blob = (void *)gd->fdt_blob; ++ ++ err = fdtdec_set_ethernet_mac_address(blob, mac, sizeof(mac)); ++ if (err < 0) ++ printf("failed to set MAC address %pM: %d\n", mac, err); ++ } return 0; } -From patchwork Thu Apr 4 11:59:38 2019 +From patchwork Mon Apr 15 09:32:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 15/19] ARM: tegra: Enable position independent build for 64-bit +Subject: [U-Boot,v5,19/27] ARM: tegra: Import cbootargs value from cboot DTB X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077212 +X-Patchwork-Id: 1085534 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:38 +0200 +Message-Id: <20190415093239.27509-20-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:31 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Read the boot arguments passed by cboot via the /chosen/bootargs +property and store it in the cbootargs environment variable. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 628909f29137..a829ef794f2d 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#include + ++#include + #include + + #include +@@ -546,10 +548,49 @@ out: + return err; + } + ++static char *strip(const char *ptr) ++{ ++ const char *end; ++ ++ while (*ptr && isblank(*ptr)) ++ ptr++; ++ ++ /* empty string */ ++ if (*ptr == '\0') ++ return strdup(ptr); ++ ++ end = ptr; ++ ++ while (end[1]) ++ end++; ++ ++ while (isblank(*end)) ++ end--; ++ ++ return strndup(ptr, end - ptr + 1); ++} ++ ++static char *cboot_get_bootargs(const void *fdt) ++{ ++ const char *args; ++ int offset, len; ++ ++ offset = fdt_path_offset(fdt, "/chosen"); ++ if (offset < 0) ++ return NULL; ++ ++ args = fdt_getprop(fdt, offset, "bootargs", &len); ++ if (!args) ++ return NULL; ++ ++ return strip(args); ++} ++ + int cboot_late_init(void) + { + const void *fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN]; ++ char *bootargs; + int err; + + set_calculated_env_vars(); +@@ -569,5 +610,11 @@ int cboot_late_init(void) + printf("failed to set MAC address %pM: %d\n", mac, err); + } + ++ bootargs = cboot_get_bootargs(fdt); ++ if (bootargs) { ++ env_set("cbootargs", bootargs); ++ free(bootargs); ++ } ++ + return 0; + } + +From patchwork Mon Apr 15 09:32:32 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 20/27] ARM: tegra: Enable position independent build for 64-bit +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085539 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-21-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:32 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2587,19 +2990,19 @@ index e48e0a1a14ec..8e9c45690dce 100644 CONFIG_TARGET_P2571=y CONFIG_NR_DRAM_BANKS=2 -From patchwork Thu Apr 4 11:59:39 2019 +From patchwork Mon Apr 15 09:32:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,16/19] p2371-2180: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v5,21/27] p2371-2180: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077196 +X-Patchwork-Id: 1085536 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-17-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:39 +0200 +Message-Id: <20190415093239.27509-22-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:33 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2698,19 +3101,19 @@ index 4923d330de6c..0ee4913a0469 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " -From patchwork Thu Apr 4 11:59:40 2019 +From patchwork Mon Apr 15 09:32:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,17/19] p2771-0000: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v5,22/27] p2771-0000: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077208 +X-Patchwork-Id: 1085542 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-18-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:40 +0200 +Message-Id: <20190415093239.27509-23-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:34 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2813,176 +3216,1410 @@ index 459b67fd195f..20d4393838d6 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " -From patchwork Thu Apr 4 11:59:41 2019 +From patchwork Mon Apr 15 09:32:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,18/19] lib: Implement strndup() +Subject: [U-Boot,v5,23/27] p2371-2180: Add support for framebuffer carveouts X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077221 +X-Patchwork-Id: 1085537 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-19-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:41 +0200 +Message-Id: <20190415093239.27509-24-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:35 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- - include/linux/string.h | 1 + - lib/string.c | 23 +++++++++++++++++++++++ - 2 files changed, 24 insertions(+) +Changes in v4: +- add reviewed-by from Simon -diff --git a/include/linux/string.h b/include/linux/string.h -index 36066207392e..5d63be4ce5b0 100644 ---- a/include/linux/string.h -+++ b/include/linux/string.h -@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); - #ifndef __HAVE_ARCH_STRDUP - extern char * strdup(const char *); - #endif -+extern char * strndup(const char *, size_t); - #ifndef __HAVE_ARCH_STRSWAB - extern char * strswab(const char *); - #endif -diff --git a/lib/string.c b/lib/string.c -index af17c16f616d..9b779ddc3bbe 100644 ---- a/lib/string.c -+++ b/lib/string.c -@@ -326,6 +326,29 @@ char * strdup(const char *s) - } - #endif - -+char * strndup(const char *s, size_t n) -+{ -+ size_t len; -+ char *new; -+ -+ if (s == NULL) -+ return NULL; -+ -+ len = strlen(s); -+ -+ if (n < len) -+ len = n; -+ -+ new = malloc(len + 1); -+ if (new == NULL) -+ return NULL; -+ -+ strncpy(new, s, len); -+ new[len] = '\0'; -+ -+ return new; -+} -+ - #ifndef __HAVE_ARCH_STRSPN - /** - * strspn - Calculate the length of the initial substring of @s which only - -From patchwork Thu Apr 4 11:59:42 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,19/19] ARM: tegra: Import cbootargs value from cboot DTB -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077205 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-20-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:42 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Read the boot arguments passed by cboot via the /chosen/bootargs -property and store it in the cbootargs environment variable. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 6c6d06d89a5d..3f42ffeb73c0 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#include +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index a444d692d7ea..4985302d6bc2 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -6,6 +6,7 @@ -+#include - #include - - #include -@@ -546,10 +548,49 @@ out: - return err; + #include + #include ++#include + #include + #include + #include +@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) + } } -+static char *strip(const char *ptr) ++static int ft_copy_carveout(void *dst, const void *src, const char *node) +{ -+ const char *end; ++ struct fdt_memory fb; ++ int err; + -+ while (*ptr && isblank(*ptr)) -+ ptr++; ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); + -+ /* empty string */ -+ if (*ptr == '\0') -+ return strdup(ptr); -+ -+ end = ptr; -+ -+ while (end[1]) -+ end++; -+ -+ while (isblank(*end)) -+ end--; -+ -+ return strndup(ptr, end - ptr + 1); -+} -+ -+static char *cboot_get_bootargs(const void *fdt) -+{ -+ const char *args; -+ int offset, len; -+ -+ offset = fdt_path_offset(fdt, "/chosen"); -+ if (offset < 0) -+ return NULL; -+ -+ args = fdt_getprop(fdt, offset, "bootargs", &len); -+ if (!args) -+ return NULL; -+ -+ return strip(args); -+} -+ - int cboot_late_init(void) - { - const void *fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN]; -+ char *bootargs; - int err; - - set_calculated_env_vars(); -@@ -564,5 +605,11 @@ int cboot_late_init(void) - if (!err) - eth_env_set_enetaddr("ethaddr", mac); - -+ bootargs = cboot_get_bootargs(fdt); -+ if (bootargs) { -+ env_set("cbootargs", bootargs); -+ free(bootargs); ++ return err; + } + ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ continue; ++ } ++ } ++} ++ + int ft_board_setup(void *fdt, bd_t *bd) + { + ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + return 0; } + +From patchwork Mon Apr 15 09:32:36 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,24/27] p2771-0000: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085535 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-25-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:36 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v4: +- add reviewed-by from Simon + + board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- + 1 file changed, 62 insertions(+), 4 deletions(-) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index fe22067f6571..d294c7ae0136 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -5,6 +5,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + } + #endif + +-int ft_board_setup(void *fdt, bd_t *bd) ++static void ft_mac_address_setup(void *fdt) + { + const void *cboot_fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; +@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + + path = fdt_get_alias(fdt, "ethernet"); + if (!path) +- return 0; ++ return; + + debug("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); +- if (offset < 0) +- return 0; ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } + + if (is_valid_ethaddr(local_mac)) { + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, +@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) + debug("MAC address set: %pM\n", mac); + } + } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@13e00000/display-hub@15200000/display@15200000", ++ "/host1x@13e00000/display-hub@15200000/display@15210000", ++ "/host1x@13e00000/display-hub@15200000/display@15220000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } + +From patchwork Mon Apr 15 09:32:37 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,25/27] ARM: tegra: Rename pcie-controller to pcie +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085545 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-26-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:37 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Recent versions of DTC have checks for PCI host bridge device tree nodes +that are named something other than "pci" or "pcie". Fix all occurrences +of such nodes for Tegra boards to avoid potential warnings from DTC. + +Signed-off-by: Thierry Reding +--- + arch/arm/dts/tegra124-apalis.dts | 2 +- + arch/arm/dts/tegra124-cei-tk1-som.dts | 2 +- + arch/arm/dts/tegra124-jetson-tk1.dts | 2 +- + arch/arm/dts/tegra124.dtsi | 2 +- + arch/arm/dts/tegra186-p2771-0000-000.dts | 2 +- + arch/arm/dts/tegra186-p2771-0000-500.dts | 2 +- + arch/arm/dts/tegra186.dtsi | 2 +- + arch/arm/dts/tegra20-harmony.dts | 2 +- + arch/arm/dts/tegra20-trimslice.dts | 2 +- + arch/arm/dts/tegra20.dtsi | 2 +- + arch/arm/dts/tegra210-p2371-2180.dts | 2 +- + arch/arm/dts/tegra210.dtsi | 2 +- + arch/arm/dts/tegra30-apalis.dts | 2 +- + arch/arm/dts/tegra30-beaver.dts | 2 +- + arch/arm/dts/tegra30-cardhu.dts | 2 +- + arch/arm/dts/tegra30.dtsi | 2 +- + 16 files changed, 16 insertions(+), 16 deletions(-) + +diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts +index fe08d3ea7304..a962c0a2f0ae 100644 +--- a/arch/arm/dts/tegra124-apalis.dts ++++ b/arch/arm/dts/tegra124-apalis.dts +@@ -77,7 +77,7 @@ + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + avddio-pex-supply = <&vdd_1v05>; + avdd-pex-pll-supply = <&vdd_1v05>; +diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts b/arch/arm/dts/tegra124-cei-tk1-som.dts +index b1dd4181ac03..e5b41f3183cd 100644 +--- a/arch/arm/dts/tegra124-cei-tk1-som.dts ++++ b/arch/arm/dts/tegra124-cei-tk1-som.dts +@@ -29,7 +29,7 @@ + reg = <0x80000000 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + avddio-pex-supply = <&vdd_1v05_run>; +diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts +index d6420436cde8..59e080a8af6f 100644 +--- a/arch/arm/dts/tegra124-jetson-tk1.dts ++++ b/arch/arm/dts/tegra124-jetson-tk1.dts +@@ -29,7 +29,7 @@ + reg = <0x80000000 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + avddio-pex-supply = <&vdd_1v05_run>; +diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi +index 83d63480471b..f473ba28e4a6 100644 +--- a/arch/arm/dts/tegra124.dtsi ++++ b/arch/arm/dts/tegra124.dtsi +@@ -14,7 +14,7 @@ + interrupt-parent = <&lic>; + + +- pcie-controller@01003000 { ++ pcie@1003000 { + compatible = "nvidia,tegra124-pcie"; + device_type = "pci"; + reg = <0x01003000 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts +index d97c6fd3d09a..84e850d6fca6 100644 +--- a/arch/arm/dts/tegra186-p2771-0000-000.dts ++++ b/arch/arm/dts/tegra186-p2771-0000-000.dts +@@ -11,7 +11,7 @@ + power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra186-p2771-0000-500.dts b/arch/arm/dts/tegra186-p2771-0000-500.dts +index 393a8b246a0b..1ac8ab431e90 100644 +--- a/arch/arm/dts/tegra186-p2771-0000-500.dts ++++ b/arch/arm/dts/tegra186-p2771-0000-500.dts +@@ -11,7 +11,7 @@ + power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi +index dd9e3b869de7..0a9db9825b85 100644 +--- a/arch/arm/dts/tegra186.dtsi ++++ b/arch/arm/dts/tegra186.dtsi +@@ -217,7 +217,7 @@ + #interrupt-cells = <2>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + compatible = "nvidia,tegra186-pcie"; + device_type = "pci"; + reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts +index 0c907054dbd4..7fe7d52096c4 100644 +--- a/arch/arm/dts/tegra20-harmony.dts ++++ b/arch/arm/dts/tegra20-harmony.dts +@@ -599,7 +599,7 @@ + nvidia,sys-clock-req-active-high; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + status = "okay"; + + avdd-pex-supply = <&pci_vdd_reg>; +diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts +index 31f509ab12c8..e19001ee2bdf 100644 +--- a/arch/arm/dts/tegra20-trimslice.dts ++++ b/arch/arm/dts/tegra20-trimslice.dts +@@ -30,7 +30,7 @@ + spi-max-frequency = <25000000>; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + status = "okay"; + + avdd-pex-supply = <&pci_vdd_reg>; +diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi +index e21ee258b378..275b3432bd88 100644 +--- a/arch/arm/dts/tegra20.dtsi ++++ b/arch/arm/dts/tegra20.dtsi +@@ -580,7 +580,7 @@ + reset-names = "fuse"; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + compatible = "nvidia,tegra20-pcie"; + device_type = "pci"; + reg = <0x80003000 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts +index da4349bd039f..c2f497c524af 100644 +--- a/arch/arm/dts/tegra210-p2371-2180.dts ++++ b/arch/arm/dts/tegra210-p2371-2180.dts +@@ -21,7 +21,7 @@ + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi +index 229fed04529a..3ec54b11c43f 100644 +--- a/arch/arm/dts/tegra210.dtsi ++++ b/arch/arm/dts/tegra210.dtsi +@@ -11,7 +11,7 @@ + #address-cells = <2>; + #size-cells = <2>; + +- pcie-controller@01003000 { ++ pcie@1003000 { + compatible = "nvidia,tegra210-pcie"; + device_type = "pci"; + reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts +index 1a9ce2720acd..77502dfdb478 100644 +--- a/arch/arm/dts/tegra30-apalis.dts ++++ b/arch/arm/dts/tegra30-apalis.dts +@@ -32,7 +32,7 @@ + reg = <0x80000000 0x40000000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + avdd-pexa-supply = <&vdd2_reg>; + vdd-pexa-supply = <&vdd2_reg>; +diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts +index f5fbbe849e26..9bb097b08136 100644 +--- a/arch/arm/dts/tegra30-beaver.dts ++++ b/arch/arm/dts/tegra30-beaver.dts +@@ -28,7 +28,7 @@ + reg = <0x80000000 0x7ff00000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + + avdd-pexa-supply = <&ldo1_reg>; +diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts +index 5b9798c5a874..7534861e40d9 100644 +--- a/arch/arm/dts/tegra30-cardhu.dts ++++ b/arch/arm/dts/tegra30-cardhu.dts +@@ -27,7 +27,7 @@ + reg = <0x80000000 0x40000000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + + /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ +diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi +index 5030065cbdfe..f198bc0edbe8 100644 +--- a/arch/arm/dts/tegra30.dtsi ++++ b/arch/arm/dts/tegra30.dtsi +@@ -10,7 +10,7 @@ + compatible = "nvidia,tegra30"; + interrupt-parent = <&lic>; + +- pcie-controller@00003000 { ++ pcie@3000 { + compatible = "nvidia,tegra30-pcie"; + device_type = "pci"; + reg = <0x00003000 0x00000800 /* PADS registers */ + +From patchwork Mon Apr 15 09:32:38 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 26/27] ARM: tegra: Mark built-in Ethernet as default on Jetson TX2 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085540 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-27-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:38 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Add an "ethernet" alias that points to the default network interface, +which is the built-in EQoS on Jetson TX2. + +Signed-off-by: Thierry Reding +--- + arch/arm/dts/tegra186-p2771-0000.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/dts/tegra186-p2771-0000.dtsi b/arch/arm/dts/tegra186-p2771-0000.dtsi +index a1319dc4936f..7cda0b41f74b 100644 +--- a/arch/arm/dts/tegra186-p2771-0000.dtsi ++++ b/arch/arm/dts/tegra186-p2771-0000.dtsi +@@ -9,6 +9,7 @@ + }; + + aliases { ++ ethernet = "/ethernet@2490000"; + mmc0 = "/sdhci@3460000"; + mmc1 = "/sdhci@3400000"; + i2c0 = "/bpmp/i2c"; +@@ -28,6 +29,7 @@ + ethernet@2490000 { + status = "okay"; + phy-reset-gpios = <&gpio_main TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + i2c@3160000 { + +From patchwork Mon Apr 15 09:32:39 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085538 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:39 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The Jetson Nano Developer Kit is a Tegra X1 based development board. It +is similar to Jetson TX1 but it is not pin compatible. It features 4 GB +of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot +used for storage. + +HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 +and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI +Ethernet controller provides onboard network connectivity. + +A 40-pin header on the board can be used to extend the capabilities and +exposed interfaces of the Jetson Nano. + +Signed-off-by: Thierry Reding +--- +Changes in v5: +- add "ethernet" alias and store an empty MAC address as placeholder + +Changes in v3: +- rename "Development Kit" to "Developer Kit" +- drop alias for non-existent eMMC interface +- import pinmux from A02 spreadsheet +- drop preboot support for now +- fixup text base + + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++ + arch/arm/mach-tegra/tegra210/Kconfig | 7 + + board/nvidia/p3450-0000/Kconfig | 12 + + board/nvidia/p3450-0000/MAINTAINERS | 6 + + board/nvidia/p3450-0000/Makefile | 8 + + board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++ + .../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++ + configs/p3450-0000_defconfig | 55 ++++ + include/configs/p3450-0000.h | 34 +++ + 10 files changed, 722 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts + create mode 100644 board/nvidia/p3450-0000/Kconfig + create mode 100644 board/nvidia/p3450-0000/MAINTAINERS + create mode 100644 board/nvidia/p3450-0000/Makefile + create mode 100644 board/nvidia/p3450-0000/p3450-0000.c + create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h + create mode 100644 configs/p3450-0000_defconfig + create mode 100644 include/configs/p3450-0000.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 8167cdb4e856..f8d3441663c0 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ + tegra210-e2220-1170.dtb \ + tegra210-p2371-0000.dtb \ + tegra210-p2371-2180.dtb \ +- tegra210-p2571.dtb ++ tegra210-p2571.dtb \ ++ tegra210-p3450-0000.dtb + + dtb-$(CONFIG_ARCH_MVEBU) += \ + armada-3720-db.dtb \ +diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts +new file mode 100644 +index 000000000000..d45ee9afc016 +--- /dev/null ++++ b/arch/arm/dts/tegra210-p3450-0000.dts +@@ -0,0 +1,135 @@ ++/dts-v1/; ++ ++#include "tegra210.dtsi" ++ ++/ { ++ model = "NVIDIA Jetson Nano Developer Kit"; ++ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; ++ ++ chosen { ++ stdout-path = &uarta; ++ }; ++ ++ aliases { ++ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; ++ i2c0 = "/i2c@7000d000"; ++ i2c2 = "/i2c@7000c400"; ++ i2c3 = "/i2c@7000c500"; ++ i2c4 = "/i2c@7000c700"; ++ sdhci0 = "/sdhci@700b0000"; ++ spi0 = "/spi@70410000"; ++ usb0 = "/usb@7d000000"; ++ }; ++ ++ memory { ++ reg = <0x0 0x80000000 0x0 0xc0000000>; ++ }; ++ ++ pcie@1003000 { ++ status = "okay"; ++ ++ pci@1,0 { ++ status = "okay"; ++ }; ++ ++ pci@2,0 { ++ status = "okay"; ++ ++ ethernet@0,0 { ++ reg = <0x000000 0 0 0 0>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; ++ }; ++ }; ++ }; ++ ++ serial@70006000 { ++ status = "okay"; ++ }; ++ ++ padctl@7009f000 { ++ pinctrl-0 = <&padctl_default>; ++ pinctrl-names = "default"; ++ ++ padctl_default: pinmux { ++ xusb { ++ nvidia,lanes = "otg-1", "otg-2"; ++ nvidia,function = "xusb"; ++ nvidia,iddq = <0>; ++ }; ++ ++ usb3 { ++ nvidia,lanes = "pcie-5", "pcie-6"; ++ nvidia,function = "usb3"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x1 { ++ nvidia,lanes = "pcie-0"; ++ nvidia,function = "pcie-x1"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x4 { ++ nvidia,lanes = "pcie-1", "pcie-2", ++ "pcie-3", "pcie-4"; ++ nvidia,function = "pcie-x4"; ++ nvidia,iddq = <0>; ++ }; ++ ++ sata { ++ nvidia,lanes = "sata-0"; ++ nvidia,function = "sata"; ++ nvidia,iddq = <0>; ++ }; ++ }; ++ }; ++ ++ sdhci@700b0000 { ++ status = "okay"; ++ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; ++ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ }; ++ ++ i2c@7000c400 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c500 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c700 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000d000 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ spi@70410000 { ++ status = "okay"; ++ }; ++ ++ usb@7d000000 { ++ status = "okay"; ++ dr_mode = "peripheral"; ++ }; ++ ++ clocks { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ clk32k_in: clock@0 { ++ compatible = "fixed-clock"; ++ reg = <0>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig +index 250738aed312..ea28392c0f3a 100644 +--- a/arch/arm/mach-tegra/tegra210/Kconfig ++++ b/arch/arm/mach-tegra/tegra210/Kconfig +@@ -35,6 +35,12 @@ config TARGET_P2571 + help + P2571 is a P2530 married to a P1963 I/O board + ++config TARGET_P3450_0000 ++ bool "NVIDIA Jetson Nano Developer Kit" ++ select BOARD_LATE_INIT ++ help ++ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. ++ + endchoice + + config SYS_SOC +@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" + source "board/nvidia/p2371-0000/Kconfig" + source "board/nvidia/p2371-2180/Kconfig" + source "board/nvidia/p2571/Kconfig" ++source "board/nvidia/p3450-0000/Kconfig" + + endif +diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig +new file mode 100644 +index 000000000000..7a08cd88675f +--- /dev/null ++++ b/board/nvidia/p3450-0000/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_P3450_0000 ++ ++config SYS_BOARD ++ default "p3450-0000" ++ ++config SYS_VENDOR ++ default "nvidia" ++ ++config SYS_CONFIG_NAME ++ default "p3450-0000" ++ ++endif +diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS +new file mode 100644 +index 000000000000..40700066bf39 +--- /dev/null ++++ b/board/nvidia/p3450-0000/MAINTAINERS +@@ -0,0 +1,6 @@ ++P3450-0000 BOARD ++M: Tom Warren ++S: Maintained ++F: board/nvidia/p3450-0000/ ++F: include/configs/p3450-0000.h ++F: configs/p3450-0000_defconfig +diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile +new file mode 100644 +index 000000000000..993c506d8200 +--- /dev/null ++++ b/board/nvidia/p3450-0000/Makefile +@@ -0,0 +1,8 @@ ++# ++# (C) Copyright 2018 ++# NVIDIA Corporation ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += p3450-0000.o +diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c +new file mode 100644 +index 000000000000..432179e92605 +--- /dev/null ++++ b/board/nvidia/p3450-0000/p3450-0000.c +@@ -0,0 +1,198 @@ ++/* ++ * (C) Copyright 2018 ++ * NVIDIA Corporation ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../p2571/max77620_init.h" ++#include "pinmux-config-p3450-0000.h" ++ ++void pin_mux_mmc(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ ++ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return; ++ } ++ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xF2; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); ++ ++ /* Disable LDO4 discharge */ ++ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) { ++ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); ++ } else { ++ val &= ~BIT(1); /* ADE */ ++ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); ++ } ++ ++ /* Set MBLPD */ ++ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) { ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } else { ++ val |= BIT(6); /* MBLPD */ ++ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } ++} ++ ++/* ++ * Routine: pinmux_init ++ * Description: Do individual peripheral pinmux configs ++ */ ++void pinmux_init(void) ++{ ++ pinmux_clear_tristate_input_clamping(); ++ ++ gpio_config_table(p3450_0000_gpio_inits, ++ ARRAY_SIZE(p3450_0000_gpio_inits)); ++ ++ pinmux_config_pingrp_table(p3450_0000_pingrps, ++ ARRAY_SIZE(p3450_0000_pingrps)); ++ ++ pinmux_config_drvgrp_table(p3450_0000_drvgrps, ++ ARRAY_SIZE(p3450_0000_drvgrps)); ++} ++ ++#ifdef CONFIG_PCI_TEGRA ++int tegra_pcie_board_init(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ ++ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return -1; ++ } ++ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xCA; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); ++ ++ return 0; ++} ++#endif /* PCI */ ++ ++static void ft_mac_address_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); ++ ++ return 0; ++} +diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +new file mode 100644 +index 000000000000..722da4973542 +--- /dev/null ++++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +@@ -0,0 +1,265 @@ ++/* ++ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* ++ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! ++ * ++ * To generate this file, use the tegra-pinmux-scripts tool available from ++ * https://github.com/NVIDIA/tegra-pinmux-scripts ++ * Run "board-to-uboot.py p3450-0000". ++ */ ++ ++#ifndef _PINMUX_CONFIG_P3450_0000_H_ ++#define _PINMUX_CONFIG_P3450_0000_H_ ++ ++#define GPIO_INIT(_port, _gpio, _init) \ ++ { \ ++ .gpio = TEGRA_GPIO(_port, _gpio), \ ++ .init = TEGRA_GPIO_INIT_##_init, \ ++ } ++ ++static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { ++ /* port, pin, init_val */ ++ GPIO_INIT(A, 5, IN), ++ GPIO_INIT(A, 6, OUT1), ++ GPIO_INIT(B, 4, IN), ++ GPIO_INIT(B, 5, IN), ++ GPIO_INIT(B, 6, IN), ++ GPIO_INIT(B, 7, IN), ++ GPIO_INIT(C, 0, IN), ++ GPIO_INIT(C, 1, IN), ++ GPIO_INIT(C, 2, IN), ++ GPIO_INIT(C, 3, IN), ++ GPIO_INIT(C, 4, IN), ++ GPIO_INIT(E, 6, IN), ++ GPIO_INIT(G, 2, IN), ++ GPIO_INIT(G, 3, IN), ++ GPIO_INIT(H, 0, OUT0), ++ GPIO_INIT(H, 2, IN), ++ GPIO_INIT(H, 3, OUT0), ++ GPIO_INIT(H, 4, OUT0), ++ GPIO_INIT(H, 5, IN), ++ GPIO_INIT(H, 6, IN), ++ GPIO_INIT(H, 7, OUT0), ++ GPIO_INIT(I, 0, OUT0), ++ GPIO_INIT(I, 1, IN), ++ GPIO_INIT(I, 2, OUT0), ++ GPIO_INIT(J, 4, IN), ++ GPIO_INIT(J, 5, IN), ++ GPIO_INIT(J, 6, IN), ++ GPIO_INIT(J, 7, IN), ++ GPIO_INIT(S, 5, IN), ++ GPIO_INIT(S, 7, OUT0), ++ GPIO_INIT(T, 0, OUT0), ++ GPIO_INIT(V, 0, IN), ++ GPIO_INIT(V, 1, IN), ++ GPIO_INIT(X, 3, OUT1), ++ GPIO_INIT(X, 4, IN), ++ GPIO_INIT(X, 5, IN), ++ GPIO_INIT(X, 6, IN), ++ GPIO_INIT(Y, 1, IN), ++ GPIO_INIT(Y, 2, IN), ++ GPIO_INIT(Z, 0, IN), ++ GPIO_INIT(Z, 2, IN), ++ GPIO_INIT(Z, 3, OUT0), ++ GPIO_INIT(BB, 0, IN), ++ GPIO_INIT(CC, 4, IN), ++ GPIO_INIT(DD, 0, IN), ++}; ++ ++#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ ++ { \ ++ .pingrp = PMUX_PINGRP_##_pingrp, \ ++ .func = PMUX_FUNC_##_mux, \ ++ .pull = PMUX_PULL_##_pull, \ ++ .tristate = PMUX_TRI_##_tri, \ ++ .io = PMUX_PIN_##_io, \ ++ .od = PMUX_PIN_OD_##_od, \ ++ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ ++ .lock = PMUX_PIN_LOCK_DEFAULT, \ ++ } ++ ++static const struct pmux_pingrp_config p3450_0000_pingrps[] = { ++ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ ++ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++}; ++ ++#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ ++ { \ ++ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ ++ .slwf = _slwf, \ ++ .slwr = _slwr, \ ++ .drvup = _drvup, \ ++ .drvdn = _drvdn, \ ++ .lpmd = PMUX_LPMD_##_lpmd, \ ++ .schmt = PMUX_SCHMT_##_schmt, \ ++ .hsm = PMUX_HSM_##_hsm, \ ++ } ++ ++static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { ++}; ++ ++#endif /* PINMUX_CONFIG_P3450_0000_H */ +diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig +new file mode 100644 +index 000000000000..3a95028279d3 +--- /dev/null ++++ b/configs/p3450-0000_defconfig +@@ -0,0 +1,55 @@ ++CONFIG_ARM=y ++CONFIG_TEGRA=y ++CONFIG_SYS_TEXT_BASE=0x80080000 ++CONFIG_TEGRA210=y ++CONFIG_TARGET_P3450_0000=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_STDIO_DEREGISTER=y ++CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_CMD_NFS is not set ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_OF_LIVE=y ++CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_SYS_I2C_TEGRA=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_MODE=0 ++CONFIG_SF_DEFAULT_SPEED=24000000 ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_RTL8169=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCI_TEGRA=y ++CONFIG_SYS_NS16550=y ++CONFIG_TEGRA114_SPI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_TEGRA=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0955 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x701a ++CONFIG_CI_UDC=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++# CONFIG_ENV_IS_IN_MMC is not set +diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h +new file mode 100644 +index 000000000000..ee819b7573b0 +--- /dev/null ++++ b/include/configs/p3450-0000.h +@@ -0,0 +1,34 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _P3450_0000_H ++#define _P3450_0000_H ++ ++#include ++ ++#include "tegra210-common.h" ++ ++/* High-level configuration options */ ++#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" ++ ++/* Board-specific serial config */ ++#define CONFIG_TEGRA_ENABLE_UARTA ++ ++/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 0) \ ++ func(PXE, pxe, na) \ ++ func(DHCP, dhcp, na) ++ ++/* SPI */ ++#define CONFIG_SPI_FLASH_SIZE (4 << 20) ++ ++#include "tegra-common-usb-gadget.h" ++#include "tegra-common-post.h" ++ ++/* Crystal is 38.4MHz. clk_m runs at half that rate */ ++#define COUNTER_FREQUENCY 19200000 ++ ++#endif /* _P3450_0000_H */ diff --git a/arm-tegra-defaine-fdtfile-for-all-devices.patch b/arm-tegra-defaine-fdtfile-for-all-devices.patch new file mode 100644 index 0000000..50c1c1f --- /dev/null +++ b/arm-tegra-defaine-fdtfile-for-all-devices.patch @@ -0,0 +1,162 @@ +From 1e93c98419e6a1ea62ef697ed915617024eb6da0 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Apr 2019 14:03:33 +0100 +Subject: [PATCH] arm: tegra: defaine fdtfile for all devices + +Signed-off-by: Peter Robinson +--- + include/configs/tegra-common.h | 6 ++++++ + include/configs/tegra114-common.h | 1 + + include/configs/tegra124-common.h | 1 + + include/configs/tegra186-common.h | 1 + + include/configs/tegra20-common.h | 1 + + include/configs/tegra210-common.h | 1 + + include/configs/tegra30-common.h | 1 + + 7 files changed, 12 insertions(+) + +diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h +index 84f671d00c..c3e16d8cfc 100644 +--- a/include/configs/tegra-common.h ++++ b/include/configs/tegra-common.h +@@ -56,6 +56,12 @@ + #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) + #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) + ++#ifdef CONFIG_ARM64 ++#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" ++#else ++#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" ++#endif ++ + /*----------------------------------------------------------------------- + * Physical Memory Map + */ +diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h +index 1aa4412645..0c44a7673b 100644 +--- a/include/configs/tegra114-common.h ++++ b/include/configs/tegra114-common.h +@@ -50,6 +50,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h +index 3530684164..29da06c8f7 100644 +--- a/include/configs/tegra124-common.h ++++ b/include/configs/tegra124-common.h +@@ -52,6 +52,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h +index b4936cc731..5c3ad35c76 100644 +--- a/include/configs/tegra186-common.h ++++ b/include/configs/tegra186-common.h +@@ -49,6 +49,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h +index e58477e289..73c94d993b 100644 +--- a/include/configs/tegra20-common.h ++++ b/include/configs/tegra20-common.h +@@ -51,6 +51,7 @@ + "scriptaddr=0x10000000\0" \ + "pxefile_addr_r=0x10100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x03000000\0" \ + "ramdisk_addr_r=0x03100000\0" + +diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h +index 1c533118ad..69e446ed58 100644 +--- a/include/configs/tegra210-common.h ++++ b/include/configs/tegra210-common.h +@@ -46,6 +46,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h +index 2d8948d9d9..27696009cd 100644 +--- a/include/configs/tegra30-common.h ++++ b/include/configs/tegra30-common.h +@@ -47,6 +47,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +-- +2.21.0 +From 267dc15aa8f247362b04387d6a1ab01d94d41aef Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Apr 2019 15:44:59 +0100 +Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2 + variants + +Signed-off-by: Peter Robinson +--- + include/config_distro_bootcmd.h | 2 ++ + include/configs/tegra186-common.h | 7 ++++++- + 2 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h +index 4993303f4d..cd317bb457 100644 +--- a/include/config_distro_bootcmd.h ++++ b/include/config_distro_bootcmd.h +@@ -118,8 +118,10 @@ + "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ + "fi; " + #else ++#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK + #define BOOTENV_EFI_SET_FDTFILE_FALLBACK + #endif ++#endif + + + #define BOOTENV_SHARED_EFI \ +diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h +index 5c3ad35c76..d5f21e0907 100644 +--- a/include/configs/tegra186-common.h ++++ b/include/configs/tegra186-common.h +@@ -20,6 +20,12 @@ + /* Generic Interrupt Controller */ + #define CONFIG_GICV2 + ++#undef FDTFILE ++#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ ++ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ ++ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ ++ "fi; " ++ + /* + * Memory layout for where various images get loaded by boot scripts: + * +@@ -49,7 +55,6 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ +- "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +-- +2.21.0 + diff --git a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch index 2896af8..237b4a6 100644 --- a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +++ b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch @@ -1,16 +1,15 @@ -From patchwork Fri Mar 8 19:51:25 2019 +From patchwork Tue Apr 16 16:24:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, - 1/3] net: eth-uclass: Write MAC address to hardware after probe +Subject: [U-Boot, v2, + 1/2] net: eth-uclass: Write MAC address to hardware after probe X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053669 -Message-Id: <20190308195127.32711-1-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:25 +0100 +X-Patchwork-Id: 1086417 +Message-Id: <20190416162417.25799-1-thierry.reding@gmail.com> +To: Simon Glass , Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:24:16 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -44,104 +43,155 @@ index 2ef20df19203..4225aabf1fa1 100644 } -From patchwork Fri Mar 8 19:51:26 2019 +From patchwork Tue Apr 16 16:24:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,2/3] net: rtl8169: Implement ->hwaddr_write() callback +Subject: [U-Boot,v2,2/2] net: eth-uclass: Support device tree MAC addresses X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053670 -Message-Id: <20190308195127.32711-2-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:26 +0100 +X-Patchwork-Id: 1086418 +Message-Id: <20190416162417.25799-2-thierry.reding@gmail.com> +To: Simon Glass , Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:24:17 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -Implement this callback that allows the MAC address to be set for the -Ethernet card. This is necessary in order for the device to be able to -receive packets for the MAC address that U-Boot advertises. +Add the standard Ethernet device tree bindings (imported from v5.0 of +the Linux kernel) and implement support for reading the MAC address for +Ethernet devices in the Ethernet uclass. If the "mac-address" property +exists, the MAC address will be parsed from that. If that property does +not exist, the "local-mac-address" property will be tried as fallback. +MAC addresses from device tree take precedence over the ones stored in +a network interface card's ROM. + +Acked-by: Joe Hershberger Signed-off-by: Thierry Reding --- - drivers/net/rtl8169.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) +Changes in v2: +- use dev_read_u8_array_ptr() -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index a78f3d233f1a..27e27b34176b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) + .../devicetree/bindings/net/ethernet.txt | 66 +++++++++++++++++++ + net/eth-uclass.c | 26 +++++++- + 2 files changed, 89 insertions(+), 3 deletions(-) + create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt + +diff --git a/Documentation/devicetree/bindings/net/ethernet.txt b/Documentation/devicetree/bindings/net/ethernet.txt +new file mode 100644 +index 000000000000..cfc376bc977a +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/ethernet.txt +@@ -0,0 +1,66 @@ ++The following properties are common to the Ethernet controllers: ++ ++NOTE: All 'phy*' properties documented below are Ethernet specific. For the ++generic PHY 'phys' property, see ++Documentation/devicetree/bindings/phy/phy-bindings.txt. ++ ++- local-mac-address: array of 6 bytes, specifies the MAC address that was ++ assigned to the network device; ++- mac-address: array of 6 bytes, specifies the MAC address that was last used by ++ the boot program; should be used in cases where the MAC address assigned to ++ the device by the boot program is different from the "local-mac-address" ++ property; ++- nvmem-cells: phandle, reference to an nvmem node for the MAC address; ++- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used; ++- max-speed: number, specifies maximum speed in Mbit/s supported by the device; ++- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than ++ the maximum frame size (there's contradiction in the Devicetree ++ Specification). ++- phy-mode: string, operation mode of the PHY interface. This is now a de-facto ++ standard property; supported values are: ++ * "internal" ++ * "mii" ++ * "gmii" ++ * "sgmii" ++ * "qsgmii" ++ * "tbi" ++ * "rev-mii" ++ * "rmii" ++ * "rgmii" (RX and TX delays are added by the MAC when required) ++ * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the ++ MAC should not add the RX or TX delays in this case) ++ * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC ++ should not add an RX delay in this case) ++ * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC ++ should not add an TX delay in this case) ++ * "rtbi" ++ * "smii" ++ * "xgmii" ++ * "trgmii" ++ * "2000base-x", ++ * "2500base-x", ++ * "rxaui" ++ * "xaui" ++ * "10gbase-kr" (10GBASE-KR, XFI, SFI) ++- phy-connection-type: the same as "phy-mode" property but described in the ++ Devicetree Specification; ++- phy-handle: phandle, specifies a reference to a node representing a PHY ++ device; this property is described in the Devicetree Specification and so ++ preferred; ++- phy: the same as "phy-handle" property, not recommended for new bindings. ++- phy-device: the same as "phy-handle" property, not recommended for new ++ bindings. ++- rx-fifo-depth: the size of the controller's receive fifo in bytes. This ++ is used for components that can have configurable receive fifo sizes, ++ and is useful for determining certain configuration settings such as ++ flow control thresholds. ++- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This ++ is used for components that can have configurable fifo sizes. ++- managed: string, specifies the PHY management type. Supported values are: ++ "auto", "in-band-status". "auto" is the default, it usess MDIO for ++ management if fixed-link is not specified. ++ ++Child nodes of the Ethernet controller are typically the individual PHY devices ++connected via the MDIO bus (sometimes the MDIO bus controller is separate). ++They are described in the phy.txt file in this same directory. ++For non-MDIO PHY management see fixed-link.txt. +diff --git a/net/eth-uclass.c b/net/eth-uclass.c +index 4225aabf1fa1..c6d5ec013bd8 100644 +--- a/net/eth-uclass.c ++++ b/net/eth-uclass.c +@@ -455,6 +455,23 @@ static int eth_pre_unbind(struct udevice *dev) + return 0; } - #endif -+#ifdef CONFIG_DM_ETH -+static int rtl8169_write_hwaddr(struct udevice *dev) ++static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN]) +{ -+ struct eth_pdata *plat = dev_get_platdata(dev); -+ unsigned int i; ++ const uint8_t *p; + -+ RTL_W8(Cfg9346, Cfg9346_Unlock); ++ p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN); ++ if (!p) ++ p = dev_read_u8_array_ptr(dev, "local-mac-address", ARP_HLEN); + -+ for (i = 0; i < MAC_ADDR_LEN; i++) -+ RTL_W8(MAC0 + i, plat->enetaddr[i]); ++ if (!p) { ++ memset(mac, 0, ARP_HLEN); ++ return false; ++ } + -+ RTL_W8(Cfg9346, Cfg9346_Lock); -+ -+ return 0; ++ memcpy(mac, p, ARP_HLEN); ++ return true; +} -+#endif + - /************************************************************************** - INIT - Look for an adapter, this routine's visible to the outside - ***************************************************************************/ -@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { - .send = rtl8169_eth_send, - .recv = rtl8169_eth_recv, - .stop = rtl8169_eth_stop, -+ .write_hwaddr = rtl8169_write_hwaddr, - }; + static int eth_post_probe(struct udevice *dev) + { + struct eth_device_priv *priv = dev->uclass_priv; +@@ -489,9 +506,12 @@ static int eth_post_probe(struct udevice *dev) - static const struct udevice_id rtl8169_eth_ids[] = { - -From patchwork Fri Mar 8 19:51:27 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,3/3] net: rtl8169: Support RTL-8168h/8111h -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053671 -Message-Id: <20190308195127.32711-3-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:27 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This version of the RTL-8168 is present on some development boards and -is compatible with this driver. Add support for identifying this version -of the chip so that U-Boot won't complain about it being unknown. - -Signed-off-by: Thierry Reding ---- - drivers/net/rtl8169.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index 27e27b34176b..bc052e72564b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -257,6 +257,7 @@ static struct { - {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, - {"RTL-8101e", 0x34, 0xff7e1880,}, - {"RTL-8100e", 0x32, 0xff7e1880,}, -+ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, - }; + priv->state = ETH_STATE_INIT; - enum _DescStatusBit { +- /* Check if the device has a MAC address in ROM */ +- if (eth_get_ops(dev)->read_rom_hwaddr) +- eth_get_ops(dev)->read_rom_hwaddr(dev); ++ /* Check if the device has a MAC address in device tree */ ++ if (!eth_dev_get_mac_address(dev, pdata->enetaddr)) { ++ /* Check if the device has a MAC address in ROM */ ++ if (eth_get_ops(dev)->read_rom_hwaddr) ++ eth_get_ops(dev)->read_rom_hwaddr(dev); ++ } + + eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr); + if (!is_zero_ethaddr(env_enetaddr)) { diff --git a/net-rtl8169-Implement---hwaddr_write-callback.patch b/net-rtl8169-Implement---hwaddr_write-callback.patch new file mode 100644 index 0000000..984e860 --- /dev/null +++ b/net-rtl8169-Implement---hwaddr_write-callback.patch @@ -0,0 +1,102 @@ +From patchwork Tue Apr 16 16:20:29 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, RESEND, + 1/2] net: rtl8169: Implement ->hwaddr_write() callback +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1086411 +Message-Id: <20190416162030.13590-1-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:20:29 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Implement this callback that allows the MAC address to be set for the +Ethernet card. This is necessary in order for the device to be able to +receive packets for the MAC address that U-Boot advertises. + +Signed-off-by: Thierry Reding +Acked-by: Joe Hershberger +--- + drivers/net/rtl8169.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index a78f3d233f1a..27e27b34176b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) + } + #endif + ++#ifdef CONFIG_DM_ETH ++static int rtl8169_write_hwaddr(struct udevice *dev) ++{ ++ struct eth_pdata *plat = dev_get_platdata(dev); ++ unsigned int i; ++ ++ RTL_W8(Cfg9346, Cfg9346_Unlock); ++ ++ for (i = 0; i < MAC_ADDR_LEN; i++) ++ RTL_W8(MAC0 + i, plat->enetaddr[i]); ++ ++ RTL_W8(Cfg9346, Cfg9346_Lock); ++ ++ return 0; ++} ++#endif ++ + /************************************************************************** + INIT - Look for an adapter, this routine's visible to the outside + ***************************************************************************/ +@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { + .send = rtl8169_eth_send, + .recv = rtl8169_eth_recv, + .stop = rtl8169_eth_stop, ++ .write_hwaddr = rtl8169_write_hwaddr, + }; + + static const struct udevice_id rtl8169_eth_ids[] = { + +From patchwork Tue Apr 16 16:20:30 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,RESEND,2/2] net: rtl8169: Support RTL-8168h/8111h +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1086412 +Message-Id: <20190416162030.13590-2-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:20:30 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This version of the RTL-8168 is present on some development boards and +is compatible with this driver. Add support for identifying this version +of the chip so that U-Boot won't complain about it being unknown. + +Signed-off-by: Thierry Reding +Acked-by: Joe Hershberger +--- + drivers/net/rtl8169.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index 27e27b34176b..bc052e72564b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -257,6 +257,7 @@ static struct { + {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, + {"RTL-8101e", 0x34, 0xff7e1880,}, + {"RTL-8100e", 0x32, 0xff7e1880,}, ++ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, + }; + + enum _DescStatusBit { diff --git a/sources b/sources index 71120c2..176ad87 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04-rc4.tar.bz2) = 33a57e4acb51dbe04123055b159a5b3a933ea8340aa81a4148572ee5fc12288413a6c6c0b80b6fe099ac79ea6359be2d9034ead1edfcc0403895f3f8eb56746e +SHA512 (u-boot-2019.04.tar.bz2) = 357fe94b5b043885472ea1b7dcbbac601d0c1f7c64f71026b9e1279b53160847c6478d6ec98a2f678e562db21e39037d6e6fbc1e6b19beaac02ca14e93c5de0e diff --git a/uboot-tools.spec b/uboot-tools.spec index 688536a..83a5539 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc4 Name: uboot-tools Version: 2019.04 -Release: 0.9%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -18,17 +18,19 @@ Source5: 10-devicetree.install Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes -Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch3: usb-kbd-fixes.patch -Patch4: uefi-rc5-fixes.patch +Patch2: usb-kbd-fixes.patch +Patch3: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch4: uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch +Patch5: uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch11: dragonboard-fixes.patch -Patch12: ARM-tegra-Miscellaneous-improvements.patch -Patch13: ARM-tegra-Add-support-for-framebuffer-carveouts.patch -Patch14: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +Patch12: ARM-tegra-Add-support-for-framebuffer-carveouts.patch +Patch13: ARM-tegra-Miscellaneous-improvements.patch Patch15: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +Patch16: net-rtl8169-Implement---hwaddr_write-callback.patch +Patch17: arm-tegra-defaine-fdtfile-for-all-devices.patch BuildRequires: bc BuildRequires: dtc @@ -303,6 +305,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Apr 14 2019 Peter Robinson 2019.04-1 +- 2019.04 +- Fixes for AllWinner and NVIDIA Jetson devices + * Thu Apr 4 2019 Peter Robinson 2019.04-0.9-rc4 - Latest Tegra patch revision diff --git a/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch b/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch new file mode 100644 index 0000000..33c93b6 --- /dev/null +++ b/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch @@ -0,0 +1,54 @@ +From patchwork Fri Apr 12 18:26:28 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, + U-boot] : Change FDT memory type from runtime data to boot services + data +X-Patchwork-Submitter: Ilias Apalodimas +X-Patchwork-Id: 1084888 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Message-Id: <1555093588-21916-1-git-send-email-ilias.apalodimas@linaro.org> +To: u-boot@lists.denx.de, + xypron.glpk@gmx.de +Cc: Ilias Apalodimas , agraf@csgraf.de, + ard.biesheuvel@linaro.org +Date: Fri, 12 Apr 2019 21:26:28 +0300 +From: Ilias Apalodimas +List-Id: U-Boot discussion + +Following Ard's suggestion: +Runtime data sections are intended for data that is used by the runtime +services implementation. +Let's change the type to EFI_BOOT_SERVICES_DATA + +This also fixes booting of armv7 using efi and fdtcontroladdr + +Suggested-by: Ard Biesheuvel +Signed-off-by: Ilias Apalodimas +Acked-by: Ard Biesheuvel +Reviewed-by: Heinrich Schuchardt +--- + cmd/bootefi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/cmd/bootefi.c b/cmd/bootefi.c +index 3619a20e6433..15ee4af45667 100644 +--- a/cmd/bootefi.c ++++ b/cmd/bootefi.c +@@ -111,13 +111,13 @@ static efi_status_t copy_fdt(void **fdtp) + new_fdt_addr = (uintptr_t)map_sysmem(fdt_ram_start + 0x7f00000 + + fdt_size, 0); + ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, +- EFI_RUNTIME_SERVICES_DATA, fdt_pages, ++ EFI_BOOT_SERVICES_DATA, fdt_pages, + &new_fdt_addr); + if (ret != EFI_SUCCESS) { + /* If we can't put it there, put it somewhere */ + new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size); + ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, +- EFI_RUNTIME_SERVICES_DATA, fdt_pages, ++ EFI_BOOT_SERVICES_DATA, fdt_pages, + &new_fdt_addr); + if (ret != EFI_SUCCESS) { + printf("ERROR: Failed to reserve space for FDT\n"); diff --git a/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch b/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch new file mode 100644 index 0000000..bdb0108 --- /dev/null +++ b/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch @@ -0,0 +1,46 @@ +From patchwork Tue Apr 9 20:58:30 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] efi: fix memory calculation overflow on 32-bit systems +X-Patchwork-Submitter: Patrick Wildt +X-Patchwork-Id: 1082739 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Message-Id: <20190409205830.GA5818@nyx.fritz.box> +To: u-boot@lists.denx.de +Date: Tue, 9 Apr 2019 22:58:30 +0200 +From: Patrick Wildt +List-Id: U-Boot discussion + +Hi, + +There are Cubox-i machines out there with nearly 4 GiB of RAM. The +RAM starts at 0x10000000 with a size of 0xf0000000. Thus the end +of RAM is at 0x100000000. This overflows a 32-bit integer, which +should be fine since in the EFI memory code the variables used are +all 64-bit with a fixed size. Unfortunately EFI_PAGE_MASK, which is +used in the EFI memory code to remove the lower bits, is based on +the EFI_PAGE_SIZE macro which, uses 1UL with a shift. This means +the resulting mask is UL, which is only 32-bit on ARMv7. Use ULL to +make sure that even on 32-bit platforms we use a 64-bit long mask. +Without this there will be no memory available in the EFI memory map +and bootefi will fail allocating pages. + +Best regards, +Patrick +Reviewed-by: Heinrich Schuchardt +Reviewed-by: Patrick Delaunay + +diff --git a/include/efi.h b/include/efi.h +index d98441ab19d..3c9d20f8c0b 100644 +--- a/include/efi.h ++++ b/include/efi.h +@@ -190,7 +190,7 @@ enum efi_mem_type { + #define EFI_MEM_DESC_VERSION 1 + + #define EFI_PAGE_SHIFT 12 +-#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) ++#define EFI_PAGE_SIZE (1ULL << EFI_PAGE_SHIFT) + #define EFI_PAGE_MASK (EFI_PAGE_SIZE - 1) + + struct efi_mem_desc { diff --git a/uefi-rc5-fixes.patch b/uefi-rc5-fixes.patch deleted file mode 100644 index fd36553..0000000 --- a/uefi-rc5-fixes.patch +++ /dev/null @@ -1,245 +0,0 @@ -From 306b16718edddd660b84bf3c6627ce5d41b53ce7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Mon, 18 Mar 2019 20:01:59 +0100 -Subject: [PATCH 01/25] efi_loader: correct parameter size in efi_allocate_pool - -efi_allocate_pages() expects a (uint64_t *) pointer to pass the address of -the assigned memory. If we pass the address of a pointer here, an illegal -memory access occurs on 32bit systems. - -Fixes: 282a06cbcae8 ("efi_loader: Expose U-Boot addresses in memory map -for sandbox") -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_memory.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index ebd2b36c03..55622d2fb4 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -440,6 +440,7 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages) - efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) - { - efi_status_t r; -+ u64 addr; - struct efi_pool_allocation *alloc; - u64 num_pages = efi_size_in_pages(size + - sizeof(struct efi_pool_allocation)); -@@ -453,9 +454,9 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) - } - - r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages, -- (uint64_t *)&alloc); -- -+ &addr); - if (r == EFI_SUCCESS) { -+ alloc = (struct efi_pool_allocation *)(uintptr_t)addr; - alloc->num_pages = num_pages; - *buffer = alloc->data; - } --- -2.20.1 - -From bd3b7478d1e17b4d487d276f5cc0e4f4ef9fc4b7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 12:30:27 +0100 -Subject: [PATCH 02/25] efi_loader: endless loop in add_strings_package() - -Avoid an endless loop in add_strings_package(). - -Suggested-by: Takahiro Akashi -Reported-by: Coverity (CID 185833) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_hii.c | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - -diff --git a/lib/efi_loader/efi_hii.c b/lib/efi_loader/efi_hii.c -index 3a966fa4df..61b71dec62 100644 ---- a/lib/efi_loader/efi_hii.c -+++ b/lib/efi_loader/efi_hii.c -@@ -227,9 +227,8 @@ out: - error: - if (stbl) { - free(stbl->language); -- if (idx > 0) -- while (--idx >= 0) -- free(stbl->strings[idx].string); -+ while (idx > 0) -+ free(stbl->strings[--idx].string); - free(stbl->strings); - } - free(stbl); --- -2.20.1 - -From e7dae584b05feaf507c5b85a704a2c1d25abffc9 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:36:21 +0100 -Subject: [PATCH 03/25] efi_loader: missing return in - efi_get_next_variable_name() - -Add a missing return statement in efi_get_next_variable_name(). - -Reported-by: Coverity (CID 185834) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_variable.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c -index e0d7f5736d..699f4184d9 100644 ---- a/lib/efi_loader/efi_variable.c -+++ b/lib/efi_loader/efi_variable.c -@@ -335,7 +335,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, - EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); - - if (!variable_name_size || !variable_name || !vendor) -- EFI_EXIT(EFI_INVALID_PARAMETER); -+ return EFI_EXIT(EFI_INVALID_PARAMETER); - - if (variable_name[0]) { - /* check null-terminated string */ --- -2.20.1 - -From 1fd7a4764103781e424ef687034da06de3cb60b7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:44:05 +0100 -Subject: [PATCH 04/25] efi_loader: memory leak in efi_dump_single_var() - -A misplaced return statement lead to a memory leak in -efi_dump_single_var(). - -Reported-by: Coverity (CID 185829) -Signed-off-by: Heinrich Schuchardt ---- - cmd/nvedit_efi.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c -index ca32566a61..e65b38dbf3 100644 ---- a/cmd/nvedit_efi.c -+++ b/cmd/nvedit_efi.c -@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid) - printf(", DataSize = 0x%zx\n", size); - print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true); - -- return; - out: - free(data); - } --- -2.20.1 - -From d5974af7f7626777b5c41894f75c813ff35c1793 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:58:58 +0100 -Subject: [PATCH 05/25] efi_loader: remove superfluous check in - efi_setup_loaded_image() - -It does not make any sense to check if a pointer is NULL if we have -dereferenced it before. - -Reported-by: Coverity (CID 185827) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_boottime.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c -index bd8b8a17ae..4fc550d9f3 100644 ---- a/lib/efi_loader/efi_boottime.c -+++ b/lib/efi_loader/efi_boottime.c -@@ -1581,10 +1581,8 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path, - goto failure; - #endif - -- if (info_ptr) -- *info_ptr = info; -- if (handle_ptr) -- *handle_ptr = obj; -+ *info_ptr = info; -+ *handle_ptr = obj; - - return ret; - failure: --- -2.20.1 - -From 1646e0928c8eb052bfa2283a6ab8d9f2a92a10e9 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 19:16:23 +0100 -Subject: [PATCH 06/25] efi_loader: superfluous conversion in efi_file_open() - -printf("%ls", ..) expects u16 * as argument to print. There is not need for -a conversion to wchar_t *. - -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_file.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c -index 3a7323765b..bc715218a1 100644 ---- a/lib/efi_loader/efi_file.c -+++ b/lib/efi_loader/efi_file.c -@@ -226,7 +226,7 @@ static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file, - efi_status_t ret; - - EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, -- (wchar_t *)file_name, open_mode, attributes); -+ file_name, open_mode, attributes); - - /* Check parameters */ - if (!file || !new_handle || !file_name) { --- -2.20.1 - -From d0bd87612f410a723d5ddb3001e805485e3efb4f Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 20:08:46 +0100 -Subject: [PATCH 07/25] efi_selftest: fix test_hii_string_get_string() - -The check testing the string result of get_string() returned the wrong -result. The result was ignored. - -Use efi_st_strcmp_16_8() for the string comparison. - -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_selftest/efi_selftest_hii.c | 17 ++++------------- - 1 file changed, 4 insertions(+), 13 deletions(-) - -diff --git a/lib/efi_selftest/efi_selftest_hii.c b/lib/efi_selftest/efi_selftest_hii.c -index 8a0b3bc353..f4b70f7950 100644 ---- a/lib/efi_selftest/efi_selftest_hii.c -+++ b/lib/efi_selftest/efi_selftest_hii.c -@@ -783,19 +783,10 @@ static int test_hii_string_get_string(void) - goto out; - } - --#if 1 -- u16 *c1, *c2; -- -- for (c1 = string, c2 = L"Japanese"; *c1 == *c2; c1++, c2++) -- ; -- if (!*c1 && !*c2) -- result = EFI_ST_SUCCESS; -- else -- result = EFI_ST_FAILURE; --#else -- /* TODO: %ls */ -- efi_st_printf("got string is %s (can be wrong)\n", string); --#endif -+ if (efi_st_strcmp_16_8(string, "Japanese")) { -+ efi_st_error("get_string returned incorrect string\n"); -+ goto out; -+ } - - result = EFI_ST_SUCCESS; - --- -2.20.1 - From 4f63e87d513d60bad5ab2fcb64b29b3b1bac9018 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 4 May 2019 11:22:48 +0100 Subject: [PATCH 026/351] Build and ship pre built SD/SPI SPL bits for all rk3399 boards --- uboot-tools.spec | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 83a5539..39ac882 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -140,7 +140,7 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - rk33xx=(evb-rk3399 firefly-rk3399) + rk33xx=(evb-rk3399 ficus-rk3399 firefly-rk3399 puma-rk3399 rock960-rk3399) if [[ " ${rk33xx[*]} " == *" $board "* ]]; then echo "Board: $board using rk33xx" make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" u-boot.itb V=1 O=builds/$(echo $board)/ @@ -305,6 +305,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat May 4 2019 Peter Robinson 2019.04-2 +- Build and ship pre built SD/SPI SPL bits for all rk3399 boards + * Sun Apr 14 2019 Peter Robinson 2019.04-1 - 2019.04 - Fixes for AllWinner and NVIDIA Jetson devices From c529a6c6e812fe76c7c34f652e270cfc138ee502 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 18 Jun 2019 12:12:09 +0100 Subject: [PATCH 027/351] 2019.07 RC4, Obsolete unused elf packages, new rk3399 devices --- ...k3288-disable-CONFIG_SPL_I2C_SUPPORT.patch | 34 + ARM-tegra-Add-NVIDIA-Jetson-Nano.patch | 862 +++ ...dd-support-for-framebuffer-carveouts.patch | 1532 ------ ARM-tegra-Miscellaneous-improvements.patch | 4625 ----------------- aarch64-boards | 8 + arm-boards | 2 +- ...-MAC-address-to-hardware-after-probe.patch | 197 - ...69-Implement---hwaddr_write-callback.patch | 102 - sources | 2 +- uboot-tools.spec | 91 +- ...m-runtime-data-to-boot-services-data.patch | 54 - ...DT-from-any-partition-on-boot-device.patch | 18 +- ...lculation-overflow-on-32-bit-systems.patch | 46 - uefi-use-Fedora-specific-path-name.patch | 18 +- 14 files changed, 949 insertions(+), 6642 deletions(-) create mode 100644 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch create mode 100644 ARM-tegra-Add-NVIDIA-Jetson-Nano.patch delete mode 100644 ARM-tegra-Add-support-for-framebuffer-carveouts.patch delete mode 100644 ARM-tegra-Miscellaneous-improvements.patch delete mode 100644 net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch delete mode 100644 net-rtl8169-Implement---hwaddr_write-callback.patch delete mode 100644 uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch delete mode 100644 uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch diff --git a/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch b/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch new file mode 100644 index 0000000..c8e1adf --- /dev/null +++ b/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch @@ -0,0 +1,34 @@ +From 68b90e57bc034e237923b02acb633dc4e91d44cb Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Wed, 27 Feb 2019 20:05:43 +0100 +Subject: [PATCH] configs: tinker-rk3288 disable CONFIG_SPL_I2C_SUPPORT + +The SPL for the Tinker Board has to fit into 32 KiB. Currently this limit +is exceeded. + +CONFIG_SPL_I2C_SUPPORT is not needed to move to main U-Boot. So let's +disable it. + +Suggested-by: David Wu +Signed-off-by: Heinrich Schuchardt +Reviewed-by: David Wu +Reviewed-by: Philipp Tomsich +--- + configs/tinker-rk3288_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig +index 4b48689ee8..0e8cf73fe9 100644 +--- a/configs/tinker-rk3288_defconfig ++++ b/configs/tinker-rk3288_defconfig +@@ -20,7 +20,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_TEXT_BASE=0xff704000 + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +-CONFIG_SPL_I2C_SUPPORT=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_GPT=y + CONFIG_CMD_I2C=y +-- +2.21.0 + diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch new file mode 100644 index 0000000..f4c7b96 --- /dev/null +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch @@ -0,0 +1,862 @@ +From patchwork Mon Apr 15 09:32:39 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085538 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:39 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The Jetson Nano Developer Kit is a Tegra X1 based development board. It +is similar to Jetson TX1 but it is not pin compatible. It features 4 GB +of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot +used for storage. + +HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 +and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI +Ethernet controller provides onboard network connectivity. + +A 40-pin header on the board can be used to extend the capabilities and +exposed interfaces of the Jetson Nano. + +Signed-off-by: Thierry Reding +--- +Changes in v5: +- add "ethernet" alias and store an empty MAC address as placeholder + +Changes in v3: +- rename "Development Kit" to "Developer Kit" +- drop alias for non-existent eMMC interface +- import pinmux from A02 spreadsheet +- drop preboot support for now +- fixup text base + + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++ + arch/arm/mach-tegra/tegra210/Kconfig | 7 + + board/nvidia/p3450-0000/Kconfig | 12 + + board/nvidia/p3450-0000/MAINTAINERS | 6 + + board/nvidia/p3450-0000/Makefile | 8 + + board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++ + .../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++ + configs/p3450-0000_defconfig | 55 ++++ + include/configs/p3450-0000.h | 34 +++ + 10 files changed, 722 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts + create mode 100644 board/nvidia/p3450-0000/Kconfig + create mode 100644 board/nvidia/p3450-0000/MAINTAINERS + create mode 100644 board/nvidia/p3450-0000/Makefile + create mode 100644 board/nvidia/p3450-0000/p3450-0000.c + create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h + create mode 100644 configs/p3450-0000_defconfig + create mode 100644 include/configs/p3450-0000.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 8167cdb4e856..f8d3441663c0 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ + tegra210-e2220-1170.dtb \ + tegra210-p2371-0000.dtb \ + tegra210-p2371-2180.dtb \ +- tegra210-p2571.dtb ++ tegra210-p2571.dtb \ ++ tegra210-p3450-0000.dtb + + dtb-$(CONFIG_ARCH_MVEBU) += \ + armada-3720-db.dtb \ +diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts +new file mode 100644 +index 000000000000..d45ee9afc016 +--- /dev/null ++++ b/arch/arm/dts/tegra210-p3450-0000.dts +@@ -0,0 +1,135 @@ ++/dts-v1/; ++ ++#include "tegra210.dtsi" ++ ++/ { ++ model = "NVIDIA Jetson Nano Developer Kit"; ++ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; ++ ++ chosen { ++ stdout-path = &uarta; ++ }; ++ ++ aliases { ++ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; ++ i2c0 = "/i2c@7000d000"; ++ i2c2 = "/i2c@7000c400"; ++ i2c3 = "/i2c@7000c500"; ++ i2c4 = "/i2c@7000c700"; ++ sdhci0 = "/sdhci@700b0000"; ++ spi0 = "/spi@70410000"; ++ usb0 = "/usb@7d000000"; ++ }; ++ ++ memory { ++ reg = <0x0 0x80000000 0x0 0xc0000000>; ++ }; ++ ++ pcie@1003000 { ++ status = "okay"; ++ ++ pci@1,0 { ++ status = "okay"; ++ }; ++ ++ pci@2,0 { ++ status = "okay"; ++ ++ ethernet@0,0 { ++ reg = <0x000000 0 0 0 0>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; ++ }; ++ }; ++ }; ++ ++ serial@70006000 { ++ status = "okay"; ++ }; ++ ++ padctl@7009f000 { ++ pinctrl-0 = <&padctl_default>; ++ pinctrl-names = "default"; ++ ++ padctl_default: pinmux { ++ xusb { ++ nvidia,lanes = "otg-1", "otg-2"; ++ nvidia,function = "xusb"; ++ nvidia,iddq = <0>; ++ }; ++ ++ usb3 { ++ nvidia,lanes = "pcie-5", "pcie-6"; ++ nvidia,function = "usb3"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x1 { ++ nvidia,lanes = "pcie-0"; ++ nvidia,function = "pcie-x1"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x4 { ++ nvidia,lanes = "pcie-1", "pcie-2", ++ "pcie-3", "pcie-4"; ++ nvidia,function = "pcie-x4"; ++ nvidia,iddq = <0>; ++ }; ++ ++ sata { ++ nvidia,lanes = "sata-0"; ++ nvidia,function = "sata"; ++ nvidia,iddq = <0>; ++ }; ++ }; ++ }; ++ ++ sdhci@700b0000 { ++ status = "okay"; ++ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; ++ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ }; ++ ++ i2c@7000c400 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c500 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c700 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000d000 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ spi@70410000 { ++ status = "okay"; ++ }; ++ ++ usb@7d000000 { ++ status = "okay"; ++ dr_mode = "peripheral"; ++ }; ++ ++ clocks { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ clk32k_in: clock@0 { ++ compatible = "fixed-clock"; ++ reg = <0>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig +index 250738aed312..ea28392c0f3a 100644 +--- a/arch/arm/mach-tegra/tegra210/Kconfig ++++ b/arch/arm/mach-tegra/tegra210/Kconfig +@@ -35,6 +35,12 @@ config TARGET_P2571 + help + P2571 is a P2530 married to a P1963 I/O board + ++config TARGET_P3450_0000 ++ bool "NVIDIA Jetson Nano Developer Kit" ++ select BOARD_LATE_INIT ++ help ++ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. ++ + endchoice + + config SYS_SOC +@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" + source "board/nvidia/p2371-0000/Kconfig" + source "board/nvidia/p2371-2180/Kconfig" + source "board/nvidia/p2571/Kconfig" ++source "board/nvidia/p3450-0000/Kconfig" + + endif +diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig +new file mode 100644 +index 000000000000..7a08cd88675f +--- /dev/null ++++ b/board/nvidia/p3450-0000/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_P3450_0000 ++ ++config SYS_BOARD ++ default "p3450-0000" ++ ++config SYS_VENDOR ++ default "nvidia" ++ ++config SYS_CONFIG_NAME ++ default "p3450-0000" ++ ++endif +diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS +new file mode 100644 +index 000000000000..40700066bf39 +--- /dev/null ++++ b/board/nvidia/p3450-0000/MAINTAINERS +@@ -0,0 +1,6 @@ ++P3450-0000 BOARD ++M: Tom Warren ++S: Maintained ++F: board/nvidia/p3450-0000/ ++F: include/configs/p3450-0000.h ++F: configs/p3450-0000_defconfig +diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile +new file mode 100644 +index 000000000000..993c506d8200 +--- /dev/null ++++ b/board/nvidia/p3450-0000/Makefile +@@ -0,0 +1,8 @@ ++# ++# (C) Copyright 2018 ++# NVIDIA Corporation ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += p3450-0000.o +diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c +new file mode 100644 +index 000000000000..432179e92605 +--- /dev/null ++++ b/board/nvidia/p3450-0000/p3450-0000.c +@@ -0,0 +1,198 @@ ++/* ++ * (C) Copyright 2018 ++ * NVIDIA Corporation ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../p2571/max77620_init.h" ++#include "pinmux-config-p3450-0000.h" ++ ++void pin_mux_mmc(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ ++ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return; ++ } ++ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xF2; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); ++ ++ /* Disable LDO4 discharge */ ++ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) { ++ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); ++ } else { ++ val &= ~BIT(1); /* ADE */ ++ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); ++ } ++ ++ /* Set MBLPD */ ++ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) { ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } else { ++ val |= BIT(6); /* MBLPD */ ++ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } ++} ++ ++/* ++ * Routine: pinmux_init ++ * Description: Do individual peripheral pinmux configs ++ */ ++void pinmux_init(void) ++{ ++ pinmux_clear_tristate_input_clamping(); ++ ++ gpio_config_table(p3450_0000_gpio_inits, ++ ARRAY_SIZE(p3450_0000_gpio_inits)); ++ ++ pinmux_config_pingrp_table(p3450_0000_pingrps, ++ ARRAY_SIZE(p3450_0000_pingrps)); ++ ++ pinmux_config_drvgrp_table(p3450_0000_drvgrps, ++ ARRAY_SIZE(p3450_0000_drvgrps)); ++} ++ ++#ifdef CONFIG_PCI_TEGRA ++int tegra_pcie_board_init(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ ++ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return -1; ++ } ++ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xCA; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); ++ ++ return 0; ++} ++#endif /* PCI */ ++ ++static void ft_mac_address_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); ++ ++ return 0; ++} +diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +new file mode 100644 +index 000000000000..722da4973542 +--- /dev/null ++++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +@@ -0,0 +1,265 @@ ++/* ++ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* ++ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! ++ * ++ * To generate this file, use the tegra-pinmux-scripts tool available from ++ * https://github.com/NVIDIA/tegra-pinmux-scripts ++ * Run "board-to-uboot.py p3450-0000". ++ */ ++ ++#ifndef _PINMUX_CONFIG_P3450_0000_H_ ++#define _PINMUX_CONFIG_P3450_0000_H_ ++ ++#define GPIO_INIT(_port, _gpio, _init) \ ++ { \ ++ .gpio = TEGRA_GPIO(_port, _gpio), \ ++ .init = TEGRA_GPIO_INIT_##_init, \ ++ } ++ ++static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { ++ /* port, pin, init_val */ ++ GPIO_INIT(A, 5, IN), ++ GPIO_INIT(A, 6, OUT1), ++ GPIO_INIT(B, 4, IN), ++ GPIO_INIT(B, 5, IN), ++ GPIO_INIT(B, 6, IN), ++ GPIO_INIT(B, 7, IN), ++ GPIO_INIT(C, 0, IN), ++ GPIO_INIT(C, 1, IN), ++ GPIO_INIT(C, 2, IN), ++ GPIO_INIT(C, 3, IN), ++ GPIO_INIT(C, 4, IN), ++ GPIO_INIT(E, 6, IN), ++ GPIO_INIT(G, 2, IN), ++ GPIO_INIT(G, 3, IN), ++ GPIO_INIT(H, 0, OUT0), ++ GPIO_INIT(H, 2, IN), ++ GPIO_INIT(H, 3, OUT0), ++ GPIO_INIT(H, 4, OUT0), ++ GPIO_INIT(H, 5, IN), ++ GPIO_INIT(H, 6, IN), ++ GPIO_INIT(H, 7, OUT0), ++ GPIO_INIT(I, 0, OUT0), ++ GPIO_INIT(I, 1, IN), ++ GPIO_INIT(I, 2, OUT0), ++ GPIO_INIT(J, 4, IN), ++ GPIO_INIT(J, 5, IN), ++ GPIO_INIT(J, 6, IN), ++ GPIO_INIT(J, 7, IN), ++ GPIO_INIT(S, 5, IN), ++ GPIO_INIT(S, 7, OUT0), ++ GPIO_INIT(T, 0, OUT0), ++ GPIO_INIT(V, 0, IN), ++ GPIO_INIT(V, 1, IN), ++ GPIO_INIT(X, 3, OUT1), ++ GPIO_INIT(X, 4, IN), ++ GPIO_INIT(X, 5, IN), ++ GPIO_INIT(X, 6, IN), ++ GPIO_INIT(Y, 1, IN), ++ GPIO_INIT(Y, 2, IN), ++ GPIO_INIT(Z, 0, IN), ++ GPIO_INIT(Z, 2, IN), ++ GPIO_INIT(Z, 3, OUT0), ++ GPIO_INIT(BB, 0, IN), ++ GPIO_INIT(CC, 4, IN), ++ GPIO_INIT(DD, 0, IN), ++}; ++ ++#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ ++ { \ ++ .pingrp = PMUX_PINGRP_##_pingrp, \ ++ .func = PMUX_FUNC_##_mux, \ ++ .pull = PMUX_PULL_##_pull, \ ++ .tristate = PMUX_TRI_##_tri, \ ++ .io = PMUX_PIN_##_io, \ ++ .od = PMUX_PIN_OD_##_od, \ ++ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ ++ .lock = PMUX_PIN_LOCK_DEFAULT, \ ++ } ++ ++static const struct pmux_pingrp_config p3450_0000_pingrps[] = { ++ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ ++ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++}; ++ ++#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ ++ { \ ++ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ ++ .slwf = _slwf, \ ++ .slwr = _slwr, \ ++ .drvup = _drvup, \ ++ .drvdn = _drvdn, \ ++ .lpmd = PMUX_LPMD_##_lpmd, \ ++ .schmt = PMUX_SCHMT_##_schmt, \ ++ .hsm = PMUX_HSM_##_hsm, \ ++ } ++ ++static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { ++}; ++ ++#endif /* PINMUX_CONFIG_P3450_0000_H */ +diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig +new file mode 100644 +index 000000000000..3a95028279d3 +--- /dev/null ++++ b/configs/p3450-0000_defconfig +@@ -0,0 +1,55 @@ ++CONFIG_ARM=y ++CONFIG_TEGRA=y ++CONFIG_SYS_TEXT_BASE=0x80080000 ++CONFIG_TEGRA210=y ++CONFIG_TARGET_P3450_0000=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_STDIO_DEREGISTER=y ++CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_CMD_NFS is not set ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_OF_LIVE=y ++CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_SYS_I2C_TEGRA=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_MODE=0 ++CONFIG_SF_DEFAULT_SPEED=24000000 ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_RTL8169=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCI_TEGRA=y ++CONFIG_SYS_NS16550=y ++CONFIG_TEGRA114_SPI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_TEGRA=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0955 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x701a ++CONFIG_CI_UDC=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++# CONFIG_ENV_IS_IN_MMC is not set +diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h +new file mode 100644 +index 000000000000..ee819b7573b0 +--- /dev/null ++++ b/include/configs/p3450-0000.h +@@ -0,0 +1,34 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _P3450_0000_H ++#define _P3450_0000_H ++ ++#include ++ ++#include "tegra210-common.h" ++ ++/* High-level configuration options */ ++#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" ++ ++/* Board-specific serial config */ ++#define CONFIG_TEGRA_ENABLE_UARTA ++ ++/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 0) \ ++ func(PXE, pxe, na) \ ++ func(DHCP, dhcp, na) ++ ++/* SPI */ ++#define CONFIG_SPI_FLASH_SIZE (4 << 20) ++ ++#include "tegra-common-usb-gadget.h" ++#include "tegra-common-post.h" ++ ++/* Crystal is 38.4MHz. clk_m runs at half that rate */ ++#define COUNTER_FREQUENCY 19200000 ++ ++#endif /* _P3450_0000_H */ diff --git a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch deleted file mode 100644 index 5672527..0000000 --- a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch +++ /dev/null @@ -1,1532 +0,0 @@ -From 87409c02ff1cc7249f0fdccbb44c607931cb9bb2 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Fri, 1 Mar 2019 19:20:48 +0100 -Subject: [PATCH 01/12] fdt: Remove duplicate code - -Commit 6d29cc7dcf2d ("fdt: Fixup only valid memory banks") ended up -being merged twice, first as: - - commit 6d29cc7dcf2d35966aa0b6119fd1cbca0d21d5e6 - Author: Thierry Reding - AuthorDate: Tue Jan 30 11:34:17 2018 +0100 - Commit: Simon Glass - CommitDate: Sun Feb 18 12:53:38 2018 -0700 - - fdt: Fixup only valid memory banks - - Memory banks with address 0 and size 0 are empty and should not be - passed to the OS via device tree. - - Signed-off-by: Thierry Reding - Acked-by: Stephen Warren - -and later again, though this time it was v2: - - commit ed5af03f9bb8905f1e94d68ab49f22d7f061d75f - Author: Thierry Reding - AuthorDate: Thu Feb 15 19:05:59 2018 +0100 - Commit: Tom Rini - CommitDate: Fri Feb 23 10:40:50 2018 -0500 - - fdt: Fixup only valid memory banks - - Memory banks with address 0 and size 0 are empty and should not be - passed to the OS via device tree. - - Acked-by: Stephen Warren - Signed-off-by: Thierry Reding - -The second version was slightly different, so the main hunk of the patch -was applied twice. This isn't harmful because the code is idempotent, -but it's wasteful to run the same code twice. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - common/fdt_support.c | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/common/fdt_support.c b/common/fdt_support.c -index 42583e3ed8..ab08a0114f 100644 ---- a/common/fdt_support.c -+++ b/common/fdt_support.c -@@ -456,12 +456,6 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) - if (!banks) - return 0; - -- for (i = 0; i < banks; i++) -- if (start[i] == 0 && size[i] == 0) -- break; -- -- banks = i; -- - len = fdt_pack_reg(blob, tmp, start, size, banks); - - err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); --- -2.21.0 - -From abf9afc43916b5e16972bd595d2d34c3abff3613 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:09:58 +0100 -Subject: [PATCH 02/12] libfdt: Add phandle generation helper - -The new fdt_generate_phandle() function can be used to generate a new, -unused phandle given a specific device tree blob. The implementation is -somewhat naive in that it simply walks the entire device tree to find -the highest phandle value and then returns a phandle value one higher -than that. A more clever implementation might try to find holes in the -current set of phandle values and fill them. But this implementation is -relatively simple and works reliably. - -Also add a test that validates that phandles generated by this new API -are indeed unique. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - lib/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ - scripts/dtc/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ - scripts/dtc/libfdt/libfdt.h | 19 +++++++++++++++++++ - scripts/dtc/libfdt/libfdt_env.h | 1 + - 4 files changed, 82 insertions(+) - -diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c -index b6ca4e0b0c..693de9aa5a 100644 ---- a/lib/libfdt/fdt_ro.c -+++ b/lib/libfdt/fdt_ro.c -@@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) - return 0; - } - -+int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+{ -+ uint32_t max = 0; -+ int offset = -1; -+ -+ while (true) { -+ uint32_t value; -+ -+ offset = fdt_next_node(fdt, offset, NULL); -+ if (offset < 0) { -+ if (offset == -FDT_ERR_NOTFOUND) -+ break; -+ -+ return offset; -+ } -+ -+ value = fdt_get_phandle(fdt, offset); -+ -+ if (value > max) -+ max = value; -+ } -+ -+ if (max == FDT_MAX_PHANDLE) -+ return -FDT_ERR_NOPHANDLES; -+ -+ if (phandle) -+ *phandle = max + 1; -+ -+ return 0; -+} -+ - int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) - { - FDT_CHECK_HEADER(fdt); -diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c -index dfb3236da3..dc499884e4 100644 ---- a/scripts/dtc/libfdt/fdt_ro.c -+++ b/scripts/dtc/libfdt/fdt_ro.c -@@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) - return 0; - } - -+int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+{ -+ uint32_t max = 0; -+ int offset = -1; -+ -+ while (true) { -+ uint32_t value; -+ -+ offset = fdt_next_node(fdt, offset, NULL); -+ if (offset < 0) { -+ if (offset == -FDT_ERR_NOTFOUND) -+ break; -+ -+ return offset; -+ } -+ -+ value = fdt_get_phandle(fdt, offset); -+ -+ if (value > max) -+ max = value; -+ } -+ -+ if (max == FDT_MAX_PHANDLE) -+ return -FDT_ERR_NOPHANDLES; -+ -+ if (phandle) -+ *phandle = max + 1; -+ -+ return 0; -+} -+ - int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) - { - FDT_CHECK_HEADER(fdt); -diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h -index fd73688f9e..cf86ddba88 100644 ---- a/scripts/dtc/libfdt/libfdt.h -+++ b/scripts/dtc/libfdt/libfdt.h -@@ -139,6 +139,10 @@ - - #define FDT_ERR_MAX 17 - -+/* constants */ -+#define FDT_MAX_PHANDLE 0xfffffffe -+ /* Valid values for phandles range from 1 to 2^32-2. */ -+ - /**********************************************************************/ - /* Low-level functions (you probably don't need these) */ - /**********************************************************************/ -@@ -313,6 +317,21 @@ const char *fdt_string(const void *fdt, int stroffset); - */ - uint32_t fdt_get_max_phandle(const void *fdt); - -+/** -+ * fdt_generate_phandle - return a new, unused phandle for a device tree blob -+ * @fdt: pointer to the device tree blob -+ * @phandle: return location for the new phandle -+ * -+ * Walks the device tree blob and looks for the highest phandle value. On -+ * success, the new, unused phandle value (one higher than the previously -+ * highest phandle value in the device tree blob) will be returned in the -+ * @phandle parameter. -+ * -+ * Returns: -+ * 0 on success or a negative error-code on failure -+ */ -+int fdt_generate_phandle(const void *fdt, uint32_t *phandle); -+ - /** - * fdt_num_mem_rsv - retrieve the number of memory reserve map entries - * @fdt: pointer to the device tree blob -diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h -index bd24746287..3ff9e28630 100644 ---- a/scripts/dtc/libfdt/libfdt_env.h -+++ b/scripts/dtc/libfdt/libfdt_env.h -@@ -52,6 +52,7 @@ - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -+#include - #include - #include - #include --- -2.21.0 - -From 57d9e1ba51831b787ac114c8b5ab17cc44a22977 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:09:59 +0100 -Subject: [PATCH 03/12] fdtdec: Add cpu_to_fdt_{addr, size}() macros - -These macros are useful for converting the endianness of variables of -type fdt_addr_t and fdt_size_t. - -Reviewed-by: Simon Glass -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index b7e35cd87c..a965c33157 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t; - #define FDT_ADDR_T_NONE (-1U) - #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) - #define fdt_size_to_cpu(reg) be64_to_cpu(reg) -+#define cpu_to_fdt_addr(reg) cpu_to_be64(reg) -+#define cpu_to_fdt_size(reg) cpu_to_be64(reg) - typedef fdt64_t fdt_val_t; - #else - #define FDT_ADDR_T_NONE (-1U) - #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) - #define fdt_size_to_cpu(reg) be32_to_cpu(reg) -+#define cpu_to_fdt_addr(reg) cpu_to_be32(reg) -+#define cpu_to_fdt_size(reg) cpu_to_be32(reg) - typedef fdt32_t fdt_val_t; - #endif - --- -2.21.0 - -From 30086fd2012b1f00cc1d4d11e962634236277d17 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:00 +0100 -Subject: [PATCH 04/12] fdtdec: Add fdt_{addr, size}_unpack() helpers - -These helpers can be used to unpack variables of type fdt_addr_t and -fdt_size_t into a pair of 32-bit variables. This is useful in cases -where such variables need to be written to properties (such as "reg") -of a device tree node where they need to be split into cells. - -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index a965c33157..a0ba57c631 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -23,6 +23,31 @@ - */ - typedef phys_addr_t fdt_addr_t; - typedef phys_size_t fdt_size_t; -+ -+static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) -+{ -+ if (upper) -+#ifdef CONFIG_PHYS_64BIT -+ *upper = addr >> 32; -+#else -+ *upper = 0; -+#endif -+ -+ return addr; -+} -+ -+static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) -+{ -+ if (upper) -+#ifdef CONFIG_PHYS_64BIT -+ *upper = size >> 32; -+#else -+ *upper = 0; -+#endif -+ -+ return size; -+} -+ - #ifdef CONFIG_PHYS_64BIT - #define FDT_ADDR_T_NONE (-1U) - #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) --- -2.21.0 - -From 33c157fbae9cf088c8374543daf012487e3d3c07 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:01 +0100 -Subject: [PATCH 05/12] fdtdec: Implement fdtdec_set_phandle() - -This function can be used to set a phandle for a given node. - -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 11 +++++++++++ - lib/fdtdec.c | 7 +++++++ - 2 files changed, 18 insertions(+) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index a0ba57c631..55600026c4 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void); - */ - int fdtdec_setup_memory_banksize(void); - -+/** -+ * fdtdec_set_phandle() - sets the phandle of a given node -+ * -+ * @param blob FDT blob -+ * @param node offset in the FDT blob of the node whose phandle is to -+ * be set -+ * @param phandle phandle to set for the given node -+ * @return 0 on success or a negative error code on failure -+ */ -+int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); -+ - /** - * Set up the device tree ready for use - */ -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 09a7e133a5..00db90e3cd 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void) - } - #endif - -+int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) -+{ -+ fdt32_t value = cpu_to_fdt32(phandle); -+ -+ return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); -+} -+ - int fdtdec_setup(void) - { - #if CONFIG_IS_ENABLED(OF_CONTROL) --- -2.21.0 - -From 9c2ed8c44b3d62e01e2885f0e2b077407bf6056b Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:02 +0100 -Subject: [PATCH 06/12] fdtdec: Implement fdtdec_add_reserved_memory() - -This function can be used to add subnodes in the /reserved-memory node. - -Reviewed-by: Simon Glass -Signed-off-by: Thierry Reding ---- - .../reserved-memory/reserved-memory.txt | 136 ++++++++++++++++++ - include/fdtdec.h | 48 +++++++ - lib/fdtdec.c | 131 +++++++++++++++++ - 3 files changed, 315 insertions(+) - create mode 100644 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - -diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt -new file mode 100644 -index 0000000000..bac4afa3b1 ---- /dev/null -+++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt -@@ -0,0 +1,136 @@ -+*** Reserved memory regions *** -+ -+Reserved memory is specified as a node under the /reserved-memory node. -+The operating system shall exclude reserved memory from normal usage -+one can create child nodes describing particular reserved (excluded from -+normal use) memory regions. Such memory regions are usually designed for -+the special usage by various device drivers. -+ -+Parameters for each memory region can be encoded into the device tree -+with the following nodes: -+ -+/reserved-memory node -+--------------------- -+#address-cells, #size-cells (required) - standard definition -+ - Should use the same values as the root node -+ranges (required) - standard definition -+ - Should be empty -+ -+/reserved-memory/ child nodes -+----------------------------- -+Each child of the reserved-memory node specifies one or more regions of -+reserved memory. Each child node may either use a 'reg' property to -+specify a specific range of reserved memory, or a 'size' property with -+optional constraints to request a dynamically allocated block of memory. -+ -+Following the generic-names recommended practice, node names should -+reflect the purpose of the node (ie. "framebuffer" or "dma-pool"). Unit -+address (@
) should be appended to the name if the node is a -+static allocation. -+ -+Properties: -+Requires either a) or b) below. -+a) static allocation -+ reg (required) - standard definition -+b) dynamic allocation -+ size (required) - length based on parent's #size-cells -+ - Size in bytes of memory to reserve. -+ alignment (optional) - length based on parent's #size-cells -+ - Address boundary for alignment of allocation. -+ alloc-ranges (optional) - prop-encoded-array (address, length pairs). -+ - Specifies regions of memory that are -+ acceptable to allocate from. -+ -+If both reg and size are present, then the reg property takes precedence -+and size is ignored. -+ -+Additional properties: -+compatible (optional) - standard definition -+ - may contain the following strings: -+ - shared-dma-pool: This indicates a region of memory meant to be -+ used as a shared pool of DMA buffers for a set of devices. It can -+ be used by an operating system to instantiate the necessary pool -+ management subsystem if necessary. -+ - vendor specific string in the form ,[-] -+no-map (optional) - empty property -+ - Indicates the operating system must not create a virtual mapping -+ of the region as part of its standard mapping of system memory, -+ nor permit speculative access to it under any circumstances other -+ than under the control of the device driver using the region. -+reusable (optional) - empty property -+ - The operating system can use the memory in this region with the -+ limitation that the device driver(s) owning the region need to be -+ able to reclaim it back. Typically that means that the operating -+ system can use that region to store volatile or cached data that -+ can be otherwise regenerated or migrated elsewhere. -+ -+Linux implementation note: -+- If a "linux,cma-default" property is present, then Linux will use the -+ region for the default pool of the contiguous memory allocator. -+ -+- If a "linux,dma-default" property is present, then Linux will use the -+ region for the default pool of the consistent DMA allocator. -+ -+Device node references to reserved memory -+----------------------------------------- -+Regions in the /reserved-memory node may be referenced by other device -+nodes by adding a memory-region property to the device node. -+ -+memory-region (optional) - phandle, specifier pairs to children of /reserved-memory -+ -+Example -+------- -+This example defines 3 contiguous regions are defined for Linux kernel: -+one default of all device drivers (named linux,cma@72000000 and 64MiB in size), -+one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB), and -+one for multimedia processing (named multimedia-memory@77000000, 64MiB). -+ -+/ { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ memory { -+ reg = <0x40000000 0x40000000>; -+ }; -+ -+ reserved-memory { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ /* global autoconfigured region for contiguous allocations */ -+ linux,cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ size = <0x4000000>; -+ alignment = <0x2000>; -+ linux,cma-default; -+ }; -+ -+ display_reserved: framebuffer@78000000 { -+ reg = <0x78000000 0x800000>; -+ }; -+ -+ multimedia_reserved: multimedia@77000000 { -+ compatible = "acme,multimedia-memory"; -+ reg = <0x77000000 0x4000000>; -+ }; -+ }; -+ -+ /* ... */ -+ -+ fb0: video@12300000 { -+ memory-region = <&display_reserved>; -+ /* ... */ -+ }; -+ -+ scaler: scaler@12500000 { -+ memory-region = <&multimedia_reserved>; -+ /* ... */ -+ }; -+ -+ codec: codec@12600000 { -+ memory-region = <&multimedia_reserved>; -+ /* ... */ -+ }; -+}; -diff --git a/include/fdtdec.h b/include/fdtdec.h -index 55600026c4..b54ed38fb3 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -992,6 +992,54 @@ int fdtdec_setup_memory_banksize(void); - */ - int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); - -+/** -+ * fdtdec_add_reserved_memory() - add or find a reserved-memory node -+ * -+ * If a reserved-memory node already exists for the given carveout, a phandle -+ * for that node will be returned. Otherwise a new node will be created and a -+ * phandle corresponding to it will be returned. -+ * -+ * See Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt -+ * for details on how to use reserved memory regions. -+ * -+ * As an example, consider the following code snippet: -+ * -+ * struct fdt_memory fb = { -+ * .start = 0x92cb3000, -+ * .end = 0x934b2fff, -+ * }; -+ * uint32_t phandle; -+ * -+ * fdtdec_add_reserved_memory(fdt, "framebuffer", &fb, &phandle); -+ * -+ * This results in the following subnode being added to the top-level -+ * /reserved-memory node: -+ * -+ * reserved-memory { -+ * #address-cells = <0x00000002>; -+ * #size-cells = <0x00000002>; -+ * ranges; -+ * -+ * framebuffer@92cb3000 { -+ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; -+ * phandle = <0x0000004d>; -+ * }; -+ * }; -+ * -+ * If the top-level /reserved-memory node does not exist, it will be created. -+ * The phandle returned from the function call can be used to reference this -+ * reserved memory region from other nodes. -+ * -+ * @param blob FDT blob -+ * @param basename base name of the node to create -+ * @param carveout information about the carveout region -+ * @param phandlep return location for the phandle of the carveout region -+ * @return 0 on success or a negative error code on failure -+ */ -+int fdtdec_add_reserved_memory(void *blob, const char *basename, -+ const struct fdt_memory *carveout, -+ uint32_t *phandlep); -+ - /** - * Set up the device tree ready for use - */ -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 00db90e3cd..be54ad5bd0 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1250,6 +1250,137 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) - return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); - } - -+static int fdtdec_init_reserved_memory(void *blob) -+{ -+ int na, ns, node, err; -+ fdt32_t value; -+ -+ /* inherit #address-cells and #size-cells from the root node */ -+ na = fdt_address_cells(blob, 0); -+ ns = fdt_size_cells(blob, 0); -+ -+ node = fdt_add_subnode(blob, 0, "reserved-memory"); -+ if (node < 0) -+ return node; -+ -+ err = fdt_setprop(blob, node, "ranges", NULL, 0); -+ if (err < 0) -+ return err; -+ -+ value = cpu_to_fdt32(ns); -+ -+ err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value)); -+ if (err < 0) -+ return err; -+ -+ value = cpu_to_fdt32(na); -+ -+ err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value)); -+ if (err < 0) -+ return err; -+ -+ return node; -+} -+ -+int fdtdec_add_reserved_memory(void *blob, const char *basename, -+ const struct fdt_memory *carveout, -+ uint32_t *phandlep) -+{ -+ fdt32_t cells[4] = {}, *ptr = cells; -+ uint32_t upper, lower, phandle; -+ int parent, node, na, ns, err; -+ char name[64]; -+ -+ /* create an empty /reserved-memory node if one doesn't exist */ -+ parent = fdt_path_offset(blob, "/reserved-memory"); -+ if (parent < 0) { -+ parent = fdtdec_init_reserved_memory(blob); -+ if (parent < 0) -+ return parent; -+ } -+ -+ /* only 1 or 2 #address-cells and #size-cells are supported */ -+ na = fdt_address_cells(blob, parent); -+ if (na < 1 || na > 2) -+ return -FDT_ERR_BADNCELLS; -+ -+ ns = fdt_size_cells(blob, parent); -+ if (ns < 1 || ns > 2) -+ return -FDT_ERR_BADNCELLS; -+ -+ /* find a matching node and return the phandle to that */ -+ fdt_for_each_subnode(node, blob, parent) { -+ const char *name = fdt_get_name(blob, node, NULL); -+ phys_addr_t addr, size; -+ -+ addr = fdtdec_get_addr_size(blob, node, "reg", &size); -+ if (addr == FDT_ADDR_T_NONE) { -+ debug("failed to read address/size for %s\n", name); -+ continue; -+ } -+ -+ if (addr == carveout->start && (addr + size) == carveout->end) { -+ *phandlep = fdt_get_phandle(blob, node); -+ return 0; -+ } -+ } -+ -+ /* -+ * Unpack the start address and generate the name of the new node -+ * base on the basename and the unit-address. -+ */ -+ lower = fdt_addr_unpack(carveout->start, &upper); -+ -+ if (na > 1 && upper > 0) -+ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, -+ lower); -+ else { -+ if (upper > 0) { -+ debug("address %08x:%08x exceeds addressable space\n", -+ upper, lower); -+ return -FDT_ERR_BADVALUE; -+ } -+ -+ snprintf(name, sizeof(name), "%s@%x", basename, lower); -+ } -+ -+ node = fdt_add_subnode(blob, parent, name); -+ if (node < 0) -+ return node; -+ -+ err = fdt_generate_phandle(blob, &phandle); -+ if (err < 0) -+ return err; -+ -+ err = fdtdec_set_phandle(blob, node, phandle); -+ if (err < 0) -+ return err; -+ -+ /* store one or two address cells */ -+ if (na > 1) -+ *ptr++ = cpu_to_fdt32(upper); -+ -+ *ptr++ = cpu_to_fdt32(lower); -+ -+ /* store one or two size cells */ -+ lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); -+ -+ if (ns > 1) -+ *ptr++ = cpu_to_fdt32(upper); -+ -+ *ptr++ = cpu_to_fdt32(lower); -+ -+ err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells)); -+ if (err < 0) -+ return err; -+ -+ /* return the phandle for the new node for the caller to use */ -+ if (phandlep) -+ *phandlep = phandle; -+ -+ return 0; -+} -+ - int fdtdec_setup(void) - { - #if CONFIG_IS_ENABLED(OF_CONTROL) --- -2.21.0 - -From 58eb0f1af300064b91809e52d96479fd02ce9091 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:03 +0100 -Subject: [PATCH 07/12] fdtdec: Implement carveout support functions - -The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used -to read a carveout from a given node or add a carveout to a given node -using the standard device tree bindings (involving reserved-memory nodes -and the memory-region property). - -Reviewed-by: Simon Glass -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 81 ++++++++++++++++++++++++++++++++++++++++++++ - lib/fdtdec.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 168 insertions(+) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index b54ed38fb3..13b743f59a 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -1030,6 +1030,8 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); - * The phandle returned from the function call can be used to reference this - * reserved memory region from other nodes. - * -+ * See fdtdec_set_carveout() for a more elaborate example. -+ * - * @param blob FDT blob - * @param basename base name of the node to create - * @param carveout information about the carveout region -@@ -1040,6 +1042,85 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, - const struct fdt_memory *carveout, - uint32_t *phandlep); - -+/** -+ * fdtdec_get_carveout() - reads a carveout from an FDT -+ * -+ * Reads information about a carveout region from an FDT. The carveout is a -+ * referenced by its phandle that is read from a given property in a given -+ * node. -+ * -+ * @param blob FDT blob -+ * @param node name of a node -+ * @param name name of the property in the given node that contains -+ * the phandle for the carveout -+ * @param index index of the phandle for which to read the carveout -+ * @param carveout return location for the carveout information -+ * @return 0 on success or a negative error code on failure -+ */ -+int fdtdec_get_carveout(const void *blob, const char *node, const char *name, -+ unsigned int index, struct fdt_memory *carveout); -+ -+/** -+ * fdtdec_set_carveout() - sets a carveout region for a given node -+ * -+ * Sets a carveout region for a given node. If a reserved-memory node already -+ * exists for the carveout, the phandle for that node will be reused. If no -+ * such node exists, a new one will be created and a phandle to it stored in -+ * a specified property of the given node. -+ * -+ * As an example, consider the following code snippet: -+ * -+ * const char *node = "/host1x@50000000/dc@54240000"; -+ * struct fdt_memory fb = { -+ * .start = 0x92cb3000, -+ * .end = 0x934b2fff, -+ * }; -+ * -+ * fdtdec_set_carveout(fdt, node, "memory-region", 0, "framebuffer", &fb); -+ * -+ * dc@54200000 is a display controller and was set up by the bootloader to -+ * scan out the framebuffer specified by "fb". This would cause the following -+ * reserved memory region to be added: -+ * -+ * reserved-memory { -+ * #address-cells = <0x00000002>; -+ * #size-cells = <0x00000002>; -+ * ranges; -+ * -+ * framebuffer@92cb3000 { -+ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; -+ * phandle = <0x0000004d>; -+ * }; -+ * }; -+ * -+ * A "memory-region" property will also be added to the node referenced by the -+ * offset parameter. -+ * -+ * host1x@50000000 { -+ * ... -+ * -+ * dc@54240000 { -+ * ... -+ * memory-region = <0x0000004d>; -+ * ... -+ * }; -+ * -+ * ... -+ * }; -+ * -+ * @param blob FDT blob -+ * @param node name of the node to add the carveout to -+ * @param prop_name name of the property in which to store the phandle of -+ * the carveout -+ * @param index index of the phandle to store -+ * @param name base name of the reserved-memory node to create -+ * @param carveout information about the carveout to add -+ * @return 0 on success or a negative error code on failure -+ */ -+int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, -+ unsigned int index, const char *name, -+ const struct fdt_memory *carveout); -+ - /** - * Set up the device tree ready for use - */ -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index be54ad5bd0..bd05ab90fc 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1381,6 +1381,93 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, - return 0; - } - -+int fdtdec_get_carveout(const void *blob, const char *node, const char *name, -+ unsigned int index, struct fdt_memory *carveout) -+{ -+ const fdt32_t *prop; -+ uint32_t phandle; -+ int offset, len; -+ fdt_size_t size; -+ -+ offset = fdt_path_offset(blob, node); -+ if (offset < 0) -+ return offset; -+ -+ prop = fdt_getprop(blob, offset, name, &len); -+ if (!prop) { -+ debug("failed to get %s for %s\n", name, node); -+ return -FDT_ERR_NOTFOUND; -+ } -+ -+ if ((len % sizeof(phandle)) != 0) { -+ debug("invalid phandle property\n"); -+ return -FDT_ERR_BADPHANDLE; -+ } -+ -+ if (len < (sizeof(phandle) * (index + 1))) { -+ debug("invalid phandle index\n"); -+ return -FDT_ERR_BADPHANDLE; -+ } -+ -+ phandle = fdt32_to_cpu(prop[index]); -+ -+ offset = fdt_node_offset_by_phandle(blob, phandle); -+ if (offset < 0) { -+ debug("failed to find node for phandle %u\n", phandle); -+ return offset; -+ } -+ -+ carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset, -+ "reg", 0, &size, -+ true); -+ if (carveout->start == FDT_ADDR_T_NONE) { -+ debug("failed to read address/size from \"reg\" property\n"); -+ return -FDT_ERR_NOTFOUND; -+ } -+ -+ carveout->end = carveout->start + size - 1; -+ -+ return 0; -+} -+ -+int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, -+ unsigned int index, const char *name, -+ const struct fdt_memory *carveout) -+{ -+ uint32_t phandle; -+ int err, offset; -+ fdt32_t value; -+ -+ /* XXX implement support for multiple phandles */ -+ if (index > 0) { -+ debug("invalid index %u\n", index); -+ return -FDT_ERR_BADOFFSET; -+ } -+ -+ err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle); -+ if (err < 0) { -+ debug("failed to add reserved memory: %d\n", err); -+ return err; -+ } -+ -+ offset = fdt_path_offset(blob, node); -+ if (offset < 0) { -+ debug("failed to find offset for node %s: %d\n", node, offset); -+ return offset; -+ } -+ -+ value = cpu_to_fdt32(phandle); -+ -+ err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value)); -+ if (err < 0) { -+ debug("failed to set %s property for node %s: %d\n", prop_name, -+ node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ - int fdtdec_setup(void) - { - #if CONFIG_IS_ENABLED(OF_CONTROL) --- -2.21.0 - -From 1c1d7d2d6d85003ac2df657588a2c5a78f7db8ad Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:04 +0100 -Subject: [PATCH 08/12] fdtdec: Add Kconfig symbol for tests - -Runtime tests are provided as a test_fdtdec command implementation. Add -a Kconfig symbol that allows this command to be built so that the tests -can be used. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - lib/Kconfig | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/lib/Kconfig b/lib/Kconfig -index 366d164cd7..b1fccf7e8d 100644 ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -423,4 +423,8 @@ source lib/efi/Kconfig - source lib/efi_loader/Kconfig - source lib/optee/Kconfig - -+config TEST_FDTDEC -+ bool "enable fdtdec test" -+ depends on OF_LIBFDT -+ - endmenu --- -2.21.0 - -From aa6715267b997d800b7934ce14cf4e5cc6f9bcf9 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:05 +0100 -Subject: [PATCH 09/12] fdtdec: test: Fix build warning - -Hide the declaration of the "fd" variable When not building a DEBUG -configuration, to avoid the variable being unused. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - lib/fdtdec_test.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index a82e27de94..065fed278c 100644 ---- a/lib/fdtdec_test.c -+++ b/lib/fdtdec_test.c -@@ -79,7 +79,9 @@ static int make_fdt(void *fdt, int size, const char *aliases, - { - char name[20], value[20]; - const char *s; -+#if defined(DEBUG) && defined(CONFIG_SANDBOX) - int fd; -+#endif - - CHECK(fdt_create(fdt, size)); - CHECK(fdt_finish_reservemap(fdt)); --- -2.21.0 - -From 952f7a32bc2249e28e0dc08890d663a3b55f74b8 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:06 +0100 -Subject: [PATCH 10/12] fdtdec: test: Use compound statement macros - -This eliminates the need for intermediate helper functions and allow the -macros to return a value so that it can be used subsequently. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - lib/fdtdec_test.c | 64 ++++++++++++++++------------------------------- - 1 file changed, 22 insertions(+), 42 deletions(-) - -diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 065fed278c..9289509184 100644 ---- a/lib/fdtdec_test.c -+++ b/lib/fdtdec_test.c -@@ -15,48 +15,28 @@ - /* The size of our test fdt blob */ - #define FDT_SIZE (16 * 1024) - --/** -- * Check if an operation failed, and if so, print an error -- * -- * @param oper_name Name of operation -- * @param err Error code to check -- * -- * @return 0 if ok, -1 if there was an error -- */ --static int fdt_checkerr(const char *oper_name, int err) --{ -- if (err) { -- printf("%s: %s: %s\n", __func__, oper_name, fdt_strerror(err)); -- return -1; -- } -- -- return 0; --} -- --/** -- * Check the result of an operation and if incorrect, print an error -- * -- * @param oper_name Name of operation -- * @param expected Expected value -- * @param value Actual value -- * -- * @return 0 if ok, -1 if there was an error -- */ --static int checkval(const char *oper_name, int expected, int value) --{ -- if (expected != value) { -- printf("%s: %s: expected %d, but returned %d\n", __func__, -- oper_name, expected, value); -- return -1; -- } -- -- return 0; --} -+#define CHECK(op) ({ \ -+ int err = op; \ -+ if (err < 0) { \ -+ printf("%s: %s: %s\n", __func__, #op, \ -+ fdt_strerror(err)); \ -+ return err; \ -+ } \ -+ \ -+ err; \ -+ }) -+ -+#define CHECKVAL(op, expected) ({ \ -+ int err = op; \ -+ if (err != expected) { \ -+ printf("%s: %s: expected %d, but returned %d\n",\ -+ __func__, #op, expected, err); \ -+ return err; \ -+ } \ -+ \ -+ err; \ -+ }) - --#define CHECK(op) if (fdt_checkerr(#op, op)) return -1 --#define CHECKVAL(op, expected) \ -- if (checkval(#op, expected, op)) \ -- return -1 - #define CHECKOK(op) CHECKVAL(op, 0) - - /* maximum number of nodes / aliases to generate */ -@@ -138,7 +118,7 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) - CHECKVAL(make_fdt(blob, FDT_SIZE, aliases, nodes), 0); - CHECKVAL(fdtdec_find_aliases_for_id(blob, "i2c", - COMPAT_UNKNOWN, -- list, ARRAY_SIZE(list)), strlen(expect)); -+ list, ARRAY_SIZE(list)), (int)strlen(expect)); - - /* Check we got the right ones */ - for (i = 0, s = expect; *s; s++, i++) { --- -2.21.0 - -From cd380b7093b9a342244a1cd732621cb960bc1668 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:07 +0100 -Subject: [PATCH 11/12] fdtdec: test: Add carveout tests - -Implement carveout tests for 32-bit and 64-bit builds. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - lib/fdtdec_test.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 152 insertions(+) - -diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 9289509184..f6defe16c5 100644 ---- a/lib/fdtdec_test.c -+++ b/lib/fdtdec_test.c -@@ -141,6 +141,156 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) - return 0; - } - -+static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) -+{ -+ const char *basename = "/display"; -+ struct fdt_memory carveout = { -+#ifdef CONFIG_PHYS_64BIT -+ .start = 0x180000000, -+ .end = 0x18fffffff, -+#else -+ .start = 0x80000000, -+ .end = 0x8fffffff, -+#endif -+ }; -+ fdt32_t cells[4], *ptr = cells; -+ uint32_t upper, lower; -+ char name[32]; -+ int offset; -+ -+ /* store one or two address cells */ -+ lower = fdt_addr_unpack(carveout.start, &upper); -+ -+ if (na > 1 && upper > 0) -+ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, -+ lower); -+ else -+ snprintf(name, sizeof(name), "%s@%x", basename, lower); -+ -+ if (na > 1) -+ *ptr++ = cpu_to_fdt32(upper); -+ -+ *ptr++ = cpu_to_fdt32(lower); -+ -+ /* store one or two size cells */ -+ lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); -+ -+ if (ns > 1) -+ *ptr++ = cpu_to_fdt32(upper); -+ -+ *ptr++ = cpu_to_fdt32(lower); -+ -+ offset = CHECK(fdt_add_subnode(fdt, 0, name + 1)); -+ CHECK(fdt_setprop(fdt, offset, "reg", cells, (na + ns) * sizeof(*cells))); -+ -+ return fdtdec_set_carveout(fdt, name, "memory-region", 0, -+ "framebuffer", &carveout); -+} -+ -+static int check_fdt_carveout(void *fdt, uint32_t address_cells, -+ uint32_t size_cells) -+{ -+#ifdef CONFIG_PHYS_64BIT -+ const char *name = "/display@1,80000000"; -+ const struct fdt_memory expected = { -+ .start = 0x180000000, -+ .end = 0x18fffffff, -+ }; -+#else -+ const char *name = "/display@80000000"; -+ const struct fdt_memory expected = { -+ .start = 0x80000000, -+ .end = 0x8fffffff, -+ }; -+#endif -+ struct fdt_memory carveout; -+ -+ printf("carveout: %pap-%pap na=%u ns=%u: ", &expected.start, -+ &expected.end, address_cells, size_cells); -+ -+ CHECK(fdtdec_get_carveout(fdt, name, "memory-region", 0, &carveout)); -+ -+ if ((carveout.start != expected.start) || -+ (carveout.end != expected.end)) { -+ printf("carveout: %pap-%pap, expected %pap-%pap\n", -+ &carveout.start, &carveout.end, -+ &expected.start, &expected.end); -+ return 1; -+ } -+ -+ printf("pass\n"); -+ return 0; -+} -+ -+static int make_fdt_carveout(void *fdt, int size, uint32_t address_cells, -+ uint32_t size_cells) -+{ -+ fdt32_t na = cpu_to_fdt32(address_cells); -+ fdt32_t ns = cpu_to_fdt32(size_cells); -+#if defined(DEBUG) && defined(CONFIG_SANDBOX) -+ char filename[512]; -+ int fd; -+#endif -+ int err; -+ -+ CHECK(fdt_create(fdt, size)); -+ CHECK(fdt_finish_reservemap(fdt)); -+ CHECK(fdt_begin_node(fdt, "")); -+ CHECK(fdt_property(fdt, "#address-cells", &na, sizeof(na))); -+ CHECK(fdt_property(fdt, "#size-cells", &ns, sizeof(ns))); -+ CHECK(fdt_end_node(fdt)); -+ CHECK(fdt_finish(fdt)); -+ CHECK(fdt_pack(fdt)); -+ -+ CHECK(fdt_open_into(fdt, fdt, FDT_SIZE)); -+ -+ err = make_fdt_carveout_device(fdt, address_cells, size_cells); -+ -+#if defined(DEBUG) && defined(CONFIG_SANDBOX) -+ snprintf(filename, sizeof(filename), "/tmp/fdtdec-carveout-%u-%u.dtb", -+ address_cells, size_cells); -+ -+ fd = os_open(filename, OS_O_CREAT | OS_O_WRONLY); -+ if (fd < 0) { -+ printf("could not open .dtb file to write\n"); -+ goto out; -+ } -+ -+ os_write(fd, fdt, size); -+ os_close(fd); -+ -+out: -+#endif -+ return err; -+} -+ -+static int check_carveout(void) -+{ -+ void *fdt; -+ -+ fdt = malloc(FDT_SIZE); -+ if (!fdt) { -+ printf("%s: out of memory\n", __func__); -+ return 1; -+ } -+ -+#ifndef CONFIG_PHYS_64BIT -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), 0); -+ CHECKOK(check_fdt_carveout(fdt, 1, 1)); -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), 0); -+ CHECKOK(check_fdt_carveout(fdt, 1, 2)); -+#else -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), -FDT_ERR_BADVALUE); -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), -FDT_ERR_BADVALUE); -+#endif -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 1), 0); -+ CHECKOK(check_fdt_carveout(fdt, 2, 1)); -+ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0); -+ CHECKOK(check_fdt_carveout(fdt, 2, 2)); -+ -+ return 0; -+} -+ - static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) - { -@@ -182,6 +332,8 @@ static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, - CHECKOK(run_test("2a 1a 0a", "a", " a")); - CHECKOK(run_test("0a 1a 2a", "a", "a")); - -+ CHECKOK(check_carveout()); -+ - printf("Test passed\n"); - return 0; - } --- -2.21.0 - -From ac9681d2d1fa09977106a32c1e2194c7bc6b5c80 Mon Sep 17 00:00:00 2001 -From: Thierry Reding -Date: Thu, 21 Mar 2019 19:10:08 +0100 -Subject: [PATCH 12/12] sandbox: Enable fdtdec tests - -Enable fdtdec tests on sandbox configurations so that they can be run to -validate the fdtdec implementation. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - configs/sandbox64_defconfig | 1 + - configs/sandbox_defconfig | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index da4bdced31..c04ecd915a 100644 ---- a/configs/sandbox64_defconfig -+++ b/configs/sandbox64_defconfig -@@ -194,6 +194,7 @@ CONFIG_CMD_DHRYSTONE=y - CONFIG_TPM=y - CONFIG_LZ4=y - CONFIG_ERRNO_STR=y -+CONFIG_TEST_FDTDEC=y - CONFIG_UNIT_TEST=y - CONFIG_UT_TIME=y - CONFIG_UT_DM=y -diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 193e41896c..bb508a8d02 100644 ---- a/configs/sandbox_defconfig -+++ b/configs/sandbox_defconfig -@@ -215,6 +215,7 @@ CONFIG_CMD_DHRYSTONE=y - CONFIG_TPM=y - CONFIG_LZ4=y - CONFIG_ERRNO_STR=y -+CONFIG_TEST_FDTDEC=y - CONFIG_UNIT_TEST=y - CONFIG_UT_TIME=y - CONFIG_UT_DM=y --- -2.21.0 - -From patchwork Mon Apr 15 08:08:20 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085479 -X-Patchwork-Delegate: sjg@chromium.org -Message-Id: <20190415080821.441-1-thierry.reding@gmail.com> -To: Simon Glass -Cc: u-boot@lists.denx.de -Date: Mon, 15 Apr 2019 10:08:20 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The fdt_setprop_u32() function does everything that we need, so we -really only use the function as a convenience wrapper, in which case it -can simply be a static inline function. - -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 5 ++++- - lib/fdtdec.c | 7 ------- - 2 files changed, 4 insertions(+), 8 deletions(-) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index 266c58271f0b..110aa6ab6dea 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -1029,7 +1029,10 @@ int fdtdec_setup_memory_banksize(void); - * @param phandle phandle to set for the given node - * @return 0 on success or a negative error code on failure - */ --int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); -+static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) -+{ -+ return fdt_setprop_u32(blob, node, "phandle", phandle); -+} - - /** - * fdtdec_add_reserved_memory() - add or find a reserved-memory node -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 9c9c30234732..fea44a9a8c65 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1261,13 +1261,6 @@ __weak void *board_fdt_blob_setup(void) - } - #endif - --int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) --{ -- fdt32_t value = cpu_to_fdt32(phandle); -- -- return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); --} -- - static int fdtdec_init_reserved_memory(void *blob) - { - int na, ns, node, err; - -From patchwork Mon Apr 15 08:08:21 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,2/2] fdtdec: Remove fdt_{addr,size}_unpack() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085480 -X-Patchwork-Delegate: sjg@chromium.org -Message-Id: <20190415080821.441-2-thierry.reding@gmail.com> -To: Simon Glass -Cc: u-boot@lists.denx.de -Date: Mon, 15 Apr 2019 10:08:21 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -U-Boot already defines the {upper,lower}_32_bits() macros that have the -same purpose. Use the existing macros instead of defining new APIs. - -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 24 ------------------------ - lib/fdtdec.c | 8 ++++++-- - lib/fdtdec_test.c | 8 ++++++-- - 3 files changed, 12 insertions(+), 28 deletions(-) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index 110aa6ab6dea..fa8e34f6f960 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -24,30 +24,6 @@ - typedef phys_addr_t fdt_addr_t; - typedef phys_size_t fdt_size_t; - --static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) --{ -- if (upper) --#ifdef CONFIG_PHYS_64BIT -- *upper = addr >> 32; --#else -- *upper = 0; --#endif -- -- return addr; --} -- --static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) --{ -- if (upper) --#ifdef CONFIG_PHYS_64BIT -- *upper = size >> 32; --#else -- *upper = 0; --#endif -- -- return size; --} -- - #ifdef CONFIG_PHYS_64BIT - #define FDT_ADDR_T_NONE (-1U) - #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index fea44a9a8c65..d0ba88897335 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, - fdt32_t cells[4] = {}, *ptr = cells; - uint32_t upper, lower, phandle; - int parent, node, na, ns, err; -+ fdt_size_t size; - char name[64]; - - /* create an empty /reserved-memory node if one doesn't exist */ -@@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, - * Unpack the start address and generate the name of the new node - * base on the basename and the unit-address. - */ -- lower = fdt_addr_unpack(carveout->start, &upper); -+ upper = upper_32_bits(carveout->start); -+ lower = lower_32_bits(carveout->start); - - if (na > 1 && upper > 0) - snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, -@@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, - *ptr++ = cpu_to_fdt32(lower); - - /* store one or two size cells */ -- lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); -+ size = carveout->end - carveout->start + 1; -+ upper = upper_32_bits(size); -+ lower = lower_32_bits(size); - - if (ns > 1) - *ptr++ = cpu_to_fdt32(upper); -diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index f6defe16c5a6..1f4f27054057 100644 ---- a/lib/fdtdec_test.c -+++ b/lib/fdtdec_test.c -@@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) - }; - fdt32_t cells[4], *ptr = cells; - uint32_t upper, lower; -+ fdt_size_t size; - char name[32]; - int offset; - - /* store one or two address cells */ -- lower = fdt_addr_unpack(carveout.start, &upper); -+ upper = upper_32_bits(carveout.start); -+ lower = lower_32_bits(carveout.start); - - if (na > 1 && upper > 0) - snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, -@@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) - *ptr++ = cpu_to_fdt32(lower); - - /* store one or two size cells */ -- lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); -+ size = carveout.end - carveout.start + 1; -+ upper = upper_32_bits(size); -+ lower = lower_32_bits(size); - - if (ns > 1) - *ptr++ = cpu_to_fdt32(upper); diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch deleted file mode 100644 index 03d2da9..0000000 --- a/ARM-tegra-Miscellaneous-improvements.patch +++ /dev/null @@ -1,4625 +0,0 @@ -From patchwork Mon Apr 15 09:32:13 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,01/27] fdtdec: Add fdtdec_set_ethernet_mac_address() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085515 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-2-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:13 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This function can be used to set the local MAC address for the default -Ethernet interface in its device tree node. The default interface is -identified by the "ethernet" alias. - -One case where this is useful is for devices that store their MAC -address in a custom location. Once extracted, board code can store the -MAC address in U-Boot's control DTB so that it will automatically be -used by the Ethernet uclass. - -Signed-off-by: Thierry Reding ---- - include/fdtdec.h | 24 ++++++++++++++++++++++++ - lib/fdtdec.c | 29 +++++++++++++++++++++++++++++ - 2 files changed, 53 insertions(+) - -diff --git a/include/fdtdec.h b/include/fdtdec.h -index fa8e34f6f960..e6c22dd5cd5c 100644 ---- a/include/fdtdec.h -+++ b/include/fdtdec.h -@@ -996,6 +996,30 @@ int fdtdec_setup_memory_banksize_fdt(const void *blob); - */ - int fdtdec_setup_memory_banksize(void); - -+/** -+ * fdtdec_set_ethernet_mac_address() - set MAC address for default interface -+ * -+ * Looks up the default interface via the "ethernet" alias (in the /aliases -+ * node) and stores the given MAC in its "local-mac-address" property. This -+ * is useful on platforms that store the MAC address in a custom location. -+ * Board code can call this in the late init stage to make sure that the -+ * interface device tree node has the right MAC address configured for the -+ * Ethernet uclass to pick it up. -+ * -+ * Typically the FDT passed into this function will be U-Boot's control DTB. -+ * Given that a lot of code may be holding offsets to various nodes in that -+ * tree, this code will only set the "local-mac-address" property in-place, -+ * which means that it needs to exist and have space for the 6-byte address. -+ * This ensures that the operation is non-destructive and does not invalidate -+ * offsets that other drivers may be using. -+ * -+ * @param fdt FDT blob -+ * @param mac buffer containing the MAC address to set -+ * @param size size of MAC address -+ * @return 0 on success or a negative error code on failure -+ */ -+int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size); -+ - /** - * fdtdec_set_phandle() - sets the phandle of a given node - * -diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index d0ba88897335..3ee786b57940 100644 ---- a/lib/fdtdec.c -+++ b/lib/fdtdec.c -@@ -1261,6 +1261,35 @@ __weak void *board_fdt_blob_setup(void) - } - #endif - -+int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) -+{ -+ const char *path; -+ int offset, err; -+ -+ if (!is_valid_ethaddr(mac)) -+ return -EINVAL; -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return 0; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) { -+ debug("ethernet alias points to absent node %s\n", path); -+ return -ENOENT; -+ } -+ -+ err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size); -+ if (err < 0) -+ return err; -+ -+ debug("MAC address: %pM\n", mac); -+ -+ return 0; -+} -+ - static int fdtdec_init_reserved_memory(void *blob) - { - int na, ns, node, err; - -From patchwork Mon Apr 15 09:32:14 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,02/27] lib: Implement strndup() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085516 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-3-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:14 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Signed-off-by: Thierry Reding ---- - include/linux/string.h | 1 + - lib/string.c | 23 +++++++++++++++++++++++ - 2 files changed, 24 insertions(+) - -diff --git a/include/linux/string.h b/include/linux/string.h -index 36066207392e..5d63be4ce5b0 100644 ---- a/include/linux/string.h -+++ b/include/linux/string.h -@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); - #ifndef __HAVE_ARCH_STRDUP - extern char * strdup(const char *); - #endif -+extern char * strndup(const char *, size_t); - #ifndef __HAVE_ARCH_STRSWAB - extern char * strswab(const char *); - #endif -diff --git a/lib/string.c b/lib/string.c -index af17c16f616d..9b779ddc3bbe 100644 ---- a/lib/string.c -+++ b/lib/string.c -@@ -326,6 +326,29 @@ char * strdup(const char *s) - } - #endif - -+char * strndup(const char *s, size_t n) -+{ -+ size_t len; -+ char *new; -+ -+ if (s == NULL) -+ return NULL; -+ -+ len = strlen(s); -+ -+ if (n < len) -+ len = n; -+ -+ new = malloc(len + 1); -+ if (new == NULL) -+ return NULL; -+ -+ strncpy(new, s, len); -+ new[len] = '\0'; -+ -+ return new; -+} -+ - #ifndef __HAVE_ARCH_STRSPN - /** - * strspn - Calculate the length of the initial substring of @s which only - -From patchwork Mon Apr 15 09:32:15 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 03/27] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085517 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-4-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:15 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -On Tegra210 the parents for the disp1 and disp2 clocks are slightly -different from earlier chips. Only pll_p, pll_d_out0, pll_d2_out0 and -clk_m are valid parents (technically pll_d_out is as well, but U-Boot -doesn't know anything about it). Fix up the type name and the mux -definition. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/tegra210/clock.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c -index 06068c4b7b8d..0d7cafea2017 100644 ---- a/arch/arm/mach-tegra/tegra210/clock.c -+++ b/arch/arm/mach-tegra/tegra210/clock.c -@@ -40,7 +40,7 @@ enum clock_type_id { - CLOCK_TYPE_PDCT, - CLOCK_TYPE_ACPT, - CLOCK_TYPE_ASPTE, -- CLOCK_TYPE_PMDACD2T, -+ CLOCK_TYPE_PDD2T, - CLOCK_TYPE_PCST, - CLOCK_TYPE_DP, - -@@ -97,8 +97,8 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = { - { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC), - CLK(EPCI), CLK(NONE), CLK(NONE), CLK(NONE), - MASK_BITS_31_29}, -- { CLK(PERIPH), CLK(MEMORY), CLK(DISPLAY), CLK(AUDIO), -- CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE), -+ { CLK(PERIPH), CLK(NONE), CLK(DISPLAY), CLK(NONE), -+ CLK(NONE), CLK(DISPLAY2), CLK(OSC), CLK(NONE), - MASK_BITS_31_29}, - { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC), - CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), -@@ -174,8 +174,8 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = { - TYPE(PERIPHC_0bh, CLOCK_TYPE_NONE), - TYPE(PERIPHC_0ch, CLOCK_TYPE_NONE), - TYPE(PERIPHC_SBC1, CLOCK_TYPE_PC2CC3M_T), -- TYPE(PERIPHC_DISP1, CLOCK_TYPE_PMDACD2T), -- TYPE(PERIPHC_DISP2, CLOCK_TYPE_PMDACD2T), -+ TYPE(PERIPHC_DISP1, CLOCK_TYPE_PDD2T), -+ TYPE(PERIPHC_DISP2, CLOCK_TYPE_PDD2T), - - /* 0x10 */ - TYPE(PERIPHC_10h, CLOCK_TYPE_NONE), - -From patchwork Mon Apr 15 09:32:16 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 04/27] ARM: tegra: Remove disp1 clock initialization on Tegra210 -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085526 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-5-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:16 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -pll_c is not a valid parent for the disp1 clock, so trying to set it -will fail. Given that display is not used in U-Boot, remove the init -table entry so that disp1 will keep its default parent (clk_m). - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/tegra210/clock.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c -index 0d7cafea2017..b240860f08cf 100644 ---- a/arch/arm/mach-tegra/tegra210/clock.c -+++ b/arch/arm/mach-tegra/tegra210/clock.c -@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = { - { PERIPH_ID_SBC5, CLOCK_ID_PERIPH }, - { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, - { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, -- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, - { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, - { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, - { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, - -From patchwork Mon Apr 15 09:32:17 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,05/27] ARM: tegra: Use common header for PMU declarations -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085523 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-6-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:17 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -There's no need to replicate the pmu.h header file for every Tegra SoC -generation. Use a single header that is shared across generations. - -Signed-off-by: Thierry Reding ---- - .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- - arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ - arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ - arch/arm/mach-tegra/board2.c | 2 +- - arch/arm/mach-tegra/emc.c | 2 +- - 7 files changed, 5 insertions(+), 55 deletions(-) - rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) - delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h - -diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h -similarity index 73% -rename from arch/arm/include/asm/arch-tegra20/pmu.h -rename to arch/arm/include/asm/arch-tegra/pmu.h -index 18766dfed2bb..e850875d3166 100644 ---- a/arch/arm/include/asm/arch-tegra20/pmu.h -+++ b/arch/arm/include/asm/arch-tegra/pmu.h -@@ -4,10 +4,10 @@ - * NVIDIA Corporation - */ - --#ifndef _ARCH_PMU_H_ --#define _ARCH_PMU_H_ -+#ifndef _TEGRA_PMU_H_ -+#define _TEGRA_PMU_H_ - - /* Set core and CPU voltages to nominal levels */ - int pmu_set_nominal(void); - --#endif /* _ARCH_PMU_H_ */ -+#endif /* _TEGRA_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h -deleted file mode 100644 -index 1e571ee7b317..000000000000 ---- a/arch/arm/include/asm/arch-tegra114/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA114_PMU_H_ --#define _TEGRA114_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA114_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h -deleted file mode 100644 -index c38393edefda..000000000000 ---- a/arch/arm/include/asm/arch-tegra124/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2013 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA124_PMU_H_ --#define _TEGRA124_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA124_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h -deleted file mode 100644 -index 6ea36aa41876..000000000000 ---- a/arch/arm/include/asm/arch-tegra210/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2015 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA210_PMU_H_ --#define _TEGRA210_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA210_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h -deleted file mode 100644 -index a823f0fbfc61..000000000000 ---- a/arch/arm/include/asm/arch-tegra30/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA30_PMU_H_ --#define _TEGRA30_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA30_PMU_H_ */ -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 12257a42b51b..b8d5ef0322cb 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -24,7 +25,6 @@ - #include - #include - #include --#include - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include -diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c -index 6697909d9a3e..66628933b653 100644 ---- a/arch/arm/mach-tegra/emc.c -+++ b/arch/arm/mach-tegra/emc.c -@@ -8,10 +8,10 @@ - #include - #include - #include --#include - #include - #include - #include -+#include - #include - - DECLARE_GLOBAL_DATA_PTR; - -From patchwork Mon Apr 15 09:32:18 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,06/27] ARM: tegra: Guard clock code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085522 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-7-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:18 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Clock code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 2 ++ - arch/arm/mach-tegra/board2.c | 12 ++++++++++-- - 4 files changed, 18 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 86b1cd11f752..ee078fec9adc 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT - config SPL_SERIAL_SUPPORT - default y - -+config TEGRA_CLKRST -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON - select SPL - select SPL_BOARD_INIT if SPL - select SUPPORT_SPL -+ select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_NO_BPMP -@@ -100,6 +104,7 @@ config TEGRA124 - config TEGRA210 - bool "Tegra210 family" - select TEGRA_ARMV8_COMMON -+ select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_NO_BPMP - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index d4b4666fb1e2..0e812818d7a2 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -16,7 +16,7 @@ endif - obj-y += ap.o - obj-y += board.o board2.o - obj-y += cache.o --obj-y += clock.o -+obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-y += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index f8fc042a1dcc..ecd5001de4c5 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -9,7 +9,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b8d5ef0322cb..b94077221f77 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -22,7 +22,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -@@ -109,8 +111,10 @@ int board_init(void) - __maybe_unused int board_id; - - /* Do clocks and UART first so that printf() works */ -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - clock_init(); - clock_verify(); -+#endif - - tegra_gpu_config(); - -@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); - - int board_early_init_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - if (!clock_early_init_done()) - clock_early_init(); -+#endif - - #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) - #define USBCMD_FS2 (1 << 15) -@@ -193,10 +199,12 @@ int board_early_init_f(void) - #endif - - /* Do any special system timer/TSC setup */ --#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) -+# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (!tegra_cpu_is_non_secure()) --#endif -+# endif - arch_timer_init(); -+#endif - - pinmux_init(); - board_init_uart_f(); - -From patchwork Mon Apr 15 09:32:19 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 07/27] ARM: tegra: Guard GP pad control code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085520 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-8-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:19 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The GP pad control code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cache.c | 2 ++ - 3 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index ee078fec9adc..265051b18aaf 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT - config TEGRA_CLKRST - bool - -+config TEGRA_GP_PADCTRL -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -106,6 +110,7 @@ config TEGRA210 - select TEGRA_ARMV8_COMMON - select TEGRA_CLKRST - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 0e812818d7a2..69f802c01b45 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -13,7 +13,7 @@ else - obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o - endif - --obj-y += ap.o -+obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o -diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c -index be414e4e4aca..d7063490e222 100644 ---- a/arch/arm/mach-tegra/cache.c -+++ b/arch/arm/mach-tegra/cache.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) - #include -+#endif - - #ifndef CONFIG_ARM64 - void config_cache(void) - -From patchwork Mon Apr 15 09:32:20 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 08/27] ARM: tegra: Guard memory controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085531 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-9-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:20 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Memory controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/board.c | 7 +++++++ - 2 files changed, 12 insertions(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 265051b18aaf..5763c4ae3cd1 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -26,6 +26,9 @@ config TEGRA_IVC - U-Boot, it is typically used for communication between the main CPU - and various auxiliary processors. - -+config TEGRA_MC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -111,6 +115,7 @@ config TEGRA210 - select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index ecd5001de4c5..7ef5a67edd1f 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -13,7 +13,9 @@ - #include - #endif - #include -+#if IS_ENABLED(CONFIG_TEGRA_MC) - #include -+#endif - #include - #include - #include -@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) - } - #endif - -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* Read the RAM size directly from the memory controller */ - static phys_size_t query_sdram_size(void) - { -@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) - - return size_bytes; - } -+#endif - - int dram_init(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -+#endif -+ - return 0; - } - - -From patchwork Mon Apr 15 09:32:21 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 09/27] ARM: tegra: Guard pin controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085527 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-10-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:21 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Pin controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 6 ++++++ - arch/arm/mach-tegra/board2.c | 2 ++ - 4 files changed, 14 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 5763c4ae3cd1..be20ac2e804e 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -29,6 +29,9 @@ config TEGRA_IVC - config TEGRA_MC - bool - -+config TEGRA_PINCTRL -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -117,6 +121,7 @@ config TEGRA210 - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 69f802c01b45..395e0191a458 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o --obj-y += pinmux-common.o -+obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o - endif -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 7ef5a67edd1f..b65bdde5a78d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -12,7 +12,9 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include -+#endif - #if IS_ENABLED(CONFIG_TEGRA_MC) - #include - #endif -@@ -132,6 +134,7 @@ int dram_init(void) - return 0; - } - -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - static int uart_configs[] = { - #if defined(CONFIG_TEGRA20) - #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) -@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) - } - } - } -+#endif - - void board_init_uart_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - int uart_ids = 0; /* bit mask of which UART ids to enable */ - - #ifdef CONFIG_TEGRA_ENABLE_UARTA -@@ -220,6 +225,7 @@ void board_init_uart_f(void) - uart_ids |= UARTE; - #endif - setup_uarts(uart_ids); -+#endif - } - - #if !CONFIG_IS_ENABLED(OF_CONTROL) -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b94077221f77..ce1c9346959d 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -25,8 +25,10 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include - #include -+#endif - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include - -From patchwork Mon Apr 15 09:32:22 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 10/27] ARM: tegra: Guard powergate code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085529 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-11-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:22 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Powergate code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - 2 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index be20ac2e804e..db9198348d3f 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -32,6 +32,9 @@ config TEGRA_MC - config TEGRA_PINCTRL - bool - -+config TEGRA_PMC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -122,6 +126,7 @@ config TEGRA210 - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 395e0191a458..517be21ee5f5 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -18,7 +18,7 @@ obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o --obj-y += powergate.o -+obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - endif - - -From patchwork Mon Apr 15 09:32:23 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,11/27] ARM: tegra: Fix save_boot_params() prototype -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085528 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-12-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:23 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The save_boot_params() function takes as its first four arguments the -first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of -which are 32 bits wide. However, on 64-bit ARM thene registers are x0, -x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing -the save_boot_params() implementation on 64-bit ARM, change it to take -unsigned long parameters rather than the fixed size 32-bit integers. -This ensures that the correct values are passed. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/board.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index b65bdde5a78d..59d2f347485d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -42,7 +42,8 @@ enum { - static bool from_spl __attribute__ ((section(".data"))); - - #ifndef CONFIG_SPL_BUILD --void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) -+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, -+ unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; - save_boot_params_ret(); - -From patchwork Mon Apr 15 09:32:24 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 12/27] ARM: tegra: Allow boards to override boot target devices -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085524 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-13-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:24 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Boards may not support all the boot target devices in the default list -for Tegra devices. Allow a board to override the list and default to the -standard list only if the board hasn't specified one itself. - -Signed-off-by: Thierry Reding ---- - include/configs/tegra-common-post.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h -index e54428ba43e2..9685ee5059ab 100644 ---- a/include/configs/tegra-common-post.h -+++ b/include/configs/tegra-common-post.h -@@ -21,12 +21,14 @@ - #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ - - #ifndef CONFIG_SPL_BUILD -+#ifndef BOOT_TARGET_DEVICES - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) -+#endif - #include - #else - #define BOOTENV - -From patchwork Mon Apr 15 09:32:25 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,13/27] ARM: tegra: Support TZ-only access to PMC -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085544 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-14-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:25 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Some devices may restrict access to the PMC to TrustZone software only. -Non-TZ software can detect this and use SMC calls to the firmware that -runs in the TrustZone to perform accesses to PMC registers. - -Note that this also fixes reset_cpu() and the enterrcm command on -Tegra186 where they were previously trying to access the PMC at a wrong -physical address. - -Based on work by Kalyani Chidambaram and Tom -Warren . - -Signed-off-by: Thierry Reding ---- - arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- - arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ - arch/arm/mach-tegra/Kconfig | 5 ++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/clock.c | 13 ++-- - arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- - arch/arm/mach-tegra/cpu.c | 20 +++--- - arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- - arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ - arch/arm/mach-tegra/powergate.c | 11 +-- - 10 files changed, 151 insertions(+), 65 deletions(-) - delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S - create mode 100644 arch/arm/mach-tegra/pmc.c - -diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h -index 34bbe75d5fdb..1524bf291164 100644 ---- a/arch/arm/include/asm/arch-tegra/pmc.h -+++ b/arch/arm/include/asm/arch-tegra/pmc.h -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * (C) Copyright 2010-2015 -+ * (C) Copyright 2010-2019 - * NVIDIA Corporation - */ - -@@ -388,4 +388,22 @@ struct pmc_ctlr { - /* APBDEV_PMC_CNTRL2_0 0x440 */ - #define HOLD_CKE_LOW_EN (1 << 12) - -+/* PMC read/write functions */ -+u32 tegra_pmc_readl(unsigned long offset); -+void tegra_pmc_writel(u32 value, unsigned long offset); -+ -+#define PMC_CNTRL 0x0 -+#define PMC_CNTRL_MAIN_RST BIT(4) -+ -+#if IS_ENABLED(CONFIG_TEGRA186) -+# define PMC_SCRATCH0 0x32000 -+#else -+# define PMC_SCRATCH0 0x00050 -+#endif -+ -+/* for secure PMC */ -+#define TEGRA_SMC_PMC 0xc2fffe00 -+#define TEGRA_SMC_PMC_READ 0xaa -+#define TEGRA_SMC_PMC_WRITE 0xbb -+ - #endif /* PMC_H */ -diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h -index 7ae0129e2db3..7a4e0972fb76 100644 ---- a/arch/arm/include/asm/arch-tegra/tegra.h -+++ b/arch/arm/include/asm/arch-tegra/tegra.h -@@ -30,7 +30,13 @@ - #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) - #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) - #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) -+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -+ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ -+ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) - #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) -+#else -+#define NV_PA_PMC_BASE 0xc360000 -+#endif - #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) - #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) - #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index db9198348d3f..28914a34a1b5 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -35,6 +35,10 @@ config TEGRA_PINCTRL - config TEGRA_PMC - bool - -+config TEGRA_PMC_SECURE -+ bool -+ depends on TEGRA_PMC -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -127,6 +131,7 @@ config TEGRA210 - select TEGRA_NO_BPMP - select TEGRA_PINCTRL - select TEGRA_PMC -+ select TEGRA_PMC_SECURE - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 517be21ee5f5..f8bc65aa8b18 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0+ - # --# (C) Copyright 2010-2015 Nvidia Corporation. -+# (C) Copyright 2010-2019 Nvidia Corporation. - # - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -@@ -27,11 +27,11 @@ obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o - obj-$(CONFIG_TEGRA_IVC) += ivc.o --obj-y += lowlevel_init.o - ifndef CONFIG_SPL_BUILD - obj-$(CONFIG_ARMV7_PSCI) += psci.o - endif - obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o -+obj-y += pmc.o - - obj-$(CONFIG_TEGRA20) += tegra20/ - obj-$(CONFIG_TEGRA30) += tegra30/ -diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c -index 096330748f2b..c9cd4e6aaeb7 100644 ---- a/arch/arm/mach-tegra/clock.c -+++ b/arch/arm/mach-tegra/clock.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - /* Tegra SoC common clock control functions */ -@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) - - int clock_external_output(int clk_id) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -+ u32 val; - - if (clk_id >= 1 && clk_id <= 3) { -- setbits_le32(&pmc->pmc_clk_out_cntrl, -- 1 << (2 + (clk_id - 1) * 8)); -+ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ val |= 1 << (2 + (clk_id - 1) * 8); -+ tegra_pmc_writel(val, -+ offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ - } else { - printf("%s: Unknown output clock id %d\n", __func__, clk_id); - return -EINVAL; -diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c -index 4e6beb3e5bb4..4a889f0e3422 100644 ---- a/arch/arm/mach-tegra/cmd_enterrcm.c -+++ b/arch/arm/mach-tegra/cmd_enterrcm.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. - * - * Derived from code (arch/arm/lib/reset.c) that is: - * -@@ -31,12 +31,10 @@ - static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- - puts("Entering RCM...\n"); - udelay(50000); - -- pmc->pmc_scratch0 = 2; -+ tegra_pmc_writel(2, PMC_SCRATCH0); - disable_interrupts(); - reset_cpu(0); - -diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c -index 1b6ad074ed8f..3d140760e68f 100644 ---- a/arch/arm/mach-tegra/cpu.c -+++ b/arch/arm/mach-tegra/cpu.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) - - static int is_cpu_powered(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- -- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; -+ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; - } - - static void remove_cpu_io_clamps(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - debug("%s entry\n", __func__); - - /* Remove the clamps on the CPU I/O signals */ -- reg = readl(&pmc->pmc_remove_clamping); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); - reg |= CPU_CLMP; -- writel(reg, &pmc->pmc_remove_clamping); -+ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); - - /* Give I/O signals time to stabilize */ - udelay(IO_STABILIZATION_DELAY); -@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) - - void powerup_cpu(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - int timeout = IO_STABILIZATION_DELAY; - debug("%s entry\n", __func__); - - if (!is_cpu_powered()) { - /* Toggle the CPU power state (OFF -> ON) */ -- reg = readl(&pmc->pmc_pwrgate_toggle); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - reg &= PARTID_CP; - reg |= START_CP; -- writel(reg, &pmc->pmc_pwrgate_toggle); -+ tegra_pmc_writel(reg, -+ offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - - /* Wait for the power to come up */ - while (!is_cpu_powered()) { -diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S -deleted file mode 100644 -index 626f1b642745..000000000000 ---- a/arch/arm/mach-tegra/lowlevel_init.S -+++ /dev/null -@@ -1,39 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * SoC-specific setup info -- * -- * (C) Copyright 2010,2011 -- * NVIDIA Corporation -- */ -- --#include --#include -- --#ifdef CONFIG_ARM64 -- .align 5 --ENTRY(reset_cpu) -- /* get address for global reset register */ -- ldr x1, =PRM_RSTCTRL -- ldr w3, [x1] -- /* force reset */ -- orr w3, w3, #0x10 -- str w3, [x1] -- mov w0, w0 --1: -- b 1b --ENDPROC(reset_cpu) --#else -- .align 5 --ENTRY(reset_cpu) -- ldr r1, rstctl @ get addr for global reset -- @ reg -- ldr r3, [r1] -- orr r3, r3, #0x10 -- str r3, [r1] @ force reset -- mov r0, r0 --_loop_forever: -- b _loop_forever --rstctl: -- .word PRM_RSTCTRL --ENDPROC(reset_cpu) --#endif -diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c -new file mode 100644 -index 000000000000..afd3c54179c1 ---- /dev/null -+++ b/arch/arm/mach-tegra/pmc.c -@@ -0,0 +1,92 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+ */ -+ -+#include -+ -+#include -+ -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+static bool tegra_pmc_detect_tz_only(void) -+{ -+ static bool initialized = false; -+ static bool is_tz_only = false; -+ u32 value, saved; -+ -+ if (!initialized) { -+ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = saved ^ 0xffffffff; -+ -+ if (value == 0xffffffff) -+ value = 0xdeadbeef; -+ -+ /* write pattern and read it back */ -+ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ -+ /* if we read all-zeroes, access is restricted to TZ only */ -+ if (value == 0) { -+ debug("access to PMC is restricted to TZ\n"); -+ is_tz_only = true; -+ } else { -+ /* restore original value */ -+ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ } -+ -+ initialized = true; -+ } -+ -+ return is_tz_only; -+} -+#endif -+ -+uint32_t tegra_pmc_readl(unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, -+ 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return res.a1; -+ } -+#endif -+ -+ return readl(NV_PA_PMC_BASE + offset); -+} -+ -+void tegra_pmc_writel(u32 value, unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, -+ value, 0, 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return; -+ } -+#endif -+ -+ writel(value, NV_PA_PMC_BASE + offset); -+} -+ -+void reset_cpu(ulong addr) -+{ -+ u32 value; -+ -+ value = tegra_pmc_readl(PMC_CNTRL); -+ value |= PMC_CNTRL_MAIN_RST; -+ tegra_pmc_writel(value, PMC_CNTRL); -+} -diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c -index e45f0961b242..761c9ef19e3b 100644 ---- a/arch/arm/mach-tegra/powergate.c -+++ b/arch/arm/mach-tegra/powergate.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -11,6 +11,7 @@ - - #include - #include -+#include - - #define PWRGATE_TOGGLE 0x30 - #define PWRGATE_TOGGLE_START (1 << 8) -@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) - u32 value, mask = state ? (1 << id) : 0, old_mask; - unsigned long start, timeout = 25; - -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - old_mask = value & (1 << id); - - if (mask == old_mask) - return 0; - -- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); -+ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); - - start = get_timer(0); - - while (get_timer(start) < timeout) { -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - if ((value & (1 << id)) == mask) - return 0; - } -@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) - else - value = 1 << id; - -- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); -+ tegra_pmc_writel(value, REMOVE_CLAMPING); - - return 0; - } - -From patchwork Mon Apr 15 09:32:26 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 14/27] ARM: tegra: Workaround UDC boot issues only if necessary -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085541 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-15-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:26 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Resetting the USB device controller on boot is only necessary if the SoC -actually has a UDC controller and U-Boot enables support for it. All the -Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on -boot workaround depend on the ChipIdea UDC driver. - -This prevents a crash on Tegra186 which does not have the ChipIdea UDC. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 28914a34a1b5..faa73559fd42 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -148,6 +148,7 @@ endchoice - - config TEGRA_DISCONNECT_UDC_ON_BOOT - bool "Disconnect USB device mode controller on boot" -+ depends on CI_UDC - default y - help - When loading U-Boot into RAM over USB protocols using tools such as - -From patchwork Mon Apr 15 09:32:27 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,15/27] ARM: tegra: Restore DRAM bank count -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085532 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-16-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:27 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced -the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 -boards. - -However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: -increase max DRAM bank count"), the platform can have a large number of -unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks -are needed to describe the worst-case situation. - -In practice the number of DRAM banks needed will typically be much -lower, but we should be prepared to properly deal with the worst case. - -Signed-off-by: Thierry Reding ---- - configs/p2771-0000-000_defconfig | 2 +- - configs/p2771-0000-500_defconfig | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index ac85efa37b3b..ad0802067e73 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index df4d914d85cf..459b67fd195f 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - -From patchwork Mon Apr 15 09:32:28 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,16/27] ARM: tegra: Unify Tegra186 builds -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085533 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-17-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:28 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Tegra186 build are currently dealt with in very special ways, which is -because Tegra186 is fundamentally different in many respects. It is no -longer necessary to do many of the low-level programming because early -boot firmware will already have taken care of it. - -Unfortunately, separating Tegra186 builds from the rest in this way -makes it difficult to share code with prior generations of Tegra. With -all of the low-level programming code behind Kconfig guards, the build -for Tegra186 can again be unified. - -As a side-effect, and partial reason for this change, other Tegra SoC -generations can now make use of the code that deals with taking over a -boot from earlier bootloaders. This used to be nvtboot, but has been -replaced by cboot nowadays. Rename the files and functions related to -this to avoid confusion. The implemented protocols are unchanged. - -Signed-off-by: Thierry Reding ---- -Changes in v4: -- consistently use /chosen/nvidia,ether-mac property - -Changes in v3: -- load cboot DTB address to fdt_addr instead of fdtaddr - - arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/board.c | 23 ++ - arch/arm/mach-tegra/board186.c | 32 --- - arch/arm/mach-tegra/board2.c | 21 ++ - .../{tegra186/nvtboot_board.c => cboot.c} | 200 ++++++++++++++++-- - .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- - arch/arm/mach-tegra/tegra186/Makefile | 4 - - arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- - board/nvidia/p2771-0000/p2771-0000.c | 10 +- - 10 files changed, 278 insertions(+), 239 deletions(-) - create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h - delete mode 100644 arch/arm/mach-tegra/board186.c - rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (56%) - rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) - delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -new file mode 100644 -index 000000000000..b3441ec178b3 ---- /dev/null -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -0,0 +1,39 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _TEGRA_CBOOT_H_ -+#define _TEGRA_CBOOT_H_ -+ -+#ifdef CONFIG_ARM64 -+extern unsigned long cboot_boot_x0; -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3); -+int cboot_dram_init(void); -+int cboot_dram_init_banksize(void); -+ulong cboot_get_usable_ram_top(ulong total_size); -+#else -+static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+} -+ -+static inline int cboot_dram_init(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline int cboot_dram_init_banksize(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return 0; -+} -+#endif -+ -+#endif -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index f8bc65aa8b18..41ba674edff4 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -5,7 +5,6 @@ - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. - --ifndef CONFIG_TEGRA186 - ifdef CONFIG_SPL_BUILD - obj-y += spl.o - obj-y += cpu.o -@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o --endif - --obj-$(CONFIG_ARM64) += arm64-mmu.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 59d2f347485d..c3ba00811e83 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, - unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; -+ -+ /* -+ * The logic for this is somewhat indirect. The purpose of the marker -+ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot -+ * was loaded from a read-only instance of itself, which is something -+ * that can happen in secure boot setups. So basically the presence -+ * of the marker is an indication that U-Boot was loaded by one such -+ * special variant of U-Boot. Conversely, the absence of the marker -+ * indicates that this instance of U-Boot was loaded by something -+ * other than a special U-Boot. This could be SPL, but it could just -+ * as well be one of any number of other first stage bootloaders. -+ */ -+ if (from_spl) -+ cboot_save_boot_params(r0, r1, r2, r3); -+ - save_boot_params_ret(); - } - #endif -@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) - - int dram_init(void) - { -+ int err; -+ -+ /* try to initialize DRAM from cboot DTB first */ -+ err = cboot_dram_init(); -+ if (err == 0) -+ return 0; -+ - #if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c -deleted file mode 100644 -index 80b55707e90f..000000000000 ---- a/arch/arm/mach-tegra/board186.c -+++ /dev/null -@@ -1,32 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016, NVIDIA CORPORATION. -- */ -- --#include --#include -- --int board_early_init_f(void) --{ -- return 0; --} -- --__weak int tegra_board_init(void) --{ -- return 0; --} -- --int board_init(void) --{ -- return tegra_board_init(); --} -- --__weak int tegra_soc_board_init_late(void) --{ -- return 0; --} -- --int board_late_init(void) --{ -- return tegra_soc_board_init_late(); --} -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index ce1c9346959d..bbc487aa3bf6 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} - __weak void gpio_early_init_uart(void) {} - __weak void pin_mux_display(void) {} - __weak void start_cpu_fan(void) {} -+__weak void cboot_late_init(void) {} - - #if defined(CONFIG_TEGRA_NAND) - __weak void pin_mux_nand(void) -@@ -243,6 +245,7 @@ int board_late_init(void) - } - #endif - start_cpu_fan(); -+ cboot_late_init(); - - return 0; - } -@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) - */ - int dram_init_banksize(void) - { -+ int err; -+ -+ /* try to compute DRAM bank size based on cboot DTB first */ -+ err = cboot_dram_init_banksize(); -+ if (err == 0) -+ return err; -+ -+ /* fall back to default DRAM bank size computation */ -+ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); - -@@ -370,5 +382,14 @@ int dram_init_banksize(void) - */ - ulong board_get_usable_ram_top(ulong total_size) - { -+ ulong ram_top; -+ -+ /* try to get top of usable RAM based on cboot DTB first */ -+ ram_top = cboot_get_usable_ram_top(total_size); -+ if (ram_top > 0) -+ return ram_top; -+ -+ /* fall back to default usable RAM computation */ -+ - return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c -similarity index 56% -rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c -rename to arch/arm/mach-tegra/cboot.c -index 83c0e931ea24..3ebf7b055553 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -3,14 +3,182 @@ - * Copyright (c) 2016-2018, NVIDIA CORPORATION. - */ - --#include - #include - #include - #include -+#include -+ -+#include -+ - #include -+#include - #include - --extern unsigned long nvtboot_boot_x0; -+/* -+ * Size of a region that's large enough to hold the relocated U-Boot and all -+ * other allocations made around it (stack, heap, page tables, etc.) -+ * In practice, running "bdinfo" at the shell prompt, the stack reaches about -+ * 5MB from the address selected for ram_top as of the time of writing, -+ * so a 16MB region should be plenty. -+ */ -+#define MIN_USABLE_RAM_SIZE SZ_16M -+/* -+ * The amount of space we expect to require for stack usage. Used to validate -+ * that all reservations fit into the region selected for the relocation target -+ */ -+#define MIN_USABLE_STACK_SIZE SZ_1M -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+extern struct mm_region tegra_mem_map[]; -+ -+/* -+ * These variables are written to before relocation, and hence cannot be -+ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -+ * The section attribute forces this into .data and avoids this issue. This -+ * also has the nice side-effect of the content being valid after relocation. -+ */ -+ -+/* The number of valid entries in ram_banks[] */ -+static int ram_bank_count __attribute__((section(".data"))); -+ -+/* -+ * The usable top-of-RAM for U-Boot. This is both: -+ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -+ * b) At the end of a region that has enough space to hold the relocated U-Boot -+ * and all other allocations made around it (stack, heap, page tables, etc.) -+ */ -+static u64 ram_top __attribute__((section(".data"))); -+/* The base address of the region of RAM that ends at ram_top */ -+static u64 region_base __attribute__((section(".data"))); -+ -+int cboot_dram_init(void) -+{ -+ unsigned int na, ns; -+ const void *cboot_blob = (void *)cboot_boot_x0; -+ int node, len, i; -+ const u32 *prop; -+ -+ if (!cboot_blob) -+ return -EINVAL; -+ -+ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); -+ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); -+ -+ node = fdt_path_offset(cboot_blob, "/memory"); -+ if (node < 0) { -+ pr_err("Can't find /memory node in cboot DTB"); -+ hang(); -+ } -+ prop = fdt_getprop(cboot_blob, node, "reg", &len); -+ if (!prop) { -+ pr_err("Can't find /memory/reg property in cboot DTB"); -+ hang(); -+ } -+ -+ /* Calculate the true # of base/size pairs to read */ -+ len /= 4; /* Convert bytes to number of cells */ -+ len /= (na + ns); /* Convert cells to number of banks */ -+ if (len > CONFIG_NR_DRAM_BANKS) -+ len = CONFIG_NR_DRAM_BANKS; -+ -+ /* Parse the /memory node, and save useful entries */ -+ gd->ram_size = 0; -+ ram_bank_count = 0; -+ for (i = 0; i < len; i++) { -+ u64 bank_start, bank_end, bank_size, usable_bank_size; -+ -+ /* Extract raw memory region data from DTB */ -+ bank_start = fdt_read_number(prop, na); -+ prop += na; -+ bank_size = fdt_read_number(prop, ns); -+ prop += ns; -+ gd->ram_size += bank_size; -+ bank_end = bank_start + bank_size; -+ debug("Bank %d: %llx..%llx (+%llx)\n", i, -+ bank_start, bank_end, bank_size); -+ -+ /* -+ * Align the bank to MMU section size. This is not strictly -+ * necessary, since the translation table construction code -+ * handles page granularity without issue. However, aligning -+ * the MMU entries reduces the size and number of levels in the -+ * page table, so is worth it. -+ */ -+ bank_start = ROUND(bank_start, SZ_2M); -+ bank_end = bank_end & ~(SZ_2M - 1); -+ bank_size = bank_end - bank_start; -+ debug(" aligned: %llx..%llx (+%llx)\n", -+ bank_start, bank_end, bank_size); -+ if (bank_end <= bank_start) -+ continue; -+ -+ /* Record data used to create MMU translation tables */ -+ ram_bank_count++; -+ /* Index below is deliberately 1-based to skip MMIO entry */ -+ tegra_mem_map[ram_bank_count].virt = bank_start; -+ tegra_mem_map[ram_bank_count].phys = bank_start; -+ tegra_mem_map[ram_bank_count].size = bank_size; -+ tegra_mem_map[ram_bank_count].attrs = -+ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -+ -+ /* Determine best bank to relocate U-Boot into */ -+ if (bank_end > SZ_4G) -+ bank_end = SZ_4G; -+ debug(" end %llx (usable)\n", bank_end); -+ usable_bank_size = bank_end - bank_start; -+ debug(" size %llx (usable)\n", usable_bank_size); -+ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -+ (bank_end > ram_top)) { -+ ram_top = bank_end; -+ region_base = bank_start; -+ debug("ram top now %llx\n", ram_top); -+ } -+ } -+ -+ /* Ensure memory map contains the desired sentinel entry */ -+ tegra_mem_map[ram_bank_count + 1].virt = 0; -+ tegra_mem_map[ram_bank_count + 1].phys = 0; -+ tegra_mem_map[ram_bank_count + 1].size = 0; -+ tegra_mem_map[ram_bank_count + 1].attrs = 0; -+ -+ /* Error out if a relocation target couldn't be found */ -+ if (!ram_top) { -+ pr_err("Can't find a usable RAM top"); -+ hang(); -+ } -+ -+ return 0; -+} -+ -+int cboot_dram_init_banksize(void) -+{ -+ int i; -+ -+ if (ram_bank_count == 0) -+ return -EINVAL; -+ -+ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -+ pr_err("Reservations exceed chosen region size"); -+ hang(); -+ } -+ -+ for (i = 0; i < ram_bank_count; i++) { -+ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -+ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -+ } -+ -+#ifdef CONFIG_PCI -+ gd->pci_ram_top = ram_top; -+#endif -+ -+ return 0; -+} -+ -+ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return ram_top; -+} - - /* - * The following few functions run late during the boot process and dynamically -@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; - * list of RAM banks into some private data structure before running. - */ - --extern struct mm_region tegra_mem_map[]; -- - static char *gen_varname(const char *var, const char *ext) - { - size_t len_var = strlen(var); -@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) - dump_ram_banks(); - #endif - -- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); -+ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); - - #ifdef DEBUG - printf("RAM after reserving cboot DTB:\n"); -@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) - debug("%s: var: %s\n", __func__, var); - set_calculated_env_var(var); - #ifdef DEBUG -- printf("RAM banks affter allocating %s:\n", var); -+ printf("RAM banks after allocating %s:\n", var); - dump_ram_banks(); - #endif - } -@@ -274,7 +440,7 @@ static int set_fdt_addr(void) - { - int ret; - -- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); -+ ret = env_set_hex("fdt_addr", cboot_boot_x0); - if (ret) { - printf("Failed to set fdt_addr to point at DTB: %d\n", ret); - return ret; -@@ -284,12 +450,12 @@ static int set_fdt_addr(void) - } - - /* -- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's -+ * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_nvtboot(void) -+static int set_ethaddr_from_cboot(void) - { -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -+ const void *cboot_blob = (void *)cboot_boot_x0; - int ret, node, len; - const u32 *prop; - -@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) - if (env_get("ethaddr")) - return 0; - -- node = fdt_path_offset(nvtboot_blob, "/chosen"); -+ node = fdt_path_offset(cboot_blob, "/chosen"); - if (node < 0) { -- printf("Can't find /chosen node in nvtboot DTB\n"); -+ printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); -+ prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); - if (!prop) { -- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); -+ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); - return -ENOENT; - } - - ret = env_set("ethaddr", (void *)prop); - if (ret) { -- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); -+ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); - return ret; - } - - return 0; - } - --int tegra_soc_board_init_late(void) -+int cboot_late_init(void) - { - set_calculated_env_vars(); - /* -@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) - */ - set_fdt_addr(); - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_nvtboot(); -+ set_ethaddr_from_cboot(); - - return 0; - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -similarity index 57% -rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S -rename to arch/arm/mach-tegra/cboot_ll.S -index aa7a863d9702..4c9ddacc2b39 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S -+++ b/arch/arm/mach-tegra/cboot_ll.S -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * Save nvtboot-related boot-time CPU state -+ * Save cboot-related boot-time CPU state - * - * (C) Copyright 2015-2016 NVIDIA Corporation - */ -@@ -9,12 +9,12 @@ - #include - - .align 8 --.globl nvtboot_boot_x0 --nvtboot_boot_x0: -+.globl cboot_boot_x0 -+cboot_boot_x0: - .dword 0 - --ENTRY(save_boot_params) -- adr x8, nvtboot_boot_x0 -+ENTRY(cboot_save_boot_params) -+ adr x8, cboot_boot_x0 - str x0, [x8] - b save_boot_params_ret --ENDPROC(save_boot_params) -+ENDPROC(cboot_save_boot_params) -diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile -index 56f3378ecea3..3a2405027704 100644 ---- a/arch/arm/mach-tegra/tegra186/Makefile -+++ b/arch/arm/mach-tegra/tegra186/Makefile -@@ -2,8 +2,4 @@ - # - # SPDX-License-Identifier: GPL-2.0 - --obj-y += ../board186.o - obj-y += cache.o --obj-y += nvtboot_board.o --obj-y += nvtboot_ll.o --obj-y += nvtboot_mem.o -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -deleted file mode 100644 -index 62142821a595..000000000000 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -+++ /dev/null -@@ -1,172 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016-2018, NVIDIA CORPORATION. -- */ -- --#include --#include --#include --#include --#include --#include -- --/* -- * Size of a region that's large enough to hold the relocated U-Boot and all -- * other allocations made around it (stack, heap, page tables, etc.) -- * In practice, running "bdinfo" at the shell prompt, the stack reaches about -- * 5MB from the address selected for ram_top as of the time of writing, -- * so a 16MB region should be plenty. -- */ --#define MIN_USABLE_RAM_SIZE SZ_16M --/* -- * The amount of space we expect to require for stack usage. Used to validate -- * that all reservations fit into the region selected for the relocation target -- */ --#define MIN_USABLE_STACK_SIZE SZ_1M -- --DECLARE_GLOBAL_DATA_PTR; -- --extern unsigned long nvtboot_boot_x0; --extern struct mm_region tegra_mem_map[]; -- --/* -- * These variables are written to before relocation, and hence cannot be -- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -- * The section attribute forces this into .data and avoids this issue. This -- * also has the nice side-effect of the content being valid after relocation. -- */ -- --/* The number of valid entries in ram_banks[] */ --static int ram_bank_count __attribute__((section(".data"))); -- --/* -- * The usable top-of-RAM for U-Boot. This is both: -- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -- * b) At the end of a region that has enough space to hold the relocated U-Boot -- * and all other allocations made around it (stack, heap, page tables, etc.) -- */ --static u64 ram_top __attribute__((section(".data"))); --/* The base address of the region of RAM that ends at ram_top */ --static u64 region_base __attribute__((section(".data"))); -- --int dram_init(void) --{ -- unsigned int na, ns; -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -- int node, len, i; -- const u32 *prop; -- -- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); -- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); -- -- node = fdt_path_offset(nvtboot_blob, "/memory"); -- if (node < 0) { -- pr_err("Can't find /memory node in nvtboot DTB"); -- hang(); -- } -- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); -- if (!prop) { -- pr_err("Can't find /memory/reg property in nvtboot DTB"); -- hang(); -- } -- -- /* Calculate the true # of base/size pairs to read */ -- len /= 4; /* Convert bytes to number of cells */ -- len /= (na + ns); /* Convert cells to number of banks */ -- if (len > CONFIG_NR_DRAM_BANKS) -- len = CONFIG_NR_DRAM_BANKS; -- -- /* Parse the /memory node, and save useful entries */ -- gd->ram_size = 0; -- ram_bank_count = 0; -- for (i = 0; i < len; i++) { -- u64 bank_start, bank_end, bank_size, usable_bank_size; -- -- /* Extract raw memory region data from DTB */ -- bank_start = fdt_read_number(prop, na); -- prop += na; -- bank_size = fdt_read_number(prop, ns); -- prop += ns; -- gd->ram_size += bank_size; -- bank_end = bank_start + bank_size; -- debug("Bank %d: %llx..%llx (+%llx)\n", i, -- bank_start, bank_end, bank_size); -- -- /* -- * Align the bank to MMU section size. This is not strictly -- * necessary, since the translation table construction code -- * handles page granularity without issue. However, aligning -- * the MMU entries reduces the size and number of levels in the -- * page table, so is worth it. -- */ -- bank_start = ROUND(bank_start, SZ_2M); -- bank_end = bank_end & ~(SZ_2M - 1); -- bank_size = bank_end - bank_start; -- debug(" aligned: %llx..%llx (+%llx)\n", -- bank_start, bank_end, bank_size); -- if (bank_end <= bank_start) -- continue; -- -- /* Record data used to create MMU translation tables */ -- ram_bank_count++; -- /* Index below is deliberately 1-based to skip MMIO entry */ -- tegra_mem_map[ram_bank_count].virt = bank_start; -- tegra_mem_map[ram_bank_count].phys = bank_start; -- tegra_mem_map[ram_bank_count].size = bank_size; -- tegra_mem_map[ram_bank_count].attrs = -- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -- -- /* Determine best bank to relocate U-Boot into */ -- if (bank_end > SZ_4G) -- bank_end = SZ_4G; -- debug(" end %llx (usable)\n", bank_end); -- usable_bank_size = bank_end - bank_start; -- debug(" size %llx (usable)\n", usable_bank_size); -- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -- (bank_end > ram_top)) { -- ram_top = bank_end; -- region_base = bank_start; -- debug("ram top now %llx\n", ram_top); -- } -- } -- -- /* Ensure memory map contains the desired sentinel entry */ -- tegra_mem_map[ram_bank_count + 1].virt = 0; -- tegra_mem_map[ram_bank_count + 1].phys = 0; -- tegra_mem_map[ram_bank_count + 1].size = 0; -- tegra_mem_map[ram_bank_count + 1].attrs = 0; -- -- /* Error out if a relocation target couldn't be found */ -- if (!ram_top) { -- pr_err("Can't find a usable RAM top"); -- hang(); -- } -- -- return 0; --} -- --int dram_init_banksize(void) --{ -- int i; -- -- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -- pr_err("Reservations exceed chosen region size"); -- hang(); -- } -- -- for (i = 0; i < ram_bank_count; i++) { -- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -- } -- --#ifdef CONFIG_PCI -- gd->pci_ram_top = ram_top; --#endif -- -- return 0; --} -- --ulong board_get_usable_ram_top(ulong total_size) --{ -- return ram_top; --} -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index 496e8a02111e..6f88010c18c3 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -7,7 +7,7 @@ - #include - #include "../p2571/max77620_init.h" - --int tegra_board_init(void) -+void pin_mux_mmc(void) - { - struct udevice *dev; - uchar val; -@@ -18,19 +18,18 @@ int tegra_board_init(void) - ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); - if (ret) { - printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -- return ret; -+ return; - } - /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ - val = 0xF2; - ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); - if (ret) { - printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -- return ret; -+ return; - } -- -- return 0; - } - -+#ifdef CONFIG_PCI_TEGRA - int tegra_pcie_board_init(void) - { - struct udevice *dev; -@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) - - return 0; - } -+#endif - -From patchwork Mon Apr 15 09:32:29 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 17/27] ARM: tegra: Implement cboot_save_boot_params() in C -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085530 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-18-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:29 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This is easier to deal with and works just as well for this simple -function. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ - arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- - 3 files changed, 13 insertions(+), 21 deletions(-) - delete mode 100644 arch/arm/mach-tegra/cboot_ll.S - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 41ba674edff4..7165d70a60da 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - --obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 3ebf7b055553..a302ca45f39b 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); - /* The base address of the region of RAM that ends at ram_top */ - static u64 region_base __attribute__((section(".data"))); - -+/* -+ * Explicitly put this in the .data section because it is written before the -+ * .bss section is zeroed out but it needs to persist. -+ */ -+unsigned long cboot_boot_x0 __attribute__((section(".data"))); -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+ cboot_boot_x0 = x0; -+} -+ - int cboot_dram_init(void) - { - unsigned int na, ns; -diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -deleted file mode 100644 -index 4c9ddacc2b39..000000000000 ---- a/arch/arm/mach-tegra/cboot_ll.S -+++ /dev/null -@@ -1,20 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Save cboot-related boot-time CPU state -- * -- * (C) Copyright 2015-2016 NVIDIA Corporation -- */ -- --#include --#include -- --.align 8 --.globl cboot_boot_x0 --cboot_boot_x0: -- .dword 0 -- --ENTRY(cboot_save_boot_params) -- adr x8, cboot_boot_x0 -- str x0, [x8] -- b save_boot_params_ret --ENDPROC(cboot_save_boot_params) - -From patchwork Mon Apr 15 09:32:30 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,18/27] ARM: tegra: Implement cboot_get_ethaddr() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085543 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-19-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:30 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This function will attempt to look up an Ethernet address in the DTB -that was passed in from cboot. It does so by first trying to locate the -default Ethernet device for the board (identified by the "ethernet" -alias) and if found, reads the "local-mac-address" property. If the -"ethernet" alias does not exist, or if it points to a device tree node -that doesn't exist, or if the device tree node that it points to does -not have a "local-mac-address" property or if the value is invalid, it -will fall back to the legacy mechanism of looking for the MAC address -stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of -the "/chosen" node. - -The MAC address is then written to the default Ethernet device for the -board (again identified by the "ethernet" alias) in U-Boot's control -DTB. This allows the device driver for that device to read the MAC -address from the standard location in device tree. - -Signed-off-by: Thierry Reding ---- -Changes in v5: -- write MAC to DT rather than an environment variable - -Changes in v4: -- also check the /chosen/nvidia,ethernet-mac property for compatibility - with Tegra210 - -Changes in v2: -- make dummy static inline to avoid duplicate definitions - - arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 97 ++++++++++++++++++++----- - 2 files changed, 86 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -index b3441ec178b3..021c24617575 100644 ---- a/arch/arm/include/asm/arch-tegra/cboot.h -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, - int cboot_dram_init(void); - int cboot_dram_init_banksize(void); - ulong cboot_get_usable_ram_top(ulong total_size); -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); - #else - static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, - unsigned long x2, unsigned long x3) -@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) - { - return 0; - } -+ -+static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ return -ENOSYS; -+} - #endif - - #endif -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index a302ca45f39b..628909f29137 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -4,6 +4,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -465,46 +466,108 @@ static int set_fdt_addr(void) - * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_cboot(void) -+static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) - { -- const void *cboot_blob = (void *)cboot_boot_x0; -- int ret, node, len; -- const u32 *prop; -- -- /* Already a valid address in the environment? If so, keep it */ -- if (env_get("ethaddr")) -- return 0; -- -- node = fdt_path_offset(cboot_blob, "/chosen"); -+ const char *const properties[] = { -+ "nvidia,ethernet-mac", -+ "nvidia,ether-mac", -+ }; -+ const char *prop; -+ unsigned int i; -+ int node, len; -+ -+ node = fdt_path_offset(fdt, "/chosen"); - if (node < 0) { - printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); -+ -+ for (i = 0; i < ARRAY_SIZE(properties); i++) { -+ prop = fdt_getprop(fdt, node, properties[i], &len); -+ if (prop) -+ break; -+ } -+ - if (!prop) { -- printf("Can't find nvidia,ether-mac property in cboot DTB\n"); -+ printf("Can't find Ethernet MAC address in cboot DTB\n"); - return -ENOENT; - } - -- ret = env_set("ethaddr", (void *)prop); -- if (ret) { -- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); -- return ret; -+ eth_parse_enetaddr(prop, mac); -+ -+ if (!is_valid_ethaddr(mac)) { -+ printf("Invalid MAC address: %s\n", prop); -+ return -EINVAL; - } - -+ debug("Legacy MAC address: %pM\n", mac); -+ - return 0; - } - -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ int node, len, err = 0; -+ const uchar *prop; -+ const char *path; -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ node = fdt_path_offset(fdt, path); -+ if (node < 0) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ prop = fdt_getprop(fdt, node, "local-mac-address", &len); -+ if (!prop) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ if (len != ETH_ALEN) { -+ err = -EINVAL; -+ goto out; -+ } -+ -+ debug("MAC address: %pM\n", prop); -+ memcpy(mac, prop, ETH_ALEN); -+ -+out: -+ if (err < 0) -+ err = cboot_get_ethaddr_legacy(fdt, mac); -+ -+ return err; -+} -+ - int cboot_late_init(void) - { -+ const void *fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN]; -+ int err; -+ - set_calculated_env_vars(); - /* - * Ignore errors here; the value may not be used depending on - * extlinux.conf or boot script content. - */ - set_fdt_addr(); -+ - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_cboot(); -+ err = cboot_get_ethaddr(fdt, mac); -+ if (!err) { -+ void *blob = (void *)gd->fdt_blob; -+ -+ err = fdtdec_set_ethernet_mac_address(blob, mac, sizeof(mac)); -+ if (err < 0) -+ printf("failed to set MAC address %pM: %d\n", mac, err); -+ } - - return 0; - } - -From patchwork Mon Apr 15 09:32:31 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,19/27] ARM: tegra: Import cbootargs value from cboot DTB -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085534 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-20-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:31 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Read the boot arguments passed by cboot via the /chosen/bootargs -property and store it in the cbootargs environment variable. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 47 insertions(+) - -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 628909f29137..a829ef794f2d 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#include - -+#include - #include - - #include -@@ -546,10 +548,49 @@ out: - return err; - } - -+static char *strip(const char *ptr) -+{ -+ const char *end; -+ -+ while (*ptr && isblank(*ptr)) -+ ptr++; -+ -+ /* empty string */ -+ if (*ptr == '\0') -+ return strdup(ptr); -+ -+ end = ptr; -+ -+ while (end[1]) -+ end++; -+ -+ while (isblank(*end)) -+ end--; -+ -+ return strndup(ptr, end - ptr + 1); -+} -+ -+static char *cboot_get_bootargs(const void *fdt) -+{ -+ const char *args; -+ int offset, len; -+ -+ offset = fdt_path_offset(fdt, "/chosen"); -+ if (offset < 0) -+ return NULL; -+ -+ args = fdt_getprop(fdt, offset, "bootargs", &len); -+ if (!args) -+ return NULL; -+ -+ return strip(args); -+} -+ - int cboot_late_init(void) - { - const void *fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN]; -+ char *bootargs; - int err; - - set_calculated_env_vars(); -@@ -569,5 +610,11 @@ int cboot_late_init(void) - printf("failed to set MAC address %pM: %d\n", mac, err); - } - -+ bootargs = cboot_get_bootargs(fdt); -+ if (bootargs) { -+ env_set("cbootargs", bootargs); -+ free(bootargs); -+ } -+ - return 0; - } - -From patchwork Mon Apr 15 09:32:32 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 20/27] ARM: tegra: Enable position independent build for 64-bit -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085539 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-21-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:32 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Note that U-Boot is always chainloaded from cboot starting with L4T -release 28. cboot always loads U-Boot to a fixed address, so making -the builds position independent isn't strictly necessary. However, -position independent builds can be convenient because if U-Boot is -ever loaded to an address different from its link address, it will -still be able to boot. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 1 + - configs/e2220-1170_defconfig | 2 +- - configs/p2371-0000_defconfig | 2 +- - configs/p2371-2180_defconfig | 2 +- - configs/p2571_defconfig | 2 +- - 5 files changed, 5 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index faa73559fd42..97e22ead5985 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -87,6 +87,7 @@ config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" - select ARM64 - select LINUX_KERNEL_IMAGE_HEADER -+ select POSITION_INDEPENDENT - select TEGRA_COMMON - - if TEGRA_ARMV8_COMMON -diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig -index af3f80edb117..baabb0ccf8cc 100644 ---- a/configs/e2220-1170_defconfig -+++ b/configs/e2220-1170_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_NR_DRAM_BANKS=2 - CONFIG_OF_SYSTEM_SETUP=y -diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig -index 6b564366a825..aa8b73a2ba08 100644 ---- a/configs/p2371-0000_defconfig -+++ b/configs/p2371-0000_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_0000=y - CONFIG_NR_DRAM_BANKS=2 -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index a790cd83b82d..4923d330de6c 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 -diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig -index e48e0a1a14ec..8e9c45690dce 100644 ---- a/configs/p2571_defconfig -+++ b/configs/p2571_defconfig -@@ -1,6 +1,6 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y --CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA210=y - CONFIG_TARGET_P2571=y - CONFIG_NR_DRAM_BANKS=2 - -From patchwork Mon Apr 15 09:32:33 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,21/27] p2371-2180: Pass Ethernet MAC to the kernel -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085536 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-22-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:33 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Pass the ethernet MAC address to the kernel upon boot. This passes both -the local-mac-address property (as passed to U-Boot from cboot) and the -currently set MAC address via the mac-address property. The latter will -only be set if it is different from the address that was already passed -via the local-mac-address property. - -Signed-off-by: Thierry Reding ---- - board/nvidia/p2371-2180/p2371-2180.c | 50 ++++++++++++++++++++++++++++ - configs/p2371-2180_defconfig | 1 + - 2 files changed, 51 insertions(+) - -diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c -index 212037da5ac0..a444d692d7ea 100644 ---- a/board/nvidia/p2371-2180/p2371-2180.c -+++ b/board/nvidia/p2371-2180/p2371-2180.c -@@ -5,9 +5,12 @@ - */ - - #include -+#include - #include -+#include - #include - #include -+#include - #include "../p2571/max77620_init.h" - #include "pinmux-config-p2371-2180.h" - -@@ -94,3 +97,50 @@ int tegra_pcie_board_init(void) - return 0; - } - #endif /* PCI */ -+ -+static void ft_mac_address_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ -+ return 0; -+} -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index 4923d330de6c..0ee4913a0469 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " - -From patchwork Mon Apr 15 09:32:34 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,22/27] p2771-0000: Pass Ethernet MAC to the kernel -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085542 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-23-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:34 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Pass the ethernet MAC address to the kernel upon boot. This passes both -the local-mac-address property (as passed to U-Boot from cboot) and the -currently set MAC address via the mac-address property. The latter will -only be set if it is different from the address that was already passed -via the local-mac-address property. - -Signed-off-by: Thierry Reding ---- - board/nvidia/p2771-0000/p2771-0000.c | 43 ++++++++++++++++++++++++++++ - configs/p2771-0000-000_defconfig | 1 + - configs/p2771-0000-500_defconfig | 1 + - 3 files changed, 45 insertions(+) - -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index 6f88010c18c3..fe22067f6571 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -4,7 +4,10 @@ - */ - - #include -+#include - #include -+#include -+#include - #include "../p2571/max77620_init.h" - - void pin_mux_mmc(void) -@@ -52,3 +55,43 @@ int tegra_pcie_board_init(void) - return 0; - } - #endif -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return 0; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) -+ return 0; -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+ -+ return 0; -+} -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index ad0802067e73..91896e39a10f 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index 459b67fd195f..20d4393838d6 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " - -From patchwork Mon Apr 15 09:32:35 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,23/27] p2371-2180: Add support for framebuffer carveouts -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085537 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-24-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:35 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. - -Reviewed-by: Simon Glass -Signed-off-by: Thierry Reding ---- -Changes in v4: -- add reviewed-by from Simon - - board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ - 1 file changed, 47 insertions(+) - -diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c -index a444d692d7ea..4985302d6bc2 100644 ---- a/board/nvidia/p2371-2180/p2371-2180.c -+++ b/board/nvidia/p2371-2180/p2371-2180.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) - } - } - -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@50000000/dc@54200000", -+ "/host1x@50000000/dc@54240000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ continue; -+ } -+ } -+} -+ - int ft_board_setup(void *fdt, bd_t *bd) - { - ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); - - return 0; - } - -From patchwork Mon Apr 15 09:32:36 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,24/27] p2771-0000: Add support for framebuffer carveouts -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085535 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-25-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:36 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. - -Reviewed-by: Simon Glass -Signed-off-by: Thierry Reding ---- -Changes in v4: -- add reviewed-by from Simon - - board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- - 1 file changed, 62 insertions(+), 4 deletions(-) - -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index fe22067f6571..d294c7ae0136 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) - } - #endif - --int ft_board_setup(void *fdt, bd_t *bd) -+static void ft_mac_address_setup(void *fdt) - { - const void *cboot_fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) - - path = fdt_get_alias(fdt, "ethernet"); - if (!path) -- return 0; -+ return; - - debug("ethernet alias found: %s\n", path); - - offset = fdt_path_offset(fdt, path); -- if (offset < 0) -- return 0; -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } - - if (is_valid_ethaddr(local_mac)) { - err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) - debug("MAC address set: %pM\n", mac); - } - } -+} -+ -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@13e00000/display-hub@15200000/display@15200000", -+ "/host1x@13e00000/display-hub@15200000/display@15210000", -+ "/host1x@13e00000/display-hub@15200000/display@15220000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ printf("copying carveout for %s...\n", nodes[i]); -+ -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ -+ continue; -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); - - return 0; - } - -From patchwork Mon Apr 15 09:32:37 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v5,25/27] ARM: tegra: Rename pcie-controller to pcie -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085545 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-26-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:37 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Recent versions of DTC have checks for PCI host bridge device tree nodes -that are named something other than "pci" or "pcie". Fix all occurrences -of such nodes for Tegra boards to avoid potential warnings from DTC. - -Signed-off-by: Thierry Reding ---- - arch/arm/dts/tegra124-apalis.dts | 2 +- - arch/arm/dts/tegra124-cei-tk1-som.dts | 2 +- - arch/arm/dts/tegra124-jetson-tk1.dts | 2 +- - arch/arm/dts/tegra124.dtsi | 2 +- - arch/arm/dts/tegra186-p2771-0000-000.dts | 2 +- - arch/arm/dts/tegra186-p2771-0000-500.dts | 2 +- - arch/arm/dts/tegra186.dtsi | 2 +- - arch/arm/dts/tegra20-harmony.dts | 2 +- - arch/arm/dts/tegra20-trimslice.dts | 2 +- - arch/arm/dts/tegra20.dtsi | 2 +- - arch/arm/dts/tegra210-p2371-2180.dts | 2 +- - arch/arm/dts/tegra210.dtsi | 2 +- - arch/arm/dts/tegra30-apalis.dts | 2 +- - arch/arm/dts/tegra30-beaver.dts | 2 +- - arch/arm/dts/tegra30-cardhu.dts | 2 +- - arch/arm/dts/tegra30.dtsi | 2 +- - 16 files changed, 16 insertions(+), 16 deletions(-) - -diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts -index fe08d3ea7304..a962c0a2f0ae 100644 ---- a/arch/arm/dts/tegra124-apalis.dts -+++ b/arch/arm/dts/tegra124-apalis.dts -@@ -77,7 +77,7 @@ - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - -- pcie-controller@01003000 { -+ pcie@1003000 { - status = "okay"; - avddio-pex-supply = <&vdd_1v05>; - avdd-pex-pll-supply = <&vdd_1v05>; -diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts b/arch/arm/dts/tegra124-cei-tk1-som.dts -index b1dd4181ac03..e5b41f3183cd 100644 ---- a/arch/arm/dts/tegra124-cei-tk1-som.dts -+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts -@@ -29,7 +29,7 @@ - reg = <0x80000000 0x80000000>; - }; - -- pcie-controller@01003000 { -+ pcie@1003000 { - status = "okay"; - - avddio-pex-supply = <&vdd_1v05_run>; -diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts -index d6420436cde8..59e080a8af6f 100644 ---- a/arch/arm/dts/tegra124-jetson-tk1.dts -+++ b/arch/arm/dts/tegra124-jetson-tk1.dts -@@ -29,7 +29,7 @@ - reg = <0x80000000 0x80000000>; - }; - -- pcie-controller@01003000 { -+ pcie@1003000 { - status = "okay"; - - avddio-pex-supply = <&vdd_1v05_run>; -diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi -index 83d63480471b..f473ba28e4a6 100644 ---- a/arch/arm/dts/tegra124.dtsi -+++ b/arch/arm/dts/tegra124.dtsi -@@ -14,7 +14,7 @@ - interrupt-parent = <&lic>; - - -- pcie-controller@01003000 { -+ pcie@1003000 { - compatible = "nvidia,tegra124-pcie"; - device_type = "pci"; - reg = <0x01003000 0x00000800 /* PADS registers */ -diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts -index d97c6fd3d09a..84e850d6fca6 100644 ---- a/arch/arm/dts/tegra186-p2771-0000-000.dts -+++ b/arch/arm/dts/tegra186-p2771-0000-000.dts -@@ -11,7 +11,7 @@ - power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>; - }; - -- pcie-controller@10003000 { -+ pcie@10003000 { - status = "okay"; - - pci@1,0 { -diff --git a/arch/arm/dts/tegra186-p2771-0000-500.dts b/arch/arm/dts/tegra186-p2771-0000-500.dts -index 393a8b246a0b..1ac8ab431e90 100644 ---- a/arch/arm/dts/tegra186-p2771-0000-500.dts -+++ b/arch/arm/dts/tegra186-p2771-0000-500.dts -@@ -11,7 +11,7 @@ - power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; - }; - -- pcie-controller@10003000 { -+ pcie@10003000 { - status = "okay"; - - pci@1,0 { -diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi -index dd9e3b869de7..0a9db9825b85 100644 ---- a/arch/arm/dts/tegra186.dtsi -+++ b/arch/arm/dts/tegra186.dtsi -@@ -217,7 +217,7 @@ - #interrupt-cells = <2>; - }; - -- pcie-controller@10003000 { -+ pcie@10003000 { - compatible = "nvidia,tegra186-pcie"; - device_type = "pci"; - reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */ -diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts -index 0c907054dbd4..7fe7d52096c4 100644 ---- a/arch/arm/dts/tegra20-harmony.dts -+++ b/arch/arm/dts/tegra20-harmony.dts -@@ -599,7 +599,7 @@ - nvidia,sys-clock-req-active-high; - }; - -- pcie-controller@80003000 { -+ pcie@80003000 { - status = "okay"; - - avdd-pex-supply = <&pci_vdd_reg>; -diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts -index 31f509ab12c8..e19001ee2bdf 100644 ---- a/arch/arm/dts/tegra20-trimslice.dts -+++ b/arch/arm/dts/tegra20-trimslice.dts -@@ -30,7 +30,7 @@ - spi-max-frequency = <25000000>; - }; - -- pcie-controller@80003000 { -+ pcie@80003000 { - status = "okay"; - - avdd-pex-supply = <&pci_vdd_reg>; -diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi -index e21ee258b378..275b3432bd88 100644 ---- a/arch/arm/dts/tegra20.dtsi -+++ b/arch/arm/dts/tegra20.dtsi -@@ -580,7 +580,7 @@ - reset-names = "fuse"; - }; - -- pcie-controller@80003000 { -+ pcie@80003000 { - compatible = "nvidia,tegra20-pcie"; - device_type = "pci"; - reg = <0x80003000 0x00000800 /* PADS registers */ -diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts -index da4349bd039f..c2f497c524af 100644 ---- a/arch/arm/dts/tegra210-p2371-2180.dts -+++ b/arch/arm/dts/tegra210-p2371-2180.dts -@@ -21,7 +21,7 @@ - reg = <0x0 0x80000000 0x0 0xc0000000>; - }; - -- pcie-controller@01003000 { -+ pcie@1003000 { - status = "okay"; - - pci@1,0 { -diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi -index 229fed04529a..3ec54b11c43f 100644 ---- a/arch/arm/dts/tegra210.dtsi -+++ b/arch/arm/dts/tegra210.dtsi -@@ -11,7 +11,7 @@ - #address-cells = <2>; - #size-cells = <2>; - -- pcie-controller@01003000 { -+ pcie@1003000 { - compatible = "nvidia,tegra210-pcie"; - device_type = "pci"; - reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ -diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts -index 1a9ce2720acd..77502dfdb478 100644 ---- a/arch/arm/dts/tegra30-apalis.dts -+++ b/arch/arm/dts/tegra30-apalis.dts -@@ -32,7 +32,7 @@ - reg = <0x80000000 0x40000000>; - }; - -- pcie-controller@00003000 { -+ pcie@3000 { - status = "okay"; - avdd-pexa-supply = <&vdd2_reg>; - vdd-pexa-supply = <&vdd2_reg>; -diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts -index f5fbbe849e26..9bb097b08136 100644 ---- a/arch/arm/dts/tegra30-beaver.dts -+++ b/arch/arm/dts/tegra30-beaver.dts -@@ -28,7 +28,7 @@ - reg = <0x80000000 0x7ff00000>; - }; - -- pcie-controller@00003000 { -+ pcie@3000 { - status = "okay"; - - avdd-pexa-supply = <&ldo1_reg>; -diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts -index 5b9798c5a874..7534861e40d9 100644 ---- a/arch/arm/dts/tegra30-cardhu.dts -+++ b/arch/arm/dts/tegra30-cardhu.dts -@@ -27,7 +27,7 @@ - reg = <0x80000000 0x40000000>; - }; - -- pcie-controller@00003000 { -+ pcie@3000 { - status = "okay"; - - /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ -diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi -index 5030065cbdfe..f198bc0edbe8 100644 ---- a/arch/arm/dts/tegra30.dtsi -+++ b/arch/arm/dts/tegra30.dtsi -@@ -10,7 +10,7 @@ - compatible = "nvidia,tegra30"; - interrupt-parent = <&lic>; - -- pcie-controller@00003000 { -+ pcie@3000 { - compatible = "nvidia,tegra30-pcie"; - device_type = "pci"; - reg = <0x00003000 0x00000800 /* PADS registers */ - -From patchwork Mon Apr 15 09:32:38 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 26/27] ARM: tegra: Mark built-in Ethernet as default on Jetson TX2 -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085540 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-27-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:38 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Add an "ethernet" alias that points to the default network interface, -which is the built-in EQoS on Jetson TX2. - -Signed-off-by: Thierry Reding ---- - arch/arm/dts/tegra186-p2771-0000.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/dts/tegra186-p2771-0000.dtsi b/arch/arm/dts/tegra186-p2771-0000.dtsi -index a1319dc4936f..7cda0b41f74b 100644 ---- a/arch/arm/dts/tegra186-p2771-0000.dtsi -+++ b/arch/arm/dts/tegra186-p2771-0000.dtsi -@@ -9,6 +9,7 @@ - }; - - aliases { -+ ethernet = "/ethernet@2490000"; - mmc0 = "/sdhci@3460000"; - mmc1 = "/sdhci@3400000"; - i2c0 = "/bpmp/i2c"; -@@ -28,6 +29,7 @@ - ethernet@2490000 { - status = "okay"; - phy-reset-gpios = <&gpio_main TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; -+ local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - i2c@3160000 { - -From patchwork Mon Apr 15 09:32:39 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085538 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:39 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The Jetson Nano Developer Kit is a Tegra X1 based development board. It -is similar to Jetson TX1 but it is not pin compatible. It features 4 GB -of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot -used for storage. - -HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 -and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI -Ethernet controller provides onboard network connectivity. - -A 40-pin header on the board can be used to extend the capabilities and -exposed interfaces of the Jetson Nano. - -Signed-off-by: Thierry Reding ---- -Changes in v5: -- add "ethernet" alias and store an empty MAC address as placeholder - -Changes in v3: -- rename "Development Kit" to "Developer Kit" -- drop alias for non-existent eMMC interface -- import pinmux from A02 spreadsheet -- drop preboot support for now -- fixup text base - - arch/arm/dts/Makefile | 3 +- - arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++ - arch/arm/mach-tegra/tegra210/Kconfig | 7 + - board/nvidia/p3450-0000/Kconfig | 12 + - board/nvidia/p3450-0000/MAINTAINERS | 6 + - board/nvidia/p3450-0000/Makefile | 8 + - board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++ - .../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++ - configs/p3450-0000_defconfig | 55 ++++ - include/configs/p3450-0000.h | 34 +++ - 10 files changed, 722 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts - create mode 100644 board/nvidia/p3450-0000/Kconfig - create mode 100644 board/nvidia/p3450-0000/MAINTAINERS - create mode 100644 board/nvidia/p3450-0000/Makefile - create mode 100644 board/nvidia/p3450-0000/p3450-0000.c - create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h - create mode 100644 configs/p3450-0000_defconfig - create mode 100644 include/configs/p3450-0000.h - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 8167cdb4e856..f8d3441663c0 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ - tegra210-e2220-1170.dtb \ - tegra210-p2371-0000.dtb \ - tegra210-p2371-2180.dtb \ -- tegra210-p2571.dtb -+ tegra210-p2571.dtb \ -+ tegra210-p3450-0000.dtb - - dtb-$(CONFIG_ARCH_MVEBU) += \ - armada-3720-db.dtb \ -diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts -new file mode 100644 -index 000000000000..d45ee9afc016 ---- /dev/null -+++ b/arch/arm/dts/tegra210-p3450-0000.dts -@@ -0,0 +1,135 @@ -+/dts-v1/; -+ -+#include "tegra210.dtsi" -+ -+/ { -+ model = "NVIDIA Jetson Nano Developer Kit"; -+ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; -+ -+ chosen { -+ stdout-path = &uarta; -+ }; -+ -+ aliases { -+ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; -+ i2c0 = "/i2c@7000d000"; -+ i2c2 = "/i2c@7000c400"; -+ i2c3 = "/i2c@7000c500"; -+ i2c4 = "/i2c@7000c700"; -+ sdhci0 = "/sdhci@700b0000"; -+ spi0 = "/spi@70410000"; -+ usb0 = "/usb@7d000000"; -+ }; -+ -+ memory { -+ reg = <0x0 0x80000000 0x0 0xc0000000>; -+ }; -+ -+ pcie@1003000 { -+ status = "okay"; -+ -+ pci@1,0 { -+ status = "okay"; -+ }; -+ -+ pci@2,0 { -+ status = "okay"; -+ -+ ethernet@0,0 { -+ reg = <0x000000 0 0 0 0>; -+ local-mac-address = [ 00 00 00 00 00 00 ]; -+ }; -+ }; -+ }; -+ -+ serial@70006000 { -+ status = "okay"; -+ }; -+ -+ padctl@7009f000 { -+ pinctrl-0 = <&padctl_default>; -+ pinctrl-names = "default"; -+ -+ padctl_default: pinmux { -+ xusb { -+ nvidia,lanes = "otg-1", "otg-2"; -+ nvidia,function = "xusb"; -+ nvidia,iddq = <0>; -+ }; -+ -+ usb3 { -+ nvidia,lanes = "pcie-5", "pcie-6"; -+ nvidia,function = "usb3"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x1 { -+ nvidia,lanes = "pcie-0"; -+ nvidia,function = "pcie-x1"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x4 { -+ nvidia,lanes = "pcie-1", "pcie-2", -+ "pcie-3", "pcie-4"; -+ nvidia,function = "pcie-x4"; -+ nvidia,iddq = <0>; -+ }; -+ -+ sata { -+ nvidia,lanes = "sata-0"; -+ nvidia,function = "sata"; -+ nvidia,iddq = <0>; -+ }; -+ }; -+ }; -+ -+ sdhci@700b0000 { -+ status = "okay"; -+ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; -+ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ }; -+ -+ i2c@7000c400 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c500 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c700 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000d000 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ spi@70410000 { -+ status = "okay"; -+ }; -+ -+ usb@7d000000 { -+ status = "okay"; -+ dr_mode = "peripheral"; -+ }; -+ -+ clocks { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ clk32k_in: clock@0 { -+ compatible = "fixed-clock"; -+ reg = <0>; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig -index 250738aed312..ea28392c0f3a 100644 ---- a/arch/arm/mach-tegra/tegra210/Kconfig -+++ b/arch/arm/mach-tegra/tegra210/Kconfig -@@ -35,6 +35,12 @@ config TARGET_P2571 - help - P2571 is a P2530 married to a P1963 I/O board - -+config TARGET_P3450_0000 -+ bool "NVIDIA Jetson Nano Developer Kit" -+ select BOARD_LATE_INIT -+ help -+ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. -+ - endchoice - - config SYS_SOC -@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" - source "board/nvidia/p2371-0000/Kconfig" - source "board/nvidia/p2371-2180/Kconfig" - source "board/nvidia/p2571/Kconfig" -+source "board/nvidia/p3450-0000/Kconfig" - - endif -diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig -new file mode 100644 -index 000000000000..7a08cd88675f ---- /dev/null -+++ b/board/nvidia/p3450-0000/Kconfig -@@ -0,0 +1,12 @@ -+if TARGET_P3450_0000 -+ -+config SYS_BOARD -+ default "p3450-0000" -+ -+config SYS_VENDOR -+ default "nvidia" -+ -+config SYS_CONFIG_NAME -+ default "p3450-0000" -+ -+endif -diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS -new file mode 100644 -index 000000000000..40700066bf39 ---- /dev/null -+++ b/board/nvidia/p3450-0000/MAINTAINERS -@@ -0,0 +1,6 @@ -+P3450-0000 BOARD -+M: Tom Warren -+S: Maintained -+F: board/nvidia/p3450-0000/ -+F: include/configs/p3450-0000.h -+F: configs/p3450-0000_defconfig -diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile -new file mode 100644 -index 000000000000..993c506d8200 ---- /dev/null -+++ b/board/nvidia/p3450-0000/Makefile -@@ -0,0 +1,8 @@ -+# -+# (C) Copyright 2018 -+# NVIDIA Corporation -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += p3450-0000.o -diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c -new file mode 100644 -index 000000000000..432179e92605 ---- /dev/null -+++ b/board/nvidia/p3450-0000/p3450-0000.c -@@ -0,0 +1,198 @@ -+/* -+ * (C) Copyright 2018 -+ * NVIDIA Corporation -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../p2571/max77620_init.h" -+#include "pinmux-config-p3450-0000.h" -+ -+void pin_mux_mmc(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ -+ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return; -+ } -+ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xF2; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -+ -+ /* Disable LDO4 discharge */ -+ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) { -+ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); -+ } else { -+ val &= ~BIT(1); /* ADE */ -+ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); -+ } -+ -+ /* Set MBLPD */ -+ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) { -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } else { -+ val |= BIT(6); /* MBLPD */ -+ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } -+} -+ -+/* -+ * Routine: pinmux_init -+ * Description: Do individual peripheral pinmux configs -+ */ -+void pinmux_init(void) -+{ -+ pinmux_clear_tristate_input_clamping(); -+ -+ gpio_config_table(p3450_0000_gpio_inits, -+ ARRAY_SIZE(p3450_0000_gpio_inits)); -+ -+ pinmux_config_pingrp_table(p3450_0000_pingrps, -+ ARRAY_SIZE(p3450_0000_pingrps)); -+ -+ pinmux_config_drvgrp_table(p3450_0000_drvgrps, -+ ARRAY_SIZE(p3450_0000_drvgrps)); -+} -+ -+#ifdef CONFIG_PCI_TEGRA -+int tegra_pcie_board_init(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ -+ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return -1; -+ } -+ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xCA; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); -+ -+ return 0; -+} -+#endif /* PCI */ -+ -+static void ft_mac_address_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+} -+ -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@50000000/dc@54200000", -+ "/host1x@50000000/dc@54240000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ printf("copying carveout for %s...\n", nodes[i]); -+ -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ -+ continue; -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); -+ -+ return 0; -+} -diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -new file mode 100644 -index 000000000000..722da4973542 ---- /dev/null -+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -@@ -0,0 +1,265 @@ -+/* -+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+/* -+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -+ * -+ * To generate this file, use the tegra-pinmux-scripts tool available from -+ * https://github.com/NVIDIA/tegra-pinmux-scripts -+ * Run "board-to-uboot.py p3450-0000". -+ */ -+ -+#ifndef _PINMUX_CONFIG_P3450_0000_H_ -+#define _PINMUX_CONFIG_P3450_0000_H_ -+ -+#define GPIO_INIT(_port, _gpio, _init) \ -+ { \ -+ .gpio = TEGRA_GPIO(_port, _gpio), \ -+ .init = TEGRA_GPIO_INIT_##_init, \ -+ } -+ -+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { -+ /* port, pin, init_val */ -+ GPIO_INIT(A, 5, IN), -+ GPIO_INIT(A, 6, OUT1), -+ GPIO_INIT(B, 4, IN), -+ GPIO_INIT(B, 5, IN), -+ GPIO_INIT(B, 6, IN), -+ GPIO_INIT(B, 7, IN), -+ GPIO_INIT(C, 0, IN), -+ GPIO_INIT(C, 1, IN), -+ GPIO_INIT(C, 2, IN), -+ GPIO_INIT(C, 3, IN), -+ GPIO_INIT(C, 4, IN), -+ GPIO_INIT(E, 6, IN), -+ GPIO_INIT(G, 2, IN), -+ GPIO_INIT(G, 3, IN), -+ GPIO_INIT(H, 0, OUT0), -+ GPIO_INIT(H, 2, IN), -+ GPIO_INIT(H, 3, OUT0), -+ GPIO_INIT(H, 4, OUT0), -+ GPIO_INIT(H, 5, IN), -+ GPIO_INIT(H, 6, IN), -+ GPIO_INIT(H, 7, OUT0), -+ GPIO_INIT(I, 0, OUT0), -+ GPIO_INIT(I, 1, IN), -+ GPIO_INIT(I, 2, OUT0), -+ GPIO_INIT(J, 4, IN), -+ GPIO_INIT(J, 5, IN), -+ GPIO_INIT(J, 6, IN), -+ GPIO_INIT(J, 7, IN), -+ GPIO_INIT(S, 5, IN), -+ GPIO_INIT(S, 7, OUT0), -+ GPIO_INIT(T, 0, OUT0), -+ GPIO_INIT(V, 0, IN), -+ GPIO_INIT(V, 1, IN), -+ GPIO_INIT(X, 3, OUT1), -+ GPIO_INIT(X, 4, IN), -+ GPIO_INIT(X, 5, IN), -+ GPIO_INIT(X, 6, IN), -+ GPIO_INIT(Y, 1, IN), -+ GPIO_INIT(Y, 2, IN), -+ GPIO_INIT(Z, 0, IN), -+ GPIO_INIT(Z, 2, IN), -+ GPIO_INIT(Z, 3, OUT0), -+ GPIO_INIT(BB, 0, IN), -+ GPIO_INIT(CC, 4, IN), -+ GPIO_INIT(DD, 0, IN), -+}; -+ -+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -+ { \ -+ .pingrp = PMUX_PINGRP_##_pingrp, \ -+ .func = PMUX_FUNC_##_mux, \ -+ .pull = PMUX_PULL_##_pull, \ -+ .tristate = PMUX_TRI_##_tri, \ -+ .io = PMUX_PIN_##_io, \ -+ .od = PMUX_PIN_OD_##_od, \ -+ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -+ .lock = PMUX_PIN_LOCK_DEFAULT, \ -+ } -+ -+static const struct pmux_pingrp_config p3450_0000_pingrps[] = { -+ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -+ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -+ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -+ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+}; -+ -+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -+ { \ -+ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -+ .slwf = _slwf, \ -+ .slwr = _slwr, \ -+ .drvup = _drvup, \ -+ .drvdn = _drvdn, \ -+ .lpmd = PMUX_LPMD_##_lpmd, \ -+ .schmt = PMUX_SCHMT_##_schmt, \ -+ .hsm = PMUX_HSM_##_hsm, \ -+ } -+ -+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { -+}; -+ -+#endif /* PINMUX_CONFIG_P3450_0000_H */ -diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig -new file mode 100644 -index 000000000000..3a95028279d3 ---- /dev/null -+++ b/configs/p3450-0000_defconfig -@@ -0,0 +1,55 @@ -+CONFIG_ARM=y -+CONFIG_TEGRA=y -+CONFIG_SYS_TEXT_BASE=0x80080000 -+CONFIG_TEGRA210=y -+CONFIG_TARGET_P3450_0000=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_CONSOLE_MUX=y -+CONFIG_SYS_STDIO_DEREGISTER=y -+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_DFU=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+# CONFIG_CMD_NFS is not set -+CONFIG_CMD_EXT4_WRITE=y -+CONFIG_OF_LIVE=y -+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" -+CONFIG_DFU_MMC=y -+CONFIG_DFU_RAM=y -+CONFIG_DFU_SF=y -+CONFIG_SYS_I2C_TEGRA=y -+CONFIG_SPI_FLASH=y -+CONFIG_SF_DEFAULT_MODE=0 -+CONFIG_SF_DEFAULT_SPEED=24000000 -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_RTL8169=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_DM_PCI_COMPAT=y -+CONFIG_PCI_TEGRA=y -+CONFIG_SYS_NS16550=y -+CONFIG_TEGRA114_SPI=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_TEGRA=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a -+CONFIG_CI_UDC=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+# CONFIG_ENV_IS_IN_MMC is not set -diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h -new file mode 100644 -index 000000000000..ee819b7573b0 ---- /dev/null -+++ b/include/configs/p3450-0000.h -@@ -0,0 +1,34 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _P3450_0000_H -+#define _P3450_0000_H -+ -+#include -+ -+#include "tegra210-common.h" -+ -+/* High-level configuration options */ -+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" -+ -+/* Board-specific serial config */ -+#define CONFIG_TEGRA_ENABLE_UARTA -+ -+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+/* SPI */ -+#define CONFIG_SPI_FLASH_SIZE (4 << 20) -+ -+#include "tegra-common-usb-gadget.h" -+#include "tegra-common-post.h" -+ -+/* Crystal is 38.4MHz. clk_m runs at half that rate */ -+#define COUNTER_FREQUENCY 19200000 -+ -+#endif /* _P3450_0000_H */ diff --git a/aarch64-boards b/aarch64-boards index e0e0170..54d8c3a 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -14,19 +14,24 @@ geekbox hikey khadas-vim khadas-vim2 +libretech-ac libretech_all_h3_cc_h5 libretech-cc mvebu_espressobin-88f3720 mvebu_mcbin-88f8040 +nanopc-t4-rk3399 nanopi_a64 nanopi-k2 +nanopi-m4-rk3399 nanopi_neo2 +nanopi-neo4-rk3399 nanopi_neo_plus2 odroid-c2 orangepi_lite2 orangepi_one_plus orangepi_pc2 orangepi_prime +orangepi-rk3399 orangepi_win orangepi_zero_plus orangepi_zero_plus2 @@ -41,8 +46,11 @@ pine_h64 poplar puma-rk3399 rock960-rk3399 +rock-pi-4-rk3399 +rockpro64-rk3399 rpi_3 sopine_baseboard +teres_i turris_mox vexpress_aemv8a_dram vexpress_aemv8a_juno diff --git a/arm-boards b/arm-boards index e13b078..98b1141 100644 --- a/arm-boards +++ b/arm-boards @@ -9,6 +9,7 @@ A20-OLinuXino_MICRO am335x_evm am57xx_evm Ampe_A76 +apalis_imx6 arndale Auxtek-T003 Auxtek-T004 @@ -25,7 +26,6 @@ chiliboard CHIP Chuwi_V7_CW0825 clearfog -cl-som-am57x cm_fx6 Colombus colorfly_e708_q1 diff --git a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch deleted file mode 100644 index 237b4a6..0000000 --- a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +++ /dev/null @@ -1,197 +0,0 @@ -From patchwork Tue Apr 16 16:24:16 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 1/2] net: eth-uclass: Write MAC address to hardware after probe -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1086417 -Message-Id: <20190416162417.25799-1-thierry.reding@gmail.com> -To: Simon Glass , Joe Hershberger -Cc: u-boot@lists.denx.de -Date: Tue, 16 Apr 2019 18:24:16 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -In order for the device to use the proper MAC address, which can have -been configured in the environment prior to the device being registered, -ensure that the MAC address is written after the device has been probed. -For devices that are registered before the network stack is initialized, -this is already done during eth_initialize(). If the Ethernet device is -on a bus that is not initialized on early boot, such as PCI, the device -is not available at the time eth_initialize() is called, so we need the -MAC address programming to also happen after probe. - -Signed-off-by: Thierry Reding ---- - net/eth-uclass.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/net/eth-uclass.c b/net/eth-uclass.c -index 2ef20df19203..4225aabf1fa1 100644 ---- a/net/eth-uclass.c -+++ b/net/eth-uclass.c -@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev) - #endif - } - -+ eth_write_hwaddr(dev); -+ - return 0; - } - - -From patchwork Tue Apr 16 16:24:17 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,2/2] net: eth-uclass: Support device tree MAC addresses -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1086418 -Message-Id: <20190416162417.25799-2-thierry.reding@gmail.com> -To: Simon Glass , Joe Hershberger -Cc: u-boot@lists.denx.de -Date: Tue, 16 Apr 2019 18:24:17 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Add the standard Ethernet device tree bindings (imported from v5.0 of -the Linux kernel) and implement support for reading the MAC address for -Ethernet devices in the Ethernet uclass. If the "mac-address" property -exists, the MAC address will be parsed from that. If that property does -not exist, the "local-mac-address" property will be tried as fallback. - -MAC addresses from device tree take precedence over the ones stored in -a network interface card's ROM. - -Acked-by: Joe Hershberger -Signed-off-by: Thierry Reding ---- -Changes in v2: -- use dev_read_u8_array_ptr() - - .../devicetree/bindings/net/ethernet.txt | 66 +++++++++++++++++++ - net/eth-uclass.c | 26 +++++++- - 2 files changed, 89 insertions(+), 3 deletions(-) - create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt - -diff --git a/Documentation/devicetree/bindings/net/ethernet.txt b/Documentation/devicetree/bindings/net/ethernet.txt -new file mode 100644 -index 000000000000..cfc376bc977a ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/ethernet.txt -@@ -0,0 +1,66 @@ -+The following properties are common to the Ethernet controllers: -+ -+NOTE: All 'phy*' properties documented below are Ethernet specific. For the -+generic PHY 'phys' property, see -+Documentation/devicetree/bindings/phy/phy-bindings.txt. -+ -+- local-mac-address: array of 6 bytes, specifies the MAC address that was -+ assigned to the network device; -+- mac-address: array of 6 bytes, specifies the MAC address that was last used by -+ the boot program; should be used in cases where the MAC address assigned to -+ the device by the boot program is different from the "local-mac-address" -+ property; -+- nvmem-cells: phandle, reference to an nvmem node for the MAC address; -+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used; -+- max-speed: number, specifies maximum speed in Mbit/s supported by the device; -+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than -+ the maximum frame size (there's contradiction in the Devicetree -+ Specification). -+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto -+ standard property; supported values are: -+ * "internal" -+ * "mii" -+ * "gmii" -+ * "sgmii" -+ * "qsgmii" -+ * "tbi" -+ * "rev-mii" -+ * "rmii" -+ * "rgmii" (RX and TX delays are added by the MAC when required) -+ * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the -+ MAC should not add the RX or TX delays in this case) -+ * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC -+ should not add an RX delay in this case) -+ * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC -+ should not add an TX delay in this case) -+ * "rtbi" -+ * "smii" -+ * "xgmii" -+ * "trgmii" -+ * "2000base-x", -+ * "2500base-x", -+ * "rxaui" -+ * "xaui" -+ * "10gbase-kr" (10GBASE-KR, XFI, SFI) -+- phy-connection-type: the same as "phy-mode" property but described in the -+ Devicetree Specification; -+- phy-handle: phandle, specifies a reference to a node representing a PHY -+ device; this property is described in the Devicetree Specification and so -+ preferred; -+- phy: the same as "phy-handle" property, not recommended for new bindings. -+- phy-device: the same as "phy-handle" property, not recommended for new -+ bindings. -+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This -+ is used for components that can have configurable receive fifo sizes, -+ and is useful for determining certain configuration settings such as -+ flow control thresholds. -+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This -+ is used for components that can have configurable fifo sizes. -+- managed: string, specifies the PHY management type. Supported values are: -+ "auto", "in-band-status". "auto" is the default, it usess MDIO for -+ management if fixed-link is not specified. -+ -+Child nodes of the Ethernet controller are typically the individual PHY devices -+connected via the MDIO bus (sometimes the MDIO bus controller is separate). -+They are described in the phy.txt file in this same directory. -+For non-MDIO PHY management see fixed-link.txt. -diff --git a/net/eth-uclass.c b/net/eth-uclass.c -index 4225aabf1fa1..c6d5ec013bd8 100644 ---- a/net/eth-uclass.c -+++ b/net/eth-uclass.c -@@ -455,6 +455,23 @@ static int eth_pre_unbind(struct udevice *dev) - return 0; - } - -+static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN]) -+{ -+ const uint8_t *p; -+ -+ p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN); -+ if (!p) -+ p = dev_read_u8_array_ptr(dev, "local-mac-address", ARP_HLEN); -+ -+ if (!p) { -+ memset(mac, 0, ARP_HLEN); -+ return false; -+ } -+ -+ memcpy(mac, p, ARP_HLEN); -+ return true; -+} -+ - static int eth_post_probe(struct udevice *dev) - { - struct eth_device_priv *priv = dev->uclass_priv; -@@ -489,9 +506,12 @@ static int eth_post_probe(struct udevice *dev) - - priv->state = ETH_STATE_INIT; - -- /* Check if the device has a MAC address in ROM */ -- if (eth_get_ops(dev)->read_rom_hwaddr) -- eth_get_ops(dev)->read_rom_hwaddr(dev); -+ /* Check if the device has a MAC address in device tree */ -+ if (!eth_dev_get_mac_address(dev, pdata->enetaddr)) { -+ /* Check if the device has a MAC address in ROM */ -+ if (eth_get_ops(dev)->read_rom_hwaddr) -+ eth_get_ops(dev)->read_rom_hwaddr(dev); -+ } - - eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr); - if (!is_zero_ethaddr(env_enetaddr)) { diff --git a/net-rtl8169-Implement---hwaddr_write-callback.patch b/net-rtl8169-Implement---hwaddr_write-callback.patch deleted file mode 100644 index 984e860..0000000 --- a/net-rtl8169-Implement---hwaddr_write-callback.patch +++ /dev/null @@ -1,102 +0,0 @@ -From patchwork Tue Apr 16 16:20:29 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, RESEND, - 1/2] net: rtl8169: Implement ->hwaddr_write() callback -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1086411 -Message-Id: <20190416162030.13590-1-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de -Date: Tue, 16 Apr 2019 18:20:29 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Implement this callback that allows the MAC address to be set for the -Ethernet card. This is necessary in order for the device to be able to -receive packets for the MAC address that U-Boot advertises. - -Signed-off-by: Thierry Reding -Acked-by: Joe Hershberger ---- - drivers/net/rtl8169.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index a78f3d233f1a..27e27b34176b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) - } - #endif - -+#ifdef CONFIG_DM_ETH -+static int rtl8169_write_hwaddr(struct udevice *dev) -+{ -+ struct eth_pdata *plat = dev_get_platdata(dev); -+ unsigned int i; -+ -+ RTL_W8(Cfg9346, Cfg9346_Unlock); -+ -+ for (i = 0; i < MAC_ADDR_LEN; i++) -+ RTL_W8(MAC0 + i, plat->enetaddr[i]); -+ -+ RTL_W8(Cfg9346, Cfg9346_Lock); -+ -+ return 0; -+} -+#endif -+ - /************************************************************************** - INIT - Look for an adapter, this routine's visible to the outside - ***************************************************************************/ -@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { - .send = rtl8169_eth_send, - .recv = rtl8169_eth_recv, - .stop = rtl8169_eth_stop, -+ .write_hwaddr = rtl8169_write_hwaddr, - }; - - static const struct udevice_id rtl8169_eth_ids[] = { - -From patchwork Tue Apr 16 16:20:30 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,RESEND,2/2] net: rtl8169: Support RTL-8168h/8111h -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1086412 -Message-Id: <20190416162030.13590-2-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de -Date: Tue, 16 Apr 2019 18:20:30 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This version of the RTL-8168 is present on some development boards and -is compatible with this driver. Add support for identifying this version -of the chip so that U-Boot won't complain about it being unknown. - -Signed-off-by: Thierry Reding -Acked-by: Joe Hershberger ---- - drivers/net/rtl8169.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index 27e27b34176b..bc052e72564b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -257,6 +257,7 @@ static struct { - {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, - {"RTL-8101e", 0x34, 0xff7e1880,}, - {"RTL-8100e", 0x32, 0xff7e1880,}, -+ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, - }; - - enum _DescStatusBit { diff --git a/sources b/sources index 176ad87..a94cd69 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04.tar.bz2) = 357fe94b5b043885472ea1b7dcbbac601d0c1f7c64f71026b9e1279b53160847c6478d6ec98a2f678e562db21e39037d6e6fbc1e6b19beaac02ca14e93c5de0e +SHA512 (u-boot-2019.07-rc4.tar.bz2) = 71aa6e2eb30a3abf136a4128fb8bf00c8b1b71d6bc35cc65daac058fd4dae135080e4683c092edefffc6c1ba227bf07b49721b889ddfa02e7872beb5ab5fe92f diff --git a/uboot-tools.spec b/uboot-tools.spec index 39ac882..b23eda0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc4 +%global candidate rc4 Name: uboot-tools -Version: 2019.04 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2019.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -15,22 +15,17 @@ Source4: aarch64-chromebooks Source5: 10-devicetree.install # Fedoraisms patches -Patch1: uefi-use-Fedora-specific-path-name.patch - -# general fixes -Patch2: usb-kbd-fixes.patch -Patch3: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch4: uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch -Patch5: uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch +Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch11: dragonboard-fixes.patch -Patch12: ARM-tegra-Add-support-for-framebuffer-carveouts.patch -Patch13: ARM-tegra-Miscellaneous-improvements.patch -Patch15: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch -Patch16: net-rtl8169-Implement---hwaddr_write-callback.patch -Patch17: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch5: usb-kbd-fixes.patch +Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch7: raspberrypi-add-serial-and-revision-to-the-device-tree.patch +Patch8: dragonboard-fixes.patch +Patch9: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +Patch10: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch11: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch BuildRequires: bc BuildRequires: dtc @@ -67,6 +62,10 @@ BuildRequires: arm-trusted-firmware-armv8 Requires: dtc Requires: systemd +%ifarch aarch64 %{arm} +Obsoletes: uboot-images-elf < 2019.07 +Provides: uboot-images-elf < 2019.07 +%endif %description This package contains a few U-Boot utilities - mkimage for creating boot images @@ -92,17 +91,6 @@ BuildArch: noarch u-boot bootloader binaries for armv7 boards %endif -%ifarch %{arm} aarch64 -%package -n uboot-images-elf -Summary: u-boot bootloader images for armv7 boards -Requires: uboot-tools -Obsoletes: uboot-images-qemu -Provides: uboot-images-qemu - -%description -n uboot-images-elf -u-boot bootloader ELF binaries for use with qemu and other platforms -%endif - %prep %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}} @@ -122,7 +110,7 @@ do echo "Building board: $board" mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 nanopi_a64 orangepi_win pine64-lts pine64_plus pinebook sopine_baseboard libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_zero_plus2 orangepi_zero_plus) + sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook sopine_baseboard teres_i) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ @@ -132,7 +120,7 @@ do echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 puma-rk3399 rock960-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -140,7 +128,7 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - rk33xx=(evb-rk3399 ficus-rk3399 firefly-rk3399 puma-rk3399 rock960-rk3399) + rk33xx=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) if [[ " ${rk33xx[*]} " == *" $board "* ]]; then echo "Board: $board using rk33xx" make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" u-boot.itb V=1 O=builds/$(echo $board)/ @@ -217,33 +205,6 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ done %endif -# ELF binaries -%ifarch %{arm} -for board in vexpress_ca15_tc2 vexpress_ca9x4 -do -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/elf/$(echo $board)/ - for file in u-boot - do - if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/elf/$(echo $board)/ - fi - done -done -%endif - -%ifarch aarch64 -for board in $(cat %{_arch}-boards) -do -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/elf/$(echo $board)/ - for file in u-boot - do - if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/elf/$(echo $board)/ - fi - done -done -%endif - for tool in bmp_logo dumpimage easylogo/easylogo env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes do install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir} @@ -261,7 +222,7 @@ install -p -m 0755 %{SOURCE5} $RPM_BUILD_ROOT/lib/kernel/install.d/ # Copy sone useful docs over mkdir -p builds/docs -cp -p board/amlogic/odroid-c2/README.odroid-c2 builds/docs/README.odroid-c2 +cp -p board/amlogic/p200/README.odroid-c2 builds/docs/README.odroid-c2 cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820 @@ -290,21 +251,19 @@ cp -p board/warp7/README builds/docs/README.warp7 %ifarch aarch64 %files -n uboot-images-armv8 %{_datadir}/uboot/* -%exclude %{_datadir}/uboot/elf %endif %ifarch %{arm} %files -n uboot-images-armv7 %{_datadir}/uboot/* -%exclude %{_datadir}/uboot/elf -%endif - -%ifarch %{arm} aarch64 -%files -n uboot-images-elf -%{_datadir}/uboot/elf %endif %changelog +* Tue Jun 18 2019 Peter Robinson 2019.07-0.1-rc4 +- 2019.07 RC4 +- Obsolete unused elf packages +- A number of new rk3399 devices + * Sat May 4 2019 Peter Robinson 2019.04-2 - Build and ship pre built SD/SPI SPL bits for all rk3399 boards diff --git a/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch b/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch deleted file mode 100644 index 33c93b6..0000000 --- a/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch +++ /dev/null @@ -1,54 +0,0 @@ -From patchwork Fri Apr 12 18:26:28 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, - U-boot] : Change FDT memory type from runtime data to boot services - data -X-Patchwork-Submitter: Ilias Apalodimas -X-Patchwork-Id: 1084888 -X-Patchwork-Delegate: xypron.glpk@gmx.de -Message-Id: <1555093588-21916-1-git-send-email-ilias.apalodimas@linaro.org> -To: u-boot@lists.denx.de, - xypron.glpk@gmx.de -Cc: Ilias Apalodimas , agraf@csgraf.de, - ard.biesheuvel@linaro.org -Date: Fri, 12 Apr 2019 21:26:28 +0300 -From: Ilias Apalodimas -List-Id: U-Boot discussion - -Following Ard's suggestion: -Runtime data sections are intended for data that is used by the runtime -services implementation. -Let's change the type to EFI_BOOT_SERVICES_DATA - -This also fixes booting of armv7 using efi and fdtcontroladdr - -Suggested-by: Ard Biesheuvel -Signed-off-by: Ilias Apalodimas -Acked-by: Ard Biesheuvel -Reviewed-by: Heinrich Schuchardt ---- - cmd/bootefi.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/cmd/bootefi.c b/cmd/bootefi.c -index 3619a20e6433..15ee4af45667 100644 ---- a/cmd/bootefi.c -+++ b/cmd/bootefi.c -@@ -111,13 +111,13 @@ static efi_status_t copy_fdt(void **fdtp) - new_fdt_addr = (uintptr_t)map_sysmem(fdt_ram_start + 0x7f00000 + - fdt_size, 0); - ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, -- EFI_RUNTIME_SERVICES_DATA, fdt_pages, -+ EFI_BOOT_SERVICES_DATA, fdt_pages, - &new_fdt_addr); - if (ret != EFI_SUCCESS) { - /* If we can't put it there, put it somewhere */ - new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size); - ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, -- EFI_RUNTIME_SERVICES_DATA, fdt_pages, -+ EFI_BOOT_SERVICES_DATA, fdt_pages, - &new_fdt_addr); - if (ret != EFI_SUCCESS) { - printf("ERROR: Failed to reserve space for FDT\n"); diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index a2340fd..c5ecb61 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -1,7 +1,7 @@ -From 8bc6f62541436ebaf87133792726d9b48f878d09 Mon Sep 17 00:00:00 2001 +From 67c05a07288ef24b3ac9d013f35a0868d26a34c7 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 5 Dec 2017 00:11:08 +0000 -Subject: [PATCH] distro: load FDT from any partition on boot device +Date: Tue, 18 Jun 2019 11:51:21 +0100 +Subject: [PATCH 1/2] distro: load FDT from any partition on boot device In the EFI_LOADER boot path, we were only checking the FAT partition containing the EFI payload for dtb files. But this is somewhat of a @@ -22,14 +22,14 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know). Signed-off-by: Rob Clark Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 34 +++++++++++++++++++++++----------- + include/config_distro_bootcmd.h | 34 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 7746366ec8..c87f7c2a42 100644 +index 4993303f4d..f4b3b62fca 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h -@@ -135,25 +135,37 @@ +@@ -138,25 +138,37 @@ "fi\0" \ \ "load_efi_dtb=" \ @@ -70,14 +70,14 @@ index 7746366ec8..c87f7c2a42 100644 + "run boot_efi_binary\0" \ + "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/fedora/"BOOTEFI_NAME"; then " \ + "efi/boot/"BOOTEFI_NAME"; then " \ "echo Found EFI removable media binary " \ - "efi/fedora/"BOOTEFI_NAME"; " \ + "efi/boot/"BOOTEFI_NAME"; " \ - "run boot_efi_binary; " \ + "run scan_dev_for_dtb; " \ "echo EFI LOAD FAILED: continuing...; " \ "fi; " \ "setenv efi_fdtfile\0" -- -2.14.3 +2.21.0 diff --git a/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch b/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch deleted file mode 100644 index bdb0108..0000000 --- a/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch +++ /dev/null @@ -1,46 +0,0 @@ -From patchwork Tue Apr 9 20:58:30 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] efi: fix memory calculation overflow on 32-bit systems -X-Patchwork-Submitter: Patrick Wildt -X-Patchwork-Id: 1082739 -X-Patchwork-Delegate: xypron.glpk@gmx.de -Message-Id: <20190409205830.GA5818@nyx.fritz.box> -To: u-boot@lists.denx.de -Date: Tue, 9 Apr 2019 22:58:30 +0200 -From: Patrick Wildt -List-Id: U-Boot discussion - -Hi, - -There are Cubox-i machines out there with nearly 4 GiB of RAM. The -RAM starts at 0x10000000 with a size of 0xf0000000. Thus the end -of RAM is at 0x100000000. This overflows a 32-bit integer, which -should be fine since in the EFI memory code the variables used are -all 64-bit with a fixed size. Unfortunately EFI_PAGE_MASK, which is -used in the EFI memory code to remove the lower bits, is based on -the EFI_PAGE_SIZE macro which, uses 1UL with a shift. This means -the resulting mask is UL, which is only 32-bit on ARMv7. Use ULL to -make sure that even on 32-bit platforms we use a 64-bit long mask. -Without this there will be no memory available in the EFI memory map -and bootefi will fail allocating pages. - -Best regards, -Patrick -Reviewed-by: Heinrich Schuchardt -Reviewed-by: Patrick Delaunay - -diff --git a/include/efi.h b/include/efi.h -index d98441ab19d..3c9d20f8c0b 100644 ---- a/include/efi.h -+++ b/include/efi.h -@@ -190,7 +190,7 @@ enum efi_mem_type { - #define EFI_MEM_DESC_VERSION 1 - - #define EFI_PAGE_SHIFT 12 --#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) -+#define EFI_PAGE_SIZE (1ULL << EFI_PAGE_SHIFT) - #define EFI_PAGE_MASK (EFI_PAGE_SIZE - 1) - - struct efi_mem_desc { diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index 69dcc8b..f51f79c 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -1,7 +1,7 @@ -From c8e3063259c19e8f03c9f3e053ec6384d2d3f861 Mon Sep 17 00:00:00 2001 +From 3cc3f7de06dcf9614554d63b159f0cd6710b96b0 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 19 Mar 2019 10:48:48 +0000 -Subject: [PATCH] use Fedora specific EFI path/name +Date: Tue, 18 Jun 2019 12:08:57 +0100 +Subject: [PATCH 2/2] use Fedora specific EFI path/name Signed-off-by: Peter Robinson --- @@ -9,7 +9,7 @@ Signed-off-by: Peter Robinson 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 4993303f4d..1aba509962 100644 +index f4b3b62fca..2dc8be9815 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -92,9 +92,9 @@ @@ -33,18 +33,18 @@ index 4993303f4d..1aba509962 100644 "if fdt addr ${fdt_addr_r}; then " \ "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ -@@ -153,9 +153,9 @@ - "fi;" \ - "done;" \ +@@ -165,9 +165,9 @@ + "run boot_efi_binary\0" \ + "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/boot/"BOOTEFI_NAME"; then " \ + "efi/fedora/"BOOTEFI_NAME"; then " \ "echo Found EFI removable media binary " \ - "efi/boot/"BOOTEFI_NAME"; " \ + "efi/fedora/"BOOTEFI_NAME"; " \ - "run boot_efi_binary; " \ + "run scan_dev_for_dtb; " \ "echo EFI LOAD FAILED: continuing...; " \ "fi; " \ -- -2.20.1 +2.21.0 From f995ddaa1b8621311199e0aeaf4efec83413ee82 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 18 Jun 2019 12:18:55 +0100 Subject: [PATCH 028/351] fix up patch listing --- uboot-tools.spec | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index b23eda0..c284061 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -21,11 +21,10 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement Patch5: usb-kbd-fixes.patch Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch7: raspberrypi-add-serial-and-revision-to-the-device-tree.patch -Patch8: dragonboard-fixes.patch -Patch9: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch -Patch10: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch11: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch +Patch7: dragonboard-fixes.patch +Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch10: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch BuildRequires: bc BuildRequires: dtc From 194cb00fcbfd2a1c6aeb077cc40d79b0c7d40320 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 28 Jun 2019 09:26:31 +0100 Subject: [PATCH 029/351] add some comments to some patches --- uboot-tools.spec | 2 ++ 1 file changed, 2 insertions(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index c284061..adeb268 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -15,7 +15,9 @@ Source4: aarch64-chromebooks Source5: 10-devicetree.install # Fedoraisms patches +# Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +# Needed due to issues with shim Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement From d2929efe620c22de0f715c298f8d5c074967d5a2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 28 Jun 2019 13:30:27 +0100 Subject: [PATCH 030/351] Fix build with explicit python2 --- aarch64-boards | 2 -- uboot-tools.spec | 11 +++++++---- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index 54d8c3a..18a2a4f 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -52,7 +52,5 @@ rpi_3 sopine_baseboard teres_i turris_mox -vexpress_aemv8a_dram vexpress_aemv8a_juno -vexpress_aemv8a_semi xilinx_zynqmp_zcu100_revC diff --git a/uboot-tools.spec b/uboot-tools.spec index adeb268..571528f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -41,9 +41,6 @@ BuildRequires: gcc %endif BuildRequires: flex bison BuildRequires: openssl-devel -%if 0%{?fedora} -BuildRequires: python-unversioned-command -%endif BuildRequires: python2-devel BuildRequires: python2-setuptools BuildRequires: python2-libfdt @@ -97,6 +94,8 @@ u-boot bootloader binaries for armv7 boards cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 . +sed -i 's/python/python2/' arch/arm/mach-rockchip/make_fit_atf.py + %build mkdir builds @@ -260,6 +259,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Fri Jun 28 2019 Peter Robinson 2019.07-0.2-rc4 +- Fix build with explicit python2 +- Drop a couple of unused boards + * Tue Jun 18 2019 Peter Robinson 2019.07-0.1-rc4 - 2019.07 RC4 - Obsolete unused elf packages From f2e16593da2af10ae34d6852745d8ff664311380 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 9 Jul 2019 00:18:59 +0100 Subject: [PATCH 031/351] 2019.07, Rock64, Rock960 enhancements, cleanups --- ...k3288-disable-CONFIG_SPL_I2C_SUPPORT.patch | 34 - aarch64-boards | 1 + mvebu-enable-generic-distro-boot-config.patch | 111 --- mx6-utilite-distro-boot.patch | 154 ---- rockchip-rk3399-Fix-USB3-support.patch | 415 +++++++++ rockchip-rock960.patch | 799 ++++++++++++++++++ sources | 2 +- ...-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch | 64 -- ...a186-jetson-tx2-disable-onboard-emmc.patch | 52 -- ...35x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch | 183 ---- uboot-tools.spec | 23 +- 11 files changed, 1232 insertions(+), 606 deletions(-) delete mode 100644 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch delete mode 100644 mvebu-enable-generic-distro-boot-config.patch delete mode 100644 mx6-utilite-distro-boot.patch create mode 100644 rockchip-rk3399-Fix-USB3-support.patch create mode 100644 rockchip-rock960.patch delete mode 100644 tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch delete mode 100644 tegra186-jetson-tx2-disable-onboard-emmc.patch delete mode 100644 ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch diff --git a/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch b/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch deleted file mode 100644 index c8e1adf..0000000 --- a/0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 68b90e57bc034e237923b02acb633dc4e91d44cb Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Wed, 27 Feb 2019 20:05:43 +0100 -Subject: [PATCH] configs: tinker-rk3288 disable CONFIG_SPL_I2C_SUPPORT - -The SPL for the Tinker Board has to fit into 32 KiB. Currently this limit -is exceeded. - -CONFIG_SPL_I2C_SUPPORT is not needed to move to main U-Boot. So let's -disable it. - -Suggested-by: David Wu -Signed-off-by: Heinrich Schuchardt -Reviewed-by: David Wu -Reviewed-by: Philipp Tomsich ---- - configs/tinker-rk3288_defconfig | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig -index 4b48689ee8..0e8cf73fe9 100644 ---- a/configs/tinker-rk3288_defconfig -+++ b/configs/tinker-rk3288_defconfig -@@ -20,7 +20,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_TEXT_BASE=0xff704000 - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 --CONFIG_SPL_I2C_SUPPORT=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_GPT=y - CONFIG_CMD_I2C=y --- -2.21.0 - diff --git a/aarch64-boards b/aarch64-boards index 18a2a4f..4e337fb 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -45,6 +45,7 @@ pinebook pine_h64 poplar puma-rk3399 +rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 diff --git a/mvebu-enable-generic-distro-boot-config.patch b/mvebu-enable-generic-distro-boot-config.patch deleted file mode 100644 index 51ec5b5..0000000 --- a/mvebu-enable-generic-distro-boot-config.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 8de891d0767aafb383b6f533b08a5c0b75b4718b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 18 Sep 2017 15:48:32 +0100 -Subject: [PATCH] arm: mvebu: enable generic distro boot config - -Switch all of the mvebu boards to support disto generic booting -This will enable Fedora, Debian and other distros to support -mvebu systems easier. Tested on SolidRun ClearFog - -Signed-off-by: Dennis Gilmore -Signed-off-by: Peter Robinson ---- - include/configs/mv-common.h | 84 +++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 84 insertions(+) - -diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h -index 7c2bab2fc6..2819493fca 100644 ---- a/include/configs/mv-common.h -+++ b/include/configs/mv-common.h -@@ -130,4 +130,88 @@ - #define CONFIG_MTD_PARTITIONS - #endif - -+#ifndef CONFIG_SPL_BUILD -+#include -+ -+/* -+* 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. -+* 32M uncompressed kernel, 16M compressed kernel, 1M fdt, -+* 1M script, 1M pxe and the ramdisk at the end. -+*/ -+#define SDRAM_OFFSET(x) 0x0##x -+ -+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) -+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) -+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) -+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) -+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) -+ -+#define MEM_LAYOUT_ENV_SETTINGS \ -+ "bootm_size=0xa000000\0" \ -+ "kernel_addr_r=" KERNEL_ADDR_R "\0" \ -+ "fdt_addr_r=" FDT_ADDR_R "\0" \ -+ "scriptaddr=" SCRIPT_ADDR_R "\0" \ -+ "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ -+ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" -+ -+#ifdef CONFIG_MMC -+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) -+#else -+#define BOOT_TARGET_DEVICES_MMC(func) -+#endif -+ -+#ifdef CONFIG_CMD_SATA -+#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0) func(SATA, sata, 1) -+#define CONFIG_PREBOOT "sata init" -+#else -+#define BOOT_TARGET_DEVICES_SATA(func) -+#endif -+ -+#ifdef CONFIG_USB_STORAGE -+#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) -+#else -+#define BOOT_TARGET_DEVICES_USB(func) -+#endif -+ -+#define BOOT_TARGET_DEVICES(func) \ -+ BOOT_TARGET_DEVICES_MMC(func) \ -+ BOOT_TARGET_DEVICES_SATA(func) \ -+ BOOT_TARGET_DEVICES_USB(func) \ -+ func(PXE, pxe, na) -+ -+#include -+ -+#ifdef CONFIG_USB_KEYBOARD -+#define CONSOLE_STDIN_SETTINGS \ -+ "preboot=usb start\0" \ -+ "stdin=serial,usbkbd\0" -+#else -+#define CONSOLE_STDIN_SETTINGS \ -+ "stdin=serial\0" -+#endif -+ -+#ifdef CONFIG_VIDEO -+#define CONSOLE_STDOUT_SETTINGS \ -+ "stdout=serial,vga\0" \ -+ "stderr=serial,vga\0" -+#else -+#define CONSOLE_STDOUT_SETTINGS \ -+ "stdout=serial\0" \ -+ "stderr=serial\0" -+#endif -+ -+#define CONSOLE_ENV_SETTINGS \ -+ CONSOLE_STDIN_SETTINGS \ -+ CONSOLE_STDOUT_SETTINGS -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ CONSOLE_ENV_SETTINGS \ -+ MEM_LAYOUT_ENV_SETTINGS \ -+ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ -+ "console=ttyS0,115200\0" \ -+ BOOTENV -+#else /* ifndef CONFIG_SPL_BUILD */ -+#define CONFIG_EXTRA_ENV_SETTINGS -+#endif -+ - #endif /* _MV_COMMON_H */ --- -2.13.5 - diff --git a/mx6-utilite-distro-boot.patch b/mx6-utilite-distro-boot.patch deleted file mode 100644 index b2fd480..0000000 --- a/mx6-utilite-distro-boot.patch +++ /dev/null @@ -1,154 +0,0 @@ -From af017eb82317dc88c1b23301d76466b389c2e007 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 13 Sep 2016 08:47:34 +0100 -Subject: [PATCH] port utilite to distro generic boot commands - ---- - include/configs/cm_fx6.h | 115 ++++++++++++----------------------------------- - 1 file changed, 29 insertions(+), 86 deletions(-) - -diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h -index c839b03..4dd501e 100644 ---- a/include/configs/cm_fx6.h -+++ b/include/configs/cm_fx6.h -@@ -11,6 +11,7 @@ - #ifndef __CONFIG_CM_FX6_H - #define __CONFIG_CM_FX6_H - -+#include - #include "mx6_common.h" - - /* Machine config */ -@@ -78,101 +79,43 @@ - #define CONFIG_ENV_SIZE (8 * 1024) - #define CONFIG_ENV_OFFSET (768 * 1024) - -+#ifndef CONFIG_SPL_BUILD -+#include -+#include -+ -+#ifdef CONFIG_AHCI -+#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) -+#else -+#define BOOT_TARGET_DEVICES_SCSI(func) -+#endif -+ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 2) \ -+ BOOT_TARGET_DEVICES_SCSI(func) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ - #define CONFIG_EXTRA_ENV_SETTINGS \ - "stdin=serial,usbkbd\0" \ - "stdout=serial,vga\0" \ - "stderr=serial,vga\0" \ - "panel=HDMI\0" \ -- "autoload=no\0" \ -- "uImage=uImage-cm-fx6\0" \ -- "zImage=zImage-cm-fx6\0" \ -- "kernel=uImage-cm-fx6\0" \ -- "script=boot.scr\0" \ -- "dtb=cm-fx6.dtb\0" \ -- "bootm_low=18000000\0" \ -+ "dtb=imx6q-utilite-pro.dts\0" \ - "loadaddr=0x10800000\0" \ - "fdtaddr=0x11000000\0" \ -+ "fdt_addr_r=0x18000000\0" \ -+ "pxefile_addr_r=0x17f00000\0" \ -+ "scriptaddr=0x17e00000\0" \ -+ "kernel_addr_r=0x11000000\0" \ -+ "ramdisk_addr_r=0x18100000\0" \ -+ "bootm_size=0x20000000\0" \ - "console=ttymxc3,115200\0" \ - "ethprime=FEC0\0" \ -- "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ -- "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ -- "doboot=bootm ${loadaddr}\0" \ -- "doloadfdt=false\0" \ -- "mtdids=" MTDIDS_DEFAULT "\0" \ -- "mtdparts=" MTDPARTS_DEFAULT "\0" \ -- "setboottypez=setenv kernel ${zImage};" \ -- "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ -- "setenv doloadfdt true;\0" \ -- "setboottypem=setenv kernel ${uImage};" \ -- "setenv doboot bootm ${loadaddr};" \ -- "setenv doloadfdt false;\0"\ -- "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ -- "sataroot=/dev/sda2 rw rootwait\0" \ -- "nandroot=/dev/mtdblock4 rw\0" \ -- "nandrootfstype=ubifs\0" \ -- "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ -- "${video} ${extrabootargs}\0" \ -- "sataargs=setenv bootargs console=${console} root=${sataroot} " \ -- "${video} ${extrabootargs}\0" \ -- "nandargs=setenv bootargs console=${console} " \ -- "root=${nandroot} " \ -- "rootfstype=${nandrootfstype} " \ -- "${video} ${extrabootargs}\0" \ -- "nandboot=if run nandloadkernel; then " \ -- "run nandloadfdt;" \ -- "run setboottypem;" \ -- "run storagebootcmd;" \ -- "run setboottypez;" \ -- "run storagebootcmd;" \ -- "fi;\0" \ -- "run_eboot=echo Starting EBOOT ...; "\ -- "mmc dev 2 && " \ -- "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ -- "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ -- "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ -- "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ -- "bootscript=echo Running bootscript from ${storagetype} ...;" \ -- "source ${loadaddr};\0" \ -- "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ -- "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ -- "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ -- "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ -- "setupnandboot=setenv storagetype nand;\0" \ -- "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ -- "storagebootcmd=echo Booting from ${storagetype} ...;" \ -- "run ${storagetype}args; run doboot;\0" \ -- "trybootk=if run loadkernel; then " \ -- "if ${doloadfdt}; then " \ -- "run loadfdt;" \ -- "fi;" \ -- "run storagebootcmd;" \ -- "fi;\0" \ -- "trybootsmz=if run loadscript; then " \ -- "run bootscript;" \ -- "fi;" \ -- "run setboottypem;" \ -- "run trybootk;" \ -- "run setboottypez;" \ -- "run trybootk;\0" -- --#define CONFIG_BOOTCOMMAND \ -- "run setupmmcboot;" \ -- "mmc dev ${storagedev};" \ -- "if mmc rescan; then " \ -- "run trybootsmz;" \ -- "fi;" \ -- "run setupusbboot;" \ -- "if usb start; then "\ -- "if run loadscript; then " \ -- "run bootscript;" \ -- "fi;" \ -- "fi;" \ -- "run setupsataboot;" \ -- "if sata init; then " \ -- "run trybootsmz;" \ -- "fi;" \ -- "run setupnandboot;" \ -- "run nandboot;" -+ BOOTENV -+ -+#else /* ifndef CONFIG_SPL_BUILD */ -+#define CONFIG_EXTRA_ENV_SETTINGS -+#endif - - #define CONFIG_PREBOOT "usb start;sf probe" - --- -2.9.3 - diff --git a/rockchip-rk3399-Fix-USB3-support.patch b/rockchip-rk3399-Fix-USB3-support.patch new file mode 100644 index 0000000..792ada6 --- /dev/null +++ b/rockchip-rk3399-Fix-USB3-support.patch @@ -0,0 +1,415 @@ +From patchwork Sun Jun 30 16:01:53 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Mark Kettenis +X-Patchwork-Id: 1124932 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=openbsd.org +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45cFdR5qfcz9sBp + for ; + Mon, 1 Jul 2019 02:02:35 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 69EB1C21DFD; Sun, 30 Jun 2019 16:02:22 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A34D5C21D56; + Sun, 30 Jun 2019 16:02:07 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id E8483C21D56; Sun, 30 Jun 2019 16:02:05 +0000 (UTC) +Received: from lb3-smtp-cloud9.xs4all.net (lb3-smtp-cloud9.xs4all.net + [194.109.24.30]) + by lists.denx.de (Postfix) with ESMTPS id 88FC8C21C27 + for ; Sun, 30 Jun 2019 16:02:05 +0000 (UTC) +Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) + by smtp-cloud9.xs4all.net with ESMTP + id hcHChhlcYAOfNhcHEhina2; Sun, 30 Jun 2019 18:02:04 +0200 +From: Mark Kettenis +To: u-boot@lists.denx.de +Date: Sun, 30 Jun 2019 18:01:53 +0200 +Message-Id: <20190630160156.51934-2-kettenis@openbsd.org> +X-Mailer: git-send-email 2.21.0 +In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> +References: <20190630160156.51934-1-kettenis@openbsd.org> +MIME-Version: 1.0 +X-CMAE-Envelope: MS4wfLmEqKVrnQUzr99m+sewry4ejdvlsajihZ5fdwiyysrW7rHASkwT0EpvsDOXqW6cF7dQRh9fkLtTaJfdf4G0dKtcZjzy8i16ml/DtpRuO9PJFqcz0gBT + 8elsIXsJQPTnECIi3VFXugCXTgv8xgf9nsYOGsNpMpAop2NQ0gD5nksNRwnypHXYRO0b9cbZq82nwtPShl36CmI5hfMTI+zBeEEVjesvYmW9K73GUT503U6P + N/ohWQ8Ta35iWY0w5Rz2gMrBId0UTcIU4s5vRIp+cNmXPjnu09qT22WLAZcTT1PwhNb672Tji0a2TUU/zZkfVKI/ZmTvN6utmGPOx9GkOXPYpNJw2jzpwKhq + aMYImgg7RpoqHrOttDtjtRD8sohh3w== +Cc: Mark Kettenis +Subject: [U-Boot] [PATCH v2 1/4] rockchip: clk: rk3399: handle clk_enable + requests for USB3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +The "simple" OF glue layer for the Designware USB3 core enables +all refernced clocks. These need to be need to be implemented +otherwise the driver fails to probe. A dummy implementation +that simply returns success is sufficient since the RK3399 comes +out of reset with all clock gates open. + +Signed-off-by: Mark Kettenis +--- + drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c +index 79007b8682..d9950c159b 100644 +--- a/drivers/clk/rockchip/clk_rk3399.c ++++ b/drivers/clk/rockchip/clk_rk3399.c +@@ -1080,6 +1080,18 @@ static int rk3399_clk_enable(struct clk *clk) + case PCLK_GMAC: + /* Required to successfully probe the Designware GMAC driver */ + return 0; ++ ++ case SCLK_USB3OTG0_REF: ++ case SCLK_USB3OTG1_REF: ++ case SCLK_USB3OTG0_SUSPEND: ++ case SCLK_USB3OTG1_SUSPEND: ++ case ACLK_USB3OTG0: ++ case ACLK_USB3OTG1: ++ case ACLK_USB3_RKSOC_AXI_PERF: ++ case ACLK_USB3: ++ case ACLK_USB3_GRF: ++ /* Required to successfully probe the Designware USB3 driver */ ++ return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + +From patchwork Sun Jun 30 16:01:54 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Mark Kettenis +X-Patchwork-Id: 1124933 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=openbsd.org +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45cFff0fKJz9sBp + for ; + Mon, 1 Jul 2019 02:03:37 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id B9E06C21E08; Sun, 30 Jun 2019 16:02:35 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 3FB43C21DE8; + Sun, 30 Jun 2019 16:02:08 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 6525AC21D56; Sun, 30 Jun 2019 16:02:06 +0000 (UTC) +Received: from lb3-smtp-cloud9.xs4all.net (lb3-smtp-cloud9.xs4all.net + [194.109.24.30]) + by lists.denx.de (Postfix) with ESMTPS id 1AF59C21C27 + for ; Sun, 30 Jun 2019 16:02:06 +0000 (UTC) +Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) + by smtp-cloud9.xs4all.net with ESMTP + id hcHChhlcYAOfNhcHFhinaO; Sun, 30 Jun 2019 18:02:06 +0200 +From: Mark Kettenis +To: u-boot@lists.denx.de +Date: Sun, 30 Jun 2019 18:01:54 +0200 +Message-Id: <20190630160156.51934-3-kettenis@openbsd.org> +X-Mailer: git-send-email 2.21.0 +In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> +References: <20190630160156.51934-1-kettenis@openbsd.org> +MIME-Version: 1.0 +X-CMAE-Envelope: MS4wfKRPj13LkDsqDLlh3dPjepDM22UaNHBR/NtZWFq6HmRoAycq/QLfscmB7RQ6Qr1EzV6RrTtOvCYZiuXKQbTJzDBJd2l/C/wPc01PHXZYBVSolpSIx7Ly + hMIN5wJInIHRjMUa8hqeaSNSBFz2GpCd4GNFk2Jv/DgHOiymkEftLBJQaPXPh0rdCGL8BGlEXKM1wseWX1aDf8efNApZ7outHAjzlrnS1hELt4c9zmfVQCMQ + lLQCSp7/S40oWg5OqC4X+ShBDOf9hrWZAHsoVInsS+diZkcnbIo7vT3N6zADrDcZoVO1I4NDa9c/YcVbLDdJv9yoHVHjFSNI3i0gBRMmnctZfmlWaYN0IrLC + 820zukHfOpaNEqKNAvPamCZLovpdOQ== +Cc: Mark Kettenis +Subject: [U-Boot] [PATCH v2 2/4] usb: dwc3-of-simple: Add support for RK3399 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Add compatible string for RK3399 and enable it by default on +Rockchip platforms with USB3 support. + +Signed-off-by: Mark Kettenis +Reviewed-by: Kever Yang +--- + drivers/usb/host/Kconfig | 1 + + drivers/usb/host/dwc3-of-simple.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index b1188bcbf5..ac68aa2d27 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -24,6 +24,7 @@ config USB_XHCI_DWC3 + config USB_XHCI_DWC3_OF_SIMPLE + bool "DesignWare USB3 DRD Generic OF Simple Glue Layer" + depends on DM_USB ++ default y if ARCH_ROCKCHIP + default y if DRA7XX + help + Support USB2/3 functionality in simple SoC integrations with +diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c +index b118997f6e..45df614b09 100644 +--- a/drivers/usb/host/dwc3-of-simple.c ++++ b/drivers/usb/host/dwc3-of-simple.c +@@ -92,6 +92,7 @@ static int dwc3_of_simple_remove(struct udevice *dev) + + static const struct udevice_id dwc3_of_simple_ids[] = { + { .compatible = "amlogic,meson-gxl-dwc3" }, ++ { .compatible = "rockchip,rk3399-dwc3" }, + { .compatible = "ti,dwc3" }, + { } + }; + +From patchwork Sun Jun 30 16:01:55 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Mark Kettenis +X-Patchwork-Id: 1124934 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=openbsd.org +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45cFg20RQ2z9sBp + for ; + Mon, 1 Jul 2019 02:03:57 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id BB0E3C21D8E; Sun, 30 Jun 2019 16:02:51 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id D894FC21DC1; + Sun, 30 Jun 2019 16:02:12 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 5461AC21C27; Sun, 30 Jun 2019 16:02:07 +0000 (UTC) +Received: from lb2-smtp-cloud9.xs4all.net (lb2-smtp-cloud9.xs4all.net + [194.109.24.26]) + by lists.denx.de (Postfix) with ESMTPS id 05FE4C21C27 + for ; Sun, 30 Jun 2019 16:02:07 +0000 (UTC) +Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) + by smtp-cloud9.xs4all.net with ESMTP + id hcHChhlcYAOfNhcHGhinal; Sun, 30 Jun 2019 18:02:07 +0200 +From: Mark Kettenis +To: u-boot@lists.denx.de +Date: Sun, 30 Jun 2019 18:01:55 +0200 +Message-Id: <20190630160156.51934-4-kettenis@openbsd.org> +X-Mailer: git-send-email 2.21.0 +In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> +References: <20190630160156.51934-1-kettenis@openbsd.org> +MIME-Version: 1.0 +X-CMAE-Envelope: MS4wfLs+8eVNa+4q5xvZxgD/7JFk5FDJvpyZbd3cSrXacdnFSq2kAy8QdBLQqG7pFgMwbbkh/zgisVHcqIrbLR4AS1bVVdY9OiI3glthx583ANub4fv/+FYG + p2vXmJ/g7+CCFcVSIOoJhY+thnwEIzY6/Azt309X5FXHFUhNyCIBYgwmeyfWokqW63nRuxAp4EwLljFsrFdd+RFtBY1nL3qyzpTszLkJg1yWdTar2dRe4svQ + oKXYd53kLhrnEWbesbCU0A2fpCT0KpWLXQGntr26HUrGujJxrdYRV4v9LX7FF4B1E5SuWpr3TmT0h9a7Z8CVprD6p5ZwpVLJ1GjFlgQGHB97Y1CKq2I0khV6 + JLYxojKfL1uhNq0F7gI/5ImOsua0rw== +Cc: Mark Kettenis +Subject: [U-Boot] [PATCH v2 3/4] usb: xhci-dwc3: Add USB2 PHY configuration +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Configure USB2 PHY register based on "phy_type" property and +handle all the quirks that are relevant for Rockchip RK3399 SoCs. + +Signed-off-by: Mark Kettenis +--- + drivers/usb/host/xhci-dwc3.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c +index 83b9f119e7..9e8cae7ae4 100644 +--- a/drivers/usb/host/xhci-dwc3.c ++++ b/drivers/usb/host/xhci-dwc3.c +@@ -118,6 +118,8 @@ static int xhci_dwc3_probe(struct udevice *dev) + struct dwc3 *dwc3_reg; + enum usb_dr_mode dr_mode; + struct xhci_dwc3_platdata *plat = dev_get_platdata(dev); ++ const char *phy; ++ u32 reg; + int ret; + + hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev)); +@@ -132,6 +134,24 @@ static int xhci_dwc3_probe(struct udevice *dev) + + dwc3_core_init(dwc3_reg); + ++ /* Set dwc3 usb2 phy config */ ++ reg = readl(&dwc3_reg->g_usb2phycfg[0]); ++ ++ phy = dev_read_string(dev, "phy_type"); ++ if (phy && strcmp(phy, "utmi_wide") == 0) { ++ reg |= DWC3_GUSB2PHYCFG_PHYIF; ++ reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; ++ reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT; ++ } ++ ++ if (dev_read_bool(dev, "snps,dis_enblslpm-quirk")) ++ reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; ++ ++ if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk")) ++ reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; ++ ++ writel(reg, &dwc3_reg->g_usb2phycfg[0]); ++ + dr_mode = usb_get_dr_mode(dev_of_offset(dev)); + if (dr_mode == USB_DR_MODE_UNKNOWN) + /* by default set dual role mode to HOST */ + +From patchwork Sun Jun 30 16:01:56 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Mark Kettenis +X-Patchwork-Id: 1124935 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none 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barber.sibelius.xs4all.nl ([83.163.83.176]) + by smtp-cloud9.xs4all.net with ESMTP + id hcHChhlcYAOfNhcHHhinbC; Sun, 30 Jun 2019 18:02:08 +0200 +From: Mark Kettenis +To: u-boot@lists.denx.de +Date: Sun, 30 Jun 2019 18:01:56 +0200 +Message-Id: <20190630160156.51934-5-kettenis@openbsd.org> +X-Mailer: git-send-email 2.21.0 +In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> +References: <20190630160156.51934-1-kettenis@openbsd.org> +MIME-Version: 1.0 +X-CMAE-Envelope: MS4wfJt9aWnppnn1FrjUcIi+mVdSRXltWTpfX80VJftNdkow/RTDLd6RZhxL11k74NYLPOqe/UXQb2nIzkxqBuBVF3W1CvkWIgzYeNmbJTAbSmMsNnS491Uk + prEsRguT84I6QPh+YWtHv2yd9XN9NF5OkpHj05XsG0kmkXk0lLv42fxlsheATPb7hRo4UrN94niQPmKEWbW7fbHZgiIpp3W8JZ9ei3TLOx+t1TdA6uz3mFki + Xbwobdnaw3EpuVLHgTbKQWpdVl1n3+c2VK61rlNusZ+c8+ofBbSsiA3rybSGzm2gOBWDQiMrw05hTuZs2lluyqocc/i5dK+ODagwBGwH7IIgKBq2qMaKA6Sl + ymPOVIvlveSrgV/bugKVyUGhkerl7A== +Cc: Mark Kettenis +Subject: [U-Boot] [PATCH v2 4/4] rockchip: xhci: Remove RK3399 support +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Remove RK3399 compatible strings as this driver is no longer +used on that SoC. + +Signed-off-by: Mark Kettenis +Reviewed-by: Kever Yang +--- + drivers/usb/host/xhci-rockchip.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c +index f19bea3a91..e7b0dbcca5 100644 +--- a/drivers/usb/host/xhci-rockchip.c ++++ b/drivers/usb/host/xhci-rockchip.c +@@ -167,7 +167,6 @@ static int xhci_usb_remove(struct udevice *dev) + } + + static const struct udevice_id xhci_usb_ids[] = { +- { .compatible = "rockchip,rk3399-xhci" }, + { .compatible = "rockchip,rk3328-xhci" }, + { } + }; +@@ -187,7 +186,6 @@ U_BOOT_DRIVER(usb_xhci) = { + }; + + static const struct udevice_id usb_phy_ids[] = { +- { .compatible = "rockchip,rk3399-usb3-phy" }, + { .compatible = "rockchip,rk3328-usb3-phy" }, + { } + }; diff --git a/rockchip-rock960.patch b/rockchip-rock960.patch new file mode 100644 index 0000000..513e144 --- /dev/null +++ b/rockchip-rock960.patch @@ -0,0 +1,799 @@ +From 15c14b923f29dc69d51964e63f4ed35a7ffcd97f Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 28 Jun 2019 14:09:02 +0100 +Subject: [PATCH 1/6] arm64: rockchip: rock960: sync dts files from Linux + 5.2-rc6 + +Sync the dts files for the Rock960 boards from Linux to get the +latest changes and fixes for the devices. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-ficus.dts | 92 ++++++++++++- + arch/arm/dts/rk3399-rock960.dts | 91 +++++++++++- + arch/arm/dts/rk3399-rock960.dtsi | 229 +++++++++++++++++++++++++------ + 3 files changed, 366 insertions(+), 46 deletions(-) + +diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts +index 4b2dd82b67..6b059bd7a0 100644 +--- a/arch/arm/dts/rk3399-ficus.dts ++++ b/arch/arm/dts/rk3399-ficus.dts +@@ -23,6 +23,52 @@ + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, ++ <&user_led4>, <&wlan_led>, <&bt_led>; ++ ++ user_led1 { ++ label = "red:user1"; ++ gpios = <&gpio4 25 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ user_led2 { ++ label = "red:user2"; ++ gpios = <&gpio4 26 0>; ++ linux,default-trigger = "mmc0"; ++ }; ++ ++ user_led3 { ++ label = "red:user3"; ++ gpios = <&gpio4 30 0>; ++ linux,default-trigger = "mmc1"; ++ }; ++ ++ user_led4 { ++ label = "red:user4"; ++ gpios = <&gpio1 0 0>; ++ panic-indicator; ++ linux,default-trigger = "none"; ++ }; ++ ++ wlan_active_led { ++ label = "red:wlan"; ++ gpios = <&gpio1 1 0>; ++ linux,default-trigger = "phy0tx"; ++ default-state = "off"; ++ }; ++ ++ bt_active_led { ++ label = "red:bt"; ++ gpios = <&gpio1 4 0>; ++ linux,default-trigger = "hci0-power"; ++ default-state = "off"; ++ }; ++ }; + }; + + &gmac { +@@ -49,23 +95,63 @@ + gmac { + rgmii_sleep_pins: rgmii-sleep-pins { + rockchip,pins = +- <3 15 RK_FUNC_GPIO &pcfg_output_low>; ++ <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + pcie { + pcie_drv: pcie-drv { + rockchip,pins = +- <1 24 RK_FUNC_GPIO &pcfg_pull_none>; ++ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb2 { + host_vbus_drv: host-vbus-drv { + rockchip,pins = +- <4 27 RK_FUNC_GPIO &pcfg_pull_none>; ++ <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; ++ ++ leds { ++ user_led1: user_led1 { ++ rockchip,pins = ++ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led2: user_led2 { ++ rockchip,pins = ++ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led3: user_led3 { ++ rockchip,pins = ++ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led4: user_led4 { ++ rockchip,pins = ++ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wlan_led: wlan_led { ++ rockchip,pins = ++ <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_led: bt_led { ++ rockchip,pins = ++ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "host"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; + }; + + &vcc3v3_pcie { +diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts +index 7e06bc97e5..12285c51cc 100644 +--- a/arch/arm/dts/rk3399-rock960.dts ++++ b/arch/arm/dts/rk3399-rock960.dts +@@ -1,6 +1,6 @@ +-// SPDX-License-Identifier: GPL-2.0+ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + /* +- * Copyright (C) 2018 Manivannan Sadhasivam ++ * Copyright (c) 2018 Linaro Ltd. + */ + + /dts-v1/; +@@ -13,6 +13,53 @@ + chosen { + stdout-path = "serial2:1500000n8"; + }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, ++ <&user_led4>, <&wlan_led>, <&bt_led>; ++ ++ user_led1 { ++ label = "green:user1"; ++ gpios = <&gpio4 RK_PC2 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ user_led2 { ++ label = "green:user2"; ++ gpios = <&gpio4 RK_PC6 0>; ++ linux,default-trigger = "mmc0"; ++ }; ++ ++ user_led3 { ++ label = "green:user3"; ++ gpios = <&gpio4 RK_PD0 0>; ++ linux,default-trigger = "mmc1"; ++ }; ++ ++ user_led4 { ++ label = "green:user4"; ++ gpios = <&gpio4 RK_PD4 0>; ++ panic-indicator; ++ linux,default-trigger = "none"; ++ }; ++ ++ wlan_active_led { ++ label = "yellow:wlan"; ++ gpios = <&gpio4 RK_PD5 0>; ++ linux,default-trigger = "phy0tx"; ++ default-state = "off"; ++ }; ++ ++ bt_active_led { ++ label = "blue:bt"; ++ gpios = <&gpio4 RK_PD6 0>; ++ linux,default-trigger = "hci0-power"; ++ default-state = "off"; ++ }; ++ }; ++ + }; + + &pcie0 { +@@ -20,6 +67,38 @@ + }; + + &pinctrl { ++ leds { ++ user_led1: user_led1 { ++ rockchip,pins = ++ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led2: user_led2 { ++ rockchip,pins = ++ <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led3: user_led3 { ++ rockchip,pins = ++ <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ user_led4: user_led4 { ++ rockchip,pins = ++ <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wlan_led: wlan_led { ++ rockchip,pins = ++ <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_led: bt_led { ++ rockchip,pins = ++ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + pcie { + pcie_drv: pcie-drv { + rockchip,pins = +@@ -35,6 +114,14 @@ + }; + }; + ++&usbdrd_dwc3_0 { ++ dr_mode = "otg"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++}; ++ + &vcc3v3_pcie { + gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; + }; +diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi +index 51644d6d02..c7d48d41e1 100644 +--- a/arch/arm/dts/rk3399-rock960.dtsi ++++ b/arch/arm/dts/rk3399-rock960.dtsi +@@ -1,13 +1,32 @@ +-// SPDX-License-Identifier: GPL-2.0+ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + /* ++ * Copyright (c) 2018 Collabora Ltd. ++ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2018 Linaro Ltd. + */ + +-#include +-#include + #include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" + + / { ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc12v_dcin: vcc12v-dcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ + vcc1v8_s0: vcc1v8-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s0"; +@@ -16,12 +35,13 @@ + regulator-always-on; + }; + +- vcc_sys: vcc-sys { ++ vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; +- regulator-name = "vcc_sys"; ++ regulator-name = "vcc5v0_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; ++ vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_sys: vcc3v3-sys { +@@ -30,7 +50,7 @@ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { +@@ -54,20 +74,8 @@ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; +- vin-supply = <&vcc_sys>; +- }; +- +- vdd_log: vdd-log { +- compatible = "pwm-regulator"; +- pwms = <&pwm2 0 25000 0>; +- regulator-name = "vdd_log"; +- regulator-min-microvolt = <800000>; +- regulator-max-microvolt = <1400000>; +- regulator-always-on; +- regulator-boot-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc5v0_sys>; + }; +- + }; + + &cpu_l0 { +@@ -98,7 +106,19 @@ + status = "okay"; + }; + ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ + &hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec>; ++ status = "okay"; ++}; ++ ++&hdmi_sound { + status = "okay"; + }; + +@@ -118,7 +138,7 @@ + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc5v0_sys>; + status = "okay"; + + regulator-state-mem { +@@ -136,7 +156,7 @@ + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc5v0_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; +@@ -154,16 +174,16 @@ + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + +- vcc1-supply = <&vcc_sys>; +- vcc2-supply = <&vcc_sys>; +- vcc3-supply = <&vcc_sys>; +- vcc4-supply = <&vcc_sys>; +- vcc6-supply = <&vcc_sys>; +- vcc7-supply = <&vcc_sys>; ++ vcc1-supply = <&vcc5v0_sys>; ++ vcc2-supply = <&vcc5v0_sys>; ++ vcc3-supply = <&vcc5v0_sys>; ++ vcc4-supply = <&vcc5v0_sys>; ++ vcc6-supply = <&vcc5v0_sys>; ++ vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; +- vcc9-supply = <&vcc_sys>; +- vcc10-supply = <&vcc_sys>; +- vcc11-supply = <&vcc_sys>; ++ vcc9-supply = <&vcc5v0_sys>; ++ vcc10-supply = <&vcc5v0_sys>; ++ vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + +@@ -344,6 +364,10 @@ + status = "okay"; + }; + ++&i2s2 { ++ status = "okay"; ++}; ++ + &io_domains { + bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ + audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ +@@ -370,45 +394,92 @@ + }; + + &pinctrl { ++ bt { ++ bt_enable_h: bt-enable-h { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_l: bt-host-wake-l { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_wake_l: bt-wake-l { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + sdmmc { + sdmmc_bus1: sdmmc-bus1 { + rockchip,pins = +- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ <4 RK_PB0 1 &pcfg_pull_up_8ma>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = +- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ <4 RK_PB0 1 &pcfg_pull_up_8ma>, ++ <4 RK_PB1 1 &pcfg_pull_up_8ma>, ++ <4 RK_PB2 1 &pcfg_pull_up_8ma>, ++ <4 RK_PB3 1 &pcfg_pull_up_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = +- <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ <4 RK_PB4 1 &pcfg_pull_none_18ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = +- <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ <4 RK_PB5 1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ sdio0 { ++ sdio0_bus4: sdio0-bus4 { ++ rockchip,pins = ++ <2 RK_PC4 1 &pcfg_pull_up_20ma>, ++ <2 RK_PC5 1 &pcfg_pull_up_20ma>, ++ <2 RK_PC6 1 &pcfg_pull_up_20ma>, ++ <2 RK_PC7 1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_cmd: sdio0-cmd { ++ rockchip,pins = ++ <2 RK_PD0 1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_clk: sdio0-clk { ++ rockchip,pins = ++ <2 RK_PD1 1 &pcfg_pull_none_20ma>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = +- <1 21 RK_FUNC_GPIO &pcfg_pull_up>; ++ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = +- <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = +- <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = ++ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wifi { ++ wifi_host_wake_l: wifi-host-wake-l { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + }; +@@ -421,6 +492,32 @@ + status = "okay"; + }; + ++&sdio0 { ++ bus-width = <4>; ++ clock-frequency = <50000000>; ++ cap-sdio-irq; ++ cap-sd-highspeed; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ brcmf: wifi@1 { ++ compatible = "brcm,bcm4329-fmac"; ++ reg = <1>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ interrupt-names = "host-wake"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_l>; ++ }; ++}; ++ + &sdhci { + bus-width = <8>; + mmc-hs400-1_8v; +@@ -445,16 +542,42 @@ + status = "okay"; + }; + ++&tsadc { ++ rockchip,hw-tshut-mode = <1>; ++ rockchip,hw-tshut-polarity = <1>; ++ rockchip,hw-tshut-temp = <110000>; ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; +- pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; ++ }; + }; + + &uart2 { + status = "okay"; + }; + ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ + &u2phy0 { + status = "okay"; + }; +@@ -497,10 +620,34 @@ + status = "okay"; + }; + ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++}; ++ + &vopb { + status = "okay"; + }; + ++&vopb_mmu { ++ status = "okay"; ++}; ++ + &vopl { + status = "okay"; + }; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +-- +2.21.0 + +From 66584f08b1a1eb122d4796d6923ac317bdf3c8ca Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 29 Jun 2019 09:24:55 +0100 +Subject: [PATCH 2/6] configs: rockchip: rock960: drop options for non-existent + HW + +The Rock960 doesn't contain SPI flash so drop related config options. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 1958b7e190..1aa986e9cd 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -21,7 +21,6 @@ CONFIG_SYS_PROMPT="rock960 => " + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y +-CONFIG_CMD_SF=y + CONFIG_CMD_USB=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y +@@ -35,7 +34,6 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y +-CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y +-- +2.21.0 + +From d9f234f28a17adad9f4b08114965815516605271 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 29 Jun 2019 09:57:29 +0100 +Subject: [PATCH 3/6] configs: rockchip: rock960: enable pmic and regulator + commands + +We have both PMIC and Regulator functionality so it's useful to +be able to see output and debug with the commands enabled. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 1aa986e9cd..2381f0cd7e 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -21,6 +21,8 @@ CONFIG_SYS_PROMPT="rock960 => " + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y + CONFIG_CMD_USB=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y +-- +2.21.0 + +From 08cf06897ef382f4568568ea4210e41ed4ae19e2 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 29 Jun 2019 10:29:56 +0100 +Subject: [PATCH 4/6] configs: rockchip: rock960: enable DMA for SDHCI + controller + +Enable the SDMA controller so the eMMC connected to the SDHCI +controller (sdhci@fe330000) can make use of it. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 2381f0cd7e..20c9cdeda3 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -35,6 +35,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y +-- +2.21.0 + +From 1340f50ee63727804cf7634b3679fe4208c8576f Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 29 Jun 2019 10:43:01 +0100 +Subject: [PATCH 5/6] configs: rockchip: rock960: Add support for USB ethernet + adapters + +As the Rock960 doesn't have an onboard wired ethernet interface +it's useful to have some common USB wired ethernet devices added +to enable testing. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 20c9cdeda3..90115e903b 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -48,5 +48,12 @@ CONFIG_USB=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_DM_ETH=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y + CONFIG_USE_TINY_PRINTF=y + CONFIG_ERRNO_STR=y +-- +2.21.0 + +From 1bb09008d279c533f4fd76697aa396d63c10ed58 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 29 Jun 2019 18:34:57 +0100 +Subject: [PATCH 6/6] configs: rockchip: rock960: enable USB3 support + +Enable USB3 support via the dwc3 XHCI driver. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 90115e903b..5be36383e1 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -55,5 +55,8 @@ CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_MCS7830=y + CONFIG_USB_ETHER_RTL8152=y + CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++# CONFIG_USB_XHCI_ROCKCHIP is not set + CONFIG_USE_TINY_PRINTF=y + CONFIG_ERRNO_STR=y +-- +2.21.0 + diff --git a/sources b/sources index a94cd69..b68a826 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.07-rc4.tar.bz2) = 71aa6e2eb30a3abf136a4128fb8bf00c8b1b71d6bc35cc65daac058fd4dae135080e4683c092edefffc6c1ba227bf07b49721b889ddfa02e7872beb5ab5fe92f +SHA512 (u-boot-2019.07.tar.bz2) = 879abf0c8773bfcdcbe7f28fc68e2b4369bcb74e276d95d510a9b2d1707e63eb01d82e304ba5a6a570552bc18bc593f27ba9b518bafa1d8f8e5bc83cf107c023 diff --git a/tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch b/tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch deleted file mode 100644 index 20fa98d..0000000 --- a/tegra-TX-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 80dda7644f2691d599bc87a7a96645bda0305424 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 20 Mar 2019 09:29:49 +0000 -Subject: [PATCH] tegra: TX: Add CONFIG_EFI_LOADER_BOUNCE_BUFFER - -Signed-off-by: Peter Robinson ---- - configs/p2371-2180_defconfig | 1 + - configs/p2771-0000-000_defconfig | 1 + - configs/p2771-0000-500_defconfig | 1 + - configs/p3450-0000_defconfig | 1 + - 4 files changed, 4 insertions(+) - -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index b662ef1431..c1b87a8071 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index ad0802067e..799a06e454 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index 459b67fd19..6193cff822 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y - CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " -diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig -index 32c2b65a29..6da9daebe5 100644 ---- a/configs/p3450-0000_defconfig -+++ b/configs/p3450-0000_defconfig -@@ -7,6 +7,7 @@ CONFIG_TARGET_P3450_0000=y - CONFIG_NR_DRAM_BANKS=2 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_OF_BOARD_SETUP=y -+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " --- -2.20.1 - diff --git a/tegra186-jetson-tx2-disable-onboard-emmc.patch b/tegra186-jetson-tx2-disable-onboard-emmc.patch deleted file mode 100644 index d31a6df..0000000 --- a/tegra186-jetson-tx2-disable-onboard-emmc.patch +++ /dev/null @@ -1,52 +0,0 @@ -From dbe4dff86520a1373076563d1bee5ada1d7fd7c5 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 26 Apr 2018 16:56:54 +0100 -Subject: [PATCH] tegra186: jetson-tx2: disable onboard emmc - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/tegra186-p2771-0000.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/dts/tegra186-p2771-0000.dtsi b/arch/arm/dts/tegra186-p2771-0000.dtsi -index a1319dc493..e220f086ee 100644 ---- a/arch/arm/dts/tegra186-p2771-0000.dtsi -+++ b/arch/arm/dts/tegra186-p2771-0000.dtsi -@@ -53,7 +53,7 @@ - }; - - sdhci@3460000 { -- status = "okay"; -+ status = "disabled"; - bus-width = <8>; - non-removable; - }; --- -2.17.0 - -From 7bba3cc32c8b8b5d3688c42a803768761df0a23f Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 1 Aug 2018 11:47:56 +0100 -Subject: [PATCH] tegra210: Jetson TX1: disable onboard emmc - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/tegra210-p2371-2180.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts -index da4349bd039..87ce030e701 100644 ---- a/arch/arm/dts/tegra210-p2371-2180.dts -+++ b/arch/arm/dts/tegra210-p2371-2180.dts -@@ -80,7 +80,7 @@ - }; - - sdhci@700b0600 { -- status = "okay"; -+ status = "disabled"; - bus-width = <8>; - non-removable; - }; --- -2.17.1 - diff --git a/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch b/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch deleted file mode 100644 index 8415e8f..0000000 --- a/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch +++ /dev/null @@ -1,183 +0,0 @@ -From patchwork Tue Mar 19 11:19:21 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] ti: am335x_evm: Enable CONFIG_SPL_OF_CONTROL -X-Patchwork-Submitter: Tom Rini -X-Patchwork-Id: 1058350 -X-Patchwork-Delegate: trini@ti.com -Message-Id: <1552994361-32058-1-git-send-email-trini@konsulko.com> -To: u-boot@lists.denx.de -Date: Tue, 19 Mar 2019 07:19:21 -0400 -From: Tom Rini -List-Id: U-Boot discussion - -Enable support for SPL_OF_CONTROL on this platform. That means doing a -few things: -- Add u-boot,dm-pre-reloc to a number of nodes -- Drop static platdata in the board file. -- A lot of tweaks to the defconfig. We remove some things such as - SPL_USE_ARCH_MEMCPY/SET for space. Increase our malloc len. -- Drop, for now at least, USB SPL support as it's causing a hang. - -Cc: Faiz Abbas -Cc: Lokesh Vutla -Signed-off-by: Tom Rini ---- - arch/arm/dts/am335x-evm-u-boot.dtsi | 45 +++++++++++++++++++++++++++++++++++-- - board/ti/am335x/board.c | 30 ------------------------- - configs/am335x_evm_defconfig | 14 ++++++++---- - 3 files changed, 53 insertions(+), 36 deletions(-) - -diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi -index b6b97ed16d91..16a9f855ad1f 100644 ---- a/arch/arm/dts/am335x-evm-u-boot.dtsi -+++ b/arch/arm/dts/am335x-evm-u-boot.dtsi -@@ -3,11 +3,52 @@ - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ - */ - -+#include "am33xx-u-boot.dtsi" - --&mmc3 { -- status = "disabled"; -+&l4_wkup { -+ u-boot,dm-pre-reloc; -+}; -+ -+&scm { -+ u-boot,dm-pre-reloc; -+}; -+ -+&am33xx_pinmux { -+ u-boot,dm-pre-reloc; -+}; -+ -+&uart0_pins { -+ u-boot,dm-pre-reloc; -+}; -+ -+&uart0 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&gpio0 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&i2c0 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&i2c0_pins { -+ u-boot,dm-pre-reloc; - }; - - &usb0 { - dr_mode = "peripheral"; - }; -+ -+&mmc1 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&mmc1_pins { -+ u-boot,dm-pre-reloc; -+}; -+ -+&mmc3 { -+ status = "disabled"; -+}; -diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c -index d67f94ad47ba..bfad1a75a456 100644 ---- a/board/ti/am335x/board.c -+++ b/board/ti/am335x/board.c -@@ -1054,33 +1054,3 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) - secure_boot_verify_image(p_image, p_size); - } - #endif -- --#if !CONFIG_IS_ENABLED(OF_CONTROL) --static const struct omap_hsmmc_plat am335x_mmc0_platdata = { -- .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE, -- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT, -- .cfg.f_min = 400000, -- .cfg.f_max = 52000000, -- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, -- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, --}; -- --U_BOOT_DEVICE(am335x_mmc0) = { -- .name = "omap_hsmmc", -- .platdata = &am335x_mmc0_platdata, --}; -- --static const struct omap_hsmmc_plat am335x_mmc1_platdata = { -- .base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE, -- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT, -- .cfg.f_min = 400000, -- .cfg.f_max = 52000000, -- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, -- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, --}; -- --U_BOOT_DEVICE(am335x_mmc1) = { -- .name = "omap_hsmmc", -- .platdata = &am335x_mmc1_platdata, --}; --#endif -diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig -index 924116835251..dd690dcb495c 100644 ---- a/configs/am335x_evm_defconfig -+++ b/configs/am335x_evm_defconfig -@@ -1,23 +1,26 @@ - CONFIG_ARM=y -+# CONFIG_SPL_USE_ARCH_MEMCPY is not set -+# CONFIG_SPL_USE_ARCH_MEMSET is not set - CONFIG_ARCH_OMAP2PLUS=y - CONFIG_TI_COMMON_CMD_OPTIONS=y -+CONFIG_SYS_MALLOC_F_LEN=0x4000 - CONFIG_AM33XX=y -+CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 - CONFIG_SPL=y - CONFIG_DISTRO_DEFAULTS=y -+CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 - CONFIG_SPL_LOAD_FIT=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" -+CONFIG_LOGLEVEL=3 - CONFIG_SYS_CONSOLE_INFO_QUIET=y - CONFIG_VERSION_VARIABLE=y - CONFIG_ARCH_MISC_INIT=y - # CONFIG_SPL_FS_EXT4 is not set - CONFIG_SPL_MTD_SUPPORT=y --CONFIG_SPL_MUSB_NEW_SUPPORT=y - CONFIG_SPL_NET_SUPPORT=y - CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL" - CONFIG_SPL_OS_BOOT=y --CONFIG_SPL_USB_GADGET=y --CONFIG_SPL_USB_ETHER=y - CONFIG_CMD_SPL=y - CONFIG_CMD_SPL_NAND_OFS=0x00080000 - # CONFIG_CMD_FLASH is not set -@@ -28,10 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand.0" - CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)" - # CONFIG_SPL_EFI_PARTITION is not set - CONFIG_OF_CONTROL=y -+CONFIG_SPL_OF_CONTROL=y - CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" - CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2" -+CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --# CONFIG_BLK is not set -+CONFIG_SPL_OF_TRANSLATE=y - CONFIG_BOOTCOUNT_LIMIT=y - CONFIG_DFU_MMC=y - CONFIG_DFU_NAND=y -@@ -68,5 +73,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451 - CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 - CONFIG_USB_ETHER=y - CONFIG_DYNAMIC_CRC_TABLE=y -+CONFIG_SPL_TINY_MEMSET=y - CONFIG_RSA=y - CONFIG_LZO=y diff --git a/uboot-tools.spec b/uboot-tools.spec index 571528f..06c2634 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc4 Name: uboot-tools Version: 2019.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,7 +26,8 @@ Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch10: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch +Patch10: rockchip-rk3399-Fix-USB3-support.patch +Patch11: rockchip-rock960.patch BuildRequires: bc BuildRequires: dtc @@ -120,6 +121,11 @@ do echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi + rk3328=(rock64-rk3328) + if [[ " ${rk3328[*]} " == *" $board "* ]]; then + echo "Board: $board using rk3328" + cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ + fi rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" @@ -128,10 +134,8 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - rk33xx=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) - if [[ " ${rk33xx[*]} " == *" $board "* ]]; then - echo "Board: $board using rk33xx" - make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" u-boot.itb V=1 O=builds/$(echo $board)/ + if [[ " ${rk3399[*]} " == *" $board "* ]]; then + echo "Board: $board using rk3399" builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi @@ -259,6 +263,11 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jul 8 2019 Peter Robinson 2019.07-1 +- 2019.07 +- Enable Rock64 +- Rock960 enhancements + * Fri Jun 28 2019 Peter Robinson 2019.07-0.2-rc4 - Fix build with explicit python2 - Drop a couple of unused boards From 0b3a57d4744a5031115ac161b2680d5314b21b5d Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 27 Jul 2019 02:16:46 +0000 Subject: [PATCH 032/351] - Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 06c2634..3ce8149 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -263,6 +263,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Jul 27 2019 Fedora Release Engineering - 2019.07-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild + * Mon Jul 8 2019 Peter Robinson 2019.07-1 - 2019.07 - Enable Rock64 From f215defee6ed2b8d62bae9a7a34810aaccc4f0b6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 4 Aug 2019 20:35:49 +0100 Subject: [PATCH 033/351] Rock960 fix, Iniital Raspberry Pi 4 support --- Raspberry-Pi-32-64-support.patch | 1155 +++++++++++++++++ aarch64-boards | 1 + arm-boards | 1 + ...ble-booting-from-eMMC-when-using-SPL.patch | 262 ++++ uboot-tools.spec | 8 +- 5 files changed, 1426 insertions(+), 1 deletion(-) create mode 100644 Raspberry-Pi-32-64-support.patch create mode 100644 rock960-Enable-booting-from-eMMC-when-using-SPL.patch diff --git a/Raspberry-Pi-32-64-support.patch b/Raspberry-Pi-32-64-support.patch new file mode 100644 index 0000000..38a094f --- /dev/null +++ b/Raspberry-Pi-32-64-support.patch @@ -0,0 +1,1155 @@ +From patchwork Wed Jul 24 14:39:04 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136358 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyhH0gbgz9s8m + for ; + Thu, 25 Jul 2019 00:41:03 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 92844C21D9A; Wed, 24 Jul 2019 14:39:46 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 882B5C21D72; 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+ Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.33 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:04 +0100 +Message-Id: <20190724143911.29770-2-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 1/8] RPI: Add defconfigs for rpi4 (32/64) +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This defines a minimum defconfig for each of the two Raspberry Pi 4 +variants. One notable difference is that we don't have a embedded dt for +this board given that the fw supplies us with one which we can reuse. +Furthermore, the ram size is not queryable through mbox interface as the +maximum reported size is 1G. The fw patches the dt with the right +memory configuration and uboot uses it as it is. We avoid u-boot +touching this configuration by making sure CONFIG_ARCH_FIXUP_FDT_MEMORY +is deactivated. + +Signed-off-by: Andrei Gherzan +--- + configs/rpi_4_32b_defconfig | 33 +++++++++++++++++++++++++++++++++ + configs/rpi_4_defconfig | 33 +++++++++++++++++++++++++++++++++ + 2 files changed, 66 insertions(+) + create mode 100644 configs/rpi_4_32b_defconfig + create mode 100644 configs/rpi_4_defconfig + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +new file mode 100644 +index 0000000000..a31a617a5f +--- /dev/null ++++ b/configs/rpi_4_32b_defconfig +@@ -0,0 +1,33 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_BCM283X=y ++CONFIG_SYS_TEXT_BASE=0x00008000 ++CONFIG_TARGET_RPI_4_32B=y ++CONFIG_SYS_MALLOC_F_LEN=0x2000 ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_OF_BOARD=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_SYS_PROMPT="U-Boot> " ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_ENV_FAT_INTERFACE="mmc" ++CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++# CONFIG_REQUIRE_SERIAL_CONSOLE is not set ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_CONSOLE_SCROLL_LINES=10 ++CONFIG_PHYS_TO_BUS=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +new file mode 100644 +index 0000000000..da8c960a2a +--- /dev/null ++++ b/configs/rpi_4_defconfig +@@ -0,0 +1,33 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_BCM283X=y ++CONFIG_SYS_TEXT_BASE=0x00080000 ++CONFIG_TARGET_RPI_4=y ++CONFIG_SYS_MALLOC_F_LEN=0x2000 ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_OF_BOARD=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_SYS_PROMPT="U-Boot> " ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_ENV_FAT_INTERFACE="mmc" ++CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++# CONFIG_REQUIRE_SERIAL_CONSOLE is not set ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_CONSOLE_SCROLL_LINES=10 ++CONFIG_PHYS_TO_BUS=y ++CONFIG_OF_LIBFDT_OVERLAY=y + +From patchwork Wed Jul 24 14:39:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136357 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tygm6ldWz9s3l + for ; + Thu, 25 Jul 2019 00:40:36 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 9DA33C21CB6; Wed, 24 Jul 2019 14:39:59 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 17CAEC21D8E; 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+ Wed, 24 Jul 2019 07:39:35 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.34 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:05 +0100 +Message-Id: <20190724143911.29770-3-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 2/8] ARM: bcm283x: Add BCM283x_BASE define +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +From: Matthias Brugger + +Devices of bcm283x have different base address, depending if they are on +bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to +build and only add the offset in the header files. + +Signed-off-by: Matthias Brugger +Signed-off-by: Andrei Gherzan +--- + arch/arm/mach-bcm283x/Kconfig | 5 +++++ + arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- + 5 files changed, 9 insertions(+), 20 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 3eb5a9a897..8e69914a83 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -141,4 +141,9 @@ config SYS_SOC + config SYS_CONFIG_NAME + default "rpi" + ++config BCM283x_BASE ++ hex ++ default "0x20000000" if BCM2835 ++ default "0x3f000000" if BCM2836 || BCM2837 ++ + endmenu +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index e3a893e49c..e44c7577da 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -37,11 +37,7 @@ + + /* Raw mailbox HW */ + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_MBOX_PHYSADDR 0x3f00b880 +-#else +-#define BCM2835_MBOX_PHYSADDR 0x2000b880 +-#endif ++#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880) + + struct bcm2835_mbox_regs { + u32 read; +diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h +index 5cb6ec3340..b443c379d8 100644 +--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h ++++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_SDHCI_H_ + #define _BCM2835_SDHCI_H_ + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_SDHCI_BASE 0x3f300000 +-#else +-#define BCM2835_SDHCI_BASE 0x20300000 +-#endif ++#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000) + + int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); + +diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h +index 56b0c356bb..014355e759 100644 +--- a/arch/arm/mach-bcm283x/include/mach/timer.h ++++ b/arch/arm/mach-bcm283x/include/mach/timer.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_TIMER_H + #define _BCM2835_TIMER_H + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_TIMER_PHYSADDR 0x3f003000 +-#else +-#define BCM2835_TIMER_PHYSADDR 0x20003000 +-#endif ++#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000) + + #define BCM2835_TIMER_CS_M3 (1 << 3) + #define BCM2835_TIMER_CS_M2 (1 << 2) +diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h +index 99c88e5df7..8292b3cf1f 100644 +--- a/arch/arm/mach-bcm283x/include/mach/wdog.h ++++ b/arch/arm/mach-bcm283x/include/mach/wdog.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_WDOG_H + #define _BCM2835_WDOG_H + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_WDOG_PHYSADDR 0x3f100000 +-#else +-#define BCM2835_WDOG_PHYSADDR 0x20100000 +-#endif ++#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000) + + struct bcm2835_wdog_regs { + u32 unknown0[7]; + +From patchwork Wed Jul 24 14:39:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136372 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyl70FC2z9s3l + for ; + Thu, 25 Jul 2019 00:43:30 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id A8034C21DF3; Wed, 24 Jul 2019 14:40:46 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 4C777C21DCA; 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+ Wed, 24 Jul 2019 07:39:36 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.35 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:35 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:06 +0100 +Message-Id: <20190724143911.29770-4-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 3/8] ARM: bcm283x: Define configs for RaspberryPi 4 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Define two target configs for Raspberry Pi 4 (32 and 64bit) and the +corresponding BCM2838* configs. + +Be aware of the current limitation in firmware which requires an +explicit configuration to force the arm in 64bit mode when the +respective target is used. + +Signed-off-by: Andrei Gherzan +Signed-off-by: Matthias Brugger +--- + arch/arm/mach-bcm283x/Kconfig | 62 +++++++++++++++++++++++++++++++++++ + 1 file changed, 62 insertions(+) + +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 8e69914a83..09a5b42bbb 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -26,6 +26,23 @@ config BCM2837_64B + select BCM2837 + select ARM64 + ++config BCM2838 ++ bool "Broadcom BCM2838 SoC support" ++ depends on ARCH_BCM283X ++ ++config BCM2838_32B ++ bool "Broadcom BCM2838 SoC 32-bit support" ++ depends on ARCH_BCM283X ++ select BCM2838 ++ select ARMV7_LPAE ++ select CPU_V7A ++ ++config BCM2838_64B ++ bool "Broadcom BCM2838 SoC 64-bit support" ++ depends on ARCH_BCM283X ++ select BCM2838 ++ select ARM64 ++ + menu "Broadcom BCM283X family" + depends on ARCH_BCM283X + +@@ -127,6 +144,50 @@ config TARGET_RPI_3 + This option creates a build targeting the ARMv8/AArch64 ISA. + select BCM2837_64B + ++config TARGET_RPI_4_32B ++ bool "Raspberry Pi 4 32-bit build" ++ help ++ Support for all BCM2838-based Raspberry Pi variants, such as ++ the RPi 4 model B, in AArch32 (32-bit) mode. ++ ++ This option assumes the VideoCore firmware is configured to use the ++ mini UART (rather than PL011) for the serial console. This is the ++ default on the RPi 4. To enable the UART console, the following non- ++ default option must be present in config.txt: enable_uart=1. This is ++ required for U-Boot to operate correctly, even if you only care ++ about the HDMI/usbkbd console. ++ ++ Due to hardware incompatibilities, this can't be used with ++ BCM283/5/6/7. ++ ++ This option creates a build targeting the ARMv7/AArch32 ISA. ++ select BCM2838_32B ++ ++config TARGET_RPI_4 ++ bool "Raspberry Pi 4 64-bit build" ++ help ++ Support for all BCM2838-based Raspberry Pi variants, such as ++ the RPi 4 model B, in AArch64 (64-bit) mode. ++ ++ This option assumes the VideoCore firmware is configured to use the ++ mini UART (rather than PL011) for the serial console. This is the ++ default on the RPi 4. To enable the UART console, the following non- ++ default option must be present in config.txt: enable_uart=1. This is ++ required for U-Boot to operate correctly, even if you only care ++ about the HDMI/usbkbd console. ++ ++ Due to hardware incompatibilities, this can't be used with ++ BCM283/5/6/7. ++ ++ Also, due to a bug in firmware, switching to 64bit mode doesn't ++ happen automatically based on the kernel's image filename. See ++ https://github.com/raspberrypi/firmware/issues/1193 for more details. ++ Until that is resolved, the configuration (config.txt) needs to ++ explicitly set: arm_64bit=1. ++ ++ This option creates a build targeting the ARMv8/AArch64 ISA. ++ select BCM2838_64B ++ + endchoice + + config SYS_BOARD +@@ -145,5 +206,6 @@ config BCM283x_BASE + hex + default "0x20000000" if BCM2835 + default "0x3f000000" if BCM2836 || BCM2837 ++ default "0xfe000000" if BCM2838 + + endmenu + +From patchwork Wed Jul 24 14:39:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136366 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyjX1rBvz9s3l + for ; + Thu, 25 Jul 2019 00:42:08 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id F1D99C21CB6; Wed, 24 Jul 2019 14:40:11 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 937A0C21D65; + Wed, 24 Jul 2019 14:39:51 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 748BCC21C2F; Wed, 24 Jul 2019 14:39:40 +0000 (UTC) +Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com + [209.85.128.68]) + by lists.denx.de (Postfix) with ESMTPS id CE175C21C29 + for ; Wed, 24 Jul 2019 14:39:37 +0000 (UTC) +Received: by mail-wm1-f68.google.com with SMTP id a15so42072601wmj.5 + for ; Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to + :references:mime-version:content-transfer-encoding; + bh=u/X0NAp+r55Bugx2HDgeaVfXBeYCSiyWcV7zL0w2yXE=; + b=meBOAW1SzAbuPxzp+nYt716FpccdfeH1Xh3xWr+zMzkGW0O6P+hkYAjOsYmnzj/5rX + WNazbP1wNvSVBowPChoHa1zwn2I8PhxW9EDSfNkECgfLCYdPettoGRQ94zsUSZAkp4dD + FJkwXFsPDQX4UoFpLxN7fhbkYqdcezpK7kv2ijiYnQR9z/RfadD4yVQHLYt+M6UsmWph + FjXmBWf8Dqj0HniyCpAFBQclBp2LF6Cf3teLv0SKjJfkyJnfnB2D26Sig1t5Z1JIRw8h + +2J1FXpChqug7KpnKuQNHWz1P/yhSY/b+dPHkLABO1yCQ9N5+IvUCw+KXXd8o3RtpwuS + UnjA== +X-Gm-Message-State: APjAAAULyjSTt+VemoBBXMausXImPmWbP6ymxMkyPmdzjRXNS/pvDSjw + SvFvIJXwqw2UxgfJbVQsZf3L04kE +X-Google-Smtp-Source: APXvYqwDVdWVyjv8DnkgBTqEwcrcxXXF1Xof6TjgZnG7RMtXzWC3l2a8f4Awp1bVLNcspHnduMBWqg== +X-Received: by 2002:a1c:a909:: with SMTP id s9mr74064408wme.20.1563979177108; + Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.36 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:36 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:07 +0100 +Message-Id: <20190724143911.29770-5-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 4/8] RPI: Add entry for Raspberry Pi 4 model B +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +The Raspebrry Pi 4 uses the new revision code scheme as documented by +the foundation. This change adds an entry for this board as well. + +Signed-off-by: Andrei Gherzan +--- + board/raspberrypi/rpi/rpi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 617c892dde..6d6f1ef39a 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2837-rpi-cm3.dtb", + false, + }, ++ [0x11] = { ++ "4 Model B", ++ DTB_DIR "bcm2711-rpi-4-b.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { + +From patchwork Wed Jul 24 14:39:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136373 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.37 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:08 +0100 +Message-Id: <20190724143911.29770-6-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 5/8] ARM: bcm283x: Include definition for + additional emmc clock +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This clock has a different mbox ID so have this included in the relevant +header file. + +Signed-off-by: Andrei Gherzan +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index e44c7577da..f2a98acddd 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -230,6 +230,7 @@ struct bcm2835_mbox_tag_set_power_state { + #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 + #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 + #define BCM2835_MBOX_CLOCK_ID_PWM 10 ++#define BCM2835_MBOX_CLOCK_ID_EMMC2 12 + + struct bcm2835_mbox_tag_get_clock_rate { + struct bcm2835_mbox_tag_hdr tag_hdr; + +From patchwork Wed Jul 24 14:39:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136365 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyjV5JXbz9sBF + for ; + Thu, 25 Jul 2019 00:42:06 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 77213C21C27; Wed, 24 Jul 2019 14:40:36 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A24EDC21DB5; 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+ Wed, 24 Jul 2019 07:39:39 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.38 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:38 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:09 +0100 +Message-Id: <20190724143911.29770-7-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 6/8] mmc: bcm283x: Add support for bcm2711 + device in bcm2835_sdhci +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +From: Matthias Brugger + +The bcm2711 has two emmc controllers. The difference is the clocks +they use. Add support for the second emmc controller. + +Signed-off-by: Matthias Brugger +Signed-off-by: Andrei Gherzan +--- + drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c +index 08bddd410e..e68dec3be7 100644 +--- a/drivers/mmc/bcm2835_sdhci.c ++++ b/drivers/mmc/bcm2835_sdhci.c +@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + fdt_addr_t base; + int emmc_freq; + int ret; ++ int clock_id = (int)dev_get_driver_data(dev); + + base = devfdt_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + +- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); ++ ret = bcm2835_get_mmc_clock(clock_id); + if (ret < 0) { + debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); + return ret; +@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + } + + static const struct udevice_id bcm2835_sdhci_match[] = { +- { .compatible = "brcm,bcm2835-sdhci" }, ++ { ++ .compatible = "brcm,bcm2835-sdhci", ++ .data = BCM2835_MBOX_CLOCK_ID_EMMC ++ }, ++ { ++ .compatible = "brcm,bcm2711-emmc2", ++ .data = BCM2835_MBOX_CLOCK_ID_EMMC2 ++ }, + { /* sentinel */ } + }; + + +From patchwork Wed Jul 24 14:39:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136369 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyk04V3zz9s3l + for ; + Thu, 25 Jul 2019 00:42:32 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 47E81C21DD3; Wed, 24 Jul 2019 14:41:08 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A7B62C21C93; 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+ Wed, 24 Jul 2019 07:39:39 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.39 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:39 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:10 +0100 +Message-Id: <20190724143911.29770-8-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 7/8] RPI: Add memory map for bcm2838 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Define the memory map for the BCM2838 based on the dt configuration +available in the Raspberry Pi kernel fork. + +Signed-off-by: Andrei Gherzan +--- + board/raspberrypi/rpi/rpi.c | 27 ++++++++++++++++++++++++--- + 1 file changed, 24 insertions(+), 3 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 6d6f1ef39a..1c4fae9166 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -249,7 +249,8 @@ static uint32_t rev_type; + static const struct rpi_model *model; + + #ifdef CONFIG_ARM64 +-static struct mm_region bcm2837_mem_map[] = { ++#ifndef CONFIG_BCM2838 ++static struct mm_region bcm283x_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -268,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = { + 0, + } + }; +- +-struct mm_region *mem_map = bcm2837_mem_map; ++#else ++static struct mm_region bcm283x_mem_map[] = { ++ { ++ .virt = 0x00000000UL, ++ .phys = 0x00000000UL, ++ .size = 0xfe000000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | ++ PTE_BLOCK_INNER_SHARE ++ }, { ++ .virt = 0xfe000000UL, ++ .phys = 0xfe000000UL, ++ .size = 0x01800000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { ++ /* List terminator */ ++ 0, ++ } ++}; ++#endif ++struct mm_region *mem_map = bcm283x_mem_map; + #endif + + int dram_init(void) + +From patchwork Wed Jul 24 14:39:11 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136370 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Manivannan Sadhasivam +X-Patchwork-Id: 1138381 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=linaro.org header.i=@linaro.org + header.b="WyWxUYr0"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45y1NM4Q0Qz9sBt + for ; + Mon, 29 Jul 2019 23:52:51 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 3FE81C21DCA; Mon, 29 Jul 2019 13:52:48 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL, + T_DKIM_INVALID autolearn=unavailable autolearn_force=no + version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 744C2C21D56; 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+ Mon, 29 Jul 2019 06:52:41 -0700 (PDT) +From: Manivannan Sadhasivam +To: kever.yang@rock-chips.com, + philipp.tomsich@theobroma-systems.com +Date: Mon, 29 Jul 2019 19:22:27 +0530 +Message-Id: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> +X-Mailer: git-send-email 2.17.1 +Cc: sahaj.sarup@linaro.org, u-boot@lists.denx.de, + Manivannan Sadhasivam +Subject: [U-Boot] [PATCH v2 1/2] arm: dts: rock960: Enable booting from eMMC + when using SPL +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +MIME-Version: 1.0 +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This commits enables booting from eMMC when using SPL on 96Boards +Rock960 board by adding SDHCI to boot order. Since the SDHCI driver +already has the reloc flag, this works straightaway. While we are at it, +let's also include the common u-boot dtsi for rk3399. + +Signed-off-by: Manivannan Sadhasivam +--- + +Changes in v2: + +* Moved the change to -u-boot.dtsi as spotted by Peter. + + arch/arm/dts/rk3399-rock960-u-boot.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +index 5256f6d3f2..4850debdf0 100644 +--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +@@ -3,4 +3,11 @@ + * Copyright (C) 2019 Jagan Teki + */ + ++#include "rk3399-u-boot.dtsi" + #include "rk3399-sdram-lpddr3-2GB-1600.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = &sdhci, &sdmmc; ++ }; ++}; + +From patchwork Mon Jul 29 13:52:28 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Manivannan Sadhasivam +X-Patchwork-Id: 1138382 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Mon, 29 Jul 2019 06:52:46 -0700 (PDT) +From: Manivannan Sadhasivam +To: kever.yang@rock-chips.com, + philipp.tomsich@theobroma-systems.com +Date: Mon, 29 Jul 2019 19:22:28 +0530 +Message-Id: <20190729135228.2878-2-manivannan.sadhasivam@linaro.org> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> +References: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> +Cc: sahaj.sarup@linaro.org, u-boot@lists.denx.de, + Manivannan Sadhasivam +Subject: [U-Boot] [PATCH v2 2/2] arm: dts: ficus: Enable booting from eMMC + when using SPL +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +MIME-Version: 1.0 +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This commits enables booting from eMMC when using SPL on 96Boards +Ficus board by adding SDHCI to boot order. Since the SDHCI driver +already has the reloc flag, this works straightaway. While we are at it, +let's also include the common u-boot dtsi for rk3399. + +Signed-off-by: Manivannan Sadhasivam +--- + +Changes in v2: + +* Moved the change to -u-boot.dtsi as spotted by Peter. + + arch/arm/dts/rk3399-ficus-u-boot.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi b/arch/arm/dts/rk3399-ficus-u-boot.dtsi +index eab86bdb30..f3f7aa7c45 100644 +--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi +@@ -3,4 +3,11 @@ + * Copyright (C) 2019 Jagan Teki + */ + ++#include "rk3399-u-boot.dtsi" + #include "rk3399-sdram-ddr3-1600.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = &sdhci, &sdmmc; ++ }; ++}; diff --git a/uboot-tools.spec b/uboot-tools.spec index 3ce8149..226bbb6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.07 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,6 +28,8 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch10: rockchip-rk3399-Fix-USB3-support.patch Patch11: rockchip-rock960.patch +Patch12: rock960-Enable-booting-from-eMMC-when-using-SPL.patch +Patch13: Raspberry-Pi-32-64-support.patch BuildRequires: bc BuildRequires: dtc @@ -263,6 +265,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Aug 4 2019 Peter Robinson 2019.07-3 +- Fixes for Rock960 +- Iniital Raspberry Pi 4 support + * Sat Jul 27 2019 Fedora Release Engineering - 2019.07-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild From d1ce3181e98844a6a20f20090e61777a892e23f5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 4 Aug 2019 22:37:25 +0100 Subject: [PATCH 034/351] fix crash on rpi4 with no display --- Raspberry-Pi-32-64-support.patch | 37 ++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/Raspberry-Pi-32-64-support.patch b/Raspberry-Pi-32-64-support.patch index 38a094f..23566ae 100644 --- a/Raspberry-Pi-32-64-support.patch +++ b/Raspberry-Pi-32-64-support.patch @@ -1153,3 +1153,40 @@ index a63b76befc..68110e1963 100644 alias m68k uboot, alisonwang, angelo_ts alias coldfire m68k +From 970baf16d1322d3930a57fc78ddfb15d594d690c Mon Sep 17 00:00:00 2001 +From: Fabian Vogt +Date: Thu, 11 Jul 2019 16:56:24 +0200 +Subject: [PATCH] video: arm: rpi: Bail out early if querying video information + fails + +When probing we query for the width and hight of the display. If the +firmware does not report any connected display the system will crash. +See https://github.com/raspberrypi/firmware/issues/1157 for details. + +Signed-off-by: Fabian Vogt +[mb: update commit message] +Signed-off-by: Matthias Brugger +Reviewed-by: Andre Przywara +Tested-by: Andre Przywara + +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index bc41090aed..1d2eda084c 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -19,13 +19,15 @@ static int bcm2835_video_probe(struct udevice *dev) + + debug("bcm2835: Query resolution...\n"); + ret = bcm2835_get_video_size(&w, &h); +- if (ret) ++ if (ret || w == 0 || h == 0) + return -EIO; + + debug("bcm2835: Setting up display for %d x %d\n", w, h); + ret = bcm2835_set_video_params(&w, &h, 32, BCM2835_MBOX_PIXEL_ORDER_RGB, + BCM2835_MBOX_ALPHA_MODE_IGNORED, + &fb_base, &fb_size, &pitch); ++ if (ret) ++ return -EIO; + + debug("bcm2835: Final resolution is %d x %d\n", w, h); + From d66aef9a14461ffbadcdaae42fa35b01aff1c11a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 14 Aug 2019 11:06:09 +0100 Subject: [PATCH 035/351] 2019.10 RC2 --- Raspberry-Pi-32-64-support.patch | 1192 ----------------- ...ble-booting-from-eMMC-when-using-SPL.patch | 262 ---- rockchip-rk3399-Fix-USB3-support.patch | 415 ------ rockchip-rock960.patch | 799 ----------- sources | 2 +- uboot-tools.spec | 13 +- 6 files changed, 7 insertions(+), 2676 deletions(-) delete mode 100644 Raspberry-Pi-32-64-support.patch delete mode 100644 rock960-Enable-booting-from-eMMC-when-using-SPL.patch delete mode 100644 rockchip-rk3399-Fix-USB3-support.patch delete mode 100644 rockchip-rock960.patch diff --git a/Raspberry-Pi-32-64-support.patch b/Raspberry-Pi-32-64-support.patch deleted file mode 100644 index 23566ae..0000000 --- a/Raspberry-Pi-32-64-support.patch +++ /dev/null @@ -1,1192 +0,0 @@ -From patchwork Wed Jul 24 14:39:04 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136358 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyhH0gbgz9s8m - for ; - Thu, 25 Jul 2019 00:41:03 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 92844C21D9A; Wed, 24 Jul 2019 14:39:46 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no - autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 882B5C21D72; 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- Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.33 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:04 +0100 -Message-Id: <20190724143911.29770-2-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 1/8] RPI: Add defconfigs for rpi4 (32/64) -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This defines a minimum defconfig for each of the two Raspberry Pi 4 -variants. One notable difference is that we don't have a embedded dt for -this board given that the fw supplies us with one which we can reuse. -Furthermore, the ram size is not queryable through mbox interface as the -maximum reported size is 1G. The fw patches the dt with the right -memory configuration and uboot uses it as it is. We avoid u-boot -touching this configuration by making sure CONFIG_ARCH_FIXUP_FDT_MEMORY -is deactivated. - -Signed-off-by: Andrei Gherzan ---- - configs/rpi_4_32b_defconfig | 33 +++++++++++++++++++++++++++++++++ - configs/rpi_4_defconfig | 33 +++++++++++++++++++++++++++++++++ - 2 files changed, 66 insertions(+) - create mode 100644 configs/rpi_4_32b_defconfig - create mode 100644 configs/rpi_4_defconfig - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -new file mode 100644 -index 0000000000..a31a617a5f ---- /dev/null -+++ b/configs/rpi_4_32b_defconfig -@@ -0,0 +1,33 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00008000 -+CONFIG_TARGET_RPI_4_32B=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_OF_BOARD=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -new file mode 100644 -index 0000000000..da8c960a2a ---- /dev/null -+++ b/configs/rpi_4_defconfig -@@ -0,0 +1,33 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00080000 -+CONFIG_TARGET_RPI_4=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_OF_BOARD=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y - -From patchwork Wed Jul 24 14:39:05 2019 -Content-Type: text/plain; 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- Wed, 24 Jul 2019 07:39:35 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.34 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:05 +0100 -Message-Id: <20190724143911.29770-3-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 2/8] ARM: bcm283x: Add BCM283x_BASE define -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -From: Matthias Brugger - -Devices of bcm283x have different base address, depending if they are on -bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to -build and only add the offset in the header files. - -Signed-off-by: Matthias Brugger -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/Kconfig | 5 +++++ - arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- - 5 files changed, 9 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 3eb5a9a897..8e69914a83 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -141,4 +141,9 @@ config SYS_SOC - config SYS_CONFIG_NAME - default "rpi" - -+config BCM283x_BASE -+ hex -+ default "0x20000000" if BCM2835 -+ default "0x3f000000" if BCM2836 || BCM2837 -+ - endmenu -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index e3a893e49c..e44c7577da 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -37,11 +37,7 @@ - - /* Raw mailbox HW */ - --#ifndef CONFIG_BCM2835 --#define BCM2835_MBOX_PHYSADDR 0x3f00b880 --#else --#define BCM2835_MBOX_PHYSADDR 0x2000b880 --#endif -+#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880) - - struct bcm2835_mbox_regs { - u32 read; -diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h -index 5cb6ec3340..b443c379d8 100644 ---- a/arch/arm/mach-bcm283x/include/mach/sdhci.h -+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_SDHCI_H_ - #define _BCM2835_SDHCI_H_ - --#ifndef CONFIG_BCM2835 --#define BCM2835_SDHCI_BASE 0x3f300000 --#else --#define BCM2835_SDHCI_BASE 0x20300000 --#endif -+#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000) - - int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); - -diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h -index 56b0c356bb..014355e759 100644 ---- a/arch/arm/mach-bcm283x/include/mach/timer.h -+++ b/arch/arm/mach-bcm283x/include/mach/timer.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_TIMER_H - #define _BCM2835_TIMER_H - --#ifndef CONFIG_BCM2835 --#define BCM2835_TIMER_PHYSADDR 0x3f003000 --#else --#define BCM2835_TIMER_PHYSADDR 0x20003000 --#endif -+#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000) - - #define BCM2835_TIMER_CS_M3 (1 << 3) - #define BCM2835_TIMER_CS_M2 (1 << 2) -diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h -index 99c88e5df7..8292b3cf1f 100644 ---- a/arch/arm/mach-bcm283x/include/mach/wdog.h -+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_WDOG_H - #define _BCM2835_WDOG_H - --#ifndef CONFIG_BCM2835 --#define BCM2835_WDOG_PHYSADDR 0x3f100000 --#else --#define BCM2835_WDOG_PHYSADDR 0x20100000 --#endif -+#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000) - - struct bcm2835_wdog_regs { - u32 unknown0[7]; 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- Wed, 24 Jul 2019 07:39:36 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.35 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:35 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:06 +0100 -Message-Id: <20190724143911.29770-4-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 3/8] ARM: bcm283x: Define configs for RaspberryPi 4 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Define two target configs for Raspberry Pi 4 (32 and 64bit) and the -corresponding BCM2838* configs. - -Be aware of the current limitation in firmware which requires an -explicit configuration to force the arm in 64bit mode when the -respective target is used. - -Signed-off-by: Andrei Gherzan -Signed-off-by: Matthias Brugger ---- - arch/arm/mach-bcm283x/Kconfig | 62 +++++++++++++++++++++++++++++++++++ - 1 file changed, 62 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 8e69914a83..09a5b42bbb 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -26,6 +26,23 @@ config BCM2837_64B - select BCM2837 - select ARM64 - -+config BCM2838 -+ bool "Broadcom BCM2838 SoC support" -+ depends on ARCH_BCM283X -+ -+config BCM2838_32B -+ bool "Broadcom BCM2838 SoC 32-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARMV7_LPAE -+ select CPU_V7A -+ -+config BCM2838_64B -+ bool "Broadcom BCM2838 SoC 64-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARM64 -+ - menu "Broadcom BCM283X family" - depends on ARCH_BCM283X - -@@ -127,6 +144,50 @@ config TARGET_RPI_3 - This option creates a build targeting the ARMv8/AArch64 ISA. - select BCM2837_64B - -+config TARGET_RPI_4_32B -+ bool "Raspberry Pi 4 32-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch32 (32-bit) mode. -+ -+ This option assumes the VideoCore firmware is configured to use the -+ mini UART (rather than PL011) for the serial console. This is the -+ default on the RPi 4. To enable the UART console, the following non- -+ default option must be present in config.txt: enable_uart=1. This is -+ required for U-Boot to operate correctly, even if you only care -+ about the HDMI/usbkbd console. -+ -+ Due to hardware incompatibilities, this can't be used with -+ BCM283/5/6/7. -+ -+ This option creates a build targeting the ARMv7/AArch32 ISA. -+ select BCM2838_32B -+ -+config TARGET_RPI_4 -+ bool "Raspberry Pi 4 64-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch64 (64-bit) mode. -+ -+ This option assumes the VideoCore firmware is configured to use the -+ mini UART (rather than PL011) for the serial console. This is the -+ default on the RPi 4. To enable the UART console, the following non- -+ default option must be present in config.txt: enable_uart=1. This is -+ required for U-Boot to operate correctly, even if you only care -+ about the HDMI/usbkbd console. -+ -+ Due to hardware incompatibilities, this can't be used with -+ BCM283/5/6/7. -+ -+ Also, due to a bug in firmware, switching to 64bit mode doesn't -+ happen automatically based on the kernel's image filename. See -+ https://github.com/raspberrypi/firmware/issues/1193 for more details. -+ Until that is resolved, the configuration (config.txt) needs to -+ explicitly set: arm_64bit=1. -+ -+ This option creates a build targeting the ARMv8/AArch64 ISA. -+ select BCM2838_64B -+ - endchoice - - config SYS_BOARD -@@ -145,5 +206,6 @@ config BCM283x_BASE - hex - default "0x20000000" if BCM2835 - default "0x3f000000" if BCM2836 || BCM2837 -+ default "0xfe000000" if BCM2838 - - endmenu - -From patchwork Wed Jul 24 14:39:07 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136366 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyjX1rBvz9s3l - for ; - Thu, 25 Jul 2019 00:42:08 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id F1D99C21CB6; Wed, 24 Jul 2019 14:40:11 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 937A0C21D65; - Wed, 24 Jul 2019 14:39:51 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id 748BCC21C2F; Wed, 24 Jul 2019 14:39:40 +0000 (UTC) -Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com - [209.85.128.68]) - by lists.denx.de (Postfix) with ESMTPS id CE175C21C29 - for ; Wed, 24 Jul 2019 14:39:37 +0000 (UTC) -Received: by mail-wm1-f68.google.com with SMTP id a15so42072601wmj.5 - for ; Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=u/X0NAp+r55Bugx2HDgeaVfXBeYCSiyWcV7zL0w2yXE=; - b=meBOAW1SzAbuPxzp+nYt716FpccdfeH1Xh3xWr+zMzkGW0O6P+hkYAjOsYmnzj/5rX - WNazbP1wNvSVBowPChoHa1zwn2I8PhxW9EDSfNkECgfLCYdPettoGRQ94zsUSZAkp4dD - FJkwXFsPDQX4UoFpLxN7fhbkYqdcezpK7kv2ijiYnQR9z/RfadD4yVQHLYt+M6UsmWph - FjXmBWf8Dqj0HniyCpAFBQclBp2LF6Cf3teLv0SKjJfkyJnfnB2D26Sig1t5Z1JIRw8h - +2J1FXpChqug7KpnKuQNHWz1P/yhSY/b+dPHkLABO1yCQ9N5+IvUCw+KXXd8o3RtpwuS - UnjA== -X-Gm-Message-State: APjAAAULyjSTt+VemoBBXMausXImPmWbP6ymxMkyPmdzjRXNS/pvDSjw - SvFvIJXwqw2UxgfJbVQsZf3L04kE -X-Google-Smtp-Source: APXvYqwDVdWVyjv8DnkgBTqEwcrcxXXF1Xof6TjgZnG7RMtXzWC3l2a8f4Awp1bVLNcspHnduMBWqg== -X-Received: by 2002:a1c:a909:: with SMTP id s9mr74064408wme.20.1563979177108; - Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.36 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:36 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:07 +0100 -Message-Id: <20190724143911.29770-5-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 4/8] RPI: Add entry for Raspberry Pi 4 model B -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -The Raspebrry Pi 4 uses the new revision code scheme as documented by -the foundation. This change adds an entry for this board as well. - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 617c892dde..6d6f1ef39a 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2837-rpi-cm3.dtb", - false, - }, -+ [0x11] = { -+ "4 Model B", -+ DTB_DIR "bcm2711-rpi-4-b.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { - -From patchwork Wed Jul 24 14:39:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136373 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.37 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:08 +0100 -Message-Id: <20190724143911.29770-6-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 5/8] ARM: bcm283x: Include definition for - additional emmc clock -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This clock has a different mbox ID so have this included in the relevant -header file. - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index e44c7577da..f2a98acddd 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -230,6 +230,7 @@ struct bcm2835_mbox_tag_set_power_state { - #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 - #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 - #define BCM2835_MBOX_CLOCK_ID_PWM 10 -+#define BCM2835_MBOX_CLOCK_ID_EMMC2 12 - - struct bcm2835_mbox_tag_get_clock_rate { - struct bcm2835_mbox_tag_hdr tag_hdr; - -From patchwork Wed Jul 24 14:39:09 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136365 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyjV5JXbz9sBF - for ; - Thu, 25 Jul 2019 00:42:06 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 77213C21C27; Wed, 24 Jul 2019 14:40:36 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A24EDC21DB5; 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- Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.38 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:38 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:09 +0100 -Message-Id: <20190724143911.29770-7-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 6/8] mmc: bcm283x: Add support for bcm2711 - device in bcm2835_sdhci -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -From: Matthias Brugger - -The bcm2711 has two emmc controllers. The difference is the clocks -they use. Add support for the second emmc controller. - -Signed-off-by: Matthias Brugger -Signed-off-by: Andrei Gherzan ---- - drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c -index 08bddd410e..e68dec3be7 100644 ---- a/drivers/mmc/bcm2835_sdhci.c -+++ b/drivers/mmc/bcm2835_sdhci.c -@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - fdt_addr_t base; - int emmc_freq; - int ret; -+ int clock_id = (int)dev_get_driver_data(dev); - - base = devfdt_get_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - -- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); -+ ret = bcm2835_get_mmc_clock(clock_id); - if (ret < 0) { - debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); - return ret; -@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - } - - static const struct udevice_id bcm2835_sdhci_match[] = { -- { .compatible = "brcm,bcm2835-sdhci" }, -+ { -+ .compatible = "brcm,bcm2835-sdhci", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC -+ }, -+ { -+ .compatible = "brcm,bcm2711-emmc2", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC2 -+ }, - { /* sentinel */ } - }; - - -From patchwork Wed Jul 24 14:39:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136369 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyk04V3zz9s3l - for ; - Thu, 25 Jul 2019 00:42:32 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 47E81C21DD3; Wed, 24 Jul 2019 14:41:08 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A7B62C21C93; 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- Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.39 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:10 +0100 -Message-Id: <20190724143911.29770-8-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 7/8] RPI: Add memory map for bcm2838 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Define the memory map for the BCM2838 based on the dt configuration -available in the Raspberry Pi kernel fork. - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 27 ++++++++++++++++++++++++--- - 1 file changed, 24 insertions(+), 3 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6d6f1ef39a..1c4fae9166 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -249,7 +249,8 @@ static uint32_t rev_type; - static const struct rpi_model *model; - - #ifdef CONFIG_ARM64 --static struct mm_region bcm2837_mem_map[] = { -+#ifndef CONFIG_BCM2838 -+static struct mm_region bcm283x_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -268,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = { - 0, - } - }; -- --struct mm_region *mem_map = bcm2837_mem_map; -+#else -+static struct mm_region bcm283x_mem_map[] = { -+ { -+ .virt = 0x00000000UL, -+ .phys = 0x00000000UL, -+ .size = 0xfe000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | -+ PTE_BLOCK_INNER_SHARE -+ }, { -+ .virt = 0xfe000000UL, -+ .phys = 0xfe000000UL, -+ .size = 0x01800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* List terminator */ -+ 0, -+ } -+}; -+#endif -+struct mm_region *mem_map = bcm283x_mem_map; - #endif - - int dram_init(void) - -From patchwork Wed Jul 24 14:39:11 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136370 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Wed, 24 Jul 2019 07:39:40 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.40 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:40 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:11 +0100 -Message-Id: <20190724143911.29770-9-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 8/8] git-mailrc: Add rpi and bcm283x maintainer -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Signed-off-by: Andrei Gherzan -Acked-by: Matthias Brugger ---- - doc/git-mailrc | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/doc/git-mailrc b/doc/git-mailrc -index a63b76befc..68110e1963 100644 ---- a/doc/git-mailrc -+++ b/doc/git-mailrc -@@ -35,6 +35,7 @@ alias mariosix Mario Six - alias masahiro Masahiro Yamada - alias mateusz Mateusz Kulikowski - alias maxime Maxime Ripard -+alias mbrugger Matthias Brugger - alias monstr Michal Simek - alias prom Minkyu Kang - alias ptomsich Philipp Tomsich -@@ -74,6 +75,9 @@ alias uniphier uboot, masahiro - alias zynq uboot, monstr - alias rockchip uboot, sjg, kevery, ptomsich - -+alias bcm283x uboot,mbrugger -+alias rpi uboot,mbrugger -+ - alias m68k uboot, alisonwang, angelo_ts - alias coldfire m68k - -From 970baf16d1322d3930a57fc78ddfb15d594d690c Mon Sep 17 00:00:00 2001 -From: Fabian Vogt -Date: Thu, 11 Jul 2019 16:56:24 +0200 -Subject: [PATCH] video: arm: rpi: Bail out early if querying video information - fails - -When probing we query for the width and hight of the display. If the -firmware does not report any connected display the system will crash. -See https://github.com/raspberrypi/firmware/issues/1157 for details. - -Signed-off-by: Fabian Vogt -[mb: update commit message] -Signed-off-by: Matthias Brugger -Reviewed-by: Andre Przywara -Tested-by: Andre Przywara - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index bc41090aed..1d2eda084c 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -19,13 +19,15 @@ static int bcm2835_video_probe(struct udevice *dev) - - debug("bcm2835: Query resolution...\n"); - ret = bcm2835_get_video_size(&w, &h); -- if (ret) -+ if (ret || w == 0 || h == 0) - return -EIO; - - debug("bcm2835: Setting up display for %d x %d\n", w, h); - ret = bcm2835_set_video_params(&w, &h, 32, BCM2835_MBOX_PIXEL_ORDER_RGB, - BCM2835_MBOX_ALPHA_MODE_IGNORED, - &fb_base, &fb_size, &pitch); -+ if (ret) -+ return -EIO; - - debug("bcm2835: Final resolution is %d x %d\n", w, h); - diff --git a/rock960-Enable-booting-from-eMMC-when-using-SPL.patch b/rock960-Enable-booting-from-eMMC-when-using-SPL.patch deleted file mode 100644 index a34934a..0000000 --- a/rock960-Enable-booting-from-eMMC-when-using-SPL.patch +++ /dev/null @@ -1,262 +0,0 @@ -From patchwork Mon Jul 29 13:52:27 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 1138381 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=linaro.org -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (2048-bit key; - unprotected) header.d=linaro.org header.i=@linaro.org - header.b="WyWxUYr0"; dkim-atps=neutral -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45y1NM4Q0Qz9sBt - for ; - Mon, 29 Jul 2019 23:52:51 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 3FE81C21DCA; Mon, 29 Jul 2019 13:52:48 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL, - T_DKIM_INVALID autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 744C2C21D56; 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- Mon, 29 Jul 2019 06:52:41 -0700 (PDT) -From: Manivannan Sadhasivam -To: kever.yang@rock-chips.com, - philipp.tomsich@theobroma-systems.com -Date: Mon, 29 Jul 2019 19:22:27 +0530 -Message-Id: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> -X-Mailer: git-send-email 2.17.1 -Cc: sahaj.sarup@linaro.org, u-boot@lists.denx.de, - Manivannan Sadhasivam -Subject: [U-Boot] [PATCH v2 1/2] arm: dts: rock960: Enable booting from eMMC - when using SPL -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This commits enables booting from eMMC when using SPL on 96Boards -Rock960 board by adding SDHCI to boot order. Since the SDHCI driver -already has the reloc flag, this works straightaway. While we are at it, -let's also include the common u-boot dtsi for rk3399. - -Signed-off-by: Manivannan Sadhasivam ---- - -Changes in v2: - -* Moved the change to -u-boot.dtsi as spotted by Peter. - - arch/arm/dts/rk3399-rock960-u-boot.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -index 5256f6d3f2..4850debdf0 100644 ---- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -@@ -3,4 +3,11 @@ - * Copyright (C) 2019 Jagan Teki - */ - -+#include "rk3399-u-boot.dtsi" - #include "rk3399-sdram-lpddr3-2GB-1600.dtsi" -+ -+/ { -+ chosen { -+ u-boot,spl-boot-order = &sdhci, &sdmmc; -+ }; -+}; - -From patchwork Mon Jul 29 13:52:28 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Manivannan Sadhasivam -X-Patchwork-Id: 1138382 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Mon, 29 Jul 2019 06:52:46 -0700 (PDT) -From: Manivannan Sadhasivam -To: kever.yang@rock-chips.com, - philipp.tomsich@theobroma-systems.com -Date: Mon, 29 Jul 2019 19:22:28 +0530 -Message-Id: <20190729135228.2878-2-manivannan.sadhasivam@linaro.org> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> -References: <20190729135228.2878-1-manivannan.sadhasivam@linaro.org> -Cc: sahaj.sarup@linaro.org, u-boot@lists.denx.de, - Manivannan Sadhasivam -Subject: [U-Boot] [PATCH v2 2/2] arm: dts: ficus: Enable booting from eMMC - when using SPL -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This commits enables booting from eMMC when using SPL on 96Boards -Ficus board by adding SDHCI to boot order. Since the SDHCI driver -already has the reloc flag, this works straightaway. While we are at it, -let's also include the common u-boot dtsi for rk3399. - -Signed-off-by: Manivannan Sadhasivam ---- - -Changes in v2: - -* Moved the change to -u-boot.dtsi as spotted by Peter. - - arch/arm/dts/rk3399-ficus-u-boot.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi b/arch/arm/dts/rk3399-ficus-u-boot.dtsi -index eab86bdb30..f3f7aa7c45 100644 ---- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi -@@ -3,4 +3,11 @@ - * Copyright (C) 2019 Jagan Teki - */ - -+#include "rk3399-u-boot.dtsi" - #include "rk3399-sdram-ddr3-1600.dtsi" -+ -+/ { -+ chosen { -+ u-boot,spl-boot-order = &sdhci, &sdmmc; -+ }; -+}; diff --git a/rockchip-rk3399-Fix-USB3-support.patch b/rockchip-rk3399-Fix-USB3-support.patch deleted file mode 100644 index 792ada6..0000000 --- a/rockchip-rk3399-Fix-USB3-support.patch +++ /dev/null @@ -1,415 +0,0 @@ -From patchwork Sun Jun 30 16:01:53 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Mark Kettenis -X-Patchwork-Id: 1124932 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=openbsd.org -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45cFdR5qfcz9sBp - for ; - Mon, 1 Jul 2019 02:02:35 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 69EB1C21DFD; Sun, 30 Jun 2019 16:02:22 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable - autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A34D5C21D56; - Sun, 30 Jun 2019 16:02:07 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id E8483C21D56; Sun, 30 Jun 2019 16:02:05 +0000 (UTC) -Received: from lb3-smtp-cloud9.xs4all.net (lb3-smtp-cloud9.xs4all.net - [194.109.24.30]) - by lists.denx.de (Postfix) with ESMTPS id 88FC8C21C27 - for ; Sun, 30 Jun 2019 16:02:05 +0000 (UTC) -Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) - by smtp-cloud9.xs4all.net with ESMTP - id hcHChhlcYAOfNhcHEhina2; Sun, 30 Jun 2019 18:02:04 +0200 -From: Mark Kettenis -To: u-boot@lists.denx.de -Date: Sun, 30 Jun 2019 18:01:53 +0200 -Message-Id: <20190630160156.51934-2-kettenis@openbsd.org> -X-Mailer: git-send-email 2.21.0 -In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> -References: <20190630160156.51934-1-kettenis@openbsd.org> -MIME-Version: 1.0 -X-CMAE-Envelope: MS4wfLmEqKVrnQUzr99m+sewry4ejdvlsajihZ5fdwiyysrW7rHASkwT0EpvsDOXqW6cF7dQRh9fkLtTaJfdf4G0dKtcZjzy8i16ml/DtpRuO9PJFqcz0gBT - 8elsIXsJQPTnECIi3VFXugCXTgv8xgf9nsYOGsNpMpAop2NQ0gD5nksNRwnypHXYRO0b9cbZq82nwtPShl36CmI5hfMTI+zBeEEVjesvYmW9K73GUT503U6P - N/ohWQ8Ta35iWY0w5Rz2gMrBId0UTcIU4s5vRIp+cNmXPjnu09qT22WLAZcTT1PwhNb672Tji0a2TUU/zZkfVKI/ZmTvN6utmGPOx9GkOXPYpNJw2jzpwKhq - aMYImgg7RpoqHrOttDtjtRD8sohh3w== -Cc: Mark Kettenis -Subject: [U-Boot] [PATCH v2 1/4] rockchip: clk: rk3399: handle clk_enable - requests for USB3 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -The "simple" OF glue layer for the Designware USB3 core enables -all refernced clocks. These need to be need to be implemented -otherwise the driver fails to probe. A dummy implementation -that simply returns success is sufficient since the RK3399 comes -out of reset with all clock gates open. - -Signed-off-by: Mark Kettenis ---- - drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c -index 79007b8682..d9950c159b 100644 ---- a/drivers/clk/rockchip/clk_rk3399.c -+++ b/drivers/clk/rockchip/clk_rk3399.c -@@ -1080,6 +1080,18 @@ static int rk3399_clk_enable(struct clk *clk) - case PCLK_GMAC: - /* Required to successfully probe the Designware GMAC driver */ - return 0; -+ -+ case SCLK_USB3OTG0_REF: -+ case SCLK_USB3OTG1_REF: -+ case SCLK_USB3OTG0_SUSPEND: -+ case SCLK_USB3OTG1_SUSPEND: -+ case ACLK_USB3OTG0: -+ case ACLK_USB3OTG1: -+ case ACLK_USB3_RKSOC_AXI_PERF: -+ case ACLK_USB3: -+ case ACLK_USB3_GRF: -+ /* Required to successfully probe the Designware USB3 driver */ -+ return 0; - } - - debug("%s: unsupported clk %ld\n", __func__, clk->id); - -From patchwork Sun Jun 30 16:01:54 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Mark Kettenis -X-Patchwork-Id: 1124933 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=openbsd.org -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45cFff0fKJz9sBp - for ; - Mon, 1 Jul 2019 02:03:37 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id B9E06C21E08; Sun, 30 Jun 2019 16:02:35 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable - autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 3FB43C21DE8; - Sun, 30 Jun 2019 16:02:08 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id 6525AC21D56; Sun, 30 Jun 2019 16:02:06 +0000 (UTC) -Received: from lb3-smtp-cloud9.xs4all.net (lb3-smtp-cloud9.xs4all.net - [194.109.24.30]) - by lists.denx.de (Postfix) with ESMTPS id 1AF59C21C27 - for ; Sun, 30 Jun 2019 16:02:06 +0000 (UTC) -Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) - by smtp-cloud9.xs4all.net with ESMTP - id hcHChhlcYAOfNhcHFhinaO; Sun, 30 Jun 2019 18:02:06 +0200 -From: Mark Kettenis -To: u-boot@lists.denx.de -Date: Sun, 30 Jun 2019 18:01:54 +0200 -Message-Id: <20190630160156.51934-3-kettenis@openbsd.org> -X-Mailer: git-send-email 2.21.0 -In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> -References: <20190630160156.51934-1-kettenis@openbsd.org> -MIME-Version: 1.0 -X-CMAE-Envelope: MS4wfKRPj13LkDsqDLlh3dPjepDM22UaNHBR/NtZWFq6HmRoAycq/QLfscmB7RQ6Qr1EzV6RrTtOvCYZiuXKQbTJzDBJd2l/C/wPc01PHXZYBVSolpSIx7Ly - hMIN5wJInIHRjMUa8hqeaSNSBFz2GpCd4GNFk2Jv/DgHOiymkEftLBJQaPXPh0rdCGL8BGlEXKM1wseWX1aDf8efNApZ7outHAjzlrnS1hELt4c9zmfVQCMQ - lLQCSp7/S40oWg5OqC4X+ShBDOf9hrWZAHsoVInsS+diZkcnbIo7vT3N6zADrDcZoVO1I4NDa9c/YcVbLDdJv9yoHVHjFSNI3i0gBRMmnctZfmlWaYN0IrLC - 820zukHfOpaNEqKNAvPamCZLovpdOQ== -Cc: Mark Kettenis -Subject: [U-Boot] [PATCH v2 2/4] usb: dwc3-of-simple: Add support for RK3399 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Add compatible string for RK3399 and enable it by default on -Rockchip platforms with USB3 support. - -Signed-off-by: Mark Kettenis -Reviewed-by: Kever Yang ---- - drivers/usb/host/Kconfig | 1 + - drivers/usb/host/dwc3-of-simple.c | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig -index b1188bcbf5..ac68aa2d27 100644 ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -24,6 +24,7 @@ config USB_XHCI_DWC3 - config USB_XHCI_DWC3_OF_SIMPLE - bool "DesignWare USB3 DRD Generic OF Simple Glue Layer" - depends on DM_USB -+ default y if ARCH_ROCKCHIP - default y if DRA7XX - help - Support USB2/3 functionality in simple SoC integrations with -diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c -index b118997f6e..45df614b09 100644 ---- a/drivers/usb/host/dwc3-of-simple.c -+++ b/drivers/usb/host/dwc3-of-simple.c -@@ -92,6 +92,7 @@ static int dwc3_of_simple_remove(struct udevice *dev) - - static const struct udevice_id dwc3_of_simple_ids[] = { - { .compatible = "amlogic,meson-gxl-dwc3" }, -+ { .compatible = "rockchip,rk3399-dwc3" }, - { .compatible = "ti,dwc3" }, - { } - }; - -From patchwork Sun Jun 30 16:01:55 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Mark Kettenis -X-Patchwork-Id: 1124934 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=openbsd.org -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45cFg20RQ2z9sBp - for ; - Mon, 1 Jul 2019 02:03:57 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id BB0E3C21D8E; Sun, 30 Jun 2019 16:02:51 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: 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<20190630160156.51934-1-kettenis@openbsd.org> -MIME-Version: 1.0 -X-CMAE-Envelope: MS4wfLs+8eVNa+4q5xvZxgD/7JFk5FDJvpyZbd3cSrXacdnFSq2kAy8QdBLQqG7pFgMwbbkh/zgisVHcqIrbLR4AS1bVVdY9OiI3glthx583ANub4fv/+FYG - p2vXmJ/g7+CCFcVSIOoJhY+thnwEIzY6/Azt309X5FXHFUhNyCIBYgwmeyfWokqW63nRuxAp4EwLljFsrFdd+RFtBY1nL3qyzpTszLkJg1yWdTar2dRe4svQ - oKXYd53kLhrnEWbesbCU0A2fpCT0KpWLXQGntr26HUrGujJxrdYRV4v9LX7FF4B1E5SuWpr3TmT0h9a7Z8CVprD6p5ZwpVLJ1GjFlgQGHB97Y1CKq2I0khV6 - JLYxojKfL1uhNq0F7gI/5ImOsua0rw== -Cc: Mark Kettenis -Subject: [U-Boot] [PATCH v2 3/4] usb: xhci-dwc3: Add USB2 PHY configuration -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Configure USB2 PHY register based on "phy_type" property and -handle all the quirks that are relevant for Rockchip RK3399 SoCs. - -Signed-off-by: Mark Kettenis ---- - drivers/usb/host/xhci-dwc3.c | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - -diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c -index 83b9f119e7..9e8cae7ae4 100644 ---- a/drivers/usb/host/xhci-dwc3.c -+++ b/drivers/usb/host/xhci-dwc3.c -@@ -118,6 +118,8 @@ static int xhci_dwc3_probe(struct udevice *dev) - struct dwc3 *dwc3_reg; - enum usb_dr_mode dr_mode; - struct xhci_dwc3_platdata *plat = dev_get_platdata(dev); -+ const char *phy; -+ u32 reg; - int ret; - - hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev)); -@@ -132,6 +134,24 @@ static int xhci_dwc3_probe(struct udevice *dev) - - dwc3_core_init(dwc3_reg); - -+ /* Set dwc3 usb2 phy config */ -+ reg = readl(&dwc3_reg->g_usb2phycfg[0]); -+ -+ phy = dev_read_string(dev, "phy_type"); -+ if (phy && strcmp(phy, "utmi_wide") == 0) { -+ reg |= DWC3_GUSB2PHYCFG_PHYIF; -+ reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; -+ reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT; -+ } -+ -+ if (dev_read_bool(dev, "snps,dis_enblslpm-quirk")) -+ reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; -+ -+ if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk")) -+ reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; -+ -+ writel(reg, &dwc3_reg->g_usb2phycfg[0]); -+ - dr_mode = usb_get_dr_mode(dev_of_offset(dev)); - if (dr_mode == USB_DR_MODE_UNKNOWN) - /* by default set dual role mode to HOST */ - -From patchwork Sun Jun 30 16:01:56 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Mark Kettenis -X-Patchwork-Id: 1124935 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=openbsd.org -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45cFgS2Mb4z9sBp - for ; - Mon, 1 Jul 2019 02:04:20 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id D32B4C21DD3; Sun, 30 Jun 2019 16:03:04 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable - autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 5BF87C21E08; - Sun, 30 Jun 2019 16:02:22 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id EBB2FC21E2F; Sun, 30 Jun 2019 16:02:11 +0000 (UTC) -Received: from lb3-smtp-cloud9.xs4all.net (lb3-smtp-cloud9.xs4all.net - [194.109.24.30]) - by lists.denx.de (Postfix) with ESMTPS id 0D156C21DD7 - for ; Sun, 30 Jun 2019 16:02:08 +0000 (UTC) -Received: from barber.sibelius.xs4all.nl ([83.163.83.176]) - by smtp-cloud9.xs4all.net with ESMTP - id hcHChhlcYAOfNhcHHhinbC; Sun, 30 Jun 2019 18:02:08 +0200 -From: Mark Kettenis -To: u-boot@lists.denx.de -Date: Sun, 30 Jun 2019 18:01:56 +0200 -Message-Id: <20190630160156.51934-5-kettenis@openbsd.org> -X-Mailer: git-send-email 2.21.0 -In-Reply-To: <20190630160156.51934-1-kettenis@openbsd.org> -References: <20190630160156.51934-1-kettenis@openbsd.org> -MIME-Version: 1.0 -X-CMAE-Envelope: MS4wfJt9aWnppnn1FrjUcIi+mVdSRXltWTpfX80VJftNdkow/RTDLd6RZhxL11k74NYLPOqe/UXQb2nIzkxqBuBVF3W1CvkWIgzYeNmbJTAbSmMsNnS491Uk - prEsRguT84I6QPh+YWtHv2yd9XN9NF5OkpHj05XsG0kmkXk0lLv42fxlsheATPb7hRo4UrN94niQPmKEWbW7fbHZgiIpp3W8JZ9ei3TLOx+t1TdA6uz3mFki - Xbwobdnaw3EpuVLHgTbKQWpdVl1n3+c2VK61rlNusZ+c8+ofBbSsiA3rybSGzm2gOBWDQiMrw05hTuZs2lluyqocc/i5dK+ODagwBGwH7IIgKBq2qMaKA6Sl - ymPOVIvlveSrgV/bugKVyUGhkerl7A== -Cc: Mark Kettenis -Subject: [U-Boot] [PATCH v2 4/4] rockchip: xhci: Remove RK3399 support -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Remove RK3399 compatible strings as this driver is no longer -used on that SoC. - -Signed-off-by: Mark Kettenis -Reviewed-by: Kever Yang ---- - drivers/usb/host/xhci-rockchip.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c -index f19bea3a91..e7b0dbcca5 100644 ---- a/drivers/usb/host/xhci-rockchip.c -+++ b/drivers/usb/host/xhci-rockchip.c -@@ -167,7 +167,6 @@ static int xhci_usb_remove(struct udevice *dev) - } - - static const struct udevice_id xhci_usb_ids[] = { -- { .compatible = "rockchip,rk3399-xhci" }, - { .compatible = "rockchip,rk3328-xhci" }, - { } - }; -@@ -187,7 +186,6 @@ U_BOOT_DRIVER(usb_xhci) = { - }; - - static const struct udevice_id usb_phy_ids[] = { -- { .compatible = "rockchip,rk3399-usb3-phy" }, - { .compatible = "rockchip,rk3328-usb3-phy" }, - { } - }; diff --git a/rockchip-rock960.patch b/rockchip-rock960.patch deleted file mode 100644 index 513e144..0000000 --- a/rockchip-rock960.patch +++ /dev/null @@ -1,799 +0,0 @@ -From 15c14b923f29dc69d51964e63f4ed35a7ffcd97f Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 28 Jun 2019 14:09:02 +0100 -Subject: [PATCH 1/6] arm64: rockchip: rock960: sync dts files from Linux - 5.2-rc6 - -Sync the dts files for the Rock960 boards from Linux to get the -latest changes and fixes for the devices. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-ficus.dts | 92 ++++++++++++- - arch/arm/dts/rk3399-rock960.dts | 91 +++++++++++- - arch/arm/dts/rk3399-rock960.dtsi | 229 +++++++++++++++++++++++++------ - 3 files changed, 366 insertions(+), 46 deletions(-) - -diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts -index 4b2dd82b67..6b059bd7a0 100644 ---- a/arch/arm/dts/rk3399-ficus.dts -+++ b/arch/arm/dts/rk3399-ficus.dts -@@ -23,6 +23,52 @@ - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, -+ <&user_led4>, <&wlan_led>, <&bt_led>; -+ -+ user_led1 { -+ label = "red:user1"; -+ gpios = <&gpio4 25 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ user_led2 { -+ label = "red:user2"; -+ gpios = <&gpio4 26 0>; -+ linux,default-trigger = "mmc0"; -+ }; -+ -+ user_led3 { -+ label = "red:user3"; -+ gpios = <&gpio4 30 0>; -+ linux,default-trigger = "mmc1"; -+ }; -+ -+ user_led4 { -+ label = "red:user4"; -+ gpios = <&gpio1 0 0>; -+ panic-indicator; -+ linux,default-trigger = "none"; -+ }; -+ -+ wlan_active_led { -+ label = "red:wlan"; -+ gpios = <&gpio1 1 0>; -+ linux,default-trigger = "phy0tx"; -+ default-state = "off"; -+ }; -+ -+ bt_active_led { -+ label = "red:bt"; -+ gpios = <&gpio1 4 0>; -+ linux,default-trigger = "hci0-power"; -+ default-state = "off"; -+ }; -+ }; - }; - - &gmac { -@@ -49,23 +95,63 @@ - gmac { - rgmii_sleep_pins: rgmii-sleep-pins { - rockchip,pins = -- <3 15 RK_FUNC_GPIO &pcfg_output_low>; -+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - pcie { - pcie_drv: pcie-drv { - rockchip,pins = -- <1 24 RK_FUNC_GPIO &pcfg_pull_none>; -+ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - host_vbus_drv: host-vbus-drv { - rockchip,pins = -- <4 27 RK_FUNC_GPIO &pcfg_pull_none>; -+ <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -+ -+ leds { -+ user_led1: user_led1 { -+ rockchip,pins = -+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led2: user_led2 { -+ rockchip,pins = -+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led3: user_led3 { -+ rockchip,pins = -+ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led4: user_led4 { -+ rockchip,pins = -+ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wlan_led: wlan_led { -+ rockchip,pins = -+ <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_led: bt_led { -+ rockchip,pins = -+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "host"; -+}; -+ -+&usbdrd_dwc3_1 { -+ dr_mode = "host"; - }; - - &vcc3v3_pcie { -diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts -index 7e06bc97e5..12285c51cc 100644 ---- a/arch/arm/dts/rk3399-rock960.dts -+++ b/arch/arm/dts/rk3399-rock960.dts -@@ -1,6 +1,6 @@ --// SPDX-License-Identifier: GPL-2.0+ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - /* -- * Copyright (C) 2018 Manivannan Sadhasivam -+ * Copyright (c) 2018 Linaro Ltd. - */ - - /dts-v1/; -@@ -13,6 +13,53 @@ - chosen { - stdout-path = "serial2:1500000n8"; - }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, -+ <&user_led4>, <&wlan_led>, <&bt_led>; -+ -+ user_led1 { -+ label = "green:user1"; -+ gpios = <&gpio4 RK_PC2 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ user_led2 { -+ label = "green:user2"; -+ gpios = <&gpio4 RK_PC6 0>; -+ linux,default-trigger = "mmc0"; -+ }; -+ -+ user_led3 { -+ label = "green:user3"; -+ gpios = <&gpio4 RK_PD0 0>; -+ linux,default-trigger = "mmc1"; -+ }; -+ -+ user_led4 { -+ label = "green:user4"; -+ gpios = <&gpio4 RK_PD4 0>; -+ panic-indicator; -+ linux,default-trigger = "none"; -+ }; -+ -+ wlan_active_led { -+ label = "yellow:wlan"; -+ gpios = <&gpio4 RK_PD5 0>; -+ linux,default-trigger = "phy0tx"; -+ default-state = "off"; -+ }; -+ -+ bt_active_led { -+ label = "blue:bt"; -+ gpios = <&gpio4 RK_PD6 0>; -+ linux,default-trigger = "hci0-power"; -+ default-state = "off"; -+ }; -+ }; -+ - }; - - &pcie0 { -@@ -20,6 +67,38 @@ - }; - - &pinctrl { -+ leds { -+ user_led1: user_led1 { -+ rockchip,pins = -+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led2: user_led2 { -+ rockchip,pins = -+ <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led3: user_led3 { -+ rockchip,pins = -+ <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ user_led4: user_led4 { -+ rockchip,pins = -+ <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wlan_led: wlan_led { -+ rockchip,pins = -+ <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_led: bt_led { -+ rockchip,pins = -+ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pcie { - pcie_drv: pcie-drv { - rockchip,pins = -@@ -35,6 +114,14 @@ - }; - }; - -+&usbdrd_dwc3_0 { -+ dr_mode = "otg"; -+}; -+ -+&usbdrd_dwc3_1 { -+ dr_mode = "host"; -+}; -+ - &vcc3v3_pcie { - gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; - }; -diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi -index 51644d6d02..c7d48d41e1 100644 ---- a/arch/arm/dts/rk3399-rock960.dtsi -+++ b/arch/arm/dts/rk3399-rock960.dtsi -@@ -1,13 +1,32 @@ --// SPDX-License-Identifier: GPL-2.0+ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - /* -+ * Copyright (c) 2018 Collabora Ltd. -+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (c) 2018 Linaro Ltd. - */ - --#include --#include - #include "rk3399.dtsi" -+#include "rk3399-opp.dtsi" - - / { -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rk808 1>; -+ clock-names = "ext_clock"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h>; -+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ vcc12v_dcin: vcc12v-dcin { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc12v_dcin"; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ - vcc1v8_s0: vcc1v8-s0 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s0"; -@@ -16,12 +35,13 @@ - regulator-always-on; - }; - -- vcc_sys: vcc-sys { -+ vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; -- regulator-name = "vcc_sys"; -+ regulator-name = "vcc5v0_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; -+ vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_sys: vcc3v3-sys { -@@ -30,7 +50,7 @@ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; -- vin-supply = <&vcc_sys>; -+ vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { -@@ -54,20 +74,8 @@ - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; -- vin-supply = <&vcc_sys>; -- }; -- -- vdd_log: vdd-log { -- compatible = "pwm-regulator"; -- pwms = <&pwm2 0 25000 0>; -- regulator-name = "vdd_log"; -- regulator-min-microvolt = <800000>; -- regulator-max-microvolt = <1400000>; -- regulator-always-on; -- regulator-boot-on; -- vin-supply = <&vcc_sys>; -+ vin-supply = <&vcc5v0_sys>; - }; -- - }; - - &cpu_l0 { -@@ -98,7 +106,19 @@ - status = "okay"; - }; - -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ - &hdmi { -+ ddc-i2c-bus = <&i2c3>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hdmi_cec>; -+ status = "okay"; -+}; -+ -+&hdmi_sound { - status = "okay"; - }; - -@@ -118,7 +138,7 @@ - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; -- vin-supply = <&vcc_sys>; -+ vin-supply = <&vcc5v0_sys>; - status = "okay"; - - regulator-state-mem { -@@ -136,7 +156,7 @@ - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; -- vin-supply = <&vcc_sys>; -+ vin-supply = <&vcc5v0_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; -@@ -154,16 +174,16 @@ - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - -- vcc1-supply = <&vcc_sys>; -- vcc2-supply = <&vcc_sys>; -- vcc3-supply = <&vcc_sys>; -- vcc4-supply = <&vcc_sys>; -- vcc6-supply = <&vcc_sys>; -- vcc7-supply = <&vcc_sys>; -+ vcc1-supply = <&vcc5v0_sys>; -+ vcc2-supply = <&vcc5v0_sys>; -+ vcc3-supply = <&vcc5v0_sys>; -+ vcc4-supply = <&vcc5v0_sys>; -+ vcc6-supply = <&vcc5v0_sys>; -+ vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; -- vcc9-supply = <&vcc_sys>; -- vcc10-supply = <&vcc_sys>; -- vcc11-supply = <&vcc_sys>; -+ vcc9-supply = <&vcc5v0_sys>; -+ vcc10-supply = <&vcc5v0_sys>; -+ vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - -@@ -344,6 +364,10 @@ - status = "okay"; - }; - -+&i2s2 { -+ status = "okay"; -+}; -+ - &io_domains { - bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ - audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ -@@ -370,45 +394,92 @@ - }; - - &pinctrl { -+ bt { -+ bt_enable_h: bt-enable-h { -+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_host_wake_l: bt-host-wake-l { -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_wake_l: bt-wake-l { -+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - sdmmc { - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = -- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ <4 RK_PB0 1 &pcfg_pull_up_8ma>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = -- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, -- <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, -- <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, -- <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ <4 RK_PB0 1 &pcfg_pull_up_8ma>, -+ <4 RK_PB1 1 &pcfg_pull_up_8ma>, -+ <4 RK_PB2 1 &pcfg_pull_up_8ma>, -+ <4 RK_PB3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = -- <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; -+ <4 RK_PB4 1 &pcfg_pull_none_18ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = -- <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ <4 RK_PB5 1 &pcfg_pull_up_8ma>; -+ }; -+ }; -+ -+ sdio0 { -+ sdio0_bus4: sdio0-bus4 { -+ rockchip,pins = -+ <2 RK_PC4 1 &pcfg_pull_up_20ma>, -+ <2 RK_PC5 1 &pcfg_pull_up_20ma>, -+ <2 RK_PC6 1 &pcfg_pull_up_20ma>, -+ <2 RK_PC7 1 &pcfg_pull_up_20ma>; -+ }; -+ -+ sdio0_cmd: sdio0-cmd { -+ rockchip,pins = -+ <2 RK_PD0 1 &pcfg_pull_up_20ma>; -+ }; -+ -+ sdio0_clk: sdio0-clk { -+ rockchip,pins = -+ <2 RK_PD1 1 &pcfg_pull_none_20ma>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = -- <1 21 RK_FUNC_GPIO &pcfg_pull_up>; -+ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_gpio: vsel1-gpio { - rockchip,pins = -- <1 17 RK_FUNC_GPIO &pcfg_pull_down>; -+ <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_gpio: vsel2-gpio { - rockchip,pins = -- <1 14 RK_FUNC_GPIO &pcfg_pull_down>; -+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h: wifi-enable-h { -+ rockchip,pins = -+ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ wifi { -+ wifi_host_wake_l: wifi-host-wake-l { -+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - }; -@@ -421,6 +492,32 @@ - status = "okay"; - }; - -+&sdio0 { -+ bus-width = <4>; -+ clock-frequency = <50000000>; -+ cap-sdio-irq; -+ cap-sd-highspeed; -+ keep-power-in-suspend; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; -+ sd-uhs-sdr104; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ brcmf: wifi@1 { -+ compatible = "brcm,bcm4329-fmac"; -+ reg = <1>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ interrupt-names = "host-wake"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_host_wake_l>; -+ }; -+}; -+ - &sdhci { - bus-width = <8>; - mmc-hs400-1_8v; -@@ -445,16 +542,42 @@ - status = "okay"; - }; - -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; -+ rockchip,hw-tshut-polarity = <1>; -+ rockchip,hw-tshut-temp = <110000>; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; -- pinctrl-0 = <&uart0_xfer &uart0_cts>; -+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ clocks = <&rk808 1>; -+ clock-names = "ext_clock"; -+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; -+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; -+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; -+ }; - }; - - &uart2 { - status = "okay"; - }; - -+&tcphy0 { -+ status = "okay"; -+}; -+ -+&tcphy1 { -+ status = "okay"; -+}; -+ - &u2phy0 { - status = "okay"; - }; -@@ -497,10 +620,34 @@ - status = "okay"; - }; - -+&usbdrd3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd3_1 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_1 { -+ status = "okay"; -+}; -+ - &vopb { - status = "okay"; - }; - -+&vopb_mmu { -+ status = "okay"; -+}; -+ - &vopl { - status = "okay"; - }; -+ -+&vopl_mmu { -+ status = "okay"; -+}; --- -2.21.0 - -From 66584f08b1a1eb122d4796d6923ac317bdf3c8ca Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 29 Jun 2019 09:24:55 +0100 -Subject: [PATCH 2/6] configs: rockchip: rock960: drop options for non-existent - HW - -The Rock960 doesn't contain SPI flash so drop related config options. - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 1958b7e190..1aa986e9cd 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -21,7 +21,6 @@ CONFIG_SYS_PROMPT="rock960 => " - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y --CONFIG_CMD_SF=y - CONFIG_CMD_USB=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y -@@ -35,7 +34,6 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y --CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y --- -2.21.0 - -From d9f234f28a17adad9f4b08114965815516605271 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 29 Jun 2019 09:57:29 +0100 -Subject: [PATCH 3/6] configs: rockchip: rock960: enable pmic and regulator - commands - -We have both PMIC and Regulator functionality so it's useful to -be able to see output and debug with the commands enabled. - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 1aa986e9cd..2381f0cd7e 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -21,6 +21,8 @@ CONFIG_SYS_PROMPT="rock960 => " - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PMIC=y -+CONFIG_CMD_REGULATOR=y - CONFIG_CMD_USB=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y --- -2.21.0 - -From 08cf06897ef382f4568568ea4210e41ed4ae19e2 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 29 Jun 2019 10:29:56 +0100 -Subject: [PATCH 4/6] configs: rockchip: rock960: enable DMA for SDHCI - controller - -Enable the SDMA controller so the eMMC connected to the SDHCI -controller (sdhci@fe330000) can make use of it. - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 2381f0cd7e..20c9cdeda3 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -35,6 +35,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y --- -2.21.0 - -From 1340f50ee63727804cf7634b3679fe4208c8576f Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 29 Jun 2019 10:43:01 +0100 -Subject: [PATCH 5/6] configs: rockchip: rock960: Add support for USB ethernet - adapters - -As the Rock960 doesn't have an onboard wired ethernet interface -it's useful to have some common USB wired ethernet devices added -to enable testing. - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 20c9cdeda3..90115e903b 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -48,5 +48,12 @@ CONFIG_USB=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_DM_ETH=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_MCS7830=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_USB_ETHER_SMSC95XX=y - CONFIG_USE_TINY_PRINTF=y - CONFIG_ERRNO_STR=y --- -2.21.0 - -From 1bb09008d279c533f4fd76697aa396d63c10ed58 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 29 Jun 2019 18:34:57 +0100 -Subject: [PATCH 6/6] configs: rockchip: rock960: enable USB3 support - -Enable USB3 support via the dwc3 XHCI driver. - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 90115e903b..5be36383e1 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -55,5 +55,8 @@ CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_MCS7830=y - CONFIG_USB_ETHER_RTL8152=y - CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+# CONFIG_USB_XHCI_ROCKCHIP is not set - CONFIG_USE_TINY_PRINTF=y - CONFIG_ERRNO_STR=y --- -2.21.0 - diff --git a/sources b/sources index b68a826..e52d8c7 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.07.tar.bz2) = 879abf0c8773bfcdcbe7f28fc68e2b4369bcb74e276d95d510a9b2d1707e63eb01d82e304ba5a6a570552bc18bc593f27ba9b518bafa1d8f8e5bc83cf107c023 +SHA512 (u-boot-2019.10-rc2.tar.bz2) = 5a9173a1bd945736c8e0c1797b4c8fdd9833fc4e04d6b0e562c2018884da9bc10c110231b690450fb2761e19cd19ab24fc8744000c901f416ba2936c8278799e diff --git a/uboot-tools.spec b/uboot-tools.spec index 226bbb6..b2800cd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc4 +%global candidate rc2 Name: uboot-tools -Version: 2019.07 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2019.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,10 +26,6 @@ Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch10: rockchip-rk3399-Fix-USB3-support.patch -Patch11: rockchip-rock960.patch -Patch12: rock960-Enable-booting-from-eMMC-when-using-SPL.patch -Patch13: Raspberry-Pi-32-64-support.patch BuildRequires: bc BuildRequires: dtc @@ -265,6 +261,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Aug 14 2019 Peter Robinson 2019.10-0.1-rc2 +- 2019.10 RC2 + * Sun Aug 4 2019 Peter Robinson 2019.07-3 - Fixes for Rock960 - Iniital Raspberry Pi 4 support From 268b040fc031d71da22aaeaa07ed6cc54641929b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 26 Aug 2019 08:35:47 +0100 Subject: [PATCH 036/351] fixes to building 2019.10-rc2 --- env-fix-build-error-for-envtools.patch | 460 +++++++++++++++++++++++++ uboot-tools.spec | 3 +- 2 files changed, 462 insertions(+), 1 deletion(-) create mode 100644 env-fix-build-error-for-envtools.patch diff --git a/env-fix-build-error-for-envtools.patch b/env-fix-build-error-for-envtools.patch new file mode 100644 index 0000000..6c563b1 --- /dev/null +++ b/env-fix-build-error-for-envtools.patch @@ -0,0 +1,460 @@ +From patchwork Fri Aug 23 21:03:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +X-Patchwork-Submitter: Pierre-Jean Texier +X-Patchwork-Id: 1152434 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) 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SrRFMD9Thr8uxv1tPOXk1vtMtUrUYhlulvxF3tRFwr6S/nPZEfJP5F4A9iJDoobPTn + LQrE0JRQKALig+LKrec4hi8gRn20HinWxj/dl2utVwsJdtxA4C4nG1aCL+PghaEh0+ + APc7DCJINwsJA== +From: Pierre-Jean Texier +To: u-boot@lists.denx.de +Date: Fri, 23 Aug 2019 23:03:16 +0200 +Message-Id: <1566594199-25314-2-git-send-email-pjtexier@koncepto.io> +X-Mailer: git-send-email 2.7.4 +In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +MIME-Version: 1.0 +Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, + philip@philipmolloy.com +Subject: [U-Boot] [PATCH 1/4] fw_env: remove duplicated definitions +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Since commit d3716dd ("env: Rename the redundancy flags"), the +definitions of ENV_REDUND_OBSOLETE & ENV_REDUND_ACTIVE was moved +to env.h. + +Fixes: + +tools/env/fw_env.c:122:22: error: ‘ENV_REDUND_ACTIVE’ redeclared as different kind of symbol + static unsigned char ENV_REDUND_ACTIVE = 1; + ^~~~~~~~~~~~~~~~~ +In file included from tools/env/fw_env.c:13: +include/env.h:63:2: note: previous definition of ‘ENV_REDUND_ACTIVE’ was here + ENV_REDUND_ACTIVE = 1, + ^~~~~~~~~~~~~~~~~ +tools/env/fw_env.c:127:22: error: ‘ENV_REDUND_OBSOLETE’ redeclared as different kind of symbol + static unsigned char ENV_REDUND_OBSOLETE; + ^~~~~~~~~~~~~~~~~~~ +In file included from tools/env/fw_env.c:13: +include/env.h:62:2: note: previous definition of ‘ENV_REDUND_OBSOLETE’ was here + ENV_REDUND_OBSOLETE = 0, + +Signed-off-by: Pierre-Jean Texier +Tested-by: Heiko Schocher +--- + tools/env/fw_env.c | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c +index 95c9984..876bf2b 100644 +--- a/tools/env/fw_env.c ++++ b/tools/env/fw_env.c +@@ -119,13 +119,6 @@ static struct environment environment = { + + static int have_redund_env; + +-static unsigned char ENV_REDUND_ACTIVE = 1; +-/* +- * ENV_REDUND_OBSOLETE must be 0 to efficiently set it on NOR flash without +- * erasing +- */ +-static unsigned char ENV_REDUND_OBSOLETE; +- + #define DEFAULT_ENV_INSTANCE_STATIC + #include + + +From patchwork Fri Aug 23 21:03:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +X-Patchwork-Submitter: Pierre-Jean Texier +X-Patchwork-Id: 1152435 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) + header.from=koncepto.io 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<1566594199-25314-3-git-send-email-pjtexier@koncepto.io> +X-Mailer: git-send-email 2.7.4 +In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +MIME-Version: 1.0 +Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, + philip@philipmolloy.com +Subject: [U-Boot] [PATCH 2/4] fw_env: fix build error +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +The following error appears: + +tools/env/fw_env.c:1149:25: error: lvalue required as unary ‘&’ operand + rc = write(fd, &ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); + +Fixes: d3716dd ("env: Rename the redundancy flags") + +Signed-off-by: Pierre-Jean Texier +Tested-by: Heiko Schocher +--- + tools/env/fw_env.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c +index 876bf2b..b8b936f 100644 +--- a/tools/env/fw_env.c ++++ b/tools/env/fw_env.c +@@ -1146,7 +1146,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) + return rc; + } + ioctl(fd, MEMUNLOCK, &erase); +- rc = write(fd, &ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); ++ rc = write(fd, ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); + ioctl(fd, MEMLOCK, &erase); + if (rc < 0) + perror("Could not set obsolete flag"); + +From patchwork Fri Aug 23 21:03:18 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +X-Patchwork-Submitter: Pierre-Jean Texier +X-Patchwork-Id: 1152436 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + 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+ lN6/RNx1HK/JNlxawIZklpeO4BtLBMTBVgbBGkpuwi0th6Hq0IfGc/oETpvfnlQjZ0 + UFebqc7lSAWIA== +From: Pierre-Jean Texier +To: u-boot@lists.denx.de +Date: Fri, 23 Aug 2019 23:03:18 +0200 +Message-Id: <1566594199-25314-4-git-send-email-pjtexier@koncepto.io> +X-Mailer: git-send-email 2.7.4 +In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +MIME-Version: 1.0 +Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, + philip@philipmolloy.com +Subject: [U-Boot] [PATCH 3/4] env: add missing header file +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Since commit af95f20 ("env: Create a new file for environment functions"), +a new header file exists. + +So, this commit add a missing header file. + +Fixes: + +include/env.h:158:1: error: unknown type name ‘ulong’; did you mean ‘long’? + ulong env_get_ulong(const char *name, int base, ulong default_val); + ^~~~~ + long +include/env.h:158:49: error: unknown type name ‘ulong’; did you mean ‘long’? + ulong env_get_ulong(const char *name, int base, ulong default_val); + +Signed-off-by: Pierre-Jean Texier +Tested-by: Heiko Schocher +--- + include/env.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/env.h b/include/env.h +index a74a261..b72239f 100644 +--- a/include/env.h ++++ b/include/env.h +@@ -9,6 +9,7 @@ + #ifndef __ENV_H + #define __ENV_H + ++#include + #include + #include + + +From patchwork Fri Aug 23 21:03:19 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Pierre-Jean Texier +X-Patchwork-Id: 1152433 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: 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4Erl2YMzlJwPQH/W1IuVqdYpsjX8/6qLUmK547M9G9meCW3aBy0yTsZYZ+oRFnh2cb + gI+jpjZkarOAsfTjMIpZoRSpkrys1TiWf2tJnwAnZNoze8FnGsdT7YyB9xniMekdmV + UhKOrY5eZTx/FyRfwVVB18sZ/lBfVda+X8yNzXlUdCGFiK4MSixCPCepZAzaZsI7/K + pHWsz47HljX7jEoNpa/kUcPbNTIwf5fSFbVaoFGgXGPlu25t3iFiyjWJOfVX/pzin/ + wXRG/9pPQ5XEQ== +From: Pierre-Jean Texier +To: u-boot@lists.denx.de +Date: Fri, 23 Aug 2019 23:03:19 +0200 +Message-Id: <1566594199-25314-5-git-send-email-pjtexier@koncepto.io> +X-Mailer: git-send-email 2.7.4 +In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, + philip@philipmolloy.com +Subject: [U-Boot] [PATCH 4/4] ci: add envtools support +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +MIME-Version: 1.0 +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This commit add envtools suppport to CI to verify if there +is no build issues. + +Signed-off-by: Pierre-Jean Texier +Acked-by: Heiko Schocher +--- + .gitlab-ci.yml | 7 +++++++ + .travis.yml | 4 ++++ + 2 files changed, 11 insertions(+) + +diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml +index 84e79bf..a1c5b4f 100644 +--- a/.gitlab-ci.yml ++++ b/.gitlab-ci.yml +@@ -145,6 +145,13 @@ Build tools-only: + script: + - make tools-only_config tools-only -j$(nproc) + ++# Ensure env tools build ++Build envtools: ++ tags: [ 'all' ] ++ stage: testsuites ++ script: ++ - make tools-only_config envtools -j$(nproc) ++ + Run binman, buildman, dtoc and patman testsuites: + tags: [ 'all' ] + stage: testsuites +diff --git a/.travis.yml b/.travis.yml +index d330dda..6adc754 100644 +--- a/.travis.yml ++++ b/.travis.yml +@@ -361,6 +361,10 @@ matrix: + - name: "Build tools-only" + script: + - make tools-only_config tools-only -j$(nproc) ++ # Ensure env tools build ++ - name: "Build envtools" ++ script: ++ - make tools-only_config envtools -j$(nproc) + + # test/py + - name: "test/py sandbox" diff --git a/uboot-tools.spec b/uboot-tools.spec index b2800cd..79cd6aa 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -26,6 +26,7 @@ Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch10: env-fix-build-error-for-envtools.patch BuildRequires: bc BuildRequires: dtc @@ -242,7 +243,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %files %doc README doc/imx doc/README.kwbimage doc/README.distro doc/README.gpt -%doc doc/README.odroid doc/README.rockchip doc/README.uefi doc/uImage.FIT doc/README.arm64 +%doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst %doc doc/README.chromium builds/docs/* %{_bindir}/* %{_mandir}/man1/mkimage.1* From b054e6bb422d944748242803556a4eca939ff6d3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 26 Aug 2019 13:02:45 +0100 Subject: [PATCH 037/351] Temporarily disable Chrome devices due to unexpected retirement of vboot-utils, python2-pyelftools re-written in something else --- env-fix-build-error-for-envtools.patch | 242 ++++++++++++++----------- uboot-tools.spec | 12 +- 2 files changed, 138 insertions(+), 116 deletions(-) diff --git a/env-fix-build-error-for-envtools.patch b/env-fix-build-error-for-envtools.patch index 6c563b1..d3e75be 100644 --- a/env-fix-build-error-for-envtools.patch +++ b/env-fix-build-error-for-envtools.patch @@ -1,9 +1,9 @@ -From patchwork Fri Aug 23 21:03:16 2019 +From patchwork Mon Aug 26 11:06:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1152434 +X-Patchwork-Id: 1153103 Return-Path: X-Original-To: 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Z+9c649IYaa9B3K3PAdhRoQ5lptYyVqLNrAffsabjbXQzrxyBcGEg5hRnleeede86M + 4HoWxUCDgE5EQ== From: Pierre-Jean Texier To: u-boot@lists.denx.de -Date: Fri, 23 Aug 2019 23:03:16 +0200 -Message-Id: <1566594199-25314-2-git-send-email-pjtexier@koncepto.io> +Date: Mon, 26 Aug 2019 13:06:15 +0200 +Message-Id: <1566817578-16750-2-git-send-email-pjtexier@koncepto.io> X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> -References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> +References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> MIME-Version: 1.0 Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, philip@philipmolloy.com -Subject: [U-Boot] [PATCH 1/4] fw_env: remove duplicated definitions +Subject: [U-Boot] [PATCH v2 1/4] fw_env: remove duplicated definitions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list @@ -97,8 +97,12 @@ include/env.h:62:2: note: previous definition of ‘ENV_REDUND_OBSOLETE’ was h ENV_REDUND_OBSOLETE = 0, Signed-off-by: Pierre-Jean Texier +Tested-by: Joris Offouga Tested-by: Heiko Schocher --- +v1 -> v2: + - None + tools/env/fw_env.c | 7 ------- 1 file changed, 7 deletions(-) @@ -121,12 +125,12 @@ index 95c9984..876bf2b 100644 #include -From patchwork Fri Aug 23 21:03:17 2019 +From patchwork Mon Aug 26 11:06:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1152435 +X-Patchwork-Id: 1153106 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -140,50 +144,50 @@ Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="t2Jp3XnT"; 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b=t2Jp3XnT4Ey+6E5wPqOGWDgmA1pvZqePipaMfSC5KSGsgfn44sKDCiX2+pYNXwKAY - DGEOt8Kvzy7BS2KzyWFFH5rKgjX5EU30Tq/+4oE/tPKPCyguVzLTX6jyvvFQgXeT0q - 1R7C7KDH6AUGiGsjoAjs3NFvo42kokk4f6IuWSUd7uUgDsd1YIHfLE4wnANk6SxP6e - yiqCppqBbsgV7CHu1gb+uxz2gccEX9SCU3Dkj/bGxMepPySe0NEfow34IvtOHspvp1 - uj9eJQ3LjuVA5XqXzbk4yHIALwgoH7QpSryDdHGjlYOVnVE4YFscKBDpS9XpzStLFZ - xL3WOZAJt/dJQ== + b=c5/r1UEA9buu4jObmZtyFpyrpiS53PaMZNrL4rMiyrbgACz9Mkdy2Z55vsSjmATqG + 7uTbEVjsPuqi/ECX2+8I9ozMGh72h4vosbfoak2jzAwHkC4ostork7ltSS2ahy7ZuO + CN0oXYk6/WA5mipEaQb6aaipBMd65Hm7hfN365ZHk5a8RBJD805QekonFLGUahFIP6 + J7bu7RkeQeCV5n3lqIPfYddP73Lfx4hNs5plSHs+xDT69dyfW7xBGp0qLEljRfw9VS + WD/O/BhsUWgQVVbQdludCJaYQgrkLYRUOjdiAA8zMCFYX7TnQT5wvzHDSQiZ0w+RDW + ClVzkMBJWfW4Q== From: Pierre-Jean Texier To: u-boot@lists.denx.de -Date: Fri, 23 Aug 2019 23:03:17 +0200 -Message-Id: <1566594199-25314-3-git-send-email-pjtexier@koncepto.io> +Date: Mon, 26 Aug 2019 13:06:16 +0200 +Message-Id: <1566817578-16750-3-git-send-email-pjtexier@koncepto.io> X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> -References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> +References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> MIME-Version: 1.0 Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, philip@philipmolloy.com -Subject: [U-Boot] [PATCH 2/4] fw_env: fix build error +Subject: [U-Boot] [PATCH v2 2/4] fw_env: fix build error X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list @@ -207,31 +211,44 @@ tools/env/fw_env.c:1149:25: error: lvalue required as unary ‘&’ operand Fixes: d3716dd ("env: Rename the redundancy flags") Signed-off-by: Pierre-Jean Texier +Tested-by: Joris Offouga Tested-by: Heiko Schocher +Suggested-by: Heiko Schocher --- - tools/env/fw_env.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) +v1 -> v2: + - fix fw_setenv with flag_obsolete (reported by Heiko Schocher) + + tools/env/fw_env.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c -index 876bf2b..b8b936f 100644 +index 876bf2b..e2801f5 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c -@@ -1146,7 +1146,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) +@@ -1135,6 +1135,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) + { + int rc; + struct erase_info_user erase; ++ char tmp = ENV_REDUND_OBSOLETE; + + erase.start = DEVOFFSET(dev); + erase.length = DEVESIZE(dev); +@@ -1146,7 +1147,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) return rc; } ioctl(fd, MEMUNLOCK, &erase); - rc = write(fd, &ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); -+ rc = write(fd, ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); ++ rc = write(fd, &tmp, sizeof(tmp)); ioctl(fd, MEMLOCK, &erase); if (rc < 0) perror("Could not set obsolete flag"); -From patchwork Fri Aug 23 21:03:18 2019 +From patchwork Mon Aug 26 11:06:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1152436 +X-Patchwork-Id: 1153105 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -245,50 +262,50 @@ Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="pjwIphoI"; dkim-atps=neutral + header.b="N3SBJxTS"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 46FYpN1t0Fz9s7T + by ozlabs.org (Postfix) with ESMTP id 46H8PF6lSpz9sBF for ; - Sat, 24 Aug 2019 07:05:48 +1000 (AEST) + Mon, 26 Aug 2019 21:08:01 +1000 (AEST) Received: by lists.denx.de (Postfix, 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b=N3SBJxTSaw0Cc/Af4mtNxZoxnO00iPmrwKFdSpv7Ivcye0Fvia3QcbbWuikUWWsvC + tJmF5PWGKgVlihn9XPEGhMKbhKWPGiBu/s2hlexR6DoJJxDf/8NmNTh8lpWjm4OvRM + PL7ZRhxs8bIN8CO+pKk+FwZswp8J/ox8Y65QcrmlG7eyLivK+/D87dI0GPVjeu68Am + 5LC+rYJKFB12qalI8b+QJHWZFyhx4yA6crHbz3ynfXYMFywXLz99bvj+3hiyadKuVA + HvY54Esmj1mVtaO9YeWOA0UseI6tI7NnFpFsDhXOHGjROrGPlGH+ZutRy00m1sfcZH + hb5LdaY/5drGg== From: Pierre-Jean Texier To: u-boot@lists.denx.de -Date: Fri, 23 Aug 2019 23:03:18 +0200 -Message-Id: <1566594199-25314-4-git-send-email-pjtexier@koncepto.io> +Date: Mon, 26 Aug 2019 13:06:17 +0200 +Message-Id: <1566817578-16750-4-git-send-email-pjtexier@koncepto.io> X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> -References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> +References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> MIME-Version: 1.0 Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, philip@philipmolloy.com -Subject: [U-Boot] [PATCH 3/4] env: add missing header file +Subject: [U-Boot] [PATCH v2 3/4] env: add missing header file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list @@ -319,8 +336,12 @@ include/env.h:158:49: error: unknown type name ‘ulong’; did you mean ‘long ulong env_get_ulong(const char *name, int base, ulong default_val); Signed-off-by: Pierre-Jean Texier +Tested-by: Joris Offouga Tested-by: Heiko Schocher --- +v1 -> v2: + - None + include/env.h | 1 + 1 file changed, 1 insertion(+) @@ -337,12 +358,12 @@ index a74a261..b72239f 100644 #include -From patchwork Fri Aug 23 21:03:19 2019 +From patchwork Mon Aug 26 11:06:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1152433 +X-Patchwork-Id: 1153104 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -356,49 +377,49 @@ Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="MLoR0pLn"; dkim-atps=neutral + header.b="HvNQuMmn"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 46FYnH1vcVz9s7T + by ozlabs.org (Postfix) with ESMTP id 46H8P275Mcz9sBF for ; - Sat, 24 Aug 2019 07:04:51 +1000 (AEST) + Mon, 26 Aug 2019 21:07:50 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) - id EA07BC22119; Fri, 23 Aug 2019 21:04:27 +0000 (UTC) + id A5445C22143; Mon, 26 Aug 2019 11:07:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no 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c=relaxed/simple; d=koncepto.io; - s=default; t=1566594240; - bh=Mc23EDVcZaZMYgrrKwCQSFQQ7Ha0pSbWk3NULDE15hk=; + s=default; t=1566817607; + bh=uZNRBSN4VpoP7mepjwChysqtnjGfdVboiTXTDe06LEU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=MLoR0pLn287FS4CiPTiVfu2Iqk3PldkFZkPW5rY0dTpiQFpSl15wRVyerSbmxDp1n - 4Erl2YMzlJwPQH/W1IuVqdYpsjX8/6qLUmK547M9G9meCW3aBy0yTsZYZ+oRFnh2cb - gI+jpjZkarOAsfTjMIpZoRSpkrys1TiWf2tJnwAnZNoze8FnGsdT7YyB9xniMekdmV - UhKOrY5eZTx/FyRfwVVB18sZ/lBfVda+X8yNzXlUdCGFiK4MSixCPCepZAzaZsI7/K - pHWsz47HljX7jEoNpa/kUcPbNTIwf5fSFbVaoFGgXGPlu25t3iFiyjWJOfVX/pzin/ - wXRG/9pPQ5XEQ== + b=HvNQuMmnrlCD9XJG0/ozSpYPRFnOXBTD8TUFjcv0J+z/nZt0lCcYuSgICWNwLzjkK + mOfgLxHOC5GAWv+jSVCNiL4NHnlsHtCWPTmwoWLHvuJMSopMyK/zbGkNKdiB0D5bAn + oc3cAuzUIex4yqSidWtEXN7uxYstmMRNOVyyacTKDCfTYwUDb+4RMbr62MZGXNQO26 + 0YShoLiU0geXqsu5IXy896mMWQejlZ6J14FiRN7ZD/cEHZGuPcFcophp4PgIMLnvJz + KW2AAdMo8YoYUznZ19vBEmJuEutoju0h0Bee+YH0/jtbTgH9XarZrO6ljyEV+gbrKt + W2vCG78kPreOQ== From: Pierre-Jean Texier To: u-boot@lists.denx.de -Date: Fri, 23 Aug 2019 23:03:19 +0200 -Message-Id: <1566594199-25314-5-git-send-email-pjtexier@koncepto.io> +Date: Mon, 26 Aug 2019 13:06:18 +0200 +Message-Id: <1566817578-16750-5-git-send-email-pjtexier@koncepto.io> X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> -References: <1566594199-25314-1-git-send-email-pjtexier@koncepto.io> +In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> +References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, philip@philipmolloy.com -Subject: [U-Boot] [PATCH 4/4] ci: add envtools support +Subject: [U-Boot] [PATCH v2 4/4] ci: add envtools support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list @@ -421,6 +442,9 @@ is no build issues. Signed-off-by: Pierre-Jean Texier Acked-by: Heiko Schocher --- +v1 -> v2: + - None + .gitlab-ci.yml | 7 +++++++ .travis.yml | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index 79cd6aa..faee16c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -44,15 +44,10 @@ BuildRequires: openssl-devel BuildRequires: python2-devel BuildRequires: python2-setuptools BuildRequires: python2-libfdt -%if 0%{?rhel} == 7 -BuildRequires: python-pyelftools -%else -BuildRequires: python2-pyelftools -%endif BuildRequires: SDL-devel BuildRequires: swig %ifarch %{arm} aarch64 -BuildRequires: vboot-utils +#BuildRequires: vboot-utils %endif %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 @@ -262,6 +257,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Aug 26 2019 Peter Robinson 2019.10-0.2-rc2 +- Temporarily disable Chrome devices due to unexpected retirement of vboot-utils + * Wed Aug 14 2019 Peter Robinson 2019.10-0.1-rc2 - 2019.10 RC2 From 55487ddec2eeaaed9f451d7d925104f50344e388 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 26 Aug 2019 15:18:21 +0100 Subject: [PATCH 038/351] fix build of Jetson Nano --- ARM-tegra-Add-NVIDIA-Jetson-Nano.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch index f4c7b96..2510a7f 100644 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch @@ -298,7 +298,7 @@ index 000000000000..432179e92605 + */ + +#include -+#include ++#include +#include +#include +#include From f00e59665fd8dd7cfd01a304b22427b908c9eaa0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 26 Aug 2019 17:11:19 +0100 Subject: [PATCH 039/351] Re-add accidentally dropped RPi4 patch --- Raspberry-Pi-32-64-support.patch | 1155 ++++++++++++++++++++++++++++++ uboot-tools.spec | 1 + 2 files changed, 1156 insertions(+) create mode 100644 Raspberry-Pi-32-64-support.patch diff --git a/Raspberry-Pi-32-64-support.patch b/Raspberry-Pi-32-64-support.patch new file mode 100644 index 0000000..38a094f --- /dev/null +++ b/Raspberry-Pi-32-64-support.patch @@ -0,0 +1,1155 @@ +From patchwork Wed Jul 24 14:39:04 2019 +Content-Type: text/plain; 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+ Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.33 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:04 +0100 +Message-Id: <20190724143911.29770-2-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 1/8] RPI: Add defconfigs for rpi4 (32/64) +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This defines a minimum defconfig for each of the two Raspberry Pi 4 +variants. One notable difference is that we don't have a embedded dt for +this board given that the fw supplies us with one which we can reuse. +Furthermore, the ram size is not queryable through mbox interface as the +maximum reported size is 1G. The fw patches the dt with the right +memory configuration and uboot uses it as it is. We avoid u-boot +touching this configuration by making sure CONFIG_ARCH_FIXUP_FDT_MEMORY +is deactivated. + +Signed-off-by: Andrei Gherzan +--- + configs/rpi_4_32b_defconfig | 33 +++++++++++++++++++++++++++++++++ + configs/rpi_4_defconfig | 33 +++++++++++++++++++++++++++++++++ + 2 files changed, 66 insertions(+) + create mode 100644 configs/rpi_4_32b_defconfig + create mode 100644 configs/rpi_4_defconfig + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +new file mode 100644 +index 0000000000..a31a617a5f +--- /dev/null ++++ b/configs/rpi_4_32b_defconfig +@@ -0,0 +1,33 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_BCM283X=y ++CONFIG_SYS_TEXT_BASE=0x00008000 ++CONFIG_TARGET_RPI_4_32B=y ++CONFIG_SYS_MALLOC_F_LEN=0x2000 ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_OF_BOARD=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_SYS_PROMPT="U-Boot> " ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_ENV_FAT_INTERFACE="mmc" ++CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++# CONFIG_REQUIRE_SERIAL_CONSOLE is not set ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_CONSOLE_SCROLL_LINES=10 ++CONFIG_PHYS_TO_BUS=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +new file mode 100644 +index 0000000000..da8c960a2a +--- /dev/null ++++ b/configs/rpi_4_defconfig +@@ -0,0 +1,33 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_BCM283X=y ++CONFIG_SYS_TEXT_BASE=0x00080000 ++CONFIG_TARGET_RPI_4=y ++CONFIG_SYS_MALLOC_F_LEN=0x2000 ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_OF_BOARD=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_SYS_PROMPT="U-Boot> " ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_ENV_FAT_INTERFACE="mmc" ++CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++# CONFIG_REQUIRE_SERIAL_CONSOLE is not set ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_CONSOLE_SCROLL_LINES=10 ++CONFIG_PHYS_TO_BUS=y ++CONFIG_OF_LIBFDT_OVERLAY=y + +From patchwork Wed Jul 24 14:39:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136357 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tygm6ldWz9s3l + for ; + Thu, 25 Jul 2019 00:40:36 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 9DA33C21CB6; Wed, 24 Jul 2019 14:39:59 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 17CAEC21D8E; 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+ Wed, 24 Jul 2019 07:39:35 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.34 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:34 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:05 +0100 +Message-Id: <20190724143911.29770-3-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 2/8] ARM: bcm283x: Add BCM283x_BASE define +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +From: Matthias Brugger + +Devices of bcm283x have different base address, depending if they are on +bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to +build and only add the offset in the header files. + +Signed-off-by: Matthias Brugger +Signed-off-by: Andrei Gherzan +--- + arch/arm/mach-bcm283x/Kconfig | 5 +++++ + arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- + arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- + 5 files changed, 9 insertions(+), 20 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 3eb5a9a897..8e69914a83 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -141,4 +141,9 @@ config SYS_SOC + config SYS_CONFIG_NAME + default "rpi" + ++config BCM283x_BASE ++ hex ++ default "0x20000000" if BCM2835 ++ default "0x3f000000" if BCM2836 || BCM2837 ++ + endmenu +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index e3a893e49c..e44c7577da 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -37,11 +37,7 @@ + + /* Raw mailbox HW */ + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_MBOX_PHYSADDR 0x3f00b880 +-#else +-#define BCM2835_MBOX_PHYSADDR 0x2000b880 +-#endif ++#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880) + + struct bcm2835_mbox_regs { + u32 read; +diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h +index 5cb6ec3340..b443c379d8 100644 +--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h ++++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_SDHCI_H_ + #define _BCM2835_SDHCI_H_ + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_SDHCI_BASE 0x3f300000 +-#else +-#define BCM2835_SDHCI_BASE 0x20300000 +-#endif ++#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000) + + int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); + +diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h +index 56b0c356bb..014355e759 100644 +--- a/arch/arm/mach-bcm283x/include/mach/timer.h ++++ b/arch/arm/mach-bcm283x/include/mach/timer.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_TIMER_H + #define _BCM2835_TIMER_H + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_TIMER_PHYSADDR 0x3f003000 +-#else +-#define BCM2835_TIMER_PHYSADDR 0x20003000 +-#endif ++#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000) + + #define BCM2835_TIMER_CS_M3 (1 << 3) + #define BCM2835_TIMER_CS_M2 (1 << 2) +diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h +index 99c88e5df7..8292b3cf1f 100644 +--- a/arch/arm/mach-bcm283x/include/mach/wdog.h ++++ b/arch/arm/mach-bcm283x/include/mach/wdog.h +@@ -6,11 +6,7 @@ + #ifndef _BCM2835_WDOG_H + #define _BCM2835_WDOG_H + +-#ifndef CONFIG_BCM2835 +-#define BCM2835_WDOG_PHYSADDR 0x3f100000 +-#else +-#define BCM2835_WDOG_PHYSADDR 0x20100000 +-#endif ++#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000) + + struct bcm2835_wdog_regs { + u32 unknown0[7]; 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+ Wed, 24 Jul 2019 07:39:36 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.35 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:35 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:06 +0100 +Message-Id: <20190724143911.29770-4-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 3/8] ARM: bcm283x: Define configs for RaspberryPi 4 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Define two target configs for Raspberry Pi 4 (32 and 64bit) and the +corresponding BCM2838* configs. + +Be aware of the current limitation in firmware which requires an +explicit configuration to force the arm in 64bit mode when the +respective target is used. + +Signed-off-by: Andrei Gherzan +Signed-off-by: Matthias Brugger +--- + arch/arm/mach-bcm283x/Kconfig | 62 +++++++++++++++++++++++++++++++++++ + 1 file changed, 62 insertions(+) + +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 8e69914a83..09a5b42bbb 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -26,6 +26,23 @@ config BCM2837_64B + select BCM2837 + select ARM64 + ++config BCM2838 ++ bool "Broadcom BCM2838 SoC support" ++ depends on ARCH_BCM283X ++ ++config BCM2838_32B ++ bool "Broadcom BCM2838 SoC 32-bit support" ++ depends on ARCH_BCM283X ++ select BCM2838 ++ select ARMV7_LPAE ++ select CPU_V7A ++ ++config BCM2838_64B ++ bool "Broadcom BCM2838 SoC 64-bit support" ++ depends on ARCH_BCM283X ++ select BCM2838 ++ select ARM64 ++ + menu "Broadcom BCM283X family" + depends on ARCH_BCM283X + +@@ -127,6 +144,50 @@ config TARGET_RPI_3 + This option creates a build targeting the ARMv8/AArch64 ISA. + select BCM2837_64B + ++config TARGET_RPI_4_32B ++ bool "Raspberry Pi 4 32-bit build" ++ help ++ Support for all BCM2838-based Raspberry Pi variants, such as ++ the RPi 4 model B, in AArch32 (32-bit) mode. ++ ++ This option assumes the VideoCore firmware is configured to use the ++ mini UART (rather than PL011) for the serial console. This is the ++ default on the RPi 4. To enable the UART console, the following non- ++ default option must be present in config.txt: enable_uart=1. This is ++ required for U-Boot to operate correctly, even if you only care ++ about the HDMI/usbkbd console. ++ ++ Due to hardware incompatibilities, this can't be used with ++ BCM283/5/6/7. ++ ++ This option creates a build targeting the ARMv7/AArch32 ISA. ++ select BCM2838_32B ++ ++config TARGET_RPI_4 ++ bool "Raspberry Pi 4 64-bit build" ++ help ++ Support for all BCM2838-based Raspberry Pi variants, such as ++ the RPi 4 model B, in AArch64 (64-bit) mode. ++ ++ This option assumes the VideoCore firmware is configured to use the ++ mini UART (rather than PL011) for the serial console. This is the ++ default on the RPi 4. To enable the UART console, the following non- ++ default option must be present in config.txt: enable_uart=1. This is ++ required for U-Boot to operate correctly, even if you only care ++ about the HDMI/usbkbd console. ++ ++ Due to hardware incompatibilities, this can't be used with ++ BCM283/5/6/7. ++ ++ Also, due to a bug in firmware, switching to 64bit mode doesn't ++ happen automatically based on the kernel's image filename. See ++ https://github.com/raspberrypi/firmware/issues/1193 for more details. ++ Until that is resolved, the configuration (config.txt) needs to ++ explicitly set: arm_64bit=1. ++ ++ This option creates a build targeting the ARMv8/AArch64 ISA. ++ select BCM2838_64B ++ + endchoice + + config SYS_BOARD +@@ -145,5 +206,6 @@ config BCM283x_BASE + hex + default "0x20000000" if BCM2835 + default "0x3f000000" if BCM2836 || BCM2837 ++ default "0xfe000000" if BCM2838 + + endmenu + +From patchwork Wed Jul 24 14:39:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136366 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 45tyjX1rBvz9s3l + for ; + Thu, 25 Jul 2019 00:42:08 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id F1D99C21CB6; Wed, 24 Jul 2019 14:40:11 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 + autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 937A0C21D65; + Wed, 24 Jul 2019 14:39:51 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 748BCC21C2F; Wed, 24 Jul 2019 14:39:40 +0000 (UTC) +Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com + [209.85.128.68]) + by lists.denx.de (Postfix) with ESMTPS id CE175C21C29 + for ; Wed, 24 Jul 2019 14:39:37 +0000 (UTC) +Received: by mail-wm1-f68.google.com with SMTP id a15so42072601wmj.5 + for ; Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to + :references:mime-version:content-transfer-encoding; + bh=u/X0NAp+r55Bugx2HDgeaVfXBeYCSiyWcV7zL0w2yXE=; + b=meBOAW1SzAbuPxzp+nYt716FpccdfeH1Xh3xWr+zMzkGW0O6P+hkYAjOsYmnzj/5rX + WNazbP1wNvSVBowPChoHa1zwn2I8PhxW9EDSfNkECgfLCYdPettoGRQ94zsUSZAkp4dD + FJkwXFsPDQX4UoFpLxN7fhbkYqdcezpK7kv2ijiYnQR9z/RfadD4yVQHLYt+M6UsmWph + FjXmBWf8Dqj0HniyCpAFBQclBp2LF6Cf3teLv0SKjJfkyJnfnB2D26Sig1t5Z1JIRw8h + +2J1FXpChqug7KpnKuQNHWz1P/yhSY/b+dPHkLABO1yCQ9N5+IvUCw+KXXd8o3RtpwuS + UnjA== +X-Gm-Message-State: APjAAAULyjSTt+VemoBBXMausXImPmWbP6ymxMkyPmdzjRXNS/pvDSjw + SvFvIJXwqw2UxgfJbVQsZf3L04kE +X-Google-Smtp-Source: APXvYqwDVdWVyjv8DnkgBTqEwcrcxXXF1Xof6TjgZnG7RMtXzWC3l2a8f4Awp1bVLNcspHnduMBWqg== +X-Received: by 2002:a1c:a909:: with SMTP id s9mr74064408wme.20.1563979177108; + Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.36 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:36 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:07 +0100 +Message-Id: <20190724143911.29770-5-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 4/8] RPI: Add entry for Raspberry Pi 4 model B +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +The Raspebrry Pi 4 uses the new revision code scheme as documented by +the foundation. This change adds an entry for this board as well. + +Signed-off-by: Andrei Gherzan +--- + board/raspberrypi/rpi/rpi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 617c892dde..6d6f1ef39a 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2837-rpi-cm3.dtb", + false, + }, ++ [0x11] = { ++ "4 Model B", ++ DTB_DIR "bcm2711-rpi-4-b.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { + +From patchwork Wed Jul 24 14:39:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136373 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.37 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:37 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:08 +0100 +Message-Id: <20190724143911.29770-6-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 5/8] ARM: bcm283x: Include definition for + additional emmc clock +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This clock has a different mbox ID so have this included in the relevant +header file. + +Signed-off-by: Andrei Gherzan +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index e44c7577da..f2a98acddd 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -230,6 +230,7 @@ struct bcm2835_mbox_tag_set_power_state { + #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 + #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 + #define BCM2835_MBOX_CLOCK_ID_PWM 10 ++#define BCM2835_MBOX_CLOCK_ID_EMMC2 12 + + struct bcm2835_mbox_tag_get_clock_rate { + struct bcm2835_mbox_tag_hdr tag_hdr; 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+ Wed, 24 Jul 2019 07:39:39 -0700 (PDT) +Received: from localhost.localdomain ([212.36.34.46]) + by smtp.gmail.com with ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.38 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:38 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:09 +0100 +Message-Id: <20190724143911.29770-7-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 6/8] mmc: bcm283x: Add support for bcm2711 + device in bcm2835_sdhci +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +From: Matthias Brugger + +The bcm2711 has two emmc controllers. The difference is the clocks +they use. Add support for the second emmc controller. + +Signed-off-by: Matthias Brugger +Signed-off-by: Andrei Gherzan +--- + drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c +index 08bddd410e..e68dec3be7 100644 +--- a/drivers/mmc/bcm2835_sdhci.c ++++ b/drivers/mmc/bcm2835_sdhci.c +@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + fdt_addr_t base; + int emmc_freq; + int ret; ++ int clock_id = (int)dev_get_driver_data(dev); + + base = devfdt_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + +- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); ++ ret = bcm2835_get_mmc_clock(clock_id); + if (ret < 0) { + debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); + return ret; +@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + } + + static const struct udevice_id bcm2835_sdhci_match[] = { +- { .compatible = "brcm,bcm2835-sdhci" }, ++ { ++ .compatible = "brcm,bcm2835-sdhci", ++ .data = BCM2835_MBOX_CLOCK_ID_EMMC ++ }, ++ { ++ .compatible = "brcm,bcm2711-emmc2", ++ .data = BCM2835_MBOX_CLOCK_ID_EMMC2 ++ }, + { /* sentinel */ } + }; + + +From patchwork Wed Jul 24 14:39:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136369 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 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ESMTPSA id + n14sm84860651wra.75.2019.07.24.07.39.39 + (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); + Wed, 24 Jul 2019 07:39:39 -0700 (PDT) +From: Andrei Gherzan +To: u-boot@lists.denx.de +Date: Wed, 24 Jul 2019 15:39:10 +0100 +Message-Id: <20190724143911.29770-8-andrei@balena.io> +X-Mailer: git-send-email 2.22.0 +In-Reply-To: <20190724143911.29770-1-andrei@balena.io> +References: <20190716133803.1174-1-andrei@gherzan.ro> + <20190724143911.29770-1-andrei@balena.io> +MIME-Version: 1.0 +Cc: mbrugger@suse.com, Andrei Gherzan +Subject: [U-Boot] [PATCH v2 7/8] RPI: Add memory map for bcm2838 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Content-Type: text/plain; charset="utf-8" +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Define the memory map for the BCM2838 based on the dt configuration +available in the Raspberry Pi kernel fork. + +Signed-off-by: Andrei Gherzan +--- + board/raspberrypi/rpi/rpi.c | 27 ++++++++++++++++++++++++--- + 1 file changed, 24 insertions(+), 3 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 6d6f1ef39a..1c4fae9166 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -249,7 +249,8 @@ static uint32_t rev_type; + static const struct rpi_model *model; + + #ifdef CONFIG_ARM64 +-static struct mm_region bcm2837_mem_map[] = { ++#ifndef CONFIG_BCM2838 ++static struct mm_region bcm283x_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -268,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = { + 0, + } + }; +- +-struct mm_region *mem_map = bcm2837_mem_map; ++#else ++static struct mm_region bcm283x_mem_map[] = { ++ { ++ .virt = 0x00000000UL, ++ .phys = 0x00000000UL, ++ .size = 0xfe000000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | ++ PTE_BLOCK_INNER_SHARE ++ }, { ++ .virt = 0xfe000000UL, ++ .phys = 0xfe000000UL, ++ .size = 0x01800000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { ++ /* List terminator */ ++ 0, ++ } ++}; ++#endif ++struct mm_region *mem_map = bcm283x_mem_map; + #endif + + int dram_init(void) + +From patchwork Wed Jul 24 14:39:11 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andrei Gherzan +X-Patchwork-Id: 1136370 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=balena.io +Received: from lists.denx.de (dione.denx.de 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Andrei Gherzan +Acked-by: Matthias Brugger +--- + doc/git-mailrc | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/doc/git-mailrc b/doc/git-mailrc +index a63b76befc..68110e1963 100644 +--- a/doc/git-mailrc ++++ b/doc/git-mailrc +@@ -35,6 +35,7 @@ alias mariosix Mario Six + alias masahiro Masahiro Yamada + alias mateusz Mateusz Kulikowski + alias maxime Maxime Ripard ++alias mbrugger Matthias Brugger + alias monstr Michal Simek + alias prom Minkyu Kang + alias ptomsich Philipp Tomsich +@@ -74,6 +75,9 @@ alias uniphier uboot, masahiro + alias zynq uboot, monstr + alias rockchip uboot, sjg, kevery, ptomsich + ++alias bcm283x uboot,mbrugger ++alias rpi uboot,mbrugger ++ + alias m68k uboot, alisonwang, angelo_ts + alias coldfire m68k + diff --git a/uboot-tools.spec b/uboot-tools.spec index faee16c..379c34f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -27,6 +27,7 @@ Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch10: env-fix-build-error-for-envtools.patch +Patch11: Raspberry-Pi-32-64-support.patch BuildRequires: bc BuildRequires: dtc From ae1a05f516e15713e5973ff30c2c6229167e9083 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 27 Aug 2019 08:19:50 +0100 Subject: [PATCH 040/351] 2019.10 rc3 --- sources | 2 +- uboot-tools.spec | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/sources b/sources index e52d8c7..a0d1eae 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.10-rc2.tar.bz2) = 5a9173a1bd945736c8e0c1797b4c8fdd9833fc4e04d6b0e562c2018884da9bc10c110231b690450fb2761e19cd19ab24fc8744000c901f416ba2936c8278799e +SHA512 (u-boot-2019.10-rc3.tar.bz2) = 598a6637fdbd62f30a3c4f73f0e89022c6c92b9ec93f4c4215547f54493ff17b2a0b127328ad6e1561e451b3cddca89f168f8adfe4cc59f8125fc70787d8cf4c diff --git a/uboot-tools.spec b/uboot-tools.spec index 379c34f..e192054 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2019.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -48,7 +48,7 @@ BuildRequires: python2-libfdt BuildRequires: SDL-devel BuildRequires: swig %ifarch %{arm} aarch64 -#BuildRequires: vboot-utils +BuildRequires: vboot-utils %endif %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 @@ -258,6 +258,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Aug 27 2019 Peter Robinson 2019.10-0.3-rc3 +- 2019.10 RC3 + * Mon Aug 26 2019 Peter Robinson 2019.10-0.2-rc2 - Temporarily disable Chrome devices due to unexpected retirement of vboot-utils From 28ed29c8ec3cd2757c03c246481fd6bde023926f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 27 Aug 2019 09:09:56 +0100 Subject: [PATCH 041/351] easylogo was dropped --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index e192054..cc13f9d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -204,7 +204,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ done %endif -for tool in bmp_logo dumpimage easylogo/easylogo env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes +for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes do install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir} done From 2984010404cdeec094ba941281ae9eb3bbafed30 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 27 Aug 2019 10:02:52 +0100 Subject: [PATCH 042/351] enable roc-rk3399-pc --- aarch64-boards | 1 + 1 file changed, 1 insertion(+) diff --git a/aarch64-boards b/aarch64-boards index f6a2000..7d8ae79 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -49,6 +49,7 @@ rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 +roc-rk3399-pc rpi_3 rpi_4 sopine_baseboard From 5786b075f8aeea4902af99e73a0735840ed48052 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 27 Aug 2019 11:50:20 +0100 Subject: [PATCH 043/351] fennec-rk3288 was dropped --- arm-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/arm-boards b/arm-boards index 76af0e2..0afa009 100644 --- a/arm-boards +++ b/arm-boards @@ -39,7 +39,6 @@ db-mv784mp-gp difrnce_dit4350 dserve_dsrv9703c evb-rk3229 -fennec-rk3288 firefly-rk3288 helios4 Hummingbird_A31 From 13e776d8d6714a4bc9df110e12885bf284977fef Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 11 Sep 2019 10:34:41 +0100 Subject: [PATCH 044/351] Minor fixes --- uboot-tools.spec | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index cc13f9d..37896e2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -44,7 +44,7 @@ BuildRequires: flex bison BuildRequires: openssl-devel BuildRequires: python2-devel BuildRequires: python2-setuptools -BuildRequires: python2-libfdt +#BuildRequires: python2-libfdt BuildRequires: SDL-devel BuildRequires: swig %ifarch %{arm} aarch64 @@ -258,6 +258,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Sep 11 2019 Peter Robinson 2019.10-0.4-rc3 +- Minor fixes + * Tue Aug 27 2019 Peter Robinson 2019.10-0.3-rc3 - 2019.10 RC3 From 7f0a3a4eaa18a9246e4b70f2baf02c5dc18cccb1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 23 Sep 2019 17:42:39 +0100 Subject: [PATCH 045/351] 2019.10 RC4 --- Raspberry-Pi-32-64-support.patch | 1155 ------------------------------ sources | 2 +- uboot-tools.spec | 8 +- 3 files changed, 6 insertions(+), 1159 deletions(-) delete mode 100644 Raspberry-Pi-32-64-support.patch diff --git a/Raspberry-Pi-32-64-support.patch b/Raspberry-Pi-32-64-support.patch deleted file mode 100644 index 38a094f..0000000 --- a/Raspberry-Pi-32-64-support.patch +++ /dev/null @@ -1,1155 +0,0 @@ -From patchwork Wed Jul 24 14:39:04 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136358 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - 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APXvYqxJiPSQ9vd5GlT71/+cluS1CRb303VcbpLDq5FS1UdhoChDRrXDGMI6wz5akinycJIMwNQZrg== -X-Received: by 2002:adf:f3d1:: with SMTP id g17mr58097903wrp.38.1563979174441; - Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.33 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:04 +0100 -Message-Id: <20190724143911.29770-2-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 1/8] RPI: Add defconfigs for rpi4 (32/64) -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This defines a minimum defconfig for each of the two Raspberry Pi 4 -variants. One notable difference is that we don't have a embedded dt for -this board given that the fw supplies us with one which we can reuse. -Furthermore, the ram size is not queryable through mbox interface as the -maximum reported size is 1G. The fw patches the dt with the right -memory configuration and uboot uses it as it is. We avoid u-boot -touching this configuration by making sure CONFIG_ARCH_FIXUP_FDT_MEMORY -is deactivated. - -Signed-off-by: Andrei Gherzan ---- - configs/rpi_4_32b_defconfig | 33 +++++++++++++++++++++++++++++++++ - configs/rpi_4_defconfig | 33 +++++++++++++++++++++++++++++++++ - 2 files changed, 66 insertions(+) - create mode 100644 configs/rpi_4_32b_defconfig - create mode 100644 configs/rpi_4_defconfig - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -new file mode 100644 -index 0000000000..a31a617a5f ---- /dev/null -+++ b/configs/rpi_4_32b_defconfig -@@ -0,0 +1,33 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00008000 -+CONFIG_TARGET_RPI_4_32B=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_OF_BOARD=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -new file mode 100644 -index 0000000000..da8c960a2a ---- /dev/null -+++ b/configs/rpi_4_defconfig -@@ -0,0 +1,33 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00080000 -+CONFIG_TARGET_RPI_4=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_OF_BOARD=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y - -From patchwork Wed Jul 24 14:39:05 2019 -Content-Type: text/plain; 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- Wed, 24 Jul 2019 07:39:35 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.34 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:34 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:05 +0100 -Message-Id: <20190724143911.29770-3-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 2/8] ARM: bcm283x: Add BCM283x_BASE define -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -From: Matthias Brugger - -Devices of bcm283x have different base address, depending if they are on -bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to -build and only add the offset in the header files. - -Signed-off-by: Matthias Brugger -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/Kconfig | 5 +++++ - arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- - arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- - 5 files changed, 9 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 3eb5a9a897..8e69914a83 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -141,4 +141,9 @@ config SYS_SOC - config SYS_CONFIG_NAME - default "rpi" - -+config BCM283x_BASE -+ hex -+ default "0x20000000" if BCM2835 -+ default "0x3f000000" if BCM2836 || BCM2837 -+ - endmenu -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index e3a893e49c..e44c7577da 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -37,11 +37,7 @@ - - /* Raw mailbox HW */ - --#ifndef CONFIG_BCM2835 --#define BCM2835_MBOX_PHYSADDR 0x3f00b880 --#else --#define BCM2835_MBOX_PHYSADDR 0x2000b880 --#endif -+#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880) - - struct bcm2835_mbox_regs { - u32 read; -diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h -index 5cb6ec3340..b443c379d8 100644 ---- a/arch/arm/mach-bcm283x/include/mach/sdhci.h -+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_SDHCI_H_ - #define _BCM2835_SDHCI_H_ - --#ifndef CONFIG_BCM2835 --#define BCM2835_SDHCI_BASE 0x3f300000 --#else --#define BCM2835_SDHCI_BASE 0x20300000 --#endif -+#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000) - - int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); - -diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h -index 56b0c356bb..014355e759 100644 ---- a/arch/arm/mach-bcm283x/include/mach/timer.h -+++ b/arch/arm/mach-bcm283x/include/mach/timer.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_TIMER_H - #define _BCM2835_TIMER_H - --#ifndef CONFIG_BCM2835 --#define BCM2835_TIMER_PHYSADDR 0x3f003000 --#else --#define BCM2835_TIMER_PHYSADDR 0x20003000 --#endif -+#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000) - - #define BCM2835_TIMER_CS_M3 (1 << 3) - #define BCM2835_TIMER_CS_M2 (1 << 2) -diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h -index 99c88e5df7..8292b3cf1f 100644 ---- a/arch/arm/mach-bcm283x/include/mach/wdog.h -+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h -@@ -6,11 +6,7 @@ - #ifndef _BCM2835_WDOG_H - #define _BCM2835_WDOG_H - --#ifndef CONFIG_BCM2835 --#define BCM2835_WDOG_PHYSADDR 0x3f100000 --#else --#define BCM2835_WDOG_PHYSADDR 0x20100000 --#endif -+#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000) - - struct bcm2835_wdog_regs { - u32 unknown0[7]; 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- Wed, 24 Jul 2019 07:39:36 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.35 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:35 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:06 +0100 -Message-Id: <20190724143911.29770-4-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 3/8] ARM: bcm283x: Define configs for RaspberryPi 4 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Define two target configs for Raspberry Pi 4 (32 and 64bit) and the -corresponding BCM2838* configs. - -Be aware of the current limitation in firmware which requires an -explicit configuration to force the arm in 64bit mode when the -respective target is used. - -Signed-off-by: Andrei Gherzan -Signed-off-by: Matthias Brugger ---- - arch/arm/mach-bcm283x/Kconfig | 62 +++++++++++++++++++++++++++++++++++ - 1 file changed, 62 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 8e69914a83..09a5b42bbb 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -26,6 +26,23 @@ config BCM2837_64B - select BCM2837 - select ARM64 - -+config BCM2838 -+ bool "Broadcom BCM2838 SoC support" -+ depends on ARCH_BCM283X -+ -+config BCM2838_32B -+ bool "Broadcom BCM2838 SoC 32-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARMV7_LPAE -+ select CPU_V7A -+ -+config BCM2838_64B -+ bool "Broadcom BCM2838 SoC 64-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARM64 -+ - menu "Broadcom BCM283X family" - depends on ARCH_BCM283X - -@@ -127,6 +144,50 @@ config TARGET_RPI_3 - This option creates a build targeting the ARMv8/AArch64 ISA. - select BCM2837_64B - -+config TARGET_RPI_4_32B -+ bool "Raspberry Pi 4 32-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch32 (32-bit) mode. -+ -+ This option assumes the VideoCore firmware is configured to use the -+ mini UART (rather than PL011) for the serial console. This is the -+ default on the RPi 4. To enable the UART console, the following non- -+ default option must be present in config.txt: enable_uart=1. This is -+ required for U-Boot to operate correctly, even if you only care -+ about the HDMI/usbkbd console. -+ -+ Due to hardware incompatibilities, this can't be used with -+ BCM283/5/6/7. -+ -+ This option creates a build targeting the ARMv7/AArch32 ISA. -+ select BCM2838_32B -+ -+config TARGET_RPI_4 -+ bool "Raspberry Pi 4 64-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch64 (64-bit) mode. -+ -+ This option assumes the VideoCore firmware is configured to use the -+ mini UART (rather than PL011) for the serial console. This is the -+ default on the RPi 4. To enable the UART console, the following non- -+ default option must be present in config.txt: enable_uart=1. This is -+ required for U-Boot to operate correctly, even if you only care -+ about the HDMI/usbkbd console. -+ -+ Due to hardware incompatibilities, this can't be used with -+ BCM283/5/6/7. -+ -+ Also, due to a bug in firmware, switching to 64bit mode doesn't -+ happen automatically based on the kernel's image filename. See -+ https://github.com/raspberrypi/firmware/issues/1193 for more details. -+ Until that is resolved, the configuration (config.txt) needs to -+ explicitly set: arm_64bit=1. -+ -+ This option creates a build targeting the ARMv8/AArch64 ISA. -+ select BCM2838_64B -+ - endchoice - - config SYS_BOARD -@@ -145,5 +206,6 @@ config BCM283x_BASE - hex - default "0x20000000" if BCM2835 - default "0x3f000000" if BCM2836 || BCM2837 -+ default "0xfe000000" if BCM2838 - - endmenu - -From patchwork Wed Jul 24 14:39:07 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136366 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyjX1rBvz9s3l - for ; - Thu, 25 Jul 2019 00:42:08 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id F1D99C21CB6; Wed, 24 Jul 2019 14:40:11 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 937A0C21D65; - Wed, 24 Jul 2019 14:39:51 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id 748BCC21C2F; Wed, 24 Jul 2019 14:39:40 +0000 (UTC) -Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com - [209.85.128.68]) - by lists.denx.de (Postfix) with ESMTPS id CE175C21C29 - for ; Wed, 24 Jul 2019 14:39:37 +0000 (UTC) -Received: by mail-wm1-f68.google.com with SMTP id a15so42072601wmj.5 - for ; Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=u/X0NAp+r55Bugx2HDgeaVfXBeYCSiyWcV7zL0w2yXE=; - b=meBOAW1SzAbuPxzp+nYt716FpccdfeH1Xh3xWr+zMzkGW0O6P+hkYAjOsYmnzj/5rX - WNazbP1wNvSVBowPChoHa1zwn2I8PhxW9EDSfNkECgfLCYdPettoGRQ94zsUSZAkp4dD - FJkwXFsPDQX4UoFpLxN7fhbkYqdcezpK7kv2ijiYnQR9z/RfadD4yVQHLYt+M6UsmWph - FjXmBWf8Dqj0HniyCpAFBQclBp2LF6Cf3teLv0SKjJfkyJnfnB2D26Sig1t5Z1JIRw8h - +2J1FXpChqug7KpnKuQNHWz1P/yhSY/b+dPHkLABO1yCQ9N5+IvUCw+KXXd8o3RtpwuS - UnjA== -X-Gm-Message-State: APjAAAULyjSTt+VemoBBXMausXImPmWbP6ymxMkyPmdzjRXNS/pvDSjw - SvFvIJXwqw2UxgfJbVQsZf3L04kE -X-Google-Smtp-Source: APXvYqwDVdWVyjv8DnkgBTqEwcrcxXXF1Xof6TjgZnG7RMtXzWC3l2a8f4Awp1bVLNcspHnduMBWqg== -X-Received: by 2002:a1c:a909:: with SMTP id s9mr74064408wme.20.1563979177108; - Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.36 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:36 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:07 +0100 -Message-Id: <20190724143911.29770-5-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 4/8] RPI: Add entry for Raspberry Pi 4 model B -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -The Raspebrry Pi 4 uses the new revision code scheme as documented by -the foundation. This change adds an entry for this board as well. - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 617c892dde..6d6f1ef39a 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2837-rpi-cm3.dtb", - false, - }, -+ [0x11] = { -+ "4 Model B", -+ DTB_DIR "bcm2711-rpi-4-b.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { - -From patchwork Wed Jul 24 14:39:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136373 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.37 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:37 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:08 +0100 -Message-Id: <20190724143911.29770-6-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 5/8] ARM: bcm283x: Include definition for - additional emmc clock -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This clock has a different mbox ID so have this included in the relevant -header file. - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index e44c7577da..f2a98acddd 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -230,6 +230,7 @@ struct bcm2835_mbox_tag_set_power_state { - #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 - #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 - #define BCM2835_MBOX_CLOCK_ID_PWM 10 -+#define BCM2835_MBOX_CLOCK_ID_EMMC2 12 - - struct bcm2835_mbox_tag_get_clock_rate { - struct bcm2835_mbox_tag_hdr tag_hdr; - -From patchwork Wed Jul 24 14:39:09 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136365 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyjV5JXbz9sBF - for ; - Thu, 25 Jul 2019 00:42:06 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 77213C21C27; Wed, 24 Jul 2019 14:40:36 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A24EDC21DB5; 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- Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.38 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:38 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:09 +0100 -Message-Id: <20190724143911.29770-7-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 6/8] mmc: bcm283x: Add support for bcm2711 - device in bcm2835_sdhci -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -From: Matthias Brugger - -The bcm2711 has two emmc controllers. The difference is the clocks -they use. Add support for the second emmc controller. - -Signed-off-by: Matthias Brugger -Signed-off-by: Andrei Gherzan ---- - drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c -index 08bddd410e..e68dec3be7 100644 ---- a/drivers/mmc/bcm2835_sdhci.c -+++ b/drivers/mmc/bcm2835_sdhci.c -@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - fdt_addr_t base; - int emmc_freq; - int ret; -+ int clock_id = (int)dev_get_driver_data(dev); - - base = devfdt_get_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - -- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); -+ ret = bcm2835_get_mmc_clock(clock_id); - if (ret < 0) { - debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); - return ret; -@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - } - - static const struct udevice_id bcm2835_sdhci_match[] = { -- { .compatible = "brcm,bcm2835-sdhci" }, -+ { -+ .compatible = "brcm,bcm2835-sdhci", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC -+ }, -+ { -+ .compatible = "brcm,bcm2711-emmc2", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC2 -+ }, - { /* sentinel */ } - }; - - -From patchwork Wed Jul 24 14:39:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136369 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=balena.io -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 45tyk04V3zz9s3l - for ; - Thu, 25 Jul 2019 00:42:32 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 47E81C21DD3; Wed, 24 Jul 2019 14:41:08 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2 - autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A7B62C21C93; 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- Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.39 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:39 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:10 +0100 -Message-Id: <20190724143911.29770-8-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 7/8] RPI: Add memory map for bcm2838 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Define the memory map for the BCM2838 based on the dt configuration -available in the Raspberry Pi kernel fork. - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 27 ++++++++++++++++++++++++--- - 1 file changed, 24 insertions(+), 3 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6d6f1ef39a..1c4fae9166 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -249,7 +249,8 @@ static uint32_t rev_type; - static const struct rpi_model *model; - - #ifdef CONFIG_ARM64 --static struct mm_region bcm2837_mem_map[] = { -+#ifndef CONFIG_BCM2838 -+static struct mm_region bcm283x_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -268,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = { - 0, - } - }; -- --struct mm_region *mem_map = bcm2837_mem_map; -+#else -+static struct mm_region bcm283x_mem_map[] = { -+ { -+ .virt = 0x00000000UL, -+ .phys = 0x00000000UL, -+ .size = 0xfe000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | -+ PTE_BLOCK_INNER_SHARE -+ }, { -+ .virt = 0xfe000000UL, -+ .phys = 0xfe000000UL, -+ .size = 0x01800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* List terminator */ -+ 0, -+ } -+}; -+#endif -+struct mm_region *mem_map = bcm283x_mem_map; - #endif - - int dram_init(void) - -From patchwork Wed Jul 24 14:39:11 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andrei Gherzan -X-Patchwork-Id: 1136370 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Wed, 24 Jul 2019 07:39:40 -0700 (PDT) -Received: from localhost.localdomain ([212.36.34.46]) - by smtp.gmail.com with ESMTPSA id - n14sm84860651wra.75.2019.07.24.07.39.40 - (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); - Wed, 24 Jul 2019 07:39:40 -0700 (PDT) -From: Andrei Gherzan -To: u-boot@lists.denx.de -Date: Wed, 24 Jul 2019 15:39:11 +0100 -Message-Id: <20190724143911.29770-9-andrei@balena.io> -X-Mailer: git-send-email 2.22.0 -In-Reply-To: <20190724143911.29770-1-andrei@balena.io> -References: <20190716133803.1174-1-andrei@gherzan.ro> - <20190724143911.29770-1-andrei@balena.io> -MIME-Version: 1.0 -Cc: mbrugger@suse.com, Andrei Gherzan -Subject: [U-Boot] [PATCH v2 8/8] git-mailrc: Add rpi and bcm283x maintainer -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Signed-off-by: Andrei Gherzan -Acked-by: Matthias Brugger ---- - doc/git-mailrc | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/doc/git-mailrc b/doc/git-mailrc -index a63b76befc..68110e1963 100644 ---- a/doc/git-mailrc -+++ b/doc/git-mailrc -@@ -35,6 +35,7 @@ alias mariosix Mario Six - alias masahiro Masahiro Yamada - alias mateusz Mateusz Kulikowski - alias maxime Maxime Ripard -+alias mbrugger Matthias Brugger - alias monstr Michal Simek - alias prom Minkyu Kang - alias ptomsich Philipp Tomsich -@@ -74,6 +75,9 @@ alias uniphier uboot, masahiro - alias zynq uboot, monstr - alias rockchip uboot, sjg, kevery, ptomsich - -+alias bcm283x uboot,mbrugger -+alias rpi uboot,mbrugger -+ - alias m68k uboot, alisonwang, angelo_ts - alias coldfire m68k - diff --git a/sources b/sources index a0d1eae..1786971 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.10-rc3.tar.bz2) = 598a6637fdbd62f30a3c4f73f0e89022c6c92b9ec93f4c4215547f54493ff17b2a0b127328ad6e1561e451b3cddca89f168f8adfe4cc59f8125fc70787d8cf4c +SHA512 (u-boot-2019.10-rc4.tar.bz2) = 7cda21db747ec99eed5f51e1f2dffc91bca0515354ff6449a7c2dad87b0d10120bd619590cf523cb3a68814c65a3b51fced45984dfb0cf8a46b129aaac0b5204 diff --git a/uboot-tools.spec b/uboot-tools.spec index 37896e2..0f2392a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2019.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,7 +27,6 @@ Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch10: env-fix-build-error-for-envtools.patch -Patch11: Raspberry-Pi-32-64-support.patch BuildRequires: bc BuildRequires: dtc @@ -258,6 +257,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Sep 23 2019 Peter Robinson 2019.10-0.5-rc4 +- 2019.10 RC4 + * Wed Sep 11 2019 Peter Robinson 2019.10-0.4-rc3 - Minor fixes From 2f87ed820ef146327e27b8e72badb1ff33faf0e4 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 8 Oct 2019 16:17:52 +0100 Subject: [PATCH 046/351] 2019.10 --- ...e-unmapped-RAM-so-EFI-doesn-t-use-it.patch | 106 ++++ ...Let-spl_boot_device-return-USDHC1-or.patch | 42 ++ env-fix-build-error-for-envtools.patch | 484 ------------------ sources | 2 +- uboot-tools.spec | 10 +- 5 files changed, 156 insertions(+), 488 deletions(-) create mode 100644 Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch create mode 100644 Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch delete mode 100644 env-fix-build-error-for-envtools.patch diff --git a/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch b/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch new file mode 100644 index 0000000..89786a5 --- /dev/null +++ b/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch @@ -0,0 +1,106 @@ +From patchwork Tue Sep 24 15:10:24 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Mian Yousaf Kaukab +X-Patchwork-Id: 1166676 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46d4Ps4qsmz9sP3 + for ; + Wed, 25 Sep 2019 01:10:41 +1000 (AEST) +Received: by lists.denx.de (Postfix, from userid 105) + id 23898C21E2F; Tue, 24 Sep 2019 15:10:34 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A6013C21C4A; + Tue, 24 Sep 2019 15:10:32 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id CEBD7C21C4A; Tue, 24 Sep 2019 15:10:30 +0000 (UTC) +Received: from mx1.suse.de (mx2.suse.de [195.135.220.15]) + by lists.denx.de (Postfix) with ESMTPS id EC062C21C38 + for ; Tue, 24 Sep 2019 15:10:26 +0000 (UTC) +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx1.suse.de (Postfix) with ESMTP id 6EC7DABF4; + Tue, 24 Sep 2019 15:10:26 +0000 (UTC) +From: Mian Yousaf Kaukab +To: u-boot@lists.denx.de +Date: Tue, 24 Sep 2019 17:10:24 +0200 +Message-Id: <20190924151024.13297-1-ykaukab@suse.de> +X-Mailer: git-send-email 2.16.4 +Cc: xypron.glpk@gmx.de, swarren@nvidia.com +Subject: [U-Boot] [PATCH] Revert "ARM: tegra: reserve unmapped RAM so EFI + doesn't use it" +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +MIME-Version: 1.0 +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This reverts commit 0797f7f0b7e1d7853e2842ddc235ffef139fa792. + +Tegra specific solution is not required any more as efi core has been +made aware of ram_top with the following commit: +7b78d6438a efi_loader: Reserve unaccessible memory + +Signed-off-by: Mian Yousaf Kaukab +Tested-by: Stephen Warren +--- + arch/arm/mach-tegra/board2.c | 14 -------------- + 1 file changed, 14 deletions(-) + +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index f13bd256cc..07f54f0684 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -6,7 +6,6 @@ + + #include + #include +-#include + #include + #include + #include +@@ -224,19 +223,6 @@ int board_early_init_f(void) + + int board_late_init(void) + { +-#if CONFIG_IS_ENABLED(EFI_LOADER) +- if (gd->bd->bi_dram[1].start) { +- /* +- * Only bank 0 is below board_get_usable_ram_top(), so all of +- * bank 1 is not mapped by the U-Boot MMU configuration, and so +- * we must prevent EFI from using it. +- */ +- efi_add_memory_map(gd->bd->bi_dram[1].start, +- gd->bd->bi_dram[1].size >> EFI_PAGE_SHIFT, +- EFI_BOOT_SERVICES_DATA, false); +- } +-#endif +- + #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (tegra_cpu_is_non_secure()) { + printf("CPU is in NS mode\n"); diff --git a/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch b/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch new file mode 100644 index 0000000..a0db8bc --- /dev/null +++ b/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch @@ -0,0 +1,42 @@ +From f6bfab7799821fbb7289b5cd0b932220dec81a00 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 8 Oct 2019 10:52:07 +0100 +Subject: [PATCH] Revert "spl: imx6: Let spl_boot_device return USDHC1 or + USDHC2" + +This reverts commit 14d319b1856b86e593e01abd0a1e3c2d63b52a8a. +--- + arch/arm/mach-imx/spl.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c +index 1f230aca33..9f1e0f6a72 100644 +--- a/arch/arm/mach-imx/spl.c ++++ b/arch/arm/mach-imx/spl.c +@@ -24,7 +24,6 @@ u32 spl_boot_device(void) + { + unsigned int bmode = readl(&src_base->sbmr2); + u32 reg = imx6_src_get_boot_mode(); +- u32 mmc_index = ((reg >> 11) & 0x03); + + /* + * Check for BMODE if serial downloader is enabled +@@ -85,12 +84,11 @@ u32 spl_boot_device(void) + /* SD/eSD: 8.5.3, Table 8-15 */ + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: ++ return BOOT_DEVICE_MMC1; ++ /* MMC/eMMC: 8.5.3 */ + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: +- if (mmc_index == 1) +- return BOOT_DEVICE_MMC2; +- else +- return BOOT_DEVICE_MMC1; ++ return BOOT_DEVICE_MMC1; + /* NAND Flash: 8.5.2, Table 8-10 */ + case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX: + return BOOT_DEVICE_NAND; +-- +2.21.0 + diff --git a/env-fix-build-error-for-envtools.patch b/env-fix-build-error-for-envtools.patch deleted file mode 100644 index d3e75be..0000000 --- a/env-fix-build-error-for-envtools.patch +++ /dev/null @@ -1,484 +0,0 @@ -From patchwork Mon Aug 26 11:06:15 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1153103 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) - header.from=koncepto.io -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (2048-bit key; - unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="oiyEB9Yh"; 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- Mon, 26 Aug 2019 13:06:44 +0200 (CEST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=koncepto.io; - s=default; t=1566817604; - bh=V4r1z9HD8aVGoyELWRC99LX8pZowixLpYqFHkVfjVik=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=oiyEB9YhFL8jh+kux8tsm0WhBM8b/ijFR0262b6Oe55f6YePlv9wHb6b1pEW1Fs62 - gNimouSjMWLCAW2wZquTDRjoQoRVCykS9rPbigionFMazyPmt1F0vDBpjoN75MDJl9 - yx8GGplCS3yU5fHLkfd1SKxnta0u7sLu7EnjfagoI6XuV53Ix6DkJAvkvPfgUhl1hD - 2Cz7oBfJafbblAdKb019EWk6TTrW86ASL0aHwKF/R3hXfDjwLN2gzhD0pckzmEklxR - Z+9c649IYaa9B3K3PAdhRoQ5lptYyVqLNrAffsabjbXQzrxyBcGEg5hRnleeede86M - 4HoWxUCDgE5EQ== -From: Pierre-Jean Texier -To: u-boot@lists.denx.de -Date: Mon, 26 Aug 2019 13:06:15 +0200 -Message-Id: <1566817578-16750-2-git-send-email-pjtexier@koncepto.io> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -MIME-Version: 1.0 -Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, - philip@philipmolloy.com -Subject: [U-Boot] [PATCH v2 1/4] fw_env: remove duplicated definitions -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Since commit d3716dd ("env: Rename the redundancy flags"), the -definitions of ENV_REDUND_OBSOLETE & ENV_REDUND_ACTIVE was moved -to env.h. - -Fixes: - -tools/env/fw_env.c:122:22: error: ‘ENV_REDUND_ACTIVE’ redeclared as different kind of symbol - static unsigned char ENV_REDUND_ACTIVE = 1; - ^~~~~~~~~~~~~~~~~ -In file included from tools/env/fw_env.c:13: -include/env.h:63:2: note: previous definition of ‘ENV_REDUND_ACTIVE’ was here - ENV_REDUND_ACTIVE = 1, - ^~~~~~~~~~~~~~~~~ -tools/env/fw_env.c:127:22: error: ‘ENV_REDUND_OBSOLETE’ redeclared as different kind of symbol - static unsigned char ENV_REDUND_OBSOLETE; - ^~~~~~~~~~~~~~~~~~~ -In file included from tools/env/fw_env.c:13: -include/env.h:62:2: note: previous definition of ‘ENV_REDUND_OBSOLETE’ was here - ENV_REDUND_OBSOLETE = 0, - -Signed-off-by: Pierre-Jean Texier -Tested-by: Joris Offouga -Tested-by: Heiko Schocher ---- -v1 -> v2: - - None - - tools/env/fw_env.c | 7 ------- - 1 file changed, 7 deletions(-) - -diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c -index 95c9984..876bf2b 100644 ---- a/tools/env/fw_env.c -+++ b/tools/env/fw_env.c -@@ -119,13 +119,6 @@ static struct environment environment = { - - static int have_redund_env; - --static unsigned char ENV_REDUND_ACTIVE = 1; --/* -- * ENV_REDUND_OBSOLETE must be 0 to efficiently set it on NOR flash without -- * erasing -- */ --static unsigned char ENV_REDUND_OBSOLETE; -- - #define DEFAULT_ENV_INSTANCE_STATIC - #include - - -From patchwork Mon Aug 26 11:06:16 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1153106 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) - header.from=koncepto.io -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (2048-bit key; - unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="c5/r1UEA"; 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- Mon, 26 Aug 2019 13:06:44 +0200 (CEST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=koncepto.io; - s=default; t=1566817605; - bh=/BzW5h1tpm92Axd1WgUReyBQsFQF3cTqd1CNLOzC1ko=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=c5/r1UEA9buu4jObmZtyFpyrpiS53PaMZNrL4rMiyrbgACz9Mkdy2Z55vsSjmATqG - 7uTbEVjsPuqi/ECX2+8I9ozMGh72h4vosbfoak2jzAwHkC4ostork7ltSS2ahy7ZuO - CN0oXYk6/WA5mipEaQb6aaipBMd65Hm7hfN365ZHk5a8RBJD805QekonFLGUahFIP6 - J7bu7RkeQeCV5n3lqIPfYddP73Lfx4hNs5plSHs+xDT69dyfW7xBGp0qLEljRfw9VS - WD/O/BhsUWgQVVbQdludCJaYQgrkLYRUOjdiAA8zMCFYX7TnQT5wvzHDSQiZ0w+RDW - ClVzkMBJWfW4Q== -From: Pierre-Jean Texier -To: u-boot@lists.denx.de -Date: Mon, 26 Aug 2019 13:06:16 +0200 -Message-Id: <1566817578-16750-3-git-send-email-pjtexier@koncepto.io> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -MIME-Version: 1.0 -Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, - philip@philipmolloy.com -Subject: [U-Boot] [PATCH v2 2/4] fw_env: fix build error -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -The following error appears: - -tools/env/fw_env.c:1149:25: error: lvalue required as unary ‘&’ operand - rc = write(fd, &ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); - -Fixes: d3716dd ("env: Rename the redundancy flags") - -Signed-off-by: Pierre-Jean Texier -Tested-by: Joris Offouga -Tested-by: Heiko Schocher -Suggested-by: Heiko Schocher ---- -v1 -> v2: - - fix fw_setenv with flag_obsolete (reported by Heiko Schocher) - - tools/env/fw_env.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c -index 876bf2b..e2801f5 100644 ---- a/tools/env/fw_env.c -+++ b/tools/env/fw_env.c -@@ -1135,6 +1135,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) - { - int rc; - struct erase_info_user erase; -+ char tmp = ENV_REDUND_OBSOLETE; - - erase.start = DEVOFFSET(dev); - erase.length = DEVESIZE(dev); -@@ -1146,7 +1147,7 @@ static int flash_flag_obsolete(int dev, int fd, off_t offset) - return rc; - } - ioctl(fd, MEMUNLOCK, &erase); -- rc = write(fd, &ENV_REDUND_OBSOLETE, sizeof(ENV_REDUND_OBSOLETE)); -+ rc = write(fd, &tmp, sizeof(tmp)); - ioctl(fd, MEMLOCK, &erase); - if (rc < 0) - perror("Could not set obsolete flag"); - -From patchwork Mon Aug 26 11:06:17 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1153105 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) - header.from=koncepto.io -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (2048-bit key; - unprotected) header.d=koncepto.io header.i=@koncepto.io - header.b="N3SBJxTS"; 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- Mon, 26 Aug 2019 13:06:45 +0200 (CEST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=koncepto.io; - s=default; t=1566817605; - bh=dWwf9DG0EIYj1c3i6TZ9GcIjpKB4dt6vWg1Dt8wKqzw=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=N3SBJxTSaw0Cc/Af4mtNxZoxnO00iPmrwKFdSpv7Ivcye0Fvia3QcbbWuikUWWsvC - tJmF5PWGKgVlihn9XPEGhMKbhKWPGiBu/s2hlexR6DoJJxDf/8NmNTh8lpWjm4OvRM - PL7ZRhxs8bIN8CO+pKk+FwZswp8J/ox8Y65QcrmlG7eyLivK+/D87dI0GPVjeu68Am - 5LC+rYJKFB12qalI8b+QJHWZFyhx4yA6crHbz3ynfXYMFywXLz99bvj+3hiyadKuVA - HvY54Esmj1mVtaO9YeWOA0UseI6tI7NnFpFsDhXOHGjROrGPlGH+ZutRy00m1sfcZH - hb5LdaY/5drGg== -From: Pierre-Jean Texier -To: u-boot@lists.denx.de -Date: Mon, 26 Aug 2019 13:06:17 +0200 -Message-Id: <1566817578-16750-4-git-send-email-pjtexier@koncepto.io> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -MIME-Version: 1.0 -Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, - philip@philipmolloy.com -Subject: [U-Boot] [PATCH v2 3/4] env: add missing header file -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Since commit af95f20 ("env: Create a new file for environment functions"), -a new header file exists. - -So, this commit add a missing header file. - -Fixes: - -include/env.h:158:1: error: unknown type name ‘ulong’; did you mean ‘long’? - ulong env_get_ulong(const char *name, int base, ulong default_val); - ^~~~~ - long -include/env.h:158:49: error: unknown type name ‘ulong’; did you mean ‘long’? - ulong env_get_ulong(const char *name, int base, ulong default_val); - -Signed-off-by: Pierre-Jean Texier -Tested-by: Joris Offouga -Tested-by: Heiko Schocher ---- -v1 -> v2: - - None - - include/env.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/include/env.h b/include/env.h -index a74a261..b72239f 100644 ---- a/include/env.h -+++ b/include/env.h -@@ -9,6 +9,7 @@ - #ifndef __ENV_H - #define __ENV_H - -+#include - #include - #include - - -From patchwork Mon Aug 26 11:06:18 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Pierre-Jean Texier -X-Patchwork-Id: 1153104 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Mon, 26 Aug 2019 11:06:56 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id 1B211C21FB7; Mon, 26 Aug 2019 11:06:50 +0000 (UTC) -Received: from koncepto.io (koncepto.io [195.154.119.111]) - by lists.denx.de (Postfix) with ESMTPS id 5DD4FC22142 - for ; Mon, 26 Aug 2019 11:06:47 +0000 (UTC) -Received: from menoah.home (lfbn-1-8923-205.w193-250.abo.wanadoo.fr - [193.250.65.205]) - by koncepto.io (Postfix) with ESMTPSA id C256360379; - Mon, 26 Aug 2019 13:06:46 +0200 (CEST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=koncepto.io; - s=default; t=1566817607; - bh=uZNRBSN4VpoP7mepjwChysqtnjGfdVboiTXTDe06LEU=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=HvNQuMmnrlCD9XJG0/ozSpYPRFnOXBTD8TUFjcv0J+z/nZt0lCcYuSgICWNwLzjkK - mOfgLxHOC5GAWv+jSVCNiL4NHnlsHtCWPTmwoWLHvuJMSopMyK/zbGkNKdiB0D5bAn - oc3cAuzUIex4yqSidWtEXN7uxYstmMRNOVyyacTKDCfTYwUDb+4RMbr62MZGXNQO26 - 0YShoLiU0geXqsu5IXy896mMWQejlZ6J14FiRN7ZD/cEHZGuPcFcophp4PgIMLnvJz - KW2AAdMo8YoYUznZ19vBEmJuEutoju0h0Bee+YH0/jtbTgH9XarZrO6ljyEV+gbrKt - W2vCG78kPreOQ== -From: Pierre-Jean Texier -To: u-boot@lists.denx.de -Date: Mon, 26 Aug 2019 13:06:18 +0200 -Message-Id: <1566817578-16750-5-git-send-email-pjtexier@koncepto.io> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -References: <1566817578-16750-1-git-send-email-pjtexier@koncepto.io> -Cc: bjorn@haxx.se, michal.simek@xilinx.com, joe.hershberger@ni.com, - philip@philipmolloy.com -Subject: [U-Boot] [PATCH v2 4/4] ci: add envtools support -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This commit add envtools suppport to CI to verify if there -is no build issues. - -Signed-off-by: Pierre-Jean Texier -Acked-by: Heiko Schocher ---- -v1 -> v2: - - None - - .gitlab-ci.yml | 7 +++++++ - .travis.yml | 4 ++++ - 2 files changed, 11 insertions(+) - -diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml -index 84e79bf..a1c5b4f 100644 ---- a/.gitlab-ci.yml -+++ b/.gitlab-ci.yml -@@ -145,6 +145,13 @@ Build tools-only: - script: - - make tools-only_config tools-only -j$(nproc) - -+# Ensure env tools build -+Build envtools: -+ tags: [ 'all' ] -+ stage: testsuites -+ script: -+ - make tools-only_config envtools -j$(nproc) -+ - Run binman, buildman, dtoc and patman testsuites: - tags: [ 'all' ] - stage: testsuites -diff --git a/.travis.yml b/.travis.yml -index d330dda..6adc754 100644 ---- a/.travis.yml -+++ b/.travis.yml -@@ -361,6 +361,10 @@ matrix: - - name: "Build tools-only" - script: - - make tools-only_config tools-only -j$(nproc) -+ # Ensure env tools build -+ - name: "Build envtools" -+ script: -+ - make tools-only_config envtools -j$(nproc) - - # test/py - - name: "test/py sandbox" diff --git a/sources b/sources index 1786971..9e5e7fa 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.10-rc4.tar.bz2) = 7cda21db747ec99eed5f51e1f2dffc91bca0515354ff6449a7c2dad87b0d10120bd619590cf523cb3a68814c65a3b51fced45984dfb0cf8a46b129aaac0b5204 +SHA512 (u-boot-2019.10.tar.bz2) = d8e98fca4b6af8d49d20ec09beab16b77863fcee88cda3605cc14435de21030bf3ca5e7cf7d06e42d4c0f75279c7295ecd628d2b77666eff7b7fd50374e051fd diff --git a/uboot-tools.spec b/uboot-tools.spec index 0f2392a..960e182 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc1 Name: uboot-tools Version: 2019.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,7 +26,8 @@ Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch7: dragonboard-fixes.patch Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch10: env-fix-build-error-for-envtools.patch +Patch10: Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch +Patch11: Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch BuildRequires: bc BuildRequires: dtc @@ -257,6 +258,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Oct 7 2019 Peter Robinson 2019.10-1 +- 2019.10 + * Mon Sep 23 2019 Peter Robinson 2019.10-0.5-rc4 - 2019.10 RC4 From f8d3dfbeeff2c5721399676193e5154097ea13c7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 9 Oct 2019 18:14:48 +0100 Subject: [PATCH 047/351] Fixes for Rockchips rk3328 and rk3399 platforms --- ...-rk3328-rock64-Add-same-as-spl-order.patch | 108 ++++++++++ ...328-Fix-memory-instability-on-ROCK64.patch | 193 ++++++++++++++++++ ...rk3399-rock960-Update-config-for-TPL.patch | 58 ++++++ uboot-tools.spec | 13 +- 4 files changed, 370 insertions(+), 2 deletions(-) create mode 100644 rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch create mode 100644 rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch create mode 100644 rockchip-rk3399-rock960-Update-config-for-TPL.patch diff --git a/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch b/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch new file mode 100644 index 0000000..a5b2405 --- /dev/null +++ b/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch @@ -0,0 +1,108 @@ +From patchwork Tue Oct 8 17:59:50 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Emmanuel Vadot +X-Patchwork-Id: 1173473 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=freebsd.org +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46nlW24FCYz9sDB + for ; + Wed, 9 Oct 2019 05:00:12 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id A69C5C21FA4; Tue, 8 Oct 2019 18:00:04 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A7772C21E08; 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+ Tue, 8 Oct 2019 17:59:57 +0000 (UTC) + (envelope-from manu@freebsd.org) +Received: from skull.home.blih.net (ip-9.net-89-3-105.rev.numericable.fr + [89.3.105.9]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) + (Client did not present a certificate) (Authenticated sender: manu) + by smtp.freebsd.org (Postfix) with ESMTPSA id 5F3A9BEAE; + Tue, 8 Oct 2019 17:59:56 +0000 (UTC) + (envelope-from manu@freebsd.org) +From: Emmanuel Vadot +To: matwey.kornilov@gmail.com, + albert.u.boot@aribaud.net +Date: Tue, 8 Oct 2019 19:59:50 +0200 +Message-Id: <20191008175950.77719-1-manu@freebsd.org> +X-Mailer: git-send-email 2.22.0 +MIME-Version: 1.0 +Cc: u-boot@lists.denx.de +Subject: [U-Boot] [PATCH] rockchip: dts: rk3328: rock64: Add same-as-spl order +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +rk3328 can use same-as-spl option so next loaders are loaded from the same +medium. +Add the boot order in the rock64 dts otherwise booting from sdcard +will result in u-boot looking into the eMMC. + +Signed-off-by: Emmanuel Vadot +--- + arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +index 1d441f7124..e5946d2d2d 100644 +--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +@@ -5,6 +5,11 @@ + + #include "rk3328-u-boot.dtsi" + #include "rk3328-sdram-lpddr3-1600.dtsi" ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; + + &usb_host0_xhci { + status = "okay"; diff --git a/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch b/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch new file mode 100644 index 0000000..bc5602a --- /dev/null +++ b/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch @@ -0,0 +1,193 @@ +From patchwork Sun Oct 6 16:28:13 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon South +X-Patchwork-Id: 1172554 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=simonsouth.net +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46mTcR2S2Xz9sN1 + for ; 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Sun, 6 Oct 2019 16:30:14 +0000 (UTC) +Received: from localhost.localdomain (unknown [108.162.141.100]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) (No client certificate requested) + by mailout.easymail.ca (Postfix) with ESMTPSA id 2269520D10; + Sun, 6 Oct 2019 16:30:07 +0000 (UTC) +From: Simon South +To: u-boot@lists.denx.de +Date: Sun, 6 Oct 2019 12:28:13 -0400 +Message-Id: +X-Mailer: git-send-email 2.23.0 +In-Reply-To: +References: +MIME-Version: 1.0 +Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in + function +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Fix a pair of tests in phy_dll_bypass_set() that used incorrect units +for the DDR frequency, causing the DRAM controller to be misconfigured +in most cases. + +Signed-off-by: Simon South +Reviewed-by: Kever Yang +--- + drivers/ram/rockchip/sdram_rk3328.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c +index 656696ac3c..0541bbadf0 100644 +--- a/drivers/ram/rockchip/sdram_rk3328.c ++++ b/drivers/ram/rockchip/sdram_rk3328.c +@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) + setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); + clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); + +- if (freq <= (400 * MHz)) ++ if (freq <= 400) + /* DLL bypass */ + setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); + else + clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); +- if (freq <= (680 * MHz)) ++ if (freq <= 680) + tmp = 2; + else + tmp = 1; + +From patchwork Sun Oct 6 16:28:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon South +X-Patchwork-Id: 1172555 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=simonsouth.net +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46mTd93q3Qz9sN1 + for ; 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Sun, 6 Oct 2019 16:30:28 +0000 (UTC) +Received: from localhost.localdomain (unknown [108.162.141.100]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) (No client certificate requested) + by mailout.easymail.ca (Postfix) with ESMTPSA id 42EDE20D10; + Sun, 6 Oct 2019 16:30:20 +0000 (UTC) +From: Simon South +To: u-boot@lists.denx.de +Date: Sun, 6 Oct 2019 12:28:14 -0400 +Message-Id: <17f58d8cdf7d32de26cb36950fa8676e0dd54d49.1570376078.git.simon@simonsouth.net> +X-Mailer: git-send-email 2.23.0 +In-Reply-To: +References: +MIME-Version: 1.0 +Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Fix a typo that caused incorrect values to be loaded into the DRAM +controller's deskew registers. + +Signed-off-by: Simon South +Reviewed-by: Kever Yang +--- + drivers/ram/rockchip/sdram_rk3328.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c +index 0541bbadf0..e84c9be6a2 100644 +--- a/drivers/ram/rockchip/sdram_rk3328.c ++++ b/drivers/ram/rockchip/sdram_rk3328.c +@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram, + copy_to_reg(PHY_REG(phy_base, 0x70), + &sdram_params->skew.cs0_dm0_skew[0], 44 * 4); + copy_to_reg(PHY_REG(phy_base, 0xc0), +- &sdram_params->skew.cs0_dm1_skew[0], 44 * 4); ++ &sdram_params->skew.cs1_dm0_skew[0], 44 * 4); + } + + static int update_refresh_reg(struct dram_info *dram) diff --git a/rockchip-rk3399-rock960-Update-config-for-TPL.patch b/rockchip-rk3399-rock960-Update-config-for-TPL.patch new file mode 100644 index 0000000..db838db --- /dev/null +++ b/rockchip-rk3399-rock960-Update-config-for-TPL.patch @@ -0,0 +1,58 @@ +From d49e0341dcc96b9a33d59579fa9defaaa4b04d1c Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 9 Oct 2019 12:15:10 +0100 +Subject: [PATCH] rockchip: rk3399: rock960: Update config for TPL + +The SPL is now running at SDRAM, and 0x10000 is used by BL31, +and the ARM SPL do not support relocate now, we need reserved +0x50000 so that it won't overwrite the code when we load the +bl31 to target space. +We should remove this after we enable the relocate feature. + +The SPL need malloc 0x9000 for MMC as buffer used for transfer +data to IRAM(The EMMC DMA can not transfer data to IRAM directly). + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index cb3c68db6b..f211a65587 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -2,19 +2,21 @@ CONFIG_ARM=y + CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 + CONFIG_ROCKCHIP_RK3399=y +-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 ++CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 + CONFIG_TARGET_ROCK960_RK3399=y + CONFIG_SPL_STACK_R_ADDR=0x80000 + CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_DEBUG_UART=y +-CONFIG_SPL_TEXT_BASE=0xff8c2000 + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_DISPLAY_BOARDINFO_LATE=y + # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set + CONFIG_SPL_STACK_R=y +-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_TPL=y + CONFIG_SYS_PROMPT="rock960 => " + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y +@@ -56,4 +58,6 @@ CONFIG_USB_ETHER_ASIX88179=y + CONFIG_USB_ETHER_MCS7830=y + CONFIG_USB_ETHER_RTL8152=y + CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +-- +2.21.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 960e182..6e1968f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.10 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,6 +28,9 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch10: Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch Patch11: Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch +Patch12: rockchip-rk3399-rock960-Update-config-for-TPL.patch +Patch13: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch +Patch14: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch BuildRequires: bc BuildRequires: dtc @@ -129,6 +132,9 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ + if [[ " ${rk3328[*]} " == *" $board "* ]]; then + make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} u-boot.itb V=1 O=builds/$(echo $board)/ + fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img @@ -195,7 +201,7 @@ done for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img + for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -258,6 +264,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Oct 9 2019 Peter Robinson 2019.10-2 +- Fixes for Rockchips rk3328 and rk3399 platforms + * Mon Oct 7 2019 Peter Robinson 2019.10-1 - 2019.10 From 7878d97fd4d0d6da022588f05c0363d143ba895c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 31 Oct 2019 17:06:34 +0000 Subject: [PATCH 048/351] 2020.01 RC1, Initial migration to python3 --- ...e-unmapped-RAM-so-EFI-doesn-t-use-it.patch | 106 - ...Let-spl_boot_device-return-USDHC1-or.patch | 42 - fdt-Switch-to-the-latest-libfdt-sort-of.patch | 3834 ++++++++++++++++ scripts-Convert-to-Python-3.patch | 3889 +++++++++++++++++ sources | 2 +- tools-fix-version.h.patch | 35 + uboot-tools.spec | 44 +- 7 files changed, 7785 insertions(+), 167 deletions(-) delete mode 100644 Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch delete mode 100644 Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch create mode 100644 fdt-Switch-to-the-latest-libfdt-sort-of.patch create mode 100644 scripts-Convert-to-Python-3.patch create mode 100644 tools-fix-version.h.patch diff --git a/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch b/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch deleted file mode 100644 index 89786a5..0000000 --- a/Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch +++ /dev/null @@ -1,106 +0,0 @@ -From patchwork Tue Sep 24 15:10:24 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Mian Yousaf Kaukab -X-Patchwork-Id: 1166676 -X-Patchwork-Delegate: xypron.glpk@gmx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 46d4Ps4qsmz9sP3 - for ; - Wed, 25 Sep 2019 01:10:41 +1000 (AEST) -Received: by lists.denx.de (Postfix, from userid 105) - id 23898C21E2F; Tue, 24 Sep 2019 15:10:34 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable - autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id A6013C21C4A; - Tue, 24 Sep 2019 15:10:32 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id CEBD7C21C4A; Tue, 24 Sep 2019 15:10:30 +0000 (UTC) -Received: from mx1.suse.de (mx2.suse.de [195.135.220.15]) - by lists.denx.de (Postfix) with ESMTPS id EC062C21C38 - for ; Tue, 24 Sep 2019 15:10:26 +0000 (UTC) -X-Virus-Scanned: by amavisd-new at test-mx.suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx1.suse.de (Postfix) with ESMTP id 6EC7DABF4; - Tue, 24 Sep 2019 15:10:26 +0000 (UTC) -From: Mian Yousaf Kaukab -To: u-boot@lists.denx.de -Date: Tue, 24 Sep 2019 17:10:24 +0200 -Message-Id: <20190924151024.13297-1-ykaukab@suse.de> -X-Mailer: git-send-email 2.16.4 -Cc: xypron.glpk@gmx.de, swarren@nvidia.com -Subject: [U-Boot] [PATCH] Revert "ARM: tegra: reserve unmapped RAM so EFI - doesn't use it" -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -MIME-Version: 1.0 -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This reverts commit 0797f7f0b7e1d7853e2842ddc235ffef139fa792. - -Tegra specific solution is not required any more as efi core has been -made aware of ram_top with the following commit: -7b78d6438a efi_loader: Reserve unaccessible memory - -Signed-off-by: Mian Yousaf Kaukab -Tested-by: Stephen Warren ---- - arch/arm/mach-tegra/board2.c | 14 -------------- - 1 file changed, 14 deletions(-) - -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index f13bd256cc..07f54f0684 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -6,7 +6,6 @@ - - #include - #include --#include - #include - #include - #include -@@ -224,19 +223,6 @@ int board_early_init_f(void) - - int board_late_init(void) - { --#if CONFIG_IS_ENABLED(EFI_LOADER) -- if (gd->bd->bi_dram[1].start) { -- /* -- * Only bank 0 is below board_get_usable_ram_top(), so all of -- * bank 1 is not mapped by the U-Boot MMU configuration, and so -- * we must prevent EFI from using it. -- */ -- efi_add_memory_map(gd->bd->bi_dram[1].start, -- gd->bd->bi_dram[1].size >> EFI_PAGE_SHIFT, -- EFI_BOOT_SERVICES_DATA, false); -- } --#endif -- - #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (tegra_cpu_is_non_secure()) { - printf("CPU is in NS mode\n"); diff --git a/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch b/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch deleted file mode 100644 index a0db8bc..0000000 --- a/Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch +++ /dev/null @@ -1,42 +0,0 @@ -From f6bfab7799821fbb7289b5cd0b932220dec81a00 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 8 Oct 2019 10:52:07 +0100 -Subject: [PATCH] Revert "spl: imx6: Let spl_boot_device return USDHC1 or - USDHC2" - -This reverts commit 14d319b1856b86e593e01abd0a1e3c2d63b52a8a. ---- - arch/arm/mach-imx/spl.c | 8 +++----- - 1 file changed, 3 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c -index 1f230aca33..9f1e0f6a72 100644 ---- a/arch/arm/mach-imx/spl.c -+++ b/arch/arm/mach-imx/spl.c -@@ -24,7 +24,6 @@ u32 spl_boot_device(void) - { - unsigned int bmode = readl(&src_base->sbmr2); - u32 reg = imx6_src_get_boot_mode(); -- u32 mmc_index = ((reg >> 11) & 0x03); - - /* - * Check for BMODE if serial downloader is enabled -@@ -85,12 +84,11 @@ u32 spl_boot_device(void) - /* SD/eSD: 8.5.3, Table 8-15 */ - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: -+ return BOOT_DEVICE_MMC1; -+ /* MMC/eMMC: 8.5.3 */ - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: -- if (mmc_index == 1) -- return BOOT_DEVICE_MMC2; -- else -- return BOOT_DEVICE_MMC1; -+ return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2, Table 8-10 */ - case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX: - return BOOT_DEVICE_NAND; --- -2.21.0 - diff --git a/fdt-Switch-to-the-latest-libfdt-sort-of.patch b/fdt-Switch-to-the-latest-libfdt-sort-of.patch new file mode 100644 index 0000000..00ea666 --- /dev/null +++ b/fdt-Switch-to-the-latest-libfdt-sort-of.patch @@ -0,0 +1,3834 @@ +From patchwork Sun Oct 27 15:47:39 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1185044 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org + header.b="OLvv7vbo"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 471Mj80TRNz9sP4 + for ; + Mon, 28 Oct 2019 02:49:16 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id C1488C21DE8; Sun, 27 Oct 2019 15:48:05 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, + T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 0832EC21DED; + Sun, 27 Oct 2019 15:48:04 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 48FAAC21E0B; Sun, 27 Oct 2019 15:47:57 +0000 (UTC) +Received: from mail-io1-f65.google.com (mail-io1-f65.google.com + [209.85.166.65]) + by lists.denx.de (Postfix) with ESMTPS id 07655C21D56 + for ; Sun, 27 Oct 2019 15:47:55 +0000 (UTC) +Received: by mail-io1-f65.google.com with SMTP id s17so595539iol.12 + for ; Sun, 27 Oct 2019 08:47:54 -0700 (PDT) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; + s=google; + h=from:to:cc:subject:date:message-id:in-reply-to:references + :mime-version:content-transfer-encoding; + bh=abahsZfnM1sq5uDot8XlGXsVk6VOC5rkZagrEAXmrmY=; + b=OLvv7vbosEdFXyAm1n6xMHTkO7qmeEHLPLlsrw3tSOIPjiM9bsV0nRtz+sUqjIsFcB + EvRahajsrIIUh/GJAfcg/1Fw89weIlDo+Zp8BX80fovwImeO8CwMqHx72XCBkkv9BZr0 + Ji4YRraMEmgcEWz6O7D6njjOEHAZAi3FhVxQ4= +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to + :references:mime-version:content-transfer-encoding; + bh=abahsZfnM1sq5uDot8XlGXsVk6VOC5rkZagrEAXmrmY=; + b=ruvh1y4bGF8xgPcpZSR1z0qJyJYiIt+GWyaK1pevtpycG855kw6yDY+kQOD3XUJCli + 9QAsm7GJoBkWsECDMozC07Lv8543hh0EAC3knuXGpxuV/m5GBm6v+f+CswKzmlHeZlDP + 2+A3gMxMGPtLT8xq79e3SJ0fWVbzudBpT/pjWJpGFfveMhs6QKNIcvccpPvq88OwGQp5 + Pe5Jtp+26Z0VayJP+6Chy0dkvO4CqDpvZ//2b1T7uMELi9wjeg4CDRBRqVy64Lwpevh1 + u7almPHkrCDThJjOSfH+vJyIRDidS4t+1jmRNq8dnXuYfHq+nV2U/q75il5GRZTrhZnw + lhew== +X-Gm-Message-State: APjAAAU1BKU3O4ZePyrr04Yx5Py0xIYfugtOXnmvoQCyKONrVJIX3SR3 + O5XZIVRoLBlJRJNTES9CLsYNZb8G1BO0eQ== +X-Google-Smtp-Source: APXvYqxUVsRrnUvkiaiXBmHYiGVUSGUIpaeReWu2LXcvxANHJUqCOHz/zamp7WBecv48liNYzE6yAQ== +X-Received: by 2002:a5d:81c3:: with SMTP id t3mr11477950iol.300.1572191273768; + Sun, 27 Oct 2019 08:47:53 -0700 (PDT) +Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) + by smtp.gmail.com with ESMTPSA id + v10sm1105693ila.81.2019.10.27.08.47.53 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Sun, 27 Oct 2019 08:47:53 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Sun, 27 Oct 2019 09:47:39 -0600 +Message-Id: <20191027154742.185672-2-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191027154742.185672-1-sjg@chromium.org> +References: <20191027154742.185672-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini , Jerry Van Baren +Subject: [U-Boot] [PATCH 1/4] fdt: Add INT32_MAX to kernel.h for libfdt +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Unfortunately libfdt needs this value now, which is present in the +stdint.h header. That file is just a placeholder in U-Boot and these sorts +of constants appear in the linux/kernel.h header instead. + +To keep libfdt happy, add INT32_MAX too. + +Signed-off-by: Simon Glass +Reviewed-by: Tom Rini +--- + + include/linux/kernel.h | 2 ++ + include/linux/libfdt_env.h | 1 + + 2 files changed, 3 insertions(+) + +diff --git a/include/linux/kernel.h b/include/linux/kernel.h +index a85c15d8dc..5c7e5f635b 100644 +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -37,6 +37,8 @@ + #define UINT32_MAX U32_MAX + #define UINT64_MAX U64_MAX + ++#define INT32_MAX S32_MAX ++ + #define STACK_MAGIC 0xdeadbeef + + #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) +diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h +index e2bf79c7ee..cca7792acd 100644 +--- a/include/linux/libfdt_env.h ++++ b/include/linux/libfdt_env.h +@@ -10,6 +10,7 @@ + #define LIBFDT_ENV_H + + #include ++#include + + #include + + +From patchwork Sun Oct 27 15:47:40 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1185045 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org + header.b="MqEvxjtp"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 471MjR57Jhz9sP4 + for ; + Mon, 28 Oct 2019 02:49:31 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id 6686EC21DF3; Sun, 27 Oct 2019 15:48:24 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, + T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 1869DC21E08; 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+ bh=LIiA5MaJRaAEXdBlkgBiaOcAgQTDUT+yndeUQWFpJlE=; + b=LKYhXmb3hOgnMDMvNjbbIS9+7/I9fEyk39FyKebsFbzrpuWA15Q/s/oqyH4AlsqdkE + mLRsC5SvH6vdcrX8ur+1b2A3s7dt1WtXBejoFR3KtWp8883CIj9aRo1rgX1zjVtJyV6C + xHAeVlvBFLZcUSuvLLGCiiQ7MfL94du13QLBqRSf8ZNQYIgiJDJTW9ldP63YmYc2wai3 + Fe0GxI6wUkCLIcz5NtWvRxPY5VYKSr2Mdo//q/A8XvaRgODQ/hnZV1h9lgA2uiAKFlpk + CEMDJAnY9cPpuBl30VLSkKpeLgVDsPtSc/CovBh2fWOL0CMDFPo92g673pOZJe2mKLg+ + NtXg== +X-Gm-Message-State: APjAAAXcLwAOSgi7r8fE5wdgwctme7q85Yw0gRWPD+JwbVkvJykvxCmW + N75OG3KTgtSseu1SeMCPJnWCu9HWvyyyPA== +X-Google-Smtp-Source: APXvYqwxmm5wv0EptXFCNgTROuIExhbxeqKCssYocmrhkgwxbMtnYBmUqIgMZ/bhRGgK9+7iXfdlog== +X-Received: by 2002:a6b:ab45:: with SMTP id + u66mr10352010ioe.282.1572191275234; + Sun, 27 Oct 2019 08:47:55 -0700 (PDT) +Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) + by smtp.gmail.com with ESMTPSA id + v10sm1105693ila.81.2019.10.27.08.47.54 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Sun, 27 Oct 2019 08:47:54 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Sun, 27 Oct 2019 09:47:40 -0600 +Message-Id: <20191027154742.185672-3-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191027154742.185672-1-sjg@chromium.org> +References: <20191027154742.185672-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini , Heinrich Schuchardt , + Jerry Van Baren , + Chris Packham , + Marek Vasut +Subject: [U-Boot] [PATCH 2/4] fdt: Add Kconfig options to control code size +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +For better or worse libfdt recent grew a lot of code that checks the +validity of the device tree in great detail. When using unsigned or +unverified data this makes things safer, but it does add to code size. + +Add some controls to select the trade-off between safety and code size. + +Signed-off-by: Simon Glass +Reviewed-by: Tom Rini +--- + + lib/Kconfig | 33 +++++++++++++++++++++++++++++++++ + lib/libfdt/Makefile | 3 ++- + 2 files changed, 35 insertions(+), 1 deletion(-) + +diff --git a/lib/Kconfig b/lib/Kconfig +index 135f0b372b..b8a8509d72 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -464,6 +464,17 @@ config OF_LIBFDT + particular compatible nodes. The library operates on a flattened + version of the device tree. + ++config OF_LIBFDT_ASSUME_MASK ++ hex "Mask of conditions to assume for libfdt" ++ depends on OF_LIBFDT || FIT ++ default 0 ++ help ++ Use this to change the assumptions made by libfdt about the ++ device tree it is working with. A value of 0 means that no assumptions ++ are made, and libfdt is able to deal with malicious data. A value of ++ 0xff means all assumptions are made and any invalid data may cause ++ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h ++ + config OF_LIBFDT_OVERLAY + bool "Enable the FDT library overlay support" + depends on OF_LIBFDT +@@ -481,6 +492,17 @@ config SPL_OF_LIBFDT + particular compatible nodes. The library operates on a flattened + version of the device tree. + ++config SPL_OF_LIBFDT_ASSUME_MASK ++ hex "Mask of conditions to assume for libfdt" ++ depends on SPL_OF_LIBFDT || FIT ++ default 0xff ++ help ++ Use this to change the assumptions made by libfdt in SPL about the ++ device tree it is working with. A value of 0 means that no assumptions ++ are made, and libfdt is able to deal with malicious data. A value of ++ 0xff means all assumptions are made and any invalid data may cause ++ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h ++ + config TPL_OF_LIBFDT + bool "Enable the FDT library for TPL" + default y if TPL_OF_CONTROL +@@ -491,6 +513,17 @@ config TPL_OF_LIBFDT + particular compatible nodes. The library operates on a flattened + version of the device tree. + ++config TPL_OF_LIBFDT_ASSUME_MASK ++ hex "Mask of conditions to assume for libfdt" ++ depends on TPL_OF_LIBFDT || FIT ++ default 0xff ++ help ++ Use this to change the assumptions made by libfdt in TPL about the ++ device tree it is working with. A value of 0 means that no assumptions ++ are made, and libfdt is able to deal with malicious data. A value of ++ 0xff means all assumptions are made and any invalid data may cause ++ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h ++ + config FDT_FIXUP_PARTITIONS + bool "overwrite MTD partitions in DTS through defined in 'mtdparts'" + depends on OF_LIBFDT +diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile +index ef5b6e29d4..5d3ae4e2f1 100644 +--- a/lib/libfdt/Makefile ++++ b/lib/libfdt/Makefile +@@ -22,4 +22,5 @@ obj-y += fdt_ro.o + # U-Boot own file + obj-y += fdt_region.o + +-ccflags-y := -I$(srctree)/scripts/dtc/libfdt ++ccflags-y := -I$(srctree)/scripts/dtc/libfdt \ ++ -DFDT_ASSUME_MASK=$(CONFIG_$(SPL_TPL_)OF_LIBFDT_ASSUME_MASK) + +From patchwork Sun Oct 27 15:47:41 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1185043 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org + header.b="Km3HLVFS"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 471Mj24GRjz9sP4 + for ; + Mon, 28 Oct 2019 02:49:10 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id 36A0FC21C57; Sun, 27 Oct 2019 15:48:15 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, + T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 91C75C21DCA; + Sun, 27 Oct 2019 15:48:08 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 10267C21C3F; Sun, 27 Oct 2019 15:48:00 +0000 (UTC) +Received: from mail-il1-f196.google.com (mail-il1-f196.google.com + [209.85.166.196]) + by lists.denx.de (Postfix) with ESMTPS id AA1EDC21DA1 + for ; Sun, 27 Oct 2019 15:47:57 +0000 (UTC) +Received: by mail-il1-f196.google.com with SMTP id m16so5828165iln.13 + for ; Sun, 27 Oct 2019 08:47:57 -0700 (PDT) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; + s=google; + h=from:to:cc:subject:date:message-id:in-reply-to:references + :mime-version:content-transfer-encoding; + bh=f9j091HGp2Ydr+1kzeQuiITkGDV0YFlbsH5MDe99sOw=; + b=Km3HLVFSddKwc8pXuFSDPGBbjeCic5DMqZun5O47cczvgJrQ8LlBl4pfJ7xZcS7RTe + 9cYtAPvcvUIQD+txS2hu6LQEB2GDoNlhjct9vWfs6T8batEMjeAMwwH/AqRH3qpSoWzO + hUkcf8QeKggt4h+cxKR1Y0Zmn4bfvF661kIgw= +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to + :references:mime-version:content-transfer-encoding; + bh=f9j091HGp2Ydr+1kzeQuiITkGDV0YFlbsH5MDe99sOw=; + b=Fm5OiEv6zUL01KoYQ4mkFScsuXMrLVlwryyMxdEAKhFJdSBOkz2VcDsri9tNswdYPW + 6YT3sCaSPxoDUogXTsc48bvaXllzt0HwrCYj2SablIG6WLwktx9pHD/vJ4C/bTNdXr1o + 5Ns4KgGryZopUQlPIKSxObBNm0AQ8k1LQC9xNxrMfeIgFtxcLrxYIPSa1uW+st3pktLy + 60WtvpFHfA5HLglASuSM2RlTdzqDlyVy6CZs+limrgusYDX6Rw6aoJoiA42DHlmO9INe + 1nYssZBcPTbovBLG0Kgms03H+kTKDKYghvdSjJP+exFdEpHPmdq5Ul9JImq0KH5ZC8HL + DSlA== +X-Gm-Message-State: APjAAAX1/R1KXBqSAQrU74E5Co3NNEI+5N+dPA+ePB0CmTwFnb3zXYM0 + kH/4417dmJiutIe0MVT3WiMiu1RoelGDag== +X-Google-Smtp-Source: APXvYqyido6MX2KqtrWHE9SmOQktkQVs0a3SjpTcVTVTqwoMM/gnKK0IfC2HT5Dfo5pfVjsPJE+aUQ== +X-Received: by 2002:a92:91d3:: with SMTP id e80mr16494307ill.77.1572191276379; + Sun, 27 Oct 2019 08:47:56 -0700 (PDT) +Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) + by smtp.gmail.com with ESMTPSA id + v10sm1105693ila.81.2019.10.27.08.47.55 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Sun, 27 Oct 2019 08:47:56 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Sun, 27 Oct 2019 09:47:41 -0600 +Message-Id: <20191027154742.185672-4-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191027154742.185672-1-sjg@chromium.org> +References: <20191027154742.185672-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini , Soeren Moch +Subject: [U-Boot] [PATCH 3/4] mx6: tbs2910: Minimise libfdt code size +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This board appears to be very near its size limit and cannot accept the +new checking code in libfdt. Disable this code so this the board can +continue to build. + +Signed-off-by: Simon Glass +--- + + configs/tbs2910_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig +index 42e6f58eee..6d4d4c8f9f 100644 +--- a/configs/tbs2910_defconfig ++++ b/configs/tbs2910_defconfig +@@ -78,4 +78,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_I2C_EDID=y + CONFIG_VIDEO_IPUV3=y + CONFIG_VIDEO=y ++CONFIG_OF_LIBFDT_ASSUME_MASK=0xff + # CONFIG_EFI_LOADER is not set + +From patchwork Sun Oct 27 15:47:42 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1185048 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; 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++ int olen; ++ const char *p = fdt_get_name(fdt, offset, &olen); + +- if (!p) ++ if (!p || (fdt_chk_extra() && olen < len)) + /* short match */ + return 0; + +@@ -34,46 +35,85 @@ static int _fdt_nodename_eq(const void *fdt, int offset, + return 0; + } + +-const char *fdt_string(const void *fdt, int stroffset) +-{ +- return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; +-} +- +-static int _fdt_string_eq(const void *fdt, int stroffset, +- const char *s, int len) ++const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) + { +- const char *p = fdt_string(fdt, stroffset); ++ int32_t totalsize; ++ uint32_t absoffset; ++ size_t len; ++ int err; ++ const char *s, *n; + +- return (strnlen(p, len + 1) == len) && (memcmp(p, s, len) == 0); +-} ++ if (!fdt_chk_extra()) { ++ s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; + +-uint32_t fdt_get_max_phandle(const void *fdt) +-{ +- uint32_t max_phandle = 0; +- int offset; ++ if (lenp) ++ *lenp = strlen(s); ++ return s; ++ } ++ totalsize = fdt_ro_probe_(fdt); ++ err = totalsize; ++ if (totalsize < 0) ++ goto fail; ++ ++ err = -FDT_ERR_BADOFFSET; ++ absoffset = stroffset + fdt_off_dt_strings(fdt); ++ if (absoffset >= totalsize) ++ goto fail; ++ len = totalsize - absoffset; ++ ++ if (fdt_magic(fdt) == FDT_MAGIC) { ++ if (stroffset < 0) ++ goto fail; ++ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { ++ if (stroffset >= fdt_size_dt_strings(fdt)) ++ goto fail; ++ if ((fdt_size_dt_strings(fdt) - stroffset) < len) ++ len = fdt_size_dt_strings(fdt) - stroffset; ++ } ++ } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { ++ if ((stroffset >= 0) ++ || (stroffset < -fdt_size_dt_strings(fdt))) ++ goto fail; ++ if ((-stroffset) < len) ++ len = -stroffset; ++ } else { ++ err = -FDT_ERR_INTERNAL; ++ goto fail; ++ } + +- for (offset = fdt_next_node(fdt, -1, NULL);; +- offset = fdt_next_node(fdt, offset, NULL)) { +- uint32_t phandle; ++ s = (const char *)fdt + absoffset; ++ n = memchr(s, '\0', len); ++ if (!n) { ++ /* missing terminating NULL */ ++ err = -FDT_ERR_TRUNCATED; ++ goto fail; ++ } + +- if (offset == -FDT_ERR_NOTFOUND) +- return max_phandle; ++ if (lenp) ++ *lenp = n - s; ++ return s; + +- if (offset < 0) +- return (uint32_t)-1; ++fail: ++ if (lenp) ++ *lenp = err; ++ return NULL; ++} + +- phandle = fdt_get_phandle(fdt, offset); +- if (phandle == (uint32_t)-1) +- continue; ++const char *fdt_string(const void *fdt, int stroffset) ++{ ++ return fdt_get_string(fdt, stroffset, NULL); ++} + +- if (phandle > max_phandle) +- max_phandle = phandle; +- } ++static int fdt_string_eq_(const void *fdt, int stroffset, ++ const char *s, int len) ++{ ++ int slen; ++ const char *p = fdt_get_string(fdt, stroffset, &slen); + +- return 0; ++ return p && (slen == len) && (memcmp(p, s, len) == 0); + } + +-int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++int fdt_find_max_phandle(const void *fdt, uint32_t *phandle) + { + uint32_t max = 0; + int offset = -1; +@@ -95,6 +135,21 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) + max = value; + } + ++ if (phandle) ++ *phandle = max; ++ ++ return 0; ++} ++ ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max; ++ int err; ++ ++ err = fdt_find_max_phandle(fdt, &max); ++ if (err < 0) ++ return err; ++ + if (max == FDT_MAX_PHANDLE) + return -FDT_ERR_NOPHANDLES; + +@@ -104,24 +159,48 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) + return 0; + } + ++static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) ++{ ++ int offset = n * sizeof(struct fdt_reserve_entry); ++ int absoffset = fdt_off_mem_rsvmap(fdt) + offset; ++ ++ if (fdt_chk_extra()) { ++ if (absoffset < fdt_off_mem_rsvmap(fdt)) ++ return NULL; ++ if (absoffset > fdt_totalsize(fdt) - ++ sizeof(struct fdt_reserve_entry)) ++ return NULL; ++ } ++ return fdt_mem_rsv_(fdt, n); ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { +- FDT_CHECK_HEADER(fdt); +- *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); +- *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); ++ const struct fdt_reserve_entry *re; ++ ++ FDT_RO_PROBE(fdt); ++ re = fdt_mem_rsv(fdt, n); ++ if (fdt_chk_extra() && !re) ++ return -FDT_ERR_BADOFFSET; ++ ++ *address = fdt64_ld(&re->address); ++ *size = fdt64_ld(&re->size); + return 0; + } + + int fdt_num_mem_rsv(const void *fdt) + { +- int i = 0; ++ int i; ++ const struct fdt_reserve_entry *re; + +- while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) +- i++; +- return i; ++ for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { ++ if (fdt64_ld(&re->size) == 0) ++ return i; ++ } ++ return -FDT_ERR_TRUNCATED; + } + +-static int _nextprop(const void *fdt, int offset) ++static int nextprop_(const void *fdt, int offset) + { + uint32_t tag; + int nextoffset; +@@ -150,13 +229,13 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset, + { + int depth; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + for (depth = 0; + (offset >= 0) && (depth >= 0); + offset = fdt_next_node(fdt, offset, &depth)) + if ((depth == 1) +- && _fdt_nodename_eq(fdt, offset, name, namelen)) ++ && fdt_nodename_eq_(fdt, offset, name, namelen)) + return offset; + + if (depth < 0) +@@ -170,36 +249,17 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, + return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name)); + } + +-/* +- * Find the next of path separator, note we need to search for both '/' and ':' +- * and then take the first one so that we do the right thing for e.g. +- * "foo/bar:option" and "bar:option/otheroption", both of which happen, so +- * first searching for either ':' or '/' does not work. +- */ +-static const char *fdt_path_next_separator(const char *path, int len) +-{ +- const void *sep1 = memchr(path, '/', len); +- const void *sep2 = memchr(path, ':', len); +- +- if (sep1 && sep2) +- return (sep1 < sep2) ? sep1 : sep2; +- else if (sep1) +- return sep1; +- else +- return sep2; +-} +- + int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) + { + const char *end = path + namelen; + const char *p = path; + int offset = 0; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* see if we have an alias */ + if (*path != '/') { +- const char *q = fdt_path_next_separator(path, namelen); ++ const char *q = memchr(path, '/', end - p); + + if (!q) + q = end; +@@ -212,17 +272,16 @@ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) + p = q; + } + +- while (*p && (p < end)) { ++ while (p < end) { + const char *q; + +- while (*p == '/') ++ while (*p == '/') { + p++; +- +- if (*p == '\0' || *p == ':') +- return offset; +- +- q = fdt_path_next_separator(p, end - p); +- if (!q) ++ if (p == end) ++ return offset; ++ } ++ q = memchr(p, '/', end - p); ++ if (! q) + q = end; + + offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p); +@@ -243,16 +302,35 @@ int fdt_path_offset(const void *fdt, const char *path) + const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) + { + const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset); ++ const char *nameptr; + int err; + +- if (((err = fdt_check_header(fdt)) != 0) +- || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) ++ if (fdt_chk_extra() && ++ (((err = fdt_ro_probe_(fdt)) < 0) ++ || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) ++ goto fail; ++ ++ nameptr = nh->name; ++ ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { ++ /* ++ * For old FDT versions, match the naming conventions of V16: ++ * give only the leaf name (after all /). The actual tree ++ * contents are loosely checked. ++ */ ++ const char *leaf; ++ leaf = strrchr(nameptr, '/'); ++ if (leaf == NULL) { ++ err = -FDT_ERR_BADSTRUCTURE; + goto fail; ++ } ++ nameptr = leaf+1; ++ } + + if (len) +- *len = strlen(nh->name); ++ *len = strlen(nameptr); + +- return nh->name; ++ return nameptr; + + fail: + if (len) +@@ -267,7 +345,7 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset) + if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) + return offset; + +- return _nextprop(fdt, offset); ++ return nextprop_(fdt, offset); + } + + int fdt_next_property_offset(const void *fdt, int offset) +@@ -275,17 +353,17 @@ int fdt_next_property_offset(const void *fdt, int offset) + if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0) + return offset; + +- return _nextprop(fdt, offset); ++ return nextprop_(fdt, offset); + } + +-const struct fdt_property *fdt_get_property_by_offset(const void *fdt, +- int offset, +- int *lenp) ++static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, ++ int offset, ++ int *lenp) + { + int err; + const struct fdt_property *prop; + +- if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { ++ if (fdt_chk_basic() && (err = fdt_check_prop_offset_(fdt, offset)) < 0) { + if (lenp) + *lenp = err; + return NULL; +@@ -294,28 +372,50 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, + prop = fdt_offset_ptr_(fdt, offset); + + if (lenp) +- *lenp = fdt32_to_cpu(prop->len); ++ *lenp = fdt32_ld(&prop->len); + + return prop; + } + +-const struct fdt_property *fdt_get_property_namelen(const void *fdt, +- int offset, +- const char *name, +- int namelen, int *lenp) ++const struct fdt_property *fdt_get_property_by_offset(const void *fdt, ++ int offset, ++ int *lenp) ++{ ++ /* Prior to version 16, properties may need realignment ++ * and this API does not work. fdt_getprop_*() will, however. */ ++ ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { ++ if (lenp) ++ *lenp = -FDT_ERR_BADVERSION; ++ return NULL; ++ } ++ ++ return fdt_get_property_by_offset_(fdt, offset, lenp); ++} ++ ++static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, ++ int offset, ++ const char *name, ++ int namelen, ++ int *lenp, ++ int *poffset) + { + for (offset = fdt_first_property_offset(fdt, offset); + (offset >= 0); + (offset = fdt_next_property_offset(fdt, offset))) { + const struct fdt_property *prop; + +- if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) { ++ prop = fdt_get_property_by_offset_(fdt, offset, lenp); ++ if (fdt_chk_extra() && !prop) { + offset = -FDT_ERR_INTERNAL; + break; + } +- if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff), +- name, namelen)) ++ if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff), ++ name, namelen)) { ++ if (poffset) ++ *poffset = offset; + return prop; ++ } + } + + if (lenp) +@@ -323,6 +423,25 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, + return NULL; + } + ++ ++const struct fdt_property *fdt_get_property_namelen(const void *fdt, ++ int offset, ++ const char *name, ++ int namelen, int *lenp) ++{ ++ /* Prior to version 16, properties may need realignment ++ * and this API does not work. fdt_getprop_*() will, however. */ ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { ++ if (lenp) ++ *lenp = -FDT_ERR_BADVERSION; ++ return NULL; ++ } ++ ++ return fdt_get_property_namelen_(fdt, offset, name, namelen, lenp, ++ NULL); ++} ++ ++ + const struct fdt_property *fdt_get_property(const void *fdt, + int nodeoffset, + const char *name, int *lenp) +@@ -334,12 +453,18 @@ const struct fdt_property *fdt_get_property(const void *fdt, + const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, + const char *name, int namelen, int *lenp) + { ++ int poffset; + const struct fdt_property *prop; + +- prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp); ++ prop = fdt_get_property_namelen_(fdt, nodeoffset, name, namelen, lenp, ++ &poffset); + if (!prop) + return NULL; + ++ /* Handle realignment */ ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && ++ (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) ++ return prop->data + 4; + return prop->data; + } + +@@ -348,11 +473,31 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, + { + const struct fdt_property *prop; + +- prop = fdt_get_property_by_offset(fdt, offset, lenp); ++ prop = fdt_get_property_by_offset_(fdt, offset, lenp); + if (!prop) + return NULL; +- if (namep) +- *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); ++ if (namep) { ++ const char *name; ++ int namelen; ++ ++ if (fdt_chk_extra()) { ++ name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff), ++ &namelen); ++ if (!name) { ++ if (lenp) ++ *lenp = namelen; ++ return NULL; ++ } ++ *namep = name; ++ } else { ++ *namep = fdt_string(fdt, fdt32_ld(&prop->nameoff)); ++ } ++ } ++ ++ /* Handle realignment */ ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && ++ (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) ++ return prop->data + 4; + return prop->data; + } + +@@ -376,7 +521,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) + return 0; + } + +- return fdt32_to_cpu(*php); ++ return fdt32_ld(php); + } + + const char *fdt_get_alias_namelen(const void *fdt, +@@ -402,7 +547,7 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) + int offset, depth, namelen; + const char *name; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + if (buflen < 2) + return -FDT_ERR_NOSPACE; +@@ -454,7 +599,7 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, + int offset, depth; + int supernodeoffset = -FDT_ERR_INTERNAL; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + if (supernodedepth < 0) + return -FDT_ERR_NOTFOUND; +@@ -476,10 +621,12 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, + } + } + +- if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) +- return -FDT_ERR_BADOFFSET; +- else if (offset == -FDT_ERR_BADOFFSET) +- return -FDT_ERR_BADSTRUCTURE; ++ if (fdt_chk_extra()) { ++ if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) ++ return -FDT_ERR_BADOFFSET; ++ else if (offset == -FDT_ERR_BADOFFSET) ++ return -FDT_ERR_BADSTRUCTURE; ++ } + + return offset; /* error from fdt_next_node() */ + } +@@ -491,7 +638,7 @@ int fdt_node_depth(const void *fdt, int nodeoffset) + + err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); + if (err) +- return (err < 0) ? err : -FDT_ERR_INTERNAL; ++ return (!fdt_chk_extra() || err < 0) ? err : -FDT_ERR_INTERNAL; + return nodedepth; + } + +@@ -513,7 +660,7 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, + const void *val; + int len; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we scan each + * property of a node in fdt_getprop(), then if that didn't +@@ -539,7 +686,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) + if ((phandle == 0) || (phandle == -1)) + return -FDT_ERR_BADPHANDLE; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we + * potentially scan each property of a node in +@@ -692,7 +839,7 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, + { + int offset, err; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we scan each + * property of a node in fdt_node_check_compatible(), then if +@@ -711,3 +858,68 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, + + return offset; /* error from fdt_next_node() */ + } ++ ++#if !defined(CHECK_LEVEL) || CHECK_LEVEL > 0 ++int fdt_check_full(const void *fdt, size_t bufsize) ++{ ++ int err; ++ int num_memrsv; ++ int offset, nextoffset = 0; ++ uint32_t tag; ++ unsigned depth = 0; ++ const void *prop; ++ const char *propname; ++ ++ if (bufsize < FDT_V1_SIZE) ++ return -FDT_ERR_TRUNCATED; ++ err = fdt_check_header(fdt); ++ if (err != 0) ++ return err; ++ if (bufsize < fdt_totalsize(fdt)) ++ return -FDT_ERR_TRUNCATED; ++ ++ num_memrsv = fdt_num_mem_rsv(fdt); ++ if (num_memrsv < 0) ++ return num_memrsv; ++ ++ while (1) { ++ offset = nextoffset; ++ tag = fdt_next_tag(fdt, offset, &nextoffset); ++ ++ if (nextoffset < 0) ++ return nextoffset; ++ ++ switch (tag) { ++ case FDT_NOP: ++ break; ++ ++ case FDT_END: ++ if (depth != 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ return 0; ++ ++ case FDT_BEGIN_NODE: ++ depth++; ++ if (depth > INT_MAX) ++ return -FDT_ERR_BADSTRUCTURE; ++ break; ++ ++ case FDT_END_NODE: ++ if (depth == 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ depth--; ++ break; ++ ++ case FDT_PROP: ++ prop = fdt_getprop_by_offset(fdt, offset, &propname, ++ &err); ++ if (!prop) ++ return err; ++ break; ++ ++ default: ++ return -FDT_ERR_INTERNAL; ++ } ++ } ++} ++#endif +diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt +index 098b3f36e6..e54639738c 100644 +--- a/scripts/dtc/libfdt/Makefile.libfdt ++++ b/scripts/dtc/libfdt/Makefile.libfdt +@@ -1,3 +1,4 @@ ++# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + # Makefile.libfdt + # + # This is not a complete Makefile of itself. Instead, it is designed to +@@ -9,3 +10,9 @@ LIBFDT_VERSION = version.lds + LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \ + fdt_addresses.c fdt_overlay.c + LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o) ++LIBFDT_LIB = libfdt-$(DTC_VERSION).$(SHAREDLIB_EXT) ++ ++libfdt_clean: ++ @$(VECHO) CLEAN "(libfdt)" ++ rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%) ++ rm -f $(LIBFDT_dir)/$(LIBFDT_soname) +diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c +index 7855a17877..8e4cce3b9b 100644 +--- a/scripts/dtc/libfdt/fdt.c ++++ b/scripts/dtc/libfdt/fdt.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -55,14 +10,24 @@ + + #include "libfdt_internal.h" + +-int fdt_check_header(const void *fdt) ++/* ++ * Minimal sanity check for a read-only tree. fdt_ro_probe_() checks ++ * that the given buffer contains what appears to be a flattened ++ * device tree with sane information in its header. ++ */ ++int32_t fdt_ro_probe_(const void *fdt) + { ++ uint32_t totalsize = fdt_totalsize(fdt); ++ + if (fdt_magic(fdt) == FDT_MAGIC) { + /* Complete tree */ +- if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) +- return -FDT_ERR_BADVERSION; +- if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION) +- return -FDT_ERR_BADVERSION; ++ if (fdt_chk_version()) { ++ if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) ++ return -FDT_ERR_BADVERSION; ++ if (fdt_last_comp_version(fdt) > ++ FDT_LAST_SUPPORTED_VERSION) ++ return -FDT_ERR_BADVERSION; ++ } + } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { + /* Unfinished sequential-write blob */ + if (fdt_size_dt_struct(fdt) == 0) +@@ -71,6 +36,96 @@ int fdt_check_header(const void *fdt) + return -FDT_ERR_BADMAGIC; + } + ++ if (totalsize < INT32_MAX) ++ return totalsize; ++ else ++ return -FDT_ERR_TRUNCATED; ++} ++ ++static int check_off_(uint32_t hdrsize, uint32_t totalsize, uint32_t off) ++{ ++ return (off >= hdrsize) && (off <= totalsize); ++} ++ ++static int check_block_(uint32_t hdrsize, uint32_t totalsize, ++ uint32_t base, uint32_t size) ++{ ++ if (!check_off_(hdrsize, totalsize, base)) ++ return 0; /* block start out of bounds */ ++ if ((base + size) < base) ++ return 0; /* overflow */ ++ if (!check_off_(hdrsize, totalsize, base + size)) ++ return 0; /* block end out of bounds */ ++ return 1; ++} ++ ++size_t fdt_header_size_(uint32_t version) ++{ ++ if (version <= 1) ++ return FDT_V1_SIZE; ++ else if (version <= 2) ++ return FDT_V2_SIZE; ++ else if (version <= 3) ++ return FDT_V3_SIZE; ++ else if (version <= 16) ++ return FDT_V16_SIZE; ++ else ++ return FDT_V17_SIZE; ++} ++ ++size_t fdt_header_size(const void *fdt) ++{ ++ return fdt_chk_version() ? fdt_header_size_(fdt_version(fdt)) : ++ FDT_V17_SIZE; ++} ++ ++int fdt_check_header(const void *fdt) ++{ ++ size_t hdrsize; ++ ++ if (fdt_magic(fdt) != FDT_MAGIC) ++ return -FDT_ERR_BADMAGIC; ++ if (fdt_chk_version()) { ++ if ((fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) ++ || (fdt_last_comp_version(fdt) > ++ FDT_LAST_SUPPORTED_VERSION)) ++ return -FDT_ERR_BADVERSION; ++ if (fdt_version(fdt) < fdt_last_comp_version(fdt)) ++ return -FDT_ERR_BADVERSION; ++ } ++ hdrsize = fdt_header_size(fdt); ++ if (fdt_chk_basic()) { ++ ++ if ((fdt_totalsize(fdt) < hdrsize) ++ || (fdt_totalsize(fdt) > INT_MAX)) ++ return -FDT_ERR_TRUNCATED; ++ ++ /* Bounds check memrsv block */ ++ if (!check_off_(hdrsize, fdt_totalsize(fdt), ++ fdt_off_mem_rsvmap(fdt))) ++ return -FDT_ERR_TRUNCATED; ++ } ++ ++ if (fdt_chk_extra()) { ++ /* Bounds check structure block */ ++ if (fdt_chk_version() && fdt_version(fdt) < 17) { ++ if (!check_off_(hdrsize, fdt_totalsize(fdt), ++ fdt_off_dt_struct(fdt))) ++ return -FDT_ERR_TRUNCATED; ++ } else { ++ if (!check_block_(hdrsize, fdt_totalsize(fdt), ++ fdt_off_dt_struct(fdt), ++ fdt_size_dt_struct(fdt))) ++ return -FDT_ERR_TRUNCATED; ++ } ++ ++ /* Bounds check strings block */ ++ if (!check_block_(hdrsize, fdt_totalsize(fdt), ++ fdt_off_dt_strings(fdt), ++ fdt_size_dt_strings(fdt))) ++ return -FDT_ERR_TRUNCATED; ++ } ++ + return 0; + } + +@@ -78,12 +133,13 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) + { + unsigned absoffset = offset + fdt_off_dt_struct(fdt); + +- if ((absoffset < offset) +- || ((absoffset + len) < absoffset) +- || (absoffset + len) > fdt_totalsize(fdt)) +- return NULL; ++ if (fdt_chk_basic()) ++ if ((absoffset < offset) ++ || ((absoffset + len) < absoffset) ++ || (absoffset + len) > fdt_totalsize(fdt)) ++ return NULL; + +- if (fdt_version(fdt) >= 0x11) ++ if (!fdt_chk_version() || fdt_version(fdt) >= 0x11) + if (((offset + len) < offset) + || ((offset + len) > fdt_size_dt_struct(fdt))) + return NULL; +@@ -100,7 +156,7 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) + + *nextoffset = -FDT_ERR_TRUNCATED; + tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); +- if (!tagp) ++ if (fdt_chk_basic() && !tagp) + return FDT_END; /* premature end */ + tag = fdt32_to_cpu(*tagp); + offset += FDT_TAGSIZE; +@@ -112,18 +168,19 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) + do { + p = fdt_offset_ptr(fdt, offset++, 1); + } while (p && (*p != '\0')); +- if (!p) ++ if (fdt_chk_basic() && !p) + return FDT_END; /* premature end */ + break; + + case FDT_PROP: + lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); +- if (!lenp) ++ if (fdt_chk_basic() && !lenp) + return FDT_END; /* premature end */ + /* skip-name offset, length and value */ + offset += sizeof(struct fdt_property) - FDT_TAGSIZE + + fdt32_to_cpu(*lenp); +- if (fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && ++ if (fdt_chk_version() && ++ fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && + ((offset - fdt32_to_cpu(*lenp)) % 8) != 0) + offset += 4; + break; +@@ -137,7 +194,8 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) + return FDT_END; + } + +- if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset)) ++ if (fdt_chk_basic() && ++ !fdt_offset_ptr(fdt, startoffset, offset - startoffset)) + return FDT_END; /* premature end */ + + *nextoffset = FDT_TAGALIGN(offset); +@@ -244,7 +302,7 @@ const char *fdt_find_string_(const char *strtab, int tabsize, const char *s) + + int fdt_move(const void *fdt, void *buf, int bufsize) + { +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + if (fdt_totalsize(fdt) > bufsize) + return -FDT_ERR_NOSPACE; +diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h +index 74961f9026..f2e68807f2 100644 +--- a/scripts/dtc/libfdt/fdt.h ++++ b/scripts/dtc/libfdt/fdt.h +@@ -1,55 +1,10 @@ ++/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ + #ifndef FDT_H + #define FDT_H + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. + * Copyright 2012 Kim Phillips, Freescale Semiconductor. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + #ifndef __ASSEMBLY__ +diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c +index 788c143113..9a82cd0ba2 100644 +--- a/scripts/dtc/libfdt/fdt_addresses.c ++++ b/scripts/dtc/libfdt/fdt_addresses.c +@@ -1,53 +1,8 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2014 David Gibson + * Copyright (C) 2018 embedded brains GmbH +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -97,3 +52,50 @@ int fdt_size_cells(const void *fdt, int nodeoffset) + return 1; + return val; + } ++ ++/* This function assumes that [address|size]_cells is 1 or 2 */ ++int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, ++ const char *name, uint64_t addr, uint64_t size) ++{ ++ int addr_cells, size_cells, ret; ++ uint8_t data[sizeof(fdt64_t) * 2], *prop; ++ ++ ret = fdt_address_cells(fdt, parent); ++ if (ret < 0) ++ return ret; ++ addr_cells = ret; ++ ++ ret = fdt_size_cells(fdt, parent); ++ if (ret < 0) ++ return ret; ++ size_cells = ret; ++ ++ /* check validity of address */ ++ prop = data; ++ if (addr_cells == 1) { ++ if ((addr > UINT32_MAX) || ((UINT32_MAX + 1 - addr) < size)) ++ return -FDT_ERR_BADVALUE; ++ ++ fdt32_st(prop, (uint32_t)addr); ++ } else if (addr_cells == 2) { ++ fdt64_st(prop, addr); ++ } else { ++ return -FDT_ERR_BADNCELLS; ++ } ++ ++ /* check validity of size */ ++ prop += addr_cells * sizeof(fdt32_t); ++ if (size_cells == 1) { ++ if (size > UINT32_MAX) ++ return -FDT_ERR_BADVALUE; ++ ++ fdt32_st(prop, (uint32_t)size); ++ } else if (size_cells == 2) { ++ fdt64_st(prop, size); ++ } else { ++ return -FDT_ERR_BADNCELLS; ++ } ++ ++ return fdt_appendprop(fdt, nodeoffset, name, data, ++ (addr_cells + size_cells) * sizeof(fdt32_t)); ++} +diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c +index f2ae9b77c2..49d54d44b8 100644 +--- a/scripts/dtc/libfdt/fdt_empty_tree.c ++++ b/scripts/dtc/libfdt/fdt_empty_tree.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2012 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c +index bf75388ec9..be71873366 100644 +--- a/scripts/dtc/libfdt/fdt_overlay.c ++++ b/scripts/dtc/libfdt/fdt_overlay.c +@@ -1,53 +1,8 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2016 Free Electrons + * Copyright (C) 2016 NextThing Co. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -93,11 +48,11 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment) + * @pathp: pointer which receives the path of the target (or NULL) + * + * overlay_get_target() retrieves the target offset in the base +- * device tree of a fragment, no matter how the actual targetting is ++ * device tree of a fragment, no matter how the actual targeting is + * done (through a phandle or a path) + * + * returns: +- * the targetted node offset in the base device tree ++ * the targeted node offset in the base device tree + * Negative error code on error + */ + static int overlay_get_target(const void *fdt, const void *fdto, +@@ -697,7 +652,7 @@ static int get_path_len(const void *fdt, int nodeoffset) + int len = 0, namelen; + const char *name; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + for (;;) { + name = fdt_get_name(fdt, nodeoffset, &namelen); +@@ -778,26 +733,36 @@ static int overlay_symbol_update(void *fdt, void *fdto) + /* keep end marker to avoid strlen() */ + e = path + path_len; + +- /* format: //__overlay__/ */ +- + if (*path != '/') + return -FDT_ERR_BADVALUE; + + /* get fragment name first */ + s = strchr(path + 1, '/'); +- if (!s) +- return -FDT_ERR_BADOVERLAY; ++ if (!s) { ++ /* Symbol refers to something that won't end ++ * up in the target tree */ ++ continue; ++ } + + frag_name = path + 1; + frag_name_len = s - path - 1; + + /* verify format; safe since "s" lies in \0 terminated prop */ + len = sizeof("/__overlay__/") - 1; +- if ((e - s) < len || memcmp(s, "/__overlay__/", len)) +- return -FDT_ERR_BADOVERLAY; +- +- rel_path = s + len; +- rel_path_len = e - rel_path; ++ if ((e - s) > len && (memcmp(s, "/__overlay__/", len) == 0)) { ++ /* //__overlay__/ */ ++ rel_path = s + len; ++ rel_path_len = e - rel_path; ++ } else if ((e - s) == len ++ && (memcmp(s, "/__overlay__", len - 1) == 0)) { ++ /* //__overlay__ */ ++ rel_path = ""; ++ rel_path_len = 0; ++ } else { ++ /* Symbol refers to something that won't end ++ * up in the target tree */ ++ continue; ++ } + + /* find the fragment index in which the symbol lies */ + ret = fdt_subnode_offset_namelen(fdto, 0, frag_name, +@@ -863,11 +828,15 @@ static int overlay_symbol_update(void *fdt, void *fdto) + + int fdt_overlay_apply(void *fdt, void *fdto) + { +- uint32_t delta = fdt_get_max_phandle(fdt); ++ uint32_t delta; + int ret; + +- FDT_CHECK_HEADER(fdt); +- FDT_CHECK_HEADER(fdto); ++ FDT_RO_PROBE(fdt); ++ FDT_RO_PROBE(fdto); ++ ++ ret = fdt_find_max_phandle(fdt, &delta); ++ if (ret) ++ goto err; + + ret = overlay_adjust_local_phandles(fdto, delta); + if (ret) +diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c +index dc499884e4..e398815485 100644 +--- a/scripts/dtc/libfdt/fdt_ro.c ++++ b/scripts/dtc/libfdt/fdt_ro.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -61,7 +16,7 @@ static int fdt_nodename_eq_(const void *fdt, int offset, + int olen; + const char *p = fdt_get_name(fdt, offset, &olen); + +- if (!p || olen < len) ++ if (!p || (fdt_chk_extra() && olen < len)) + /* short match */ + return 0; + +@@ -76,46 +31,85 @@ static int fdt_nodename_eq_(const void *fdt, int offset, + return 0; + } + +-const char *fdt_string(const void *fdt, int stroffset) +-{ +- return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; +-} +- +-static int fdt_string_eq_(const void *fdt, int stroffset, +- const char *s, int len) ++const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) + { +- const char *p = fdt_string(fdt, stroffset); ++ int32_t totalsize; ++ uint32_t absoffset; ++ size_t len; ++ int err; ++ const char *s, *n; + +- return (strlen(p) == len) && (memcmp(p, s, len) == 0); +-} ++ if (!fdt_chk_extra()) { ++ s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; + +-uint32_t fdt_get_max_phandle(const void *fdt) +-{ +- uint32_t max_phandle = 0; +- int offset; ++ if (lenp) ++ *lenp = strlen(s); ++ return s; ++ } ++ totalsize = fdt_ro_probe_(fdt); ++ err = totalsize; ++ if (totalsize < 0) ++ goto fail; ++ ++ err = -FDT_ERR_BADOFFSET; ++ absoffset = stroffset + fdt_off_dt_strings(fdt); ++ if (absoffset >= totalsize) ++ goto fail; ++ len = totalsize - absoffset; ++ ++ if (fdt_magic(fdt) == FDT_MAGIC) { ++ if (stroffset < 0) ++ goto fail; ++ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { ++ if (stroffset >= fdt_size_dt_strings(fdt)) ++ goto fail; ++ if ((fdt_size_dt_strings(fdt) - stroffset) < len) ++ len = fdt_size_dt_strings(fdt) - stroffset; ++ } ++ } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { ++ if ((stroffset >= 0) ++ || (stroffset < -fdt_size_dt_strings(fdt))) ++ goto fail; ++ if ((-stroffset) < len) ++ len = -stroffset; ++ } else { ++ err = -FDT_ERR_INTERNAL; ++ goto fail; ++ } + +- for (offset = fdt_next_node(fdt, -1, NULL);; +- offset = fdt_next_node(fdt, offset, NULL)) { +- uint32_t phandle; ++ s = (const char *)fdt + absoffset; ++ n = memchr(s, '\0', len); ++ if (!n) { ++ /* missing terminating NULL */ ++ err = -FDT_ERR_TRUNCATED; ++ goto fail; ++ } + +- if (offset == -FDT_ERR_NOTFOUND) +- return max_phandle; ++ if (lenp) ++ *lenp = n - s; ++ return s; + +- if (offset < 0) +- return (uint32_t)-1; ++fail: ++ if (lenp) ++ *lenp = err; ++ return NULL; ++} + +- phandle = fdt_get_phandle(fdt, offset); +- if (phandle == (uint32_t)-1) +- continue; ++const char *fdt_string(const void *fdt, int stroffset) ++{ ++ return fdt_get_string(fdt, stroffset, NULL); ++} + +- if (phandle > max_phandle) +- max_phandle = phandle; +- } ++static int fdt_string_eq_(const void *fdt, int stroffset, ++ const char *s, int len) ++{ ++ int slen; ++ const char *p = fdt_get_string(fdt, stroffset, &slen); + +- return 0; ++ return p && (slen == len) && (memcmp(p, s, len) == 0); + } + +-int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++int fdt_find_max_phandle(const void *fdt, uint32_t *phandle) + { + uint32_t max = 0; + int offset = -1; +@@ -137,6 +131,21 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) + max = value; + } + ++ if (phandle) ++ *phandle = max; ++ ++ return 0; ++} ++ ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max; ++ int err; ++ ++ err = fdt_find_max_phandle(fdt, &max); ++ if (err < 0) ++ return err; ++ + if (max == FDT_MAX_PHANDLE) + return -FDT_ERR_NOPHANDLES; + +@@ -146,21 +155,45 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) + return 0; + } + ++static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) ++{ ++ int offset = n * sizeof(struct fdt_reserve_entry); ++ int absoffset = fdt_off_mem_rsvmap(fdt) + offset; ++ ++ if (fdt_chk_extra()) { ++ if (absoffset < fdt_off_mem_rsvmap(fdt)) ++ return NULL; ++ if (absoffset > fdt_totalsize(fdt) - ++ sizeof(struct fdt_reserve_entry)) ++ return NULL; ++ } ++ return fdt_mem_rsv_(fdt, n); ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { +- FDT_CHECK_HEADER(fdt); +- *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); +- *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); ++ const struct fdt_reserve_entry *re; ++ ++ FDT_RO_PROBE(fdt); ++ re = fdt_mem_rsv(fdt, n); ++ if (fdt_chk_extra() && !re) ++ return -FDT_ERR_BADOFFSET; ++ ++ *address = fdt64_ld(&re->address); ++ *size = fdt64_ld(&re->size); + return 0; + } + + int fdt_num_mem_rsv(const void *fdt) + { +- int i = 0; ++ int i; ++ const struct fdt_reserve_entry *re; + +- while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) +- i++; +- return i; ++ for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { ++ if (fdt64_ld(&re->size) == 0) ++ return i; ++ } ++ return -FDT_ERR_TRUNCATED; + } + + static int nextprop_(const void *fdt, int offset) +@@ -192,7 +225,7 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset, + { + int depth; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + for (depth = 0; + (offset >= 0) && (depth >= 0); +@@ -218,7 +251,7 @@ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) + const char *p = path; + int offset = 0; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* see if we have an alias */ + if (*path != '/') { +@@ -268,13 +301,14 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) + const char *nameptr; + int err; + +- if (((err = fdt_check_header(fdt)) != 0) +- || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) +- goto fail; ++ if (fdt_chk_extra() && ++ (((err = fdt_ro_probe_(fdt)) < 0) ++ || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) ++ goto fail; + + nameptr = nh->name; + +- if (fdt_version(fdt) < 0x10) { ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { + /* + * For old FDT versions, match the naming conventions of V16: + * give only the leaf name (after all /). The actual tree +@@ -325,7 +359,7 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, + int err; + const struct fdt_property *prop; + +- if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { ++ if (fdt_chk_basic() && (err = fdt_check_prop_offset_(fdt, offset)) < 0) { + if (lenp) + *lenp = err; + return NULL; +@@ -334,7 +368,7 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, + prop = fdt_offset_ptr_(fdt, offset); + + if (lenp) +- *lenp = fdt32_to_cpu(prop->len); ++ *lenp = fdt32_ld(&prop->len); + + return prop; + } +@@ -346,7 +380,7 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, + /* Prior to version 16, properties may need realignment + * and this API does not work. fdt_getprop_*() will, however. */ + +- if (fdt_version(fdt) < 0x10) { ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { + if (lenp) + *lenp = -FDT_ERR_BADVERSION; + return NULL; +@@ -367,11 +401,12 @@ static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, + (offset = fdt_next_property_offset(fdt, offset))) { + const struct fdt_property *prop; + +- if (!(prop = fdt_get_property_by_offset_(fdt, offset, lenp))) { ++ prop = fdt_get_property_by_offset_(fdt, offset, lenp); ++ if (fdt_chk_extra() && !prop) { + offset = -FDT_ERR_INTERNAL; + break; + } +- if (fdt_string_eq_(fdt, fdt32_to_cpu(prop->nameoff), ++ if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff), + name, namelen)) { + if (poffset) + *poffset = offset; +@@ -392,7 +427,7 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, + { + /* Prior to version 16, properties may need realignment + * and this API does not work. fdt_getprop_*() will, however. */ +- if (fdt_version(fdt) < 0x10) { ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { + if (lenp) + *lenp = -FDT_ERR_BADVERSION; + return NULL; +@@ -423,8 +458,8 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, + return NULL; + + /* Handle realignment */ +- if (fdt_version(fdt) < 0x10 && (poffset + sizeof(*prop)) % 8 && +- fdt32_to_cpu(prop->len) >= 8) ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && ++ (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) + return prop->data + 4; + return prop->data; + } +@@ -437,12 +472,27 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, + prop = fdt_get_property_by_offset_(fdt, offset, lenp); + if (!prop) + return NULL; +- if (namep) +- *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); ++ if (namep) { ++ const char *name; ++ int namelen; ++ ++ if (fdt_chk_extra()) { ++ name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff), ++ &namelen); ++ if (!name) { ++ if (lenp) ++ *lenp = namelen; ++ return NULL; ++ } ++ *namep = name; ++ } else { ++ *namep = fdt_string(fdt, fdt32_ld(&prop->nameoff)); ++ } ++ } + + /* Handle realignment */ +- if (fdt_version(fdt) < 0x10 && (offset + sizeof(*prop)) % 8 && +- fdt32_to_cpu(prop->len) >= 8) ++ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && ++ (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) + return prop->data + 4; + return prop->data; + } +@@ -467,7 +517,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) + return 0; + } + +- return fdt32_to_cpu(*php); ++ return fdt32_ld(php); + } + + const char *fdt_get_alias_namelen(const void *fdt, +@@ -493,7 +543,7 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) + int offset, depth, namelen; + const char *name; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + if (buflen < 2) + return -FDT_ERR_NOSPACE; +@@ -545,7 +595,7 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, + int offset, depth; + int supernodeoffset = -FDT_ERR_INTERNAL; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + if (supernodedepth < 0) + return -FDT_ERR_NOTFOUND; +@@ -567,10 +617,12 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, + } + } + +- if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) +- return -FDT_ERR_BADOFFSET; +- else if (offset == -FDT_ERR_BADOFFSET) +- return -FDT_ERR_BADSTRUCTURE; ++ if (fdt_chk_extra()) { ++ if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) ++ return -FDT_ERR_BADOFFSET; ++ else if (offset == -FDT_ERR_BADOFFSET) ++ return -FDT_ERR_BADSTRUCTURE; ++ } + + return offset; /* error from fdt_next_node() */ + } +@@ -582,7 +634,7 @@ int fdt_node_depth(const void *fdt, int nodeoffset) + + err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); + if (err) +- return (err < 0) ? err : -FDT_ERR_INTERNAL; ++ return (!fdt_chk_extra() || err < 0) ? err : -FDT_ERR_INTERNAL; + return nodedepth; + } + +@@ -604,7 +656,7 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, + const void *val; + int len; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we scan each + * property of a node in fdt_getprop(), then if that didn't +@@ -630,7 +682,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) + if ((phandle == 0) || (phandle == -1)) + return -FDT_ERR_BADPHANDLE; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we + * potentially scan each property of a node in +@@ -783,7 +835,7 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, + { + int offset, err; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + /* FIXME: The algorithm here is pretty horrible: we scan each + * property of a node in fdt_node_check_compatible(), then if +@@ -802,3 +854,68 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, + + return offset; /* error from fdt_next_node() */ + } ++ ++#if !defined(FDT_ASSUME_MASK) || FDT_ASSUME_MASK != 0xff ++int fdt_check_full(const void *fdt, size_t bufsize) ++{ ++ int err; ++ int num_memrsv; ++ int offset, nextoffset = 0; ++ uint32_t tag; ++ unsigned depth = 0; ++ const void *prop; ++ const char *propname; ++ ++ if (bufsize < FDT_V1_SIZE) ++ return -FDT_ERR_TRUNCATED; ++ err = fdt_check_header(fdt); ++ if (err != 0) ++ return err; ++ if (bufsize < fdt_totalsize(fdt)) ++ return -FDT_ERR_TRUNCATED; ++ ++ num_memrsv = fdt_num_mem_rsv(fdt); ++ if (num_memrsv < 0) ++ return num_memrsv; ++ ++ while (1) { ++ offset = nextoffset; ++ tag = fdt_next_tag(fdt, offset, &nextoffset); ++ ++ if (nextoffset < 0) ++ return nextoffset; ++ ++ switch (tag) { ++ case FDT_NOP: ++ break; ++ ++ case FDT_END: ++ if (depth != 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ return 0; ++ ++ case FDT_BEGIN_NODE: ++ depth++; ++ if (depth > INT_MAX) ++ return -FDT_ERR_BADSTRUCTURE; ++ break; ++ ++ case FDT_END_NODE: ++ if (depth == 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ depth--; ++ break; ++ ++ case FDT_PROP: ++ prop = fdt_getprop_by_offset(fdt, offset, &propname, ++ &err); ++ if (!prop) ++ return err; ++ break; ++ ++ default: ++ return -FDT_ERR_INTERNAL; ++ } ++ } ++} ++#endif +diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c +index 9b829051e4..08e2981a44 100644 +--- a/scripts/dtc/libfdt/fdt_rw.c ++++ b/scripts/dtc/libfdt/fdt_rw.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -58,6 +13,8 @@ + static int fdt_blocks_misordered_(const void *fdt, + int mem_rsv_size, int struct_size) + { ++ if (!fdt_chk_basic()) ++ return false; + return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8)) + || (fdt_off_dt_struct(fdt) < + (fdt_off_mem_rsvmap(fdt) + mem_rsv_size)) +@@ -67,25 +24,27 @@ static int fdt_blocks_misordered_(const void *fdt, + (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); + } + +-static int fdt_rw_check_header_(void *fdt) ++static int fdt_rw_probe_(void *fdt) + { +- FDT_CHECK_HEADER(fdt); ++ if (!fdt_chk_basic()) ++ return 0; ++ FDT_RO_PROBE(fdt); + +- if (fdt_version(fdt) < 17) ++ if (fdt_chk_version() && fdt_version(fdt) < 17) + return -FDT_ERR_BADVERSION; + if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), + fdt_size_dt_struct(fdt))) + return -FDT_ERR_BADLAYOUT; +- if (fdt_version(fdt) > 17) ++ if (fdt_chk_version() && fdt_version(fdt) > 17) + fdt_set_version(fdt, 17); + + return 0; + } + +-#define FDT_RW_CHECK_HEADER(fdt) \ ++#define FDT_RW_PROBE(fdt) \ + { \ + int err_; \ +- if ((err_ = fdt_rw_check_header_(fdt)) != 0) \ ++ if (fdt_chk_extra() && (err_ = fdt_rw_probe_(fdt)) != 0) \ + return err_; \ + } + +@@ -136,6 +95,14 @@ static int fdt_splice_struct_(void *fdt, void *p, + return 0; + } + ++/* Must only be used to roll back in case of error */ ++static void fdt_del_last_string_(void *fdt, const char *s) ++{ ++ int newlen = strlen(s) + 1; ++ ++ fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) - newlen); ++} ++ + static int fdt_splice_string_(void *fdt, int newlen) + { + void *p = (char *)fdt +@@ -149,7 +116,16 @@ static int fdt_splice_string_(void *fdt, int newlen) + return 0; + } + +-static int fdt_find_add_string_(void *fdt, const char *s) ++/** ++ * fdt_find_add_string_() - Find or allocate a string ++ * ++ * @fdt: pointer to the device tree to check/adjust ++ * @s: string to find/add ++ * @allocated: Set to 0 if the string was found, 1 if not found and so ++ * allocated. Ignored if !fdt_chk_basic() ++ * @return offset of string in the string table (whether found or added) ++ */ ++static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) + { + char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); + const char *p; +@@ -157,6 +133,9 @@ static int fdt_find_add_string_(void *fdt, const char *s) + int len = strlen(s) + 1; + int err; + ++ if (fdt_chk_basic()) ++ *allocated = 0; ++ + p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s); + if (p) + /* found it */ +@@ -167,6 +146,9 @@ static int fdt_find_add_string_(void *fdt, const char *s) + if (err) + return err; + ++ if (fdt_chk_basic()) ++ *allocated = 1; ++ + memcpy(new, s, len); + return (new - strtab); + } +@@ -176,7 +158,7 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) + struct fdt_reserve_entry *re; + int err; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + re = fdt_mem_rsv_w_(fdt, fdt_num_mem_rsv(fdt)); + err = fdt_splice_mem_rsv_(fdt, re, 0, 1); +@@ -192,7 +174,7 @@ int fdt_del_mem_rsv(void *fdt, int n) + { + struct fdt_reserve_entry *re = fdt_mem_rsv_w_(fdt, n); + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + if (n >= fdt_num_mem_rsv(fdt)) + return -FDT_ERR_NOTFOUND; +@@ -225,11 +207,12 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, + int nextoffset; + int namestroff; + int err; ++ int allocated; + + if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) + return nextoffset; + +- namestroff = fdt_find_add_string_(fdt, name); ++ namestroff = fdt_find_add_string_(fdt, name, &allocated); + if (namestroff < 0) + return namestroff; + +@@ -237,8 +220,12 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, + proplen = sizeof(**prop) + FDT_TAGALIGN(len); + + err = fdt_splice_struct_(fdt, *prop, 0, proplen); +- if (err) ++ if (err) { ++ /* Delete the string if we failed to add it */ ++ if (fdt_chk_basic() && allocated) ++ fdt_del_last_string_(fdt, name); + return err; ++ } + + (*prop)->tag = cpu_to_fdt32(FDT_PROP); + (*prop)->nameoff = cpu_to_fdt32(namestroff); +@@ -252,7 +239,7 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name) + int oldlen, newlen; + int err; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen); + if (!namep) +@@ -275,7 +262,7 @@ int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, + struct fdt_property *prop; + int err; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + err = fdt_resize_property_(fdt, nodeoffset, name, len, &prop); + if (err == -FDT_ERR_NOTFOUND) +@@ -308,7 +295,7 @@ int fdt_appendprop(void *fdt, int nodeoffset, const char *name, + struct fdt_property *prop; + int err, oldlen, newlen; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen); + if (prop) { +@@ -334,7 +321,7 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name) + struct fdt_property *prop; + int len, proplen; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + prop = fdt_get_property_w(fdt, nodeoffset, name, &len); + if (!prop) +@@ -354,7 +341,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset, + uint32_t tag; + fdt32_t *endtag; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen); + if (offset >= 0) +@@ -394,7 +381,7 @@ int fdt_del_node(void *fdt, int nodeoffset) + { + int endoffset; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + endoffset = fdt_node_end_offset_(fdt, nodeoffset); + if (endoffset < 0) +@@ -435,12 +422,12 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) + const char *fdtend = fdtstart + fdt_totalsize(fdt); + char *tmp; + +- FDT_CHECK_HEADER(fdt); ++ FDT_RO_PROBE(fdt); + + mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) + * sizeof(struct fdt_reserve_entry); + +- if (fdt_version(fdt) >= 17) { ++ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { + struct_size = fdt_size_dt_struct(fdt); + } else { + struct_size = 0; +@@ -494,7 +481,7 @@ int fdt_pack(void *fdt) + { + int mem_rsv_size; + +- FDT_RW_CHECK_HEADER(fdt); ++ FDT_RW_PROBE(fdt); + + mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) + * sizeof(struct fdt_reserve_entry); +diff --git a/scripts/dtc/libfdt/fdt_strerror.c b/scripts/dtc/libfdt/fdt_strerror.c +index 9677a1887e..768db66ead 100644 +--- a/scripts/dtc/libfdt/fdt_strerror.c ++++ b/scripts/dtc/libfdt/fdt_strerror.c +@@ -1,51 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" +@@ -82,6 +38,7 @@ static struct fdt_errtabent fdt_errtable[] = { + FDT_ERRTABENT(FDT_ERR_BADVALUE), + FDT_ERRTABENT(FDT_ERR_BADOVERLAY), + FDT_ERRTABENT(FDT_ERR_NOPHANDLES), ++ FDT_ERRTABENT(FDT_ERR_BADFLAGS), + }; + #define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0])) + +diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c +index d8ef748a72..a8c924675a 100644 +--- a/scripts/dtc/libfdt/fdt_sw.c ++++ b/scripts/dtc/libfdt/fdt_sw.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +@@ -55,21 +10,90 @@ + + #include "libfdt_internal.h" + +-static int fdt_sw_check_header_(void *fdt) ++static int fdt_sw_probe_(void *fdt) ++{ ++ if (fdt_chk_basic()) { ++ if (fdt_magic(fdt) == FDT_MAGIC) ++ return -FDT_ERR_BADSTATE; ++ else if (fdt_magic(fdt) != FDT_SW_MAGIC) ++ return -FDT_ERR_BADMAGIC; ++ } ++ ++ return 0; ++} ++ ++#define FDT_SW_PROBE(fdt) \ ++ { \ ++ int err; \ ++ if (fdt_chk_basic() && (err = fdt_sw_probe_(fdt)) != 0) \ ++ return err; \ ++ } ++ ++/* 'memrsv' state: Initial state after fdt_create() ++ * ++ * Allowed functions: ++ * fdt_add_reservmap_entry() ++ * fdt_finish_reservemap() [moves to 'struct' state] ++ */ ++static int fdt_sw_probe_memrsv_(void *fdt) ++{ ++ int err = fdt_sw_probe_(fdt); ++ if (err) ++ return err; ++ ++ if (fdt_chk_extra() && fdt_off_dt_strings(fdt) != 0) ++ return -FDT_ERR_BADSTATE; ++ return 0; ++} ++ ++#define FDT_SW_PROBE_MEMRSV(fdt) \ ++ { \ ++ int err; \ ++ if (fdt_chk_extra() && (err = fdt_sw_probe_memrsv_(fdt)) != 0) \ ++ return err; \ ++ } ++ ++/* 'struct' state: Enter this state after fdt_finish_reservemap() ++ * ++ * Allowed functions: ++ * fdt_begin_node() ++ * fdt_end_node() ++ * fdt_property*() ++ * fdt_finish() [moves to 'complete' state] ++ */ ++static int fdt_sw_probe_struct_(void *fdt) + { +- if (fdt_magic(fdt) != FDT_SW_MAGIC) +- return -FDT_ERR_BADMAGIC; +- /* FIXME: should check more details about the header state */ ++ int err; ++ ++ if (!fdt_chk_extra()) ++ return 0; ++ err = fdt_sw_probe_(fdt); ++ if (err) ++ return err; ++ ++ if (fdt_off_dt_strings(fdt) != fdt_totalsize(fdt)) ++ return -FDT_ERR_BADSTATE; + return 0; + } + +-#define FDT_SW_CHECK_HEADER(fdt) \ ++#define FDT_SW_PROBE_STRUCT(fdt) \ + { \ + int err; \ +- if ((err = fdt_sw_check_header_(fdt)) != 0) \ ++ if (fdt_chk_extra() && (err = fdt_sw_probe_struct_(fdt)) != 0) \ + return err; \ + } + ++static inline uint32_t sw_flags(void *fdt) ++{ ++ /* assert: (fdt_magic(fdt) == FDT_SW_MAGIC) */ ++ return fdt_last_comp_version(fdt); ++} ++ ++/* 'complete' state: Enter this state after fdt_finish() ++ * ++ * Allowed functions: none ++ */ ++ + static void *fdt_grab_space_(void *fdt, size_t len) + { + int offset = fdt_size_dt_struct(fdt); +@@ -85,38 +109,58 @@ static void *fdt_grab_space_(void *fdt, size_t len) + return fdt_offset_ptr_w_(fdt, offset); + } + +-int fdt_create(void *buf, int bufsize) ++int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags) + { ++ const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header), ++ sizeof(struct fdt_reserve_entry)); + void *fdt = buf; + +- if (bufsize < sizeof(struct fdt_header)) ++ if (bufsize < hdrsize) + return -FDT_ERR_NOSPACE; + ++ if (flags & ~FDT_CREATE_FLAGS_ALL) ++ return -FDT_ERR_BADFLAGS; ++ + memset(buf, 0, bufsize); + ++ /* ++ * magic and last_comp_version keep intermediate state during the fdt ++ * creation process, which is replaced with the proper FDT format by ++ * fdt_finish(). ++ * ++ * flags should be accessed with sw_flags(). ++ */ + fdt_set_magic(fdt, FDT_SW_MAGIC); + fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); +- fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); ++ fdt_set_last_comp_version(fdt, flags); ++ + fdt_set_totalsize(fdt, bufsize); + +- fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header), +- sizeof(struct fdt_reserve_entry))); ++ fdt_set_off_mem_rsvmap(fdt, hdrsize); + fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt)); +- fdt_set_off_dt_strings(fdt, bufsize); ++ fdt_set_off_dt_strings(fdt, 0); + + return 0; + } + ++int fdt_create(void *buf, int bufsize) ++{ ++ return fdt_create_with_flags(buf, bufsize, 0); ++} ++ + int fdt_resize(void *fdt, void *buf, int bufsize) + { + size_t headsize, tailsize; + char *oldtail, *newtail; + +- FDT_SW_CHECK_HEADER(fdt); ++ FDT_SW_PROBE(fdt); + + headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); + tailsize = fdt_size_dt_strings(fdt); + ++ if (fdt_chk_extra() && (headsize + tailsize) > fdt_totalsize(fdt)) ++ return -FDT_ERR_INTERNAL; ++ + if ((headsize + tailsize) > bufsize) + return -FDT_ERR_NOSPACE; + +@@ -133,8 +177,9 @@ int fdt_resize(void *fdt, void *buf, int bufsize) + memmove(buf, fdt, headsize); + } + +- fdt_set_off_dt_strings(buf, bufsize); + fdt_set_totalsize(buf, bufsize); ++ if (fdt_off_dt_strings(buf)) ++ fdt_set_off_dt_strings(buf, bufsize); + + return 0; + } +@@ -144,10 +189,7 @@ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) + struct fdt_reserve_entry *re; + int offset; + +- FDT_SW_CHECK_HEADER(fdt); +- +- if (fdt_size_dt_struct(fdt)) +- return -FDT_ERR_BADSTATE; ++ FDT_SW_PROBE_MEMRSV(fdt); + + offset = fdt_off_dt_struct(fdt); + if ((offset + sizeof(*re)) > fdt_totalsize(fdt)) +@@ -164,16 +206,23 @@ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) + + int fdt_finish_reservemap(void *fdt) + { +- return fdt_add_reservemap_entry(fdt, 0, 0); ++ int err = fdt_add_reservemap_entry(fdt, 0, 0); ++ ++ if (err) ++ return err; ++ ++ fdt_set_off_dt_strings(fdt, fdt_totalsize(fdt)); ++ return 0; + } + + int fdt_begin_node(void *fdt, const char *name) + { + struct fdt_node_header *nh; +- int namelen = strlen(name) + 1; ++ int namelen; + +- FDT_SW_CHECK_HEADER(fdt); ++ FDT_SW_PROBE_STRUCT(fdt); + ++ namelen = strlen(name) + 1; + nh = fdt_grab_space_(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen)); + if (! nh) + return -FDT_ERR_NOSPACE; +@@ -187,7 +236,7 @@ int fdt_end_node(void *fdt) + { + fdt32_t *en; + +- FDT_SW_CHECK_HEADER(fdt); ++ FDT_SW_PROBE_STRUCT(fdt); + + en = fdt_grab_space_(fdt, FDT_TAGSIZE); + if (! en) +@@ -197,19 +246,13 @@ int fdt_end_node(void *fdt) + return 0; + } + +-static int fdt_find_add_string_(void *fdt, const char *s) ++static int fdt_add_string_(void *fdt, const char *s) + { + char *strtab = (char *)fdt + fdt_totalsize(fdt); +- const char *p; + int strtabsize = fdt_size_dt_strings(fdt); + int len = strlen(s) + 1; + int struct_top, offset; + +- p = fdt_find_string_(strtab - strtabsize, strtabsize, s); +- if (p) +- return p - strtab; +- +- /* Add it */ + offset = -strtabsize - len; + struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); + if (fdt_totalsize(fdt) + offset < struct_top) +@@ -220,20 +263,56 @@ static int fdt_find_add_string_(void *fdt, const char *s) + return offset; + } + ++/* Must only be used to roll back in case of error */ ++static void fdt_del_last_string_(void *fdt, const char *s) ++{ ++ int strtabsize = fdt_size_dt_strings(fdt); ++ int len = strlen(s) + 1; ++ ++ fdt_set_size_dt_strings(fdt, strtabsize - len); ++} ++ ++static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) ++{ ++ char *strtab = (char *)fdt + fdt_totalsize(fdt); ++ int strtabsize = fdt_size_dt_strings(fdt); ++ const char *p; ++ ++ *allocated = 0; ++ ++ p = fdt_find_string_(strtab - strtabsize, strtabsize, s); ++ if (p) ++ return p - strtab; ++ ++ *allocated = 1; ++ ++ return fdt_add_string_(fdt, s); ++} ++ + int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp) + { + struct fdt_property *prop; + int nameoff; ++ int allocated; + +- FDT_SW_CHECK_HEADER(fdt); ++ FDT_SW_PROBE_STRUCT(fdt); + +- nameoff = fdt_find_add_string_(fdt, name); ++ /* String de-duplication can be slow, _NO_NAME_DEDUP skips it */ ++ if (sw_flags(fdt) & FDT_CREATE_FLAG_NO_NAME_DEDUP) { ++ allocated = 1; ++ nameoff = fdt_add_string_(fdt, name); ++ } else { ++ nameoff = fdt_find_add_string_(fdt, name, &allocated); ++ } + if (nameoff == 0) + return -FDT_ERR_NOSPACE; + + prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len)); +- if (! prop) ++ if (! prop) { ++ if (allocated) ++ fdt_del_last_string_(fdt, name); + return -FDT_ERR_NOSPACE; ++ } + + prop->tag = cpu_to_fdt32(FDT_PROP); + prop->nameoff = cpu_to_fdt32(nameoff); +@@ -262,7 +341,7 @@ int fdt_finish(void *fdt) + uint32_t tag; + int offset, nextoffset; + +- FDT_SW_CHECK_HEADER(fdt); ++ FDT_SW_PROBE_STRUCT(fdt); + + /* Add terminator */ + end = fdt_grab_space_(fdt, sizeof(*end)); +@@ -295,6 +374,10 @@ int fdt_finish(void *fdt) + + /* Finally, adjust the header */ + fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); ++ ++ /* And fix up fields that were keeping intermediate state. */ ++ fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); + fdt_set_magic(fdt, FDT_MAGIC); ++ + return 0; + } +diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c +index 534c1cbbb2..f64139e0b3 100644 +--- a/scripts/dtc/libfdt/fdt_wip.c ++++ b/scripts/dtc/libfdt/fdt_wip.c +@@ -1,52 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include "libfdt_env.h" + +diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h +index c400f2f5d5..36fadcdea5 100644 +--- a/scripts/dtc/libfdt/libfdt.h ++++ b/scripts/dtc/libfdt/libfdt.h +@@ -1,54 +1,9 @@ ++/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ + #ifndef LIBFDT_H + #define LIBFDT_H + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + #include "libfdt_env.h" +@@ -90,8 +45,9 @@ + + /* Error codes: codes for bad device tree blobs */ + #define FDT_ERR_TRUNCATED 8 +- /* FDT_ERR_TRUNCATED: Structure block of the given device tree +- * ends without an FDT_END tag. */ ++ /* FDT_ERR_TRUNCATED: FDT or a sub-block is improperly ++ * terminated (overflows, goes outside allowed bounds, or ++ * isn't properly terminated). */ + #define FDT_ERR_BADMAGIC 9 + /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a + * device tree at all - it is missing the flattened device +@@ -137,7 +93,11 @@ + /* FDT_ERR_NOPHANDLES: The device tree doesn't have any + * phandle available anymore without causing an overflow */ + +-#define FDT_ERR_MAX 17 ++#define FDT_ERR_BADFLAGS 18 ++ /* FDT_ERR_BADFLAGS: The function was passed a flags field that ++ * contains invalid flags or an invalid combination of flags. */ ++ ++#define FDT_ERR_MAX 18 + + /* constants */ + #define FDT_MAX_PHANDLE 0xfffffffe +@@ -157,6 +117,61 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) + + uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); + ++/* ++ * Alignment helpers: ++ * These helpers access words from a device tree blob. They're ++ * built to work even with unaligned pointers on platforms (ike ++ * ARM) that don't like unaligned loads and stores ++ */ ++ ++static inline uint32_t fdt32_ld(const fdt32_t *p) ++{ ++ const uint8_t *bp = (const uint8_t *)p; ++ ++ return ((uint32_t)bp[0] << 24) ++ | ((uint32_t)bp[1] << 16) ++ | ((uint32_t)bp[2] << 8) ++ | bp[3]; ++} ++ ++static inline void fdt32_st(void *property, uint32_t value) ++{ ++ uint8_t *bp = (uint8_t *)property; ++ ++ bp[0] = value >> 24; ++ bp[1] = (value >> 16) & 0xff; ++ bp[2] = (value >> 8) & 0xff; ++ bp[3] = value & 0xff; ++} ++ ++static inline uint64_t fdt64_ld(const fdt64_t *p) ++{ ++ const uint8_t *bp = (const uint8_t *)p; ++ ++ return ((uint64_t)bp[0] << 56) ++ | ((uint64_t)bp[1] << 48) ++ | ((uint64_t)bp[2] << 40) ++ | ((uint64_t)bp[3] << 32) ++ | ((uint64_t)bp[4] << 24) ++ | ((uint64_t)bp[5] << 16) ++ | ((uint64_t)bp[6] << 8) ++ | bp[7]; ++} ++ ++static inline void fdt64_st(void *property, uint64_t value) ++{ ++ uint8_t *bp = (uint8_t *)property; ++ ++ bp[0] = value >> 56; ++ bp[1] = (value >> 48) & 0xff; ++ bp[2] = (value >> 40) & 0xff; ++ bp[3] = (value >> 32) & 0xff; ++ bp[4] = (value >> 24) & 0xff; ++ bp[5] = (value >> 16) & 0xff; ++ bp[6] = (value >> 8) & 0xff; ++ bp[7] = value & 0xff; ++} ++ + /**********************************************************************/ + /* Traversal functions */ + /**********************************************************************/ +@@ -199,7 +214,7 @@ int fdt_next_subnode(const void *fdt, int offset); + * ... + * } + * +- * if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) { ++ * if ((node < 0) && (node != -FDT_ERR_NOTFOUND)) { + * Error handling + * } + * +@@ -217,7 +232,7 @@ int fdt_next_subnode(const void *fdt, int offset); + /* General functions */ + /**********************************************************************/ + #define fdt_get_header(fdt, field) \ +- (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) ++ (fdt32_ld(&((const struct fdt_header *)(fdt))->field)) + #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) + #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) + #define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct)) +@@ -248,18 +263,32 @@ fdt_set_hdr_(size_dt_struct); + #undef fdt_set_hdr_ + + /** +- * fdt_check_header - sanity check a device tree or possible device tree ++ * fdt_header_size - return the size of the tree's header ++ * @fdt: pointer to a flattened device tree ++ */ ++size_t fdt_header_size(const void *fdt); ++ ++/** ++ * fdt_header_size_ - internal function which takes a version number ++ */ ++size_t fdt_header_size_(uint32_t version); ++ ++/** ++ * fdt_check_header - sanity check a device tree header ++ + * @fdt: pointer to data which might be a flattened device tree + * + * fdt_check_header() checks that the given buffer contains what +- * appears to be a flattened device tree with sane information in its +- * header. ++ * appears to be a flattened device tree, and that the header contains ++ * valid information (to the extent that can be determined from the ++ * header alone). + * + * returns: + * 0, if the buffer appears to contain a valid device tree + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, +- * -FDT_ERR_BADSTATE, standard meanings, as above ++ * -FDT_ERR_BADSTATE, ++ * -FDT_ERR_TRUNCATED, standard meanings, as above + */ + int fdt_check_header(const void *fdt); + +@@ -288,6 +317,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); + /* Read-only functions */ + /**********************************************************************/ + ++int fdt_check_full(const void *fdt, size_t bufsize); ++ ++/** ++ * fdt_get_string - retrieve a string from the strings block of a device tree ++ * @fdt: pointer to the device tree blob ++ * @stroffset: offset of the string within the strings block (native endian) ++ * @lenp: optional pointer to return the string's length ++ * ++ * fdt_get_string() retrieves a pointer to a single string from the ++ * strings block of the device tree blob at fdt, and optionally also ++ * returns the string's length in *lenp. ++ * ++ * returns: ++ * a pointer to the string, on success ++ * NULL, if stroffset is out of bounds, or doesn't point to a valid string ++ */ ++const char *fdt_get_string(const void *fdt, int stroffset, int *lenp); ++ + /** + * fdt_string - retrieve a string from the strings block of a device tree + * @fdt: pointer to the device tree blob +@@ -298,10 +345,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); + * + * returns: + * a pointer to the string, on success +- * NULL, if stroffset is out of bounds ++ * NULL, if stroffset is out of bounds, or doesn't point to a valid string + */ + const char *fdt_string(const void *fdt, int stroffset); + ++/** ++ * fdt_find_max_phandle - find and return the highest phandle in a tree ++ * @fdt: pointer to the device tree blob ++ * @phandle: return location for the highest phandle value found in the tree ++ * ++ * fdt_find_max_phandle() finds the highest phandle value in the given device ++ * tree. The value returned in @phandle is only valid if the function returns ++ * success. ++ * ++ * returns: ++ * 0 on success or a negative error code on failure ++ */ ++int fdt_find_max_phandle(const void *fdt, uint32_t *phandle); ++ + /** + * fdt_get_max_phandle - retrieves the highest phandle in a tree + * @fdt: pointer to the device tree blob +@@ -310,12 +371,24 @@ const char *fdt_string(const void *fdt, int stroffset); + * device tree. This will ignore badly formatted phandles, or phandles + * with a value of 0 or -1. + * ++ * This function is deprecated in favour of fdt_find_max_phandle(). ++ * + * returns: + * the highest phandle on success + * 0, if no phandle was found in the device tree + * -1, if an error occurred + */ +-uint32_t fdt_get_max_phandle(const void *fdt); ++static inline uint32_t fdt_get_max_phandle(const void *fdt) ++{ ++ uint32_t phandle; ++ int err; ++ ++ err = fdt_find_max_phandle(fdt, &phandle); ++ if (err < 0) ++ return (uint32_t)-1; ++ ++ return phandle; ++} + + /** + * fdt_generate_phandle - return a new, unused phandle for a device tree blob +@@ -522,7 +595,7 @@ int fdt_next_property_offset(const void *fdt, int offset); + * ... + * } + * +- * if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) { ++ * if ((property < 0) && (property != -FDT_ERR_NOTFOUND)) { + * Error handling + * } + * +@@ -625,7 +698,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, + /** + * fdt_getprop_by_offset - retrieve the value of a property at a given offset + * @fdt: pointer to the device tree blob +- * @ffset: offset of the property to read ++ * @offset: offset of the property to read + * @namep: pointer to a string variable (will be overwritten) or NULL + * @lenp: pointer to an integer variable (will be overwritten) or NULL + * +@@ -734,7 +807,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); + /** + * fdt_get_alias_namelen - get alias based on substring + * @fdt: pointer to the device tree blob +- * @name: name of the alias to look up ++ * @name: name of the alias th look up + * @namelen: number of characters of name to consider + * + * Identical to fdt_get_alias(), but only examine the first namelen +@@ -1316,7 +1389,45 @@ int fdt_nop_node(void *fdt, int nodeoffset); + /* Sequential write functions */ + /**********************************************************************/ + ++/* fdt_create_with_flags flags */ ++#define FDT_CREATE_FLAG_NO_NAME_DEDUP 0x1 ++ /* FDT_CREATE_FLAG_NO_NAME_DEDUP: Do not try to de-duplicate property ++ * names in the fdt. This can result in faster creation times, but ++ * a larger fdt. */ ++ ++#define FDT_CREATE_FLAGS_ALL (FDT_CREATE_FLAG_NO_NAME_DEDUP) ++ ++/** ++ * fdt_create_with_flags - begin creation of a new fdt ++ * @fdt: pointer to memory allocated where fdt will be created ++ * @bufsize: size of the memory space at fdt ++ * @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0. ++ * ++ * fdt_create_with_flags() begins the process of creating a new fdt with ++ * the sequential write interface. ++ * ++ * fdt creation process must end with fdt_finished() to produce a valid fdt. ++ * ++ * returns: ++ * 0, on success ++ * -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt ++ * -FDT_ERR_BADFLAGS, flags is not valid ++ */ ++int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags); ++ ++/** ++ * fdt_create - begin creation of a new fdt ++ * @fdt: pointer to memory allocated where fdt will be created ++ * @bufsize: size of the memory space at fdt ++ * ++ * fdt_create() is equivalent to fdt_create_with_flags() with flags=0. ++ * ++ * returns: ++ * 0, on success ++ * -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt ++ */ + int fdt_create(void *buf, int bufsize); ++ + int fdt_resize(void *fdt, void *buf, int bufsize); + int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size); + int fdt_finish_reservemap(void *fdt); +@@ -1787,6 +1898,43 @@ static inline int fdt_appendprop_cell(void *fdt, int nodeoffset, + #define fdt_appendprop_string(fdt, nodeoffset, name, str) \ + fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) + ++/** ++ * fdt_appendprop_addrrange - append a address range property ++ * @fdt: pointer to the device tree blob ++ * @parent: offset of the parent node ++ * @nodeoffset: offset of the node to add a property at ++ * @name: name of property ++ * @addr: start address of a given range ++ * @size: size of a given range ++ * ++ * fdt_appendprop_addrrange() appends an address range value (start ++ * address and size) to the value of the named property in the given ++ * node, or creates a new property with that value if it does not ++ * already exist. ++ * If "name" is not specified, a default "reg" is used. ++ * Cell sizes are determined by parent's #address-cells and #size-cells. ++ * ++ * This function may insert data into the blob, and will therefore ++ * change the offsets of some existing nodes. ++ * ++ * returns: ++ * 0, on success ++ * -FDT_ERR_BADLAYOUT, ++ * -FDT_ERR_BADMAGIC, ++ * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid ++ * #address-cells property ++ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag ++ * -FDT_ERR_BADSTATE, ++ * -FDT_ERR_BADSTRUCTURE, ++ * -FDT_ERR_BADVERSION, ++ * -FDT_ERR_BADVALUE, addr or size doesn't fit to respective cells size ++ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to ++ * contain a new property ++ * -FDT_ERR_TRUNCATED, standard meanings ++ */ ++int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, ++ const char *name, uint64_t addr, uint64_t size); ++ + /** + * fdt_delprop - delete a property + * @fdt: pointer to the device tree blob +diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h +index 3ff9e28630..73b6d40450 100644 +--- a/scripts/dtc/libfdt/libfdt_env.h ++++ b/scripts/dtc/libfdt/libfdt_env.h +@@ -1,55 +1,10 @@ ++/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ + #ifndef LIBFDT_ENV_H + #define LIBFDT_ENV_H + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. + * Copyright 2012 Kim Phillips, Freescale Semiconductor. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + #include +@@ -57,6 +12,7 @@ + #include + #include + #include ++#include + + #ifdef __CHECKER__ + #define FDT_FORCE __attribute__((force)) +diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h +index 7681e19229..5436e2ceea 100644 +--- a/scripts/dtc/libfdt/libfdt_internal.h ++++ b/scripts/dtc/libfdt/libfdt_internal.h +@@ -1,65 +1,24 @@ ++/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ + #ifndef LIBFDT_INTERNAL_H + #define LIBFDT_INTERNAL_H + /* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. +- * +- * libfdt is dual licensed: you can use it either under the terms of +- * the GPL, or the BSD license, at your option. +- * +- * a) This library is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This library is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public +- * License along with this library; if not, write to the Free +- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +- * MA 02110-1301 USA +- * +- * Alternatively, +- * +- * b) Redistribution and use in source and binary forms, with or +- * without modification, are permitted provided that the following +- * conditions are met: +- * +- * 1. Redistributions of source code must retain the above +- * copyright notice, this list of conditions and the following +- * disclaimer. +- * 2. Redistributions in binary form must reproduce the above +- * copyright notice, this list of conditions and the following +- * disclaimer in the documentation and/or other materials +- * provided with the distribution. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include + + #define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) + #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) + +-#define FDT_CHECK_HEADER(fdt) \ +- { \ +- int err_; \ +- if ((err_ = fdt_check_header(fdt)) != 0) \ +- return err_; \ ++int fdt_ro_probe_(const void *fdt); ++#define FDT_RO_PROBE(fdt) \ ++ { \ ++ int totalsize_; \ ++ if (fdt_chk_basic()) { \ ++ totalsize_ = fdt_ro_probe_(fdt); \ ++ if (totalsize_ < 0) \ ++ return totalsize_; \ ++ } \ + } + + int fdt_check_node_offset_(const void *fdt, int offset); +@@ -92,4 +51,87 @@ static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n) + + #define FDT_SW_MAGIC (~FDT_MAGIC) + ++/**********************************************************************/ ++/* Checking controls */ ++/**********************************************************************/ ++ ++#ifndef FDT_ASSUME_MASK ++#define FDT_ASSUME_MASK 0 ++#endif ++ ++/* ++ * Defines assumptions which can be enabled. Each of these can be enabled ++ * individually. For maximum saftey, don't enable any assumptions! ++ * ++ * For minimal code size and no safety, use FDT_ASSUME_PERFECT at your own risk. ++ * You should have another method of validating the device tree, such as a ++ * signature or hash check before using libfdt. ++ * ++ * For situations where security is not a concern it may be safe to enable ++ * FDT_ASSUME_FRIENDLY. ++ */ ++enum { ++ /* ++ * This does essentially no checks. Only the latest device-tree ++ * version is correctly handled. Incosistencies or errors in the device ++ * tree may cause undefined behaviour or crashes. ++ * ++ * If an error occurs when modifying the tree it may leave the tree in ++ * an intermediate (but valid) state. As an example, adding a property ++ * where there is insufficient space may result in the property name ++ * being added to the string table even though the property itself is ++ * not added to the struct section. ++ * ++ * Only use this if you have a fully validated device tree with ++ * the latest supported version and wish to minimise code size. ++ */ ++ FDT_ASSUME_PERFECT = 0xff, ++ ++ /* ++ * This assumes that the device tree is sane. i.e. header metadata ++ * and basic hierarchy are correct. ++ * ++ * These checks will be sufficient if you have a valid device tree with ++ * no internal inconsistencies. With this assumption, libfdt will ++ * generally not return -FDT_ERR_INTERNAL, -FDT_ERR_BADLAYOUT, etc. ++ */ ++ FDT_ASSUME_SANE = 1 << 0, ++ ++ /* ++ * This disables checks for device-tree version and removes all code ++ * which handles older versions. ++ * ++ * Only enable this if you know you have a device tree with the latest ++ * version. ++ */ ++ FDT_ASSUME_LATEST = 1 << 1, ++ ++ /* ++ * This disables any extensive checking of parameters and the device ++ * tree, making various assumptions about correctness. Normal device ++ * trees produced by libfdt and the compiler should be handled safely. ++ * Malicious device trees and complete garbage may cause libfdt to ++ * behave badly or crash. ++ */ ++ FDT_ASSUME_FRIENDLY = 1 << 2, ++}; ++ ++/** fdt_chk_basic() - see if basic checking of params and DT data is enabled */ ++static inline bool fdt_chk_basic(void) ++{ ++ return !(FDT_ASSUME_MASK & FDT_ASSUME_SANE); ++} ++ ++/** fdt_chk_version() - see if we need to handle old versions of the DT */ ++static inline bool fdt_chk_version(void) ++{ ++ return !(FDT_ASSUME_MASK & FDT_ASSUME_LATEST); ++} ++ ++/** fdt_chk_extra() - see if extra checking is enabled */ ++static inline bool fdt_chk_extra(void) ++{ ++ return !(FDT_ASSUME_MASK & FDT_ASSUME_FRIENDLY); ++} ++ + #endif /* LIBFDT_INTERNAL_H */ +diff --git a/tools/libfdt/fdt_rw.c b/tools/libfdt/fdt_rw.c +index 68fc7c8c88..7189f01429 100644 +--- a/tools/libfdt/fdt_rw.c ++++ b/tools/libfdt/fdt_rw.c +@@ -11,6 +11,7 @@ int fdt_remove_unused_strings(const void *old, void *new) + const char *str; + int ret; + int tag = FDT_PROP; ++ int allocated; + + /* Make a copy and remove the strings */ + memcpy(new, old, size); +@@ -25,7 +26,7 @@ int fdt_remove_unused_strings(const void *old, void *new) + new_prop = (struct fdt_property *)(unsigned long) + fdt_get_property_by_offset(new, offset, NULL); + str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff)); +- ret = fdt_find_add_string_(new, str); ++ ret = fdt_find_add_string_(new, str, &allocated); + if (ret < 0) + return ret; + new_prop->nameoff = cpu_to_fdt32(ret); diff --git a/scripts-Convert-to-Python-3.patch b/scripts-Convert-to-Python-3.patch new file mode 100644 index 0000000..5dde241 --- /dev/null +++ b/scripts-Convert-to-Python-3.patch @@ -0,0 +1,3889 @@ +From patchwork Thu Oct 31 13:42:50 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187480 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Most of the time we +actually want strings, so change this. We still need to keep the internal +representation as bytes since otherwise unicode strings might break over +a read() boundary (e.g. 4KB), causing errors. But we can convert the end +result to strings. + +Add a 'binary' parameter to cover the few cases where bytes are needed. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/binman/cbfs_util_test.py | 2 +- + tools/binman/ftest.py | 2 +- + tools/patman/command.py | 31 +++++++++++++++++++++++-------- + tools/patman/tools.py | 29 +++++++++++++++++++++-------- + 4 files changed, 46 insertions(+), 18 deletions(-) + +diff --git a/tools/binman/cbfs_util_test.py b/tools/binman/cbfs_util_test.py +index 772c794ece..ddc2e09e35 100755 +--- a/tools/binman/cbfs_util_test.py ++++ b/tools/binman/cbfs_util_test.py +@@ -56,7 +56,7 @@ class TestCbfs(unittest.TestCase): + cls.have_lz4 = True + try: + tools.Run('lz4', '--no-frame-crc', '-c', +- tools.GetInputFilename('u-boot.bin')) ++ tools.GetInputFilename('u-boot.bin'), binary=True) + except: + cls.have_lz4 = False + +diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py +index 7000de9d42..88daaf20a8 100644 +--- a/tools/binman/ftest.py ++++ b/tools/binman/ftest.py +@@ -170,7 +170,7 @@ class TestFunctional(unittest.TestCase): + cls.have_lz4 = True + try: + tools.Run('lz4', '--no-frame-crc', '-c', +- os.path.join(cls._indir, 'u-boot.bin')) ++ os.path.join(cls._indir, 'u-boot.bin'), binary=True) + except: + cls.have_lz4 = False + +diff --git a/tools/patman/command.py b/tools/patman/command.py +index 16299f3f5b..5fbd2c4a3e 100644 +--- a/tools/patman/command.py ++++ b/tools/patman/command.py +@@ -4,6 +4,7 @@ + + import os + import cros_subprocess ++import tools + + """Shell command ease-ups for Python.""" + +@@ -31,6 +32,13 @@ class CommandResult: + self.return_code = return_code + self.exception = exception + ++ def ToOutput(self, binary): ++ if not binary: ++ self.stdout = tools.ToString(self.stdout) ++ self.stderr = tools.ToString(self.stderr) ++ self.combined = tools.ToString(self.combined) ++ return self ++ + + # This permits interception of RunPipe for test purposes. If it is set to + # a function, then that function is called with the pipe list being +@@ -41,7 +49,7 @@ test_result = None + + def RunPipe(pipe_list, infile=None, outfile=None, + capture=False, capture_stderr=False, oneline=False, +- raise_on_error=True, cwd=None, **kwargs): ++ raise_on_error=True, cwd=None, binary=False, **kwargs): + """ + Perform a command pipeline, with optional input/output filenames. + +@@ -67,7 +75,7 @@ def RunPipe(pipe_list, infile=None, outfile=None, + else: + return test_result + # No result: fall through to normal processing +- result = CommandResult() ++ result = CommandResult(b'', b'', b'') + last_pipe = None + pipeline = list(pipe_list) + user_pipestr = '|'.join([' '.join(pipe) for pipe in pipe_list]) +@@ -93,29 +101,36 @@ def RunPipe(pipe_list, infile=None, outfile=None, + if raise_on_error: + raise Exception("Error running '%s': %s" % (user_pipestr, str)) + result.return_code = 255 +- return result ++ return result.ToOutput(binary) + + if capture: + result.stdout, result.stderr, result.combined = ( + last_pipe.CommunicateFilter(None)) + if result.stdout and oneline: +- result.output = result.stdout.rstrip('\r\n') ++ result.output = result.stdout.rstrip(b'\r\n') + result.return_code = last_pipe.wait() + else: + result.return_code = os.waitpid(last_pipe.pid, 0)[1] + if raise_on_error and result.return_code: + raise Exception("Error running '%s'" % user_pipestr) +- return result ++ return result.ToOutput(binary) + + def Output(*cmd, **kwargs): + kwargs['raise_on_error'] = kwargs.get('raise_on_error', True) + return RunPipe([cmd], capture=True, **kwargs).stdout + + def OutputOneLine(*cmd, **kwargs): ++ """Run a command and output it as a single-line string ++ ++ The command us expected to produce a single line of output ++ ++ Returns: ++ String containing output of command ++ """ + raise_on_error = kwargs.pop('raise_on_error', True) +- return (RunPipe([cmd], capture=True, oneline=True, +- raise_on_error=raise_on_error, +- **kwargs).stdout.strip()) ++ result = RunPipe([cmd], capture=True, oneline=True, ++ raise_on_error=raise_on_error, **kwargs).stdout.strip() ++ return result + + def Run(*cmd, **kwargs): + return RunPipe([cmd], **kwargs).stdout +diff --git a/tools/patman/tools.py b/tools/patman/tools.py +index 4a7fcdad21..3feddb292f 100644 +--- a/tools/patman/tools.py ++++ b/tools/patman/tools.py +@@ -186,7 +186,7 @@ def PathHasFile(path_spec, fname): + return True + return False + +-def Run(name, *args): ++def Run(name, *args, **kwargs): + """Run a tool with some arguments + + This runs a 'tool', which is a program used by binman to process files and +@@ -201,13 +201,14 @@ def Run(name, *args): + CommandResult object + """ + try: ++ binary = kwargs.get('binary') + env = None + if tool_search_paths: + env = dict(os.environ) + env['PATH'] = ':'.join(tool_search_paths) + ':' + env['PATH'] + all_args = (name,) + args + result = command.RunPipe([all_args], capture=True, capture_stderr=True, +- env=env, raise_on_error=False) ++ env=env, raise_on_error=False, binary=binary) + if result.return_code: + raise Exception("Error %d running '%s': %s" % + (result.return_code,' '.join(all_args), +@@ -375,7 +376,7 @@ def ToBytes(string): + """Convert a str type into a bytes type + + Args: +- string: string to convert value ++ string: string to convert + + Returns: + Python 3: A bytes type +@@ -385,6 +386,18 @@ def ToBytes(string): + return string.encode('utf-8') + return string + ++def ToString(bval): ++ """Convert a bytes type into a str type ++ ++ Args: ++ bval: bytes value to convert ++ ++ Returns: ++ Python 3: A bytes type ++ Python 2: A string type ++ """ ++ return bval.decode('utf-8') ++ + def Compress(indata, algo, with_header=True): + """Compress some data using a given algorithm + +@@ -406,14 +419,14 @@ def Compress(indata, algo, with_header=True): + fname = GetOutputFilename('%s.comp.tmp' % algo) + WriteFile(fname, indata) + if algo == 'lz4': +- data = Run('lz4', '--no-frame-crc', '-c', fname) ++ data = Run('lz4', '--no-frame-crc', '-c', fname, binary=True) + # cbfstool uses a very old version of lzma + elif algo == 'lzma': + outfname = GetOutputFilename('%s.comp.otmp' % algo) + Run('lzma_alone', 'e', fname, outfname, '-lc1', '-lp0', '-pb0', '-d8') + data = ReadFile(outfname) + elif algo == 'gzip': +- data = Run('gzip', '-c', fname) ++ data = Run('gzip', '-c', fname, binary=True) + else: + raise ValueError("Unknown algorithm '%s'" % algo) + if with_header: +@@ -446,13 +459,13 @@ def Decompress(indata, algo, with_header=True): + with open(fname, 'wb') as fd: + fd.write(indata) + if algo == 'lz4': +- data = Run('lz4', '-dc', fname) ++ data = Run('lz4', '-dc', fname, binary=True) + elif algo == 'lzma': + outfname = GetOutputFilename('%s.decomp.otmp' % algo) + Run('lzma_alone', 'd', fname, outfname) +- data = ReadFile(outfname) ++ data = ReadFile(outfname, binary=True) + elif algo == 'gzip': +- data = Run('gzip', '-cd', fname) ++ data = Run('gzip', '-cd', fname, binary=True) + else: + raise ValueError("Unknown algorithm '%s'" % algo) + return data + +From patchwork Thu Oct 31 13:42:51 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187478 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org + header.b="kDzFSdUf"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 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<20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 02/17] patman: Use unicode for file I/O +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +At present patman test fail in some environments which don't use utf-8 +as the default file encoding. Add this explicitly. + +Signed-off-by: Simon Glass +--- + +Changes in v2: +- Add new patch to explicitly use unicode for file I/O in patman + + tools/patman/func_test.py | 8 ++++---- + tools/patman/patchstream.py | 4 ++-- + tools/patman/series.py | 2 +- + tools/patman/settings.py | 4 ++-- + tools/patman/test.py | 4 ++-- + 5 files changed, 11 insertions(+), 11 deletions(-) + +diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py +index 50a2741439..eadb49a335 100644 +--- a/tools/patman/func_test.py ++++ b/tools/patman/func_test.py +@@ -51,7 +51,7 @@ class TestFunctional(unittest.TestCase): + + @classmethod + def GetText(self, fname): +- return open(self.GetPath(fname)).read() ++ return open(self.GetPath(fname), encoding='utf-8').read() + + @classmethod + def GetPatchName(self, subject): +@@ -160,7 +160,7 @@ class TestFunctional(unittest.TestCase): + dry_run, not ignore_bad_tags, cc_file, + in_reply_to=in_reply_to, thread=None) + series.ShowActions(args, cmd, process_tags) +- cc_lines = open(cc_file).read().splitlines() ++ cc_lines = open(cc_file, encoding='utf-8').read().splitlines() + os.remove(cc_file) + + lines = out[0].splitlines() +@@ -229,14 +229,14 @@ Simon Glass (2): + 2.7.4 + + ''' +- lines = open(cover_fname).read().splitlines() ++ lines = open(cover_fname, encoding='utf-8').read().splitlines() + self.assertEqual( + 'Subject: [RFC PATCH v3 0/2] test: A test patch series', + lines[3]) + self.assertEqual(expected.splitlines(), lines[7:]) + + for i, fname in enumerate(args): +- lines = open(fname).read().splitlines() ++ lines = open(fname, encoding='utf-8').read().splitlines() + subject = [line for line in lines if line.startswith('Subject')] + self.assertEqual('Subject: [RFC %d/%d]' % (i + 1, count), + subject[0][:18]) +diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py +index ef06606297..df3eb7483b 100644 +--- a/tools/patman/patchstream.py ++++ b/tools/patman/patchstream.py +@@ -511,8 +511,8 @@ def FixPatch(backup_dir, fname, series, commit): + A list of errors, or [] if all ok. + """ + handle, tmpname = tempfile.mkstemp() +- outfd = os.fdopen(handle, 'w') +- infd = open(fname, 'r') ++ outfd = os.fdopen(handle, 'w', encoding='utf-8') ++ infd = open(fname, 'r', encoding='utf-8') + ps = PatchStream(series) + ps.commit = commit + ps.ProcessStream(infd, outfd) +diff --git a/tools/patman/series.py b/tools/patman/series.py +index 67103f03e6..95ec1d3131 100644 +--- a/tools/patman/series.py ++++ b/tools/patman/series.py +@@ -223,7 +223,7 @@ class Series(dict): + col = terminal.Color() + # Look for commit tags (of the form 'xxx:' at the start of the subject) + fname = '/tmp/patman.%d' % os.getpid() +- fd = open(fname, 'w') ++ fd = open(fname, 'w', encoding='utf-8') + all_ccs = [] + for commit in self.commits: + cc = [] +diff --git a/tools/patman/settings.py b/tools/patman/settings.py +index c98911d522..5dc83a8500 100644 +--- a/tools/patman/settings.py ++++ b/tools/patman/settings.py +@@ -165,7 +165,7 @@ def ReadGitAliases(fname): + fname: Filename to read + """ + try: +- fd = open(fname, 'r') ++ fd = open(fname, 'r', encoding='utf-8') + except IOError: + print("Warning: Cannot find alias file '%s'" % fname) + return +@@ -259,7 +259,7 @@ def _ReadAliasFile(fname): + """ + if os.path.exists(fname): + bad_line = None +- with open(fname) as fd: ++ with open(fname, encoding='utf-8') as fd: + linenum = 0 + for line in fd: + linenum += 1 +diff --git a/tools/patman/test.py b/tools/patman/test.py +index cc61c20606..889e186606 100644 +--- a/tools/patman/test.py ++++ b/tools/patman/test.py +@@ -72,12 +72,12 @@ Signed-off-by: Simon Glass + ''' + out = '' + inhandle, inname = tempfile.mkstemp() +- infd = os.fdopen(inhandle, 'w') ++ infd = os.fdopen(inhandle, 'w', encoding='utf-8') + infd.write(data) + infd.close() + + exphandle, expname = tempfile.mkstemp() +- expfd = os.fdopen(exphandle, 'w') ++ expfd = os.fdopen(exphandle, 'w', encoding='utf-8') + expfd.write(expected) + expfd.close() + + +From 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SMTP id n21mr6818418ili.0.1572529410409; + Thu, 31 Oct 2019 06:43:30 -0700 (PDT) +Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) + by smtp.gmail.com with ESMTPSA id + s70sm539612ili.13.2019.10.31.06.43.29 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:30 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:42:53 -0600 +Message-Id: <20191031134310.3072-4-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 04/17] buildman: Convert to Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Convert buildman to Python 3 and make it use that, to meet the 2020 +deadline. + +Signed-off-by: Simon Glass +--- + +Changes in v2: +- Use integer division for multiprocessing.cpu_count() +- Use integer division in SetupBuild() and GetActionSummary() +- Use HTTPMessage.getheader() instead of HTTPMessage.get() +- Use integer division in toolchain.Download() +- Use explicit utf-8 encoding in Boards.ReadBoards() + + tools/buildman/board.py | 9 +-- + tools/buildman/bsettings.py | 20 +++---- + tools/buildman/builder.py | 47 ++++++++-------- + tools/buildman/builderthread.py | 24 ++++---- + tools/buildman/buildman.py | 10 ++-- + tools/buildman/control.py | 44 +++++++-------- + tools/buildman/func_test.py | 16 +++--- + tools/buildman/test.py | 22 ++++---- + tools/buildman/toolchain.py | 99 +++++++++++++++++---------------- + 9 files changed, 146 insertions(+), 145 deletions(-) + +diff --git a/tools/buildman/board.py b/tools/buildman/board.py +index 2a1d021574..447aaabea8 100644 +--- a/tools/buildman/board.py ++++ b/tools/buildman/board.py +@@ -1,6 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0+ + # Copyright (c) 2012 The Chromium OS Authors. + ++from collections import OrderedDict + import re + + class Expr: +@@ -120,7 +121,7 @@ class Boards: + Args: + fname: Filename of boards.cfg file + """ +- with open(fname, 'r') as fd: ++ with open(fname, 'r', encoding='utf-8') as fd: + for line in fd: + if line[0] == '#': + continue +@@ -155,7 +156,7 @@ class Boards: + key is board.target + value is board + """ +- board_dict = {} ++ board_dict = OrderedDict() + for board in self._boards: + board_dict[board.target] = board + return board_dict +@@ -166,7 +167,7 @@ class Boards: + Returns: + List of Board objects that are marked selected + """ +- board_dict = {} ++ board_dict = OrderedDict() + for board in self._boards: + if board.build_it: + board_dict[board.target] = board +@@ -259,7 +260,7 @@ class Boards: + due to each argument, arranged by argument. + List of errors found + """ +- result = {} ++ result = OrderedDict() + warnings = [] + terms = self._BuildTerms(args) + +diff --git a/tools/buildman/bsettings.py b/tools/buildman/bsettings.py +index 03d7439aa5..0b7208da37 100644 +--- a/tools/buildman/bsettings.py ++++ b/tools/buildman/bsettings.py +@@ -1,9 +1,9 @@ + # SPDX-License-Identifier: GPL-2.0+ + # Copyright (c) 2012 The Chromium OS Authors. + +-import ConfigParser ++import configparser + import os +-import StringIO ++import io + + + def Setup(fname=''): +@@ -15,20 +15,20 @@ def Setup(fname=''): + global settings + global config_fname + +- settings = ConfigParser.SafeConfigParser() ++ settings = configparser.SafeConfigParser() + if fname is not None: + config_fname = fname + if config_fname == '': + config_fname = '%s/.buildman' % os.getenv('HOME') + if not os.path.exists(config_fname): +- print 'No config file found ~/.buildman\nCreating one...\n' ++ print('No config file found ~/.buildman\nCreating one...\n') + CreateBuildmanConfigFile(config_fname) +- print 'To install tool chains, please use the --fetch-arch option' ++ print('To install tool chains, please use the --fetch-arch option') + if config_fname: + settings.read(config_fname) + + def AddFile(data): +- settings.readfp(StringIO.StringIO(data)) ++ settings.readfp(io.StringIO(data)) + + def GetItems(section): + """Get the items from a section of the config. +@@ -41,7 +41,7 @@ def GetItems(section): + """ + try: + return settings.items(section) +- except ConfigParser.NoSectionError as e: ++ except configparser.NoSectionError as e: + return [] + except: + raise +@@ -68,10 +68,10 @@ def CreateBuildmanConfigFile(config_fname): + try: + f = open(config_fname, 'w') + except IOError: +- print "Couldn't create buildman config file '%s'\n" % config_fname ++ print("Couldn't create buildman config file '%s'\n" % config_fname) + raise + +- print >>f, '''[toolchain] ++ print('''[toolchain] + # name = path + # e.g. x86 = /opt/gcc-4.6.3-nolibc/x86_64-linux + +@@ -93,5 +93,5 @@ openrisc = or1k + # snapper-boards=ENABLE_AT91_TEST=1 + # snapper9260=${snapper-boards} BUILD_TAG=442 + # snapper9g45=${snapper-boards} BUILD_TAG=443 +-''' ++''', file=f) + f.close(); +diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py +index fbb236676c..cfbe4c26b1 100644 +--- a/tools/buildman/builder.py ++++ b/tools/buildman/builder.py +@@ -9,7 +9,7 @@ from datetime import datetime, timedelta + import glob + import os + import re +-import Queue ++import queue + import shutil + import signal + import string +@@ -92,11 +92,10 @@ u-boot/ source directory + """ + + # Possible build outcomes +-OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4) ++OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = list(range(4)) + + # Translate a commit subject into a valid filename (and handle unicode) +-trans_valid_chars = string.maketrans('/: ', '---') +-trans_valid_chars = trans_valid_chars.decode('latin-1') ++trans_valid_chars = str.maketrans('/: ', '---') + + BASE_CONFIG_FILENAMES = [ + 'u-boot.cfg', 'u-boot-spl.cfg', 'u-boot-tpl.cfg' +@@ -122,8 +121,8 @@ class Config: + def __hash__(self): + val = 0 + for fname in self.config: +- for key, value in self.config[fname].iteritems(): +- print key, value ++ for key, value in self.config[fname].items(): ++ print(key, value) + val = val ^ hash(key) & hash(value) + return val + +@@ -293,8 +292,8 @@ class Builder: + self._re_dtb_warning = re.compile('(.*): Warning .*') + self._re_note = re.compile('(.*):(\d*):(\d*): note: this is the location of the previous.*') + +- self.queue = Queue.Queue() +- self.out_queue = Queue.Queue() ++ self.queue = queue.Queue() ++ self.out_queue = queue.Queue() + for i in range(self.num_threads): + t = builderthread.BuilderThread(self, i, incremental, + per_board_out_dir) +@@ -781,7 +780,7 @@ class Builder: + config = {} + environment = {} + +- for board in boards_selected.itervalues(): ++ for board in boards_selected.values(): + outcome = self.GetBuildOutcome(commit_upto, board.target, + read_func_sizes, read_config, + read_environment) +@@ -814,13 +813,13 @@ class Builder: + tconfig = Config(self.config_filenames, board.target) + for fname in self.config_filenames: + if outcome.config: +- for key, value in outcome.config[fname].iteritems(): ++ for key, value in outcome.config[fname].items(): + tconfig.Add(fname, key, value) + config[board.target] = tconfig + + tenvironment = Environment(board.target) + if outcome.environment: +- for key, value in outcome.environment.iteritems(): ++ for key, value in outcome.environment.items(): + tenvironment.Add(key, value) + environment[board.target] = tenvironment + +@@ -1040,12 +1039,12 @@ class Builder: + + # We now have a list of image size changes sorted by arch + # Print out a summary of these +- for arch, target_list in arch_list.iteritems(): ++ for arch, target_list in arch_list.items(): + # Get total difference for each type + totals = {} + for result in target_list: + total = 0 +- for name, diff in result.iteritems(): ++ for name, diff in result.items(): + if name.startswith('_'): + continue + total += diff +@@ -1250,7 +1249,7 @@ class Builder: + if self._show_unknown: + self.AddOutcome(board_selected, arch_list, unknown_boards, '?', + self.col.MAGENTA) +- for arch, target_list in arch_list.iteritems(): ++ for arch, target_list in arch_list.items(): + Print('%10s: %s' % (arch, target_list)) + self._error_lines += 1 + if better_err: +@@ -1283,13 +1282,13 @@ class Builder: + environment_minus = {} + environment_change = {} + base = tbase.environment +- for key, value in tenvironment.environment.iteritems(): ++ for key, value in tenvironment.environment.items(): + if key not in base: + environment_plus[key] = value +- for key, value in base.iteritems(): ++ for key, value in base.items(): + if key not in tenvironment.environment: + environment_minus[key] = value +- for key, value in base.iteritems(): ++ for key, value in base.items(): + new_value = tenvironment.environment.get(key) + if new_value and value != new_value: + desc = '%s -> %s' % (value, new_value) +@@ -1342,15 +1341,15 @@ class Builder: + config_minus = {} + config_change = {} + base = tbase.config[name] +- for key, value in tconfig.config[name].iteritems(): ++ for key, value in tconfig.config[name].items(): + if key not in base: + config_plus[key] = value + all_config_plus[key] = value +- for key, value in base.iteritems(): ++ for key, value in base.items(): + if key not in tconfig.config[name]: + config_minus[key] = value + all_config_minus[key] = value +- for key, value in base.iteritems(): ++ for key, value in base.items(): + new_value = tconfig.config.get(key) + if new_value and value != new_value: + desc = '%s -> %s' % (value, new_value) +@@ -1368,7 +1367,7 @@ class Builder: + summary[target] = '\n'.join(lines) + + lines_by_target = {} +- for target, lines in summary.iteritems(): ++ for target, lines in summary.items(): + if lines in lines_by_target: + lines_by_target[lines].append(target) + else: +@@ -1392,7 +1391,7 @@ class Builder: + Print('%s:' % arch) + _OutputConfigInfo(lines) + +- for lines, targets in lines_by_target.iteritems(): ++ for lines, targets in lines_by_target.items(): + if not lines: + continue + Print('%s :' % ' '.join(sorted(targets))) +@@ -1463,7 +1462,7 @@ class Builder: + commits: Selected commits to build + """ + # First work out how many commits we will build +- count = (self.commit_count + self._step - 1) / self._step ++ count = (self.commit_count + self._step - 1) // self._step + self.count = len(board_selected) * count + self.upto = self.warned = self.fail = 0 + self._timestamps = collections.deque() +@@ -1566,7 +1565,7 @@ class Builder: + self.ProcessResult(None) + + # Create jobs to build all commits for each board +- for brd in board_selected.itervalues(): ++ for brd in board_selected.values(): + job = builderthread.BuilderJob() + job.board = brd + job.commits = commits +diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py +index 8a9d47cd5e..570c1f6595 100644 +--- a/tools/buildman/builderthread.py ++++ b/tools/buildman/builderthread.py +@@ -28,7 +28,7 @@ def Mkdir(dirname, parents = False): + except OSError as err: + if err.errno == errno.EEXIST: + if os.path.realpath('.') == os.path.realpath(dirname): +- print "Cannot create the current working directory '%s'!" % dirname ++ print("Cannot create the current working directory '%s'!" % dirname) + sys.exit(1) + pass + else: +@@ -291,15 +291,13 @@ class BuilderThread(threading.Thread): + outfile = os.path.join(build_dir, 'log') + with open(outfile, 'w') as fd: + if result.stdout: +- # We don't want unicode characters in log files +- fd.write(result.stdout.decode('UTF-8').encode('ASCII', 'replace')) ++ fd.write(result.stdout) + + errfile = self.builder.GetErrFile(result.commit_upto, + result.brd.target) + if result.stderr: + with open(errfile, 'w') as fd: +- # We don't want unicode characters in log files +- fd.write(result.stderr.decode('UTF-8').encode('ASCII', 'replace')) ++ fd.write(result.stderr) + elif os.path.exists(errfile): + os.remove(errfile) + +@@ -314,17 +312,17 @@ class BuilderThread(threading.Thread): + else: + fd.write('%s' % result.return_code) + with open(os.path.join(build_dir, 'toolchain'), 'w') as fd: +- print >>fd, 'gcc', result.toolchain.gcc +- print >>fd, 'path', result.toolchain.path +- print >>fd, 'cross', result.toolchain.cross +- print >>fd, 'arch', result.toolchain.arch ++ print('gcc', result.toolchain.gcc, file=fd) ++ print('path', result.toolchain.path, file=fd) ++ print('cross', result.toolchain.cross, file=fd) ++ print('arch', result.toolchain.arch, file=fd) + fd.write('%s' % result.return_code) + + # Write out the image and function size information and an objdump + env = result.toolchain.MakeEnvironment(self.builder.full_path) + with open(os.path.join(build_dir, 'env'), 'w') as fd: + for var in sorted(env.keys()): +- print >>fd, '%s="%s"' % (var, env[var]) ++ print('%s="%s"' % (var, env[var]), file=fd) + lines = [] + for fname in ['u-boot', 'spl/u-boot-spl']: + cmd = ['%snm' % self.toolchain.cross, '--size-sort', fname] +@@ -335,7 +333,7 @@ class BuilderThread(threading.Thread): + nm = self.builder.GetFuncSizesFile(result.commit_upto, + result.brd.target, fname) + with open(nm, 'w') as fd: +- print >>fd, nm_result.stdout, ++ print(nm_result.stdout, end=' ', file=fd) + + cmd = ['%sobjdump' % self.toolchain.cross, '-h', fname] + dump_result = command.RunPipe([cmd], capture=True, +@@ -346,7 +344,7 @@ class BuilderThread(threading.Thread): + objdump = self.builder.GetObjdumpFile(result.commit_upto, + result.brd.target, fname) + with open(objdump, 'w') as fd: +- print >>fd, dump_result.stdout, ++ print(dump_result.stdout, end=' ', file=fd) + for line in dump_result.stdout.splitlines(): + fields = line.split() + if len(fields) > 5 and fields[1] == '.rodata': +@@ -378,7 +376,7 @@ class BuilderThread(threading.Thread): + sizes = self.builder.GetSizesFile(result.commit_upto, + result.brd.target) + with open(sizes, 'w') as fd: +- print >>fd, '\n'.join(lines) ++ print('\n'.join(lines), file=fd) + + # Write out the configuration files, with a special case for SPL + for dirname in ['', 'spl', 'tpl']: +diff --git a/tools/buildman/buildman.py b/tools/buildman/buildman.py +index f17aa15e7c..30a8690f93 100755 +--- a/tools/buildman/buildman.py ++++ b/tools/buildman/buildman.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # + # Copyright (c) 2012 The Chromium OS Authors. +@@ -6,6 +6,8 @@ + + """See README for more information""" + ++from __future__ import print_function ++ + import multiprocessing + import os + import re +@@ -46,11 +48,11 @@ def RunTests(skip_net_tests): + suite = unittest.TestLoader().loadTestsFromTestCase(module) + suite.run(result) + +- print result ++ print(result) + for test, err in result.errors: +- print err ++ print(err) + for test, err in result.failures: +- print err ++ print(err) + + + options, args = cmdline.ParseArgs() +diff --git a/tools/buildman/control.py b/tools/buildman/control.py +index 9787b86747..216012d001 100644 +--- a/tools/buildman/control.py ++++ b/tools/buildman/control.py +@@ -30,7 +30,7 @@ def GetActionSummary(is_summary, commits, selected, options): + """ + if commits: + count = len(commits) +- count = (count + options.step - 1) / options.step ++ count = (count + options.step - 1) // options.step + commit_str = '%d commit%s' % (count, GetPlural(count)) + else: + commit_str = 'current source' +@@ -59,31 +59,31 @@ def ShowActions(series, why_selected, boards_selected, builder, options, + board_warnings: List of warnings obtained from board selected + """ + col = terminal.Color() +- print 'Dry run, so not doing much. But I would do this:' +- print ++ print('Dry run, so not doing much. But I would do this:') ++ print() + if series: + commits = series.commits + else: + commits = None +- print GetActionSummary(False, commits, boards_selected, +- options) +- print 'Build directory: %s' % builder.base_dir ++ print(GetActionSummary(False, commits, boards_selected, ++ options)) ++ print('Build directory: %s' % builder.base_dir) + if commits: + for upto in range(0, len(series.commits), options.step): + commit = series.commits[upto] +- print ' ', col.Color(col.YELLOW, commit.hash[:8], bright=False), +- print commit.subject +- print ++ print(' ', col.Color(col.YELLOW, commit.hash[:8], bright=False), end=' ') ++ print(commit.subject) ++ print() + for arg in why_selected: + if arg != 'all': +- print arg, ': %d boards' % len(why_selected[arg]) ++ print(arg, ': %d boards' % len(why_selected[arg])) + if options.verbose: +- print ' %s' % ' '.join(why_selected[arg]) +- print ('Total boards to build for each commit: %d\n' % +- len(why_selected['all'])) ++ print(' %s' % ' '.join(why_selected[arg])) ++ print(('Total boards to build for each commit: %d\n' % ++ len(why_selected['all']))) + if board_warnings: + for warning in board_warnings: +- print col.Color(col.YELLOW, warning) ++ print(col.Color(col.YELLOW, warning)) + + def CheckOutputDir(output_dir): + """Make sure that the output directory is not within the current directory +@@ -146,17 +146,17 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, + if options.fetch_arch: + if options.fetch_arch == 'list': + sorted_list = toolchains.ListArchs() +- print col.Color(col.BLUE, 'Available architectures: %s\n' % +- ' '.join(sorted_list)) ++ print(col.Color(col.BLUE, 'Available architectures: %s\n' % ++ ' '.join(sorted_list))) + return 0 + else: + fetch_arch = options.fetch_arch + if fetch_arch == 'all': + fetch_arch = ','.join(toolchains.ListArchs()) +- print col.Color(col.CYAN, '\nDownloading toolchains: %s' % +- fetch_arch) ++ print(col.Color(col.CYAN, '\nDownloading toolchains: %s' % ++ fetch_arch)) + for arch in fetch_arch.split(','): +- print ++ print() + ret = toolchains.FetchAndInstall(arch) + if ret: + return ret +@@ -167,7 +167,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, + toolchains.Scan(options.list_tool_chains and options.verbose) + if options.list_tool_chains: + toolchains.List() +- print ++ print() + return 0 + + # Work out how many commits to build. We want to build everything on the +@@ -191,7 +191,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, + sys.exit(col.Color(col.RED, "Range '%s' has no commits" % + options.branch)) + if msg: +- print col.Color(col.YELLOW, msg) ++ print(col.Color(col.YELLOW, msg)) + count += 1 # Build upstream commit also + + if not count: +@@ -268,7 +268,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, + options.threads = min(multiprocessing.cpu_count(), len(selected)) + if not options.jobs: + options.jobs = max(1, (multiprocessing.cpu_count() + +- len(selected) - 1) / len(selected)) ++ len(selected) - 1) // len(selected)) + + if not options.step: + options.step = len(series.commits) - 1 +diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py +index f90b8ea7f5..4c3d497294 100644 +--- a/tools/buildman/func_test.py ++++ b/tools/buildman/func_test.py +@@ -270,7 +270,7 @@ class TestFunctional(unittest.TestCase): + stdout=''.join(commit_log[:count])) + + # Not handled, so abort +- print 'git log', args ++ print('git log', args) + sys.exit(1) + + def _HandleCommandGitConfig(self, args): +@@ -286,7 +286,7 @@ class TestFunctional(unittest.TestCase): + stdout='refs/heads/master\n') + + # Not handled, so abort +- print 'git config', args ++ print('git config', args) + sys.exit(1) + + def _HandleCommandGit(self, in_args): +@@ -320,7 +320,7 @@ class TestFunctional(unittest.TestCase): + return command.CommandResult(return_code=0) + + # Not handled, so abort +- print 'git', git_args, sub_cmd, args ++ print('git', git_args, sub_cmd, args) + sys.exit(1) + + def _HandleCommandNm(self, args): +@@ -351,7 +351,7 @@ class TestFunctional(unittest.TestCase): + if pipe_list[1] == ['wc', '-l']: + wc = True + else: +- print 'invalid pipe', kwargs ++ print('invalid pipe', kwargs) + sys.exit(1) + cmd = pipe_list[0][0] + args = pipe_list[0][1:] +@@ -371,7 +371,7 @@ class TestFunctional(unittest.TestCase): + + if not result: + # Not handled, so abort +- print 'unknown command', kwargs ++ print('unknown command', kwargs) + sys.exit(1) + + if wc: +@@ -404,14 +404,14 @@ class TestFunctional(unittest.TestCase): + return command.CommandResult(return_code=0) + + # Not handled, so abort +- print 'make', stage ++ print('make', stage) + sys.exit(1) + + # Example function to print output lines + def print_lines(self, lines): +- print len(lines) ++ print(len(lines)) + for line in lines: +- print line ++ print(line) + #self.print_lines(terminal.GetPrintTestLines()) + + def testNoBoards(self): +diff --git a/tools/buildman/test.py b/tools/buildman/test.py +index ed99b9375c..b4e28d6867 100644 +--- a/tools/buildman/test.py ++++ b/tools/buildman/test.py +@@ -212,11 +212,11 @@ class TestBuild(unittest.TestCase): + self.assertEqual(lines[1].text, '02: %s' % commits[1][1]) + + col = terminal.Color() +- self.assertSummary(lines[2].text, 'sandbox', 'w+', ['board4'], ++ self.assertSummary(lines[2].text, 'arm', 'w+', ['board1'], + outcome=OUTCOME_WARN) +- self.assertSummary(lines[3].text, 'arm', 'w+', ['board1'], ++ self.assertSummary(lines[3].text, 'powerpc', 'w+', ['board2', 'board3'], + outcome=OUTCOME_WARN) +- self.assertSummary(lines[4].text, 'powerpc', 'w+', ['board2', 'board3'], ++ self.assertSummary(lines[4].text, 'sandbox', 'w+', ['board4'], + outcome=OUTCOME_WARN) + + # Second commit: The warnings should be listed +@@ -226,10 +226,10 @@ class TestBuild(unittest.TestCase): + + # Third commit: Still fails + self.assertEqual(lines[6].text, '03: %s' % commits[2][1]) +- self.assertSummary(lines[7].text, 'sandbox', '+', ['board4']) +- self.assertSummary(lines[8].text, 'arm', '', ['board1'], ++ self.assertSummary(lines[7].text, 'arm', '', ['board1'], + outcome=OUTCOME_OK) +- self.assertSummary(lines[9].text, 'powerpc', '+', ['board2', 'board3']) ++ self.assertSummary(lines[8].text, 'powerpc', '+', ['board2', 'board3']) ++ self.assertSummary(lines[9].text, 'sandbox', '+', ['board4']) + + # Expect a compiler error + self.assertEqual(lines[10].text, '+%s' % +@@ -237,8 +237,6 @@ class TestBuild(unittest.TestCase): + + # Fourth commit: Compile errors are fixed, just have warning for board3 + self.assertEqual(lines[11].text, '04: %s' % commits[3][1]) +- self.assertSummary(lines[12].text, 'sandbox', 'w+', ['board4'], +- outcome=OUTCOME_WARN) + expect = '%10s: ' % 'powerpc' + expect += ' ' + col.Color(col.GREEN, '') + expect += ' ' +@@ -246,7 +244,9 @@ class TestBuild(unittest.TestCase): + expect += ' ' + col.Color(col.YELLOW, 'w+') + expect += ' ' + expect += col.Color(col.YELLOW, ' %s' % 'board3') +- self.assertEqual(lines[13].text, expect) ++ self.assertEqual(lines[12].text, expect) ++ self.assertSummary(lines[13].text, 'sandbox', 'w+', ['board4'], ++ outcome=OUTCOME_WARN) + + # Compile error fixed + self.assertEqual(lines[14].text, '-%s' % +@@ -259,9 +259,9 @@ class TestBuild(unittest.TestCase): + + # Fifth commit + self.assertEqual(lines[16].text, '05: %s' % commits[4][1]) +- self.assertSummary(lines[17].text, 'sandbox', '+', ['board4']) +- self.assertSummary(lines[18].text, 'powerpc', '', ['board3'], ++ self.assertSummary(lines[17].text, 'powerpc', '', ['board3'], + outcome=OUTCOME_OK) ++ self.assertSummary(lines[18].text, 'sandbox', '+', ['board4']) + + # The second line of errors[3] is a duplicate, so buildman will drop it + expect = errors[3].rstrip().split('\n') +diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py +index a65737fdf8..cc26e2ede5 100644 +--- a/tools/buildman/toolchain.py ++++ b/tools/buildman/toolchain.py +@@ -4,18 +4,19 @@ + + import re + import glob +-from HTMLParser import HTMLParser ++from html.parser import HTMLParser + import os + import sys + import tempfile +-import urllib2 ++import urllib.request, urllib.error, urllib.parse + + import bsettings + import command + import terminal ++import tools + + (PRIORITY_FULL_PREFIX, PRIORITY_PREFIX_GCC, PRIORITY_PREFIX_GCC_PATH, +- PRIORITY_CALC) = range(4) ++ PRIORITY_CALC) = list(range(4)) + + # Simple class to collect links from a page + class MyHTMLParser(HTMLParser): +@@ -100,15 +101,15 @@ class Toolchain: + raise_on_error=False) + self.ok = result.return_code == 0 + if verbose: +- print 'Tool chain test: ', ++ print('Tool chain test: ', end=' ') + if self.ok: +- print "OK, arch='%s', priority %d" % (self.arch, +- self.priority) ++ print("OK, arch='%s', priority %d" % (self.arch, ++ self.priority)) + else: +- print 'BAD' +- print 'Command: ', cmd +- print result.stdout +- print result.stderr ++ print('BAD') ++ print('Command: ', cmd) ++ print(result.stdout) ++ print(result.stderr) + else: + self.ok = True + +@@ -138,7 +139,7 @@ class Toolchain: + value = '' + for name, value in bsettings.GetItems('toolchain-wrapper'): + if not value: +- print "Warning: Wrapper not found" ++ print("Warning: Wrapper not found") + if value: + value = value + ' ' + +@@ -227,11 +228,11 @@ class Toolchains: + """ + toolchains = bsettings.GetItems('toolchain') + if show_warning and not toolchains: +- print ("Warning: No tool chains. Please run 'buildman " ++ print(("Warning: No tool chains. Please run 'buildman " + "--fetch-arch all' to download all available toolchains, or " + "add a [toolchain] section to your buildman config file " + "%s. See README for details" % +- bsettings.config_fname) ++ bsettings.config_fname)) + + paths = [] + for name, value in toolchains: +@@ -272,10 +273,10 @@ class Toolchains: + if add_it: + self.toolchains[toolchain.arch] = toolchain + elif verbose: +- print ("Toolchain '%s' at priority %d will be ignored because " ++ print(("Toolchain '%s' at priority %d will be ignored because " + "another toolchain for arch '%s' has priority %d" % + (toolchain.gcc, toolchain.priority, toolchain.arch, +- self.toolchains[toolchain.arch].priority)) ++ self.toolchains[toolchain.arch].priority))) + + def ScanPath(self, path, verbose): + """Scan a path for a valid toolchain +@@ -289,9 +290,9 @@ class Toolchains: + fnames = [] + for subdir in ['.', 'bin', 'usr/bin']: + dirname = os.path.join(path, subdir) +- if verbose: print " - looking in '%s'" % dirname ++ if verbose: print(" - looking in '%s'" % dirname) + for fname in glob.glob(dirname + '/*gcc'): +- if verbose: print " - found '%s'" % fname ++ if verbose: print(" - found '%s'" % fname) + fnames.append(fname) + return fnames + +@@ -321,9 +322,9 @@ class Toolchains: + Args: + verbose: True to print out progress information + """ +- if verbose: print 'Scanning for tool chains' ++ if verbose: print('Scanning for tool chains') + for name, value in self.prefixes: +- if verbose: print " - scanning prefix '%s'" % value ++ if verbose: print(" - scanning prefix '%s'" % value) + if os.path.exists(value): + self.Add(value, True, verbose, PRIORITY_FULL_PREFIX, name) + continue +@@ -335,10 +336,10 @@ class Toolchains: + for f in fname_list: + self.Add(f, True, verbose, PRIORITY_PREFIX_GCC_PATH, name) + if not fname_list: +- raise ValueError, ("No tool chain found for prefix '%s'" % ++ raise ValueError("No tool chain found for prefix '%s'" % + value) + for path in self.paths: +- if verbose: print " - scanning path '%s'" % path ++ if verbose: print(" - scanning path '%s'" % path) + fnames = self.ScanPath(path, verbose) + for fname in fnames: + self.Add(fname, True, verbose) +@@ -346,13 +347,13 @@ class Toolchains: + def List(self): + """List out the selected toolchains for each architecture""" + col = terminal.Color() +- print col.Color(col.BLUE, 'List of available toolchains (%d):' % +- len(self.toolchains)) ++ print(col.Color(col.BLUE, 'List of available toolchains (%d):' % ++ len(self.toolchains))) + if len(self.toolchains): +- for key, value in sorted(self.toolchains.iteritems()): +- print '%-10s: %s' % (key, value.gcc) ++ for key, value in sorted(self.toolchains.items()): ++ print('%-10s: %s' % (key, value.gcc)) + else: +- print 'None' ++ print('None') + + def Select(self, arch): + """Returns the toolchain for a given architecture +@@ -370,7 +371,7 @@ class Toolchains: + return self.toolchains[alias] + + if not arch in self.toolchains: +- raise ValueError, ("No tool chain found for arch '%s'" % arch) ++ raise ValueError("No tool chain found for arch '%s'" % arch) + return self.toolchains[arch] + + def ResolveReferences(self, var_dict, args): +@@ -464,9 +465,9 @@ class Toolchains: + links = [] + for version in versions: + url = '%s/%s/%s/' % (base, arch, version) +- print 'Checking: %s' % url +- response = urllib2.urlopen(url) +- html = response.read() ++ print('Checking: %s' % url) ++ response = urllib.request.urlopen(url) ++ html = tools.ToString(response.read()) + parser = MyHTMLParser(fetch_arch) + parser.feed(html) + if fetch_arch == 'list': +@@ -488,14 +489,14 @@ class Toolchains: + Full path to the downloaded archive file in that directory, + or None if there was an error while downloading + """ +- print 'Downloading: %s' % url ++ print('Downloading: %s' % url) + leaf = url.split('/')[-1] + tmpdir = tempfile.mkdtemp('.buildman') +- response = urllib2.urlopen(url) ++ response = urllib.request.urlopen(url) + fname = os.path.join(tmpdir, leaf) + fd = open(fname, 'wb') + meta = response.info() +- size = int(meta.getheaders('Content-Length')[0]) ++ size = int(meta.get('Content-Length')) + done = 0 + block_size = 1 << 16 + status = '' +@@ -504,19 +505,19 @@ class Toolchains: + while True: + buffer = response.read(block_size) + if not buffer: +- print chr(8) * (len(status) + 1), '\r', ++ print(chr(8) * (len(status) + 1), '\r', end=' ') + break + + done += len(buffer) + fd.write(buffer) +- status = r'%10d MiB [%3d%%]' % (done / 1024 / 1024, +- done * 100 / size) ++ status = r'%10d MiB [%3d%%]' % (done // 1024 // 1024, ++ done * 100 // size) + status = status + chr(8) * (len(status) + 1) +- print status, ++ print(status, end=' ') + sys.stdout.flush() + fd.close() + if done != size: +- print 'Error, failed to download' ++ print('Error, failed to download') + os.remove(fname) + fname = None + return tmpdir, fname +@@ -565,11 +566,11 @@ class Toolchains: + """ + # Fist get the URL for this architecture + col = terminal.Color() +- print col.Color(col.BLUE, "Downloading toolchain for arch '%s'" % arch) ++ print(col.Color(col.BLUE, "Downloading toolchain for arch '%s'" % arch)) + url = self.LocateArchUrl(arch) + if not url: +- print ("Cannot find toolchain for arch '%s' - use 'list' to list" % +- arch) ++ print(("Cannot find toolchain for arch '%s' - use 'list' to list" % ++ arch)) + return 2 + home = os.environ['HOME'] + dest = os.path.join(home, '.buildman-toolchains') +@@ -580,28 +581,28 @@ class Toolchains: + tmpdir, tarfile = self.Download(url) + if not tarfile: + return 1 +- print col.Color(col.GREEN, 'Unpacking to: %s' % dest), ++ print(col.Color(col.GREEN, 'Unpacking to: %s' % dest), end=' ') + sys.stdout.flush() + path = self.Unpack(tarfile, dest) + os.remove(tarfile) + os.rmdir(tmpdir) +- print ++ print() + + # Check that the toolchain works +- print col.Color(col.GREEN, 'Testing') ++ print(col.Color(col.GREEN, 'Testing')) + dirpath = os.path.join(dest, path) + compiler_fname_list = self.ScanPath(dirpath, True) + if not compiler_fname_list: +- print 'Could not locate C compiler - fetch failed.' ++ print('Could not locate C compiler - fetch failed.') + return 1 + if len(compiler_fname_list) != 1: +- print col.Color(col.RED, 'Warning, ambiguous toolchains: %s' % +- ', '.join(compiler_fname_list)) ++ print(col.Color(col.RED, 'Warning, ambiguous toolchains: %s' % ++ ', '.join(compiler_fname_list))) + toolchain = Toolchain(compiler_fname_list[0], True, True) + + # Make sure that it will be found by buildman + if not self.TestSettingsHasPath(dirpath): +- print ("Adding 'download' to config file '%s'" % +- bsettings.config_fname) ++ print(("Adding 'download' to config file '%s'" % ++ bsettings.config_fname)) + bsettings.SetItem('toolchain', 'download', '%s/*/*' % dest) + return 0 + +From patchwork Thu Oct 31 13:42:54 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187484 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org 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kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) + by smtp.gmail.com with ESMTPSA id + s70sm539612ili.13.2019.10.31.06.43.30 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:30 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:42:54 -0600 +Message-Id: <20191031134310.3072-5-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 05/17] test_fdt: Move to use Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Update this test to use Python 3 to meet the 2020 deadline. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/dtoc/test_fdt.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py +index 028c8cbaa8..3316757e61 100755 +--- a/tools/dtoc/test_fdt.py ++++ b/tools/dtoc/test_fdt.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # Copyright (c) 2018 Google, Inc + # Written by Simon Glass + +From patchwork Thu Oct 31 13:42:55 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187482 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none 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-0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:42:55 -0600 +Message-Id: <20191031134310.3072-6-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 06/17] test_dtoc: Move to use Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Update this test to use Python 3 to meet the 2020 deadline. + +Also make it executable while we are here. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/dtoc/dtoc.py | 2 +- + tools/dtoc/test_dtoc.py | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + mode change 100644 => 100755 tools/dtoc/test_dtoc.py + +diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py +index 514e0dd4a3..b3596a5918 100755 +--- a/tools/dtoc/dtoc.py ++++ b/tools/dtoc/dtoc.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # + # Copyright (C) 2016 Google, Inc +diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py +old mode 100644 +new mode 100755 +index b915b27856..d733b70655 +--- a/tools/dtoc/test_dtoc.py ++++ b/tools/dtoc/test_dtoc.py +@@ -1,3 +1,4 @@ ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # Copyright (c) 2012 The Chromium OS Authors. + # + +From patchwork Thu Oct 31 13:42:56 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187475 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) 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smtp.gmail.com with ESMTPSA id + s70sm539612ili.13.2019.10.31.06.43.32 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:32 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:42:56 -0600 +Message-Id: <20191031134310.3072-7-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 07/17] microcode_tool: Convert to Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Convert this tool to Python 3 and make it use that, to meet the 2020 +deadline. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/microcode-tool.py | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py +index 249a33b8ca..24c02c4fca 100755 +--- a/tools/microcode-tool.py ++++ b/tools/microcode-tool.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # + # Copyright (c) 2014 Google, Inc +@@ -126,15 +126,15 @@ def List(date, microcodes, model): + microcodes: Dict of Microcode objects indexed by name + model: Model string to search for, or None + """ +- print 'Date: %s' % date ++ print('Date: %s' % date) + if model: + mcode_list, tried = FindMicrocode(microcodes, model.lower()) +- print 'Matching models %s:' % (', '.join(tried)) ++ print('Matching models %s:' % (', '.join(tried))) + else: +- print 'All models:' +- mcode_list = [microcodes[m] for m in microcodes.keys()] ++ print('All models:') ++ mcode_list = [microcodes[m] for m in list(microcodes.keys())] + for mcode in mcode_list: +- print '%-20s: model %s' % (mcode.name, mcode.model) ++ print('%-20s: model %s' % (mcode.name, mcode.model)) + + def FindMicrocode(microcodes, model): + """Find all the microcode chunks which match the given model. +@@ -164,7 +164,7 @@ def FindMicrocode(microcodes, model): + for i in range(3): + abbrev = model[:-i] if i else model + tried.append(abbrev) +- for mcode in microcodes.values(): ++ for mcode in list(microcodes.values()): + if mcode.model.startswith(abbrev): + found.append(mcode) + if found: +@@ -229,17 +229,17 @@ data = <%s + args += [mcode.words[i] for i in range(7)] + args.append(words) + if outfile == '-': +- print out % tuple(args) ++ print(out % tuple(args)) + else: + if not outfile: + if not os.path.exists(MICROCODE_DIR): +- print >> sys.stderr, "Creating directory '%s'" % MICROCODE_DIR ++ print("Creating directory '%s'" % MICROCODE_DIR, file=sys.stderr) + os.makedirs(MICROCODE_DIR) + outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi') +- print >> sys.stderr, "Writing microcode for '%s' to '%s'" % ( +- ', '.join([mcode.name for mcode in mcodes]), outfile) ++ print("Writing microcode for '%s' to '%s'" % ( ++ ', '.join([mcode.name for mcode in mcodes]), outfile), file=sys.stderr) + with open(outfile, 'w') as fd: +- print >> fd, out % tuple(args) ++ print(out % tuple(args), file=fd) + + def MicrocodeTool(): + """Run the microcode tool""" +@@ -289,14 +289,14 @@ def MicrocodeTool(): + if cmd == 'list': + List(date, microcodes, options.model) + elif cmd == 'license': +- print '\n'.join(license_text) ++ print('\n'.join(license_text)) + elif cmd == 'create': + if not options.model: + parser.error('You must specify a model to create') + model = options.model.lower() + if options.model == 'all': + options.multiple = True +- mcode_list = microcodes.values() ++ mcode_list = list(microcodes.values()) + tried = [] + else: + mcode_list, tried = FindMicrocode(microcodes, model) + +From patchwork Thu Oct 31 13:42:57 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187479 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org + header.b="EEiLZ2vw"; dkim-atps=neutral +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 473mqC3lvCz9sPJ + for ; + Fri, 1 Nov 2019 00:47:51 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id 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2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Convert this tool to Python 3 and make it use that, to meet the 2020 +deadline. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/moveconfig.py | 82 ++++++++++++++++++++++----------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +diff --git a/tools/moveconfig.py b/tools/moveconfig.py +index b99417e9d6..e2ff4cfc88 100755 +--- a/tools/moveconfig.py ++++ b/tools/moveconfig.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + # + # Author: Masahiro Yamada +@@ -304,7 +304,7 @@ import glob + import multiprocessing + import optparse + import os +-import Queue ++import queue + import re + import shutil + import subprocess +@@ -450,8 +450,8 @@ def get_matched_defconfigs(defconfigs_file): + line = line.split(' ')[0] # handle 'git log' input + matched = get_matched_defconfig(line) + if not matched: +- print >> sys.stderr, "warning: %s:%d: no defconfig matched '%s'" % \ +- (defconfigs_file, i + 1, line) ++ print("warning: %s:%d: no defconfig matched '%s'" % \ ++ (defconfigs_file, i + 1, line), file=sys.stderr) + + defconfigs += matched + +@@ -494,11 +494,11 @@ def show_diff(a, b, file_path, color_enabled): + + for line in diff: + if line[0] == '-' and line[1] != '-': +- print color_text(color_enabled, COLOR_RED, line), ++ print(color_text(color_enabled, COLOR_RED, line), end=' ') + elif line[0] == '+' and line[1] != '+': +- print color_text(color_enabled, COLOR_GREEN, line), ++ print(color_text(color_enabled, COLOR_GREEN, line), end=' ') + else: +- print line, ++ print(line, end=' ') + + def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre, + extend_post): +@@ -554,9 +554,9 @@ def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre + def confirm(options, prompt): + if not options.yes: + while True: +- choice = raw_input('{} [y/n]: '.format(prompt)) ++ choice = input('{} [y/n]: '.format(prompt)) + choice = choice.lower() +- print choice ++ print(choice) + if choice == 'y' or choice == 'n': + break + +@@ -809,10 +809,10 @@ def try_expand(line): + val= val.strip('\"') + if re.search("[*+-/]|<<|SZ_+|\(([^\)]+)\)", val): + newval = hex(eval(val, SIZES)) +- print "\tExpanded expression %s to %s" % (val, newval) ++ print("\tExpanded expression %s to %s" % (val, newval)) + return cfg+'='+newval + except: +- print "\tFailed to expand expression in %s" % line ++ print("\tFailed to expand expression in %s" % line) + + return line + +@@ -838,7 +838,7 @@ class Progress: + + def show(self): + """Display the progress.""" +- print ' %d defconfigs out of %d\r' % (self.current, self.total), ++ print(' %d defconfigs out of %d\r' % (self.current, self.total), end=' ') + sys.stdout.flush() + + +@@ -1236,7 +1236,7 @@ class Slot: + "Tool chain for '%s' is missing. Do nothing.\n" % arch) + self.finish(False) + return +- env = toolchain.MakeEnvironment(False) ++ env = toolchain.MakeEnvironment(False) + + cmd = list(self.make_cmd) + cmd.append('KCONFIG_IGNORE_DUPLICATES=1') +@@ -1312,7 +1312,7 @@ class Slot: + log += '\n'.join([ ' ' + s for s in self.log.split('\n') ]) + # Some threads are running in parallel. + # Print log atomically to not mix up logs from different threads. +- print >> (sys.stdout if success else sys.stderr), log ++ print(log, file=(sys.stdout if success else sys.stderr)) + + if not success: + if self.options.exit_on_error: +@@ -1411,8 +1411,8 @@ class Slots: + msg = "The following boards were not processed due to error:\n" + msg += boards + msg += "(the list has been saved in %s)\n" % output_file +- print >> sys.stderr, color_text(self.options.color, COLOR_LIGHT_RED, +- msg) ++ print(color_text(self.options.color, COLOR_LIGHT_RED, ++ msg), file=sys.stderr) + + with open(output_file, 'w') as f: + f.write(boards) +@@ -1431,8 +1431,8 @@ class Slots: + msg += "It is highly recommended to check them manually:\n" + msg += boards + msg += "(the list has been saved in %s)\n" % output_file +- print >> sys.stderr, color_text(self.options.color, COLOR_YELLOW, +- msg) ++ print(color_text(self.options.color, COLOR_YELLOW, ++ msg), file=sys.stderr) + + with open(output_file, 'w') as f: + f.write(boards) +@@ -1448,11 +1448,11 @@ class ReferenceSource: + commit: commit to git-clone + """ + self.src_dir = tempfile.mkdtemp() +- print "Cloning git repo to a separate work directory..." ++ print("Cloning git repo to a separate work directory...") + subprocess.check_output(['git', 'clone', os.getcwd(), '.'], + cwd=self.src_dir) +- print "Checkout '%s' to build the original autoconf.mk." % \ +- subprocess.check_output(['git', 'rev-parse', '--short', commit]).strip() ++ print("Checkout '%s' to build the original autoconf.mk." % \ ++ subprocess.check_output(['git', 'rev-parse', '--short', commit]).strip()) + subprocess.check_output(['git', 'checkout', commit], + stderr=subprocess.STDOUT, cwd=self.src_dir) + +@@ -1480,14 +1480,14 @@ def move_config(toolchains, configs, options, db_queue): + """ + if len(configs) == 0: + if options.force_sync: +- print 'No CONFIG is specified. You are probably syncing defconfigs.', ++ print('No CONFIG is specified. You are probably syncing defconfigs.', end=' ') + elif options.build_db: +- print 'Building %s database' % CONFIG_DATABASE ++ print('Building %s database' % CONFIG_DATABASE) + else: +- print 'Neither CONFIG nor --force-sync is specified. Nothing will happen.', ++ print('Neither CONFIG nor --force-sync is specified. Nothing will happen.', end=' ') + else: +- print 'Move ' + ', '.join(configs), +- print '(jobs: %d)\n' % options.jobs ++ print('Move ' + ', '.join(configs), end=' ') ++ print('(jobs: %d)\n' % options.jobs) + + if options.git_ref: + reference_src = ReferenceSource(options.git_ref) +@@ -1517,7 +1517,7 @@ def move_config(toolchains, configs, options, db_queue): + while not slots.empty(): + time.sleep(SLEEP_TIME) + +- print '' ++ print('') + slots.show_failed_boards() + slots.show_suspicious_boards() + +@@ -1691,15 +1691,15 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, + for config in config_list: + defconfigs = defconfig_db.get(config) + if not defconfigs: +- print '%s not found in any defconfig' % config ++ print('%s not found in any defconfig' % config) + continue + + # Get the set of defconfigs without this one (since a config cannot + # imply itself) + non_defconfigs = all_defconfigs - defconfigs + num_defconfigs = len(defconfigs) +- print '%s found in %d/%d defconfigs' % (config, num_defconfigs, +- len(all_configs)) ++ print('%s found in %d/%d defconfigs' % (config, num_defconfigs, ++ len(all_configs))) + + # This will hold the results: key=config, value=defconfigs containing it + imply_configs = {} +@@ -1736,7 +1736,7 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, + if common_defconfigs: + skip = False + if find_superset: +- for prev in imply_configs.keys(): ++ for prev in list(imply_configs.keys()): + prev_count = len(imply_configs[prev]) + count = len(common_defconfigs) + if (prev_count > count and +@@ -1806,15 +1806,15 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, + add_list[fname].append(linenum) + + if show and kconfig_info != 'skip': +- print '%5d : %-30s%-25s %s' % (num_common, iconfig.ljust(30), +- kconfig_info, missing_str) ++ print('%5d : %-30s%-25s %s' % (num_common, iconfig.ljust(30), ++ kconfig_info, missing_str)) + + # Having collected a list of things to add, now we add them. We process + # each file from the largest line number to the smallest so that + # earlier additions do not affect our line numbers. E.g. if we added an + # imply at line 20 it would change the position of each line after + # that. +- for fname, linenums in add_list.iteritems(): ++ for fname, linenums in add_list.items(): + for linenum in sorted(linenums, reverse=True): + add_imply_rule(config[CONFIG_LEN:], fname, linenum) + +@@ -1891,11 +1891,11 @@ def main(): + for flag in options.imply_flags.split(','): + bad = flag not in IMPLY_FLAGS + if bad: +- print "Invalid flag '%s'" % flag ++ print("Invalid flag '%s'" % flag) + if flag == 'help' or bad: +- print "Imply flags: (separate with ',')" +- for name, info in IMPLY_FLAGS.iteritems(): +- print ' %-15s: %s' % (name, info[1]) ++ print("Imply flags: (separate with ',')") ++ for name, info in IMPLY_FLAGS.items(): ++ print(' %-15s: %s' % (name, info[1])) + parser.print_usage() + sys.exit(1) + imply_flags |= IMPLY_FLAGS[flag][0] +@@ -1905,14 +1905,14 @@ def main(): + return + + config_db = {} +- db_queue = Queue.Queue() ++ db_queue = queue.Queue() + t = DatabaseThread(config_db, db_queue) + t.setDaemon(True) + t.start() + + if not options.cleanup_headers_only: + check_clean_directory() +- bsettings.Setup('') ++ bsettings.Setup('') + toolchains = toolchain.Toolchains() + toolchains.GetSettings() + toolchains.Scan(verbose=False) +@@ -1939,7 +1939,7 @@ def main(): + + if options.build_db: + with open(CONFIG_DATABASE, 'w') as fd: +- for defconfig, configs in config_db.iteritems(): ++ for defconfig, configs in config_db.items(): + fd.write('%s\n' % defconfig) + for config in sorted(configs.keys()): + fd.write(' %s=%s\n' % (config, configs[config])) + +From patchwork Thu Oct 31 13:42:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187471 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) 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smtp.gmail.com with ESMTPSA id + s70sm539612ili.13.2019.10.31.06.43.33 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:33 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:42:58 -0600 +Message-Id: <20191031134310.3072-9-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 09/17] rkmux: Convert to Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Convert this tool to Python 3 and make it use that, to meet the 2020 +deadline. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/rkmux.py | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/tools/rkmux.py b/tools/rkmux.py +index 11c192a073..1226ee201c 100755 +--- a/tools/rkmux.py ++++ b/tools/rkmux.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + + # Script to create enums from datasheet register tables + # +@@ -43,8 +43,8 @@ class RegField: + self.desc.append(desc) + + def Show(self): +- print self +- print ++ print(self) ++ print() + self.__init__() + + def __str__(self): +@@ -65,11 +65,11 @@ class Printer: + self.output_footer() + + def output_header(self): +- print '/* %s */' % self.name +- print 'enum {' ++ print('/* %s */' % self.name) ++ print('enum {') + + def output_footer(self): +- print '};'; ++ print('};'); + + def output_regfield(self, regfield): + lines = regfield.desc +@@ -97,7 +97,7 @@ class Printer: + self.first = False + self.output_header() + else: +- print ++ print() + out_enum(field, 'shift', bit_low) + out_enum(field, 'mask', mask) + next_val = -1 +@@ -175,7 +175,7 @@ def out_enum(field, suffix, value, skip_val=False): + val_str = '%d' % value + + str += '%s= %s' % ('\t' * tabs, val_str) +- print '\t%s,' % str ++ print('\t%s,' % str) + + # Process a CSV file, e.g. from tabula + def process_csv(name, fd): + +From patchwork Thu Oct 31 13:42:59 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187489 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) + header.from=chromium.org +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) 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2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini , Josef Lusticky +Subject: [U-Boot] [PATCH v2 10/17] pylibfdt: Convert to Python 3 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Build this swig module with Python 3. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + scripts/dtc/pylibfdt/Makefile | 2 +- + scripts/dtc/pylibfdt/libfdt.i_shipped | 2 +- + scripts/dtc/pylibfdt/setup.py | 2 +- + tools/binman/entry.py | 16 ++-------------- + tools/binman/entry_test.py | 15 --------------- + tools/binman/etype/intel_fit.py | 2 +- + 6 files changed, 6 insertions(+), 33 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile +index 15e66ad44d..42342c75bb 100644 +--- a/scripts/dtc/pylibfdt/Makefile ++++ b/scripts/dtc/pylibfdt/Makefile +@@ -21,7 +21,7 @@ quiet_cmd_pymod = PYMOD $@ + CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \ + SOURCES="$(PYLIBFDT_srcs)" \ + SWIG_OPTS="-I$(LIBFDT_srcdir) -I$(LIBFDT_srcdir)/.." \ +- $(PYTHON2) $< --quiet build_ext --inplace ++ $(PYTHON3) $< --quiet build_ext --inplace + + $(obj)/_libfdt.so: $(src)/setup.py $(PYLIBFDT_srcs) FORCE + $(call if_changed,pymod) +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index 76e61e98bd..53b70f8f5e 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -624,7 +624,7 @@ class Fdt(FdtRo): + Raises: + FdtException if no parent found or other error occurs + """ +- val = val.encode('utf-8') + '\0' ++ val = val.encode('utf-8') + b'\0' + return check_err(fdt_setprop(self._fdt, nodeoffset, prop_name, + val, len(val)), quiet) + +diff --git a/scripts/dtc/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py +index 4f7cf042bf..992cdec30f 100755 +--- a/scripts/dtc/pylibfdt/setup.py ++++ b/scripts/dtc/pylibfdt/setup.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + + """ + setup.py file for SWIG libfdt +diff --git a/tools/binman/entry.py b/tools/binman/entry.py +index 409c0dca93..5bf5be4794 100644 +--- a/tools/binman/entry.py ++++ b/tools/binman/entry.py +@@ -7,16 +7,7 @@ + from __future__ import print_function + + from collections import namedtuple +- +-# importlib was introduced in Python 2.7 but there was a report of it not +-# working in 2.7.12, so we work around this: +-# http://lists.denx.de/pipermail/u-boot/2016-October/269729.html +-try: +- import importlib +- have_importlib = True +-except: +- have_importlib = False +- ++import importlib + import os + import sys + +@@ -119,10 +110,7 @@ class Entry(object): + old_path = sys.path + sys.path.insert(0, os.path.join(our_path, 'etype')) + try: +- if have_importlib: +- module = importlib.import_module(module_name) +- else: +- module = __import__(module_name) ++ module = importlib.import_module(module_name) + except ImportError as e: + raise ValueError("Unknown entry type '%s' in node '%s' (expected etype/%s.py, error '%s'" % + (etype, node_path, module_name, e)) +diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py +index 13f5864516..277e10b585 100644 +--- a/tools/binman/entry_test.py ++++ b/tools/binman/entry_test.py +@@ -39,21 +39,6 @@ class TestEntry(unittest.TestCase): + else: + import entry + +- def test1EntryNoImportLib(self): +- """Test that we can import Entry subclassess successfully""" +- sys.modules['importlib'] = None +- global entry +- self._ReloadEntry() +- entry.Entry.Create(None, self.GetNode(), 'u-boot') +- self.assertFalse(entry.have_importlib) +- +- def test2EntryImportLib(self): +- del sys.modules['importlib'] +- global entry +- self._ReloadEntry() +- entry.Entry.Create(None, self.GetNode(), 'u-boot-spl') +- self.assertTrue(entry.have_importlib) +- + def testEntryContents(self): + """Test the Entry bass class""" + import entry +diff --git a/tools/binman/etype/intel_fit.py b/tools/binman/etype/intel_fit.py +index 23606d27d0..2a34a05f95 100644 +--- a/tools/binman/etype/intel_fit.py ++++ b/tools/binman/etype/intel_fit.py +@@ -27,6 +27,6 @@ class Entry_intel_fit(Entry_blob): + self.align = 16 + + def ObtainContents(self): +- data = struct.pack('<8sIHBB', '_FIT_ ', 1, 0x100, 0x80, 0x7d) ++ data = struct.pack('<8sIHBB', b'_FIT_ ', 1, 0x100, 0x80, 0x7d) + self.SetContents(data) + return True + +From patchwork Thu Oct 31 13:43:00 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187488 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) 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smtp.gmail.com with ESMTPSA id + s70sm539612ili.13.2019.10.31.06.43.35 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:35 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:43:00 -0600 +Message-Id: <20191031134310.3072-11-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini +Subject: [U-Boot] [PATCH v2 11/17] pylibfdt: Sync up with upstream +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Sync up the libfdt Python bindings with upstream, commit: + +430419c (tests: fix some python warnings) + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + scripts/dtc/pylibfdt/libfdt.i_shipped | 45 ++++++++++++++++++++------- + 1 file changed, 33 insertions(+), 12 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index 53b70f8f5e..e2aa7bb01e 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -92,7 +92,7 @@ def check_err(val, quiet=()): + Raises + FdtException if val < 0 + """ +- if val < 0: ++ if isinstance(val, int) and val < 0: + if -val not in quiet: + raise FdtException(val) + return val +@@ -417,7 +417,7 @@ class FdtRo(object): + quiet) + if isinstance(pdata, (int)): + return pdata +- return Property(prop_name, bytearray(pdata[0])) ++ return Property(prop_name, bytes(pdata[0])) + + def get_phandle(self, nodeoffset): + """Get the phandle of a node +@@ -431,6 +431,18 @@ class FdtRo(object): + """ + return fdt_get_phandle(self._fdt, nodeoffset) + ++ def get_alias(self, name): ++ """Get the full path referenced by a given alias ++ ++ Args: ++ name: name of the alias to lookup ++ ++ Returns: ++ Full path to the node for the alias named 'name', if it exists ++ None, if the given alias or the /aliases node does not exist ++ """ ++ return fdt_get_alias(self._fdt, name) ++ + def parent_offset(self, nodeoffset, quiet=()): + """Get the offset of a node's parent + +@@ -727,8 +739,10 @@ class FdtSw(FdtRo): + + # First create the device tree with a node and property: + sw = FdtSw() +- with sw.add_node('node'): +- sw.property_u32('reg', 2) ++ sw.finish_reservemap() ++ with sw.add_node(''): ++ with sw.add_node('node'): ++ sw.property_u32('reg', 2) + fdt = sw.as_fdt() + + # Now we can use it as a real device tree +@@ -1029,17 +1043,24 @@ typedef uint32_t fdt32_t; + if (!$1) + $result = Py_None; + else +- $result = Py_BuildValue("s#", $1, *arg4); ++ %#if PY_VERSION_HEX >= 0x03000000 ++ $result = Py_BuildValue("y#", $1, *arg4); ++ %#else ++ $result = Py_BuildValue("s#", $1, *arg4); ++ %#endif + } + + /* typemap used for fdt_setprop() */ + %typemap(in) (const void *val) { +- $1 = PyString_AsString($input); /* char *str */ +-} +- +-/* typemap used for fdt_add_reservemap_entry() */ +-%typemap(in) uint64_t { +- $1 = PyLong_AsUnsignedLong($input); ++ %#if PY_VERSION_HEX >= 0x03000000 ++ if (!PyBytes_Check($input)) { ++ SWIG_exception_fail(SWIG_TypeError, "bytes expected in method '" "$symname" ++ "', argument " "$argnum"" of type '" "$type""'"); ++ } ++ $1 = PyBytes_AsString($input); ++ %#else ++ $1 = PyString_AsString($input); /* char *str */ ++ %#endif + } + + /* typemaps used for fdt_next_node() */ +@@ -1061,7 +1082,7 @@ typedef uint32_t fdt32_t; + } + + %typemap(argout) uint64_t * { +- PyObject *val = PyLong_FromUnsignedLong(*arg$argnum); ++ PyObject *val = PyLong_FromUnsignedLongLong(*arg$argnum); + if (!result) { + if (PyTuple_GET_SIZE(resultobj) == 0) + resultobj = val; + +From patchwork Thu Oct 31 13:43:01 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 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U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This function should use a void * type, not char *. This causes an error: + +TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *' + +Fix it. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + scripts/dtc/pylibfdt/libfdt.i_shipped | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index e2aa7bb01e..fae0b27d7d 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -18,7 +18,7 @@ + * a struct called fdt_property. That struct causes swig to create a class in + * libfdt.py called fdt_property(), which confuses things. + */ +-static int fdt_property_stub(void *fdt, const char *name, const char *val, ++static int fdt_property_stub(void *fdt, const char *name, const void *val, + int len) + { + return fdt_property(fdt, name, val, len); +@@ -1113,6 +1113,6 @@ int fdt_property_cell(void *fdt, const char *name, uint32_t val); + * This function has a stub since the name fdt_property is used for both a + * function and a struct, which confuses SWIG. + */ +-int fdt_property_stub(void *fdt, const char *name, const char *val, int len); ++int fdt_property_stub(void *fdt, const char *name, const void *val, int len); + + %include <../libfdt/libfdt.h> + +From patchwork Thu Oct 31 13:43:02 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187485 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Remember this +so that it can be used when needed. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/binman/entry.py | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/tools/binman/entry.py b/tools/binman/entry.py +index 5bf5be4794..b6f1b2c93f 100644 +--- a/tools/binman/entry.py ++++ b/tools/binman/entry.py +@@ -47,6 +47,8 @@ class Entry(object): + offset: Offset of entry within the section, None if not known yet (in + which case it will be calculated by Pack()) + size: Entry size in bytes, None if not known ++ pre_reset_size: size as it was before ResetForPack(). This allows us to ++ keep track of the size we started with and detect size changes + uncomp_size: Size of uncompressed data in bytes, if the entry is + compressed, else None + contents_size: Size of contents in bytes, 0 by default +@@ -71,6 +73,7 @@ class Entry(object): + self.name = node and (name_prefix + node.name) or 'none' + self.offset = None + self.size = None ++ self.pre_reset_size = None + self.uncomp_size = None + self.data = None + self.contents_size = 0 +@@ -314,6 +317,7 @@ class Entry(object): + self.Detail('ResetForPack: offset %s->%s, size %s->%s' % + (ToHex(self.offset), ToHex(self.orig_offset), + ToHex(self.size), ToHex(self.orig_size))) ++ self.pre_reset_size = self.size + self.offset = self.orig_offset + self.size = self.orig_size + +@@ -757,7 +761,10 @@ features to produce new behaviours. + True if the data did not result in a resize of this entry, False if + the entry must be resized + """ +- self.contents_size = self.size ++ if self.size is not None: ++ self.contents_size = self.size ++ else: ++ self.contents_size = self.pre_reset_size + ok = self.ProcessContentsUpdate(data) + self.Detail('WriteData: size=%x, ok=%s' % (len(data), ok)) + section_ok = self.section.WriteChildData(self) + +From patchwork Thu Oct 31 13:43:03 2019 +Content-Type: text/plain; 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Convert +then. + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + tools/binman/ftest.py | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py +index 88daaf20a8..5ca1c073f2 100644 +--- a/tools/binman/ftest.py ++++ b/tools/binman/ftest.py +@@ -2109,7 +2109,7 @@ class TestFunctional(unittest.TestCase): + data = self.data = self._DoReadFileRealDtb('115_fdtmap.dts') + fdtmap_data = data[len(U_BOOT_DATA):] + magic = fdtmap_data[:8] +- self.assertEqual('_FDTMAP_', magic) ++ self.assertEqual(b'_FDTMAP_', magic) + self.assertEqual(tools.GetBytes(0, 8), fdtmap_data[8:16]) + + fdt_data = fdtmap_data[16:] +@@ -2152,7 +2152,7 @@ class TestFunctional(unittest.TestCase): + dtb = fdt.Fdt.FromData(fdt_data) + fdt_size = dtb.GetFdtObj().totalsize() + hdr_data = data[-8:] +- self.assertEqual('BinM', hdr_data[:4]) ++ self.assertEqual(b'BinM', hdr_data[:4]) + offset = struct.unpack(' +X-Patchwork-Id: 1187499 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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I will investigate. + +Signed-off-by: Simon Glass +--- + +Changes in v2: +- Add a few more patches to correct remaining problems + + tools/binman/binman.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/binman/binman.py b/tools/binman/binman.py +index 8bd5868df2..9e6fd72117 100755 +--- a/tools/binman/binman.py ++++ b/tools/binman/binman.py +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python2 ++#!/usr/bin/env python3 + # SPDX-License-Identifier: GPL-2.0+ + + # Copyright (c) 2016 Google, Inc + +From patchwork Thu Oct 31 13:43:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1187495 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (no SPF record) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + 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s70sm539612ili.13.2019.10.31.06.43.39 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 31 Oct 2019 06:43:40 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Date: Thu, 31 Oct 2019 07:43:06 -0600 +Message-Id: <20191031134310.3072-17-sjg@chromium.org> +X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog +In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> +References: <20191031134310.3072-1-sjg@chromium.org> +MIME-Version: 1.0 +Cc: Tom Rini , Stephen Warren +Subject: [U-Boot] [PATCH v2 17/17] RRC: gitlab: Use Python 3 in virtualenv +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +This is a test to see if it removes the error here: + +https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/jobs/24304 + +Signed-off-by: Simon Glass +--- + +Changes in v2: None + + .gitlab-ci.yml | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml +index 9b295ac710..acbd1207c0 100644 +--- a/.gitlab-ci.yml ++++ b/.gitlab-ci.yml +@@ -73,7 +73,7 @@ build all 64bit ARM platforms: + tags: [ 'all' ] + stage: world build + script: +- - virtualenv /tmp/venv ++ - virtualenv -p /usr/bin/python3 /tmp/venv + - . /tmp/venv/bin/activate + - pip install pyelftools + - ret=0; +@@ -158,7 +158,7 @@ Run binman, buildman, dtoc and patman testsuites: + - git config --global user.name "GitLab CI Runner"; + git config --global user.email trini@konsulko.com; + export USER=gitlab; +- virtualenv /tmp/venv; ++ virtualenv -p /usr/bin/python3 /tmp/venv; + . /tmp/venv/bin/activate; + pip install pyelftools; + export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl; diff --git a/sources b/sources index 9e5e7fa..da03e28 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.10.tar.bz2) = d8e98fca4b6af8d49d20ec09beab16b77863fcee88cda3605cc14435de21030bf3ca5e7cf7d06e42d4c0f75279c7295ecd628d2b77666eff7b7fd50374e051fd +SHA512 (u-boot-2020.01-rc1.tar.bz2) = f376101af005423bbfdb20b1563662ef208fb2c2cac000a2796e67e90e17acd1f422f5e60ccaee8d7a4723faf306e254571dcc3222c32821ace3b379f83b6f09 diff --git a/tools-fix-version.h.patch b/tools-fix-version.h.patch new file mode 100644 index 0000000..1b65982 --- /dev/null +++ b/tools-fix-version.h.patch @@ -0,0 +1,35 @@ +From 097ce774b6739aa6a52e4d79e2920e3ef5af41d3 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 31 Oct 2019 09:19:23 +0000 +Subject: [PATCH] tools: fix version.h + +Signed-off-by: Peter Robinson +--- + Makefile | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/Makefile b/Makefile +index 58a5721b3d..7b40069d9f 100644 +--- a/Makefile ++++ b/Makefile +@@ -1848,14 +1848,14 @@ checkarmreloc: u-boot + false; \ + fi + +-tools/version.h: include/version.h ++version.h: include/version.h + $(call if_changed,copy) + +-envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h ++envtools: scripts_basic $(version_h) $(timestamp_h) version.h + $(Q)$(MAKE) $(build)=tools/env + + tools-only: export TOOLS_ONLY=y +-tools-only: scripts_basic $(version_h) $(timestamp_h) tools/version.h ++tools-only: scripts_basic $(version_h) $(timestamp_h) version.h + $(Q)$(MAKE) $(build)=tools + + tools-all: export HOST_TOOLS_ALL=y +-- +2.23.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 6e1968f..0377189 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc1 +%global candidate rc1 Name: uboot-tools -Version: 2019.10 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2020.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,33 +21,37 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -Patch5: usb-kbd-fixes.patch -Patch6: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch7: dragonboard-fixes.patch -Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch -Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch10: Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch -Patch11: Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch -Patch12: rockchip-rk3399-rock960-Update-config-for-TPL.patch -Patch13: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch -Patch14: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch +Patch4: usb-kbd-fixes.patch +Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch6: dragonboard-fixes.patch +Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch9: rockchip-rk3399-rock960-Update-config-for-TPL.patch +Patch10: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch +Patch11: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch +Patch12: fdt-Switch-to-the-latest-libfdt-sort-of.patch +Patch13: scripts-Convert-to-Python-3.patch +Patch14: tools-fix-version.h.patch BuildRequires: bc BuildRequires: dtc BuildRequires: make -# Added for .el7 rebuild, so newer gcc is used +# Requirements for building on el7 %if 0%{?rhel} == 7 BuildRequires: devtoolset-7-build BuildRequires: devtoolset-7-binutils BuildRequires: devtoolset-7-gcc +BuildRequires: python2-devel +BuildRequires: python3-setuptools +BuildRequires: python2-libfdt %else BuildRequires: gcc +BuildRequires: python3-devel +BuildRequires: python3-setuptools +BuildRequires: python3-libfdt %endif BuildRequires: flex bison BuildRequires: openssl-devel -BuildRequires: python2-devel -BuildRequires: python2-setuptools -#BuildRequires: python2-libfdt BuildRequires: SDL-devel BuildRequires: swig %ifarch %{arm} aarch64 @@ -93,7 +97,7 @@ u-boot bootloader binaries for armv7 boards cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 . -sed -i 's/python/python2/' arch/arm/mach-rockchip/make_fit_atf.py +sed -i 's/python/python3/' arch/arm/mach-rockchip/make_fit_atf.py %build mkdir builds @@ -264,6 +268,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Oct 30 2019 Peter Robinson 2020.01-0.1 +- 2020.01 RC1 +- Initial migration to python3 + * Wed Oct 9 2019 Peter Robinson 2019.10-2 - Fixes for Rockchips rk3328 and rk3399 platforms From e76bd0ca442ce59e821239112398d5fd81784d7e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 5 Nov 2019 23:21:02 +0000 Subject: [PATCH 049/351] build against ATF 2.2 --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 0377189..1ce36ed 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -268,6 +268,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Nov 5 2019 Peter Robinson 2020.01-0.2 +- Include new ATF 2.2 + * Wed Oct 30 2019 Peter Robinson 2020.01-0.1 - 2020.01 RC1 - Initial migration to python3 From 6e2ccb98b1c601b2b87f3e8ae866574b6d8b854c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 12 Nov 2019 09:33:51 +0000 Subject: [PATCH 050/351] 2020.01 RC2 --- ...rk3399-rock960-Update-config-for-TPL.patch | 20 +- ...399-move-the-u-boot-dm-pre-reloc-to-.patch | 174 + ...399-evb-move-u-boot-spl-boot-order-t.patch | 44 + ...399-firefly-move-u-boot-spl-boot-ord.patch | 43 + fdt-Switch-to-the-latest-libfdt-sort-of.patch | 3834 ---------------- ...-rk3328-rock64-Add-same-as-spl-order.patch | 108 - ...328-Fix-memory-instability-on-ROCK64.patch | 193 - scripts-Convert-to-Python-3.patch | 3889 ----------------- sources | 2 +- uboot-tools.spec | 16 +- 10 files changed, 280 insertions(+), 8043 deletions(-) rename rockchip-rk3399-rock960-Update-config-for-TPL.patch => 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch (76%) create mode 100644 0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch create mode 100644 0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch create mode 100644 0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch delete mode 100644 fdt-Switch-to-the-latest-libfdt-sort-of.patch delete mode 100644 rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch delete mode 100644 rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch delete mode 100644 scripts-Convert-to-Python-3.patch diff --git a/rockchip-rk3399-rock960-Update-config-for-TPL.patch b/0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch similarity index 76% rename from rockchip-rk3399-rock960-Update-config-for-TPL.patch rename to 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch index db838db..22b0ba8 100644 --- a/rockchip-rk3399-rock960-Update-config-for-TPL.patch +++ b/0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch @@ -1,7 +1,7 @@ -From d49e0341dcc96b9a33d59579fa9defaaa4b04d1c Mon Sep 17 00:00:00 2001 +From 28d382273445e8961fb8726aa5e78b3a47c60b7e Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 9 Oct 2019 12:15:10 +0100 -Subject: [PATCH] rockchip: rk3399: rock960: Update config for TPL +Date: Tue, 12 Nov 2019 09:15:21 +0000 +Subject: [PATCH 1/4] rockchip: rk3399: rock960: Update config for TPL The SPL is now running at SDRAM, and 0x10000 is used by BL31, and the ARM SPL do not support relocate now, we need reserved @@ -14,21 +14,19 @@ data to IRAM(The EMMC DMA can not transfer data to IRAM directly). Signed-off-by: Peter Robinson --- - configs/rock960-rk3399_defconfig | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) + configs/rock960-rk3399_defconfig | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index cb3c68db6b..f211a65587 100644 +index 0d6c55ce74..6dcea04b67 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig -@@ -2,19 +2,21 @@ CONFIG_ARM=y +@@ -2,18 +2,19 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ROCKCHIP_RK3399=y -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 -+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 CONFIG_TARGET_ROCK960_RK3399=y - CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y @@ -46,7 +44,7 @@ index cb3c68db6b..f211a65587 100644 CONFIG_SYS_PROMPT="rock960 => " CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y -@@ -56,4 +58,6 @@ CONFIG_USB_ETHER_ASIX88179=y +@@ -55,4 +56,6 @@ CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y @@ -54,5 +52,5 @@ index cb3c68db6b..f211a65587 100644 +CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y -- -2.21.0 +2.23.0 diff --git a/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch b/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch new file mode 100644 index 0000000..d0e4186 --- /dev/null +++ b/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch @@ -0,0 +1,174 @@ +From 230d1e7031d5b5ade3ce50b301fbd144d2fbdc12 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 9 Nov 2019 20:07:24 +0000 +Subject: [PATCH 2/4] rockchip: dts: rk3399: move the u-boot,dm-pre-reloc to + the u-boot.dtsi + +The u-boot specific pieces in the dts files should be in u-boot.dtsi +not the main files, this allows easier sync with upstream. The +rk3399.dtsi has a mix of both so move them all for consistency. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-u-boot.dtsi | 44 +++++++++++++++++++++++++++++++++ + arch/arm/dts/rk3399.dtsi | 11 --------- + 2 files changed, 44 insertions(+), 11 deletions(-) + +diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi +index 2738a3889e..410e9d452e 100644 +--- a/arch/arm/dts/rk3399-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-u-boot.dtsi +@@ -3,10 +3,46 @@ + * Copyright (C) 2019 Jagan Teki + */ + ++&cic { ++ u-boot,dm-pre-reloc; ++}; ++ ++&cru { ++ u-boot,dm-pre-reloc; ++}; ++ ++&dmc { ++ u-boot,dm-pre-reloc; ++}; ++ ++&grf { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pinctrl { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pmu { ++ u-boot,dm-pre-reloc; ++}; ++ + &pmu { + u-boot,dm-pre-reloc; + }; + ++&pmucru { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pmusgrf { ++ u-boot,dm-pre-reloc; ++}; ++ ++&sdhci { ++ u-boot,dm-pre-reloc; ++}; ++ + &sdmmc { + u-boot,dm-pre-reloc; + }; +@@ -22,3 +58,11 @@ + &uart2 { + u-boot,dm-pre-reloc; + }; ++ ++&vopb { ++ u-boot,dm-pre-reloc; ++}; ++ ++&vopl { ++ u-boot,dm-pre-reloc; ++}; +diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi +index b73442ee34..3f773b10f4 100644 +--- a/arch/arm/dts/rk3399.dtsi ++++ b/arch/arm/dts/rk3399.dtsi +@@ -275,7 +275,6 @@ + }; + + sdhci: sdhci@fe330000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; + reg = <0x0 0xfe330000 0x0 0x10000>; + interrupts = ; +@@ -1072,7 +1071,6 @@ + }; + + pmugrf: syscon@ff320000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd"; + reg = <0x0 0xff320000 0x0 0x1000>; + +@@ -1083,7 +1081,6 @@ + }; + + pmusgrf: syscon@ff330000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmusgrf", "syscon"; + reg = <0x0 0xff330000 0x0 0xe3d4>; + }; +@@ -1204,7 +1201,6 @@ + }; + + cic: syscon@ff620000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-cic", "syscon"; + reg = <0x0 0xff620000 0x0 0x100>; + }; +@@ -1219,7 +1215,6 @@ + }; + + dmc: dmc { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = ; +@@ -1268,7 +1263,6 @@ + }; + + pmucru: pmu-clock-controller@ff750000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmucru"; + reg = <0x0 0xff750000 0x0 0x1000>; + rockchip,grf = <&pmugrf>; +@@ -1279,7 +1273,6 @@ + }; + + cru: clock-controller@ff760000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-cru"; + reg = <0x0 0xff760000 0x0 0x1000>; + rockchip,grf = <&grf>; +@@ -1310,7 +1303,6 @@ + }; + + grf: syscon@ff770000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + reg = <0x0 0xff770000 0x0 0x10000>; + #address-cells = <1>; +@@ -1520,7 +1512,6 @@ + }; + + vopl: vop@ff8f0000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-vop-lit"; + reg = <0x0 0xff8f0000 0x0 0x3efc>; + interrupts = ; +@@ -1578,7 +1569,6 @@ + }; + + vopb: vop@ff900000 { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-vop-big"; + reg = <0x0 0xff900000 0x0 0x3efc>; + interrupts = ; +@@ -1818,7 +1808,6 @@ + }; + + pinctrl: pinctrl { +- u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pinctrl"; + rockchip,grf = <&grf>; + rockchip,pmu = <&pmugrf>; +-- +2.23.0 + diff --git a/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch b/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch new file mode 100644 index 0000000..51918e8 --- /dev/null +++ b/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch @@ -0,0 +1,44 @@ +From fa9f02cbd6a2baf48f76fc922e5f09755932962e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 9 Nov 2019 20:11:45 +0000 +Subject: [PATCH 3/4] rockchip: dts: rk3399-evb: move u-boot,spl-boot-order to + to the u-boot.dtsi + +The u-boot specific device tree directives should be in u-boot.dtsi + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-evb-u-boot.dtsi | 6 ++++++ + arch/arm/dts/rk3399-evb.dts | 2 -- + 2 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi +index 20910e744b..ccb33d34d1 100644 +--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi +@@ -5,3 +5,9 @@ + + #include "rk3399-u-boot.dtsi" + #include "rk3399-sdram-lpddr3-4GB-1600.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = &sdhci, &sdmmc; ++ }; ++}; +diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts +index a506e8da37..8e887f3a17 100644 +--- a/arch/arm/dts/rk3399-evb.dts ++++ b/arch/arm/dts/rk3399-evb.dts +@@ -15,8 +15,6 @@ + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = \ +- &sdhci, &sdmmc; + }; + + vdd_center: vdd-center { +-- +2.23.0 + diff --git a/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch b/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch new file mode 100644 index 0000000..8c19d40 --- /dev/null +++ b/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch @@ -0,0 +1,43 @@ +From e27784b9b8c96f46befa6d27a458e0e35d30ad81 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 9 Nov 2019 20:14:54 +0000 +Subject: [PATCH 4/4] rockchip: dts: rk3399-firefly: move u-boot,spl-boot-order + to to the u-boot.dtsi + +The u-boot specific device tree directives should be in u-boot.dtsi + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 ++++++ + arch/arm/dts/rk3399-firefly.dts | 1 - + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi +index 67b63a8352..38e0897db9 100644 +--- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi +@@ -5,3 +5,9 @@ + + #include "rk3399-u-boot.dtsi" + #include "rk3399-sdram-ddr3-1600.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ }; ++}; +diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts +index a4cb64f8bd..89c67fd24c 100644 +--- a/arch/arm/dts/rk3399-firefly.dts ++++ b/arch/arm/dts/rk3399-firefly.dts +@@ -14,7 +14,6 @@ + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; + + backlight: backlight { +-- +2.23.0 + diff --git a/fdt-Switch-to-the-latest-libfdt-sort-of.patch b/fdt-Switch-to-the-latest-libfdt-sort-of.patch deleted file mode 100644 index 00ea666..0000000 --- a/fdt-Switch-to-the-latest-libfdt-sort-of.patch +++ /dev/null @@ -1,3834 +0,0 @@ -From patchwork Sun Oct 27 15:47:39 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1185044 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; 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That file is just a placeholder in U-Boot and these sorts -of constants appear in the linux/kernel.h header instead. - -To keep libfdt happy, add INT32_MAX too. - -Signed-off-by: Simon Glass -Reviewed-by: Tom Rini ---- - - include/linux/kernel.h | 2 ++ - include/linux/libfdt_env.h | 1 + - 2 files changed, 3 insertions(+) - -diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index a85c15d8dc..5c7e5f635b 100644 ---- a/include/linux/kernel.h -+++ b/include/linux/kernel.h -@@ -37,6 +37,8 @@ - #define UINT32_MAX U32_MAX - #define UINT64_MAX U64_MAX - -+#define INT32_MAX S32_MAX -+ - #define STACK_MAGIC 0xdeadbeef - - #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) -diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h -index e2bf79c7ee..cca7792acd 100644 ---- a/include/linux/libfdt_env.h -+++ b/include/linux/libfdt_env.h -@@ -10,6 +10,7 @@ - #define LIBFDT_ENV_H - - #include -+#include - - #include - - -From patchwork Sun Oct 27 15:47:40 2019 -Content-Type: text/plain; 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When using unsigned or -unverified data this makes things safer, but it does add to code size. - -Add some controls to select the trade-off between safety and code size. - -Signed-off-by: Simon Glass -Reviewed-by: Tom Rini ---- - - lib/Kconfig | 33 +++++++++++++++++++++++++++++++++ - lib/libfdt/Makefile | 3 ++- - 2 files changed, 35 insertions(+), 1 deletion(-) - -diff --git a/lib/Kconfig b/lib/Kconfig -index 135f0b372b..b8a8509d72 100644 ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -464,6 +464,17 @@ config OF_LIBFDT - particular compatible nodes. The library operates on a flattened - version of the device tree. - -+config OF_LIBFDT_ASSUME_MASK -+ hex "Mask of conditions to assume for libfdt" -+ depends on OF_LIBFDT || FIT -+ default 0 -+ help -+ Use this to change the assumptions made by libfdt about the -+ device tree it is working with. A value of 0 means that no assumptions -+ are made, and libfdt is able to deal with malicious data. A value of -+ 0xff means all assumptions are made and any invalid data may cause -+ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h -+ - config OF_LIBFDT_OVERLAY - bool "Enable the FDT library overlay support" - depends on OF_LIBFDT -@@ -481,6 +492,17 @@ config SPL_OF_LIBFDT - particular compatible nodes. The library operates on a flattened - version of the device tree. - -+config SPL_OF_LIBFDT_ASSUME_MASK -+ hex "Mask of conditions to assume for libfdt" -+ depends on SPL_OF_LIBFDT || FIT -+ default 0xff -+ help -+ Use this to change the assumptions made by libfdt in SPL about the -+ device tree it is working with. A value of 0 means that no assumptions -+ are made, and libfdt is able to deal with malicious data. A value of -+ 0xff means all assumptions are made and any invalid data may cause -+ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h -+ - config TPL_OF_LIBFDT - bool "Enable the FDT library for TPL" - default y if TPL_OF_CONTROL -@@ -491,6 +513,17 @@ config TPL_OF_LIBFDT - particular compatible nodes. The library operates on a flattened - version of the device tree. - -+config TPL_OF_LIBFDT_ASSUME_MASK -+ hex "Mask of conditions to assume for libfdt" -+ depends on TPL_OF_LIBFDT || FIT -+ default 0xff -+ help -+ Use this to change the assumptions made by libfdt in TPL about the -+ device tree it is working with. A value of 0 means that no assumptions -+ are made, and libfdt is able to deal with malicious data. A value of -+ 0xff means all assumptions are made and any invalid data may cause -+ unsafe execution. See FDT_ASSUME_PERFECT, etc. in libfdt_internal.h -+ - config FDT_FIXUP_PARTITIONS - bool "overwrite MTD partitions in DTS through defined in 'mtdparts'" - depends on OF_LIBFDT -diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile -index ef5b6e29d4..5d3ae4e2f1 100644 ---- a/lib/libfdt/Makefile -+++ b/lib/libfdt/Makefile -@@ -22,4 +22,5 @@ obj-y += fdt_ro.o - # U-Boot own file - obj-y += fdt_region.o - --ccflags-y := -I$(srctree)/scripts/dtc/libfdt -+ccflags-y := -I$(srctree)/scripts/dtc/libfdt \ -+ -DFDT_ASSUME_MASK=$(CONFIG_$(SPL_TPL_)OF_LIBFDT_ASSUME_MASK) - -From patchwork Sun Oct 27 15:47:41 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1185043 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) - header.from=chromium.org -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (1024-bit key; - unprotected) header.d=chromium.org header.i=@chromium.org - header.b="Km3HLVFS"; dkim-atps=neutral -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 471Mj24GRjz9sP4 - for ; - Mon, 28 Oct 2019 02:49:10 +1100 (AEDT) -Received: by lists.denx.de (Postfix, from userid 105) - id 36A0FC21C57; Sun, 27 Oct 2019 15:48:15 +0000 (UTC) -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, - T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from lists.denx.de (localhost [IPv6:::1]) - by lists.denx.de (Postfix) with ESMTP id 91C75C21DCA; - Sun, 27 Oct 2019 15:48:08 +0000 (UTC) -Received: by lists.denx.de (Postfix, from userid 105) - id 10267C21C3F; Sun, 27 Oct 2019 15:48:00 +0000 (UTC) -Received: from mail-il1-f196.google.com (mail-il1-f196.google.com - [209.85.166.196]) - by lists.denx.de (Postfix) with ESMTPS id AA1EDC21DA1 - for ; Sun, 27 Oct 2019 15:47:57 +0000 (UTC) -Received: by mail-il1-f196.google.com with SMTP id m16so5828165iln.13 - for ; Sun, 27 Oct 2019 08:47:57 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; - s=google; - h=from:to:cc:subject:date:message-id:in-reply-to:references - :mime-version:content-transfer-encoding; - bh=f9j091HGp2Ydr+1kzeQuiITkGDV0YFlbsH5MDe99sOw=; - b=Km3HLVFSddKwc8pXuFSDPGBbjeCic5DMqZun5O47cczvgJrQ8LlBl4pfJ7xZcS7RTe - 9cYtAPvcvUIQD+txS2hu6LQEB2GDoNlhjct9vWfs6T8batEMjeAMwwH/AqRH3qpSoWzO - hUkcf8QeKggt4h+cxKR1Y0Zmn4bfvF661kIgw= -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=f9j091HGp2Ydr+1kzeQuiITkGDV0YFlbsH5MDe99sOw=; - b=Fm5OiEv6zUL01KoYQ4mkFScsuXMrLVlwryyMxdEAKhFJdSBOkz2VcDsri9tNswdYPW - 6YT3sCaSPxoDUogXTsc48bvaXllzt0HwrCYj2SablIG6WLwktx9pHD/vJ4C/bTNdXr1o - 5Ns4KgGryZopUQlPIKSxObBNm0AQ8k1LQC9xNxrMfeIgFtxcLrxYIPSa1uW+st3pktLy - 60WtvpFHfA5HLglASuSM2RlTdzqDlyVy6CZs+limrgusYDX6Rw6aoJoiA42DHlmO9INe - 1nYssZBcPTbovBLG0Kgms03H+kTKDKYghvdSjJP+exFdEpHPmdq5Ul9JImq0KH5ZC8HL - DSlA== -X-Gm-Message-State: APjAAAX1/R1KXBqSAQrU74E5Co3NNEI+5N+dPA+ePB0CmTwFnb3zXYM0 - kH/4417dmJiutIe0MVT3WiMiu1RoelGDag== -X-Google-Smtp-Source: APXvYqyido6MX2KqtrWHE9SmOQktkQVs0a3SjpTcVTVTqwoMM/gnKK0IfC2HT5Dfo5pfVjsPJE+aUQ== -X-Received: by 2002:a92:91d3:: with SMTP id e80mr16494307ill.77.1572191276379; - Sun, 27 Oct 2019 08:47:56 -0700 (PDT) -Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) - by smtp.gmail.com with ESMTPSA id - v10sm1105693ila.81.2019.10.27.08.47.55 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sun, 27 Oct 2019 08:47:56 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Sun, 27 Oct 2019 09:47:41 -0600 -Message-Id: <20191027154742.185672-4-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191027154742.185672-1-sjg@chromium.org> -References: <20191027154742.185672-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini , Soeren Moch -Subject: [U-Boot] [PATCH 3/4] mx6: tbs2910: Minimise libfdt code size -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This board appears to be very near its size limit and cannot accept the -new checking code in libfdt. Disable this code so this the board can -continue to build. - -Signed-off-by: Simon Glass ---- - - configs/tbs2910_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig -index 42e6f58eee..6d4d4c8f9f 100644 ---- a/configs/tbs2910_defconfig -+++ b/configs/tbs2910_defconfig -@@ -78,4 +78,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_I2C_EDID=y - CONFIG_VIDEO_IPUV3=y - CONFIG_VIDEO=y -+CONFIG_OF_LIBFDT_ASSUME_MASK=0xff - # CONFIG_EFI_LOADER is not set - -From patchwork Sun Oct 27 15:47:42 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1185048 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; 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-+ int olen; -+ const char *p = fdt_get_name(fdt, offset, &olen); - -- if (!p) -+ if (!p || (fdt_chk_extra() && olen < len)) - /* short match */ - return 0; - -@@ -34,46 +35,85 @@ static int _fdt_nodename_eq(const void *fdt, int offset, - return 0; - } - --const char *fdt_string(const void *fdt, int stroffset) --{ -- return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; --} -- --static int _fdt_string_eq(const void *fdt, int stroffset, -- const char *s, int len) -+const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) - { -- const char *p = fdt_string(fdt, stroffset); -+ int32_t totalsize; -+ uint32_t absoffset; -+ size_t len; -+ int err; -+ const char *s, *n; - -- return (strnlen(p, len + 1) == len) && (memcmp(p, s, len) == 0); --} -+ if (!fdt_chk_extra()) { -+ s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; - --uint32_t fdt_get_max_phandle(const void *fdt) --{ -- uint32_t max_phandle = 0; -- int offset; -+ if (lenp) -+ *lenp = strlen(s); -+ return s; -+ } -+ totalsize = fdt_ro_probe_(fdt); -+ err = totalsize; -+ if (totalsize < 0) -+ goto fail; -+ -+ err = -FDT_ERR_BADOFFSET; -+ absoffset = stroffset + fdt_off_dt_strings(fdt); -+ if (absoffset >= totalsize) -+ goto fail; -+ len = totalsize - absoffset; -+ -+ if (fdt_magic(fdt) == FDT_MAGIC) { -+ if (stroffset < 0) -+ goto fail; -+ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { -+ if (stroffset >= fdt_size_dt_strings(fdt)) -+ goto fail; -+ if ((fdt_size_dt_strings(fdt) - stroffset) < len) -+ len = fdt_size_dt_strings(fdt) - stroffset; -+ } -+ } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { -+ if ((stroffset >= 0) -+ || (stroffset < -fdt_size_dt_strings(fdt))) -+ goto fail; -+ if ((-stroffset) < len) -+ len = -stroffset; -+ } else { -+ err = -FDT_ERR_INTERNAL; -+ goto fail; -+ } - -- for (offset = fdt_next_node(fdt, -1, NULL);; -- offset = fdt_next_node(fdt, offset, NULL)) { -- uint32_t phandle; -+ s = (const char *)fdt + absoffset; -+ n = memchr(s, '\0', len); -+ if (!n) { -+ /* missing terminating NULL */ -+ err = -FDT_ERR_TRUNCATED; -+ goto fail; -+ } - -- if (offset == -FDT_ERR_NOTFOUND) -- return max_phandle; -+ if (lenp) -+ *lenp = n - s; -+ return s; - -- if (offset < 0) -- return (uint32_t)-1; -+fail: -+ if (lenp) -+ *lenp = err; -+ return NULL; -+} - -- phandle = fdt_get_phandle(fdt, offset); -- if (phandle == (uint32_t)-1) -- continue; -+const char *fdt_string(const void *fdt, int stroffset) -+{ -+ return fdt_get_string(fdt, stroffset, NULL); -+} - -- if (phandle > max_phandle) -- max_phandle = phandle; -- } -+static int fdt_string_eq_(const void *fdt, int stroffset, -+ const char *s, int len) -+{ -+ int slen; -+ const char *p = fdt_get_string(fdt, stroffset, &slen); - -- return 0; -+ return p && (slen == len) && (memcmp(p, s, len) == 0); - } - --int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+int fdt_find_max_phandle(const void *fdt, uint32_t *phandle) - { - uint32_t max = 0; - int offset = -1; -@@ -95,6 +135,21 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) - max = value; - } - -+ if (phandle) -+ *phandle = max; -+ -+ return 0; -+} -+ -+int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+{ -+ uint32_t max; -+ int err; -+ -+ err = fdt_find_max_phandle(fdt, &max); -+ if (err < 0) -+ return err; -+ - if (max == FDT_MAX_PHANDLE) - return -FDT_ERR_NOPHANDLES; - -@@ -104,24 +159,48 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) - return 0; - } - -+static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) -+{ -+ int offset = n * sizeof(struct fdt_reserve_entry); -+ int absoffset = fdt_off_mem_rsvmap(fdt) + offset; -+ -+ if (fdt_chk_extra()) { -+ if (absoffset < fdt_off_mem_rsvmap(fdt)) -+ return NULL; -+ if (absoffset > fdt_totalsize(fdt) - -+ sizeof(struct fdt_reserve_entry)) -+ return NULL; -+ } -+ return fdt_mem_rsv_(fdt, n); -+} -+ - int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) - { -- FDT_CHECK_HEADER(fdt); -- *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); -- *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); -+ const struct fdt_reserve_entry *re; -+ -+ FDT_RO_PROBE(fdt); -+ re = fdt_mem_rsv(fdt, n); -+ if (fdt_chk_extra() && !re) -+ return -FDT_ERR_BADOFFSET; -+ -+ *address = fdt64_ld(&re->address); -+ *size = fdt64_ld(&re->size); - return 0; - } - - int fdt_num_mem_rsv(const void *fdt) - { -- int i = 0; -+ int i; -+ const struct fdt_reserve_entry *re; - -- while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) -- i++; -- return i; -+ for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { -+ if (fdt64_ld(&re->size) == 0) -+ return i; -+ } -+ return -FDT_ERR_TRUNCATED; - } - --static int _nextprop(const void *fdt, int offset) -+static int nextprop_(const void *fdt, int offset) - { - uint32_t tag; - int nextoffset; -@@ -150,13 +229,13 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset, - { - int depth; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - for (depth = 0; - (offset >= 0) && (depth >= 0); - offset = fdt_next_node(fdt, offset, &depth)) - if ((depth == 1) -- && _fdt_nodename_eq(fdt, offset, name, namelen)) -+ && fdt_nodename_eq_(fdt, offset, name, namelen)) - return offset; - - if (depth < 0) -@@ -170,36 +249,17 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, - return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name)); - } - --/* -- * Find the next of path separator, note we need to search for both '/' and ':' -- * and then take the first one so that we do the right thing for e.g. -- * "foo/bar:option" and "bar:option/otheroption", both of which happen, so -- * first searching for either ':' or '/' does not work. -- */ --static const char *fdt_path_next_separator(const char *path, int len) --{ -- const void *sep1 = memchr(path, '/', len); -- const void *sep2 = memchr(path, ':', len); -- -- if (sep1 && sep2) -- return (sep1 < sep2) ? sep1 : sep2; -- else if (sep1) -- return sep1; -- else -- return sep2; --} -- - int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) - { - const char *end = path + namelen; - const char *p = path; - int offset = 0; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* see if we have an alias */ - if (*path != '/') { -- const char *q = fdt_path_next_separator(path, namelen); -+ const char *q = memchr(path, '/', end - p); - - if (!q) - q = end; -@@ -212,17 +272,16 @@ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) - p = q; - } - -- while (*p && (p < end)) { -+ while (p < end) { - const char *q; - -- while (*p == '/') -+ while (*p == '/') { - p++; -- -- if (*p == '\0' || *p == ':') -- return offset; -- -- q = fdt_path_next_separator(p, end - p); -- if (!q) -+ if (p == end) -+ return offset; -+ } -+ q = memchr(p, '/', end - p); -+ if (! q) - q = end; - - offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p); -@@ -243,16 +302,35 @@ int fdt_path_offset(const void *fdt, const char *path) - const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) - { - const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset); -+ const char *nameptr; - int err; - -- if (((err = fdt_check_header(fdt)) != 0) -- || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) -+ if (fdt_chk_extra() && -+ (((err = fdt_ro_probe_(fdt)) < 0) -+ || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) -+ goto fail; -+ -+ nameptr = nh->name; -+ -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { -+ /* -+ * For old FDT versions, match the naming conventions of V16: -+ * give only the leaf name (after all /). The actual tree -+ * contents are loosely checked. -+ */ -+ const char *leaf; -+ leaf = strrchr(nameptr, '/'); -+ if (leaf == NULL) { -+ err = -FDT_ERR_BADSTRUCTURE; - goto fail; -+ } -+ nameptr = leaf+1; -+ } - - if (len) -- *len = strlen(nh->name); -+ *len = strlen(nameptr); - -- return nh->name; -+ return nameptr; - - fail: - if (len) -@@ -267,7 +345,7 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset) - if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) - return offset; - -- return _nextprop(fdt, offset); -+ return nextprop_(fdt, offset); - } - - int fdt_next_property_offset(const void *fdt, int offset) -@@ -275,17 +353,17 @@ int fdt_next_property_offset(const void *fdt, int offset) - if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0) - return offset; - -- return _nextprop(fdt, offset); -+ return nextprop_(fdt, offset); - } - --const struct fdt_property *fdt_get_property_by_offset(const void *fdt, -- int offset, -- int *lenp) -+static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, -+ int offset, -+ int *lenp) - { - int err; - const struct fdt_property *prop; - -- if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { -+ if (fdt_chk_basic() && (err = fdt_check_prop_offset_(fdt, offset)) < 0) { - if (lenp) - *lenp = err; - return NULL; -@@ -294,28 +372,50 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, - prop = fdt_offset_ptr_(fdt, offset); - - if (lenp) -- *lenp = fdt32_to_cpu(prop->len); -+ *lenp = fdt32_ld(&prop->len); - - return prop; - } - --const struct fdt_property *fdt_get_property_namelen(const void *fdt, -- int offset, -- const char *name, -- int namelen, int *lenp) -+const struct fdt_property *fdt_get_property_by_offset(const void *fdt, -+ int offset, -+ int *lenp) -+{ -+ /* Prior to version 16, properties may need realignment -+ * and this API does not work. fdt_getprop_*() will, however. */ -+ -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { -+ if (lenp) -+ *lenp = -FDT_ERR_BADVERSION; -+ return NULL; -+ } -+ -+ return fdt_get_property_by_offset_(fdt, offset, lenp); -+} -+ -+static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, -+ int offset, -+ const char *name, -+ int namelen, -+ int *lenp, -+ int *poffset) - { - for (offset = fdt_first_property_offset(fdt, offset); - (offset >= 0); - (offset = fdt_next_property_offset(fdt, offset))) { - const struct fdt_property *prop; - -- if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) { -+ prop = fdt_get_property_by_offset_(fdt, offset, lenp); -+ if (fdt_chk_extra() && !prop) { - offset = -FDT_ERR_INTERNAL; - break; - } -- if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff), -- name, namelen)) -+ if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff), -+ name, namelen)) { -+ if (poffset) -+ *poffset = offset; - return prop; -+ } - } - - if (lenp) -@@ -323,6 +423,25 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, - return NULL; - } - -+ -+const struct fdt_property *fdt_get_property_namelen(const void *fdt, -+ int offset, -+ const char *name, -+ int namelen, int *lenp) -+{ -+ /* Prior to version 16, properties may need realignment -+ * and this API does not work. fdt_getprop_*() will, however. */ -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { -+ if (lenp) -+ *lenp = -FDT_ERR_BADVERSION; -+ return NULL; -+ } -+ -+ return fdt_get_property_namelen_(fdt, offset, name, namelen, lenp, -+ NULL); -+} -+ -+ - const struct fdt_property *fdt_get_property(const void *fdt, - int nodeoffset, - const char *name, int *lenp) -@@ -334,12 +453,18 @@ const struct fdt_property *fdt_get_property(const void *fdt, - const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, - const char *name, int namelen, int *lenp) - { -+ int poffset; - const struct fdt_property *prop; - -- prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp); -+ prop = fdt_get_property_namelen_(fdt, nodeoffset, name, namelen, lenp, -+ &poffset); - if (!prop) - return NULL; - -+ /* Handle realignment */ -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && -+ (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) -+ return prop->data + 4; - return prop->data; - } - -@@ -348,11 +473,31 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, - { - const struct fdt_property *prop; - -- prop = fdt_get_property_by_offset(fdt, offset, lenp); -+ prop = fdt_get_property_by_offset_(fdt, offset, lenp); - if (!prop) - return NULL; -- if (namep) -- *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); -+ if (namep) { -+ const char *name; -+ int namelen; -+ -+ if (fdt_chk_extra()) { -+ name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff), -+ &namelen); -+ if (!name) { -+ if (lenp) -+ *lenp = namelen; -+ return NULL; -+ } -+ *namep = name; -+ } else { -+ *namep = fdt_string(fdt, fdt32_ld(&prop->nameoff)); -+ } -+ } -+ -+ /* Handle realignment */ -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && -+ (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) -+ return prop->data + 4; - return prop->data; - } - -@@ -376,7 +521,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) - return 0; - } - -- return fdt32_to_cpu(*php); -+ return fdt32_ld(php); - } - - const char *fdt_get_alias_namelen(const void *fdt, -@@ -402,7 +547,7 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) - int offset, depth, namelen; - const char *name; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - if (buflen < 2) - return -FDT_ERR_NOSPACE; -@@ -454,7 +599,7 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, - int offset, depth; - int supernodeoffset = -FDT_ERR_INTERNAL; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - if (supernodedepth < 0) - return -FDT_ERR_NOTFOUND; -@@ -476,10 +621,12 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, - } - } - -- if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) -- return -FDT_ERR_BADOFFSET; -- else if (offset == -FDT_ERR_BADOFFSET) -- return -FDT_ERR_BADSTRUCTURE; -+ if (fdt_chk_extra()) { -+ if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) -+ return -FDT_ERR_BADOFFSET; -+ else if (offset == -FDT_ERR_BADOFFSET) -+ return -FDT_ERR_BADSTRUCTURE; -+ } - - return offset; /* error from fdt_next_node() */ - } -@@ -491,7 +638,7 @@ int fdt_node_depth(const void *fdt, int nodeoffset) - - err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); - if (err) -- return (err < 0) ? err : -FDT_ERR_INTERNAL; -+ return (!fdt_chk_extra() || err < 0) ? err : -FDT_ERR_INTERNAL; - return nodedepth; - } - -@@ -513,7 +660,7 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, - const void *val; - int len; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_getprop(), then if that didn't -@@ -539,7 +686,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) - if ((phandle == 0) || (phandle == -1)) - return -FDT_ERR_BADPHANDLE; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we - * potentially scan each property of a node in -@@ -692,7 +839,7 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, - { - int offset, err; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_node_check_compatible(), then if -@@ -711,3 +858,68 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, - - return offset; /* error from fdt_next_node() */ - } -+ -+#if !defined(CHECK_LEVEL) || CHECK_LEVEL > 0 -+int fdt_check_full(const void *fdt, size_t bufsize) -+{ -+ int err; -+ int num_memrsv; -+ int offset, nextoffset = 0; -+ uint32_t tag; -+ unsigned depth = 0; -+ const void *prop; -+ const char *propname; -+ -+ if (bufsize < FDT_V1_SIZE) -+ return -FDT_ERR_TRUNCATED; -+ err = fdt_check_header(fdt); -+ if (err != 0) -+ return err; -+ if (bufsize < fdt_totalsize(fdt)) -+ return -FDT_ERR_TRUNCATED; -+ -+ num_memrsv = fdt_num_mem_rsv(fdt); -+ if (num_memrsv < 0) -+ return num_memrsv; -+ -+ while (1) { -+ offset = nextoffset; -+ tag = fdt_next_tag(fdt, offset, &nextoffset); -+ -+ if (nextoffset < 0) -+ return nextoffset; -+ -+ switch (tag) { -+ case FDT_NOP: -+ break; -+ -+ case FDT_END: -+ if (depth != 0) -+ return -FDT_ERR_BADSTRUCTURE; -+ return 0; -+ -+ case FDT_BEGIN_NODE: -+ depth++; -+ if (depth > INT_MAX) -+ return -FDT_ERR_BADSTRUCTURE; -+ break; -+ -+ case FDT_END_NODE: -+ if (depth == 0) -+ return -FDT_ERR_BADSTRUCTURE; -+ depth--; -+ break; -+ -+ case FDT_PROP: -+ prop = fdt_getprop_by_offset(fdt, offset, &propname, -+ &err); -+ if (!prop) -+ return err; -+ break; -+ -+ default: -+ return -FDT_ERR_INTERNAL; -+ } -+ } -+} -+#endif -diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt -index 098b3f36e6..e54639738c 100644 ---- a/scripts/dtc/libfdt/Makefile.libfdt -+++ b/scripts/dtc/libfdt/Makefile.libfdt -@@ -1,3 +1,4 @@ -+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - # Makefile.libfdt - # - # This is not a complete Makefile of itself. Instead, it is designed to -@@ -9,3 +10,9 @@ LIBFDT_VERSION = version.lds - LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \ - fdt_addresses.c fdt_overlay.c - LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o) -+LIBFDT_LIB = libfdt-$(DTC_VERSION).$(SHAREDLIB_EXT) -+ -+libfdt_clean: -+ @$(VECHO) CLEAN "(libfdt)" -+ rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%) -+ rm -f $(LIBFDT_dir)/$(LIBFDT_soname) -diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c -index 7855a17877..8e4cce3b9b 100644 ---- a/scripts/dtc/libfdt/fdt.c -+++ b/scripts/dtc/libfdt/fdt.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -55,14 +10,24 @@ - - #include "libfdt_internal.h" - --int fdt_check_header(const void *fdt) -+/* -+ * Minimal sanity check for a read-only tree. fdt_ro_probe_() checks -+ * that the given buffer contains what appears to be a flattened -+ * device tree with sane information in its header. -+ */ -+int32_t fdt_ro_probe_(const void *fdt) - { -+ uint32_t totalsize = fdt_totalsize(fdt); -+ - if (fdt_magic(fdt) == FDT_MAGIC) { - /* Complete tree */ -- if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) -- return -FDT_ERR_BADVERSION; -- if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION) -- return -FDT_ERR_BADVERSION; -+ if (fdt_chk_version()) { -+ if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) -+ return -FDT_ERR_BADVERSION; -+ if (fdt_last_comp_version(fdt) > -+ FDT_LAST_SUPPORTED_VERSION) -+ return -FDT_ERR_BADVERSION; -+ } - } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { - /* Unfinished sequential-write blob */ - if (fdt_size_dt_struct(fdt) == 0) -@@ -71,6 +36,96 @@ int fdt_check_header(const void *fdt) - return -FDT_ERR_BADMAGIC; - } - -+ if (totalsize < INT32_MAX) -+ return totalsize; -+ else -+ return -FDT_ERR_TRUNCATED; -+} -+ -+static int check_off_(uint32_t hdrsize, uint32_t totalsize, uint32_t off) -+{ -+ return (off >= hdrsize) && (off <= totalsize); -+} -+ -+static int check_block_(uint32_t hdrsize, uint32_t totalsize, -+ uint32_t base, uint32_t size) -+{ -+ if (!check_off_(hdrsize, totalsize, base)) -+ return 0; /* block start out of bounds */ -+ if ((base + size) < base) -+ return 0; /* overflow */ -+ if (!check_off_(hdrsize, totalsize, base + size)) -+ return 0; /* block end out of bounds */ -+ return 1; -+} -+ -+size_t fdt_header_size_(uint32_t version) -+{ -+ if (version <= 1) -+ return FDT_V1_SIZE; -+ else if (version <= 2) -+ return FDT_V2_SIZE; -+ else if (version <= 3) -+ return FDT_V3_SIZE; -+ else if (version <= 16) -+ return FDT_V16_SIZE; -+ else -+ return FDT_V17_SIZE; -+} -+ -+size_t fdt_header_size(const void *fdt) -+{ -+ return fdt_chk_version() ? fdt_header_size_(fdt_version(fdt)) : -+ FDT_V17_SIZE; -+} -+ -+int fdt_check_header(const void *fdt) -+{ -+ size_t hdrsize; -+ -+ if (fdt_magic(fdt) != FDT_MAGIC) -+ return -FDT_ERR_BADMAGIC; -+ if (fdt_chk_version()) { -+ if ((fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) -+ || (fdt_last_comp_version(fdt) > -+ FDT_LAST_SUPPORTED_VERSION)) -+ return -FDT_ERR_BADVERSION; -+ if (fdt_version(fdt) < fdt_last_comp_version(fdt)) -+ return -FDT_ERR_BADVERSION; -+ } -+ hdrsize = fdt_header_size(fdt); -+ if (fdt_chk_basic()) { -+ -+ if ((fdt_totalsize(fdt) < hdrsize) -+ || (fdt_totalsize(fdt) > INT_MAX)) -+ return -FDT_ERR_TRUNCATED; -+ -+ /* Bounds check memrsv block */ -+ if (!check_off_(hdrsize, fdt_totalsize(fdt), -+ fdt_off_mem_rsvmap(fdt))) -+ return -FDT_ERR_TRUNCATED; -+ } -+ -+ if (fdt_chk_extra()) { -+ /* Bounds check structure block */ -+ if (fdt_chk_version() && fdt_version(fdt) < 17) { -+ if (!check_off_(hdrsize, fdt_totalsize(fdt), -+ fdt_off_dt_struct(fdt))) -+ return -FDT_ERR_TRUNCATED; -+ } else { -+ if (!check_block_(hdrsize, fdt_totalsize(fdt), -+ fdt_off_dt_struct(fdt), -+ fdt_size_dt_struct(fdt))) -+ return -FDT_ERR_TRUNCATED; -+ } -+ -+ /* Bounds check strings block */ -+ if (!check_block_(hdrsize, fdt_totalsize(fdt), -+ fdt_off_dt_strings(fdt), -+ fdt_size_dt_strings(fdt))) -+ return -FDT_ERR_TRUNCATED; -+ } -+ - return 0; - } - -@@ -78,12 +133,13 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) - { - unsigned absoffset = offset + fdt_off_dt_struct(fdt); - -- if ((absoffset < offset) -- || ((absoffset + len) < absoffset) -- || (absoffset + len) > fdt_totalsize(fdt)) -- return NULL; -+ if (fdt_chk_basic()) -+ if ((absoffset < offset) -+ || ((absoffset + len) < absoffset) -+ || (absoffset + len) > fdt_totalsize(fdt)) -+ return NULL; - -- if (fdt_version(fdt) >= 0x11) -+ if (!fdt_chk_version() || fdt_version(fdt) >= 0x11) - if (((offset + len) < offset) - || ((offset + len) > fdt_size_dt_struct(fdt))) - return NULL; -@@ -100,7 +156,7 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) - - *nextoffset = -FDT_ERR_TRUNCATED; - tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); -- if (!tagp) -+ if (fdt_chk_basic() && !tagp) - return FDT_END; /* premature end */ - tag = fdt32_to_cpu(*tagp); - offset += FDT_TAGSIZE; -@@ -112,18 +168,19 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) - do { - p = fdt_offset_ptr(fdt, offset++, 1); - } while (p && (*p != '\0')); -- if (!p) -+ if (fdt_chk_basic() && !p) - return FDT_END; /* premature end */ - break; - - case FDT_PROP: - lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); -- if (!lenp) -+ if (fdt_chk_basic() && !lenp) - return FDT_END; /* premature end */ - /* skip-name offset, length and value */ - offset += sizeof(struct fdt_property) - FDT_TAGSIZE - + fdt32_to_cpu(*lenp); -- if (fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && -+ if (fdt_chk_version() && -+ fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && - ((offset - fdt32_to_cpu(*lenp)) % 8) != 0) - offset += 4; - break; -@@ -137,7 +194,8 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) - return FDT_END; - } - -- if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset)) -+ if (fdt_chk_basic() && -+ !fdt_offset_ptr(fdt, startoffset, offset - startoffset)) - return FDT_END; /* premature end */ - - *nextoffset = FDT_TAGALIGN(offset); -@@ -244,7 +302,7 @@ const char *fdt_find_string_(const char *strtab, int tabsize, const char *s) - - int fdt_move(const void *fdt, void *buf, int bufsize) - { -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - if (fdt_totalsize(fdt) > bufsize) - return -FDT_ERR_NOSPACE; -diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h -index 74961f9026..f2e68807f2 100644 ---- a/scripts/dtc/libfdt/fdt.h -+++ b/scripts/dtc/libfdt/fdt.h -@@ -1,55 +1,10 @@ -+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ - #ifndef FDT_H - #define FDT_H - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. - * Copyright 2012 Kim Phillips, Freescale Semiconductor. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - #ifndef __ASSEMBLY__ -diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c -index 788c143113..9a82cd0ba2 100644 ---- a/scripts/dtc/libfdt/fdt_addresses.c -+++ b/scripts/dtc/libfdt/fdt_addresses.c -@@ -1,53 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2014 David Gibson - * Copyright (C) 2018 embedded brains GmbH -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -97,3 +52,50 @@ int fdt_size_cells(const void *fdt, int nodeoffset) - return 1; - return val; - } -+ -+/* This function assumes that [address|size]_cells is 1 or 2 */ -+int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, -+ const char *name, uint64_t addr, uint64_t size) -+{ -+ int addr_cells, size_cells, ret; -+ uint8_t data[sizeof(fdt64_t) * 2], *prop; -+ -+ ret = fdt_address_cells(fdt, parent); -+ if (ret < 0) -+ return ret; -+ addr_cells = ret; -+ -+ ret = fdt_size_cells(fdt, parent); -+ if (ret < 0) -+ return ret; -+ size_cells = ret; -+ -+ /* check validity of address */ -+ prop = data; -+ if (addr_cells == 1) { -+ if ((addr > UINT32_MAX) || ((UINT32_MAX + 1 - addr) < size)) -+ return -FDT_ERR_BADVALUE; -+ -+ fdt32_st(prop, (uint32_t)addr); -+ } else if (addr_cells == 2) { -+ fdt64_st(prop, addr); -+ } else { -+ return -FDT_ERR_BADNCELLS; -+ } -+ -+ /* check validity of size */ -+ prop += addr_cells * sizeof(fdt32_t); -+ if (size_cells == 1) { -+ if (size > UINT32_MAX) -+ return -FDT_ERR_BADVALUE; -+ -+ fdt32_st(prop, (uint32_t)size); -+ } else if (size_cells == 2) { -+ fdt64_st(prop, size); -+ } else { -+ return -FDT_ERR_BADNCELLS; -+ } -+ -+ return fdt_appendprop(fdt, nodeoffset, name, data, -+ (addr_cells + size_cells) * sizeof(fdt32_t)); -+} -diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c -index f2ae9b77c2..49d54d44b8 100644 ---- a/scripts/dtc/libfdt/fdt_empty_tree.c -+++ b/scripts/dtc/libfdt/fdt_empty_tree.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2012 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c -index bf75388ec9..be71873366 100644 ---- a/scripts/dtc/libfdt/fdt_overlay.c -+++ b/scripts/dtc/libfdt/fdt_overlay.c -@@ -1,53 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2016 Free Electrons - * Copyright (C) 2016 NextThing Co. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -93,11 +48,11 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment) - * @pathp: pointer which receives the path of the target (or NULL) - * - * overlay_get_target() retrieves the target offset in the base -- * device tree of a fragment, no matter how the actual targetting is -+ * device tree of a fragment, no matter how the actual targeting is - * done (through a phandle or a path) - * - * returns: -- * the targetted node offset in the base device tree -+ * the targeted node offset in the base device tree - * Negative error code on error - */ - static int overlay_get_target(const void *fdt, const void *fdto, -@@ -697,7 +652,7 @@ static int get_path_len(const void *fdt, int nodeoffset) - int len = 0, namelen; - const char *name; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - for (;;) { - name = fdt_get_name(fdt, nodeoffset, &namelen); -@@ -778,26 +733,36 @@ static int overlay_symbol_update(void *fdt, void *fdto) - /* keep end marker to avoid strlen() */ - e = path + path_len; - -- /* format: //__overlay__/ */ -- - if (*path != '/') - return -FDT_ERR_BADVALUE; - - /* get fragment name first */ - s = strchr(path + 1, '/'); -- if (!s) -- return -FDT_ERR_BADOVERLAY; -+ if (!s) { -+ /* Symbol refers to something that won't end -+ * up in the target tree */ -+ continue; -+ } - - frag_name = path + 1; - frag_name_len = s - path - 1; - - /* verify format; safe since "s" lies in \0 terminated prop */ - len = sizeof("/__overlay__/") - 1; -- if ((e - s) < len || memcmp(s, "/__overlay__/", len)) -- return -FDT_ERR_BADOVERLAY; -- -- rel_path = s + len; -- rel_path_len = e - rel_path; -+ if ((e - s) > len && (memcmp(s, "/__overlay__/", len) == 0)) { -+ /* //__overlay__/ */ -+ rel_path = s + len; -+ rel_path_len = e - rel_path; -+ } else if ((e - s) == len -+ && (memcmp(s, "/__overlay__", len - 1) == 0)) { -+ /* //__overlay__ */ -+ rel_path = ""; -+ rel_path_len = 0; -+ } else { -+ /* Symbol refers to something that won't end -+ * up in the target tree */ -+ continue; -+ } - - /* find the fragment index in which the symbol lies */ - ret = fdt_subnode_offset_namelen(fdto, 0, frag_name, -@@ -863,11 +828,15 @@ static int overlay_symbol_update(void *fdt, void *fdto) - - int fdt_overlay_apply(void *fdt, void *fdto) - { -- uint32_t delta = fdt_get_max_phandle(fdt); -+ uint32_t delta; - int ret; - -- FDT_CHECK_HEADER(fdt); -- FDT_CHECK_HEADER(fdto); -+ FDT_RO_PROBE(fdt); -+ FDT_RO_PROBE(fdto); -+ -+ ret = fdt_find_max_phandle(fdt, &delta); -+ if (ret) -+ goto err; - - ret = overlay_adjust_local_phandles(fdto, delta); - if (ret) -diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c -index dc499884e4..e398815485 100644 ---- a/scripts/dtc/libfdt/fdt_ro.c -+++ b/scripts/dtc/libfdt/fdt_ro.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -61,7 +16,7 @@ static int fdt_nodename_eq_(const void *fdt, int offset, - int olen; - const char *p = fdt_get_name(fdt, offset, &olen); - -- if (!p || olen < len) -+ if (!p || (fdt_chk_extra() && olen < len)) - /* short match */ - return 0; - -@@ -76,46 +31,85 @@ static int fdt_nodename_eq_(const void *fdt, int offset, - return 0; - } - --const char *fdt_string(const void *fdt, int stroffset) --{ -- return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; --} -- --static int fdt_string_eq_(const void *fdt, int stroffset, -- const char *s, int len) -+const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) - { -- const char *p = fdt_string(fdt, stroffset); -+ int32_t totalsize; -+ uint32_t absoffset; -+ size_t len; -+ int err; -+ const char *s, *n; - -- return (strlen(p) == len) && (memcmp(p, s, len) == 0); --} -+ if (!fdt_chk_extra()) { -+ s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; - --uint32_t fdt_get_max_phandle(const void *fdt) --{ -- uint32_t max_phandle = 0; -- int offset; -+ if (lenp) -+ *lenp = strlen(s); -+ return s; -+ } -+ totalsize = fdt_ro_probe_(fdt); -+ err = totalsize; -+ if (totalsize < 0) -+ goto fail; -+ -+ err = -FDT_ERR_BADOFFSET; -+ absoffset = stroffset + fdt_off_dt_strings(fdt); -+ if (absoffset >= totalsize) -+ goto fail; -+ len = totalsize - absoffset; -+ -+ if (fdt_magic(fdt) == FDT_MAGIC) { -+ if (stroffset < 0) -+ goto fail; -+ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { -+ if (stroffset >= fdt_size_dt_strings(fdt)) -+ goto fail; -+ if ((fdt_size_dt_strings(fdt) - stroffset) < len) -+ len = fdt_size_dt_strings(fdt) - stroffset; -+ } -+ } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { -+ if ((stroffset >= 0) -+ || (stroffset < -fdt_size_dt_strings(fdt))) -+ goto fail; -+ if ((-stroffset) < len) -+ len = -stroffset; -+ } else { -+ err = -FDT_ERR_INTERNAL; -+ goto fail; -+ } - -- for (offset = fdt_next_node(fdt, -1, NULL);; -- offset = fdt_next_node(fdt, offset, NULL)) { -- uint32_t phandle; -+ s = (const char *)fdt + absoffset; -+ n = memchr(s, '\0', len); -+ if (!n) { -+ /* missing terminating NULL */ -+ err = -FDT_ERR_TRUNCATED; -+ goto fail; -+ } - -- if (offset == -FDT_ERR_NOTFOUND) -- return max_phandle; -+ if (lenp) -+ *lenp = n - s; -+ return s; - -- if (offset < 0) -- return (uint32_t)-1; -+fail: -+ if (lenp) -+ *lenp = err; -+ return NULL; -+} - -- phandle = fdt_get_phandle(fdt, offset); -- if (phandle == (uint32_t)-1) -- continue; -+const char *fdt_string(const void *fdt, int stroffset) -+{ -+ return fdt_get_string(fdt, stroffset, NULL); -+} - -- if (phandle > max_phandle) -- max_phandle = phandle; -- } -+static int fdt_string_eq_(const void *fdt, int stroffset, -+ const char *s, int len) -+{ -+ int slen; -+ const char *p = fdt_get_string(fdt, stroffset, &slen); - -- return 0; -+ return p && (slen == len) && (memcmp(p, s, len) == 0); - } - --int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+int fdt_find_max_phandle(const void *fdt, uint32_t *phandle) - { - uint32_t max = 0; - int offset = -1; -@@ -137,6 +131,21 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) - max = value; - } - -+ if (phandle) -+ *phandle = max; -+ -+ return 0; -+} -+ -+int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -+{ -+ uint32_t max; -+ int err; -+ -+ err = fdt_find_max_phandle(fdt, &max); -+ if (err < 0) -+ return err; -+ - if (max == FDT_MAX_PHANDLE) - return -FDT_ERR_NOPHANDLES; - -@@ -146,21 +155,45 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) - return 0; - } - -+static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) -+{ -+ int offset = n * sizeof(struct fdt_reserve_entry); -+ int absoffset = fdt_off_mem_rsvmap(fdt) + offset; -+ -+ if (fdt_chk_extra()) { -+ if (absoffset < fdt_off_mem_rsvmap(fdt)) -+ return NULL; -+ if (absoffset > fdt_totalsize(fdt) - -+ sizeof(struct fdt_reserve_entry)) -+ return NULL; -+ } -+ return fdt_mem_rsv_(fdt, n); -+} -+ - int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) - { -- FDT_CHECK_HEADER(fdt); -- *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); -- *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); -+ const struct fdt_reserve_entry *re; -+ -+ FDT_RO_PROBE(fdt); -+ re = fdt_mem_rsv(fdt, n); -+ if (fdt_chk_extra() && !re) -+ return -FDT_ERR_BADOFFSET; -+ -+ *address = fdt64_ld(&re->address); -+ *size = fdt64_ld(&re->size); - return 0; - } - - int fdt_num_mem_rsv(const void *fdt) - { -- int i = 0; -+ int i; -+ const struct fdt_reserve_entry *re; - -- while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) -- i++; -- return i; -+ for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { -+ if (fdt64_ld(&re->size) == 0) -+ return i; -+ } -+ return -FDT_ERR_TRUNCATED; - } - - static int nextprop_(const void *fdt, int offset) -@@ -192,7 +225,7 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset, - { - int depth; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - for (depth = 0; - (offset >= 0) && (depth >= 0); -@@ -218,7 +251,7 @@ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) - const char *p = path; - int offset = 0; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* see if we have an alias */ - if (*path != '/') { -@@ -268,13 +301,14 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) - const char *nameptr; - int err; - -- if (((err = fdt_check_header(fdt)) != 0) -- || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) -- goto fail; -+ if (fdt_chk_extra() && -+ (((err = fdt_ro_probe_(fdt)) < 0) -+ || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) -+ goto fail; - - nameptr = nh->name; - -- if (fdt_version(fdt) < 0x10) { -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - /* - * For old FDT versions, match the naming conventions of V16: - * give only the leaf name (after all /). The actual tree -@@ -325,7 +359,7 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, - int err; - const struct fdt_property *prop; - -- if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { -+ if (fdt_chk_basic() && (err = fdt_check_prop_offset_(fdt, offset)) < 0) { - if (lenp) - *lenp = err; - return NULL; -@@ -334,7 +368,7 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, - prop = fdt_offset_ptr_(fdt, offset); - - if (lenp) -- *lenp = fdt32_to_cpu(prop->len); -+ *lenp = fdt32_ld(&prop->len); - - return prop; - } -@@ -346,7 +380,7 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, - /* Prior to version 16, properties may need realignment - * and this API does not work. fdt_getprop_*() will, however. */ - -- if (fdt_version(fdt) < 0x10) { -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - if (lenp) - *lenp = -FDT_ERR_BADVERSION; - return NULL; -@@ -367,11 +401,12 @@ static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, - (offset = fdt_next_property_offset(fdt, offset))) { - const struct fdt_property *prop; - -- if (!(prop = fdt_get_property_by_offset_(fdt, offset, lenp))) { -+ prop = fdt_get_property_by_offset_(fdt, offset, lenp); -+ if (fdt_chk_extra() && !prop) { - offset = -FDT_ERR_INTERNAL; - break; - } -- if (fdt_string_eq_(fdt, fdt32_to_cpu(prop->nameoff), -+ if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff), - name, namelen)) { - if (poffset) - *poffset = offset; -@@ -392,7 +427,7 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, - { - /* Prior to version 16, properties may need realignment - * and this API does not work. fdt_getprop_*() will, however. */ -- if (fdt_version(fdt) < 0x10) { -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - if (lenp) - *lenp = -FDT_ERR_BADVERSION; - return NULL; -@@ -423,8 +458,8 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, - return NULL; - - /* Handle realignment */ -- if (fdt_version(fdt) < 0x10 && (poffset + sizeof(*prop)) % 8 && -- fdt32_to_cpu(prop->len) >= 8) -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && -+ (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) - return prop->data + 4; - return prop->data; - } -@@ -437,12 +472,27 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, - prop = fdt_get_property_by_offset_(fdt, offset, lenp); - if (!prop) - return NULL; -- if (namep) -- *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); -+ if (namep) { -+ const char *name; -+ int namelen; -+ -+ if (fdt_chk_extra()) { -+ name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff), -+ &namelen); -+ if (!name) { -+ if (lenp) -+ *lenp = namelen; -+ return NULL; -+ } -+ *namep = name; -+ } else { -+ *namep = fdt_string(fdt, fdt32_ld(&prop->nameoff)); -+ } -+ } - - /* Handle realignment */ -- if (fdt_version(fdt) < 0x10 && (offset + sizeof(*prop)) % 8 && -- fdt32_to_cpu(prop->len) >= 8) -+ if (fdt_chk_version() && fdt_version(fdt) < 0x10 && -+ (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) - return prop->data + 4; - return prop->data; - } -@@ -467,7 +517,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) - return 0; - } - -- return fdt32_to_cpu(*php); -+ return fdt32_ld(php); - } - - const char *fdt_get_alias_namelen(const void *fdt, -@@ -493,7 +543,7 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) - int offset, depth, namelen; - const char *name; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - if (buflen < 2) - return -FDT_ERR_NOSPACE; -@@ -545,7 +595,7 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, - int offset, depth; - int supernodeoffset = -FDT_ERR_INTERNAL; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - if (supernodedepth < 0) - return -FDT_ERR_NOTFOUND; -@@ -567,10 +617,12 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, - } - } - -- if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) -- return -FDT_ERR_BADOFFSET; -- else if (offset == -FDT_ERR_BADOFFSET) -- return -FDT_ERR_BADSTRUCTURE; -+ if (fdt_chk_extra()) { -+ if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) -+ return -FDT_ERR_BADOFFSET; -+ else if (offset == -FDT_ERR_BADOFFSET) -+ return -FDT_ERR_BADSTRUCTURE; -+ } - - return offset; /* error from fdt_next_node() */ - } -@@ -582,7 +634,7 @@ int fdt_node_depth(const void *fdt, int nodeoffset) - - err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); - if (err) -- return (err < 0) ? err : -FDT_ERR_INTERNAL; -+ return (!fdt_chk_extra() || err < 0) ? err : -FDT_ERR_INTERNAL; - return nodedepth; - } - -@@ -604,7 +656,7 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, - const void *val; - int len; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_getprop(), then if that didn't -@@ -630,7 +682,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) - if ((phandle == 0) || (phandle == -1)) - return -FDT_ERR_BADPHANDLE; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we - * potentially scan each property of a node in -@@ -783,7 +835,7 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, - { - int offset, err; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_node_check_compatible(), then if -@@ -802,3 +854,68 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, - - return offset; /* error from fdt_next_node() */ - } -+ -+#if !defined(FDT_ASSUME_MASK) || FDT_ASSUME_MASK != 0xff -+int fdt_check_full(const void *fdt, size_t bufsize) -+{ -+ int err; -+ int num_memrsv; -+ int offset, nextoffset = 0; -+ uint32_t tag; -+ unsigned depth = 0; -+ const void *prop; -+ const char *propname; -+ -+ if (bufsize < FDT_V1_SIZE) -+ return -FDT_ERR_TRUNCATED; -+ err = fdt_check_header(fdt); -+ if (err != 0) -+ return err; -+ if (bufsize < fdt_totalsize(fdt)) -+ return -FDT_ERR_TRUNCATED; -+ -+ num_memrsv = fdt_num_mem_rsv(fdt); -+ if (num_memrsv < 0) -+ return num_memrsv; -+ -+ while (1) { -+ offset = nextoffset; -+ tag = fdt_next_tag(fdt, offset, &nextoffset); -+ -+ if (nextoffset < 0) -+ return nextoffset; -+ -+ switch (tag) { -+ case FDT_NOP: -+ break; -+ -+ case FDT_END: -+ if (depth != 0) -+ return -FDT_ERR_BADSTRUCTURE; -+ return 0; -+ -+ case FDT_BEGIN_NODE: -+ depth++; -+ if (depth > INT_MAX) -+ return -FDT_ERR_BADSTRUCTURE; -+ break; -+ -+ case FDT_END_NODE: -+ if (depth == 0) -+ return -FDT_ERR_BADSTRUCTURE; -+ depth--; -+ break; -+ -+ case FDT_PROP: -+ prop = fdt_getprop_by_offset(fdt, offset, &propname, -+ &err); -+ if (!prop) -+ return err; -+ break; -+ -+ default: -+ return -FDT_ERR_INTERNAL; -+ } -+ } -+} -+#endif -diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c -index 9b829051e4..08e2981a44 100644 ---- a/scripts/dtc/libfdt/fdt_rw.c -+++ b/scripts/dtc/libfdt/fdt_rw.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -58,6 +13,8 @@ - static int fdt_blocks_misordered_(const void *fdt, - int mem_rsv_size, int struct_size) - { -+ if (!fdt_chk_basic()) -+ return false; - return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8)) - || (fdt_off_dt_struct(fdt) < - (fdt_off_mem_rsvmap(fdt) + mem_rsv_size)) -@@ -67,25 +24,27 @@ static int fdt_blocks_misordered_(const void *fdt, - (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); - } - --static int fdt_rw_check_header_(void *fdt) -+static int fdt_rw_probe_(void *fdt) - { -- FDT_CHECK_HEADER(fdt); -+ if (!fdt_chk_basic()) -+ return 0; -+ FDT_RO_PROBE(fdt); - -- if (fdt_version(fdt) < 17) -+ if (fdt_chk_version() && fdt_version(fdt) < 17) - return -FDT_ERR_BADVERSION; - if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), - fdt_size_dt_struct(fdt))) - return -FDT_ERR_BADLAYOUT; -- if (fdt_version(fdt) > 17) -+ if (fdt_chk_version() && fdt_version(fdt) > 17) - fdt_set_version(fdt, 17); - - return 0; - } - --#define FDT_RW_CHECK_HEADER(fdt) \ -+#define FDT_RW_PROBE(fdt) \ - { \ - int err_; \ -- if ((err_ = fdt_rw_check_header_(fdt)) != 0) \ -+ if (fdt_chk_extra() && (err_ = fdt_rw_probe_(fdt)) != 0) \ - return err_; \ - } - -@@ -136,6 +95,14 @@ static int fdt_splice_struct_(void *fdt, void *p, - return 0; - } - -+/* Must only be used to roll back in case of error */ -+static void fdt_del_last_string_(void *fdt, const char *s) -+{ -+ int newlen = strlen(s) + 1; -+ -+ fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) - newlen); -+} -+ - static int fdt_splice_string_(void *fdt, int newlen) - { - void *p = (char *)fdt -@@ -149,7 +116,16 @@ static int fdt_splice_string_(void *fdt, int newlen) - return 0; - } - --static int fdt_find_add_string_(void *fdt, const char *s) -+/** -+ * fdt_find_add_string_() - Find or allocate a string -+ * -+ * @fdt: pointer to the device tree to check/adjust -+ * @s: string to find/add -+ * @allocated: Set to 0 if the string was found, 1 if not found and so -+ * allocated. Ignored if !fdt_chk_basic() -+ * @return offset of string in the string table (whether found or added) -+ */ -+static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) - { - char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); - const char *p; -@@ -157,6 +133,9 @@ static int fdt_find_add_string_(void *fdt, const char *s) - int len = strlen(s) + 1; - int err; - -+ if (fdt_chk_basic()) -+ *allocated = 0; -+ - p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s); - if (p) - /* found it */ -@@ -167,6 +146,9 @@ static int fdt_find_add_string_(void *fdt, const char *s) - if (err) - return err; - -+ if (fdt_chk_basic()) -+ *allocated = 1; -+ - memcpy(new, s, len); - return (new - strtab); - } -@@ -176,7 +158,7 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) - struct fdt_reserve_entry *re; - int err; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - re = fdt_mem_rsv_w_(fdt, fdt_num_mem_rsv(fdt)); - err = fdt_splice_mem_rsv_(fdt, re, 0, 1); -@@ -192,7 +174,7 @@ int fdt_del_mem_rsv(void *fdt, int n) - { - struct fdt_reserve_entry *re = fdt_mem_rsv_w_(fdt, n); - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - if (n >= fdt_num_mem_rsv(fdt)) - return -FDT_ERR_NOTFOUND; -@@ -225,11 +207,12 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, - int nextoffset; - int namestroff; - int err; -+ int allocated; - - if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) - return nextoffset; - -- namestroff = fdt_find_add_string_(fdt, name); -+ namestroff = fdt_find_add_string_(fdt, name, &allocated); - if (namestroff < 0) - return namestroff; - -@@ -237,8 +220,12 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, - proplen = sizeof(**prop) + FDT_TAGALIGN(len); - - err = fdt_splice_struct_(fdt, *prop, 0, proplen); -- if (err) -+ if (err) { -+ /* Delete the string if we failed to add it */ -+ if (fdt_chk_basic() && allocated) -+ fdt_del_last_string_(fdt, name); - return err; -+ } - - (*prop)->tag = cpu_to_fdt32(FDT_PROP); - (*prop)->nameoff = cpu_to_fdt32(namestroff); -@@ -252,7 +239,7 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name) - int oldlen, newlen; - int err; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen); - if (!namep) -@@ -275,7 +262,7 @@ int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, - struct fdt_property *prop; - int err; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - err = fdt_resize_property_(fdt, nodeoffset, name, len, &prop); - if (err == -FDT_ERR_NOTFOUND) -@@ -308,7 +295,7 @@ int fdt_appendprop(void *fdt, int nodeoffset, const char *name, - struct fdt_property *prop; - int err, oldlen, newlen; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen); - if (prop) { -@@ -334,7 +321,7 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name) - struct fdt_property *prop; - int len, proplen; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - prop = fdt_get_property_w(fdt, nodeoffset, name, &len); - if (!prop) -@@ -354,7 +341,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset, - uint32_t tag; - fdt32_t *endtag; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen); - if (offset >= 0) -@@ -394,7 +381,7 @@ int fdt_del_node(void *fdt, int nodeoffset) - { - int endoffset; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - endoffset = fdt_node_end_offset_(fdt, nodeoffset); - if (endoffset < 0) -@@ -435,12 +422,12 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) - const char *fdtend = fdtstart + fdt_totalsize(fdt); - char *tmp; - -- FDT_CHECK_HEADER(fdt); -+ FDT_RO_PROBE(fdt); - - mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) - * sizeof(struct fdt_reserve_entry); - -- if (fdt_version(fdt) >= 17) { -+ if (!fdt_chk_version() || fdt_version(fdt) >= 17) { - struct_size = fdt_size_dt_struct(fdt); - } else { - struct_size = 0; -@@ -494,7 +481,7 @@ int fdt_pack(void *fdt) - { - int mem_rsv_size; - -- FDT_RW_CHECK_HEADER(fdt); -+ FDT_RW_PROBE(fdt); - - mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) - * sizeof(struct fdt_reserve_entry); -diff --git a/scripts/dtc/libfdt/fdt_strerror.c b/scripts/dtc/libfdt/fdt_strerror.c -index 9677a1887e..768db66ead 100644 ---- a/scripts/dtc/libfdt/fdt_strerror.c -+++ b/scripts/dtc/libfdt/fdt_strerror.c -@@ -1,51 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" -@@ -82,6 +38,7 @@ static struct fdt_errtabent fdt_errtable[] = { - FDT_ERRTABENT(FDT_ERR_BADVALUE), - FDT_ERRTABENT(FDT_ERR_BADOVERLAY), - FDT_ERRTABENT(FDT_ERR_NOPHANDLES), -+ FDT_ERRTABENT(FDT_ERR_BADFLAGS), - }; - #define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0])) - -diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c -index d8ef748a72..a8c924675a 100644 ---- a/scripts/dtc/libfdt/fdt_sw.c -+++ b/scripts/dtc/libfdt/fdt_sw.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -@@ -55,21 +10,90 @@ - - #include "libfdt_internal.h" - --static int fdt_sw_check_header_(void *fdt) -+static int fdt_sw_probe_(void *fdt) -+{ -+ if (fdt_chk_basic()) { -+ if (fdt_magic(fdt) == FDT_MAGIC) -+ return -FDT_ERR_BADSTATE; -+ else if (fdt_magic(fdt) != FDT_SW_MAGIC) -+ return -FDT_ERR_BADMAGIC; -+ } -+ -+ return 0; -+} -+ -+#define FDT_SW_PROBE(fdt) \ -+ { \ -+ int err; \ -+ if (fdt_chk_basic() && (err = fdt_sw_probe_(fdt)) != 0) \ -+ return err; \ -+ } -+ -+/* 'memrsv' state: Initial state after fdt_create() -+ * -+ * Allowed functions: -+ * fdt_add_reservmap_entry() -+ * fdt_finish_reservemap() [moves to 'struct' state] -+ */ -+static int fdt_sw_probe_memrsv_(void *fdt) -+{ -+ int err = fdt_sw_probe_(fdt); -+ if (err) -+ return err; -+ -+ if (fdt_chk_extra() && fdt_off_dt_strings(fdt) != 0) -+ return -FDT_ERR_BADSTATE; -+ return 0; -+} -+ -+#define FDT_SW_PROBE_MEMRSV(fdt) \ -+ { \ -+ int err; \ -+ if (fdt_chk_extra() && (err = fdt_sw_probe_memrsv_(fdt)) != 0) \ -+ return err; \ -+ } -+ -+/* 'struct' state: Enter this state after fdt_finish_reservemap() -+ * -+ * Allowed functions: -+ * fdt_begin_node() -+ * fdt_end_node() -+ * fdt_property*() -+ * fdt_finish() [moves to 'complete' state] -+ */ -+static int fdt_sw_probe_struct_(void *fdt) - { -- if (fdt_magic(fdt) != FDT_SW_MAGIC) -- return -FDT_ERR_BADMAGIC; -- /* FIXME: should check more details about the header state */ -+ int err; -+ -+ if (!fdt_chk_extra()) -+ return 0; -+ err = fdt_sw_probe_(fdt); -+ if (err) -+ return err; -+ -+ if (fdt_off_dt_strings(fdt) != fdt_totalsize(fdt)) -+ return -FDT_ERR_BADSTATE; - return 0; - } - --#define FDT_SW_CHECK_HEADER(fdt) \ -+#define FDT_SW_PROBE_STRUCT(fdt) \ - { \ - int err; \ -- if ((err = fdt_sw_check_header_(fdt)) != 0) \ -+ if (fdt_chk_extra() && (err = fdt_sw_probe_struct_(fdt)) != 0) \ - return err; \ - } - -+static inline uint32_t sw_flags(void *fdt) -+{ -+ /* assert: (fdt_magic(fdt) == FDT_SW_MAGIC) */ -+ return fdt_last_comp_version(fdt); -+} -+ -+/* 'complete' state: Enter this state after fdt_finish() -+ * -+ * Allowed functions: none -+ */ -+ - static void *fdt_grab_space_(void *fdt, size_t len) - { - int offset = fdt_size_dt_struct(fdt); -@@ -85,38 +109,58 @@ static void *fdt_grab_space_(void *fdt, size_t len) - return fdt_offset_ptr_w_(fdt, offset); - } - --int fdt_create(void *buf, int bufsize) -+int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags) - { -+ const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header), -+ sizeof(struct fdt_reserve_entry)); - void *fdt = buf; - -- if (bufsize < sizeof(struct fdt_header)) -+ if (bufsize < hdrsize) - return -FDT_ERR_NOSPACE; - -+ if (flags & ~FDT_CREATE_FLAGS_ALL) -+ return -FDT_ERR_BADFLAGS; -+ - memset(buf, 0, bufsize); - -+ /* -+ * magic and last_comp_version keep intermediate state during the fdt -+ * creation process, which is replaced with the proper FDT format by -+ * fdt_finish(). -+ * -+ * flags should be accessed with sw_flags(). -+ */ - fdt_set_magic(fdt, FDT_SW_MAGIC); - fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); -- fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); -+ fdt_set_last_comp_version(fdt, flags); -+ - fdt_set_totalsize(fdt, bufsize); - -- fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header), -- sizeof(struct fdt_reserve_entry))); -+ fdt_set_off_mem_rsvmap(fdt, hdrsize); - fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt)); -- fdt_set_off_dt_strings(fdt, bufsize); -+ fdt_set_off_dt_strings(fdt, 0); - - return 0; - } - -+int fdt_create(void *buf, int bufsize) -+{ -+ return fdt_create_with_flags(buf, bufsize, 0); -+} -+ - int fdt_resize(void *fdt, void *buf, int bufsize) - { - size_t headsize, tailsize; - char *oldtail, *newtail; - -- FDT_SW_CHECK_HEADER(fdt); -+ FDT_SW_PROBE(fdt); - - headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); - tailsize = fdt_size_dt_strings(fdt); - -+ if (fdt_chk_extra() && (headsize + tailsize) > fdt_totalsize(fdt)) -+ return -FDT_ERR_INTERNAL; -+ - if ((headsize + tailsize) > bufsize) - return -FDT_ERR_NOSPACE; - -@@ -133,8 +177,9 @@ int fdt_resize(void *fdt, void *buf, int bufsize) - memmove(buf, fdt, headsize); - } - -- fdt_set_off_dt_strings(buf, bufsize); - fdt_set_totalsize(buf, bufsize); -+ if (fdt_off_dt_strings(buf)) -+ fdt_set_off_dt_strings(buf, bufsize); - - return 0; - } -@@ -144,10 +189,7 @@ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) - struct fdt_reserve_entry *re; - int offset; - -- FDT_SW_CHECK_HEADER(fdt); -- -- if (fdt_size_dt_struct(fdt)) -- return -FDT_ERR_BADSTATE; -+ FDT_SW_PROBE_MEMRSV(fdt); - - offset = fdt_off_dt_struct(fdt); - if ((offset + sizeof(*re)) > fdt_totalsize(fdt)) -@@ -164,16 +206,23 @@ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) - - int fdt_finish_reservemap(void *fdt) - { -- return fdt_add_reservemap_entry(fdt, 0, 0); -+ int err = fdt_add_reservemap_entry(fdt, 0, 0); -+ -+ if (err) -+ return err; -+ -+ fdt_set_off_dt_strings(fdt, fdt_totalsize(fdt)); -+ return 0; - } - - int fdt_begin_node(void *fdt, const char *name) - { - struct fdt_node_header *nh; -- int namelen = strlen(name) + 1; -+ int namelen; - -- FDT_SW_CHECK_HEADER(fdt); -+ FDT_SW_PROBE_STRUCT(fdt); - -+ namelen = strlen(name) + 1; - nh = fdt_grab_space_(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen)); - if (! nh) - return -FDT_ERR_NOSPACE; -@@ -187,7 +236,7 @@ int fdt_end_node(void *fdt) - { - fdt32_t *en; - -- FDT_SW_CHECK_HEADER(fdt); -+ FDT_SW_PROBE_STRUCT(fdt); - - en = fdt_grab_space_(fdt, FDT_TAGSIZE); - if (! en) -@@ -197,19 +246,13 @@ int fdt_end_node(void *fdt) - return 0; - } - --static int fdt_find_add_string_(void *fdt, const char *s) -+static int fdt_add_string_(void *fdt, const char *s) - { - char *strtab = (char *)fdt + fdt_totalsize(fdt); -- const char *p; - int strtabsize = fdt_size_dt_strings(fdt); - int len = strlen(s) + 1; - int struct_top, offset; - -- p = fdt_find_string_(strtab - strtabsize, strtabsize, s); -- if (p) -- return p - strtab; -- -- /* Add it */ - offset = -strtabsize - len; - struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); - if (fdt_totalsize(fdt) + offset < struct_top) -@@ -220,20 +263,56 @@ static int fdt_find_add_string_(void *fdt, const char *s) - return offset; - } - -+/* Must only be used to roll back in case of error */ -+static void fdt_del_last_string_(void *fdt, const char *s) -+{ -+ int strtabsize = fdt_size_dt_strings(fdt); -+ int len = strlen(s) + 1; -+ -+ fdt_set_size_dt_strings(fdt, strtabsize - len); -+} -+ -+static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) -+{ -+ char *strtab = (char *)fdt + fdt_totalsize(fdt); -+ int strtabsize = fdt_size_dt_strings(fdt); -+ const char *p; -+ -+ *allocated = 0; -+ -+ p = fdt_find_string_(strtab - strtabsize, strtabsize, s); -+ if (p) -+ return p - strtab; -+ -+ *allocated = 1; -+ -+ return fdt_add_string_(fdt, s); -+} -+ - int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp) - { - struct fdt_property *prop; - int nameoff; -+ int allocated; - -- FDT_SW_CHECK_HEADER(fdt); -+ FDT_SW_PROBE_STRUCT(fdt); - -- nameoff = fdt_find_add_string_(fdt, name); -+ /* String de-duplication can be slow, _NO_NAME_DEDUP skips it */ -+ if (sw_flags(fdt) & FDT_CREATE_FLAG_NO_NAME_DEDUP) { -+ allocated = 1; -+ nameoff = fdt_add_string_(fdt, name); -+ } else { -+ nameoff = fdt_find_add_string_(fdt, name, &allocated); -+ } - if (nameoff == 0) - return -FDT_ERR_NOSPACE; - - prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len)); -- if (! prop) -+ if (! prop) { -+ if (allocated) -+ fdt_del_last_string_(fdt, name); - return -FDT_ERR_NOSPACE; -+ } - - prop->tag = cpu_to_fdt32(FDT_PROP); - prop->nameoff = cpu_to_fdt32(nameoff); -@@ -262,7 +341,7 @@ int fdt_finish(void *fdt) - uint32_t tag; - int offset, nextoffset; - -- FDT_SW_CHECK_HEADER(fdt); -+ FDT_SW_PROBE_STRUCT(fdt); - - /* Add terminator */ - end = fdt_grab_space_(fdt, sizeof(*end)); -@@ -295,6 +374,10 @@ int fdt_finish(void *fdt) - - /* Finally, adjust the header */ - fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); -+ -+ /* And fix up fields that were keeping intermediate state. */ -+ fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); - fdt_set_magic(fdt, FDT_MAGIC); -+ - return 0; - } -diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c -index 534c1cbbb2..f64139e0b3 100644 ---- a/scripts/dtc/libfdt/fdt_wip.c -+++ b/scripts/dtc/libfdt/fdt_wip.c -@@ -1,52 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include "libfdt_env.h" - -diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h -index c400f2f5d5..36fadcdea5 100644 ---- a/scripts/dtc/libfdt/libfdt.h -+++ b/scripts/dtc/libfdt/libfdt.h -@@ -1,54 +1,9 @@ -+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ - #ifndef LIBFDT_H - #define LIBFDT_H - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - #include "libfdt_env.h" -@@ -90,8 +45,9 @@ - - /* Error codes: codes for bad device tree blobs */ - #define FDT_ERR_TRUNCATED 8 -- /* FDT_ERR_TRUNCATED: Structure block of the given device tree -- * ends without an FDT_END tag. */ -+ /* FDT_ERR_TRUNCATED: FDT or a sub-block is improperly -+ * terminated (overflows, goes outside allowed bounds, or -+ * isn't properly terminated). */ - #define FDT_ERR_BADMAGIC 9 - /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a - * device tree at all - it is missing the flattened device -@@ -137,7 +93,11 @@ - /* FDT_ERR_NOPHANDLES: The device tree doesn't have any - * phandle available anymore without causing an overflow */ - --#define FDT_ERR_MAX 17 -+#define FDT_ERR_BADFLAGS 18 -+ /* FDT_ERR_BADFLAGS: The function was passed a flags field that -+ * contains invalid flags or an invalid combination of flags. */ -+ -+#define FDT_ERR_MAX 18 - - /* constants */ - #define FDT_MAX_PHANDLE 0xfffffffe -@@ -157,6 +117,61 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) - - uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); - -+/* -+ * Alignment helpers: -+ * These helpers access words from a device tree blob. They're -+ * built to work even with unaligned pointers on platforms (ike -+ * ARM) that don't like unaligned loads and stores -+ */ -+ -+static inline uint32_t fdt32_ld(const fdt32_t *p) -+{ -+ const uint8_t *bp = (const uint8_t *)p; -+ -+ return ((uint32_t)bp[0] << 24) -+ | ((uint32_t)bp[1] << 16) -+ | ((uint32_t)bp[2] << 8) -+ | bp[3]; -+} -+ -+static inline void fdt32_st(void *property, uint32_t value) -+{ -+ uint8_t *bp = (uint8_t *)property; -+ -+ bp[0] = value >> 24; -+ bp[1] = (value >> 16) & 0xff; -+ bp[2] = (value >> 8) & 0xff; -+ bp[3] = value & 0xff; -+} -+ -+static inline uint64_t fdt64_ld(const fdt64_t *p) -+{ -+ const uint8_t *bp = (const uint8_t *)p; -+ -+ return ((uint64_t)bp[0] << 56) -+ | ((uint64_t)bp[1] << 48) -+ | ((uint64_t)bp[2] << 40) -+ | ((uint64_t)bp[3] << 32) -+ | ((uint64_t)bp[4] << 24) -+ | ((uint64_t)bp[5] << 16) -+ | ((uint64_t)bp[6] << 8) -+ | bp[7]; -+} -+ -+static inline void fdt64_st(void *property, uint64_t value) -+{ -+ uint8_t *bp = (uint8_t *)property; -+ -+ bp[0] = value >> 56; -+ bp[1] = (value >> 48) & 0xff; -+ bp[2] = (value >> 40) & 0xff; -+ bp[3] = (value >> 32) & 0xff; -+ bp[4] = (value >> 24) & 0xff; -+ bp[5] = (value >> 16) & 0xff; -+ bp[6] = (value >> 8) & 0xff; -+ bp[7] = value & 0xff; -+} -+ - /**********************************************************************/ - /* Traversal functions */ - /**********************************************************************/ -@@ -199,7 +214,7 @@ int fdt_next_subnode(const void *fdt, int offset); - * ... - * } - * -- * if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) { -+ * if ((node < 0) && (node != -FDT_ERR_NOTFOUND)) { - * Error handling - * } - * -@@ -217,7 +232,7 @@ int fdt_next_subnode(const void *fdt, int offset); - /* General functions */ - /**********************************************************************/ - #define fdt_get_header(fdt, field) \ -- (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) -+ (fdt32_ld(&((const struct fdt_header *)(fdt))->field)) - #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) - #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) - #define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct)) -@@ -248,18 +263,32 @@ fdt_set_hdr_(size_dt_struct); - #undef fdt_set_hdr_ - - /** -- * fdt_check_header - sanity check a device tree or possible device tree -+ * fdt_header_size - return the size of the tree's header -+ * @fdt: pointer to a flattened device tree -+ */ -+size_t fdt_header_size(const void *fdt); -+ -+/** -+ * fdt_header_size_ - internal function which takes a version number -+ */ -+size_t fdt_header_size_(uint32_t version); -+ -+/** -+ * fdt_check_header - sanity check a device tree header -+ - * @fdt: pointer to data which might be a flattened device tree - * - * fdt_check_header() checks that the given buffer contains what -- * appears to be a flattened device tree with sane information in its -- * header. -+ * appears to be a flattened device tree, and that the header contains -+ * valid information (to the extent that can be determined from the -+ * header alone). - * - * returns: - * 0, if the buffer appears to contain a valid device tree - * -FDT_ERR_BADMAGIC, - * -FDT_ERR_BADVERSION, -- * -FDT_ERR_BADSTATE, standard meanings, as above -+ * -FDT_ERR_BADSTATE, -+ * -FDT_ERR_TRUNCATED, standard meanings, as above - */ - int fdt_check_header(const void *fdt); - -@@ -288,6 +317,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); - /* Read-only functions */ - /**********************************************************************/ - -+int fdt_check_full(const void *fdt, size_t bufsize); -+ -+/** -+ * fdt_get_string - retrieve a string from the strings block of a device tree -+ * @fdt: pointer to the device tree blob -+ * @stroffset: offset of the string within the strings block (native endian) -+ * @lenp: optional pointer to return the string's length -+ * -+ * fdt_get_string() retrieves a pointer to a single string from the -+ * strings block of the device tree blob at fdt, and optionally also -+ * returns the string's length in *lenp. -+ * -+ * returns: -+ * a pointer to the string, on success -+ * NULL, if stroffset is out of bounds, or doesn't point to a valid string -+ */ -+const char *fdt_get_string(const void *fdt, int stroffset, int *lenp); -+ - /** - * fdt_string - retrieve a string from the strings block of a device tree - * @fdt: pointer to the device tree blob -@@ -298,10 +345,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); - * - * returns: - * a pointer to the string, on success -- * NULL, if stroffset is out of bounds -+ * NULL, if stroffset is out of bounds, or doesn't point to a valid string - */ - const char *fdt_string(const void *fdt, int stroffset); - -+/** -+ * fdt_find_max_phandle - find and return the highest phandle in a tree -+ * @fdt: pointer to the device tree blob -+ * @phandle: return location for the highest phandle value found in the tree -+ * -+ * fdt_find_max_phandle() finds the highest phandle value in the given device -+ * tree. The value returned in @phandle is only valid if the function returns -+ * success. -+ * -+ * returns: -+ * 0 on success or a negative error code on failure -+ */ -+int fdt_find_max_phandle(const void *fdt, uint32_t *phandle); -+ - /** - * fdt_get_max_phandle - retrieves the highest phandle in a tree - * @fdt: pointer to the device tree blob -@@ -310,12 +371,24 @@ const char *fdt_string(const void *fdt, int stroffset); - * device tree. This will ignore badly formatted phandles, or phandles - * with a value of 0 or -1. - * -+ * This function is deprecated in favour of fdt_find_max_phandle(). -+ * - * returns: - * the highest phandle on success - * 0, if no phandle was found in the device tree - * -1, if an error occurred - */ --uint32_t fdt_get_max_phandle(const void *fdt); -+static inline uint32_t fdt_get_max_phandle(const void *fdt) -+{ -+ uint32_t phandle; -+ int err; -+ -+ err = fdt_find_max_phandle(fdt, &phandle); -+ if (err < 0) -+ return (uint32_t)-1; -+ -+ return phandle; -+} - - /** - * fdt_generate_phandle - return a new, unused phandle for a device tree blob -@@ -522,7 +595,7 @@ int fdt_next_property_offset(const void *fdt, int offset); - * ... - * } - * -- * if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) { -+ * if ((property < 0) && (property != -FDT_ERR_NOTFOUND)) { - * Error handling - * } - * -@@ -625,7 +698,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, - /** - * fdt_getprop_by_offset - retrieve the value of a property at a given offset - * @fdt: pointer to the device tree blob -- * @ffset: offset of the property to read -+ * @offset: offset of the property to read - * @namep: pointer to a string variable (will be overwritten) or NULL - * @lenp: pointer to an integer variable (will be overwritten) or NULL - * -@@ -734,7 +807,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); - /** - * fdt_get_alias_namelen - get alias based on substring - * @fdt: pointer to the device tree blob -- * @name: name of the alias to look up -+ * @name: name of the alias th look up - * @namelen: number of characters of name to consider - * - * Identical to fdt_get_alias(), but only examine the first namelen -@@ -1316,7 +1389,45 @@ int fdt_nop_node(void *fdt, int nodeoffset); - /* Sequential write functions */ - /**********************************************************************/ - -+/* fdt_create_with_flags flags */ -+#define FDT_CREATE_FLAG_NO_NAME_DEDUP 0x1 -+ /* FDT_CREATE_FLAG_NO_NAME_DEDUP: Do not try to de-duplicate property -+ * names in the fdt. This can result in faster creation times, but -+ * a larger fdt. */ -+ -+#define FDT_CREATE_FLAGS_ALL (FDT_CREATE_FLAG_NO_NAME_DEDUP) -+ -+/** -+ * fdt_create_with_flags - begin creation of a new fdt -+ * @fdt: pointer to memory allocated where fdt will be created -+ * @bufsize: size of the memory space at fdt -+ * @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0. -+ * -+ * fdt_create_with_flags() begins the process of creating a new fdt with -+ * the sequential write interface. -+ * -+ * fdt creation process must end with fdt_finished() to produce a valid fdt. -+ * -+ * returns: -+ * 0, on success -+ * -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt -+ * -FDT_ERR_BADFLAGS, flags is not valid -+ */ -+int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags); -+ -+/** -+ * fdt_create - begin creation of a new fdt -+ * @fdt: pointer to memory allocated where fdt will be created -+ * @bufsize: size of the memory space at fdt -+ * -+ * fdt_create() is equivalent to fdt_create_with_flags() with flags=0. -+ * -+ * returns: -+ * 0, on success -+ * -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt -+ */ - int fdt_create(void *buf, int bufsize); -+ - int fdt_resize(void *fdt, void *buf, int bufsize); - int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size); - int fdt_finish_reservemap(void *fdt); -@@ -1787,6 +1898,43 @@ static inline int fdt_appendprop_cell(void *fdt, int nodeoffset, - #define fdt_appendprop_string(fdt, nodeoffset, name, str) \ - fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) - -+/** -+ * fdt_appendprop_addrrange - append a address range property -+ * @fdt: pointer to the device tree blob -+ * @parent: offset of the parent node -+ * @nodeoffset: offset of the node to add a property at -+ * @name: name of property -+ * @addr: start address of a given range -+ * @size: size of a given range -+ * -+ * fdt_appendprop_addrrange() appends an address range value (start -+ * address and size) to the value of the named property in the given -+ * node, or creates a new property with that value if it does not -+ * already exist. -+ * If "name" is not specified, a default "reg" is used. -+ * Cell sizes are determined by parent's #address-cells and #size-cells. -+ * -+ * This function may insert data into the blob, and will therefore -+ * change the offsets of some existing nodes. -+ * -+ * returns: -+ * 0, on success -+ * -FDT_ERR_BADLAYOUT, -+ * -FDT_ERR_BADMAGIC, -+ * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid -+ * #address-cells property -+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag -+ * -FDT_ERR_BADSTATE, -+ * -FDT_ERR_BADSTRUCTURE, -+ * -FDT_ERR_BADVERSION, -+ * -FDT_ERR_BADVALUE, addr or size doesn't fit to respective cells size -+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to -+ * contain a new property -+ * -FDT_ERR_TRUNCATED, standard meanings -+ */ -+int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, -+ const char *name, uint64_t addr, uint64_t size); -+ - /** - * fdt_delprop - delete a property - * @fdt: pointer to the device tree blob -diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h -index 3ff9e28630..73b6d40450 100644 ---- a/scripts/dtc/libfdt/libfdt_env.h -+++ b/scripts/dtc/libfdt/libfdt_env.h -@@ -1,55 +1,10 @@ -+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ - #ifndef LIBFDT_ENV_H - #define LIBFDT_ENV_H - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. - * Copyright 2012 Kim Phillips, Freescale Semiconductor. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - #include -@@ -57,6 +12,7 @@ - #include - #include - #include -+#include - - #ifdef __CHECKER__ - #define FDT_FORCE __attribute__((force)) -diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h -index 7681e19229..5436e2ceea 100644 ---- a/scripts/dtc/libfdt/libfdt_internal.h -+++ b/scripts/dtc/libfdt/libfdt_internal.h -@@ -1,65 +1,24 @@ -+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ - #ifndef LIBFDT_INTERNAL_H - #define LIBFDT_INTERNAL_H - /* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. -- * -- * libfdt is dual licensed: you can use it either under the terms of -- * the GPL, or the BSD license, at your option. -- * -- * a) This library is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This library is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public -- * License along with this library; if not, write to the Free -- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, -- * MA 02110-1301 USA -- * -- * Alternatively, -- * -- * b) Redistribution and use in source and binary forms, with or -- * without modification, are permitted provided that the following -- * conditions are met: -- * -- * 1. Redistributions of source code must retain the above -- * copyright notice, this list of conditions and the following -- * disclaimer. -- * 2. Redistributions in binary form must reproduce the above -- * copyright notice, this list of conditions and the following -- * disclaimer in the documentation and/or other materials -- * provided with the distribution. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -- * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR -- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include - - #define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) - #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) - --#define FDT_CHECK_HEADER(fdt) \ -- { \ -- int err_; \ -- if ((err_ = fdt_check_header(fdt)) != 0) \ -- return err_; \ -+int fdt_ro_probe_(const void *fdt); -+#define FDT_RO_PROBE(fdt) \ -+ { \ -+ int totalsize_; \ -+ if (fdt_chk_basic()) { \ -+ totalsize_ = fdt_ro_probe_(fdt); \ -+ if (totalsize_ < 0) \ -+ return totalsize_; \ -+ } \ - } - - int fdt_check_node_offset_(const void *fdt, int offset); -@@ -92,4 +51,87 @@ static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n) - - #define FDT_SW_MAGIC (~FDT_MAGIC) - -+/**********************************************************************/ -+/* Checking controls */ -+/**********************************************************************/ -+ -+#ifndef FDT_ASSUME_MASK -+#define FDT_ASSUME_MASK 0 -+#endif -+ -+/* -+ * Defines assumptions which can be enabled. Each of these can be enabled -+ * individually. For maximum saftey, don't enable any assumptions! -+ * -+ * For minimal code size and no safety, use FDT_ASSUME_PERFECT at your own risk. -+ * You should have another method of validating the device tree, such as a -+ * signature or hash check before using libfdt. -+ * -+ * For situations where security is not a concern it may be safe to enable -+ * FDT_ASSUME_FRIENDLY. -+ */ -+enum { -+ /* -+ * This does essentially no checks. Only the latest device-tree -+ * version is correctly handled. Incosistencies or errors in the device -+ * tree may cause undefined behaviour or crashes. -+ * -+ * If an error occurs when modifying the tree it may leave the tree in -+ * an intermediate (but valid) state. As an example, adding a property -+ * where there is insufficient space may result in the property name -+ * being added to the string table even though the property itself is -+ * not added to the struct section. -+ * -+ * Only use this if you have a fully validated device tree with -+ * the latest supported version and wish to minimise code size. -+ */ -+ FDT_ASSUME_PERFECT = 0xff, -+ -+ /* -+ * This assumes that the device tree is sane. i.e. header metadata -+ * and basic hierarchy are correct. -+ * -+ * These checks will be sufficient if you have a valid device tree with -+ * no internal inconsistencies. With this assumption, libfdt will -+ * generally not return -FDT_ERR_INTERNAL, -FDT_ERR_BADLAYOUT, etc. -+ */ -+ FDT_ASSUME_SANE = 1 << 0, -+ -+ /* -+ * This disables checks for device-tree version and removes all code -+ * which handles older versions. -+ * -+ * Only enable this if you know you have a device tree with the latest -+ * version. -+ */ -+ FDT_ASSUME_LATEST = 1 << 1, -+ -+ /* -+ * This disables any extensive checking of parameters and the device -+ * tree, making various assumptions about correctness. Normal device -+ * trees produced by libfdt and the compiler should be handled safely. -+ * Malicious device trees and complete garbage may cause libfdt to -+ * behave badly or crash. -+ */ -+ FDT_ASSUME_FRIENDLY = 1 << 2, -+}; -+ -+/** fdt_chk_basic() - see if basic checking of params and DT data is enabled */ -+static inline bool fdt_chk_basic(void) -+{ -+ return !(FDT_ASSUME_MASK & FDT_ASSUME_SANE); -+} -+ -+/** fdt_chk_version() - see if we need to handle old versions of the DT */ -+static inline bool fdt_chk_version(void) -+{ -+ return !(FDT_ASSUME_MASK & FDT_ASSUME_LATEST); -+} -+ -+/** fdt_chk_extra() - see if extra checking is enabled */ -+static inline bool fdt_chk_extra(void) -+{ -+ return !(FDT_ASSUME_MASK & FDT_ASSUME_FRIENDLY); -+} -+ - #endif /* LIBFDT_INTERNAL_H */ -diff --git a/tools/libfdt/fdt_rw.c b/tools/libfdt/fdt_rw.c -index 68fc7c8c88..7189f01429 100644 ---- a/tools/libfdt/fdt_rw.c -+++ b/tools/libfdt/fdt_rw.c -@@ -11,6 +11,7 @@ int fdt_remove_unused_strings(const void *old, void *new) - const char *str; - int ret; - int tag = FDT_PROP; -+ int allocated; - - /* Make a copy and remove the strings */ - memcpy(new, old, size); -@@ -25,7 +26,7 @@ int fdt_remove_unused_strings(const void *old, void *new) - new_prop = (struct fdt_property *)(unsigned long) - fdt_get_property_by_offset(new, offset, NULL); - str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff)); -- ret = fdt_find_add_string_(new, str); -+ ret = fdt_find_add_string_(new, str, &allocated); - if (ret < 0) - return ret; - new_prop->nameoff = cpu_to_fdt32(ret); diff --git a/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch b/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch deleted file mode 100644 index a5b2405..0000000 --- a/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch +++ /dev/null @@ -1,108 +0,0 @@ -From patchwork Tue Oct 8 17:59:50 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Emmanuel Vadot -X-Patchwork-Id: 1173473 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Tue, 8 Oct 2019 17:59:56 +0000 (UTC) - (envelope-from manu@freebsd.org) -From: Emmanuel Vadot -To: matwey.kornilov@gmail.com, - albert.u.boot@aribaud.net -Date: Tue, 8 Oct 2019 19:59:50 +0200 -Message-Id: <20191008175950.77719-1-manu@freebsd.org> -X-Mailer: git-send-email 2.22.0 -MIME-Version: 1.0 -Cc: u-boot@lists.denx.de -Subject: [U-Boot] [PATCH] rockchip: dts: rk3328: rock64: Add same-as-spl order -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -rk3328 can use same-as-spl option so next loaders are loaded from the same -medium. -Add the boot order in the rock64 dts otherwise booting from sdcard -will result in u-boot looking into the eMMC. - -Signed-off-by: Emmanuel Vadot ---- - arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -index 1d441f7124..e5946d2d2d 100644 ---- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -@@ -5,6 +5,11 @@ - - #include "rk3328-u-boot.dtsi" - #include "rk3328-sdram-lpddr3-1600.dtsi" -+/ { -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; -+ }; -+}; - - &usb_host0_xhci { - status = "okay"; diff --git a/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch b/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch deleted file mode 100644 index bc5602a..0000000 --- a/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch +++ /dev/null @@ -1,193 +0,0 @@ -From patchwork Sun Oct 6 16:28:13 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon South -X-Patchwork-Id: 1172554 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) - header.from=simonsouth.net -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 46mTcR2S2Xz9sN1 - for ; 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Sun, 6 Oct 2019 16:30:14 +0000 (UTC) -Received: from localhost.localdomain (unknown [108.162.141.100]) - (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 - bits)) (No client certificate requested) - by mailout.easymail.ca (Postfix) with ESMTPSA id 2269520D10; - Sun, 6 Oct 2019 16:30:07 +0000 (UTC) -From: Simon South -To: u-boot@lists.denx.de -Date: Sun, 6 Oct 2019 12:28:13 -0400 -Message-Id: -X-Mailer: git-send-email 2.23.0 -In-Reply-To: -References: -MIME-Version: 1.0 -Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in - function -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Fix a pair of tests in phy_dll_bypass_set() that used incorrect units -for the DDR frequency, causing the DRAM controller to be misconfigured -in most cases. - -Signed-off-by: Simon South -Reviewed-by: Kever Yang ---- - drivers/ram/rockchip/sdram_rk3328.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c -index 656696ac3c..0541bbadf0 100644 ---- a/drivers/ram/rockchip/sdram_rk3328.c -+++ b/drivers/ram/rockchip/sdram_rk3328.c -@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) - setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); - clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); - -- if (freq <= (400 * MHz)) -+ if (freq <= 400) - /* DLL bypass */ - setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); - else - clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); -- if (freq <= (680 * MHz)) -+ if (freq <= 680) - tmp = 2; - else - tmp = 1; - -From patchwork Sun Oct 6 16:28:14 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon South -X-Patchwork-Id: 1172555 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (mailfrom) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) - header.from=simonsouth.net -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 46mTd93q3Qz9sN1 - for ; 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Sun, 6 Oct 2019 16:30:28 +0000 (UTC) -Received: from localhost.localdomain (unknown [108.162.141.100]) - (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 - bits)) (No client certificate requested) - by mailout.easymail.ca (Postfix) with ESMTPSA id 42EDE20D10; - Sun, 6 Oct 2019 16:30:20 +0000 (UTC) -From: Simon South -To: u-boot@lists.denx.de -Date: Sun, 6 Oct 2019 12:28:14 -0400 -Message-Id: <17f58d8cdf7d32de26cb36950fa8676e0dd54d49.1570376078.git.simon@simonsouth.net> -X-Mailer: git-send-email 2.23.0 -In-Reply-To: -References: -MIME-Version: 1.0 -Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Fix a typo that caused incorrect values to be loaded into the DRAM -controller's deskew registers. - -Signed-off-by: Simon South -Reviewed-by: Kever Yang ---- - drivers/ram/rockchip/sdram_rk3328.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c -index 0541bbadf0..e84c9be6a2 100644 ---- a/drivers/ram/rockchip/sdram_rk3328.c -+++ b/drivers/ram/rockchip/sdram_rk3328.c -@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram, - copy_to_reg(PHY_REG(phy_base, 0x70), - &sdram_params->skew.cs0_dm0_skew[0], 44 * 4); - copy_to_reg(PHY_REG(phy_base, 0xc0), -- &sdram_params->skew.cs0_dm1_skew[0], 44 * 4); -+ &sdram_params->skew.cs1_dm0_skew[0], 44 * 4); - } - - static int update_refresh_reg(struct dram_info *dram) diff --git a/scripts-Convert-to-Python-3.patch b/scripts-Convert-to-Python-3.patch deleted file mode 100644 index 5dde241..0000000 --- a/scripts-Convert-to-Python-3.patch +++ /dev/null @@ -1,3889 +0,0 @@ -From patchwork Thu Oct 31 13:42:50 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187480 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) - header.from=chromium.org -Authentication-Results: ozlabs.org; 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- Thu, 31 Oct 2019 06:43:27 -0700 (PDT) -Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) - by smtp.gmail.com with ESMTPSA id - s70sm539612ili.13.2019.10.31.06.43.27 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 31 Oct 2019 06:43:27 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:42:50 -0600 -Message-Id: <20191031134310.3072-2-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 01/17] patman: Adjust 'command' to return - strings instead of bytes -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -At present all the 'command' methods return bytes. Most of the time we -actually want strings, so change this. We still need to keep the internal -representation as bytes since otherwise unicode strings might break over -a read() boundary (e.g. 4KB), causing errors. But we can convert the end -result to strings. - -Add a 'binary' parameter to cover the few cases where bytes are needed. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/binman/cbfs_util_test.py | 2 +- - tools/binman/ftest.py | 2 +- - tools/patman/command.py | 31 +++++++++++++++++++++++-------- - tools/patman/tools.py | 29 +++++++++++++++++++++-------- - 4 files changed, 46 insertions(+), 18 deletions(-) - -diff --git a/tools/binman/cbfs_util_test.py b/tools/binman/cbfs_util_test.py -index 772c794ece..ddc2e09e35 100755 ---- a/tools/binman/cbfs_util_test.py -+++ b/tools/binman/cbfs_util_test.py -@@ -56,7 +56,7 @@ class TestCbfs(unittest.TestCase): - cls.have_lz4 = True - try: - tools.Run('lz4', '--no-frame-crc', '-c', -- tools.GetInputFilename('u-boot.bin')) -+ tools.GetInputFilename('u-boot.bin'), binary=True) - except: - cls.have_lz4 = False - -diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py -index 7000de9d42..88daaf20a8 100644 ---- a/tools/binman/ftest.py -+++ b/tools/binman/ftest.py -@@ -170,7 +170,7 @@ class TestFunctional(unittest.TestCase): - cls.have_lz4 = True - try: - tools.Run('lz4', '--no-frame-crc', '-c', -- os.path.join(cls._indir, 'u-boot.bin')) -+ os.path.join(cls._indir, 'u-boot.bin'), binary=True) - except: - cls.have_lz4 = False - -diff --git a/tools/patman/command.py b/tools/patman/command.py -index 16299f3f5b..5fbd2c4a3e 100644 ---- a/tools/patman/command.py -+++ b/tools/patman/command.py -@@ -4,6 +4,7 @@ - - import os - import cros_subprocess -+import tools - - """Shell command ease-ups for Python.""" - -@@ -31,6 +32,13 @@ class CommandResult: - self.return_code = return_code - self.exception = exception - -+ def ToOutput(self, binary): -+ if not binary: -+ self.stdout = tools.ToString(self.stdout) -+ self.stderr = tools.ToString(self.stderr) -+ self.combined = tools.ToString(self.combined) -+ return self -+ - - # This permits interception of RunPipe for test purposes. If it is set to - # a function, then that function is called with the pipe list being -@@ -41,7 +49,7 @@ test_result = None - - def RunPipe(pipe_list, infile=None, outfile=None, - capture=False, capture_stderr=False, oneline=False, -- raise_on_error=True, cwd=None, **kwargs): -+ raise_on_error=True, cwd=None, binary=False, **kwargs): - """ - Perform a command pipeline, with optional input/output filenames. - -@@ -67,7 +75,7 @@ def RunPipe(pipe_list, infile=None, outfile=None, - else: - return test_result - # No result: fall through to normal processing -- result = CommandResult() -+ result = CommandResult(b'', b'', b'') - last_pipe = None - pipeline = list(pipe_list) - user_pipestr = '|'.join([' '.join(pipe) for pipe in pipe_list]) -@@ -93,29 +101,36 @@ def RunPipe(pipe_list, infile=None, outfile=None, - if raise_on_error: - raise Exception("Error running '%s': %s" % (user_pipestr, str)) - result.return_code = 255 -- return result -+ return result.ToOutput(binary) - - if capture: - result.stdout, result.stderr, result.combined = ( - last_pipe.CommunicateFilter(None)) - if result.stdout and oneline: -- result.output = result.stdout.rstrip('\r\n') -+ result.output = result.stdout.rstrip(b'\r\n') - result.return_code = last_pipe.wait() - else: - result.return_code = os.waitpid(last_pipe.pid, 0)[1] - if raise_on_error and result.return_code: - raise Exception("Error running '%s'" % user_pipestr) -- return result -+ return result.ToOutput(binary) - - def Output(*cmd, **kwargs): - kwargs['raise_on_error'] = kwargs.get('raise_on_error', True) - return RunPipe([cmd], capture=True, **kwargs).stdout - - def OutputOneLine(*cmd, **kwargs): -+ """Run a command and output it as a single-line string -+ -+ The command us expected to produce a single line of output -+ -+ Returns: -+ String containing output of command -+ """ - raise_on_error = kwargs.pop('raise_on_error', True) -- return (RunPipe([cmd], capture=True, oneline=True, -- raise_on_error=raise_on_error, -- **kwargs).stdout.strip()) -+ result = RunPipe([cmd], capture=True, oneline=True, -+ raise_on_error=raise_on_error, **kwargs).stdout.strip() -+ return result - - def Run(*cmd, **kwargs): - return RunPipe([cmd], **kwargs).stdout -diff --git a/tools/patman/tools.py b/tools/patman/tools.py -index 4a7fcdad21..3feddb292f 100644 ---- a/tools/patman/tools.py -+++ b/tools/patman/tools.py -@@ -186,7 +186,7 @@ def PathHasFile(path_spec, fname): - return True - return False - --def Run(name, *args): -+def Run(name, *args, **kwargs): - """Run a tool with some arguments - - This runs a 'tool', which is a program used by binman to process files and -@@ -201,13 +201,14 @@ def Run(name, *args): - CommandResult object - """ - try: -+ binary = kwargs.get('binary') - env = None - if tool_search_paths: - env = dict(os.environ) - env['PATH'] = ':'.join(tool_search_paths) + ':' + env['PATH'] - all_args = (name,) + args - result = command.RunPipe([all_args], capture=True, capture_stderr=True, -- env=env, raise_on_error=False) -+ env=env, raise_on_error=False, binary=binary) - if result.return_code: - raise Exception("Error %d running '%s': %s" % - (result.return_code,' '.join(all_args), -@@ -375,7 +376,7 @@ def ToBytes(string): - """Convert a str type into a bytes type - - Args: -- string: string to convert value -+ string: string to convert - - Returns: - Python 3: A bytes type -@@ -385,6 +386,18 @@ def ToBytes(string): - return string.encode('utf-8') - return string - -+def ToString(bval): -+ """Convert a bytes type into a str type -+ -+ Args: -+ bval: bytes value to convert -+ -+ Returns: -+ Python 3: A bytes type -+ Python 2: A string type -+ """ -+ return bval.decode('utf-8') -+ - def Compress(indata, algo, with_header=True): - """Compress some data using a given algorithm - -@@ -406,14 +419,14 @@ def Compress(indata, algo, with_header=True): - fname = GetOutputFilename('%s.comp.tmp' % algo) - WriteFile(fname, indata) - if algo == 'lz4': -- data = Run('lz4', '--no-frame-crc', '-c', fname) -+ data = Run('lz4', '--no-frame-crc', '-c', fname, binary=True) - # cbfstool uses a very old version of lzma - elif algo == 'lzma': - outfname = GetOutputFilename('%s.comp.otmp' % algo) - Run('lzma_alone', 'e', fname, outfname, '-lc1', '-lp0', '-pb0', '-d8') - data = ReadFile(outfname) - elif algo == 'gzip': -- data = Run('gzip', '-c', fname) -+ data = Run('gzip', '-c', fname, binary=True) - else: - raise ValueError("Unknown algorithm '%s'" % algo) - if with_header: -@@ -446,13 +459,13 @@ def Decompress(indata, algo, with_header=True): - with open(fname, 'wb') as fd: - fd.write(indata) - if algo == 'lz4': -- data = Run('lz4', '-dc', fname) -+ data = Run('lz4', '-dc', fname, binary=True) - elif algo == 'lzma': - outfname = GetOutputFilename('%s.decomp.otmp' % algo) - Run('lzma_alone', 'd', fname, outfname) -- data = ReadFile(outfname) -+ data = ReadFile(outfname, binary=True) - elif algo == 'gzip': -- data = Run('gzip', '-cd', fname) -+ data = Run('gzip', '-cd', fname, binary=True) - else: - raise ValueError("Unknown algorithm '%s'" % algo) - return data - -From patchwork Thu Oct 31 13:42:51 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187478 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 31 Oct 2019 06:43:28 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:42:51 -0600 -Message-Id: <20191031074251.v2.2.Ia4a8d3ee2eeb78348b09a654f3ed7b61028932fc@changeid> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 02/17] patman: Use unicode for file I/O -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -At present patman test fail in some environments which don't use utf-8 -as the default file encoding. Add this explicitly. - -Signed-off-by: Simon Glass ---- - -Changes in v2: -- Add new patch to explicitly use unicode for file I/O in patman - - tools/patman/func_test.py | 8 ++++---- - tools/patman/patchstream.py | 4 ++-- - tools/patman/series.py | 2 +- - tools/patman/settings.py | 4 ++-- - tools/patman/test.py | 4 ++-- - 5 files changed, 11 insertions(+), 11 deletions(-) - -diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py -index 50a2741439..eadb49a335 100644 ---- a/tools/patman/func_test.py -+++ b/tools/patman/func_test.py -@@ -51,7 +51,7 @@ class TestFunctional(unittest.TestCase): - - @classmethod - def GetText(self, fname): -- return open(self.GetPath(fname)).read() -+ return open(self.GetPath(fname), encoding='utf-8').read() - - @classmethod - def GetPatchName(self, subject): -@@ -160,7 +160,7 @@ class TestFunctional(unittest.TestCase): - dry_run, not ignore_bad_tags, cc_file, - in_reply_to=in_reply_to, thread=None) - series.ShowActions(args, cmd, process_tags) -- cc_lines = open(cc_file).read().splitlines() -+ cc_lines = open(cc_file, encoding='utf-8').read().splitlines() - os.remove(cc_file) - - lines = out[0].splitlines() -@@ -229,14 +229,14 @@ Simon Glass (2): - 2.7.4 - - ''' -- lines = open(cover_fname).read().splitlines() -+ lines = open(cover_fname, encoding='utf-8').read().splitlines() - self.assertEqual( - 'Subject: [RFC PATCH v3 0/2] test: A test patch series', - lines[3]) - self.assertEqual(expected.splitlines(), lines[7:]) - - for i, fname in enumerate(args): -- lines = open(fname).read().splitlines() -+ lines = open(fname, encoding='utf-8').read().splitlines() - subject = [line for line in lines if line.startswith('Subject')] - self.assertEqual('Subject: [RFC %d/%d]' % (i + 1, count), - subject[0][:18]) -diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py -index ef06606297..df3eb7483b 100644 ---- a/tools/patman/patchstream.py -+++ b/tools/patman/patchstream.py -@@ -511,8 +511,8 @@ def FixPatch(backup_dir, fname, series, commit): - A list of errors, or [] if all ok. - """ - handle, tmpname = tempfile.mkstemp() -- outfd = os.fdopen(handle, 'w') -- infd = open(fname, 'r') -+ outfd = os.fdopen(handle, 'w', encoding='utf-8') -+ infd = open(fname, 'r', encoding='utf-8') - ps = PatchStream(series) - ps.commit = commit - ps.ProcessStream(infd, outfd) -diff --git a/tools/patman/series.py b/tools/patman/series.py -index 67103f03e6..95ec1d3131 100644 ---- a/tools/patman/series.py -+++ b/tools/patman/series.py -@@ -223,7 +223,7 @@ class Series(dict): - col = terminal.Color() - # Look for commit tags (of the form 'xxx:' at the start of the subject) - fname = '/tmp/patman.%d' % os.getpid() -- fd = open(fname, 'w') -+ fd = open(fname, 'w', encoding='utf-8') - all_ccs = [] - for commit in self.commits: - cc = [] -diff --git a/tools/patman/settings.py b/tools/patman/settings.py -index c98911d522..5dc83a8500 100644 ---- a/tools/patman/settings.py -+++ b/tools/patman/settings.py -@@ -165,7 +165,7 @@ def ReadGitAliases(fname): - fname: Filename to read - """ - try: -- fd = open(fname, 'r') -+ fd = open(fname, 'r', encoding='utf-8') - except IOError: - print("Warning: Cannot find alias file '%s'" % fname) - return -@@ -259,7 +259,7 @@ def _ReadAliasFile(fname): - """ - if os.path.exists(fname): - bad_line = None -- with open(fname) as fd: -+ with open(fname, encoding='utf-8') as fd: - linenum = 0 - for line in fd: - linenum += 1 -diff --git a/tools/patman/test.py b/tools/patman/test.py -index cc61c20606..889e186606 100644 ---- a/tools/patman/test.py -+++ b/tools/patman/test.py -@@ -72,12 +72,12 @@ Signed-off-by: Simon Glass - ''' - out = '' - inhandle, inname = tempfile.mkstemp() -- infd = os.fdopen(inhandle, 'w') -+ infd = os.fdopen(inhandle, 'w', encoding='utf-8') - infd.write(data) - infd.close() - - exphandle, expname = tempfile.mkstemp() -- expfd = os.fdopen(exphandle, 'w') -+ expfd = os.fdopen(exphandle, 'w', encoding='utf-8') - expfd.write(expected) - expfd.close() - - -From patchwork Thu Oct 31 13:42:52 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187483 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 31 Oct 2019 06:43:29 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:42:52 -0600 -Message-Id: <20191031134310.3072-3-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 03/17] patman: Move to use Python 3 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Update this tool to use Python 3 to meet the 2020 deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/patman/patman.py | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tools/patman/patman.py b/tools/patman/patman.py -index 9605a36eff..fe82f24c67 100755 ---- a/tools/patman/patman.py -+++ b/tools/patman/patman.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python -+#!/usr/bin/env python3 - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Convert buildman to Python 3 and make it use that, to meet the 2020 -deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: -- Use integer division for multiprocessing.cpu_count() -- Use integer division in SetupBuild() and GetActionSummary() -- Use HTTPMessage.getheader() instead of HTTPMessage.get() -- Use integer division in toolchain.Download() -- Use explicit utf-8 encoding in Boards.ReadBoards() - - tools/buildman/board.py | 9 +-- - tools/buildman/bsettings.py | 20 +++---- - tools/buildman/builder.py | 47 ++++++++-------- - tools/buildman/builderthread.py | 24 ++++---- - tools/buildman/buildman.py | 10 ++-- - tools/buildman/control.py | 44 +++++++-------- - tools/buildman/func_test.py | 16 +++--- - tools/buildman/test.py | 22 ++++---- - tools/buildman/toolchain.py | 99 +++++++++++++++++---------------- - 9 files changed, 146 insertions(+), 145 deletions(-) - -diff --git a/tools/buildman/board.py b/tools/buildman/board.py -index 2a1d021574..447aaabea8 100644 ---- a/tools/buildman/board.py -+++ b/tools/buildman/board.py -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0+ - # Copyright (c) 2012 The Chromium OS Authors. - -+from collections import OrderedDict - import re - - class Expr: -@@ -120,7 +121,7 @@ class Boards: - Args: - fname: Filename of boards.cfg file - """ -- with open(fname, 'r') as fd: -+ with open(fname, 'r', encoding='utf-8') as fd: - for line in fd: - if line[0] == '#': - continue -@@ -155,7 +156,7 @@ class Boards: - key is board.target - value is board - """ -- board_dict = {} -+ board_dict = OrderedDict() - for board in self._boards: - board_dict[board.target] = board - return board_dict -@@ -166,7 +167,7 @@ class Boards: - Returns: - List of Board objects that are marked selected - """ -- board_dict = {} -+ board_dict = OrderedDict() - for board in self._boards: - if board.build_it: - board_dict[board.target] = board -@@ -259,7 +260,7 @@ class Boards: - due to each argument, arranged by argument. - List of errors found - """ -- result = {} -+ result = OrderedDict() - warnings = [] - terms = self._BuildTerms(args) - -diff --git a/tools/buildman/bsettings.py b/tools/buildman/bsettings.py -index 03d7439aa5..0b7208da37 100644 ---- a/tools/buildman/bsettings.py -+++ b/tools/buildman/bsettings.py -@@ -1,9 +1,9 @@ - # SPDX-License-Identifier: GPL-2.0+ - # Copyright (c) 2012 The Chromium OS Authors. - --import ConfigParser -+import configparser - import os --import StringIO -+import io - - - def Setup(fname=''): -@@ -15,20 +15,20 @@ def Setup(fname=''): - global settings - global config_fname - -- settings = ConfigParser.SafeConfigParser() -+ settings = configparser.SafeConfigParser() - if fname is not None: - config_fname = fname - if config_fname == '': - config_fname = '%s/.buildman' % os.getenv('HOME') - if not os.path.exists(config_fname): -- print 'No config file found ~/.buildman\nCreating one...\n' -+ print('No config file found ~/.buildman\nCreating one...\n') - CreateBuildmanConfigFile(config_fname) -- print 'To install tool chains, please use the --fetch-arch option' -+ print('To install tool chains, please use the --fetch-arch option') - if config_fname: - settings.read(config_fname) - - def AddFile(data): -- settings.readfp(StringIO.StringIO(data)) -+ settings.readfp(io.StringIO(data)) - - def GetItems(section): - """Get the items from a section of the config. -@@ -41,7 +41,7 @@ def GetItems(section): - """ - try: - return settings.items(section) -- except ConfigParser.NoSectionError as e: -+ except configparser.NoSectionError as e: - return [] - except: - raise -@@ -68,10 +68,10 @@ def CreateBuildmanConfigFile(config_fname): - try: - f = open(config_fname, 'w') - except IOError: -- print "Couldn't create buildman config file '%s'\n" % config_fname -+ print("Couldn't create buildman config file '%s'\n" % config_fname) - raise - -- print >>f, '''[toolchain] -+ print('''[toolchain] - # name = path - # e.g. x86 = /opt/gcc-4.6.3-nolibc/x86_64-linux - -@@ -93,5 +93,5 @@ openrisc = or1k - # snapper-boards=ENABLE_AT91_TEST=1 - # snapper9260=${snapper-boards} BUILD_TAG=442 - # snapper9g45=${snapper-boards} BUILD_TAG=443 --''' -+''', file=f) - f.close(); -diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py -index fbb236676c..cfbe4c26b1 100644 ---- a/tools/buildman/builder.py -+++ b/tools/buildman/builder.py -@@ -9,7 +9,7 @@ from datetime import datetime, timedelta - import glob - import os - import re --import Queue -+import queue - import shutil - import signal - import string -@@ -92,11 +92,10 @@ u-boot/ source directory - """ - - # Possible build outcomes --OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4) -+OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = list(range(4)) - - # Translate a commit subject into a valid filename (and handle unicode) --trans_valid_chars = string.maketrans('/: ', '---') --trans_valid_chars = trans_valid_chars.decode('latin-1') -+trans_valid_chars = str.maketrans('/: ', '---') - - BASE_CONFIG_FILENAMES = [ - 'u-boot.cfg', 'u-boot-spl.cfg', 'u-boot-tpl.cfg' -@@ -122,8 +121,8 @@ class Config: - def __hash__(self): - val = 0 - for fname in self.config: -- for key, value in self.config[fname].iteritems(): -- print key, value -+ for key, value in self.config[fname].items(): -+ print(key, value) - val = val ^ hash(key) & hash(value) - return val - -@@ -293,8 +292,8 @@ class Builder: - self._re_dtb_warning = re.compile('(.*): Warning .*') - self._re_note = re.compile('(.*):(\d*):(\d*): note: this is the location of the previous.*') - -- self.queue = Queue.Queue() -- self.out_queue = Queue.Queue() -+ self.queue = queue.Queue() -+ self.out_queue = queue.Queue() - for i in range(self.num_threads): - t = builderthread.BuilderThread(self, i, incremental, - per_board_out_dir) -@@ -781,7 +780,7 @@ class Builder: - config = {} - environment = {} - -- for board in boards_selected.itervalues(): -+ for board in boards_selected.values(): - outcome = self.GetBuildOutcome(commit_upto, board.target, - read_func_sizes, read_config, - read_environment) -@@ -814,13 +813,13 @@ class Builder: - tconfig = Config(self.config_filenames, board.target) - for fname in self.config_filenames: - if outcome.config: -- for key, value in outcome.config[fname].iteritems(): -+ for key, value in outcome.config[fname].items(): - tconfig.Add(fname, key, value) - config[board.target] = tconfig - - tenvironment = Environment(board.target) - if outcome.environment: -- for key, value in outcome.environment.iteritems(): -+ for key, value in outcome.environment.items(): - tenvironment.Add(key, value) - environment[board.target] = tenvironment - -@@ -1040,12 +1039,12 @@ class Builder: - - # We now have a list of image size changes sorted by arch - # Print out a summary of these -- for arch, target_list in arch_list.iteritems(): -+ for arch, target_list in arch_list.items(): - # Get total difference for each type - totals = {} - for result in target_list: - total = 0 -- for name, diff in result.iteritems(): -+ for name, diff in result.items(): - if name.startswith('_'): - continue - total += diff -@@ -1250,7 +1249,7 @@ class Builder: - if self._show_unknown: - self.AddOutcome(board_selected, arch_list, unknown_boards, '?', - self.col.MAGENTA) -- for arch, target_list in arch_list.iteritems(): -+ for arch, target_list in arch_list.items(): - Print('%10s: %s' % (arch, target_list)) - self._error_lines += 1 - if better_err: -@@ -1283,13 +1282,13 @@ class Builder: - environment_minus = {} - environment_change = {} - base = tbase.environment -- for key, value in tenvironment.environment.iteritems(): -+ for key, value in tenvironment.environment.items(): - if key not in base: - environment_plus[key] = value -- for key, value in base.iteritems(): -+ for key, value in base.items(): - if key not in tenvironment.environment: - environment_minus[key] = value -- for key, value in base.iteritems(): -+ for key, value in base.items(): - new_value = tenvironment.environment.get(key) - if new_value and value != new_value: - desc = '%s -> %s' % (value, new_value) -@@ -1342,15 +1341,15 @@ class Builder: - config_minus = {} - config_change = {} - base = tbase.config[name] -- for key, value in tconfig.config[name].iteritems(): -+ for key, value in tconfig.config[name].items(): - if key not in base: - config_plus[key] = value - all_config_plus[key] = value -- for key, value in base.iteritems(): -+ for key, value in base.items(): - if key not in tconfig.config[name]: - config_minus[key] = value - all_config_minus[key] = value -- for key, value in base.iteritems(): -+ for key, value in base.items(): - new_value = tconfig.config.get(key) - if new_value and value != new_value: - desc = '%s -> %s' % (value, new_value) -@@ -1368,7 +1367,7 @@ class Builder: - summary[target] = '\n'.join(lines) - - lines_by_target = {} -- for target, lines in summary.iteritems(): -+ for target, lines in summary.items(): - if lines in lines_by_target: - lines_by_target[lines].append(target) - else: -@@ -1392,7 +1391,7 @@ class Builder: - Print('%s:' % arch) - _OutputConfigInfo(lines) - -- for lines, targets in lines_by_target.iteritems(): -+ for lines, targets in lines_by_target.items(): - if not lines: - continue - Print('%s :' % ' '.join(sorted(targets))) -@@ -1463,7 +1462,7 @@ class Builder: - commits: Selected commits to build - """ - # First work out how many commits we will build -- count = (self.commit_count + self._step - 1) / self._step -+ count = (self.commit_count + self._step - 1) // self._step - self.count = len(board_selected) * count - self.upto = self.warned = self.fail = 0 - self._timestamps = collections.deque() -@@ -1566,7 +1565,7 @@ class Builder: - self.ProcessResult(None) - - # Create jobs to build all commits for each board -- for brd in board_selected.itervalues(): -+ for brd in board_selected.values(): - job = builderthread.BuilderJob() - job.board = brd - job.commits = commits -diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py -index 8a9d47cd5e..570c1f6595 100644 ---- a/tools/buildman/builderthread.py -+++ b/tools/buildman/builderthread.py -@@ -28,7 +28,7 @@ def Mkdir(dirname, parents = False): - except OSError as err: - if err.errno == errno.EEXIST: - if os.path.realpath('.') == os.path.realpath(dirname): -- print "Cannot create the current working directory '%s'!" % dirname -+ print("Cannot create the current working directory '%s'!" % dirname) - sys.exit(1) - pass - else: -@@ -291,15 +291,13 @@ class BuilderThread(threading.Thread): - outfile = os.path.join(build_dir, 'log') - with open(outfile, 'w') as fd: - if result.stdout: -- # We don't want unicode characters in log files -- fd.write(result.stdout.decode('UTF-8').encode('ASCII', 'replace')) -+ fd.write(result.stdout) - - errfile = self.builder.GetErrFile(result.commit_upto, - result.brd.target) - if result.stderr: - with open(errfile, 'w') as fd: -- # We don't want unicode characters in log files -- fd.write(result.stderr.decode('UTF-8').encode('ASCII', 'replace')) -+ fd.write(result.stderr) - elif os.path.exists(errfile): - os.remove(errfile) - -@@ -314,17 +312,17 @@ class BuilderThread(threading.Thread): - else: - fd.write('%s' % result.return_code) - with open(os.path.join(build_dir, 'toolchain'), 'w') as fd: -- print >>fd, 'gcc', result.toolchain.gcc -- print >>fd, 'path', result.toolchain.path -- print >>fd, 'cross', result.toolchain.cross -- print >>fd, 'arch', result.toolchain.arch -+ print('gcc', result.toolchain.gcc, file=fd) -+ print('path', result.toolchain.path, file=fd) -+ print('cross', result.toolchain.cross, file=fd) -+ print('arch', result.toolchain.arch, file=fd) - fd.write('%s' % result.return_code) - - # Write out the image and function size information and an objdump - env = result.toolchain.MakeEnvironment(self.builder.full_path) - with open(os.path.join(build_dir, 'env'), 'w') as fd: - for var in sorted(env.keys()): -- print >>fd, '%s="%s"' % (var, env[var]) -+ print('%s="%s"' % (var, env[var]), file=fd) - lines = [] - for fname in ['u-boot', 'spl/u-boot-spl']: - cmd = ['%snm' % self.toolchain.cross, '--size-sort', fname] -@@ -335,7 +333,7 @@ class BuilderThread(threading.Thread): - nm = self.builder.GetFuncSizesFile(result.commit_upto, - result.brd.target, fname) - with open(nm, 'w') as fd: -- print >>fd, nm_result.stdout, -+ print(nm_result.stdout, end=' ', file=fd) - - cmd = ['%sobjdump' % self.toolchain.cross, '-h', fname] - dump_result = command.RunPipe([cmd], capture=True, -@@ -346,7 +344,7 @@ class BuilderThread(threading.Thread): - objdump = self.builder.GetObjdumpFile(result.commit_upto, - result.brd.target, fname) - with open(objdump, 'w') as fd: -- print >>fd, dump_result.stdout, -+ print(dump_result.stdout, end=' ', file=fd) - for line in dump_result.stdout.splitlines(): - fields = line.split() - if len(fields) > 5 and fields[1] == '.rodata': -@@ -378,7 +376,7 @@ class BuilderThread(threading.Thread): - sizes = self.builder.GetSizesFile(result.commit_upto, - result.brd.target) - with open(sizes, 'w') as fd: -- print >>fd, '\n'.join(lines) -+ print('\n'.join(lines), file=fd) - - # Write out the configuration files, with a special case for SPL - for dirname in ['', 'spl', 'tpl']: -diff --git a/tools/buildman/buildman.py b/tools/buildman/buildman.py -index f17aa15e7c..30a8690f93 100755 ---- a/tools/buildman/buildman.py -+++ b/tools/buildman/buildman.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # - # Copyright (c) 2012 The Chromium OS Authors. -@@ -6,6 +6,8 @@ - - """See README for more information""" - -+from __future__ import print_function -+ - import multiprocessing - import os - import re -@@ -46,11 +48,11 @@ def RunTests(skip_net_tests): - suite = unittest.TestLoader().loadTestsFromTestCase(module) - suite.run(result) - -- print result -+ print(result) - for test, err in result.errors: -- print err -+ print(err) - for test, err in result.failures: -- print err -+ print(err) - - - options, args = cmdline.ParseArgs() -diff --git a/tools/buildman/control.py b/tools/buildman/control.py -index 9787b86747..216012d001 100644 ---- a/tools/buildman/control.py -+++ b/tools/buildman/control.py -@@ -30,7 +30,7 @@ def GetActionSummary(is_summary, commits, selected, options): - """ - if commits: - count = len(commits) -- count = (count + options.step - 1) / options.step -+ count = (count + options.step - 1) // options.step - commit_str = '%d commit%s' % (count, GetPlural(count)) - else: - commit_str = 'current source' -@@ -59,31 +59,31 @@ def ShowActions(series, why_selected, boards_selected, builder, options, - board_warnings: List of warnings obtained from board selected - """ - col = terminal.Color() -- print 'Dry run, so not doing much. But I would do this:' -- print -+ print('Dry run, so not doing much. But I would do this:') -+ print() - if series: - commits = series.commits - else: - commits = None -- print GetActionSummary(False, commits, boards_selected, -- options) -- print 'Build directory: %s' % builder.base_dir -+ print(GetActionSummary(False, commits, boards_selected, -+ options)) -+ print('Build directory: %s' % builder.base_dir) - if commits: - for upto in range(0, len(series.commits), options.step): - commit = series.commits[upto] -- print ' ', col.Color(col.YELLOW, commit.hash[:8], bright=False), -- print commit.subject -- print -+ print(' ', col.Color(col.YELLOW, commit.hash[:8], bright=False), end=' ') -+ print(commit.subject) -+ print() - for arg in why_selected: - if arg != 'all': -- print arg, ': %d boards' % len(why_selected[arg]) -+ print(arg, ': %d boards' % len(why_selected[arg])) - if options.verbose: -- print ' %s' % ' '.join(why_selected[arg]) -- print ('Total boards to build for each commit: %d\n' % -- len(why_selected['all'])) -+ print(' %s' % ' '.join(why_selected[arg])) -+ print(('Total boards to build for each commit: %d\n' % -+ len(why_selected['all']))) - if board_warnings: - for warning in board_warnings: -- print col.Color(col.YELLOW, warning) -+ print(col.Color(col.YELLOW, warning)) - - def CheckOutputDir(output_dir): - """Make sure that the output directory is not within the current directory -@@ -146,17 +146,17 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, - if options.fetch_arch: - if options.fetch_arch == 'list': - sorted_list = toolchains.ListArchs() -- print col.Color(col.BLUE, 'Available architectures: %s\n' % -- ' '.join(sorted_list)) -+ print(col.Color(col.BLUE, 'Available architectures: %s\n' % -+ ' '.join(sorted_list))) - return 0 - else: - fetch_arch = options.fetch_arch - if fetch_arch == 'all': - fetch_arch = ','.join(toolchains.ListArchs()) -- print col.Color(col.CYAN, '\nDownloading toolchains: %s' % -- fetch_arch) -+ print(col.Color(col.CYAN, '\nDownloading toolchains: %s' % -+ fetch_arch)) - for arch in fetch_arch.split(','): -- print -+ print() - ret = toolchains.FetchAndInstall(arch) - if ret: - return ret -@@ -167,7 +167,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, - toolchains.Scan(options.list_tool_chains and options.verbose) - if options.list_tool_chains: - toolchains.List() -- print -+ print() - return 0 - - # Work out how many commits to build. We want to build everything on the -@@ -191,7 +191,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, - sys.exit(col.Color(col.RED, "Range '%s' has no commits" % - options.branch)) - if msg: -- print col.Color(col.YELLOW, msg) -+ print(col.Color(col.YELLOW, msg)) - count += 1 # Build upstream commit also - - if not count: -@@ -268,7 +268,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, - options.threads = min(multiprocessing.cpu_count(), len(selected)) - if not options.jobs: - options.jobs = max(1, (multiprocessing.cpu_count() + -- len(selected) - 1) / len(selected)) -+ len(selected) - 1) // len(selected)) - - if not options.step: - options.step = len(series.commits) - 1 -diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py -index f90b8ea7f5..4c3d497294 100644 ---- a/tools/buildman/func_test.py -+++ b/tools/buildman/func_test.py -@@ -270,7 +270,7 @@ class TestFunctional(unittest.TestCase): - stdout=''.join(commit_log[:count])) - - # Not handled, so abort -- print 'git log', args -+ print('git log', args) - sys.exit(1) - - def _HandleCommandGitConfig(self, args): -@@ -286,7 +286,7 @@ class TestFunctional(unittest.TestCase): - stdout='refs/heads/master\n') - - # Not handled, so abort -- print 'git config', args -+ print('git config', args) - sys.exit(1) - - def _HandleCommandGit(self, in_args): -@@ -320,7 +320,7 @@ class TestFunctional(unittest.TestCase): - return command.CommandResult(return_code=0) - - # Not handled, so abort -- print 'git', git_args, sub_cmd, args -+ print('git', git_args, sub_cmd, args) - sys.exit(1) - - def _HandleCommandNm(self, args): -@@ -351,7 +351,7 @@ class TestFunctional(unittest.TestCase): - if pipe_list[1] == ['wc', '-l']: - wc = True - else: -- print 'invalid pipe', kwargs -+ print('invalid pipe', kwargs) - sys.exit(1) - cmd = pipe_list[0][0] - args = pipe_list[0][1:] -@@ -371,7 +371,7 @@ class TestFunctional(unittest.TestCase): - - if not result: - # Not handled, so abort -- print 'unknown command', kwargs -+ print('unknown command', kwargs) - sys.exit(1) - - if wc: -@@ -404,14 +404,14 @@ class TestFunctional(unittest.TestCase): - return command.CommandResult(return_code=0) - - # Not handled, so abort -- print 'make', stage -+ print('make', stage) - sys.exit(1) - - # Example function to print output lines - def print_lines(self, lines): -- print len(lines) -+ print(len(lines)) - for line in lines: -- print line -+ print(line) - #self.print_lines(terminal.GetPrintTestLines()) - - def testNoBoards(self): -diff --git a/tools/buildman/test.py b/tools/buildman/test.py -index ed99b9375c..b4e28d6867 100644 ---- a/tools/buildman/test.py -+++ b/tools/buildman/test.py -@@ -212,11 +212,11 @@ class TestBuild(unittest.TestCase): - self.assertEqual(lines[1].text, '02: %s' % commits[1][1]) - - col = terminal.Color() -- self.assertSummary(lines[2].text, 'sandbox', 'w+', ['board4'], -+ self.assertSummary(lines[2].text, 'arm', 'w+', ['board1'], - outcome=OUTCOME_WARN) -- self.assertSummary(lines[3].text, 'arm', 'w+', ['board1'], -+ self.assertSummary(lines[3].text, 'powerpc', 'w+', ['board2', 'board3'], - outcome=OUTCOME_WARN) -- self.assertSummary(lines[4].text, 'powerpc', 'w+', ['board2', 'board3'], -+ self.assertSummary(lines[4].text, 'sandbox', 'w+', ['board4'], - outcome=OUTCOME_WARN) - - # Second commit: The warnings should be listed -@@ -226,10 +226,10 @@ class TestBuild(unittest.TestCase): - - # Third commit: Still fails - self.assertEqual(lines[6].text, '03: %s' % commits[2][1]) -- self.assertSummary(lines[7].text, 'sandbox', '+', ['board4']) -- self.assertSummary(lines[8].text, 'arm', '', ['board1'], -+ self.assertSummary(lines[7].text, 'arm', '', ['board1'], - outcome=OUTCOME_OK) -- self.assertSummary(lines[9].text, 'powerpc', '+', ['board2', 'board3']) -+ self.assertSummary(lines[8].text, 'powerpc', '+', ['board2', 'board3']) -+ self.assertSummary(lines[9].text, 'sandbox', '+', ['board4']) - - # Expect a compiler error - self.assertEqual(lines[10].text, '+%s' % -@@ -237,8 +237,6 @@ class TestBuild(unittest.TestCase): - - # Fourth commit: Compile errors are fixed, just have warning for board3 - self.assertEqual(lines[11].text, '04: %s' % commits[3][1]) -- self.assertSummary(lines[12].text, 'sandbox', 'w+', ['board4'], -- outcome=OUTCOME_WARN) - expect = '%10s: ' % 'powerpc' - expect += ' ' + col.Color(col.GREEN, '') - expect += ' ' -@@ -246,7 +244,9 @@ class TestBuild(unittest.TestCase): - expect += ' ' + col.Color(col.YELLOW, 'w+') - expect += ' ' - expect += col.Color(col.YELLOW, ' %s' % 'board3') -- self.assertEqual(lines[13].text, expect) -+ self.assertEqual(lines[12].text, expect) -+ self.assertSummary(lines[13].text, 'sandbox', 'w+', ['board4'], -+ outcome=OUTCOME_WARN) - - # Compile error fixed - self.assertEqual(lines[14].text, '-%s' % -@@ -259,9 +259,9 @@ class TestBuild(unittest.TestCase): - - # Fifth commit - self.assertEqual(lines[16].text, '05: %s' % commits[4][1]) -- self.assertSummary(lines[17].text, 'sandbox', '+', ['board4']) -- self.assertSummary(lines[18].text, 'powerpc', '', ['board3'], -+ self.assertSummary(lines[17].text, 'powerpc', '', ['board3'], - outcome=OUTCOME_OK) -+ self.assertSummary(lines[18].text, 'sandbox', '+', ['board4']) - - # The second line of errors[3] is a duplicate, so buildman will drop it - expect = errors[3].rstrip().split('\n') -diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py -index a65737fdf8..cc26e2ede5 100644 ---- a/tools/buildman/toolchain.py -+++ b/tools/buildman/toolchain.py -@@ -4,18 +4,19 @@ - - import re - import glob --from HTMLParser import HTMLParser -+from html.parser import HTMLParser - import os - import sys - import tempfile --import urllib2 -+import urllib.request, urllib.error, urllib.parse - - import bsettings - import command - import terminal -+import tools - - (PRIORITY_FULL_PREFIX, PRIORITY_PREFIX_GCC, PRIORITY_PREFIX_GCC_PATH, -- PRIORITY_CALC) = range(4) -+ PRIORITY_CALC) = list(range(4)) - - # Simple class to collect links from a page - class MyHTMLParser(HTMLParser): -@@ -100,15 +101,15 @@ class Toolchain: - raise_on_error=False) - self.ok = result.return_code == 0 - if verbose: -- print 'Tool chain test: ', -+ print('Tool chain test: ', end=' ') - if self.ok: -- print "OK, arch='%s', priority %d" % (self.arch, -- self.priority) -+ print("OK, arch='%s', priority %d" % (self.arch, -+ self.priority)) - else: -- print 'BAD' -- print 'Command: ', cmd -- print result.stdout -- print result.stderr -+ print('BAD') -+ print('Command: ', cmd) -+ print(result.stdout) -+ print(result.stderr) - else: - self.ok = True - -@@ -138,7 +139,7 @@ class Toolchain: - value = '' - for name, value in bsettings.GetItems('toolchain-wrapper'): - if not value: -- print "Warning: Wrapper not found" -+ print("Warning: Wrapper not found") - if value: - value = value + ' ' - -@@ -227,11 +228,11 @@ class Toolchains: - """ - toolchains = bsettings.GetItems('toolchain') - if show_warning and not toolchains: -- print ("Warning: No tool chains. Please run 'buildman " -+ print(("Warning: No tool chains. Please run 'buildman " - "--fetch-arch all' to download all available toolchains, or " - "add a [toolchain] section to your buildman config file " - "%s. See README for details" % -- bsettings.config_fname) -+ bsettings.config_fname)) - - paths = [] - for name, value in toolchains: -@@ -272,10 +273,10 @@ class Toolchains: - if add_it: - self.toolchains[toolchain.arch] = toolchain - elif verbose: -- print ("Toolchain '%s' at priority %d will be ignored because " -+ print(("Toolchain '%s' at priority %d will be ignored because " - "another toolchain for arch '%s' has priority %d" % - (toolchain.gcc, toolchain.priority, toolchain.arch, -- self.toolchains[toolchain.arch].priority)) -+ self.toolchains[toolchain.arch].priority))) - - def ScanPath(self, path, verbose): - """Scan a path for a valid toolchain -@@ -289,9 +290,9 @@ class Toolchains: - fnames = [] - for subdir in ['.', 'bin', 'usr/bin']: - dirname = os.path.join(path, subdir) -- if verbose: print " - looking in '%s'" % dirname -+ if verbose: print(" - looking in '%s'" % dirname) - for fname in glob.glob(dirname + '/*gcc'): -- if verbose: print " - found '%s'" % fname -+ if verbose: print(" - found '%s'" % fname) - fnames.append(fname) - return fnames - -@@ -321,9 +322,9 @@ class Toolchains: - Args: - verbose: True to print out progress information - """ -- if verbose: print 'Scanning for tool chains' -+ if verbose: print('Scanning for tool chains') - for name, value in self.prefixes: -- if verbose: print " - scanning prefix '%s'" % value -+ if verbose: print(" - scanning prefix '%s'" % value) - if os.path.exists(value): - self.Add(value, True, verbose, PRIORITY_FULL_PREFIX, name) - continue -@@ -335,10 +336,10 @@ class Toolchains: - for f in fname_list: - self.Add(f, True, verbose, PRIORITY_PREFIX_GCC_PATH, name) - if not fname_list: -- raise ValueError, ("No tool chain found for prefix '%s'" % -+ raise ValueError("No tool chain found for prefix '%s'" % - value) - for path in self.paths: -- if verbose: print " - scanning path '%s'" % path -+ if verbose: print(" - scanning path '%s'" % path) - fnames = self.ScanPath(path, verbose) - for fname in fnames: - self.Add(fname, True, verbose) -@@ -346,13 +347,13 @@ class Toolchains: - def List(self): - """List out the selected toolchains for each architecture""" - col = terminal.Color() -- print col.Color(col.BLUE, 'List of available toolchains (%d):' % -- len(self.toolchains)) -+ print(col.Color(col.BLUE, 'List of available toolchains (%d):' % -+ len(self.toolchains))) - if len(self.toolchains): -- for key, value in sorted(self.toolchains.iteritems()): -- print '%-10s: %s' % (key, value.gcc) -+ for key, value in sorted(self.toolchains.items()): -+ print('%-10s: %s' % (key, value.gcc)) - else: -- print 'None' -+ print('None') - - def Select(self, arch): - """Returns the toolchain for a given architecture -@@ -370,7 +371,7 @@ class Toolchains: - return self.toolchains[alias] - - if not arch in self.toolchains: -- raise ValueError, ("No tool chain found for arch '%s'" % arch) -+ raise ValueError("No tool chain found for arch '%s'" % arch) - return self.toolchains[arch] - - def ResolveReferences(self, var_dict, args): -@@ -464,9 +465,9 @@ class Toolchains: - links = [] - for version in versions: - url = '%s/%s/%s/' % (base, arch, version) -- print 'Checking: %s' % url -- response = urllib2.urlopen(url) -- html = response.read() -+ print('Checking: %s' % url) -+ response = urllib.request.urlopen(url) -+ html = tools.ToString(response.read()) - parser = MyHTMLParser(fetch_arch) - parser.feed(html) - if fetch_arch == 'list': -@@ -488,14 +489,14 @@ class Toolchains: - Full path to the downloaded archive file in that directory, - or None if there was an error while downloading - """ -- print 'Downloading: %s' % url -+ print('Downloading: %s' % url) - leaf = url.split('/')[-1] - tmpdir = tempfile.mkdtemp('.buildman') -- response = urllib2.urlopen(url) -+ response = urllib.request.urlopen(url) - fname = os.path.join(tmpdir, leaf) - fd = open(fname, 'wb') - meta = response.info() -- size = int(meta.getheaders('Content-Length')[0]) -+ size = int(meta.get('Content-Length')) - done = 0 - block_size = 1 << 16 - status = '' -@@ -504,19 +505,19 @@ class Toolchains: - while True: - buffer = response.read(block_size) - if not buffer: -- print chr(8) * (len(status) + 1), '\r', -+ print(chr(8) * (len(status) + 1), '\r', end=' ') - break - - done += len(buffer) - fd.write(buffer) -- status = r'%10d MiB [%3d%%]' % (done / 1024 / 1024, -- done * 100 / size) -+ status = r'%10d MiB [%3d%%]' % (done // 1024 // 1024, -+ done * 100 // size) - status = status + chr(8) * (len(status) + 1) -- print status, -+ print(status, end=' ') - sys.stdout.flush() - fd.close() - if done != size: -- print 'Error, failed to download' -+ print('Error, failed to download') - os.remove(fname) - fname = None - return tmpdir, fname -@@ -565,11 +566,11 @@ class Toolchains: - """ - # Fist get the URL for this architecture - col = terminal.Color() -- print col.Color(col.BLUE, "Downloading toolchain for arch '%s'" % arch) -+ print(col.Color(col.BLUE, "Downloading toolchain for arch '%s'" % arch)) - url = self.LocateArchUrl(arch) - if not url: -- print ("Cannot find toolchain for arch '%s' - use 'list' to list" % -- arch) -+ print(("Cannot find toolchain for arch '%s' - use 'list' to list" % -+ arch)) - return 2 - home = os.environ['HOME'] - dest = os.path.join(home, '.buildman-toolchains') -@@ -580,28 +581,28 @@ class Toolchains: - tmpdir, tarfile = self.Download(url) - if not tarfile: - return 1 -- print col.Color(col.GREEN, 'Unpacking to: %s' % dest), -+ print(col.Color(col.GREEN, 'Unpacking to: %s' % dest), end=' ') - sys.stdout.flush() - path = self.Unpack(tarfile, dest) - os.remove(tarfile) - os.rmdir(tmpdir) -- print -+ print() - - # Check that the toolchain works -- print col.Color(col.GREEN, 'Testing') -+ print(col.Color(col.GREEN, 'Testing')) - dirpath = os.path.join(dest, path) - compiler_fname_list = self.ScanPath(dirpath, True) - if not compiler_fname_list: -- print 'Could not locate C compiler - fetch failed.' -+ print('Could not locate C compiler - fetch failed.') - return 1 - if len(compiler_fname_list) != 1: -- print col.Color(col.RED, 'Warning, ambiguous toolchains: %s' % -- ', '.join(compiler_fname_list)) -+ print(col.Color(col.RED, 'Warning, ambiguous toolchains: %s' % -+ ', '.join(compiler_fname_list))) - toolchain = Toolchain(compiler_fname_list[0], True, True) - - # Make sure that it will be found by buildman - if not self.TestSettingsHasPath(dirpath): -- print ("Adding 'download' to config file '%s'" % -- bsettings.config_fname) -+ print(("Adding 'download' to config file '%s'" % -+ bsettings.config_fname)) - bsettings.SetItem('toolchain', 'download', '%s/*/*' % dest) - return 0 - -From patchwork Thu Oct 31 13:42:54 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187484 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) - header.from=chromium.org -Authentication-Results: ozlabs.org; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Update this test to use Python 3 to meet the 2020 deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/dtoc/test_fdt.py | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py -index 028c8cbaa8..3316757e61 100755 ---- a/tools/dtoc/test_fdt.py -+++ b/tools/dtoc/test_fdt.py -@@ -1,4 +1,4 @@ --#!/usr/bin/python -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # Copyright (c) 2018 Google, Inc - # Written by Simon Glass - -From patchwork Thu Oct 31 13:42:55 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187482 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - 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Thu, 31 Oct 2019 06:43:31 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:42:55 -0600 -Message-Id: <20191031134310.3072-6-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 06/17] test_dtoc: Move to use Python 3 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Update this test to use Python 3 to meet the 2020 deadline. - -Also make it executable while we are here. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/dtoc/dtoc.py | 2 +- - tools/dtoc/test_dtoc.py | 1 + - 2 files changed, 2 insertions(+), 1 deletion(-) - mode change 100644 => 100755 tools/dtoc/test_dtoc.py - -diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py -index 514e0dd4a3..b3596a5918 100755 ---- a/tools/dtoc/dtoc.py -+++ b/tools/dtoc/dtoc.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # - # Copyright (C) 2016 Google, Inc -diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py -old mode 100644 -new mode 100755 -index b915b27856..d733b70655 ---- a/tools/dtoc/test_dtoc.py -+++ b/tools/dtoc/test_dtoc.py -@@ -1,3 +1,4 @@ -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # Copyright (c) 2012 The Chromium OS Authors. - # - -From patchwork Thu Oct 31 13:42:56 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187475 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - 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Thu, 31 Oct 2019 06:43:32 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:42:56 -0600 -Message-Id: <20191031134310.3072-7-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 07/17] microcode_tool: Convert to Python 3 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Convert this tool to Python 3 and make it use that, to meet the 2020 -deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/microcode-tool.py | 28 ++++++++++++++-------------- - 1 file changed, 14 insertions(+), 14 deletions(-) - -diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py -index 249a33b8ca..24c02c4fca 100755 ---- a/tools/microcode-tool.py -+++ b/tools/microcode-tool.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # - # Copyright (c) 2014 Google, Inc -@@ -126,15 +126,15 @@ def List(date, microcodes, model): - microcodes: Dict of Microcode objects indexed by name - model: Model string to search for, or None - """ -- print 'Date: %s' % date -+ print('Date: %s' % date) - if model: - mcode_list, tried = FindMicrocode(microcodes, model.lower()) -- print 'Matching models %s:' % (', '.join(tried)) -+ print('Matching models %s:' % (', '.join(tried))) - else: -- print 'All models:' -- mcode_list = [microcodes[m] for m in microcodes.keys()] -+ print('All models:') -+ mcode_list = [microcodes[m] for m in list(microcodes.keys())] - for mcode in mcode_list: -- print '%-20s: model %s' % (mcode.name, mcode.model) -+ print('%-20s: model %s' % (mcode.name, mcode.model)) - - def FindMicrocode(microcodes, model): - """Find all the microcode chunks which match the given model. -@@ -164,7 +164,7 @@ def FindMicrocode(microcodes, model): - for i in range(3): - abbrev = model[:-i] if i else model - tried.append(abbrev) -- for mcode in microcodes.values(): -+ for mcode in list(microcodes.values()): - if mcode.model.startswith(abbrev): - found.append(mcode) - if found: -@@ -229,17 +229,17 @@ data = <%s - args += [mcode.words[i] for i in range(7)] - args.append(words) - if outfile == '-': -- print out % tuple(args) -+ print(out % tuple(args)) - else: - if not outfile: - if not os.path.exists(MICROCODE_DIR): -- print >> sys.stderr, "Creating directory '%s'" % MICROCODE_DIR -+ print("Creating directory '%s'" % MICROCODE_DIR, file=sys.stderr) - os.makedirs(MICROCODE_DIR) - outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi') -- print >> sys.stderr, "Writing microcode for '%s' to '%s'" % ( -- ', '.join([mcode.name for mcode in mcodes]), outfile) -+ print("Writing microcode for '%s' to '%s'" % ( -+ ', '.join([mcode.name for mcode in mcodes]), outfile), file=sys.stderr) - with open(outfile, 'w') as fd: -- print >> fd, out % tuple(args) -+ print(out % tuple(args), file=fd) - - def MicrocodeTool(): - """Run the microcode tool""" -@@ -289,14 +289,14 @@ def MicrocodeTool(): - if cmd == 'list': - List(date, microcodes, options.model) - elif cmd == 'license': -- print '\n'.join(license_text) -+ print('\n'.join(license_text)) - elif cmd == 'create': - if not options.model: - parser.error('You must specify a model to create') - model = options.model.lower() - if options.model == 'all': - options.multiple = True -- mcode_list = microcodes.values() -+ mcode_list = list(microcodes.values()) - tried = [] - else: - mcode_list, tried = FindMicrocode(microcodes, model) - -From patchwork Thu Oct 31 13:42:57 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187479 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Convert this tool to Python 3 and make it use that, to meet the 2020 -deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/moveconfig.py | 82 ++++++++++++++++++++++----------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - -diff --git a/tools/moveconfig.py b/tools/moveconfig.py -index b99417e9d6..e2ff4cfc88 100755 ---- a/tools/moveconfig.py -+++ b/tools/moveconfig.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - # - # Author: Masahiro Yamada -@@ -304,7 +304,7 @@ import glob - import multiprocessing - import optparse - import os --import Queue -+import queue - import re - import shutil - import subprocess -@@ -450,8 +450,8 @@ def get_matched_defconfigs(defconfigs_file): - line = line.split(' ')[0] # handle 'git log' input - matched = get_matched_defconfig(line) - if not matched: -- print >> sys.stderr, "warning: %s:%d: no defconfig matched '%s'" % \ -- (defconfigs_file, i + 1, line) -+ print("warning: %s:%d: no defconfig matched '%s'" % \ -+ (defconfigs_file, i + 1, line), file=sys.stderr) - - defconfigs += matched - -@@ -494,11 +494,11 @@ def show_diff(a, b, file_path, color_enabled): - - for line in diff: - if line[0] == '-' and line[1] != '-': -- print color_text(color_enabled, COLOR_RED, line), -+ print(color_text(color_enabled, COLOR_RED, line), end=' ') - elif line[0] == '+' and line[1] != '+': -- print color_text(color_enabled, COLOR_GREEN, line), -+ print(color_text(color_enabled, COLOR_GREEN, line), end=' ') - else: -- print line, -+ print(line, end=' ') - - def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre, - extend_post): -@@ -554,9 +554,9 @@ def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre - def confirm(options, prompt): - if not options.yes: - while True: -- choice = raw_input('{} [y/n]: '.format(prompt)) -+ choice = input('{} [y/n]: '.format(prompt)) - choice = choice.lower() -- print choice -+ print(choice) - if choice == 'y' or choice == 'n': - break - -@@ -809,10 +809,10 @@ def try_expand(line): - val= val.strip('\"') - if re.search("[*+-/]|<<|SZ_+|\(([^\)]+)\)", val): - newval = hex(eval(val, SIZES)) -- print "\tExpanded expression %s to %s" % (val, newval) -+ print("\tExpanded expression %s to %s" % (val, newval)) - return cfg+'='+newval - except: -- print "\tFailed to expand expression in %s" % line -+ print("\tFailed to expand expression in %s" % line) - - return line - -@@ -838,7 +838,7 @@ class Progress: - - def show(self): - """Display the progress.""" -- print ' %d defconfigs out of %d\r' % (self.current, self.total), -+ print(' %d defconfigs out of %d\r' % (self.current, self.total), end=' ') - sys.stdout.flush() - - -@@ -1236,7 +1236,7 @@ class Slot: - "Tool chain for '%s' is missing. Do nothing.\n" % arch) - self.finish(False) - return -- env = toolchain.MakeEnvironment(False) -+ env = toolchain.MakeEnvironment(False) - - cmd = list(self.make_cmd) - cmd.append('KCONFIG_IGNORE_DUPLICATES=1') -@@ -1312,7 +1312,7 @@ class Slot: - log += '\n'.join([ ' ' + s for s in self.log.split('\n') ]) - # Some threads are running in parallel. - # Print log atomically to not mix up logs from different threads. -- print >> (sys.stdout if success else sys.stderr), log -+ print(log, file=(sys.stdout if success else sys.stderr)) - - if not success: - if self.options.exit_on_error: -@@ -1411,8 +1411,8 @@ class Slots: - msg = "The following boards were not processed due to error:\n" - msg += boards - msg += "(the list has been saved in %s)\n" % output_file -- print >> sys.stderr, color_text(self.options.color, COLOR_LIGHT_RED, -- msg) -+ print(color_text(self.options.color, COLOR_LIGHT_RED, -+ msg), file=sys.stderr) - - with open(output_file, 'w') as f: - f.write(boards) -@@ -1431,8 +1431,8 @@ class Slots: - msg += "It is highly recommended to check them manually:\n" - msg += boards - msg += "(the list has been saved in %s)\n" % output_file -- print >> sys.stderr, color_text(self.options.color, COLOR_YELLOW, -- msg) -+ print(color_text(self.options.color, COLOR_YELLOW, -+ msg), file=sys.stderr) - - with open(output_file, 'w') as f: - f.write(boards) -@@ -1448,11 +1448,11 @@ class ReferenceSource: - commit: commit to git-clone - """ - self.src_dir = tempfile.mkdtemp() -- print "Cloning git repo to a separate work directory..." -+ print("Cloning git repo to a separate work directory...") - subprocess.check_output(['git', 'clone', os.getcwd(), '.'], - cwd=self.src_dir) -- print "Checkout '%s' to build the original autoconf.mk." % \ -- subprocess.check_output(['git', 'rev-parse', '--short', commit]).strip() -+ print("Checkout '%s' to build the original autoconf.mk." % \ -+ subprocess.check_output(['git', 'rev-parse', '--short', commit]).strip()) - subprocess.check_output(['git', 'checkout', commit], - stderr=subprocess.STDOUT, cwd=self.src_dir) - -@@ -1480,14 +1480,14 @@ def move_config(toolchains, configs, options, db_queue): - """ - if len(configs) == 0: - if options.force_sync: -- print 'No CONFIG is specified. You are probably syncing defconfigs.', -+ print('No CONFIG is specified. You are probably syncing defconfigs.', end=' ') - elif options.build_db: -- print 'Building %s database' % CONFIG_DATABASE -+ print('Building %s database' % CONFIG_DATABASE) - else: -- print 'Neither CONFIG nor --force-sync is specified. Nothing will happen.', -+ print('Neither CONFIG nor --force-sync is specified. Nothing will happen.', end=' ') - else: -- print 'Move ' + ', '.join(configs), -- print '(jobs: %d)\n' % options.jobs -+ print('Move ' + ', '.join(configs), end=' ') -+ print('(jobs: %d)\n' % options.jobs) - - if options.git_ref: - reference_src = ReferenceSource(options.git_ref) -@@ -1517,7 +1517,7 @@ def move_config(toolchains, configs, options, db_queue): - while not slots.empty(): - time.sleep(SLEEP_TIME) - -- print '' -+ print('') - slots.show_failed_boards() - slots.show_suspicious_boards() - -@@ -1691,15 +1691,15 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, - for config in config_list: - defconfigs = defconfig_db.get(config) - if not defconfigs: -- print '%s not found in any defconfig' % config -+ print('%s not found in any defconfig' % config) - continue - - # Get the set of defconfigs without this one (since a config cannot - # imply itself) - non_defconfigs = all_defconfigs - defconfigs - num_defconfigs = len(defconfigs) -- print '%s found in %d/%d defconfigs' % (config, num_defconfigs, -- len(all_configs)) -+ print('%s found in %d/%d defconfigs' % (config, num_defconfigs, -+ len(all_configs))) - - # This will hold the results: key=config, value=defconfigs containing it - imply_configs = {} -@@ -1736,7 +1736,7 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, - if common_defconfigs: - skip = False - if find_superset: -- for prev in imply_configs.keys(): -+ for prev in list(imply_configs.keys()): - prev_count = len(imply_configs[prev]) - count = len(common_defconfigs) - if (prev_count > count and -@@ -1806,15 +1806,15 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, - add_list[fname].append(linenum) - - if show and kconfig_info != 'skip': -- print '%5d : %-30s%-25s %s' % (num_common, iconfig.ljust(30), -- kconfig_info, missing_str) -+ print('%5d : %-30s%-25s %s' % (num_common, iconfig.ljust(30), -+ kconfig_info, missing_str)) - - # Having collected a list of things to add, now we add them. We process - # each file from the largest line number to the smallest so that - # earlier additions do not affect our line numbers. E.g. if we added an - # imply at line 20 it would change the position of each line after - # that. -- for fname, linenums in add_list.iteritems(): -+ for fname, linenums in add_list.items(): - for linenum in sorted(linenums, reverse=True): - add_imply_rule(config[CONFIG_LEN:], fname, linenum) - -@@ -1891,11 +1891,11 @@ def main(): - for flag in options.imply_flags.split(','): - bad = flag not in IMPLY_FLAGS - if bad: -- print "Invalid flag '%s'" % flag -+ print("Invalid flag '%s'" % flag) - if flag == 'help' or bad: -- print "Imply flags: (separate with ',')" -- for name, info in IMPLY_FLAGS.iteritems(): -- print ' %-15s: %s' % (name, info[1]) -+ print("Imply flags: (separate with ',')") -+ for name, info in IMPLY_FLAGS.items(): -+ print(' %-15s: %s' % (name, info[1])) - parser.print_usage() - sys.exit(1) - imply_flags |= IMPLY_FLAGS[flag][0] -@@ -1905,14 +1905,14 @@ def main(): - return - - config_db = {} -- db_queue = Queue.Queue() -+ db_queue = queue.Queue() - t = DatabaseThread(config_db, db_queue) - t.setDaemon(True) - t.start() - - if not options.cleanup_headers_only: - check_clean_directory() -- bsettings.Setup('') -+ bsettings.Setup('') - toolchains = toolchain.Toolchains() - toolchains.GetSettings() - toolchains.Scan(verbose=False) -@@ -1939,7 +1939,7 @@ def main(): - - if options.build_db: - with open(CONFIG_DATABASE, 'w') as fd: -- for defconfig, configs in config_db.iteritems(): -+ for defconfig, configs in config_db.items(): - fd.write('%s\n' % defconfig) - for config in sorted(configs.keys()): - fd.write(' %s=%s\n' % (config, configs[config])) - -From patchwork Thu Oct 31 13:42:58 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187471 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Convert this tool to Python 3 and make it use that, to meet the 2020 -deadline. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/rkmux.py | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/tools/rkmux.py b/tools/rkmux.py -index 11c192a073..1226ee201c 100755 ---- a/tools/rkmux.py -+++ b/tools/rkmux.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - - # Script to create enums from datasheet register tables - # -@@ -43,8 +43,8 @@ class RegField: - self.desc.append(desc) - - def Show(self): -- print self -- print -+ print(self) -+ print() - self.__init__() - - def __str__(self): -@@ -65,11 +65,11 @@ class Printer: - self.output_footer() - - def output_header(self): -- print '/* %s */' % self.name -- print 'enum {' -+ print('/* %s */' % self.name) -+ print('enum {') - - def output_footer(self): -- print '};'; -+ print('};'); - - def output_regfield(self, regfield): - lines = regfield.desc -@@ -97,7 +97,7 @@ class Printer: - self.first = False - self.output_header() - else: -- print -+ print() - out_enum(field, 'shift', bit_low) - out_enum(field, 'mask', mask) - next_val = -1 -@@ -175,7 +175,7 @@ def out_enum(field, suffix, value, skip_val=False): - val_str = '%d' % value - - str += '%s= %s' % ('\t' * tabs, val_str) -- print '\t%s,' % str -+ print('\t%s,' % str) - - # Process a CSV file, e.g. from tabula - def process_csv(name, fd): - -From patchwork Thu Oct 31 13:42:59 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187489 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Build this swig module with Python 3. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - scripts/dtc/pylibfdt/Makefile | 2 +- - scripts/dtc/pylibfdt/libfdt.i_shipped | 2 +- - scripts/dtc/pylibfdt/setup.py | 2 +- - tools/binman/entry.py | 16 ++-------------- - tools/binman/entry_test.py | 15 --------------- - tools/binman/etype/intel_fit.py | 2 +- - 6 files changed, 6 insertions(+), 33 deletions(-) - -diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile -index 15e66ad44d..42342c75bb 100644 ---- a/scripts/dtc/pylibfdt/Makefile -+++ b/scripts/dtc/pylibfdt/Makefile -@@ -21,7 +21,7 @@ quiet_cmd_pymod = PYMOD $@ - CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \ - SOURCES="$(PYLIBFDT_srcs)" \ - SWIG_OPTS="-I$(LIBFDT_srcdir) -I$(LIBFDT_srcdir)/.." \ -- $(PYTHON2) $< --quiet build_ext --inplace -+ $(PYTHON3) $< --quiet build_ext --inplace - - $(obj)/_libfdt.so: $(src)/setup.py $(PYLIBFDT_srcs) FORCE - $(call if_changed,pymod) -diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped -index 76e61e98bd..53b70f8f5e 100644 ---- a/scripts/dtc/pylibfdt/libfdt.i_shipped -+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped -@@ -624,7 +624,7 @@ class Fdt(FdtRo): - Raises: - FdtException if no parent found or other error occurs - """ -- val = val.encode('utf-8') + '\0' -+ val = val.encode('utf-8') + b'\0' - return check_err(fdt_setprop(self._fdt, nodeoffset, prop_name, - val, len(val)), quiet) - -diff --git a/scripts/dtc/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py -index 4f7cf042bf..992cdec30f 100755 ---- a/scripts/dtc/pylibfdt/setup.py -+++ b/scripts/dtc/pylibfdt/setup.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - - """ - setup.py file for SWIG libfdt -diff --git a/tools/binman/entry.py b/tools/binman/entry.py -index 409c0dca93..5bf5be4794 100644 ---- a/tools/binman/entry.py -+++ b/tools/binman/entry.py -@@ -7,16 +7,7 @@ - from __future__ import print_function - - from collections import namedtuple -- --# importlib was introduced in Python 2.7 but there was a report of it not --# working in 2.7.12, so we work around this: --# http://lists.denx.de/pipermail/u-boot/2016-October/269729.html --try: -- import importlib -- have_importlib = True --except: -- have_importlib = False -- -+import importlib - import os - import sys - -@@ -119,10 +110,7 @@ class Entry(object): - old_path = sys.path - sys.path.insert(0, os.path.join(our_path, 'etype')) - try: -- if have_importlib: -- module = importlib.import_module(module_name) -- else: -- module = __import__(module_name) -+ module = importlib.import_module(module_name) - except ImportError as e: - raise ValueError("Unknown entry type '%s' in node '%s' (expected etype/%s.py, error '%s'" % - (etype, node_path, module_name, e)) -diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py -index 13f5864516..277e10b585 100644 ---- a/tools/binman/entry_test.py -+++ b/tools/binman/entry_test.py -@@ -39,21 +39,6 @@ class TestEntry(unittest.TestCase): - else: - import entry - -- def test1EntryNoImportLib(self): -- """Test that we can import Entry subclassess successfully""" -- sys.modules['importlib'] = None -- global entry -- self._ReloadEntry() -- entry.Entry.Create(None, self.GetNode(), 'u-boot') -- self.assertFalse(entry.have_importlib) -- -- def test2EntryImportLib(self): -- del sys.modules['importlib'] -- global entry -- self._ReloadEntry() -- entry.Entry.Create(None, self.GetNode(), 'u-boot-spl') -- self.assertTrue(entry.have_importlib) -- - def testEntryContents(self): - """Test the Entry bass class""" - import entry -diff --git a/tools/binman/etype/intel_fit.py b/tools/binman/etype/intel_fit.py -index 23606d27d0..2a34a05f95 100644 ---- a/tools/binman/etype/intel_fit.py -+++ b/tools/binman/etype/intel_fit.py -@@ -27,6 +27,6 @@ class Entry_intel_fit(Entry_blob): - self.align = 16 - - def ObtainContents(self): -- data = struct.pack('<8sIHBB', '_FIT_ ', 1, 0x100, 0x80, 0x7d) -+ data = struct.pack('<8sIHBB', b'_FIT_ ', 1, 0x100, 0x80, 0x7d) - self.SetContents(data) - return True - -From patchwork Thu Oct 31 13:43:00 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187488 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) - header.from=chromium.org -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (1024-bit key; - unprotected) header.d=chromium.org header.i=@chromium.org - header.b="Npge7mOt"; dkim-atps=neutral -Received: from lists.denx.de (dione.denx.de [81.169.180.215]) - by ozlabs.org (Postfix) with ESMTP id 473msb5mnMz9s7T - for ; - Fri, 1 Nov 2019 00:49:55 +1100 (AEDT) -Received: by lists.denx.de (Postfix, from userid 105) - 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Thu, 31 Oct 2019 06:43:35 -0700 (PDT) -Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) - by smtp.gmail.com with ESMTPSA id - s70sm539612ili.13.2019.10.31.06.43.35 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 31 Oct 2019 06:43:35 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:43:00 -0600 -Message-Id: <20191031134310.3072-11-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 11/17] pylibfdt: Sync up with upstream -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -Sync up the libfdt Python bindings with upstream, commit: - -430419c (tests: fix some python warnings) - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - scripts/dtc/pylibfdt/libfdt.i_shipped | 45 ++++++++++++++++++++------- - 1 file changed, 33 insertions(+), 12 deletions(-) - -diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped -index 53b70f8f5e..e2aa7bb01e 100644 ---- a/scripts/dtc/pylibfdt/libfdt.i_shipped -+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped -@@ -92,7 +92,7 @@ def check_err(val, quiet=()): - Raises - FdtException if val < 0 - """ -- if val < 0: -+ if isinstance(val, int) and val < 0: - if -val not in quiet: - raise FdtException(val) - return val -@@ -417,7 +417,7 @@ class FdtRo(object): - quiet) - if isinstance(pdata, (int)): - return pdata -- return Property(prop_name, bytearray(pdata[0])) -+ return Property(prop_name, bytes(pdata[0])) - - def get_phandle(self, nodeoffset): - """Get the phandle of a node -@@ -431,6 +431,18 @@ class FdtRo(object): - """ - return fdt_get_phandle(self._fdt, nodeoffset) - -+ def get_alias(self, name): -+ """Get the full path referenced by a given alias -+ -+ Args: -+ name: name of the alias to lookup -+ -+ Returns: -+ Full path to the node for the alias named 'name', if it exists -+ None, if the given alias or the /aliases node does not exist -+ """ -+ return fdt_get_alias(self._fdt, name) -+ - def parent_offset(self, nodeoffset, quiet=()): - """Get the offset of a node's parent - -@@ -727,8 +739,10 @@ class FdtSw(FdtRo): - - # First create the device tree with a node and property: - sw = FdtSw() -- with sw.add_node('node'): -- sw.property_u32('reg', 2) -+ sw.finish_reservemap() -+ with sw.add_node(''): -+ with sw.add_node('node'): -+ sw.property_u32('reg', 2) - fdt = sw.as_fdt() - - # Now we can use it as a real device tree -@@ -1029,17 +1043,24 @@ typedef uint32_t fdt32_t; - if (!$1) - $result = Py_None; - else -- $result = Py_BuildValue("s#", $1, *arg4); -+ %#if PY_VERSION_HEX >= 0x03000000 -+ $result = Py_BuildValue("y#", $1, *arg4); -+ %#else -+ $result = Py_BuildValue("s#", $1, *arg4); -+ %#endif - } - - /* typemap used for fdt_setprop() */ - %typemap(in) (const void *val) { -- $1 = PyString_AsString($input); /* char *str */ --} -- --/* typemap used for fdt_add_reservemap_entry() */ --%typemap(in) uint64_t { -- $1 = PyLong_AsUnsignedLong($input); -+ %#if PY_VERSION_HEX >= 0x03000000 -+ if (!PyBytes_Check($input)) { -+ SWIG_exception_fail(SWIG_TypeError, "bytes expected in method '" "$symname" -+ "', argument " "$argnum"" of type '" "$type""'"); -+ } -+ $1 = PyBytes_AsString($input); -+ %#else -+ $1 = PyString_AsString($input); /* char *str */ -+ %#endif - } - - /* typemaps used for fdt_next_node() */ -@@ -1061,7 +1082,7 @@ typedef uint32_t fdt32_t; - } - - %typemap(argout) uint64_t * { -- PyObject *val = PyLong_FromUnsignedLong(*arg$argnum); -+ PyObject *val = PyLong_FromUnsignedLongLong(*arg$argnum); - if (!result) { - if (PyTuple_GET_SIZE(resultobj) == 0) - resultobj = val; - -From patchwork Thu Oct 31 13:43:01 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187497 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 31 Oct 2019 06:43:36 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Date: Thu, 31 Oct 2019 07:43:01 -0600 -Message-Id: <20191031134310.3072-12-sjg@chromium.org> -X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog -In-Reply-To: <20191031134310.3072-1-sjg@chromium.org> -References: <20191031134310.3072-1-sjg@chromium.org> -MIME-Version: 1.0 -Cc: Tom Rini -Subject: [U-Boot] [PATCH v2 12/17] pylibfdt: Correct the type for - fdt_property_stub() -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.18 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This function should use a void * type, not char *. This causes an error: - -TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *' - -Fix it. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - scripts/dtc/pylibfdt/libfdt.i_shipped | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped -index e2aa7bb01e..fae0b27d7d 100644 ---- a/scripts/dtc/pylibfdt/libfdt.i_shipped -+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped -@@ -18,7 +18,7 @@ - * a struct called fdt_property. That struct causes swig to create a class in - * libfdt.py called fdt_property(), which confuses things. - */ --static int fdt_property_stub(void *fdt, const char *name, const char *val, -+static int fdt_property_stub(void *fdt, const char *name, const void *val, - int len) - { - return fdt_property(fdt, name, val, len); -@@ -1113,6 +1113,6 @@ int fdt_property_cell(void *fdt, const char *name, uint32_t val); - * This function has a stub since the name fdt_property is used for both a - * function and a struct, which confuses SWIG. - */ --int fdt_property_stub(void *fdt, const char *name, const char *val, int len); -+int fdt_property_stub(void *fdt, const char *name, const void *val, int len); - - %include <../libfdt/libfdt.h> - -From patchwork Thu Oct 31 13:43:02 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187485 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Remember this -so that it can be used when needed. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/binman/entry.py | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/tools/binman/entry.py b/tools/binman/entry.py -index 5bf5be4794..b6f1b2c93f 100644 ---- a/tools/binman/entry.py -+++ b/tools/binman/entry.py -@@ -47,6 +47,8 @@ class Entry(object): - offset: Offset of entry within the section, None if not known yet (in - which case it will be calculated by Pack()) - size: Entry size in bytes, None if not known -+ pre_reset_size: size as it was before ResetForPack(). This allows us to -+ keep track of the size we started with and detect size changes - uncomp_size: Size of uncompressed data in bytes, if the entry is - compressed, else None - contents_size: Size of contents in bytes, 0 by default -@@ -71,6 +73,7 @@ class Entry(object): - self.name = node and (name_prefix + node.name) or 'none' - self.offset = None - self.size = None -+ self.pre_reset_size = None - self.uncomp_size = None - self.data = None - self.contents_size = 0 -@@ -314,6 +317,7 @@ class Entry(object): - self.Detail('ResetForPack: offset %s->%s, size %s->%s' % - (ToHex(self.offset), ToHex(self.orig_offset), - ToHex(self.size), ToHex(self.orig_size))) -+ self.pre_reset_size = self.size - self.offset = self.orig_offset - self.size = self.orig_size - -@@ -757,7 +761,10 @@ features to produce new behaviours. - True if the data did not result in a resize of this entry, False if - the entry must be resized - """ -- self.contents_size = self.size -+ if self.size is not None: -+ self.contents_size = self.size -+ else: -+ self.contents_size = self.pre_reset_size - ok = self.ProcessContentsUpdate(data) - self.Detail('WriteData: size=%x, ok=%s' % (len(data), ok)) - section_ok = self.section.WriteChildData(self) - -From patchwork Thu Oct 31 13:43:03 2019 -Content-Type: text/plain; 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Convert -then. - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - tools/binman/ftest.py | 14 +++++++------- - 1 file changed, 7 insertions(+), 7 deletions(-) - -diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py -index 88daaf20a8..5ca1c073f2 100644 ---- a/tools/binman/ftest.py -+++ b/tools/binman/ftest.py -@@ -2109,7 +2109,7 @@ class TestFunctional(unittest.TestCase): - data = self.data = self._DoReadFileRealDtb('115_fdtmap.dts') - fdtmap_data = data[len(U_BOOT_DATA):] - magic = fdtmap_data[:8] -- self.assertEqual('_FDTMAP_', magic) -+ self.assertEqual(b'_FDTMAP_', magic) - self.assertEqual(tools.GetBytes(0, 8), fdtmap_data[8:16]) - - fdt_data = fdtmap_data[16:] -@@ -2152,7 +2152,7 @@ class TestFunctional(unittest.TestCase): - dtb = fdt.Fdt.FromData(fdt_data) - fdt_size = dtb.GetFdtObj().totalsize() - hdr_data = data[-8:] -- self.assertEqual('BinM', hdr_data[:4]) -+ self.assertEqual(b'BinM', hdr_data[:4]) - offset = struct.unpack(' -X-Patchwork-Id: 1187499 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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I will investigate. - -Signed-off-by: Simon Glass ---- - -Changes in v2: -- Add a few more patches to correct remaining problems - - tools/binman/binman.py | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tools/binman/binman.py b/tools/binman/binman.py -index 8bd5868df2..9e6fd72117 100755 ---- a/tools/binman/binman.py -+++ b/tools/binman/binman.py -@@ -1,4 +1,4 @@ --#!/usr/bin/env python2 -+#!/usr/bin/env python3 - # SPDX-License-Identifier: GPL-2.0+ - - # Copyright (c) 2016 Google, Inc - -From patchwork Thu Oct 31 13:43:06 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1187495 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.denx.de - (client-ip=81.169.180.215; helo=lists.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" - -This is a test to see if it removes the error here: - -https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/jobs/24304 - -Signed-off-by: Simon Glass ---- - -Changes in v2: None - - .gitlab-ci.yml | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml -index 9b295ac710..acbd1207c0 100644 ---- a/.gitlab-ci.yml -+++ b/.gitlab-ci.yml -@@ -73,7 +73,7 @@ build all 64bit ARM platforms: - tags: [ 'all' ] - stage: world build - script: -- - virtualenv /tmp/venv -+ - virtualenv -p /usr/bin/python3 /tmp/venv - - . /tmp/venv/bin/activate - - pip install pyelftools - - ret=0; -@@ -158,7 +158,7 @@ Run binman, buildman, dtoc and patman testsuites: - - git config --global user.name "GitLab CI Runner"; - git config --global user.email trini@konsulko.com; - export USER=gitlab; -- virtualenv /tmp/venv; -+ virtualenv -p /usr/bin/python3 /tmp/venv; - . /tmp/venv/bin/activate; - pip install pyelftools; - export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl; diff --git a/sources b/sources index da03e28..67db9e6 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01-rc1.tar.bz2) = f376101af005423bbfdb20b1563662ef208fb2c2cac000a2796e67e90e17acd1f422f5e60ccaee8d7a4723faf306e254571dcc3222c32821ace3b379f83b6f09 +SHA512 (u-boot-2020.01-rc2.tar.bz2) = c03acd2192b75245387d470b549dbb401549e006400974439a3b13f2efc089f3508eda9bc01d30cd3ceddfb599f3121f0da6e686a007224a34a00b2fb5c533e9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 1ce36ed..3df9709 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2020.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,11 +26,10 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch9: rockchip-rk3399-rock960-Update-config-for-TPL.patch -Patch10: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch -Patch11: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch -Patch12: fdt-Switch-to-the-latest-libfdt-sort-of.patch -Patch13: scripts-Convert-to-Python-3.patch +Patch10: 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch +Patch11: 0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch +Patch12: 0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch +Patch13: 0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch Patch14: tools-fix-version.h.patch BuildRequires: bc @@ -268,6 +267,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Nov 12 2019 Peter Robinson 2020.01-0.3 +- 2020.01 RC2 + * Tue Nov 5 2019 Peter Robinson 2020.01-0.2 - Include new ATF 2.2 From 33f60458f61c247e0b57b6ec1bbf83e08c703f7b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 19 Nov 2019 09:22:48 +0000 Subject: [PATCH 051/351] 2020.01 RC3 --- ...rk3399-rock960-Update-config-for-TPL.patch | 56 ------ ...399-move-the-u-boot-dm-pre-reloc-to-.patch | 174 ------------------ ...399-evb-move-u-boot-spl-boot-order-t.patch | 44 ----- ...399-firefly-move-u-boot-spl-boot-ord.patch | 43 ----- sources | 2 +- uboot-tools.spec | 19 +- 6 files changed, 10 insertions(+), 328 deletions(-) delete mode 100644 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch delete mode 100644 0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch delete mode 100644 0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch delete mode 100644 0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch diff --git a/0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch b/0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch deleted file mode 100644 index 22b0ba8..0000000 --- a/0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 28d382273445e8961fb8726aa5e78b3a47c60b7e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 12 Nov 2019 09:15:21 +0000 -Subject: [PATCH 1/4] rockchip: rk3399: rock960: Update config for TPL - -The SPL is now running at SDRAM, and 0x10000 is used by BL31, -and the ARM SPL do not support relocate now, we need reserved -0x50000 so that it won't overwrite the code when we load the -bl31 to target space. -We should remove this after we enable the relocate feature. - -The SPL need malloc 0x9000 for MMC as buffer used for transfer -data to IRAM(The EMMC DMA can not transfer data to IRAM directly). - -Signed-off-by: Peter Robinson ---- - configs/rock960-rk3399_defconfig | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 0d6c55ce74..6dcea04b67 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -2,18 +2,19 @@ CONFIG_ARM=y - CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 - CONFIG_ROCKCHIP_RK3399=y --CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 - CONFIG_TARGET_ROCK960_RK3399=y - CONFIG_DEBUG_UART_BASE=0xFF1A0000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_DEBUG_UART=y --CONFIG_SPL_TEXT_BASE=0xff8c2000 - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" - # CONFIG_DISPLAY_CPUINFO is not set - CONFIG_DISPLAY_BOARDINFO_LATE=y - # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set - CONFIG_SPL_STACK_R=y --CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_TPL=y - CONFIG_SYS_PROMPT="rock960 => " - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y -@@ -55,4 +56,6 @@ CONFIG_USB_ETHER_ASIX88179=y - CONFIG_USB_ETHER_MCS7830=y - CONFIG_USB_ETHER_RTL8152=y - CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_USE_TINY_PRINTF=y -+CONFIG_SPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y --- -2.23.0 - diff --git a/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch b/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch deleted file mode 100644 index d0e4186..0000000 --- a/0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 230d1e7031d5b5ade3ce50b301fbd144d2fbdc12 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 9 Nov 2019 20:07:24 +0000 -Subject: [PATCH 2/4] rockchip: dts: rk3399: move the u-boot,dm-pre-reloc to - the u-boot.dtsi - -The u-boot specific pieces in the dts files should be in u-boot.dtsi -not the main files, this allows easier sync with upstream. The -rk3399.dtsi has a mix of both so move them all for consistency. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-u-boot.dtsi | 44 +++++++++++++++++++++++++++++++++ - arch/arm/dts/rk3399.dtsi | 11 --------- - 2 files changed, 44 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index 2738a3889e..410e9d452e 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -3,10 +3,46 @@ - * Copyright (C) 2019 Jagan Teki - */ - -+&cic { -+ u-boot,dm-pre-reloc; -+}; -+ -+&cru { -+ u-boot,dm-pre-reloc; -+}; -+ -+&dmc { -+ u-boot,dm-pre-reloc; -+}; -+ -+&grf { -+ u-boot,dm-pre-reloc; -+}; -+ -+&pinctrl { -+ u-boot,dm-pre-reloc; -+}; -+ -+&pmu { -+ u-boot,dm-pre-reloc; -+}; -+ - &pmu { - u-boot,dm-pre-reloc; - }; - -+&pmucru { -+ u-boot,dm-pre-reloc; -+}; -+ -+&pmusgrf { -+ u-boot,dm-pre-reloc; -+}; -+ -+&sdhci { -+ u-boot,dm-pre-reloc; -+}; -+ - &sdmmc { - u-boot,dm-pre-reloc; - }; -@@ -22,3 +58,11 @@ - &uart2 { - u-boot,dm-pre-reloc; - }; -+ -+&vopb { -+ u-boot,dm-pre-reloc; -+}; -+ -+&vopl { -+ u-boot,dm-pre-reloc; -+}; -diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi -index b73442ee34..3f773b10f4 100644 ---- a/arch/arm/dts/rk3399.dtsi -+++ b/arch/arm/dts/rk3399.dtsi -@@ -275,7 +275,6 @@ - }; - - sdhci: sdhci@fe330000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; - reg = <0x0 0xfe330000 0x0 0x10000>; - interrupts = ; -@@ -1072,7 +1071,6 @@ - }; - - pmugrf: syscon@ff320000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xff320000 0x0 0x1000>; - -@@ -1083,7 +1081,6 @@ - }; - - pmusgrf: syscon@ff330000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-pmusgrf", "syscon"; - reg = <0x0 0xff330000 0x0 0xe3d4>; - }; -@@ -1204,7 +1201,6 @@ - }; - - cic: syscon@ff620000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-cic", "syscon"; - reg = <0x0 0xff620000 0x0 0x100>; - }; -@@ -1219,7 +1215,6 @@ - }; - - dmc: dmc { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = ; -@@ -1268,7 +1263,6 @@ - }; - - pmucru: pmu-clock-controller@ff750000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-pmucru"; - reg = <0x0 0xff750000 0x0 0x1000>; - rockchip,grf = <&pmugrf>; -@@ -1279,7 +1273,6 @@ - }; - - cru: clock-controller@ff760000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-cru"; - reg = <0x0 0xff760000 0x0 0x1000>; - rockchip,grf = <&grf>; -@@ -1310,7 +1303,6 @@ - }; - - grf: syscon@ff770000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff770000 0x0 0x10000>; - #address-cells = <1>; -@@ -1520,7 +1512,6 @@ - }; - - vopl: vop@ff8f0000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-vop-lit"; - reg = <0x0 0xff8f0000 0x0 0x3efc>; - interrupts = ; -@@ -1578,7 +1569,6 @@ - }; - - vopb: vop@ff900000 { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-vop-big"; - reg = <0x0 0xff900000 0x0 0x3efc>; - interrupts = ; -@@ -1818,7 +1808,6 @@ - }; - - pinctrl: pinctrl { -- u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmugrf>; --- -2.23.0 - diff --git a/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch b/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch deleted file mode 100644 index 51918e8..0000000 --- a/0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch +++ /dev/null @@ -1,44 +0,0 @@ -From fa9f02cbd6a2baf48f76fc922e5f09755932962e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 9 Nov 2019 20:11:45 +0000 -Subject: [PATCH 3/4] rockchip: dts: rk3399-evb: move u-boot,spl-boot-order to - to the u-boot.dtsi - -The u-boot specific device tree directives should be in u-boot.dtsi - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-evb-u-boot.dtsi | 6 ++++++ - arch/arm/dts/rk3399-evb.dts | 2 -- - 2 files changed, 6 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi -index 20910e744b..ccb33d34d1 100644 ---- a/arch/arm/dts/rk3399-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi -@@ -5,3 +5,9 @@ - - #include "rk3399-u-boot.dtsi" - #include "rk3399-sdram-lpddr3-4GB-1600.dtsi" -+ -+/ { -+ chosen { -+ u-boot,spl-boot-order = &sdhci, &sdmmc; -+ }; -+}; -diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts -index a506e8da37..8e887f3a17 100644 ---- a/arch/arm/dts/rk3399-evb.dts -+++ b/arch/arm/dts/rk3399-evb.dts -@@ -15,8 +15,6 @@ - - chosen { - stdout-path = &uart2; -- u-boot,spl-boot-order = \ -- &sdhci, &sdmmc; - }; - - vdd_center: vdd-center { --- -2.23.0 - diff --git a/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch b/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch deleted file mode 100644 index 8c19d40..0000000 --- a/0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch +++ /dev/null @@ -1,43 +0,0 @@ -From e27784b9b8c96f46befa6d27a458e0e35d30ad81 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 9 Nov 2019 20:14:54 +0000 -Subject: [PATCH 4/4] rockchip: dts: rk3399-firefly: move u-boot,spl-boot-order - to to the u-boot.dtsi - -The u-boot specific device tree directives should be in u-boot.dtsi - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 ++++++ - arch/arm/dts/rk3399-firefly.dts | 1 - - 2 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi -index 67b63a8352..38e0897db9 100644 ---- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi -@@ -5,3 +5,9 @@ - - #include "rk3399-u-boot.dtsi" - #include "rk3399-sdram-ddr3-1600.dtsi" -+ -+/ { -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; -+ }; -+}; -diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts -index a4cb64f8bd..89c67fd24c 100644 ---- a/arch/arm/dts/rk3399-firefly.dts -+++ b/arch/arm/dts/rk3399-firefly.dts -@@ -14,7 +14,6 @@ - - chosen { - stdout-path = &uart2; -- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; - }; - - backlight: backlight { --- -2.23.0 - diff --git a/sources b/sources index 67db9e6..feafafb 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01-rc2.tar.bz2) = c03acd2192b75245387d470b549dbb401549e006400974439a3b13f2efc089f3508eda9bc01d30cd3ceddfb599f3121f0da6e686a007224a34a00b2fb5c533e9 +SHA512 (u-boot-2020.01-rc3.tar.bz2) = b84c6e91c44f85d7a1e3db0767df25258fed3a985cb36499f215c6d3520bcc1eb0b3d649ec58afd45eda8841cdbcb42117a97128269b6d1f3ad78e9273079e78 diff --git a/uboot-tools.spec b/uboot-tools.spec index 3df9709..b92b556 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2020.01 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,11 +26,7 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch10: 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch -Patch11: 0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch -Patch12: 0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch -Patch13: 0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch -Patch14: tools-fix-version.h.patch +Patch9: tools-fix-version.h.patch BuildRequires: bc BuildRequires: dtc @@ -267,13 +263,16 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Tue Nov 12 2019 Peter Robinson 2020.01-0.3 +* Tue Nov 19 2019 Peter Robinson 2020.01-0.4-rc3 +- 2020.01 RC3 + +* Tue Nov 12 2019 Peter Robinson 2020.01-0.3-rc2 - 2020.01 RC2 -* Tue Nov 5 2019 Peter Robinson 2020.01-0.2 +* Tue Nov 5 2019 Peter Robinson 2020.01-0.2-rc1 - Include new ATF 2.2 -* Wed Oct 30 2019 Peter Robinson 2020.01-0.1 +* Wed Oct 30 2019 Peter Robinson 2020.01-0.1-rc1 - 2020.01 RC1 - Initial migration to python3 From 303500d6795ee58d4d2f9a64fc2d89a87ee67102 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 19 Nov 2019 11:08:01 +0000 Subject: [PATCH 052/351] roc-rk3399-pc -> roc-pc-rk3399 --- aarch64-boards | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index 7d8ae79..12e6c77 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -49,7 +49,7 @@ rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 -roc-rk3399-pc +roc-pc-rk3399 rpi_3 rpi_4 sopine_baseboard From ed55f803946dfd2a7cb681c42a51ab2ace1a3212 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 Dec 2019 08:47:22 +0000 Subject: [PATCH 053/351] 2020.01 RC4 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index feafafb..2e37ca6 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01-rc3.tar.bz2) = b84c6e91c44f85d7a1e3db0767df25258fed3a985cb36499f215c6d3520bcc1eb0b3d649ec58afd45eda8841cdbcb42117a97128269b6d1f3ad78e9273079e78 +SHA512 (u-boot-2020.01-rc4.tar.bz2) = 8ea8cfa9db2eed29e306b10924fa769f900fa4f92ddf69ea538948ffee561fda81900232a807afce1884812b7bf3d44086e67ce6df29277be41ccbad42f2d315 diff --git a/uboot-tools.spec b/uboot-tools.spec index b92b556..e858718 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2020.01 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -263,6 +263,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 3 2019 Peter Robinson 2020.01-0.5-rc4 +- 2020.01 RC4 + * Tue Nov 19 2019 Peter Robinson 2020.01-0.4-rc3 - 2020.01 RC3 From b3d55ee9b800665f339ed7e1c8f8785ea0c0e94e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 Dec 2019 12:17:30 +0000 Subject: [PATCH 054/351] drop dupelicate aarch64 install loop, cleanup aarch/arm file copy logic a little, drop smdkv310 from builds --- arm-boards | 1 - uboot-tools.spec | 17 ++--------------- 2 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arm-boards b/arm-boards index 0afa009..61f92b6 100644 --- a/arm-boards +++ b/arm-boards @@ -120,7 +120,6 @@ rpi_4_32b Sinlinx_SinA31s Sinovoip_BPI_M2 Sinovoip_BPI_M3 -smdkv310 stih410-b2260 sunxi_Gemei_G9 tbs_a711 diff --git a/uboot-tools.spec b/uboot-tools.spec index e858718..3289a62 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -156,7 +156,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb.img u-boot.img u-boot.itb spl/sunxi-spl.bin + for file in spl/arndale-spl.bin u-boot.bin u-boot.dtb u-boot.img u-boot.imx u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -169,7 +169,7 @@ done for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin + for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -196,19 +196,6 @@ do done %endif -%ifarch aarch64 -for board in $(cat %{_arch}-boards) -do -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img - do - if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - fi - done -done -%endif - for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes do install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir} From 88d70fd3950e27add2c252f69ce867fe327f1233 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 Dec 2019 23:27:35 +0000 Subject: [PATCH 055/351] Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP --- arm-boards | 6 +- bcm283x-dts-Rename-U-Boot-file.patch | 29 ++ uboot-tools.spec | 18 +- ...t-for-u-boot.itb-generation-with-ATF.patch | 278 ++++++++++++++++++ ...ot-assing-MIO34-that-early-on-zcu100.patch | 199 +++++++++++++ 5 files changed, 521 insertions(+), 9 deletions(-) create mode 100644 bcm283x-dts-Rename-U-Boot-file.patch create mode 100644 zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch create mode 100644 zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch diff --git a/arm-boards b/arm-boards index 61f92b6..19326dc 100644 --- a/arm-boards +++ b/arm-boards @@ -17,10 +17,10 @@ ba10_tv_box Bananapi bananapi_m1_plus bananapi_m2_berry -bananapi_m2_plus_h3 -bananapi_m2_zero -Bananapi_M2_Ultra Bananapi_m2m +bananapi_m2_plus_h3 +Bananapi_M2_Ultra +bananapi_m2_zero Bananapro chiliboard CHIP diff --git a/bcm283x-dts-Rename-U-Boot-file.patch b/bcm283x-dts-Rename-U-Boot-file.patch new file mode 100644 index 0000000..af64742 --- /dev/null +++ b/bcm283x-dts-Rename-U-Boot-file.patch @@ -0,0 +1,29 @@ +From 5051377a0b2bec1605ce97170585d693a98ec34a Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Fri, 8 Nov 2019 14:49:47 +0100 +Subject: [PATCH] arm: dts: bcm283x: Rename U-Boot file + +Rename the file bcm283x-uboot.dtsi so that it get +automatically include through the scripts/Makefile.lib +using $(CONFIG_SYS_SOC))-u-boot.dtsi + +Without this uarts and pincontroller miss the property dm-pre-reloc +and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails +as the pins are not set correctly. +As a result the U-Boot banner isn't shown on boot. + +Before commmit +143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") +we included bcm283x-uboot.dtsi directly in the device-tree file. +Which got deleted by the metioned commit. +This is a much robuster solution. + +Reported-by: Tom Rini +Reported-by: Heinrich Schuchardt +Tested-by: Tom Rini [RPi 3, 32b and 64b modes] +Signed-off-by: Matthias Brugger + +diff --git a/arch/arm/dts/bcm283x-uboot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi +similarity index 100% +rename from arch/arm/dts/bcm283x-uboot.dtsi +rename to arch/arm/dts/bcm283x-u-boot.dtsi diff --git a/uboot-tools.spec b/uboot-tools.spec index 3289a62..7de27bb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.01 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,6 +27,9 @@ Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch9: tools-fix-version.h.patch +Patch10: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch +Patch11: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch +Patch12: bcm283x-dts-Rename-U-Boot-file.patch BuildRequires: bc BuildRequires: dtc @@ -118,12 +121,12 @@ do echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3328=(rock64-rk3328) + rk3328=(evb-rk3328 rock64-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -132,10 +135,10 @@ do make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ if [[ " ${rk3328[*]} " == *" $board "* ]]; then - make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} u-boot.itb V=1 O=builds/$(echo $board)/ + builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img + builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then - echo "Board: $board using rk3399" builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi @@ -156,7 +159,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in spl/arndale-spl.bin u-boot.bin u-boot.dtb u-boot.img u-boot.imx u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin + for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -250,6 +253,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 3 2019 Peter Robinson 2020.01-0.6-rc4 +- Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP + * Tue Dec 3 2019 Peter Robinson 2020.01-0.5-rc4 - 2020.01 RC4 diff --git a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch new file mode 100644 index 0000000..72213b7 --- /dev/null +++ b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch @@ -0,0 +1,278 @@ +From patchwork Tue Dec 3 13:34:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Michal Simek +X-Patchwork-Id: 1203703 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="jRbgIEeD"; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 47S3BR4jKtz9sR7 + for ; + Wed, 4 Dec 2019 00:44:47 +1100 (AEDT) +Received: by phobos.denx.de (Postfix, from userid 109) + id CC7BF81624; Tue, 3 Dec 2019 14:44:44 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, + MAILING_LIST_MULTI,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, + URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 +Received: from phobos.denx.de (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id B50BD80901; + Tue, 3 Dec 2019 14:44:12 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: mail.denx.de; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="jRbgIEeD"; dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id C809980901; Tue, 3 Dec 2019 14:44:09 +0100 (CET) +Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com + [209.85.221.68]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 32C4081828 + for ; Tue, 3 Dec 2019 14:35:05 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu +Received: by mail-wr1-f68.google.com with SMTP id c14so3678946wrn.7 + for ; Tue, 03 Dec 2019 05:35:05 -0800 (PST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=monstr-eu.20150623.gappssmtp.com; s=20150623; + h=sender:from:to:cc:subject:date:message-id:mime-version + :content-transfer-encoding; + bh=Cm6gQWLkk/+5jek3dvRRAOkfCxAi+n+YRN+ZTQR2FHo=; + b=jRbgIEeDUORknOe9qVPm4LptQigs2tytbss1dEwuK+OXROAETXd9oUKQ4lUG+1iOvX + Tid7F+uJZ3urEn2pwCtU89SWYZAYA5XdKZgrQfk6Fs8jgoojVbHdWLCdLFDi8N6WE0TB + TefM3xfA7QwJeV9QQEJS+IqDNItUcrFBKzw09ABBVRqXsUHB2luZuaw1w72PXdcCP65o + TWHYXVjIo5BGAn4XTNDuK9LyLaSVCld5zRHZvAYfDDGReHAtXGfkpcIohgmicVPjoDZd + qpUbc+6jK7aFnXNzxxJ1eqpjvnmX+7md9aS+e96pdPJ+Q3yRKgeSXcLbiIYBhBPEuu7S + nuDg== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:sender:from:to:cc:subject:date:message-id + :mime-version:content-transfer-encoding; + bh=Cm6gQWLkk/+5jek3dvRRAOkfCxAi+n+YRN+ZTQR2FHo=; + b=XXEYwNGUqeSbWgn8YgWbka943yZCnj3ZkdNK846QU3Ft8AplFDniryxOkYlyLB91kY + +Mn5z0e4xWL1MEaZT+2EQh53CApzWORoYeYryGsaql+hDD5zlQdm/0UkJSoLZ99slhrS + FNcNW40dU4iLXvCx7f8+/YDcF+7sYS4X1zxVxef0Sh1qPyB6ykXzbHgspO+uyBxRCZOJ + 2Xa08s7ry6p0N8mwBsUwRxaCc23wAa4L8HhdenIAw9wY7nnkhO7pW+byLeQ+NCJ4UfSH + 7pkxVk21TXyy0TC/J4TdNKHS8Gc6/8i2ajCsvCoMZ1mqt/5ZVqLUWZMfhj6Jurh42gPq + dtgQ== +X-Gm-Message-State: APjAAAU6J4Y0f3lLB9Z6GsZEAlImhG85wi6UhlX3hg1mTxyh6DyjAcvR + pI0Js+5A+34PRuDW/kk+TVvWWBu1Z04p1w== +X-Google-Smtp-Source: APXvYqxP0G+EP2youCblhWcjCu3FQ03Ed7G6Tlo0+mBMiEFAJvA1rgNQFC5gVk3s6GNdnRX3YIX1kw== +X-Received: by 2002:adf:fe12:: with SMTP id n18mr5128119wrr.158.1575380104990; + Tue, 03 Dec 2019 05:35:04 -0800 (PST) +Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) + by smtp.gmail.com with ESMTPSA id + 72sm3710284wrl.73.2019.12.03.05.35.03 + (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); + Tue, 03 Dec 2019 05:35:04 -0800 (PST) +From: Michal Simek +To: u-boot@lists.denx.de, + git@xilinx.com, + pbrobinson@gmail.com +Subject: [PATCH] arm64: zynqmp: Add support for u-boot.itb generation with ATF. +Date: Tue, 3 Dec 2019 14:34:58 +0100 +Message-Id: <5568e78d8e06c2ce6a86c88ee42509a0c80fc4ef.1575380094.git.michal.simek@xilinx.com> +X-Mailer: git-send-email 2.24.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.26 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Cc: Marek Vasut , Stefan Roese , + Chris Packham +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de +X-Virus-Status: Clean + +Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which +includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for +quite a long time but with using out of tree solution. The patch is filling +this gap. + +Tested on zcu102, zcu104 and zcu100/Ultra96. + +Signed-off-by: Michal Simek +--- + + Kconfig | 3 +- + arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++ + include/configs/xilinx_zynqmp.h | 6 +- + 3 files changed, 106 insertions(+), 2 deletions(-) + create mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh + +diff --git a/Kconfig b/Kconfig +index e22417ec4471..7efafffec0a4 100644 +--- a/Kconfig ++++ b/Kconfig +@@ -253,7 +253,7 @@ config BUILD_TARGET + default "u-boot-spl.kwb" if ARCH_MVEBU && SPL + default "u-boot-elf.srec" if RCAR_GEN3 + default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ +- ARCH_SUNXI || RISCV) ++ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) + default "u-boot.kwb" if KIRKWOOD + default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT + default "u-boot-with-spl.imx" if ARCH_MX6 && SPL +@@ -481,6 +481,7 @@ config SPL_FIT_GENERATOR + depends on SPL_FIT + default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI + default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP ++ default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP + default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV + help + Specifies a (platform specific) script file to generate the FIT +diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +new file mode 100755 +index 000000000000..1a4f396d1c3a +--- /dev/null ++++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +@@ -0,0 +1,99 @@ ++#!/bin/sh ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# script to generate FIT image source for Xilinx ZynqMP boards with ++# ARM Trusted Firmware and multiple device trees (given on the command line) ++# ++# usage: $0 [ [&2 ++else ++ echo "$BL31 size: " >&2 ++ ls -lct $BL31 | awk '{print $5}' >&2 ++fi ++ ++ ++ ++cat << __HEADER_EOF ++/dts-v1/; ++ ++/ { ++ description = "Configuration to load ATF before U-Boot"; ++ ++ images { ++ uboot { ++ description = "U-Boot (64-bit)"; ++ data = /incbin/("$BL33"); ++ type = "firmware"; ++ os = "u-boot"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <$BL33_LOAD_ADDR>; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++ atf { ++ description = "ARM Trusted Firmware"; ++ data = /incbin/("$BL31"); ++ type = "firmware"; ++ os = "arm-trusted-firmware"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <$ATF_LOAD_ADDR>; ++ entry = <$ATF_LOAD_ADDR>; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++__HEADER_EOF ++ ++cnt=1 ++for dtname in $* ++do ++ cat << __FDT_IMAGE_EOF ++ fdt_$cnt { ++ description = "$(basename $dtname .dtb)"; ++ data = /incbin/("$dtname"); ++ type = "flat_dt"; ++ arch = "arm64"; ++ compression = "none"; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++__FDT_IMAGE_EOF ++cnt=$((cnt+1)) ++done ++ ++cat << __CONF_HEADER_EOF ++ }; ++ configurations { ++ default = "config_1"; ++ ++__CONF_HEADER_EOF ++ ++cnt=1 ++for dtname in $* ++do ++cat << __CONF_SECTION1_EOF ++ config_$cnt { ++ description = "$(basename $dtname .dtb)"; ++ firmware = "uboot"; ++ loadables = "atf"; ++ fdt = "fdt_$cnt"; ++ }; ++__CONF_SECTION1_EOF ++cnt=$((cnt+1)) ++done ++ ++cat << __ITS_EOF ++ }; ++}; ++__ITS_EOF +diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h +index ee1ceebf1291..e7eb8dbfcb45 100644 +--- a/include/configs/xilinx_zynqmp.h ++++ b/include/configs/xilinx_zynqmp.h +@@ -243,7 +243,11 @@ + # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ + # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ + # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */ +-# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" ++# if defined(CONFIG_SPL_LOAD_FIT) ++# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" ++# else ++# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" ++# endif + #endif + + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) diff --git a/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch new file mode 100644 index 0000000..83cc155 --- /dev/null +++ b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch @@ -0,0 +1,199 @@ +From patchwork Tue Dec 3 15:33:26 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Michal Simek +X-Patchwork-Id: 1203761 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="xsfGCcKd"; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 47S60l4q2Xz9sP6 + for ; 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[178.255.168.35]) + by smtp.gmail.com with ESMTPSA id + h17sm4245700wrs.18.2019.12.03.07.33.27 + (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); + Tue, 03 Dec 2019 07:33:27 -0800 (PST) +From: Michal Simek +To: u-boot@lists.denx.de, + git@xilinx.com, + pbrobinson@gmail.com +Subject: [PATCH v2] arm64: zynqmp: Do not assing MIO34 that early on zcu100 +Date: Tue, 3 Dec 2019 16:33:26 +0100 +Message-Id: <175608f69633f3876bebdde1c2f7b9cf54b61716.1575387200.git.michal.simek@xilinx.com> +X-Mailer: git-send-email 2.24.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.26 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de +X-Virus-Status: Clean + +MIO34 is connected to POWER_KILL signal. When MIO configuration is done in +psu_init() and this pin is assigned to PMU but PMU configuration is not +loaded yet. PMU gpio output is high that means board is powered off +immediately. +The patch is fixing this sequence that MIO34 stays assing to ps gpio IP. +PMU config is loaded in SPL and then pin assigned to PMU through +psu_post_config_data(). + +Signed-off-by: Michal Simek +--- + +Changes in v2: +- add missing declaration in header + + arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h | 1 + + arch/arm/mach-zynqmp/psu_spl_init.c | 9 +++++++++ + arch/arm/mach-zynqmp/spl.c | 1 + + board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 7 ++++++- + 4 files changed, 17 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h +index 15e54c049387..e37acda2f89e 100644 +--- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h ++++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h +@@ -21,5 +21,6 @@ void prog_reg(unsigned long addr, unsigned long mask, + unsigned long shift, unsigned long value); + + int psu_init(void); ++unsigned long psu_post_config_data(void); + + #endif /* _PSU_INIT_GPL_H_ */ +diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c +index b357de32358c..b6abdfd608ee 100644 +--- a/arch/arm/mach-zynqmp/psu_spl_init.c ++++ b/arch/arm/mach-zynqmp/psu_spl_init.c +@@ -77,3 +77,12 @@ __weak int psu_init(void) + */ + return -1; + } ++ ++__weak unsigned long psu_post_config_data(void) ++{ ++ /* ++ * This function is overridden by the one in ++ * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. ++ */ ++ return 0; ++} +diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c +index 6ba42bb42f62..6551b33f42d0 100644 +--- a/arch/arm/mach-zynqmp/spl.c ++++ b/arch/arm/mach-zynqmp/spl.c +@@ -60,6 +60,7 @@ void spl_board_init(void) + preloader_console_init(); + ps_mode_reset(MODE_RESET); + board_init(); ++ psu_post_config_data(); + } + #endif + +diff --git a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c +index e1fdabaeb9d1..585b3afc218a 100644 +--- a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c ++++ b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c +@@ -409,7 +409,6 @@ static unsigned long psu_mio_init_data(void) + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); +- psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U); +@@ -990,3 +989,9 @@ int psu_init(void) + return 1; + return 0; + } ++ ++unsigned long psu_post_config_data(void) ++{ ++ psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); ++ return 0; ++} From 0b08ed6c722fb5677c42d057d837bf03902bc8ac Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 8 Dec 2019 11:21:39 +0000 Subject: [PATCH 056/351] Khadas Edge and VIM, other fixes --- aarch64-boards | 4 + tools-fix-version.h.patch | 31 ++---- uboot-tools.spec | 8 +- ...t-for-u-boot.itb-generation-with-ATF.patch | 102 ++++++++++-------- 4 files changed, 75 insertions(+), 70 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index 12e6c77..dd445d8 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -12,8 +12,12 @@ ficus-rk3399 firefly-rk3399 geekbox hikey +khadas-edge-captain-rk3399 +khadas-edge-v-rk3399 +khadas-edge-rk3399 khadas-vim khadas-vim2 +khadas-vim3 libretech-ac libretech_all_h3_cc_h5 libretech-cc diff --git a/tools-fix-version.h.patch b/tools-fix-version.h.patch index 1b65982..9d51ef7 100644 --- a/tools-fix-version.h.patch +++ b/tools-fix-version.h.patch @@ -1,35 +1,24 @@ -From 097ce774b6739aa6a52e4d79e2920e3ef5af41d3 Mon Sep 17 00:00:00 2001 +From 961918a6fcbab383c92135f5cad5ea758bdaef79 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Thu, 31 Oct 2019 09:19:23 +0000 -Subject: [PATCH] tools: fix version.h +Date: Wed, 4 Dec 2019 23:27:10 +0000 +Subject: [PATCH] tools fix -Signed-off-by: Peter Robinson --- - Makefile | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) + Makefile | 1 + + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile -index 58a5721b3d..7b40069d9f 100644 +index 556cebdfc4..4bcf4d677f 100644 --- a/Makefile +++ b/Makefile -@@ -1848,14 +1848,14 @@ checkarmreloc: u-boot - false; \ +@@ -1894,6 +1894,7 @@ checkarmreloc: u-boot fi --tools/version.h: include/version.h -+version.h: include/version.h + tools/version.h: include/version.h ++ $(Q)mkdir -p $(dir $@) $(call if_changed,copy) --envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h -+envtools: scripts_basic $(version_h) $(timestamp_h) version.h - $(Q)$(MAKE) $(build)=tools/env - - tools-only: export TOOLS_ONLY=y --tools-only: scripts_basic $(version_h) $(timestamp_h) tools/version.h -+tools-only: scripts_basic $(version_h) $(timestamp_h) version.h - $(Q)$(MAKE) $(build)=tools - - tools-all: export HOST_TOOLS_ALL=y + envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h -- 2.23.0 diff --git a/uboot-tools.spec b/uboot-tools.spec index 7de27bb..58a7e84 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.01 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -233,7 +233,7 @@ cp -p board/warp/README builds/docs/README.warp cp -p board/warp7/README builds/docs/README.warp7 %files -%doc README doc/imx doc/README.kwbimage doc/README.distro doc/README.gpt +%doc README doc/README.kwbimage doc/README.distro doc/README.gpt %doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst %doc doc/README.chromium builds/docs/* %{_bindir}/* @@ -253,6 +253,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Dec 5 2019 Peter Robinson 2020.01-0.7-rc4 +- Enable the Khadas Edge and VIM series of devices +- Minor other fixes + * Tue Dec 3 2019 Peter Robinson 2020.01-0.6-rc4 - Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP diff --git a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch index 72213b7..98039d4 100644 --- a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch +++ b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch @@ -1,9 +1,9 @@ -From patchwork Tue Dec 3 13:34:58 2019 +From patchwork Thu Dec 5 08:46:57 2019 Content-Type: text/plain; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id - 72sm3710284wrl.73.2019.12.03.05.35.03 + a7sm11805025wrr.50.2019.12.05.00.47.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); - Tue, 03 Dec 2019 05:35:04 -0800 (PST) + Thu, 05 Dec 2019 00:47:03 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, pbrobinson@gmail.com -Subject: [PATCH] arm64: zynqmp: Add support for u-boot.itb generation with ATF. -Date: Tue, 3 Dec 2019 14:34:58 +0100 -Message-Id: <5568e78d8e06c2ce6a86c88ee42509a0c80fc4ef.1575380094.git.michal.simek@xilinx.com> +Subject: [PATCH v2] arm64: zynqmp: Add support for u-boot.itb generation with + ATF +Date: Thu, 5 Dec 2019 09:46:57 +0100 +Message-Id: <311b20ae349e6a93714c227df5907667d1cb9463.1575535613.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de @@ -110,8 +111,7 @@ List-Post: List-Help: List-Subscribe: , -Cc: Marek Vasut , Stefan Roese , - Chris Packham +Cc: Marek Vasut , Stefan Roese Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de @@ -124,9 +124,17 @@ this gap. Tested on zcu102, zcu104 and zcu100/Ultra96. +zcu100/Ultra96 v2.2 ATF build by: +make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31 + Signed-off-by: Michal Simek --- +Changes in v2: +- Exchange u-boot/atf in config section +- Use default ATF baseaddr from mainline +- Update commit message + Kconfig | 3 +- arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++ include/configs/xilinx_zynqmp.h | 6 +- @@ -156,7 +164,7 @@ index e22417ec4471..7efafffec0a4 100644 Specifies a (platform specific) script file to generate the FIT diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh new file mode 100755 -index 000000000000..1a4f396d1c3a +index 000000000000..c50aba45ca5c --- /dev/null +++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh @@ -0,0 +1,99 @@ @@ -170,7 +178,7 @@ index 000000000000..1a4f396d1c3a + +BL33="u-boot-nodtb.bin" +[ -z "$BL31" ] && BL31="bl31.bin" -+[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0xfffe0000" ++[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0xfffea000" +[ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x8000000" + +if [ ! -f $BL31 ]; then @@ -247,8 +255,8 @@ index 000000000000..1a4f396d1c3a +cat << __CONF_SECTION1_EOF + config_$cnt { + description = "$(basename $dtname .dtb)"; -+ firmware = "uboot"; -+ loadables = "atf"; ++ firmware = "atf"; ++ loadables = "uboot"; + fdt = "fdt_$cnt"; + }; +__CONF_SECTION1_EOF From 267ed269241710ad2153e93c87a08f9fc32bd7df Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 13 Dec 2019 00:21:28 +0000 Subject: [PATCH 057/351] rpi fixes --- raspberry-pi-4-fixes.patch | 118 +++++++++++++++++++++++++++++++++++++ uboot-tools.spec | 6 +- 2 files changed, 123 insertions(+), 1 deletion(-) create mode 100644 raspberry-pi-4-fixes.patch diff --git a/raspberry-pi-4-fixes.patch b/raspberry-pi-4-fixes.patch new file mode 100644 index 0000000..e8c1387 --- /dev/null +++ b/raspberry-pi-4-fixes.patch @@ -0,0 +1,118 @@ +From e19cfcc07ac5da8b3a04e21875ec542d994865d4 Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Thu, 5 Dec 2019 18:53:13 +0100 +Subject: [PATCH 08/10] rpi: fix dram bank initialization + +To update the dram bank information from device-tree we use +fdtdec_decode_ram_size() which expectes the the size-cells and +address-cells to be defined in the memory node. For normal system RAM +these values are defined in the root node. When the values differ from +the default values defined in the spec, we can end up with wrong RAM +bank information. + +Switch to the "standard" way to update the RAM bank information to +avoid this. + +Fixes: 9de5b89e4c ("rpi4: enable dram bank initialization") + +Signed-off-by: Matthias Brugger +--- + board/raspberrypi/rpi/rpi.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 5f120ea9c2..e19610f40f 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -275,8 +275,13 @@ int dram_init(void) + #ifdef CONFIG_BCM2711 + int dram_init_banksize(void) + { +- return fdtdec_decode_ram_size(gd->fdt_blob, NULL, 0, NULL, +- (phys_size_t *)&gd->ram_size, gd->bd); ++ int ret; ++ ++ ret = fdtdec_setup_memory_banksize(); ++ if (ret) ++ return ret; ++ ++ return fdtdec_setup_mem_size_base(); + } + #endif + #endif +-- +2.24.1 + +From a63f81c242090682ea4907fa6475d8057208cb05 Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Thu, 5 Dec 2019 18:53:14 +0100 +Subject: [PATCH 09/10] rpi: Enable DRAM bank initialization on arm64 + +Up to now we only update the DRAM banks when we are define +CONFIG_BCM2711. But our one binary approach uses a config that supports +BCM2837 and BCM2711. As a result we only see one gibibyte of RAM on +Raspberry Pi 4, even if it has more RAM. +Fix this by calling dram_init_banksize. + +Fixes: 5694090670 ("ARM: defconfig: add unified config for RPi3 and RPi4") + +Signed-off-by: Matthias Brugger +--- + board/raspberrypi/rpi/rpi.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index e19610f40f..e367ba3092 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -272,7 +272,6 @@ int dram_init(void) + } + + #ifdef CONFIG_OF_BOARD +-#ifdef CONFIG_BCM2711 + int dram_init_banksize(void) + { + int ret; +@@ -284,7 +283,6 @@ int dram_init_banksize(void) + return fdtdec_setup_mem_size_base(); + } + #endif +-#endif + + static void set_fdtfile(void) + { +-- +2.24.1 + +From e5167465a1740f0cac05be44f3e2a4e334eb527a Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Thu, 5 Dec 2019 18:53:15 +0100 +Subject: [PATCH 10/10] ARM: defconfig: Fix 32bit config for RPi4 + +The rpi_4_32b_defconfig states that only one DRAM bank is present. This +leads to a wrong configuration of the available DRAM. Fix this by +setting the DRAM bank config accordingly. + +Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)") + +Signed-off-by: Matthias Brugger +--- + configs/rpi_4_32b_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index e7d8f29060..80cf930032 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00008000 + CONFIG_TARGET_RPI_4_32B=y + CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ENV_SIZE=0x4000 +-CONFIG_NR_DRAM_BANKS=1 ++CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +-- +2.24.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 58a7e84..fb2fe23 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.01 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -30,6 +30,7 @@ Patch9: tools-fix-version.h.patch Patch10: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch Patch11: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch Patch12: bcm283x-dts-Rename-U-Boot-file.patch +Patch13: raspberry-pi-4-fixes.patch BuildRequires: bc BuildRequires: dtc @@ -253,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Dec 12 2019 Peter Robinson 2020.01-0.8-rc4 +- Fixes for Raspberry Pi + * Thu Dec 5 2019 Peter Robinson 2020.01-0.7-rc4 - Enable the Khadas Edge and VIM series of devices - Minor other fixes From 7fa7ccdc72fe36762e2501cdefe08a119d60deb6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 17 Dec 2019 07:47:42 +0000 Subject: [PATCH 058/351] 2020.01 RC5 --- raspberry-pi-4-fixes.patch | 118 ------------------------------------- sources | 2 +- tools-fix-version.h.patch | 24 -------- uboot-tools.spec | 15 ++--- 4 files changed, 9 insertions(+), 150 deletions(-) delete mode 100644 raspberry-pi-4-fixes.patch delete mode 100644 tools-fix-version.h.patch diff --git a/raspberry-pi-4-fixes.patch b/raspberry-pi-4-fixes.patch deleted file mode 100644 index e8c1387..0000000 --- a/raspberry-pi-4-fixes.patch +++ /dev/null @@ -1,118 +0,0 @@ -From e19cfcc07ac5da8b3a04e21875ec542d994865d4 Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Thu, 5 Dec 2019 18:53:13 +0100 -Subject: [PATCH 08/10] rpi: fix dram bank initialization - -To update the dram bank information from device-tree we use -fdtdec_decode_ram_size() which expectes the the size-cells and -address-cells to be defined in the memory node. For normal system RAM -these values are defined in the root node. When the values differ from -the default values defined in the spec, we can end up with wrong RAM -bank information. - -Switch to the "standard" way to update the RAM bank information to -avoid this. - -Fixes: 9de5b89e4c ("rpi4: enable dram bank initialization") - -Signed-off-by: Matthias Brugger ---- - board/raspberrypi/rpi/rpi.c | 9 +++++++-- - 1 file changed, 7 insertions(+), 2 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 5f120ea9c2..e19610f40f 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -275,8 +275,13 @@ int dram_init(void) - #ifdef CONFIG_BCM2711 - int dram_init_banksize(void) - { -- return fdtdec_decode_ram_size(gd->fdt_blob, NULL, 0, NULL, -- (phys_size_t *)&gd->ram_size, gd->bd); -+ int ret; -+ -+ ret = fdtdec_setup_memory_banksize(); -+ if (ret) -+ return ret; -+ -+ return fdtdec_setup_mem_size_base(); - } - #endif - #endif --- -2.24.1 - -From a63f81c242090682ea4907fa6475d8057208cb05 Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Thu, 5 Dec 2019 18:53:14 +0100 -Subject: [PATCH 09/10] rpi: Enable DRAM bank initialization on arm64 - -Up to now we only update the DRAM banks when we are define -CONFIG_BCM2711. But our one binary approach uses a config that supports -BCM2837 and BCM2711. As a result we only see one gibibyte of RAM on -Raspberry Pi 4, even if it has more RAM. -Fix this by calling dram_init_banksize. - -Fixes: 5694090670 ("ARM: defconfig: add unified config for RPi3 and RPi4") - -Signed-off-by: Matthias Brugger ---- - board/raspberrypi/rpi/rpi.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index e19610f40f..e367ba3092 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -272,7 +272,6 @@ int dram_init(void) - } - - #ifdef CONFIG_OF_BOARD --#ifdef CONFIG_BCM2711 - int dram_init_banksize(void) - { - int ret; -@@ -284,7 +283,6 @@ int dram_init_banksize(void) - return fdtdec_setup_mem_size_base(); - } - #endif --#endif - - static void set_fdtfile(void) - { --- -2.24.1 - -From e5167465a1740f0cac05be44f3e2a4e334eb527a Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Thu, 5 Dec 2019 18:53:15 +0100 -Subject: [PATCH 10/10] ARM: defconfig: Fix 32bit config for RPi4 - -The rpi_4_32b_defconfig states that only one DRAM bank is present. This -leads to a wrong configuration of the available DRAM. Fix this by -setting the DRAM bank config accordingly. - -Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)") - -Signed-off-by: Matthias Brugger ---- - configs/rpi_4_32b_defconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index e7d8f29060..80cf930032 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00008000 - CONFIG_TARGET_RPI_4_32B=y - CONFIG_SYS_MALLOC_F_LEN=0x2000 - CONFIG_ENV_SIZE=0x4000 --CONFIG_NR_DRAM_BANKS=1 -+CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set --- -2.24.1 - diff --git a/sources b/sources index 2e37ca6..e05eecb 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01-rc4.tar.bz2) = 8ea8cfa9db2eed29e306b10924fa769f900fa4f92ddf69ea538948ffee561fda81900232a807afce1884812b7bf3d44086e67ce6df29277be41ccbad42f2d315 +SHA512 (u-boot-2020.01-rc5.tar.bz2) = f39ef40e4a8a030a779d1732bb588fba808140c91d4d92b6228f752b58ecbbdb90a4b8feae1646a42c64ba044d6c503228f877b33e221330b3f96f3c9006d60a diff --git a/tools-fix-version.h.patch b/tools-fix-version.h.patch deleted file mode 100644 index 9d51ef7..0000000 --- a/tools-fix-version.h.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 961918a6fcbab383c92135f5cad5ea758bdaef79 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 4 Dec 2019 23:27:10 +0000 -Subject: [PATCH] tools fix - ---- - Makefile | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Makefile b/Makefile -index 556cebdfc4..4bcf4d677f 100644 ---- a/Makefile -+++ b/Makefile -@@ -1894,6 +1894,7 @@ checkarmreloc: u-boot - fi - - tools/version.h: include/version.h -+ $(Q)mkdir -p $(dir $@) - $(call if_changed,copy) - - envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h --- -2.23.0 - diff --git a/uboot-tools.spec b/uboot-tools.spec index fb2fe23..87a16ad 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2020.01 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 0.9%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,11 +26,9 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch9: tools-fix-version.h.patch -Patch10: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch -Patch11: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch -Patch12: bcm283x-dts-Rename-U-Boot-file.patch -Patch13: raspberry-pi-4-fixes.patch +Patch9: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch +Patch10: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch +Patch11: bcm283x-dts-Rename-U-Boot-file.patch BuildRequires: bc BuildRequires: dtc @@ -254,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 17 2019 Peter Robinson 2020.01-0.9-rc5 +- 2020.01 RC5 + * Thu Dec 12 2019 Peter Robinson 2020.01-0.8-rc4 - Fixes for Raspberry Pi From 6420e730121937bbbff61dc6cefc06c8a668a2df Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Jan 2020 01:08:40 +0000 Subject: [PATCH 059/351] 2020.01 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index e05eecb..03c2370 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01-rc5.tar.bz2) = f39ef40e4a8a030a779d1732bb588fba808140c91d4d92b6228f752b58ecbbdb90a4b8feae1646a42c64ba044d6c503228f877b33e221330b3f96f3c9006d60a +SHA512 (u-boot-2020.01.tar.bz2) = 073d4e0234095c1bda1ffa7a648972aa4530d106ee1a73035e0501b1aba2951653582c8b7bcf338d4e95012fa67e75f97b7e1fbac5cc764d609b671ef29617f7 diff --git a/uboot-tools.spec b/uboot-tools.spec index 87a16ad..83c0523 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc5 Name: uboot-tools Version: 2020.01 -Release: 0.9%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -252,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jan 7 2020 Peter Robinson 2020.01-1 +- 2020.01 + * Tue Dec 17 2019 Peter Robinson 2020.01-0.9-rc5 - 2020.01 RC5 From 376315c6bd704c3804035577fada376ac05d9df3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Jan 2020 05:57:09 +0000 Subject: [PATCH 060/351] drop fixes upstreamed --- bcm283x-dts-Rename-U-Boot-file.patch | 29 ---------------------------- uboot-tools.spec | 3 --- 2 files changed, 32 deletions(-) delete mode 100644 bcm283x-dts-Rename-U-Boot-file.patch diff --git a/bcm283x-dts-Rename-U-Boot-file.patch b/bcm283x-dts-Rename-U-Boot-file.patch deleted file mode 100644 index af64742..0000000 --- a/bcm283x-dts-Rename-U-Boot-file.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 5051377a0b2bec1605ce97170585d693a98ec34a Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Fri, 8 Nov 2019 14:49:47 +0100 -Subject: [PATCH] arm: dts: bcm283x: Rename U-Boot file - -Rename the file bcm283x-uboot.dtsi so that it get -automatically include through the scripts/Makefile.lib -using $(CONFIG_SYS_SOC))-u-boot.dtsi - -Without this uarts and pincontroller miss the property dm-pre-reloc -and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails -as the pins are not set correctly. -As a result the U-Boot banner isn't shown on boot. - -Before commmit -143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") -we included bcm283x-uboot.dtsi directly in the device-tree file. -Which got deleted by the metioned commit. -This is a much robuster solution. - -Reported-by: Tom Rini -Reported-by: Heinrich Schuchardt -Tested-by: Tom Rini [RPi 3, 32b and 64b modes] -Signed-off-by: Matthias Brugger - -diff --git a/arch/arm/dts/bcm283x-uboot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi -similarity index 100% -rename from arch/arm/dts/bcm283x-uboot.dtsi -rename to arch/arm/dts/bcm283x-u-boot.dtsi diff --git a/uboot-tools.spec b/uboot-tools.spec index 83c0523..e974798 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -28,7 +28,6 @@ Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch9: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch Patch10: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch -Patch11: bcm283x-dts-Rename-U-Boot-file.patch BuildRequires: bc BuildRequires: dtc @@ -94,8 +93,6 @@ u-boot bootloader binaries for armv7 boards cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 . -sed -i 's/python/python3/' arch/arm/mach-rockchip/make_fit_atf.py - %build mkdir builds From c3cc1521a1d80fde6977f315c62d807ba93ca100 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Jan 2020 06:23:19 +0000 Subject: [PATCH 061/351] disable gen of SPL bits for rk3328 series --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index e974798..f54ddc7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -131,8 +131,8 @@ do make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ if [[ " ${rk3328[*]} " == *" $board "* ]]; then - builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img - builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img + #builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img + #builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img From 24204bb7d06fc86050089c7de297d0893f2136f7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Jan 2020 06:44:18 +0000 Subject: [PATCH 062/351] disable gen of SPL bits for rk3328 series --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index f54ddc7..8ea34f2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -130,10 +130,10 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - if [[ " ${rk3328[*]} " == *" $board "* ]]; then + #if [[ " ${rk3328[*]} " == *" $board "* ]]; then #builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img #builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img - fi + #fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img From d332b4c202ccbbbeef16eb5158efc9a25615af3c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 8 Jan 2020 10:41:03 +0000 Subject: [PATCH 063/351] imx6: fix for wandboard --- uboot-tools.spec | 1 + wandboard-Fix-the-DM_PMIC-conversion.patch | 298 +++++++++++++++++++++ 2 files changed, 299 insertions(+) create mode 100644 wandboard-Fix-the-DM_PMIC-conversion.patch diff --git a/uboot-tools.spec b/uboot-tools.spec index 8ea34f2..ea84748 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -28,6 +28,7 @@ Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch9: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch Patch10: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch +Patch11: wandboard-Fix-the-DM_PMIC-conversion.patch BuildRequires: bc BuildRequires: dtc diff --git a/wandboard-Fix-the-DM_PMIC-conversion.patch b/wandboard-Fix-the-DM_PMIC-conversion.patch new file mode 100644 index 0000000..fba0474 --- /dev/null +++ b/wandboard-Fix-the-DM_PMIC-conversion.patch @@ -0,0 +1,298 @@ +From patchwork Tue Dec 10 09:32:59 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 1206991 +X-Patchwork-Delegate: sbabic@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: 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since the PMIC presence is used to determine the board D1 revision, +the following error is seen when booting a board rev D1: + +WARNING: Could not determine dtb to use + +and the kernel does not boot at all. + +Fix the regression by passing "pfuze100@8" as the correct parameter +to the pmic_get() function in the DM case. + +Fixes: ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") +Signed-off-by: Fabio Estevam +--- +Changes since v2: +- None + + board/wandboard/wandboard.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c +index 6c1e4ef27d..b2f961a7f0 100644 +--- a/board/wandboard/wandboard.c ++++ b/board/wandboard/wandboard.c +@@ -363,7 +363,7 @@ int power_init_board(void) + + puts("PMIC: "); + +- ret = pmic_get("pfuze100", &dev); ++ ret = pmic_get("pfuze100@8", &dev); + if (ret < 0) { + printf("pmic_get() ret %d\n", ret); + return 0; + +From patchwork Tue Dec 10 09:33:00 2019 +Content-Type: text/plain; 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+List-Subscribe: , + +Cc: u-boot@lists.denx.de, uboot-imx@nxp.com, trini@konsulko.com +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de +X-Virus-Status: Clean + +After the conversion to DM_PMIC the following output is seen: + +PMIC: PMIC: PFUZE100 ID=0x10 + +Remove the unnecessary PMIC string from the board file to +avoid the repetead string. + +Signed-off-by: Fabio Estevam +--- +Changes since v2: +- None + + board/wandboard/wandboard.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c +index 7209cc8211..e386ad2cc1 100644 +--- a/board/wandboard/wandboard.c ++++ b/board/wandboard/wandboard.c +@@ -361,8 +361,6 @@ int power_init_board(void) + struct udevice *dev; + int reg, ret; + +- puts("PMIC: "); +- + ret = pmic_get("pfuze100@8", &dev); + if (ret < 0) { + printf("pmic_get() ret %d\n", ret); From 85b5f80fcdf2a66970aa3c42800e2b9b9c355692 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 29 Jan 2020 09:07:19 +0000 Subject: [PATCH 064/351] v2020.04 rc1 --- Ethernet-support-for-Raspberry-Pi-4.patch | 1097 +++++++++++++++++ sources | 2 +- uboot-tools.spec | 13 +- wandboard-Fix-the-DM_PMIC-conversion.patch | 298 ----- ...t-for-u-boot.itb-generation-with-ATF.patch | 286 ----- ...ot-assing-MIO34-that-early-on-zcu100.patch | 199 --- 6 files changed, 1105 insertions(+), 790 deletions(-) create mode 100644 Ethernet-support-for-Raspberry-Pi-4.patch delete mode 100644 wandboard-Fix-the-DM_PMIC-conversion.patch delete mode 100644 zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch delete mode 100644 zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch diff --git a/Ethernet-support-for-Raspberry-Pi-4.patch b/Ethernet-support-for-Raspberry-Pi-4.patch new file mode 100644 index 0000000..799c8b6 --- /dev/null +++ b/Ethernet-support-for-Raspberry-Pi-4.patch @@ -0,0 +1,1097 @@ +From patchwork Fri Jan 17 01:20:45 2020 +Content-Type: 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+X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de +X-Virus-Status: Clean + +From: Amit Singh Tomar + +The Broadcom GENET Ethernet MACs are used in several MIPS based SoCs +and in the Broadcom 2711/2838 SoC used on the Raspberry Pi 4. +There is no publicly available documentation, so this driver is based +on the Linux driver. Compared to that the queue management is +drastically simplified, also we only support version 5 of the IP and +RGMII connections between MAC and PHY, as used on the RPi4. + +Signed-off-by: Amit Singh Tomar +Reviewed-by: Andre Przywara +[Andre: heavy cleanup and a few fixes] +Signed-off-by: Andre Przywara +--- + drivers/net/Kconfig | 7 + + drivers/net/Makefile | 1 + + drivers/net/bcmgenet.c | 722 +++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 730 insertions(+) + create mode 100644 drivers/net/bcmgenet.c + +diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig +index 01d087f229..4d1013c984 100644 +--- a/drivers/net/Kconfig ++++ b/drivers/net/Kconfig +@@ -136,6 +136,13 @@ config BCM6368_ETH + help + This driver supports the BCM6368 Ethernet MAC. + ++config BCMGENET ++ bool "BCMGENET V5 support" ++ depends on DM_ETH ++ select PHYLIB ++ help ++ This driver supports the BCMGENET Ethernet MAC. ++ + config DWC_ETH_QOS + bool "Synopsys DWC Ethernet QOS device support" + depends on DM_ETH +diff --git a/drivers/net/Makefile b/drivers/net/Makefile +index 30991834ec..6e0a68834d 100644 +--- a/drivers/net/Makefile ++++ b/drivers/net/Makefile +@@ -8,6 +8,7 @@ obj-$(CONFIG_AG7XXX) += ag7xxx.o + obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o + obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o + obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o ++obj-$(CONFIG_BCMGENET) += bcmgenet.o + obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o + obj-$(CONFIG_DRIVER_AX88180) += ax88180.o + obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o +diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c +new file mode 100644 +index 0000000000..4f8f190071 +--- /dev/null ++++ b/drivers/net/bcmgenet.c +@@ -0,0 +1,722 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2019 Amit Singh Tomar ++ * ++ * Driver for Broadcom GENETv5 Ethernet controller (as found on the RPi4) ++ * This driver is based on the Linux driver: ++ * drivers/net/ethernet/broadcom/genet/bcmgenet.c ++ * which is: Copyright (c) 2014-2017 Broadcom ++ * ++ * The hardware supports multiple queues (16 priority queues and one ++ * default queue), both for RX and TX. There are 256 DMA descriptors (both ++ * for TX and RX), and they live in MMIO registers. The hardware allows ++ * assigning descriptor ranges to queues, but we choose the most simple setup: ++ * All 256 descriptors are assigned to the default queue (#16). ++ * Also the Linux driver supports multiple generations of the MAC, whereas ++ * we only support v5, as used in the Raspberry Pi 4. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Register definitions derived from Linux source */ ++#define SYS_REV_CTRL 0x00 ++ ++#define SYS_PORT_CTRL 0x04 ++#define PORT_MODE_EXT_GPHY 3 ++ ++#define GENET_SYS_OFF 0x0000 ++#define SYS_RBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x08) ++#define SYS_TBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x0c) ++ ++#define GENET_EXT_OFF 0x0080 ++#define EXT_RGMII_OOB_CTRL (GENET_EXT_OFF + 0x0c) ++#define RGMII_LINK BIT(4) ++#define OOB_DISABLE BIT(5) ++#define RGMII_MODE_EN BIT(6) ++#define ID_MODE_DIS BIT(16) ++ ++#define GENET_RBUF_OFF 0x0300 ++#define RBUF_TBUF_SIZE_CTRL (GENET_RBUF_OFF + 0xb4) ++#define RBUF_CTRL (GENET_RBUF_OFF + 0x00) ++#define RBUF_ALIGN_2B BIT(1) ++ ++#define GENET_UMAC_OFF 0x0800 ++#define UMAC_MIB_CTRL (GENET_UMAC_OFF + 0x580) ++#define UMAC_MAX_FRAME_LEN (GENET_UMAC_OFF + 0x014) ++#define UMAC_MAC0 (GENET_UMAC_OFF + 0x00c) ++#define UMAC_MAC1 (GENET_UMAC_OFF + 0x010) ++#define UMAC_CMD (GENET_UMAC_OFF + 0x008) ++#define MDIO_CMD (GENET_UMAC_OFF + 0x614) ++#define UMAC_TX_FLUSH (GENET_UMAC_OFF + 0x334) ++#define MDIO_START_BUSY BIT(29) ++#define MDIO_READ_FAIL BIT(28) ++#define MDIO_RD (2 << 26) ++#define MDIO_WR BIT(26) ++#define MDIO_PMD_SHIFT 21 ++#define MDIO_PMD_MASK 0x1f ++#define MDIO_REG_SHIFT 16 ++#define MDIO_REG_MASK 0x1f ++ ++#define CMD_TX_EN BIT(0) ++#define CMD_RX_EN BIT(1) ++#define UMAC_SPEED_10 0 ++#define UMAC_SPEED_100 1 ++#define UMAC_SPEED_1000 2 ++#define UMAC_SPEED_2500 3 ++#define CMD_SPEED_SHIFT 2 ++#define CMD_SPEED_MASK 3 ++#define CMD_SW_RESET BIT(13) ++#define CMD_LCL_LOOP_EN BIT(15) ++#define CMD_TX_EN BIT(0) ++#define CMD_RX_EN BIT(1) ++ ++#define MIB_RESET_RX BIT(0) ++#define MIB_RESET_RUNT BIT(1) ++#define MIB_RESET_TX BIT(2) ++ ++/* total number of Buffer Descriptors, same for Rx/Tx */ ++#define TOTAL_DESCS 256 ++#define RX_DESCS TOTAL_DESCS ++#define TX_DESCS TOTAL_DESCS ++ ++#define DEFAULT_Q 0x10 ++ ++/* Body(1500) + EH_SIZE(14) + VLANTAG(4) + BRCMTAG(6) + FCS(4) = 1528. ++ * 1536 is multiple of 256 bytes ++ */ ++#define ENET_BRCM_TAG_LEN 6 ++#define ENET_PAD 8 ++#define ENET_MAX_MTU_SIZE (ETH_DATA_LEN + ETH_HLEN + \ ++ VLAN_HLEN + ENET_BRCM_TAG_LEN + \ ++ ETH_FCS_LEN + ENET_PAD) ++ ++/* Tx/Rx Dma Descriptor common bits */ ++#define DMA_EN BIT(0) ++#define DMA_RING_BUF_EN_SHIFT 0x01 ++#define DMA_RING_BUF_EN_MASK 0xffff ++#define DMA_BUFLENGTH_MASK 0x0fff ++#define DMA_BUFLENGTH_SHIFT 16 ++#define DMA_RING_SIZE_SHIFT 16 ++#define DMA_OWN 0x8000 ++#define DMA_EOP 0x4000 ++#define DMA_SOP 0x2000 ++#define DMA_WRAP 0x1000 ++#define DMA_MAX_BURST_LENGTH 0x8 ++/* Tx specific DMA descriptor bits */ ++#define DMA_TX_UNDERRUN 0x0200 ++#define DMA_TX_APPEND_CRC 0x0040 ++#define DMA_TX_OW_CRC 0x0020 ++#define DMA_TX_DO_CSUM 0x0010 ++#define DMA_TX_QTAG_SHIFT 7 ++ ++/* DMA rings size */ ++#define DMA_RING_SIZE 0x40 ++#define DMA_RINGS_SIZE (DMA_RING_SIZE * (DEFAULT_Q + 1)) ++ ++/* DMA descriptor */ ++#define DMA_DESC_LENGTH_STATUS 0x00 ++#define DMA_DESC_ADDRESS_LO 0x04 ++#define DMA_DESC_ADDRESS_HI 0x08 ++#define DMA_DESC_SIZE 12 ++ ++#define GENET_RX_OFF 0x2000 ++#define GENET_RDMA_REG_OFF \ ++ (GENET_RX_OFF + TOTAL_DESCS * DMA_DESC_SIZE) ++#define GENET_TX_OFF 0x4000 ++#define GENET_TDMA_REG_OFF \ ++ (GENET_TX_OFF + TOTAL_DESCS * DMA_DESC_SIZE) ++ ++#define DMA_FC_THRESH_HI (RX_DESCS >> 4) ++#define DMA_FC_THRESH_LO 5 ++#define DMA_FC_THRESH_VALUE ((DMA_FC_THRESH_LO << 16) | \ ++ DMA_FC_THRESH_HI) ++ ++#define DMA_XOFF_THRESHOLD_SHIFT 16 ++ ++#define TDMA_RING_REG_BASE \ ++ (GENET_TDMA_REG_OFF + DEFAULT_Q * DMA_RING_SIZE) ++#define TDMA_READ_PTR (TDMA_RING_REG_BASE + 0x00) ++#define TDMA_CONS_INDEX (TDMA_RING_REG_BASE + 0x08) ++#define TDMA_PROD_INDEX (TDMA_RING_REG_BASE + 0x0c) ++#define DMA_RING_BUF_SIZE 0x10 ++#define DMA_START_ADDR 0x14 ++#define DMA_END_ADDR 0x1c ++#define DMA_MBUF_DONE_THRESH 0x24 ++#define TDMA_FLOW_PERIOD (TDMA_RING_REG_BASE + 0x28) ++#define TDMA_WRITE_PTR (TDMA_RING_REG_BASE + 0x2c) ++ ++#define RDMA_RING_REG_BASE \ ++ (GENET_RDMA_REG_OFF + DEFAULT_Q * DMA_RING_SIZE) ++#define RDMA_WRITE_PTR (RDMA_RING_REG_BASE + 0x00) ++#define RDMA_PROD_INDEX (RDMA_RING_REG_BASE + 0x08) ++#define RDMA_CONS_INDEX (RDMA_RING_REG_BASE + 0x0c) ++#define RDMA_XON_XOFF_THRESH (RDMA_RING_REG_BASE + 0x28) ++#define RDMA_READ_PTR (RDMA_RING_REG_BASE + 0x2c) ++ ++#define TDMA_REG_BASE (GENET_TDMA_REG_OFF + DMA_RINGS_SIZE) ++#define RDMA_REG_BASE (GENET_RDMA_REG_OFF + DMA_RINGS_SIZE) ++#define DMA_RING_CFG 0x00 ++#define DMA_CTRL 0x04 ++#define DMA_SCB_BURST_SIZE 0x0c ++ ++#define RX_BUF_LENGTH 2048 ++#define RX_TOTAL_BUFSIZE (RX_BUF_LENGTH * RX_DESCS) ++#define RX_BUF_OFFSET 2 ++ ++struct bcmgenet_eth_priv { ++ char rxbuffer[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN); ++ void *mac_reg; ++ void *tx_desc_base; ++ void *rx_desc_base; ++ int tx_index; ++ int rx_index; ++ int c_index; ++ int phyaddr; ++ u32 interface; ++ u32 speed; ++ struct phy_device *phydev; ++ struct mii_dev *bus; ++}; ++ ++static void bcmgenet_umac_reset(struct bcmgenet_eth_priv *priv) ++{ ++ u32 reg; ++ ++ reg = readl(priv->mac_reg + SYS_RBUF_FLUSH_CTRL); ++ reg |= BIT(1); ++ writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); ++ udelay(10); ++ ++ reg &= ~BIT(1); ++ writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); ++ udelay(10); ++ ++ writel(0, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); ++ udelay(10); ++ ++ writel(0, priv->mac_reg + UMAC_CMD); ++ ++ writel(CMD_SW_RESET | CMD_LCL_LOOP_EN, priv->mac_reg + UMAC_CMD); ++ udelay(2); ++ writel(0, priv->mac_reg + UMAC_CMD); ++ ++ /* clear tx/rx counter */ ++ writel(MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT, ++ priv->mac_reg + UMAC_MIB_CTRL); ++ writel(0, priv->mac_reg + UMAC_MIB_CTRL); ++ ++ writel(ENET_MAX_MTU_SIZE, priv->mac_reg + UMAC_MAX_FRAME_LEN); ++ ++ /* init rx registers, enable ip header optimization */ ++ reg = readl(priv->mac_reg + RBUF_CTRL); ++ reg |= RBUF_ALIGN_2B; ++ writel(reg, (priv->mac_reg + RBUF_CTRL)); ++ ++ writel(1, (priv->mac_reg + RBUF_TBUF_SIZE_CTRL)); ++} ++ ++static int bcmgenet_gmac_write_hwaddr(struct udevice *dev) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ struct eth_pdata *pdata = dev_get_platdata(dev); ++ uchar *addr = pdata->enetaddr; ++ u32 reg; ++ ++ reg = addr[0] << 24 | addr[1] << 16 | addr[2] << 8 | addr[3]; ++ writel_relaxed(reg, priv->mac_reg + UMAC_MAC0); ++ ++ reg = addr[4] << 8 | addr[5]; ++ writel_relaxed(reg, priv->mac_reg + UMAC_MAC1); ++ ++ return 0; ++} ++ ++static void bcmgenet_disable_dma(struct bcmgenet_eth_priv *priv) ++{ ++ clrbits_32(priv->mac_reg + TDMA_REG_BASE + DMA_CTRL, DMA_EN); ++ clrbits_32(priv->mac_reg + RDMA_REG_BASE + DMA_CTRL, DMA_EN); ++ ++ writel(1, priv->mac_reg + UMAC_TX_FLUSH); ++ udelay(10); ++ writel(0, priv->mac_reg + UMAC_TX_FLUSH); ++} ++ ++static void bcmgenet_enable_dma(struct bcmgenet_eth_priv *priv) ++{ ++ u32 dma_ctrl = (1 << (DEFAULT_Q + DMA_RING_BUF_EN_SHIFT)) | DMA_EN; ++ ++ writel(dma_ctrl, priv->mac_reg + TDMA_REG_BASE + DMA_CTRL); ++ ++ setbits_32(priv->mac_reg + RDMA_REG_BASE + DMA_CTRL, dma_ctrl); ++} ++ ++static int bcmgenet_gmac_eth_send(struct udevice *dev, void *packet, int length) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ void *desc_base = priv->tx_desc_base + priv->tx_index * DMA_DESC_SIZE; ++ u32 len_stat = length << DMA_BUFLENGTH_SHIFT; ++ ulong packet_aligned = rounddown((ulong)packet, ARCH_DMA_MINALIGN); ++ u32 prod_index, cons; ++ u32 tries = 100; ++ ++ prod_index = readl(priv->mac_reg + TDMA_PROD_INDEX); ++ ++ /* There is actually no reason for the rounding here, but the ARMv7 ++ * implementation of flush_dcache_range() checks for aligned ++ * boundaries of the flushed range. ++ * Adjust them here to pass that check and avoid misleading messages. ++ */ ++ flush_dcache_range(packet_aligned, ++ packet_aligned + roundup(length, ARCH_DMA_MINALIGN)); ++ ++ len_stat |= 0x3F << DMA_TX_QTAG_SHIFT; ++ len_stat |= DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP; ++ ++ /* Set-up packet for transmission */ ++ writel(lower_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_LO)); ++ writel(upper_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_HI)); ++ writel(len_stat, (desc_base + DMA_DESC_LENGTH_STATUS)); ++ ++ /* Increment index and start transmission */ ++ if (++priv->tx_index >= TX_DESCS) ++ priv->tx_index = 0; ++ ++ prod_index++; ++ ++ /* Start Transmisson */ ++ writel(prod_index, priv->mac_reg + TDMA_PROD_INDEX); ++ ++ do { ++ cons = readl(priv->mac_reg + TDMA_CONS_INDEX); ++ } while ((cons & 0xffff) < prod_index && --tries); ++ if (!tries) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++/* Check whether all cache lines affected by an invalidate are within ++ * the buffer, to make sure we don't accidentally lose unrelated dirty ++ * data stored nearby. ++ * Alignment of the buffer start address will be checked in the implementation ++ * of invalidate_dcache_range(). ++ */ ++static void invalidate_dcache_check(unsigned long addr, size_t size, ++ size_t buffer_size) ++{ ++ size_t inval_size = roundup(size, ARCH_DMA_MINALIGN); ++ ++ if (unlikely(inval_size > buffer_size)) ++ printf("WARNING: Cache invalidate area exceeds buffer size\n"); ++ ++ invalidate_dcache_range(addr, addr + inval_size); ++} ++ ++static int bcmgenet_gmac_eth_recv(struct udevice *dev, ++ int flags, uchar **packetp) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ void *desc_base = priv->rx_desc_base + priv->rx_index * DMA_DESC_SIZE; ++ u32 prod_index = readl(priv->mac_reg + RDMA_PROD_INDEX); ++ u32 length, addr; ++ ++ if (prod_index == priv->c_index) ++ return -EAGAIN; ++ ++ length = readl(desc_base + DMA_DESC_LENGTH_STATUS); ++ length = (length >> DMA_BUFLENGTH_SHIFT) & DMA_BUFLENGTH_MASK; ++ addr = readl(desc_base + DMA_DESC_ADDRESS_LO); ++ ++ invalidate_dcache_check(addr, length, RX_BUF_LENGTH); ++ ++ /* To cater for the IP header alignment the hardware does. ++ * This would actually not be needed if we don't program ++ * RBUF_ALIGN_2B ++ */ ++ *packetp = (uchar *)(ulong)addr + RX_BUF_OFFSET; ++ ++ return length - RX_BUF_OFFSET; ++} ++ ++static int bcmgenet_gmac_free_pkt(struct udevice *dev, uchar *packet, ++ int length) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ ++ /* Tell the MAC we have consumed that last receive buffer. */ ++ priv->c_index = (priv->c_index + 1) & 0xFFFF; ++ writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX); ++ ++ /* Forward our descriptor pointer, wrapping around if needed. */ ++ if (++priv->rx_index >= RX_DESCS) ++ priv->rx_index = 0; ++ ++ return 0; ++} ++ ++static void rx_descs_init(struct bcmgenet_eth_priv *priv) ++{ ++ char *rxbuffs = &priv->rxbuffer[0]; ++ u32 len_stat, i; ++ void *desc_base = priv->rx_desc_base; ++ ++ priv->c_index = 0; ++ ++ len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN; ++ ++ for (i = 0; i < RX_DESCS; i++) { ++ writel(lower_32_bits((uintptr_t)&rxbuffs[i * RX_BUF_LENGTH]), ++ desc_base + i * DMA_DESC_SIZE + DMA_DESC_ADDRESS_LO); ++ writel(upper_32_bits((uintptr_t)&rxbuffs[i * RX_BUF_LENGTH]), ++ desc_base + i * DMA_DESC_SIZE + DMA_DESC_ADDRESS_HI); ++ writel(len_stat, ++ desc_base + i * DMA_DESC_SIZE + DMA_DESC_LENGTH_STATUS); ++ } ++} ++ ++static void rx_ring_init(struct bcmgenet_eth_priv *priv) ++{ ++ writel(DMA_MAX_BURST_LENGTH, ++ priv->mac_reg + RDMA_REG_BASE + DMA_SCB_BURST_SIZE); ++ ++ writel(0x0, priv->mac_reg + RDMA_RING_REG_BASE + DMA_START_ADDR); ++ writel(0x0, priv->mac_reg + RDMA_READ_PTR); ++ writel(0x0, priv->mac_reg + RDMA_WRITE_PTR); ++ writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1, ++ priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR); ++ ++ writel(0x0, priv->mac_reg + RDMA_PROD_INDEX); ++ writel(0x0, priv->mac_reg + RDMA_CONS_INDEX); ++ writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, ++ priv->mac_reg + RDMA_RING_REG_BASE + DMA_RING_BUF_SIZE); ++ writel(DMA_FC_THRESH_VALUE, priv->mac_reg + RDMA_XON_XOFF_THRESH); ++ writel(1 << DEFAULT_Q, priv->mac_reg + RDMA_REG_BASE + DMA_RING_CFG); ++} ++ ++static void tx_ring_init(struct bcmgenet_eth_priv *priv) ++{ ++ writel(DMA_MAX_BURST_LENGTH, ++ priv->mac_reg + TDMA_REG_BASE + DMA_SCB_BURST_SIZE); ++ ++ writel(0x0, priv->mac_reg + TDMA_RING_REG_BASE + DMA_START_ADDR); ++ writel(0x0, priv->mac_reg + TDMA_READ_PTR); ++ writel(0x0, priv->mac_reg + TDMA_WRITE_PTR); ++ writel(TX_DESCS * DMA_DESC_SIZE / 4 - 1, ++ priv->mac_reg + TDMA_RING_REG_BASE + DMA_END_ADDR); ++ writel(0x0, priv->mac_reg + TDMA_PROD_INDEX); ++ writel(0x0, priv->mac_reg + TDMA_CONS_INDEX); ++ writel(0x1, priv->mac_reg + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH); ++ writel(0x0, priv->mac_reg + TDMA_FLOW_PERIOD); ++ writel((TX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, ++ priv->mac_reg + TDMA_RING_REG_BASE + DMA_RING_BUF_SIZE); ++ ++ writel(1 << DEFAULT_Q, priv->mac_reg + TDMA_REG_BASE + DMA_RING_CFG); ++} ++ ++static int bcmgenet_adjust_link(struct bcmgenet_eth_priv *priv) ++{ ++ struct phy_device *phy_dev = priv->phydev; ++ u32 speed; ++ ++ switch (phy_dev->speed) { ++ case SPEED_1000: ++ speed = UMAC_SPEED_1000; ++ break; ++ case SPEED_100: ++ speed = UMAC_SPEED_100; ++ break; ++ case SPEED_10: ++ speed = UMAC_SPEED_10; ++ break; ++ default: ++ printf("bcmgenet: Unsupported PHY speed: %d\n", phy_dev->speed); ++ return -EINVAL; ++ } ++ ++ clrsetbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, OOB_DISABLE, ++ RGMII_LINK | RGMII_MODE_EN | ID_MODE_DIS); ++ ++ writel(speed << CMD_SPEED_SHIFT, (priv->mac_reg + UMAC_CMD)); ++ ++ return 0; ++} ++ ++static int bcmgenet_gmac_eth_start(struct udevice *dev) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ int ret; ++ ++ priv->tx_desc_base = priv->mac_reg + GENET_TX_OFF; ++ priv->rx_desc_base = priv->mac_reg + GENET_RX_OFF; ++ priv->tx_index = 0x0; ++ priv->rx_index = 0x0; ++ ++ bcmgenet_umac_reset(priv); ++ ++ bcmgenet_gmac_write_hwaddr(dev); ++ ++ /* Disable RX/TX DMA and flush TX queues */ ++ bcmgenet_disable_dma(priv); ++ ++ rx_ring_init(priv); ++ rx_descs_init(priv); ++ ++ tx_ring_init(priv); ++ ++ /* Enable RX/TX DMA */ ++ bcmgenet_enable_dma(priv); ++ ++ /* read PHY properties over the wire from generic PHY set-up */ ++ ret = phy_startup(priv->phydev); ++ if (ret) { ++ printf("bcmgenet: PHY startup failed: %d\n", ret); ++ return ret; ++ } ++ ++ /* Update MAC registers based on PHY property */ ++ ret = bcmgenet_adjust_link(priv); ++ if (ret) { ++ printf("bcmgenet: adjust PHY link failed: %d\n", ret); ++ return ret; ++ } ++ ++ /* Enable Rx/Tx */ ++ setbits_32(priv->mac_reg + UMAC_CMD, CMD_TX_EN | CMD_RX_EN); ++ ++ return 0; ++} ++ ++static int bcmgenet_phy_init(struct bcmgenet_eth_priv *priv, void *dev) ++{ ++ struct phy_device *phydev; ++ int ret; ++ ++ phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); ++ if (!phydev) ++ return -ENODEV; ++ ++ phydev->supported &= PHY_GBIT_FEATURES; ++ if (priv->speed) { ++ ret = phy_set_supported(priv->phydev, priv->speed); ++ if (ret) ++ return ret; ++ } ++ phydev->advertising = phydev->supported; ++ ++ phy_connect_dev(phydev, dev); ++ ++ priv->phydev = phydev; ++ phy_config(priv->phydev); ++ ++ return 0; ++} ++ ++static void bcmgenet_mdio_start(struct bcmgenet_eth_priv *priv) ++{ ++ setbits_32(priv->mac_reg + MDIO_CMD, MDIO_START_BUSY); ++} ++ ++static int bcmgenet_mdio_write(struct mii_dev *bus, int addr, int devad, ++ int reg, u16 value) ++{ ++ struct udevice *dev = bus->priv; ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ u32 val; ++ ++ /* Prepare the read operation */ ++ val = MDIO_WR | (addr << MDIO_PMD_SHIFT) | ++ (reg << MDIO_REG_SHIFT) | (0xffff & value); ++ writel_relaxed(val, priv->mac_reg + MDIO_CMD); ++ ++ /* Start MDIO transaction */ ++ bcmgenet_mdio_start(priv); ++ ++ return wait_for_bit_32(priv->mac_reg + MDIO_CMD, ++ MDIO_START_BUSY, false, 20, true); ++} ++ ++static int bcmgenet_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) ++{ ++ struct udevice *dev = bus->priv; ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ u32 val; ++ int ret; ++ ++ /* Prepare the read operation */ ++ val = MDIO_RD | (addr << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT); ++ writel_relaxed(val, priv->mac_reg + MDIO_CMD); ++ ++ /* Start MDIO transaction */ ++ bcmgenet_mdio_start(priv); ++ ++ ret = wait_for_bit_32(priv->mac_reg + MDIO_CMD, ++ MDIO_START_BUSY, false, 20, true); ++ if (ret) ++ return ret; ++ ++ val = readl_relaxed(priv->mac_reg + MDIO_CMD); ++ ++ return val & 0xffff; ++} ++ ++static int bcmgenet_mdio_init(const char *name, struct udevice *priv) ++{ ++ struct mii_dev *bus = mdio_alloc(); ++ ++ if (!bus) { ++ debug("Failed to allocate MDIO bus\n"); ++ return -ENOMEM; ++ } ++ ++ bus->read = bcmgenet_mdio_read; ++ bus->write = bcmgenet_mdio_write; ++ snprintf(bus->name, sizeof(bus->name), name); ++ bus->priv = (void *)priv; ++ ++ return mdio_register(bus); ++} ++ ++/* We only support RGMII (as used on the RPi4). */ ++static int bcmgenet_interface_set(struct bcmgenet_eth_priv *priv) ++{ ++ phy_interface_t phy_mode = priv->interface; ++ ++ switch (phy_mode) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ writel(PORT_MODE_EXT_GPHY, priv->mac_reg + SYS_PORT_CTRL); ++ break; ++ default: ++ printf("unknown phy mode: %d\n", priv->interface); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int bcmgenet_eth_probe(struct udevice *dev) ++{ ++ struct eth_pdata *pdata = dev_get_platdata(dev); ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ ofnode mdio_node; ++ const char *name; ++ u32 reg; ++ int ret; ++ u8 major; ++ ++ priv->mac_reg = map_physmem(pdata->iobase, SZ_64K, MAP_NOCACHE); ++ priv->interface = pdata->phy_interface; ++ priv->speed = pdata->max_speed; ++ ++ /* Read GENET HW version */ ++ reg = readl_relaxed(priv->mac_reg + SYS_REV_CTRL); ++ major = (reg >> 24) & 0x0f; ++ if (major != 6) { ++ if (major == 5) ++ major = 4; ++ else if (major == 0) ++ major = 1; ++ ++ printf("Unsupported GENETv%d.%d\n", major, (reg >> 16) & 0x0f); ++ return -ENODEV; ++ } ++ ++ ret = bcmgenet_interface_set(priv); ++ if (ret) ++ return ret; ++ ++ mdio_node = dev_read_first_subnode(dev); ++ name = ofnode_get_name(mdio_node); ++ ++ ret = bcmgenet_mdio_init(name, dev); ++ if (ret) ++ return ret; ++ ++ priv->bus = miiphy_get_dev_by_name(name); ++ ++ return bcmgenet_phy_init(priv, dev); ++} ++ ++static void bcmgenet_gmac_eth_stop(struct udevice *dev) ++{ ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ ++ clrbits_32(priv->mac_reg + UMAC_CMD, CMD_TX_EN | CMD_RX_EN); ++ clrbits_32(priv->mac_reg + TDMA_REG_BASE + DMA_CTRL, ++ 1 << (DEFAULT_Q + DMA_RING_BUF_EN_SHIFT) | DMA_EN); ++} ++ ++static const struct eth_ops bcmgenet_gmac_eth_ops = { ++ .start = bcmgenet_gmac_eth_start, ++ .write_hwaddr = bcmgenet_gmac_write_hwaddr, ++ .send = bcmgenet_gmac_eth_send, ++ .recv = bcmgenet_gmac_eth_recv, ++ .free_pkt = bcmgenet_gmac_free_pkt, ++ .stop = bcmgenet_gmac_eth_stop, ++}; ++ ++static int bcmgenet_eth_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct eth_pdata *pdata = dev_get_platdata(dev); ++ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); ++ struct ofnode_phandle_args phy_node; ++ const char *phy_mode; ++ int ret; ++ ++ pdata->iobase = dev_read_addr(dev); ++ ++ /* Get phy mode from DT */ ++ pdata->phy_interface = -1; ++ phy_mode = dev_read_string(dev, "phy-mode"); ++ if (phy_mode) ++ pdata->phy_interface = phy_get_interface_by_name(phy_mode); ++ if (pdata->phy_interface == -1) { ++ debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++ return -EINVAL; ++ } ++ ++ ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, ++ &phy_node); ++ if (!ret) { ++ ofnode_read_s32(phy_node.node, "reg", &priv->phyaddr); ++ ofnode_read_s32(phy_node.node, "max-speed", &pdata->max_speed); ++ } ++ ++ return 0; ++} ++ ++/* The BCM2711 implementation has a limited burst length compared to a generic ++ * GENETv5 version, but we go with that shorter value (8) in both cases, for ++ * the sake of simplicity. ++ */ ++static const struct udevice_id bcmgenet_eth_ids[] = { ++ {.compatible = "brcm,genet-v5"}, ++ {.compatible = "brcm,bcm2711-genet-v5"}, ++ {} ++}; ++ ++U_BOOT_DRIVER(eth_bcmgenet) = { ++ .name = "eth_bcmgenet", ++ .id = UCLASS_ETH, ++ .of_match = bcmgenet_eth_ids, ++ .ofdata_to_platdata = bcmgenet_eth_ofdata_to_platdata, ++ .probe = bcmgenet_eth_probe, ++ .ops = &bcmgenet_gmac_eth_ops, ++ .priv_auto_alloc_size = sizeof(struct bcmgenet_eth_priv), ++ .platdata_auto_alloc_size = sizeof(struct eth_pdata), ++ .flags = DM_FLAG_ALLOC_PRIV_DMA, ++}; + +From patchwork Fri Jan 17 01:20:46 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andre Przywara +X-Patchwork-Id: 1224577 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=arm.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 47zNZQ66yWz9s1x + for ; + Fri, 17 Jan 2020 12:21:50 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + 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u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de +X-Virus-Status: Clean + +From: Amit Singh Tomar + +Some of the devices(for instance, pcie and gnet controller) sitting on +SCB bus falls behind/below the memory range that we currenty have. + +This patch updates the memory range to map those devices correctly. + +Signed-off-by: Amit Singh Tomar +Reviewed-by: Andre Przywara +Signed-off-by: Andre Przywara +--- + arch/arm/mach-bcm283x/init.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 3b5f45b431..9966d6c833 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -42,9 +42,9 @@ static struct mm_region bcm2711_mem_map[] = { + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { +- .virt = 0xfe000000UL, +- .phys = 0xfe000000UL, +- .size = 0x01800000UL, ++ .virt = 0xfc000000UL, ++ .phys = 0xfc000000UL, ++ .size = 0x03800000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + +From patchwork Fri Jan 17 01:20:47 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Andre Przywara +X-Patchwork-Id: 1224576 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=arm.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 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+Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=arm.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=andre.przywara@arm.com +Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EE23A11FB; + Thu, 16 Jan 2020 17:21:06 -0800 (PST) +Received: from localhost.localdomain (unknown [172.31.20.19]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id + 88DE23F534; Thu, 16 Jan 2020 17:21:05 -0800 (PST) +From: Andre Przywara +To: Joe Hershberger , + Matthias Brugger +Subject: [PATCH v2 3/3] rpi4: Enable GENET Ethernet controller +Date: Fri, 17 Jan 2020 01:20:47 +0000 +Message-Id: <20200117012047.31096-4-andre.przywara@arm.com> +X-Mailer: git-send-email 2.14.1 +In-Reply-To: <20200117012047.31096-1-andre.przywara@arm.com> +References: <20200117012047.31096-1-andre.przywara@arm.com> +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.26 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Cc: Sascha Dewald , u-boot@lists.denx.de, + LABBE Corentin +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de +X-Virus-Status: Clean + +From: Amit Singh Tomar + +The Raspberry Pi 4 SoC features an integrated Gigabit Ethernet +controller, connected as a platform device. + +Enable the new driver in the three applicable defconfigs, to allow +TFTP booting on the board. + +Signed-off-by: Amit Singh Tomar +[Andre: Add joined and 32-bit configs] +Signed-off-by: Andre Przywara +--- + configs/rpi_4_32b_defconfig | 2 ++ + configs/rpi_4_defconfig | 2 ++ + configs/rpi_arm64_defconfig | 1 + + 3 files changed, 5 insertions(+) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 00f80f71ad..e7ea88bd4b 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -24,6 +24,8 @@ CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_DM_ETH=y ++CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 8cf1bb81ff..b0f9cf1c0e 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -24,6 +24,8 @@ CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_DM_ETH=y ++CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 10fbe0db92..00b3096481 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -36,6 +36,7 @@ CONFIG_USB_KEYBOARD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_LAN78XX=y + CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_BCMGENET=y + CONFIG_DM_VIDEO=y + CONFIG_VIDEO_BPP32=y + CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/sources b/sources index 03c2370..0a45ad1 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.01.tar.bz2) = 073d4e0234095c1bda1ffa7a648972aa4530d106ee1a73035e0501b1aba2951653582c8b7bcf338d4e95012fa67e75f97b7e1fbac5cc764d609b671ef29617f7 +SHA512 (u-boot-2020.04-rc1.tar.bz2) = 06c6974a7d04258d6c05bb43ae8e03dbea5f290f07ed457be01927f68d825a80825e0157fa4a7df6e47a035f119075779c059d23c2d4545ec72212f1c22d3cbf diff --git a/uboot-tools.spec b/uboot-tools.spec index ea84748..519e577 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc5 +%global candidate rc1 Name: uboot-tools -Version: 2020.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2020.04 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,9 +26,7 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch9: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch -Patch10: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch -Patch11: wandboard-Fix-the-DM_PMIC-conversion.patch +Patch12: Ethernet-support-for-Raspberry-Pi-4.patch BuildRequires: bc BuildRequires: dtc @@ -250,6 +248,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Jan 29 2020 Peter Robinson 2020.04-0.1-rc1 +- 2020.04 RC1 + * Tue Jan 7 2020 Peter Robinson 2020.01-1 - 2020.01 diff --git a/wandboard-Fix-the-DM_PMIC-conversion.patch b/wandboard-Fix-the-DM_PMIC-conversion.patch deleted file mode 100644 index fba0474..0000000 --- a/wandboard-Fix-the-DM_PMIC-conversion.patch +++ /dev/null @@ -1,298 +0,0 @@ -From patchwork Tue Dec 10 09:32:59 2019 -Content-Type: text/plain; charset="utf-8" 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-X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de -X-Virus-Status: Clean - -Commit ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") -caused the following pmic_get() error: - -CPU: Freescale i.MX6QP rev1.0 at 792 MHz -Reset cause: POR -DRAM: 2 GiB -PMIC: pmic_get() ret -19 -... - -and since the PMIC presence is used to determine the board D1 revision, -the following error is seen when booting a board rev D1: - -WARNING: Could not determine dtb to use - -and the kernel does not boot at all. - -Fix the regression by passing "pfuze100@8" as the correct parameter -to the pmic_get() function in the DM case. - -Fixes: ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") -Signed-off-by: Fabio Estevam ---- -Changes since v2: -- None - - board/wandboard/wandboard.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c -index 6c1e4ef27d..b2f961a7f0 100644 ---- a/board/wandboard/wandboard.c -+++ b/board/wandboard/wandboard.c -@@ -363,7 +363,7 @@ int power_init_board(void) - - puts("PMIC: "); - -- ret = pmic_get("pfuze100", &dev); -+ ret = pmic_get("pfuze100@8", &dev); - if (ret < 0) { - printf("pmic_get() ret %d\n", ret); - return 0; - -From patchwork Tue Dec 10 09:33:00 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 1206992 -X-Patchwork-Delegate: sbabic@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification 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<20191210093300.31692-2-festevam@gmail.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20191210093300.31692-1-festevam@gmail.com> -References: <20191210093300.31692-1-festevam@gmail.com> -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: u-boot@lists.denx.de, uboot-imx@nxp.com, trini@konsulko.com -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de -X-Virus-Status: Clean - -After the conversion to DM_PMIC the following output is seen: - -PMIC: PMIC: PFUZE100 ID=0x10 - -Remove the unnecessary PMIC string from the board file to -avoid the repetead string. - -Signed-off-by: Fabio Estevam ---- -Changes since v2: -- None - - board/wandboard/wandboard.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c -index 7209cc8211..e386ad2cc1 100644 ---- a/board/wandboard/wandboard.c -+++ b/board/wandboard/wandboard.c -@@ -361,8 +361,6 @@ int power_init_board(void) - struct udevice *dev; - int reg, ret; - -- puts("PMIC: "); -- - ret = pmic_get("pfuze100@8", &dev); - if (ret < 0) { - printf("pmic_get() ret %d\n", ret); diff --git a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch deleted file mode 100644 index 98039d4..0000000 --- a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch +++ /dev/null @@ -1,286 +0,0 @@ -From patchwork Thu Dec 5 08:46:57 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Michal Simek -X-Patchwork-Id: 1204536 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de 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[178.255.168.35]) - by smtp.gmail.com with ESMTPSA id - a7sm11805025wrr.50.2019.12.05.00.47.03 - (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); - Thu, 05 Dec 2019 00:47:03 -0800 (PST) -From: Michal Simek -To: u-boot@lists.denx.de, - git@xilinx.com, - pbrobinson@gmail.com -Subject: [PATCH v2] arm64: zynqmp: Add support for u-boot.itb generation with - ATF -Date: Thu, 5 Dec 2019 09:46:57 +0100 -Message-Id: <311b20ae349e6a93714c227df5907667d1cb9463.1575535613.git.michal.simek@xilinx.com> -X-Mailer: git-send-email 2.24.0 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: Marek Vasut , Stefan Roese -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de -X-Virus-Status: Clean - -Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which -includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for -quite a long time but with using out of tree solution. The patch is filling -this gap. - -Tested on zcu102, zcu104 and zcu100/Ultra96. - -zcu100/Ultra96 v2.2 ATF build by: -make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31 - -Signed-off-by: Michal Simek ---- - -Changes in v2: -- Exchange u-boot/atf in config section -- Use default ATF baseaddr from mainline -- Update commit message - - Kconfig | 3 +- - arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++ - include/configs/xilinx_zynqmp.h | 6 +- - 3 files changed, 106 insertions(+), 2 deletions(-) - create mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh - -diff --git a/Kconfig b/Kconfig -index e22417ec4471..7efafffec0a4 100644 ---- a/Kconfig -+++ b/Kconfig -@@ -253,7 +253,7 @@ config BUILD_TARGET - default "u-boot-spl.kwb" if ARCH_MVEBU && SPL - default "u-boot-elf.srec" if RCAR_GEN3 - default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ -- ARCH_SUNXI || RISCV) -+ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if KIRKWOOD - default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT - default "u-boot-with-spl.imx" if ARCH_MX6 && SPL -@@ -481,6 +481,7 @@ config SPL_FIT_GENERATOR - depends on SPL_FIT - default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI - default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP -+ default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP - default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV - help - Specifies a (platform specific) script file to generate the FIT -diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh -new file mode 100755 -index 000000000000..c50aba45ca5c ---- /dev/null -+++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh -@@ -0,0 +1,99 @@ -+#!/bin/sh -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# script to generate FIT image source for Xilinx ZynqMP boards with -+# ARM Trusted Firmware and multiple device trees (given on the command line) -+# -+# usage: $0 [ [&2 -+else -+ echo "$BL31 size: " >&2 -+ ls -lct $BL31 | awk '{print $5}' >&2 -+fi -+ -+ -+ -+cat << __HEADER_EOF -+/dts-v1/; -+ -+/ { -+ description = "Configuration to load ATF before U-Boot"; -+ -+ images { -+ uboot { -+ description = "U-Boot (64-bit)"; -+ data = /incbin/("$BL33"); -+ type = "firmware"; -+ os = "u-boot"; -+ arch = "arm64"; -+ compression = "none"; -+ load = <$BL33_LOAD_ADDR>; -+ hash { -+ algo = "md5"; -+ }; -+ }; -+ atf { -+ description = "ARM Trusted Firmware"; -+ data = /incbin/("$BL31"); -+ type = "firmware"; -+ os = "arm-trusted-firmware"; -+ arch = "arm64"; -+ compression = "none"; -+ load = <$ATF_LOAD_ADDR>; -+ entry = <$ATF_LOAD_ADDR>; -+ hash { -+ algo = "md5"; -+ }; -+ }; -+__HEADER_EOF -+ -+cnt=1 -+for dtname in $* -+do -+ cat << __FDT_IMAGE_EOF -+ fdt_$cnt { -+ description = "$(basename $dtname .dtb)"; -+ data = /incbin/("$dtname"); -+ type = "flat_dt"; -+ arch = "arm64"; -+ compression = "none"; -+ hash { -+ algo = "md5"; -+ }; -+ }; -+__FDT_IMAGE_EOF -+cnt=$((cnt+1)) -+done -+ -+cat << __CONF_HEADER_EOF -+ }; -+ configurations { -+ default = "config_1"; -+ -+__CONF_HEADER_EOF -+ -+cnt=1 -+for dtname in $* -+do -+cat << __CONF_SECTION1_EOF -+ config_$cnt { -+ description = "$(basename $dtname .dtb)"; -+ firmware = "atf"; -+ loadables = "uboot"; -+ fdt = "fdt_$cnt"; -+ }; -+__CONF_SECTION1_EOF -+cnt=$((cnt+1)) -+done -+ -+cat << __ITS_EOF -+ }; -+}; -+__ITS_EOF -diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h -index ee1ceebf1291..e7eb8dbfcb45 100644 ---- a/include/configs/xilinx_zynqmp.h -+++ b/include/configs/xilinx_zynqmp.h -@@ -243,7 +243,11 @@ - # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ - # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ - # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */ --# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -+# if defined(CONFIG_SPL_LOAD_FIT) -+# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" -+# else -+# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -+# endif - #endif - - #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) diff --git a/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch deleted file mode 100644 index 83cc155..0000000 --- a/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch +++ /dev/null @@ -1,199 +0,0 @@ -From patchwork Tue Dec 3 15:33:26 2019 -Content-Type: text/plain; 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[178.255.168.35]) - by smtp.gmail.com with ESMTPSA id - h17sm4245700wrs.18.2019.12.03.07.33.27 - (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); - Tue, 03 Dec 2019 07:33:27 -0800 (PST) -From: Michal Simek -To: u-boot@lists.denx.de, - git@xilinx.com, - pbrobinson@gmail.com -Subject: [PATCH v2] arm64: zynqmp: Do not assing MIO34 that early on zcu100 -Date: Tue, 3 Dec 2019 16:33:26 +0100 -Message-Id: <175608f69633f3876bebdde1c2f7b9cf54b61716.1575387200.git.michal.simek@xilinx.com> -X-Mailer: git-send-email 2.24.0 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de -X-Virus-Status: Clean - -MIO34 is connected to POWER_KILL signal. When MIO configuration is done in -psu_init() and this pin is assigned to PMU but PMU configuration is not -loaded yet. PMU gpio output is high that means board is powered off -immediately. -The patch is fixing this sequence that MIO34 stays assing to ps gpio IP. -PMU config is loaded in SPL and then pin assigned to PMU through -psu_post_config_data(). - -Signed-off-by: Michal Simek ---- - -Changes in v2: -- add missing declaration in header - - arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h | 1 + - arch/arm/mach-zynqmp/psu_spl_init.c | 9 +++++++++ - arch/arm/mach-zynqmp/spl.c | 1 + - board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 7 ++++++- - 4 files changed, 17 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h -index 15e54c049387..e37acda2f89e 100644 ---- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h -+++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h -@@ -21,5 +21,6 @@ void prog_reg(unsigned long addr, unsigned long mask, - unsigned long shift, unsigned long value); - - int psu_init(void); -+unsigned long psu_post_config_data(void); - - #endif /* _PSU_INIT_GPL_H_ */ -diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c -index b357de32358c..b6abdfd608ee 100644 ---- a/arch/arm/mach-zynqmp/psu_spl_init.c -+++ b/arch/arm/mach-zynqmp/psu_spl_init.c -@@ -77,3 +77,12 @@ __weak int psu_init(void) - */ - return -1; - } -+ -+__weak unsigned long psu_post_config_data(void) -+{ -+ /* -+ * This function is overridden by the one in -+ * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. -+ */ -+ return 0; -+} -diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c -index 6ba42bb42f62..6551b33f42d0 100644 ---- a/arch/arm/mach-zynqmp/spl.c -+++ b/arch/arm/mach-zynqmp/spl.c -@@ -60,6 +60,7 @@ void spl_board_init(void) - preloader_console_init(); - ps_mode_reset(MODE_RESET); - board_init(); -+ psu_post_config_data(); - } - #endif - -diff --git a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c -index e1fdabaeb9d1..585b3afc218a 100644 ---- a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c -+++ b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c -@@ -409,7 +409,6 @@ static unsigned long psu_mio_init_data(void) - psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); -- psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U); -@@ -990,3 +989,9 @@ int psu_init(void) - return 1; - return 0; - } -+ -+unsigned long psu_post_config_data(void) -+{ -+ psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); -+ return 0; -+} From 1ca87c8c2912a5b3bbde0fbe05fc6a9387858da3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 30 Jan 2020 09:46:03 +0000 Subject: [PATCH 065/351] 2020.04 device updates, gcc 10 fix --- ...e-redundant-YYLOC-global-declaration.patch | 27 +++++++++++++++++++ aarch64-boards | 5 ++-- arm-boards | 1 + uboot-tools.spec | 1 + 4 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 0001-Remove-redundant-YYLOC-global-declaration.patch diff --git a/0001-Remove-redundant-YYLOC-global-declaration.patch b/0001-Remove-redundant-YYLOC-global-declaration.patch new file mode 100644 index 0000000..cc1fbf4 --- /dev/null +++ b/0001-Remove-redundant-YYLOC-global-declaration.patch @@ -0,0 +1,27 @@ +From 1e66b87f6a063d09f9fd26c9e78589d333e316e7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 30 Jan 2020 08:55:28 +0000 +Subject: [PATCH] Remove redundant YYLOC global declaration + +Same as the upstream fix for building dtc with gcc 10. + +Signed-off-by: Peter Robinson +--- + scripts/dtc/dtc-lexer.l | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l +index fd825ebba6..24af549977 100644 +--- a/scripts/dtc/dtc-lexer.l ++++ b/scripts/dtc/dtc-lexer.l +@@ -38,7 +38,6 @@ LINECOMMENT "//".*\n + #include "srcpos.h" + #include "dtc-parser.tab.h" + +-YYLTYPE yylloc; + extern bool treesource_error; + + /* CAUTION: this will stop working if we ever use yyless() or yyunput() */ +-- +2.24.1 + diff --git a/aarch64-boards b/aarch64-boards index dd445d8..497ba8f 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,6 +1,5 @@ a64-olinuxino amarula_a64_relic -avnet_ultra96_rev1 bananapi_m2_plus_h5 bananapi_m64 dragonboard410c @@ -18,8 +17,10 @@ khadas-edge-rk3399 khadas-vim khadas-vim2 khadas-vim3 +khadas-vim3l libretech-ac libretech_all_h3_cc_h5 +libretech_all_h5_cc_h5 libretech-cc mvebu_espressobin-88f3720 mvebu_mcbin-88f8040 @@ -60,4 +61,4 @@ sopine_baseboard teres_i turris_mox vexpress_aemv8a_juno -xilinx_zynqmp_zcu100_revC +xilinx_zynqmp_virt diff --git a/arm-boards b/arm-boards index 19326dc..9b11dbe 100644 --- a/arm-boards +++ b/arm-boards @@ -60,6 +60,7 @@ jetson-tk1 kc1 Lamobo_R1 libretech_all_h3_cc_h2_plus +libretech_all_h3_it_h5 Linksprite_pcDuino Linksprite_pcDuino3 Linksprite_pcDuino3_Nano diff --git a/uboot-tools.spec b/uboot-tools.spec index 519e577..4a98d08 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -21,6 +21,7 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement +Patch3: 0001-Remove-redundant-YYLOC-global-declaration.patch Patch4: usb-kbd-fixes.patch Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch From fbb777748cbcd5cff1f240461dc81ccd81b1977d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 30 Jan 2020 13:15:36 +0000 Subject: [PATCH 066/351] libretech_all_h3_it_h5 is aarch64 --- aarch64-boards | 1 + arm-boards | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index 497ba8f..4e8f97c 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -20,6 +20,7 @@ khadas-vim3 khadas-vim3l libretech-ac libretech_all_h3_cc_h5 +libretech_all_h3_it_h5 libretech_all_h5_cc_h5 libretech-cc mvebu_espressobin-88f3720 diff --git a/arm-boards b/arm-boards index 9b11dbe..19326dc 100644 --- a/arm-boards +++ b/arm-boards @@ -60,7 +60,6 @@ jetson-tk1 kc1 Lamobo_R1 libretech_all_h3_cc_h2_plus -libretech_all_h3_it_h5 Linksprite_pcDuino Linksprite_pcDuino3 Linksprite_pcDuino3_Nano From b16faa89e510a351549178e93ba542115a27ca72 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 2 Feb 2020 11:19:15 +0000 Subject: [PATCH 067/351] Update genet NIC driver --- Ethernet-support-for-Raspberry-Pi-4.patch | 124 ++++++++++++---------- uboot-tools.spec | 5 +- 2 files changed, 71 insertions(+), 58 deletions(-) diff --git a/Ethernet-support-for-Raspberry-Pi-4.patch b/Ethernet-support-for-Raspberry-Pi-4.patch index 799c8b6..4921cef 100644 --- a/Ethernet-support-for-Raspberry-Pi-4.patch +++ b/Ethernet-support-for-Raspberry-Pi-4.patch @@ -1,9 +1,10 @@ -From patchwork Fri Jan 17 01:20:45 2020 +From patchwork Mon Jan 27 01:14:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1224574 +X-Patchwork-Id: 1229487 +X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -18,45 +19,45 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 47zNYx20D9z9s1x + by ozlabs.org (Postfix) with ESMTPS id 485WyY3RgHz9sNx for ; - Fri, 17 Jan 2020 12:21:21 +1100 (AEDT) + Mon, 27 Jan 2020 12:15:33 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 06756819DE; - Fri, 17 Jan 2020 02:21:12 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 032668149B; + Mon, 27 Jan 2020 02:15:24 +0100 (CET) Authentication-Results: phobos.denx.de; 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- Thu, 16 Jan 2020 17:21:03 -0800 (PST) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2859A31B; + Sun, 26 Jan 2020 17:15:12 -0800 (PST) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id - 28AF53F534; Thu, 16 Jan 2020 17:21:02 -0800 (PST) + 8F3D83F52E; Sun, 26 Jan 2020 17:15:09 -0800 (PST) From: Andre Przywara To: Joe Hershberger , Matthias Brugger -Subject: [PATCH v2 1/3] net: Add support for Broadcom GENETv5 Ethernet +Subject: [PATCH v3 1/3] net: Add support for Broadcom GENETv5 Ethernet controller -Date: Fri, 17 Jan 2020 01:20:45 +0000 -Message-Id: <20200117012047.31096-2-andre.przywara@arm.com> +Date: Mon, 27 Jan 2020 01:14:42 +0000 +Message-Id: <20200127011444.8114-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 -In-Reply-To: <20200117012047.31096-1-andre.przywara@arm.com> -References: <20200117012047.31096-1-andre.przywara@arm.com> +In-Reply-To: <20200127011444.8114-1-andre.przywara@arm.com> +References: <20200127011444.8114-1-andre.przywara@arm.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list @@ -91,8 +92,8 @@ Signed-off-by: Andre Przywara --- drivers/net/Kconfig | 7 + drivers/net/Makefile | 1 + - drivers/net/bcmgenet.c | 722 +++++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 730 insertions(+) + drivers/net/bcmgenet.c | 729 +++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 737 insertions(+) create mode 100644 drivers/net/bcmgenet.c diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig @@ -127,10 +128,10 @@ index 30991834ec..6e0a68834d 100644 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c new file mode 100644 -index 0000000000..4f8f190071 +index 0000000000..8f4848aec6 --- /dev/null +++ b/drivers/net/bcmgenet.c -@@ -0,0 +1,722 @@ +@@ -0,0 +1,729 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Amit Singh Tomar @@ -772,6 +773,13 @@ index 0000000000..4f8f190071 + if (ret) + return ret; + ++ writel(0, priv->mac_reg + SYS_RBUF_FLUSH_CTRL); ++ udelay(10); ++ /* disable MAC while updating its registers */ ++ writel(0, priv->mac_reg + UMAC_CMD); ++ /* issue soft reset with (rg)mii loopback to ensure a stable rxclk */ ++ writel(CMD_SW_RESET | CMD_LCL_LOOP_EN, priv->mac_reg + UMAC_CMD); ++ + mdio_node = dev_read_first_subnode(dev); + name = ofnode_get_name(mdio_node); + @@ -789,8 +797,8 @@ index 0000000000..4f8f190071 + struct bcmgenet_eth_priv *priv = dev_get_priv(dev); + + clrbits_32(priv->mac_reg + UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -+ clrbits_32(priv->mac_reg + TDMA_REG_BASE + DMA_CTRL, -+ 1 << (DEFAULT_Q + DMA_RING_BUF_EN_SHIFT) | DMA_EN); ++ ++ bcmgenet_disable_dma(priv); +} + +static const struct eth_ops bcmgenet_gmac_eth_ops = { @@ -854,12 +862,13 @@ index 0000000000..4f8f190071 + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; -From patchwork Fri Jan 17 01:20:46 2020 +From patchwork Mon Jan 27 01:14:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1224577 +X-Patchwork-Id: 1229488 +X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -874,44 +883,44 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 47zNZQ66yWz9s1x + by ozlabs.org (Postfix) with ESMTPS id 485Wyk1KSXz9sNx for ; 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- Thu, 16 Jan 2020 17:21:06 -0800 (PST) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA93B31B; + Sun, 26 Jan 2020 17:15:17 -0800 (PST) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id - 88DE23F534; Thu, 16 Jan 2020 17:21:05 -0800 (PST) + 677703F52E; Sun, 26 Jan 2020 17:15:15 -0800 (PST) From: Andre Przywara To: Joe Hershberger , Matthias Brugger -Subject: [PATCH v2 3/3] rpi4: Enable GENET Ethernet controller -Date: Fri, 17 Jan 2020 01:20:47 +0000 -Message-Id: <20200117012047.31096-4-andre.przywara@arm.com> +Subject: [PATCH v3 3/3] rpi4: Enable GENET Ethernet controller +Date: Mon, 27 Jan 2020 01:14:44 +0000 +Message-Id: <20200127011444.8114-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 -In-Reply-To: <20200117012047.31096-1-andre.przywara@arm.com> -References: <20200117012047.31096-1-andre.przywara@arm.com> +In-Reply-To: <20200127011444.8114-1-andre.przywara@arm.com> +References: <20200127011444.8114-1-andre.przywara@arm.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list diff --git a/uboot-tools.spec b/uboot-tools.spec index 4a98d08..cc0beba 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.04 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -249,6 +249,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Feb 2 2020 Peter Robinson 2020.04-0.2-rc1 +- Update genet NIC driver + * Wed Jan 29 2020 Peter Robinson 2020.04-0.1-rc1 - 2020.04 RC1 From 2c4918a96d71f232bba2fe8e2e9b9eaa602f8089 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 13 Feb 2020 11:09:39 +0000 Subject: [PATCH 068/351] 2020.04 RC2 --- ...e-redundant-YYLOC-global-declaration.patch | 27 - Ethernet-support-for-Raspberry-Pi-4.patch | 1107 ----------------- sources | 2 +- uboot-tools.spec | 9 +- 4 files changed, 6 insertions(+), 1139 deletions(-) delete mode 100644 0001-Remove-redundant-YYLOC-global-declaration.patch delete mode 100644 Ethernet-support-for-Raspberry-Pi-4.patch diff --git a/0001-Remove-redundant-YYLOC-global-declaration.patch b/0001-Remove-redundant-YYLOC-global-declaration.patch deleted file mode 100644 index cc1fbf4..0000000 --- a/0001-Remove-redundant-YYLOC-global-declaration.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 1e66b87f6a063d09f9fd26c9e78589d333e316e7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 30 Jan 2020 08:55:28 +0000 -Subject: [PATCH] Remove redundant YYLOC global declaration - -Same as the upstream fix for building dtc with gcc 10. - -Signed-off-by: Peter Robinson ---- - scripts/dtc/dtc-lexer.l | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l -index fd825ebba6..24af549977 100644 ---- a/scripts/dtc/dtc-lexer.l -+++ b/scripts/dtc/dtc-lexer.l -@@ -38,7 +38,6 @@ LINECOMMENT "//".*\n - #include "srcpos.h" - #include "dtc-parser.tab.h" - --YYLTYPE yylloc; - extern bool treesource_error; - - /* CAUTION: this will stop working if we ever use yyless() or yyunput() */ --- -2.24.1 - diff --git a/Ethernet-support-for-Raspberry-Pi-4.patch b/Ethernet-support-for-Raspberry-Pi-4.patch deleted file mode 100644 index 4921cef..0000000 --- a/Ethernet-support-for-Raspberry-Pi-4.patch +++ /dev/null @@ -1,1107 +0,0 @@ -From patchwork Mon Jan 27 01:14:42 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1229487 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=arm.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) - server-digest SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 485WyY3RgHz9sNx - for ; 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- spf=pass smtp.mailfrom=andre.przywara@arm.com -Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) - by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2859A31B; - Sun, 26 Jan 2020 17:15:12 -0800 (PST) -Received: from localhost.localdomain (unknown [172.31.20.19]) - by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id - 8F3D83F52E; Sun, 26 Jan 2020 17:15:09 -0800 (PST) -From: Andre Przywara -To: Joe Hershberger , - Matthias Brugger -Subject: [PATCH v3 1/3] net: Add support for Broadcom GENETv5 Ethernet - controller -Date: Mon, 27 Jan 2020 01:14:42 +0000 -Message-Id: <20200127011444.8114-2-andre.przywara@arm.com> -X-Mailer: git-send-email 2.14.1 -In-Reply-To: <20200127011444.8114-1-andre.przywara@arm.com> -References: <20200127011444.8114-1-andre.przywara@arm.com> -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: Sascha Dewald , u-boot@lists.denx.de, - LABBE Corentin -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de -X-Virus-Status: Clean - -From: Amit Singh Tomar - -The Broadcom GENET Ethernet MACs are used in several MIPS based SoCs -and in the Broadcom 2711/2838 SoC used on the Raspberry Pi 4. -There is no publicly available documentation, so this driver is based -on the Linux driver. Compared to that the queue management is -drastically simplified, also we only support version 5 of the IP and -RGMII connections between MAC and PHY, as used on the RPi4. - -Signed-off-by: Amit Singh Tomar -Reviewed-by: Andre Przywara -[Andre: heavy cleanup and a few fixes] -Signed-off-by: Andre Przywara ---- - drivers/net/Kconfig | 7 + - drivers/net/Makefile | 1 + - drivers/net/bcmgenet.c | 729 +++++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 737 insertions(+) - create mode 100644 drivers/net/bcmgenet.c - -diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig -index 01d087f229..4d1013c984 100644 ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -136,6 +136,13 @@ config BCM6368_ETH - help - This driver supports the BCM6368 Ethernet MAC. - -+config BCMGENET -+ bool "BCMGENET V5 support" -+ depends on DM_ETH -+ select PHYLIB -+ help -+ This driver supports the BCMGENET Ethernet MAC. -+ - config DWC_ETH_QOS - bool "Synopsys DWC Ethernet QOS device support" - depends on DM_ETH -diff --git a/drivers/net/Makefile b/drivers/net/Makefile -index 30991834ec..6e0a68834d 100644 ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_AG7XXX) += ag7xxx.o - obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o - obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o - obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o -+obj-$(CONFIG_BCMGENET) += bcmgenet.o - obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o - obj-$(CONFIG_DRIVER_AX88180) += ax88180.o - obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o -diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c -new file mode 100644 -index 0000000000..8f4848aec6 ---- /dev/null -+++ b/drivers/net/bcmgenet.c -@@ -0,0 +1,729 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2019 Amit Singh Tomar -+ * -+ * Driver for Broadcom GENETv5 Ethernet controller (as found on the RPi4) -+ * This driver is based on the Linux driver: -+ * drivers/net/ethernet/broadcom/genet/bcmgenet.c -+ * which is: Copyright (c) 2014-2017 Broadcom -+ * -+ * The hardware supports multiple queues (16 priority queues and one -+ * default queue), both for RX and TX. There are 256 DMA descriptors (both -+ * for TX and RX), and they live in MMIO registers. The hardware allows -+ * assigning descriptor ranges to queues, but we choose the most simple setup: -+ * All 256 descriptors are assigned to the default queue (#16). -+ * Also the Linux driver supports multiple generations of the MAC, whereas -+ * we only support v5, as used in the Raspberry Pi 4. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* Register definitions derived from Linux source */ -+#define SYS_REV_CTRL 0x00 -+ -+#define SYS_PORT_CTRL 0x04 -+#define PORT_MODE_EXT_GPHY 3 -+ -+#define GENET_SYS_OFF 0x0000 -+#define SYS_RBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x08) -+#define SYS_TBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x0c) -+ -+#define GENET_EXT_OFF 0x0080 -+#define EXT_RGMII_OOB_CTRL (GENET_EXT_OFF + 0x0c) -+#define RGMII_LINK BIT(4) -+#define OOB_DISABLE BIT(5) -+#define RGMII_MODE_EN BIT(6) -+#define ID_MODE_DIS BIT(16) -+ -+#define GENET_RBUF_OFF 0x0300 -+#define RBUF_TBUF_SIZE_CTRL (GENET_RBUF_OFF + 0xb4) -+#define RBUF_CTRL (GENET_RBUF_OFF + 0x00) -+#define RBUF_ALIGN_2B BIT(1) -+ -+#define GENET_UMAC_OFF 0x0800 -+#define UMAC_MIB_CTRL (GENET_UMAC_OFF + 0x580) -+#define UMAC_MAX_FRAME_LEN (GENET_UMAC_OFF + 0x014) -+#define UMAC_MAC0 (GENET_UMAC_OFF + 0x00c) -+#define UMAC_MAC1 (GENET_UMAC_OFF + 0x010) -+#define UMAC_CMD (GENET_UMAC_OFF + 0x008) -+#define MDIO_CMD (GENET_UMAC_OFF + 0x614) -+#define UMAC_TX_FLUSH (GENET_UMAC_OFF + 0x334) -+#define MDIO_START_BUSY BIT(29) -+#define MDIO_READ_FAIL BIT(28) -+#define MDIO_RD (2 << 26) -+#define MDIO_WR BIT(26) -+#define MDIO_PMD_SHIFT 21 -+#define MDIO_PMD_MASK 0x1f -+#define MDIO_REG_SHIFT 16 -+#define MDIO_REG_MASK 0x1f -+ -+#define CMD_TX_EN BIT(0) -+#define CMD_RX_EN BIT(1) -+#define UMAC_SPEED_10 0 -+#define UMAC_SPEED_100 1 -+#define UMAC_SPEED_1000 2 -+#define UMAC_SPEED_2500 3 -+#define CMD_SPEED_SHIFT 2 -+#define CMD_SPEED_MASK 3 -+#define CMD_SW_RESET BIT(13) -+#define CMD_LCL_LOOP_EN BIT(15) -+#define CMD_TX_EN BIT(0) -+#define CMD_RX_EN BIT(1) -+ -+#define MIB_RESET_RX BIT(0) -+#define MIB_RESET_RUNT BIT(1) -+#define MIB_RESET_TX BIT(2) -+ -+/* total number of Buffer Descriptors, same for Rx/Tx */ -+#define TOTAL_DESCS 256 -+#define RX_DESCS TOTAL_DESCS -+#define TX_DESCS TOTAL_DESCS -+ -+#define DEFAULT_Q 0x10 -+ -+/* Body(1500) + EH_SIZE(14) + VLANTAG(4) + BRCMTAG(6) + FCS(4) = 1528. -+ * 1536 is multiple of 256 bytes -+ */ -+#define ENET_BRCM_TAG_LEN 6 -+#define ENET_PAD 8 -+#define ENET_MAX_MTU_SIZE (ETH_DATA_LEN + ETH_HLEN + \ -+ VLAN_HLEN + ENET_BRCM_TAG_LEN + \ -+ ETH_FCS_LEN + ENET_PAD) -+ -+/* Tx/Rx Dma Descriptor common bits */ -+#define DMA_EN BIT(0) -+#define DMA_RING_BUF_EN_SHIFT 0x01 -+#define DMA_RING_BUF_EN_MASK 0xffff -+#define DMA_BUFLENGTH_MASK 0x0fff -+#define DMA_BUFLENGTH_SHIFT 16 -+#define DMA_RING_SIZE_SHIFT 16 -+#define DMA_OWN 0x8000 -+#define DMA_EOP 0x4000 -+#define DMA_SOP 0x2000 -+#define DMA_WRAP 0x1000 -+#define DMA_MAX_BURST_LENGTH 0x8 -+/* Tx specific DMA descriptor bits */ -+#define DMA_TX_UNDERRUN 0x0200 -+#define DMA_TX_APPEND_CRC 0x0040 -+#define DMA_TX_OW_CRC 0x0020 -+#define DMA_TX_DO_CSUM 0x0010 -+#define DMA_TX_QTAG_SHIFT 7 -+ -+/* DMA rings size */ -+#define DMA_RING_SIZE 0x40 -+#define DMA_RINGS_SIZE (DMA_RING_SIZE * (DEFAULT_Q + 1)) -+ -+/* DMA descriptor */ -+#define DMA_DESC_LENGTH_STATUS 0x00 -+#define DMA_DESC_ADDRESS_LO 0x04 -+#define DMA_DESC_ADDRESS_HI 0x08 -+#define DMA_DESC_SIZE 12 -+ -+#define GENET_RX_OFF 0x2000 -+#define GENET_RDMA_REG_OFF \ -+ (GENET_RX_OFF + TOTAL_DESCS * DMA_DESC_SIZE) -+#define GENET_TX_OFF 0x4000 -+#define GENET_TDMA_REG_OFF \ -+ (GENET_TX_OFF + TOTAL_DESCS * DMA_DESC_SIZE) -+ -+#define DMA_FC_THRESH_HI (RX_DESCS >> 4) -+#define DMA_FC_THRESH_LO 5 -+#define DMA_FC_THRESH_VALUE ((DMA_FC_THRESH_LO << 16) | \ -+ DMA_FC_THRESH_HI) -+ -+#define DMA_XOFF_THRESHOLD_SHIFT 16 -+ -+#define TDMA_RING_REG_BASE \ -+ (GENET_TDMA_REG_OFF + DEFAULT_Q * DMA_RING_SIZE) -+#define TDMA_READ_PTR (TDMA_RING_REG_BASE + 0x00) -+#define TDMA_CONS_INDEX (TDMA_RING_REG_BASE + 0x08) -+#define TDMA_PROD_INDEX (TDMA_RING_REG_BASE + 0x0c) -+#define DMA_RING_BUF_SIZE 0x10 -+#define DMA_START_ADDR 0x14 -+#define DMA_END_ADDR 0x1c -+#define DMA_MBUF_DONE_THRESH 0x24 -+#define TDMA_FLOW_PERIOD (TDMA_RING_REG_BASE + 0x28) -+#define TDMA_WRITE_PTR (TDMA_RING_REG_BASE + 0x2c) -+ -+#define RDMA_RING_REG_BASE \ -+ (GENET_RDMA_REG_OFF + DEFAULT_Q * DMA_RING_SIZE) -+#define RDMA_WRITE_PTR (RDMA_RING_REG_BASE + 0x00) -+#define RDMA_PROD_INDEX (RDMA_RING_REG_BASE + 0x08) -+#define RDMA_CONS_INDEX (RDMA_RING_REG_BASE + 0x0c) -+#define RDMA_XON_XOFF_THRESH (RDMA_RING_REG_BASE + 0x28) -+#define RDMA_READ_PTR (RDMA_RING_REG_BASE + 0x2c) -+ -+#define TDMA_REG_BASE (GENET_TDMA_REG_OFF + DMA_RINGS_SIZE) -+#define RDMA_REG_BASE (GENET_RDMA_REG_OFF + DMA_RINGS_SIZE) -+#define DMA_RING_CFG 0x00 -+#define DMA_CTRL 0x04 -+#define DMA_SCB_BURST_SIZE 0x0c -+ -+#define RX_BUF_LENGTH 2048 -+#define RX_TOTAL_BUFSIZE (RX_BUF_LENGTH * RX_DESCS) -+#define RX_BUF_OFFSET 2 -+ -+struct bcmgenet_eth_priv { -+ char rxbuffer[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN); -+ void *mac_reg; -+ void *tx_desc_base; -+ void *rx_desc_base; -+ int tx_index; -+ int rx_index; -+ int c_index; -+ int phyaddr; -+ u32 interface; -+ u32 speed; -+ struct phy_device *phydev; -+ struct mii_dev *bus; -+}; -+ -+static void bcmgenet_umac_reset(struct bcmgenet_eth_priv *priv) -+{ -+ u32 reg; -+ -+ reg = readl(priv->mac_reg + SYS_RBUF_FLUSH_CTRL); -+ reg |= BIT(1); -+ writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); -+ udelay(10); -+ -+ reg &= ~BIT(1); -+ writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); -+ udelay(10); -+ -+ writel(0, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL)); -+ udelay(10); -+ -+ writel(0, priv->mac_reg + UMAC_CMD); -+ -+ writel(CMD_SW_RESET | CMD_LCL_LOOP_EN, priv->mac_reg + UMAC_CMD); -+ udelay(2); -+ writel(0, priv->mac_reg + UMAC_CMD); -+ -+ /* clear tx/rx counter */ -+ writel(MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT, -+ priv->mac_reg + UMAC_MIB_CTRL); -+ writel(0, priv->mac_reg + UMAC_MIB_CTRL); -+ -+ writel(ENET_MAX_MTU_SIZE, priv->mac_reg + UMAC_MAX_FRAME_LEN); -+ -+ /* init rx registers, enable ip header optimization */ -+ reg = readl(priv->mac_reg + RBUF_CTRL); -+ reg |= RBUF_ALIGN_2B; -+ writel(reg, (priv->mac_reg + RBUF_CTRL)); -+ -+ writel(1, (priv->mac_reg + RBUF_TBUF_SIZE_CTRL)); -+} -+ -+static int bcmgenet_gmac_write_hwaddr(struct udevice *dev) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ struct eth_pdata *pdata = dev_get_platdata(dev); -+ uchar *addr = pdata->enetaddr; -+ u32 reg; -+ -+ reg = addr[0] << 24 | addr[1] << 16 | addr[2] << 8 | addr[3]; -+ writel_relaxed(reg, priv->mac_reg + UMAC_MAC0); -+ -+ reg = addr[4] << 8 | addr[5]; -+ writel_relaxed(reg, priv->mac_reg + UMAC_MAC1); -+ -+ return 0; -+} -+ -+static void bcmgenet_disable_dma(struct bcmgenet_eth_priv *priv) -+{ -+ clrbits_32(priv->mac_reg + TDMA_REG_BASE + DMA_CTRL, DMA_EN); -+ clrbits_32(priv->mac_reg + RDMA_REG_BASE + DMA_CTRL, DMA_EN); -+ -+ writel(1, priv->mac_reg + UMAC_TX_FLUSH); -+ udelay(10); -+ writel(0, priv->mac_reg + UMAC_TX_FLUSH); -+} -+ -+static void bcmgenet_enable_dma(struct bcmgenet_eth_priv *priv) -+{ -+ u32 dma_ctrl = (1 << (DEFAULT_Q + DMA_RING_BUF_EN_SHIFT)) | DMA_EN; -+ -+ writel(dma_ctrl, priv->mac_reg + TDMA_REG_BASE + DMA_CTRL); -+ -+ setbits_32(priv->mac_reg + RDMA_REG_BASE + DMA_CTRL, dma_ctrl); -+} -+ -+static int bcmgenet_gmac_eth_send(struct udevice *dev, void *packet, int length) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ void *desc_base = priv->tx_desc_base + priv->tx_index * DMA_DESC_SIZE; -+ u32 len_stat = length << DMA_BUFLENGTH_SHIFT; -+ ulong packet_aligned = rounddown((ulong)packet, ARCH_DMA_MINALIGN); -+ u32 prod_index, cons; -+ u32 tries = 100; -+ -+ prod_index = readl(priv->mac_reg + TDMA_PROD_INDEX); -+ -+ /* There is actually no reason for the rounding here, but the ARMv7 -+ * implementation of flush_dcache_range() checks for aligned -+ * boundaries of the flushed range. -+ * Adjust them here to pass that check and avoid misleading messages. -+ */ -+ flush_dcache_range(packet_aligned, -+ packet_aligned + roundup(length, ARCH_DMA_MINALIGN)); -+ -+ len_stat |= 0x3F << DMA_TX_QTAG_SHIFT; -+ len_stat |= DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP; -+ -+ /* Set-up packet for transmission */ -+ writel(lower_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_LO)); -+ writel(upper_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_HI)); -+ writel(len_stat, (desc_base + DMA_DESC_LENGTH_STATUS)); -+ -+ /* Increment index and start transmission */ -+ if (++priv->tx_index >= TX_DESCS) -+ priv->tx_index = 0; -+ -+ prod_index++; -+ -+ /* Start Transmisson */ -+ writel(prod_index, priv->mac_reg + TDMA_PROD_INDEX); -+ -+ do { -+ cons = readl(priv->mac_reg + TDMA_CONS_INDEX); -+ } while ((cons & 0xffff) < prod_index && --tries); -+ if (!tries) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ -+/* Check whether all cache lines affected by an invalidate are within -+ * the buffer, to make sure we don't accidentally lose unrelated dirty -+ * data stored nearby. -+ * Alignment of the buffer start address will be checked in the implementation -+ * of invalidate_dcache_range(). -+ */ -+static void invalidate_dcache_check(unsigned long addr, size_t size, -+ size_t buffer_size) -+{ -+ size_t inval_size = roundup(size, ARCH_DMA_MINALIGN); -+ -+ if (unlikely(inval_size > buffer_size)) -+ printf("WARNING: Cache invalidate area exceeds buffer size\n"); -+ -+ invalidate_dcache_range(addr, addr + inval_size); -+} -+ -+static int bcmgenet_gmac_eth_recv(struct udevice *dev, -+ int flags, uchar **packetp) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ void *desc_base = priv->rx_desc_base + priv->rx_index * DMA_DESC_SIZE; -+ u32 prod_index = readl(priv->mac_reg + RDMA_PROD_INDEX); -+ u32 length, addr; -+ -+ if (prod_index == priv->c_index) -+ return -EAGAIN; -+ -+ length = readl(desc_base + DMA_DESC_LENGTH_STATUS); -+ length = (length >> DMA_BUFLENGTH_SHIFT) & DMA_BUFLENGTH_MASK; -+ addr = readl(desc_base + DMA_DESC_ADDRESS_LO); -+ -+ invalidate_dcache_check(addr, length, RX_BUF_LENGTH); -+ -+ /* To cater for the IP header alignment the hardware does. -+ * This would actually not be needed if we don't program -+ * RBUF_ALIGN_2B -+ */ -+ *packetp = (uchar *)(ulong)addr + RX_BUF_OFFSET; -+ -+ return length - RX_BUF_OFFSET; -+} -+ -+static int bcmgenet_gmac_free_pkt(struct udevice *dev, uchar *packet, -+ int length) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ -+ /* Tell the MAC we have consumed that last receive buffer. */ -+ priv->c_index = (priv->c_index + 1) & 0xFFFF; -+ writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX); -+ -+ /* Forward our descriptor pointer, wrapping around if needed. */ -+ if (++priv->rx_index >= RX_DESCS) -+ priv->rx_index = 0; -+ -+ return 0; -+} -+ -+static void rx_descs_init(struct bcmgenet_eth_priv *priv) -+{ -+ char *rxbuffs = &priv->rxbuffer[0]; -+ u32 len_stat, i; -+ void *desc_base = priv->rx_desc_base; -+ -+ priv->c_index = 0; -+ -+ len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN; -+ -+ for (i = 0; i < RX_DESCS; i++) { -+ writel(lower_32_bits((uintptr_t)&rxbuffs[i * RX_BUF_LENGTH]), -+ desc_base + i * DMA_DESC_SIZE + DMA_DESC_ADDRESS_LO); -+ writel(upper_32_bits((uintptr_t)&rxbuffs[i * RX_BUF_LENGTH]), -+ desc_base + i * DMA_DESC_SIZE + DMA_DESC_ADDRESS_HI); -+ writel(len_stat, -+ desc_base + i * DMA_DESC_SIZE + DMA_DESC_LENGTH_STATUS); -+ } -+} -+ -+static void rx_ring_init(struct bcmgenet_eth_priv *priv) -+{ -+ writel(DMA_MAX_BURST_LENGTH, -+ priv->mac_reg + RDMA_REG_BASE + DMA_SCB_BURST_SIZE); -+ -+ writel(0x0, priv->mac_reg + RDMA_RING_REG_BASE + DMA_START_ADDR); -+ writel(0x0, priv->mac_reg + RDMA_READ_PTR); -+ writel(0x0, priv->mac_reg + RDMA_WRITE_PTR); -+ writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1, -+ priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR); -+ -+ writel(0x0, priv->mac_reg + RDMA_PROD_INDEX); -+ writel(0x0, priv->mac_reg + RDMA_CONS_INDEX); -+ writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, -+ priv->mac_reg + RDMA_RING_REG_BASE + DMA_RING_BUF_SIZE); -+ writel(DMA_FC_THRESH_VALUE, priv->mac_reg + RDMA_XON_XOFF_THRESH); -+ writel(1 << DEFAULT_Q, priv->mac_reg + RDMA_REG_BASE + DMA_RING_CFG); -+} -+ -+static void tx_ring_init(struct bcmgenet_eth_priv *priv) -+{ -+ writel(DMA_MAX_BURST_LENGTH, -+ priv->mac_reg + TDMA_REG_BASE + DMA_SCB_BURST_SIZE); -+ -+ writel(0x0, priv->mac_reg + TDMA_RING_REG_BASE + DMA_START_ADDR); -+ writel(0x0, priv->mac_reg + TDMA_READ_PTR); -+ writel(0x0, priv->mac_reg + TDMA_WRITE_PTR); -+ writel(TX_DESCS * DMA_DESC_SIZE / 4 - 1, -+ priv->mac_reg + TDMA_RING_REG_BASE + DMA_END_ADDR); -+ writel(0x0, priv->mac_reg + TDMA_PROD_INDEX); -+ writel(0x0, priv->mac_reg + TDMA_CONS_INDEX); -+ writel(0x1, priv->mac_reg + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH); -+ writel(0x0, priv->mac_reg + TDMA_FLOW_PERIOD); -+ writel((TX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, -+ priv->mac_reg + TDMA_RING_REG_BASE + DMA_RING_BUF_SIZE); -+ -+ writel(1 << DEFAULT_Q, priv->mac_reg + TDMA_REG_BASE + DMA_RING_CFG); -+} -+ -+static int bcmgenet_adjust_link(struct bcmgenet_eth_priv *priv) -+{ -+ struct phy_device *phy_dev = priv->phydev; -+ u32 speed; -+ -+ switch (phy_dev->speed) { -+ case SPEED_1000: -+ speed = UMAC_SPEED_1000; -+ break; -+ case SPEED_100: -+ speed = UMAC_SPEED_100; -+ break; -+ case SPEED_10: -+ speed = UMAC_SPEED_10; -+ break; -+ default: -+ printf("bcmgenet: Unsupported PHY speed: %d\n", phy_dev->speed); -+ return -EINVAL; -+ } -+ -+ clrsetbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, OOB_DISABLE, -+ RGMII_LINK | RGMII_MODE_EN | ID_MODE_DIS); -+ -+ writel(speed << CMD_SPEED_SHIFT, (priv->mac_reg + UMAC_CMD)); -+ -+ return 0; -+} -+ -+static int bcmgenet_gmac_eth_start(struct udevice *dev) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ priv->tx_desc_base = priv->mac_reg + GENET_TX_OFF; -+ priv->rx_desc_base = priv->mac_reg + GENET_RX_OFF; -+ priv->tx_index = 0x0; -+ priv->rx_index = 0x0; -+ -+ bcmgenet_umac_reset(priv); -+ -+ bcmgenet_gmac_write_hwaddr(dev); -+ -+ /* Disable RX/TX DMA and flush TX queues */ -+ bcmgenet_disable_dma(priv); -+ -+ rx_ring_init(priv); -+ rx_descs_init(priv); -+ -+ tx_ring_init(priv); -+ -+ /* Enable RX/TX DMA */ -+ bcmgenet_enable_dma(priv); -+ -+ /* read PHY properties over the wire from generic PHY set-up */ -+ ret = phy_startup(priv->phydev); -+ if (ret) { -+ printf("bcmgenet: PHY startup failed: %d\n", ret); -+ return ret; -+ } -+ -+ /* Update MAC registers based on PHY property */ -+ ret = bcmgenet_adjust_link(priv); -+ if (ret) { -+ printf("bcmgenet: adjust PHY link failed: %d\n", ret); -+ return ret; -+ } -+ -+ /* Enable Rx/Tx */ -+ setbits_32(priv->mac_reg + UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -+ -+ return 0; -+} -+ -+static int bcmgenet_phy_init(struct bcmgenet_eth_priv *priv, void *dev) -+{ -+ struct phy_device *phydev; -+ int ret; -+ -+ phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); -+ if (!phydev) -+ return -ENODEV; -+ -+ phydev->supported &= PHY_GBIT_FEATURES; -+ if (priv->speed) { -+ ret = phy_set_supported(priv->phydev, priv->speed); -+ if (ret) -+ return ret; -+ } -+ phydev->advertising = phydev->supported; -+ -+ phy_connect_dev(phydev, dev); -+ -+ priv->phydev = phydev; -+ phy_config(priv->phydev); -+ -+ return 0; -+} -+ -+static void bcmgenet_mdio_start(struct bcmgenet_eth_priv *priv) -+{ -+ setbits_32(priv->mac_reg + MDIO_CMD, MDIO_START_BUSY); -+} -+ -+static int bcmgenet_mdio_write(struct mii_dev *bus, int addr, int devad, -+ int reg, u16 value) -+{ -+ struct udevice *dev = bus->priv; -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ u32 val; -+ -+ /* Prepare the read operation */ -+ val = MDIO_WR | (addr << MDIO_PMD_SHIFT) | -+ (reg << MDIO_REG_SHIFT) | (0xffff & value); -+ writel_relaxed(val, priv->mac_reg + MDIO_CMD); -+ -+ /* Start MDIO transaction */ -+ bcmgenet_mdio_start(priv); -+ -+ return wait_for_bit_32(priv->mac_reg + MDIO_CMD, -+ MDIO_START_BUSY, false, 20, true); -+} -+ -+static int bcmgenet_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) -+{ -+ struct udevice *dev = bus->priv; -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ u32 val; -+ int ret; -+ -+ /* Prepare the read operation */ -+ val = MDIO_RD | (addr << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT); -+ writel_relaxed(val, priv->mac_reg + MDIO_CMD); -+ -+ /* Start MDIO transaction */ -+ bcmgenet_mdio_start(priv); -+ -+ ret = wait_for_bit_32(priv->mac_reg + MDIO_CMD, -+ MDIO_START_BUSY, false, 20, true); -+ if (ret) -+ return ret; -+ -+ val = readl_relaxed(priv->mac_reg + MDIO_CMD); -+ -+ return val & 0xffff; -+} -+ -+static int bcmgenet_mdio_init(const char *name, struct udevice *priv) -+{ -+ struct mii_dev *bus = mdio_alloc(); -+ -+ if (!bus) { -+ debug("Failed to allocate MDIO bus\n"); -+ return -ENOMEM; -+ } -+ -+ bus->read = bcmgenet_mdio_read; -+ bus->write = bcmgenet_mdio_write; -+ snprintf(bus->name, sizeof(bus->name), name); -+ bus->priv = (void *)priv; -+ -+ return mdio_register(bus); -+} -+ -+/* We only support RGMII (as used on the RPi4). */ -+static int bcmgenet_interface_set(struct bcmgenet_eth_priv *priv) -+{ -+ phy_interface_t phy_mode = priv->interface; -+ -+ switch (phy_mode) { -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_RGMII_RXID: -+ writel(PORT_MODE_EXT_GPHY, priv->mac_reg + SYS_PORT_CTRL); -+ break; -+ default: -+ printf("unknown phy mode: %d\n", priv->interface); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int bcmgenet_eth_probe(struct udevice *dev) -+{ -+ struct eth_pdata *pdata = dev_get_platdata(dev); -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ ofnode mdio_node; -+ const char *name; -+ u32 reg; -+ int ret; -+ u8 major; -+ -+ priv->mac_reg = map_physmem(pdata->iobase, SZ_64K, MAP_NOCACHE); -+ priv->interface = pdata->phy_interface; -+ priv->speed = pdata->max_speed; -+ -+ /* Read GENET HW version */ -+ reg = readl_relaxed(priv->mac_reg + SYS_REV_CTRL); -+ major = (reg >> 24) & 0x0f; -+ if (major != 6) { -+ if (major == 5) -+ major = 4; -+ else if (major == 0) -+ major = 1; -+ -+ printf("Unsupported GENETv%d.%d\n", major, (reg >> 16) & 0x0f); -+ return -ENODEV; -+ } -+ -+ ret = bcmgenet_interface_set(priv); -+ if (ret) -+ return ret; -+ -+ writel(0, priv->mac_reg + SYS_RBUF_FLUSH_CTRL); -+ udelay(10); -+ /* disable MAC while updating its registers */ -+ writel(0, priv->mac_reg + UMAC_CMD); -+ /* issue soft reset with (rg)mii loopback to ensure a stable rxclk */ -+ writel(CMD_SW_RESET | CMD_LCL_LOOP_EN, priv->mac_reg + UMAC_CMD); -+ -+ mdio_node = dev_read_first_subnode(dev); -+ name = ofnode_get_name(mdio_node); -+ -+ ret = bcmgenet_mdio_init(name, dev); -+ if (ret) -+ return ret; -+ -+ priv->bus = miiphy_get_dev_by_name(name); -+ -+ return bcmgenet_phy_init(priv, dev); -+} -+ -+static void bcmgenet_gmac_eth_stop(struct udevice *dev) -+{ -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ -+ clrbits_32(priv->mac_reg + UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -+ -+ bcmgenet_disable_dma(priv); -+} -+ -+static const struct eth_ops bcmgenet_gmac_eth_ops = { -+ .start = bcmgenet_gmac_eth_start, -+ .write_hwaddr = bcmgenet_gmac_write_hwaddr, -+ .send = bcmgenet_gmac_eth_send, -+ .recv = bcmgenet_gmac_eth_recv, -+ .free_pkt = bcmgenet_gmac_free_pkt, -+ .stop = bcmgenet_gmac_eth_stop, -+}; -+ -+static int bcmgenet_eth_ofdata_to_platdata(struct udevice *dev) -+{ -+ struct eth_pdata *pdata = dev_get_platdata(dev); -+ struct bcmgenet_eth_priv *priv = dev_get_priv(dev); -+ struct ofnode_phandle_args phy_node; -+ const char *phy_mode; -+ int ret; -+ -+ pdata->iobase = dev_read_addr(dev); -+ -+ /* Get phy mode from DT */ -+ pdata->phy_interface = -1; -+ phy_mode = dev_read_string(dev, "phy-mode"); -+ if (phy_mode) -+ pdata->phy_interface = phy_get_interface_by_name(phy_mode); -+ if (pdata->phy_interface == -1) { -+ debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); -+ return -EINVAL; -+ } -+ -+ ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, -+ &phy_node); -+ if (!ret) { -+ ofnode_read_s32(phy_node.node, "reg", &priv->phyaddr); -+ ofnode_read_s32(phy_node.node, "max-speed", &pdata->max_speed); -+ } -+ -+ return 0; -+} -+ -+/* The BCM2711 implementation has a limited burst length compared to a generic -+ * GENETv5 version, but we go with that shorter value (8) in both cases, for -+ * the sake of simplicity. -+ */ -+static const struct udevice_id bcmgenet_eth_ids[] = { -+ {.compatible = "brcm,genet-v5"}, -+ {.compatible = "brcm,bcm2711-genet-v5"}, -+ {} -+}; -+ -+U_BOOT_DRIVER(eth_bcmgenet) = { -+ .name = "eth_bcmgenet", -+ .id = UCLASS_ETH, -+ .of_match = bcmgenet_eth_ids, -+ .ofdata_to_platdata = bcmgenet_eth_ofdata_to_platdata, -+ .probe = bcmgenet_eth_probe, -+ .ops = &bcmgenet_gmac_eth_ops, -+ .priv_auto_alloc_size = sizeof(struct bcmgenet_eth_priv), -+ .platdata_auto_alloc_size = sizeof(struct eth_pdata), -+ .flags = DM_FLAG_ALLOC_PRIV_DMA, -+}; - -From patchwork Mon Jan 27 01:14:43 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1229488 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=arm.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - 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u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: Sascha Dewald , u-boot@lists.denx.de, - LABBE Corentin -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de -X-Virus-Status: Clean - -From: Amit Singh Tomar - -Some of the devices(for instance, pcie and gnet controller) sitting on -SCB bus falls behind/below the memory range that we currenty have. - -This patch updates the memory range to map those devices correctly. - -Signed-off-by: Amit Singh Tomar -Reviewed-by: Andre Przywara -Signed-off-by: Andre Przywara ---- - arch/arm/mach-bcm283x/init.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 3b5f45b431..9966d6c833 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -42,9 +42,9 @@ static struct mm_region bcm2711_mem_map[] = { - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { -- .virt = 0xfe000000UL, -- .phys = 0xfe000000UL, -- .size = 0x01800000UL, -+ .virt = 0xfc000000UL, -+ .phys = 0xfc000000UL, -+ .size = 0x03800000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN - -From patchwork Mon Jan 27 01:14:44 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Andre Przywara -X-Patchwork-Id: 1229489 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) 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-X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_NONE, URIBL_BLOCKED - autolearn=ham autolearn_force=no version=3.4.2 -Received: from foss.arm.com (foss.arm.com [217.140.110.172]) - by phobos.denx.de (Postfix) with ESMTP id D04C2814DE - for ; Mon, 27 Jan 2020 02:15:18 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=arm.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=andre.przywara@arm.com -Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) - by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA93B31B; - Sun, 26 Jan 2020 17:15:17 -0800 (PST) -Received: from localhost.localdomain (unknown [172.31.20.19]) - by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id - 677703F52E; Sun, 26 Jan 2020 17:15:15 -0800 (PST) -From: Andre Przywara -To: Joe Hershberger , - Matthias Brugger -Subject: [PATCH v3 3/3] rpi4: Enable GENET Ethernet controller -Date: Mon, 27 Jan 2020 01:14:44 +0000 -Message-Id: <20200127011444.8114-4-andre.przywara@arm.com> -X-Mailer: git-send-email 2.14.1 -In-Reply-To: <20200127011444.8114-1-andre.przywara@arm.com> -References: <20200127011444.8114-1-andre.przywara@arm.com> -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.26 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: Sascha Dewald , u-boot@lists.denx.de, - LABBE Corentin -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de -X-Virus-Status: Clean - -From: Amit Singh Tomar - -The Raspberry Pi 4 SoC features an integrated Gigabit Ethernet -controller, connected as a platform device. - -Enable the new driver in the three applicable defconfigs, to allow -TFTP booting on the board. - -Signed-off-by: Amit Singh Tomar -[Andre: Add joined and 32-bit configs] -Signed-off-by: Andre Przywara ---- - configs/rpi_4_32b_defconfig | 2 ++ - configs/rpi_4_defconfig | 2 ++ - configs/rpi_arm64_defconfig | 1 + - 3 files changed, 5 insertions(+) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 00f80f71ad..e7ea88bd4b 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -24,6 +24,8 @@ CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_DM_ETH=y -+CONFIG_BCMGENET=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 8cf1bb81ff..b0f9cf1c0e 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -24,6 +24,8 @@ CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_DM_ETH=y -+CONFIG_BCMGENET=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 10fbe0db92..00b3096481 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -36,6 +36,7 @@ CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_LAN78XX=y - CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_BCMGENET=y - CONFIG_DM_VIDEO=y - CONFIG_VIDEO_BPP32=y - CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/sources b/sources index 0a45ad1..caa2ddb 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04-rc1.tar.bz2) = 06c6974a7d04258d6c05bb43ae8e03dbea5f290f07ed457be01927f68d825a80825e0157fa4a7df6e47a035f119075779c059d23c2d4545ec72212f1c22d3cbf +SHA512 (u-boot-2020.04-rc2.tar.bz2) = 84c76e33f4cadadc162e5ba71d48720ab53fad88a872c60512bd75e6d8a8250e942f11d737143cac3295634096384fc11f0a0ee0fdd2ac2718dbe7e94c0f7875 diff --git a/uboot-tools.spec b/uboot-tools.spec index cc0beba..a6b5579 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2020.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,13 +21,11 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -Patch3: 0001-Remove-redundant-YYLOC-global-declaration.patch Patch4: usb-kbd-fixes.patch Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch12: Ethernet-support-for-Raspberry-Pi-4.patch BuildRequires: bc BuildRequires: dtc @@ -249,6 +247,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Feb 13 2020 Peter Robinson 2020.04-0.3-rc2 +- 2020.04 RC2 + * Sun Feb 2 2020 Peter Robinson 2020.04-0.2-rc1 - Update genet NIC driver From 24b4862160b3ebef5dfbb04c06a86881249745d5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 26 Feb 2020 15:47:14 +0000 Subject: [PATCH 069/351] 2020.04 RC3 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index caa2ddb..95cc1cf 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04-rc2.tar.bz2) = 84c76e33f4cadadc162e5ba71d48720ab53fad88a872c60512bd75e6d8a8250e942f11d737143cac3295634096384fc11f0a0ee0fdd2ac2718dbe7e94c0f7875 +SHA512 (u-boot-2020.04-rc3.tar.bz2) = 6e617472bd38dd1f681db121bcb565abea7a15fcdb7a5920ec6dffd283d4a4580d81134768454a7c954ac7f5cbee8493879452991b6cf35de31afcd2d9448a11 diff --git a/uboot-tools.spec b/uboot-tools.spec index a6b5579..1eed179 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2020.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -247,6 +247,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Feb 26 2020 Peter Robinson 2020.04-0.4-rc3 +- 2020.04 RC3 + * Thu Feb 13 2020 Peter Robinson 2020.04-0.3-rc2 - 2020.04 RC2 From 21eea886b145e63340b1d2bd93f19db923344e59 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 26 Mar 2020 11:28:23 +0000 Subject: [PATCH 070/351] Fix ext4 alignment issue seen on some NXP i.MX devices --- fs-ext4-Fix-alignment-of-cache-buffers.patch | 109 +++++++++++++++++++ uboot-tools.spec | 6 +- 2 files changed, 114 insertions(+), 1 deletion(-) create mode 100644 fs-ext4-Fix-alignment-of-cache-buffers.patch diff --git a/fs-ext4-Fix-alignment-of-cache-buffers.patch b/fs-ext4-Fix-alignment-of-cache-buffers.patch new file mode 100644 index 0000000..2f14f51 --- /dev/null +++ b/fs-ext4-Fix-alignment-of-cache-buffers.patch @@ -0,0 +1,109 @@ +From patchwork Wed Mar 25 20:27:51 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jan Kiszka +X-Patchwork-Id: 1261644 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=siemens.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) + server-digest SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48nfnl4Nyzz9sPk + for ; + Thu, 26 Mar 2020 07:28:11 +1100 (AEDT) +Received: from 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+Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=siemens.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=jan.kiszka@siemens.com +Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) + by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id 02PKRqHN010973 + (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); + Wed, 25 Mar 2020 21:27:52 +0100 +Received: from [167.87.79.232] ([167.87.79.232]) + by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 02PKRqX9010863; + Wed, 25 Mar 2020 21:27:52 +0100 +From: Jan Kiszka +Subject: [PATCH] fs: ext4: Fix alignment of cache buffers +To: U-Boot Mailing List , Tom Rini +Cc: Stephen Warren +Message-ID: +Date: Wed, 25 Mar 2020 21:27:51 +0100 +User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 + Thunderbird/68.6.0 +MIME-Version: 1.0 +Content-Language: en-US +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Jan Kiszka + +We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid +access errors like + +CACHE: Misaligned operation at range [be0231e0, be0235e0] + +seen on the MCIMX7SABRE. + +Fixes: d5aee659f217 ("fs: ext4: cache extent data") +Signed-off-by: Jan Kiszka +Reviewed-by: Tom Rini +Reviewed-by: Stephen Warren +--- + fs/ext4/ext4fs.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c +index 1c616a26a2..966b427a97 100644 +--- a/fs/ext4/ext4fs.c ++++ b/fs/ext4/ext4fs.c +@@ -288,7 +288,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) + if (cache->buf && cache->block == block && cache->size == size) + return 1; + ext_cache_fini(cache); +- cache->buf = malloc(size); ++ cache->buf = memalign(ARCH_DMA_MINALIGN, size); + if (!cache->buf) + return 0; + if (!ext4fs_devread(block, 0, size, cache->buf)) { diff --git a/uboot-tools.spec b/uboot-tools.spec index 1eed179..1acc0c5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,6 +26,7 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch +Patch9: fs-ext4-Fix-alignment-of-cache-buffers.patch BuildRequires: bc BuildRequires: dtc @@ -247,6 +248,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Mar 26 2020 Peter Robinson 2020.04-0.5-rc3 +- Fix ext4 alignment issue seen on some NXP i.MX devices + * Wed Feb 26 2020 Peter Robinson 2020.04-0.4-rc3 - 2020.04 RC3 From 0d270e1ab504b9ddeac2ed5344cc42f0b7e4c895 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 1 Apr 2020 00:03:59 +0100 Subject: [PATCH 071/351] 2020.04 RC4 --- fs-ext4-Fix-alignment-of-cache-buffers.patch | 109 ------------------- sources | 2 +- uboot-tools.spec | 8 +- 3 files changed, 6 insertions(+), 113 deletions(-) delete mode 100644 fs-ext4-Fix-alignment-of-cache-buffers.patch diff --git a/fs-ext4-Fix-alignment-of-cache-buffers.patch b/fs-ext4-Fix-alignment-of-cache-buffers.patch deleted file mode 100644 index 2f14f51..0000000 --- a/fs-ext4-Fix-alignment-of-cache-buffers.patch +++ /dev/null @@ -1,109 +0,0 @@ -From patchwork Wed Mar 25 20:27:51 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Jan Kiszka -X-Patchwork-Id: 1261644 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org 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02PKRqHN010973 - (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); - Wed, 25 Mar 2020 21:27:52 +0100 -Received: from [167.87.79.232] ([167.87.79.232]) - by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 02PKRqX9010863; - Wed, 25 Mar 2020 21:27:52 +0100 -From: Jan Kiszka -Subject: [PATCH] fs: ext4: Fix alignment of cache buffers -To: U-Boot Mailing List , Tom Rini -Cc: Stephen Warren -Message-ID: -Date: Wed, 25 Mar 2020 21:27:51 +0100 -User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 - Thunderbird/68.6.0 -MIME-Version: 1.0 -Content-Language: en-US -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Jan Kiszka - -We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid -access errors like - -CACHE: Misaligned operation at range [be0231e0, be0235e0] - -seen on the MCIMX7SABRE. - -Fixes: d5aee659f217 ("fs: ext4: cache extent data") -Signed-off-by: Jan Kiszka -Reviewed-by: Tom Rini -Reviewed-by: Stephen Warren ---- - fs/ext4/ext4fs.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c -index 1c616a26a2..966b427a97 100644 ---- a/fs/ext4/ext4fs.c -+++ b/fs/ext4/ext4fs.c -@@ -288,7 +288,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) - if (cache->buf && cache->block == block && cache->size == size) - return 1; - ext_cache_fini(cache); -- cache->buf = malloc(size); -+ cache->buf = memalign(ARCH_DMA_MINALIGN, size); - if (!cache->buf) - return 0; - if (!ext4fs_devread(block, 0, size, cache->buf)) { diff --git a/sources b/sources index 95cc1cf..4c62613 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04-rc3.tar.bz2) = 6e617472bd38dd1f681db121bcb565abea7a15fcdb7a5920ec6dffd283d4a4580d81134768454a7c954ac7f5cbee8493879452991b6cf35de31afcd2d9448a11 +SHA512 (u-boot-2020.04-rc4.tar.bz2) = 0e8acc06aae5e009122d06fa1cf89d2a428796bfd44b71907493e6c83480b71949e03cb432ebcd78df90fd1fbf21a1d586bb174ad90257b5e64ac41661f974b3 diff --git a/uboot-tools.spec b/uboot-tools.spec index 1acc0c5..3832cea 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2020.04 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,7 +26,6 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch -Patch9: fs-ext4-Fix-alignment-of-cache-buffers.patch BuildRequires: bc BuildRequires: dtc @@ -248,6 +247,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Mar 31 2020 Peter Robinson 2020.04-0.6-rc4 +- 2020.04 RC4 + * Thu Mar 26 2020 Peter Robinson 2020.04-0.5-rc3 - Fix ext4 alignment issue seen on some NXP i.MX devices From 4907bf064fb24b5e97b98f87346a74c45fe97ce9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 1 Apr 2020 00:38:08 +0100 Subject: [PATCH 072/351] Updates for NVIDIA Jetson platforms --- ARM-tegra-Add-NVIDIA-Jetson-Nano.patch | 548 ++--- Misc-fixes-for-Tegra.patch | 394 ++++ ...SET_FDTFILE_FALLBACK-for-tegra186-be.patch | 55 + ...efine-fdtfile-option-for-distro-boot.patch | 85 +- mmc-t210-fix-autocal-and-400KHz-clock.patch | 461 ++++ mtd-spi-Add-Macronix-MX25U3235F-device.patch | 116 + net-tegra-Misc-network-fixes.patch | 310 +++ ...0-fix-claim_bus-and-clock-tap-delays.patch | 453 ++++ t210-miscellaneous-patches.patch | 2026 +++++++++++++++++ uboot-tools.spec | 14 +- 10 files changed, 4043 insertions(+), 419 deletions(-) create mode 100644 Misc-fixes-for-Tegra.patch create mode 100644 arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch rename arm-tegra-defaine-fdtfile-for-all-devices.patch => arm-tegra-define-fdtfile-option-for-distro-boot.patch (59%) create mode 100644 mmc-t210-fix-autocal-and-400KHz-clock.patch create mode 100644 mtd-spi-Add-Macronix-MX25U3235F-device.patch create mode 100644 net-tegra-Misc-network-fixes.patch create mode 100644 qspi-t210-fix-claim_bus-and-clock-tap-delays.patch create mode 100644 t210-miscellaneous-patches.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch index 2510a7f..9ac9e94 100644 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch @@ -1,71 +1,141 @@ -From patchwork Mon Apr 15 09:32:39 2019 +From patchwork Wed Mar 25 18:21:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v5, - 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1085538 +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1261582 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Jon Hunter -Date: Mon, 15 Apr 2019 11:32:39 +0200 -From: Thierry Reding +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 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+X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean -From: Thierry Reding +From: Tom Warren -The Jetson Nano Developer Kit is a Tegra X1 based development board. It -is similar to Jetson TX1 but it is not pin compatible. It features 4 GB -of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot +The Jetson Nano Developer Kit is a Tegra X1-based development board. It +is similar to Jetson TX1 but it is not pin compatible. It features 4GB +of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot used for storage. HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI -Ethernet controller provides onboard network connectivity. +Ethernet controller provides onboard network connectivity. NVMe support +has also been added. Env save is at the end of QSPI (4MB-8K). A 40-pin header on the board can be used to extend the capabilities and exposed interfaces of the Jetson Nano. Signed-off-by: Thierry Reding +Signed-off-by: Tom Warren --- -Changes in v5: -- add "ethernet" alias and store an empty MAC address as placeholder +retry send-email to see if it shows up in Patchwork -Changes in v3: -- rename "Development Kit" to "Developer Kit" -- drop alias for non-existent eMMC interface -- import pinmux from A02 spreadsheet -- drop preboot support for now -- fixup text base - - arch/arm/dts/Makefile | 3 +- - arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++ - arch/arm/mach-tegra/tegra210/Kconfig | 7 + - board/nvidia/p3450-0000/Kconfig | 12 + - board/nvidia/p3450-0000/MAINTAINERS | 6 + - board/nvidia/p3450-0000/Makefile | 8 + - board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++ - .../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++ - configs/p3450-0000_defconfig | 55 ++++ - include/configs/p3450-0000.h | 34 +++ - 10 files changed, 722 insertions(+), 1 deletion(-) + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/tegra210-p3450-0000.dts | 147 +++++++++++++++++++++++++++++ + arch/arm/mach-tegra/board2.c | 25 +++++ + arch/arm/mach-tegra/tegra210/Kconfig | 7 ++ + board/nvidia/p3450-0000/Kconfig | 12 +++ + board/nvidia/p3450-0000/MAINTAINERS | 6 ++ + board/nvidia/p3450-0000/Makefile | 8 ++ + board/nvidia/p3450-0000/p3450-0000.c | 178 +++++++++++++++++++++++++++++++++++ + configs/p3450-0000_defconfig | 64 +++++++++++++ + include/configs/p3450-0000.h | 46 +++++++++ + 10 files changed, 495 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts create mode 100644 board/nvidia/p3450-0000/Kconfig create mode 100644 board/nvidia/p3450-0000/MAINTAINERS create mode 100644 board/nvidia/p3450-0000/Makefile create mode 100644 board/nvidia/p3450-0000/p3450-0000.c - create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h create mode 100644 configs/p3450-0000_defconfig create mode 100644 include/configs/p3450-0000.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 8167cdb4e856..f8d3441663c0 100644 +index 9c593b2..820ee97 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ +@@ -180,7 +180,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra210-e2220-1170.dtb \ tegra210-p2371-0000.dtb \ tegra210-p2371-2180.dtb \ @@ -77,10 +147,14 @@ index 8167cdb4e856..f8d3441663c0 100644 armada-3720-db.dtb \ diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts new file mode 100644 -index 000000000000..d45ee9afc016 +index 0000000..9ef744a --- /dev/null +++ b/arch/arm/dts/tegra210-p3450-0000.dts -@@ -0,0 +1,135 @@ +@@ -0,0 +1,147 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2019-2020 NVIDIA Corporation ++ */ +/dts-v1/; + +#include "tegra210.dtsi" @@ -99,7 +173,8 @@ index 000000000000..d45ee9afc016 + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000c700"; -+ sdhci0 = "/sdhci@700b0000"; ++ mmc0 = "/sdhci@700b0600"; ++ mmc1 = "/sdhci@700b0000"; + spi0 = "/spi@70410000"; + usb0 = "/usb@7d000000"; + }; @@ -174,6 +249,12 @@ index 000000000000..d45ee9afc016 + bus-width = <4>; + }; + ++ sdhci@700b0600 { ++ status = "okay"; ++ bus-width = <8>; ++ non-removable; ++ }; ++ + i2c@7000c400 { + status = "okay"; + clock-frequency = <400000>; @@ -196,6 +277,7 @@ index 000000000000..d45ee9afc016 + + spi@70410000 { + status = "okay"; ++ spi-max-frequency = <80000000>; + }; + + usb@7d000000 { @@ -216,8 +298,44 @@ index 000000000000..d45ee9afc016 + }; + }; +}; +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index 787ff97..224efc9 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -217,6 +217,31 @@ int board_early_init_f(void) + arch_timer_init(); + #endif + ++#if defined(CONFIG_DISABLE_SDMMC1_EARLY) ++ /* ++ * Turn off (reset/disable) SDMMC1 on Nano here, before GPIO INIT. ++ * We do this because earlier bootloaders have enabled power to ++ * SDMMC1 on Nano, and toggling power-gpio (PZ3) in pinmux_init() ++ * results in power being back-driven into the SD-card and SDMMC1 ++ * HW, which is 'bad' as per the HW team. ++ * ++ * From the HW team: "LDO2 from the PMIC has already been set to 3.3v in ++ * nvtboot/CBoot on Nano (for SD-card boot). So when U-Boot's GPIO_INIT ++ * table sets PZ3 to OUT0 as per the pinmux spreadsheet, it turns off ++ * the loadswitch. When PZ3 is 0 and not driving, essentially the SDCard ++ * voltage turns off. Since the SDCard voltage is no longer there, the ++ * SDMMC CLK/DAT lines are backdriving into what essentially is a ++ * powered-off SDCard, that's why the voltage drops from 3.3V to ~1.6V" ++ * ++ * Note that this can probably be removed when we change over to storing ++ * all BL components on QSPI on Nano, and U-Boot then becomes the first ++ * one to turn on SDMMC1 power. Another fix would be to have CBoot ++ * disable power/gate SDMMC1 off before handing off to U-Boot/kernel. ++ */ ++ reset_set_enable(PERIPH_ID_SDMMC1, 1); ++ clock_set_enable(PERIPH_ID_SDMMC1, 0); ++#endif /* CONFIG_DISABLE_SDMMC1_EARLY */ ++ + pinmux_init(); + board_init_uart_f(); + diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig -index 250738aed312..ea28392c0f3a 100644 +index 3637473..97ed8e0 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -35,6 +35,12 @@ config TARGET_P2571 @@ -233,7 +351,7 @@ index 250738aed312..ea28392c0f3a 100644 endchoice config SYS_SOC -@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" +@@ -44,5 +50,6 @@ source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2371-0000/Kconfig" source "board/nvidia/p2371-2180/Kconfig" source "board/nvidia/p2571/Kconfig" @@ -242,7 +360,7 @@ index 250738aed312..ea28392c0f3a 100644 endif diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig new file mode 100644 -index 000000000000..7a08cd88675f +index 0000000..7a08cd8 --- /dev/null +++ b/board/nvidia/p3450-0000/Kconfig @@ -0,0 +1,12 @@ @@ -260,7 +378,7 @@ index 000000000000..7a08cd88675f +endif diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS new file mode 100644 -index 000000000000..40700066bf39 +index 0000000..4070006 --- /dev/null +++ b/board/nvidia/p3450-0000/MAINTAINERS @@ -0,0 +1,6 @@ @@ -272,7 +390,7 @@ index 000000000000..40700066bf39 +F: configs/p3450-0000_defconfig diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile new file mode 100644 -index 000000000000..993c506d8200 +index 0000000..993c506 --- /dev/null +++ b/board/nvidia/p3450-0000/Makefile @@ -0,0 +1,8 @@ @@ -286,19 +404,18 @@ index 000000000000..993c506d8200 +obj-y += p3450-0000.o diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c new file mode 100644 -index 000000000000..432179e92605 +index 0000000..f4212ab --- /dev/null +++ b/board/nvidia/p3450-0000/p3450-0000.c -@@ -0,0 +1,198 @@ +@@ -0,0 +1,178 @@ ++// SPDX-License-Identifier: GPL-2.0+ +/* -+ * (C) Copyright 2018 ++ * (C) Copyright 2018-2019 + * NVIDIA Corporation + * -+ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include -+#include +#include +#include +#include @@ -307,7 +424,6 @@ index 000000000000..432179e92605 +#include +#include +#include "../p2571/max77620_init.h" -+#include "pinmux-config-p3450-0000.h" + +void pin_mux_mmc(void) +{ @@ -351,24 +467,6 @@ index 000000000000..432179e92605 + } +} + -+/* -+ * Routine: pinmux_init -+ * Description: Do individual peripheral pinmux configs -+ */ -+void pinmux_init(void) -+{ -+ pinmux_clear_tristate_input_clamping(); -+ -+ gpio_config_table(p3450_0000_gpio_inits, -+ ARRAY_SIZE(p3450_0000_gpio_inits)); -+ -+ pinmux_config_pingrp_table(p3450_0000_pingrps, -+ ARRAY_SIZE(p3450_0000_pingrps)); -+ -+ pinmux_config_drvgrp_table(p3450_0000_drvgrps, -+ ARRAY_SIZE(p3450_0000_drvgrps)); -+} -+ +#ifdef CONFIG_PCI_TEGRA +int tegra_pcie_board_init(void) +{ @@ -488,283 +586,12 @@ index 000000000000..432179e92605 + + return 0; +} -diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -new file mode 100644 -index 000000000000..722da4973542 ---- /dev/null -+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -@@ -0,0 +1,265 @@ -+/* -+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+/* -+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -+ * -+ * To generate this file, use the tegra-pinmux-scripts tool available from -+ * https://github.com/NVIDIA/tegra-pinmux-scripts -+ * Run "board-to-uboot.py p3450-0000". -+ */ -+ -+#ifndef _PINMUX_CONFIG_P3450_0000_H_ -+#define _PINMUX_CONFIG_P3450_0000_H_ -+ -+#define GPIO_INIT(_port, _gpio, _init) \ -+ { \ -+ .gpio = TEGRA_GPIO(_port, _gpio), \ -+ .init = TEGRA_GPIO_INIT_##_init, \ -+ } -+ -+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { -+ /* port, pin, init_val */ -+ GPIO_INIT(A, 5, IN), -+ GPIO_INIT(A, 6, OUT1), -+ GPIO_INIT(B, 4, IN), -+ GPIO_INIT(B, 5, IN), -+ GPIO_INIT(B, 6, IN), -+ GPIO_INIT(B, 7, IN), -+ GPIO_INIT(C, 0, IN), -+ GPIO_INIT(C, 1, IN), -+ GPIO_INIT(C, 2, IN), -+ GPIO_INIT(C, 3, IN), -+ GPIO_INIT(C, 4, IN), -+ GPIO_INIT(E, 6, IN), -+ GPIO_INIT(G, 2, IN), -+ GPIO_INIT(G, 3, IN), -+ GPIO_INIT(H, 0, OUT0), -+ GPIO_INIT(H, 2, IN), -+ GPIO_INIT(H, 3, OUT0), -+ GPIO_INIT(H, 4, OUT0), -+ GPIO_INIT(H, 5, IN), -+ GPIO_INIT(H, 6, IN), -+ GPIO_INIT(H, 7, OUT0), -+ GPIO_INIT(I, 0, OUT0), -+ GPIO_INIT(I, 1, IN), -+ GPIO_INIT(I, 2, OUT0), -+ GPIO_INIT(J, 4, IN), -+ GPIO_INIT(J, 5, IN), -+ GPIO_INIT(J, 6, IN), -+ GPIO_INIT(J, 7, IN), -+ GPIO_INIT(S, 5, IN), -+ GPIO_INIT(S, 7, OUT0), -+ GPIO_INIT(T, 0, OUT0), -+ GPIO_INIT(V, 0, IN), -+ GPIO_INIT(V, 1, IN), -+ GPIO_INIT(X, 3, OUT1), -+ GPIO_INIT(X, 4, IN), -+ GPIO_INIT(X, 5, IN), -+ GPIO_INIT(X, 6, IN), -+ GPIO_INIT(Y, 1, IN), -+ GPIO_INIT(Y, 2, IN), -+ GPIO_INIT(Z, 0, IN), -+ GPIO_INIT(Z, 2, IN), -+ GPIO_INIT(Z, 3, OUT0), -+ GPIO_INIT(BB, 0, IN), -+ GPIO_INIT(CC, 4, IN), -+ GPIO_INIT(DD, 0, IN), -+}; -+ -+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -+ { \ -+ .pingrp = PMUX_PINGRP_##_pingrp, \ -+ .func = PMUX_FUNC_##_mux, \ -+ .pull = PMUX_PULL_##_pull, \ -+ .tristate = PMUX_TRI_##_tri, \ -+ .io = PMUX_PIN_##_io, \ -+ .od = PMUX_PIN_OD_##_od, \ -+ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -+ .lock = PMUX_PIN_LOCK_DEFAULT, \ -+ } -+ -+static const struct pmux_pingrp_config p3450_0000_pingrps[] = { -+ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -+ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -+ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -+ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+}; -+ -+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -+ { \ -+ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -+ .slwf = _slwf, \ -+ .slwr = _slwr, \ -+ .drvup = _drvup, \ -+ .drvdn = _drvdn, \ -+ .lpmd = PMUX_LPMD_##_lpmd, \ -+ .schmt = PMUX_SCHMT_##_schmt, \ -+ .hsm = PMUX_HSM_##_hsm, \ -+ } -+ -+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { -+}; -+ -+#endif /* PINMUX_CONFIG_P3450_0000_H */ diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig new file mode 100644 -index 000000000000..3a95028279d3 +index 0000000..c861d13 --- /dev/null +++ b/configs/p3450-0000_defconfig -@@ -0,0 +1,55 @@ +@@ -0,0 +1,64 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_SYS_TEXT_BASE=0x80080000 @@ -797,9 +624,10 @@ index 000000000000..3a95028279d3 +CONFIG_DFU_SF=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_USE_4K_SECTORS=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=24000000 -+CONFIG_SPI_FLASH_WINBOND=y +CONFIG_RTL8169=y +CONFIG_PCI=y +CONFIG_DM_PCI=y @@ -807,6 +635,7 @@ index 000000000000..3a95028279d3 +CONFIG_PCI_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_TEGRA114_SPI=y ++CONFIG_TEGRA210_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y @@ -820,15 +649,22 @@ index 000000000000..3a95028279d3 +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +# CONFIG_ENV_IS_IN_MMC is not set ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_ENV_SECT_SIZE=0x1000 ++CONFIG_ENV_OFFSET=0xFFFFE000 ++CONFIG_BOOTP_PREFER_SERVERIP=y ++CONFIG_DISABLE_SDMMC1_EARLY=y ++CONFIG_NVME=y diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h new file mode 100644 -index 000000000000..ee819b7573b0 +index 0000000..7f05beb --- /dev/null +++ b/include/configs/p3450-0000.h -@@ -0,0 +1,34 @@ +@@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* -+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. ++ * (C) Copyright 2018-2019 NVIDIA Corporation. + */ + +#ifndef _P3450_0000_H @@ -844,15 +680,27 @@ index 000000000000..ee819b7573b0 +/* Board-specific serial config */ +#define CONFIG_TEGRA_ENABLE_UARTA + -+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ ++/* Only MMC/PXE/DHCP for now, add USB back in later when supported */ +#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + -+/* SPI */ ++/* Environment at end of QSPI, in the VER partition */ ++#define CONFIG_ENV_SPI_MAX_HZ 48000000 ++#define CONFIG_ENV_SPI_MODE SPI_MODE_0 +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + ++#define CONFIG_PREBOOT ++ ++#define BOARD_EXTRA_ENV_SETTINGS \ ++ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ ++ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ ++ "source ${scriptaddr}; " \ ++ "fi\0" ++ ++/* General networking support */ +#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h" + diff --git a/Misc-fixes-for-Tegra.patch b/Misc-fixes-for-Tegra.patch new file mode 100644 index 0000000..355bbae --- /dev/null +++ b/Misc-fixes-for-Tegra.patch @@ -0,0 +1,394 @@ +From patchwork Thu Mar 26 22:20:43 2020 +Content-Type: text/plain; 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Enable +relocation of RELA section required to work with different load +addresses. + +Signed-off-by: Vishruth +Signed-off-by: Tom Warren +--- + configs/p2771-0000-000_defconfig | 1 + + configs/p2771-0000-500_defconfig | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index 06f12e2..e347a77 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y + CONFIG_SYS_NS16550=y + CONFIG_USB=y + CONFIG_DM_USB=y ++CONFIG_POSITION_INDEPENDENT=y +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index 1a14a92..0803b26 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y + CONFIG_SYS_NS16550=y + CONFIG_USB=y + CONFIG_DM_USB=y ++CONFIG_POSITION_INDEPENDENT=y + +From patchwork Thu Mar 26 22:20:44 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262378 +X-Patchwork-Delegate: sjg@chromium.org +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Thu, 26 Mar 2020 15:20:49 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:20:49 -0700 +Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:20:49 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:20:49 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:20:48 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 2/3] fdt: Fix 'system' command +Date: Thu, 26 Mar 2020 15:20:44 -0700 +Message-ID: <1585261245-1740-3-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +'fdt systemsetup' wasn't working, due to the fact that the 'set' command +was being parsed in do_fdt() by only testing for the leading 's' instead +of "se", which kept the "sys" test further down from executing. Changed +to test for "se" instead, now 'fdt systemsetup' works (to test the +ft_system_setup proc w/o having to boot a kernel). + +Signed-off-by: Tom Warren +--- + cmd/fdt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/cmd/fdt.c b/cmd/fdt.c +index 25a6ed4..36cc726 100644 +--- a/cmd/fdt.c ++++ b/cmd/fdt.c +@@ -286,7 +286,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + /* + * Set the value of a property in the working_fdt. + */ +- } else if (argv[1][0] == 's') { ++ } else if (strncmp(argv[1], "se", 2) == 0) { + char *pathp; /* path */ + char *prop; /* property */ + int nodeoffset; /* node offset from libfdt */ + +From patchwork Thu Mar 26 22:20:45 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262379 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Thu, 26 Mar 2020 15:20:50 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:20:50 -0700 +Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:20:49 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:20:49 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:20:49 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT +Date: Thu, 26 Mar 2020 15:20:45 -0700 +Message-ID: <1585261245-1740-4-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Stephen Warren + +This adds to the DT the I2C controllers that connect to the board ID EEPROM, +camera board EEPROM, etc. With this change, you can now probe all I2C devices +on a TX1 board. + +Signed-off-by: Tom Warren +--- + arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts +index c2f497c..d982b5f 100644 +--- a/arch/arm/dts/tegra210-p2371-2180.dts ++++ b/arch/arm/dts/tegra210-p2371-2180.dts +@@ -12,6 +12,9 @@ + + aliases { + i2c0 = "/i2c@7000d000"; ++ i2c2 = "/i2c@7000c400"; ++ i2c3 = "/i2c@7000c500"; ++ i2c5 = "/i2c@546c0c00"; + mmc0 = "/sdhci@700b0600"; + mmc1 = "/sdhci@700b0000"; + usb0 = "/usb@7d000000"; +@@ -33,6 +36,11 @@ + }; + }; + ++ i2c@546c0c00 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ + padctl@7009f000 { + pinctrl-0 = <&padctl_default>; + pinctrl-names = "default"; +@@ -85,6 +93,16 @@ + non-removable; + }; + ++ i2c@7000c400 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c500 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; diff --git a/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch b/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch new file mode 100644 index 0000000..df63c4e --- /dev/null +++ b/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch @@ -0,0 +1,55 @@ +From a63eb1bdcd25246b2c637c7846917dc6dc607725 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Apr 2019 15:44:59 +0100 +Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2 + variants + +Signed-off-by: Peter Robinson +--- + include/config_distro_bootcmd.h | 2 ++ + include/configs/tegra186-common.h | 7 ++++++- + 2 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h +index fc0935fa21..fd1c5f5afa 100644 +--- a/include/config_distro_bootcmd.h ++++ b/include/config_distro_bootcmd.h +@@ -118,8 +118,10 @@ + "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ + "fi; " + #else ++#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK + #define BOOTENV_EFI_SET_FDTFILE_FALLBACK + #endif ++#endif + + + #define BOOTENV_SHARED_EFI \ +diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h +index 5c3ad35c76..d5f21e0907 100644 +--- a/include/configs/tegra186-common.h ++++ b/include/configs/tegra186-common.h +@@ -20,6 +20,12 @@ + /* Generic Interrupt Controller */ + #define CONFIG_GICV2 + ++#undef FDTFILE ++#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ ++ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ ++ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ ++ "fi; " ++ + /* + * Memory layout for where various images get loaded by boot scripts: + * +@@ -49,7 +55,6 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ +- "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +-- +2.26.0 + diff --git a/arm-tegra-defaine-fdtfile-for-all-devices.patch b/arm-tegra-define-fdtfile-option-for-distro-boot.patch similarity index 59% rename from arm-tegra-defaine-fdtfile-for-all-devices.patch rename to arm-tegra-define-fdtfile-option-for-distro-boot.patch index 50c1c1f..4f065ff 100644 --- a/arm-tegra-defaine-fdtfile-for-all-devices.patch +++ b/arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -1,7 +1,12 @@ -From 1e93c98419e6a1ea62ef697ed915617024eb6da0 Mon Sep 17 00:00:00 2001 +From ce2493a9dec8af2dd57839e337b002d256d2a842 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Thu, 18 Apr 2019 14:03:33 +0100 -Subject: [PATCH] arm: tegra: defaine fdtfile for all devices +Date: Tue, 31 Mar 2020 10:38:41 +0100 +Subject: [PATCH] arm: tegra: define fdtfile option for distro boot + +For booting via UEFI we need to define the fdtfile option so +bootefi has the option to load a fdtfile from disk. For arm64 +the kernel dtb is located in a vendor directory so we define +that as nvidia for that architecture. Signed-off-by: Peter Robinson --- @@ -15,10 +20,10 @@ Signed-off-by: Peter Robinson 7 files changed, 12 insertions(+) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h -index 84f671d00c..c3e16d8cfc 100644 +index f2cdd9c019..997b50394b 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h -@@ -56,6 +56,12 @@ +@@ -55,6 +55,12 @@ #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) @@ -32,7 +37,7 @@ index 84f671d00c..c3e16d8cfc 100644 * Physical Memory Map */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h -index 1aa4412645..0c44a7673b 100644 +index d3a7045697..9d751b6740 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -50,6 +50,7 @@ @@ -44,7 +49,7 @@ index 1aa4412645..0c44a7673b 100644 "ramdisk_addr_r=0x83100000\0" diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h -index 3530684164..29da06c8f7 100644 +index 522993b958..0eb8f92809 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -52,6 +52,7 @@ @@ -68,7 +73,7 @@ index b4936cc731..5c3ad35c76 100644 "ramdisk_addr_r=0x82100000\0" diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h -index e58477e289..73c94d993b 100644 +index 1e31d82574..fdd8996955 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -51,6 +51,7 @@ @@ -80,7 +85,7 @@ index e58477e289..73c94d993b 100644 "ramdisk_addr_r=0x03100000\0" diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h -index 1c533118ad..69e446ed58 100644 +index 1b8e94b60c..2226effe16 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -46,6 +46,7 @@ @@ -88,11 +93,11 @@ index 1c533118ad..69e446ed58 100644 "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83200000\0" diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h -index 2d8948d9d9..27696009cd 100644 +index 54bc6756ab..6c5dc24b26 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -47,6 +47,7 @@ @@ -104,59 +109,5 @@ index 2d8948d9d9..27696009cd 100644 "ramdisk_addr_r=0x83100000\0" -- -2.21.0 -From 267dc15aa8f247362b04387d6a1ab01d94d41aef Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 18 Apr 2019 15:44:59 +0100 -Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2 - variants - -Signed-off-by: Peter Robinson ---- - include/config_distro_bootcmd.h | 2 ++ - include/configs/tegra186-common.h | 7 ++++++- - 2 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 4993303f4d..cd317bb457 100644 ---- a/include/config_distro_bootcmd.h -+++ b/include/config_distro_bootcmd.h -@@ -118,8 +118,10 @@ - "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ - "fi; " - #else -+#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK - #define BOOTENV_EFI_SET_FDTFILE_FALLBACK - #endif -+#endif - - - #define BOOTENV_SHARED_EFI \ -diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h -index 5c3ad35c76..d5f21e0907 100644 ---- a/include/configs/tegra186-common.h -+++ b/include/configs/tegra186-common.h -@@ -20,6 +20,12 @@ - /* Generic Interrupt Controller */ - #define CONFIG_GICV2 - -+#undef FDTFILE -+#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ -+ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ -+ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ -+ "fi; " -+ - /* - * Memory layout for where various images get loaded by boot scripts: - * -@@ -49,7 +55,6 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -- "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" - --- -2.21.0 +2.26.0 diff --git a/mmc-t210-fix-autocal-and-400KHz-clock.patch b/mmc-t210-fix-autocal-and-400KHz-clock.patch new file mode 100644 index 0000000..622e570 --- /dev/null +++ b/mmc-t210-fix-autocal-and-400KHz-clock.patch @@ -0,0 +1,461 @@ +From patchwork Thu Mar 26 22:30:21 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262385 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pKSx23cFz9sR4 + for ; + Fri, 27 Mar 2020 09:30:56 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 88E9581860; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 15:29:48 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 15:30:34 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:30:34 -0700 +Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:30:34 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:30:34 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:30:33 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 1/2] mmc: t210: Add autocal and tap/trim updates for SDMMC1/3 +Date: Thu, 26 Mar 2020 15:30:21 -0700 +Message-ID: <1585261822-3420-2-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +As per the T210 TRM, when running at 3.3v, the SDMMC1 tap/trim and +autocal values need to be set to condition the signals correctly before +talking to the SD-card. This is the same as what's being done in CBoot, +but it gets reset when the SDMMC1 HW is soft-reset during SD driver +init, so needs to be repeated here. Also set autocal and tap/trim for +SDMMC3, although no T210 boards use it for SD-card at this time. + +Signed-off-by: Tom Warren +--- +Changes for v2: + - Added clocks.h include for TEGRA30 to fix T30 32-bit builds + + arch/arm/include/asm/arch-tegra/tegra_mmc.h | 20 +++++-- + drivers/mmc/tegra_mmc.c | 84 ++++++++++++++++++++++++++--- + 2 files changed, 92 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h +index a2b6f63..a8bfa46 100644 +--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h ++++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h +@@ -2,7 +2,7 @@ + /* + * (C) Copyright 2009 SAMSUNG Electronics + * Minkyu Kang +- * Portions Copyright (C) 2011-2012 NVIDIA Corporation ++ * Portions Copyright (C) 2011-2012,2019 NVIDIA Corporation + */ + + #ifndef __TEGRA_MMC_H_ +@@ -52,7 +52,7 @@ struct tegra_mmc { + unsigned char admaerr; /* offset 54h */ + unsigned char res4[3]; /* RESERVED, offset 55h-57h */ + unsigned long admaaddr; /* offset 58h-5Fh */ +- unsigned char res5[0xa0]; /* RESERVED, offset 60h-FBh */ ++ unsigned char res5[0x9c]; /* RESERVED, offset 60h-FBh */ + unsigned short slotintstatus; /* offset FCh */ + unsigned short hcver; /* HOST Version */ + unsigned int venclkctl; /* _VENDOR_CLOCK_CNTRL_0, 100h */ +@@ -127,11 +127,23 @@ struct tegra_mmc { + + #define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE (1 << 1) + +-/* SDMMC1/3 settings from section 24.6 of T30 TRM */ ++/* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */ + #define MEMCOMP_PADCTRL_VREF 7 +-#define AUTO_CAL_ENABLED (1 << 29) ++#define AUTO_CAL_ENABLE (1 << 29) ++#if defined(CONFIG_TEGRA210) ++#define AUTO_CAL_ACTIVE (1 << 31) ++#define AUTO_CAL_START (1 << 31) ++#define AUTO_CAL_PD_OFFSET (0x7D << 8) ++#define AUTO_CAL_PU_OFFSET (0 << 0) ++#define IO_TRIM_BYPASS_MASK (1 << 2) ++#define TRIM_VAL_SHIFT 24 ++#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT) ++#define TAP_VAL_SHIFT 16 ++#define TAP_VAL_MASK (0xFF << TAP_VAL_SHIFT) ++#else + #define AUTO_CAL_PD_OFFSET (0x70 << 8) + #define AUTO_CAL_PU_OFFSET (0x62 << 0) ++#endif + + #endif /* __ASSEMBLY__ */ + #endif /* __TEGRA_MMC_H_ */ +diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c +index f022e93..73ac58c 100644 +--- a/drivers/mmc/tegra_mmc.c ++++ b/drivers/mmc/tegra_mmc.c +@@ -3,7 +3,7 @@ + * (C) Copyright 2009 SAMSUNG Electronics + * Minkyu Kang + * Jaehoon Chung +- * Portions Copyright 2011-2016 NVIDIA Corporation ++ * Portions Copyright 2011-2019 NVIDIA Corporation + */ + + #include +@@ -15,6 +15,9 @@ + #include + #include + #include ++#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA210) ++#include ++#endif + + struct tegra_mmc_plat { + struct mmc_config cfg; +@@ -30,6 +33,7 @@ struct tegra_mmc_priv { + struct gpio_desc wp_gpio; /* Write Protect GPIO */ + unsigned int version; /* SDHCI spec. version */ + unsigned int clock; /* Current clock (MHz) */ ++ int mmc_id; /* peripheral id */ + }; + + static void tegra_mmc_set_power(struct tegra_mmc_priv *priv, +@@ -446,16 +450,19 @@ static int tegra_mmc_set_ios(struct udevice *dev) + + static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + { +-#if defined(CONFIG_TEGRA30) ++#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA210) + u32 val; ++ u16 clk_con; ++ int timeout; ++ int id = priv->mmc_id; + +- debug("%s: sdmmc address = %08x\n", __func__, (unsigned int)priv->reg); ++ debug("%s: sdmmc address = %p, id = %d\n", __func__, ++ priv->reg, id); + + /* Set the pad drive strength for SDMMC1 or 3 only */ +- if (priv->reg != (void *)0x78000000 && +- priv->reg != (void *)0x78000400) { ++ if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { + debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", +- __func__); ++ __func__); + return; + } + +@@ -464,11 +471,65 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + val |= MEMCOMP_PADCTRL_VREF; + writel(val, &priv->reg->sdmemcmppadctl); + ++ /* Disable SD Clock Enable before running auto-cal as per TRM */ ++ clk_con = readw(&priv->reg->clkcon); ++ debug("%s: CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); ++ clk_con &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; ++ writew(clk_con, &priv->reg->clkcon); ++ + val = readl(&priv->reg->autocalcfg); + val &= 0xFFFF0000; +- val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; ++ val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET; + writel(val, &priv->reg->autocalcfg); +-#endif ++ val |= AUTO_CAL_START | AUTO_CAL_ENABLE; ++ writel(val, &priv->reg->autocalcfg); ++ debug("%s: AUTO_CAL_CFG = 0x%08X\n", __func__, val); ++ udelay(1); ++ timeout = 100; /* 10 mSec max (100*100uS) */ ++ do { ++ val = readl(&priv->reg->autocalsts); ++ udelay(100); ++ } while ((val & AUTO_CAL_ACTIVE) && --timeout); ++ val = readl(&priv->reg->autocalsts); ++ debug("%s: Final AUTO_CAL_STATUS = 0x%08X, timeout = %d\n", ++ __func__, val, timeout); ++ ++ /* Re-enable SD Clock Enable when auto-cal is done */ ++ clk_con |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; ++ writew(clk_con, &priv->reg->clkcon); ++ clk_con = readw(&priv->reg->clkcon); ++ debug("%s: final CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); ++ ++ if (timeout == 0) { ++ printf("%s: Warning: Autocal timed out!\n", __func__); ++ /* TBD: Set CFG2TMC_SDMMC1_PAD_CAL_DRV* regs here */ ++ } ++ ++#if defined(CONFIG_TEGRA210) ++ u32 tap_value, trim_value; ++ ++ /* Set tap/trim values for SDMMC1/3 @ <48MHz here */ ++ val = readl(&priv->reg->venspictl); /* aka VENDOR_SYS_SW_CNTL */ ++ val &= IO_TRIM_BYPASS_MASK; ++ if (id == PERIPH_ID_SDMMC1) { ++ tap_value = 4; /* default */ ++ if (val) ++ tap_value = 3; ++ trim_value = 2; ++ } else { /* SDMMC3 */ ++ tap_value = 3; ++ trim_value = 3; ++ } ++ ++ val = readl(&priv->reg->venclkctl); ++ val &= ~TRIM_VAL_MASK; ++ val |= (trim_value << TRIM_VAL_SHIFT); ++ val &= ~TAP_VAL_MASK; ++ val |= (tap_value << TAP_VAL_SHIFT); ++ writel(val, &priv->reg->venclkctl); ++ debug("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val); ++#endif /* T210 */ ++#endif /* T30/T210 */ + } + + static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc) +@@ -514,6 +575,13 @@ static int tegra_mmc_init(struct udevice *dev) + unsigned int mask; + debug(" tegra_mmc_init called\n"); + ++#if defined(CONFIG_TEGRA210) ++ priv->mmc_id = clock_decode_periph_id(dev); ++ if (priv->mmc_id == PERIPH_ID_NONE) { ++ printf("%s: Missing/invalid peripheral ID\n", __func__); ++ return -EINVAL; ++ } ++#endif + tegra_mmc_reset(priv, mmc); + + #if defined(CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK) + +From patchwork Thu Mar 26 22:30:22 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262386 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Thu, 26 Mar 2020 15:30:35 -0700 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 15:30:35 -0700 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:30:35 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:30:35 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:30:34 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 2/2] mmc: t210: Fix 'bad' SD-card clock when doing 400KHz + card detect +Date: Thu, 26 Mar 2020 15:30:22 -0700 +Message-ID: <1585261822-3420-3-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +According to the HW team, for some reason the normal clock select code +picks what appears to be a perfectly valid 375KHz SD card clock, based +on the CAR clock source and SDMMC1 controller register settings (CAR = +408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register +divisor of 16 = 375KHz). But the resulting SD card clock, as measured by +the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the +values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR +clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on +T210 when the requested clock is <= 400KHz. Note that as far as I can +tell, the other requests for clocks in the Tegra MMC driver result in +valid SD clocks. + +Signed-off-by: Tom Warren +--- +Changes for v2: + - None + + arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 +- + drivers/mmc/tegra_mmc.c | 18 ++++++++++++++++++ + 2 files changed, 19 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h +index a8bfa46..70dcf4a 100644 +--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h ++++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h +@@ -130,9 +130,9 @@ struct tegra_mmc { + /* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */ + #define MEMCOMP_PADCTRL_VREF 7 + #define AUTO_CAL_ENABLE (1 << 29) +-#if defined(CONFIG_TEGRA210) + #define AUTO_CAL_ACTIVE (1 << 31) + #define AUTO_CAL_START (1 << 31) ++#if defined(CONFIG_TEGRA210) + #define AUTO_CAL_PD_OFFSET (0x7D << 8) + #define AUTO_CAL_PU_OFFSET (0 << 0) + #define IO_TRIM_BYPASS_MASK (1 << 2) +diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c +index 73ac58c..03110ba 100644 +--- a/drivers/mmc/tegra_mmc.c ++++ b/drivers/mmc/tegra_mmc.c +@@ -376,6 +376,24 @@ static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock) + + rate = clk_set_rate(&priv->clk, clock); + div = (rate + clock - 1) / clock; ++ ++#if defined(CONFIG_TEGRA210) ++ if (priv->mmc_id == PERIPH_ID_SDMMC1 && clock <= 400000) { ++ /* clock_adjust_periph_pll_div() chooses a 'bad' clock ++ * on SDMMC1 T210, so skip it here and force a clock ++ * that's been spec'd in the table in the TRM for ++ * card-detect (400KHz). ++ */ ++ uint effective_rate = clock_adjust_periph_pll_div(priv->mmc_id, ++ CLOCK_ID_PERIPH, 24727273, NULL); ++ div = 62; ++ ++ debug("%s: WAR: Using SDMMC1 clock of %u, div %d to achieve %dHz card clock ...\n", ++ __func__, effective_rate, div, clock); ++ } else ++ clock_adjust_periph_pll_div(priv->mmc_id, CLOCK_ID_PERIPH, clock, ++ &div); ++#endif + debug("div = %d\n", div); + + writew(0, &priv->reg->clkcon); diff --git a/mtd-spi-Add-Macronix-MX25U3235F-device.patch b/mtd-spi-Add-Macronix-MX25U3235F-device.patch new file mode 100644 index 0000000..117fe28 --- /dev/null +++ b/mtd-spi-Add-Macronix-MX25U3235F-device.patch @@ -0,0 +1,116 @@ +From patchwork Thu Mar 26 21:59:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262368 +X-Patchwork-Delegate: jagannadh.teki@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) + server-digest SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pJmv0yfHz9sPR + for ; + Fri, 27 Mar 2020 08:59:42 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id A34AC80199; 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Thu, 26 Mar 2020 14:59:00 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH] mtd: spi: Add Macronix MX25U3235F device +Date: Thu, 26 Mar 2020 14:59:01 -0700 +Message-ID: <1585259941-28879-1-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +Add Macronix MX25U3235F flash device description. +This is a 4MiB part. + +Signed-off-by: Tom Warren +--- + drivers/mtd/spi/spi-nor-ids.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c +index 973b6f8..abdf560 100644 +--- a/drivers/mtd/spi/spi-nor-ids.c ++++ b/drivers/mtd/spi/spi-nor-ids.c +@@ -147,6 +147,7 @@ const struct flash_info spi_nor_ids[] = { + { INFO("mx25l6405d", 0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { INFO("mx25u2033e", 0xc22532, 0, 64 * 1024, 4, SECT_4K) }, + { INFO("mx25u1635e", 0xc22535, 0, 64 * 1024, 32, SECT_4K) }, ++ { INFO("mx25u3235f", 0xc22536, 0, 4 * 1024, 1024, SECT_4K) }, + { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, + { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) }, + { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, diff --git a/net-tegra-Misc-network-fixes.patch b/net-tegra-Misc-network-fixes.patch new file mode 100644 index 0000000..d177516 --- /dev/null +++ b/net-tegra-Misc-network-fixes.patch @@ -0,0 +1,310 @@ +From patchwork Thu Mar 26 22:59:13 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262416 +X-Patchwork-Delegate: joe.hershberger@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pL643S8Tz9sSH + for ; + Fri, 27 Mar 2020 09:59:40 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 95C3581850; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 15:57:38 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 15:59:10 -0700 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 15:59:10 -0700 +Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:59:09 +0000 +Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 + via Frontend Transport; Thu, 26 Mar 2020 22:59:10 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + hqnvemgw03.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:59:09 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 1/2] net: rt8169: WAR for DHCP not getting IP after kernel + boot/reboot +Date: Thu, 26 Mar 2020 15:59:13 -0700 +Message-ID: <1585263554-10258-2-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +This is a WAR for DHCP failure after rebooting from the L4T kernel. The +r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0, +which goes by FuncEvent and MISC in various driver source/datasheets. +That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it +here at the end of probe to ensure that U-Boot can get an IP assigned +via DHCP. + +Signed-off-by: Tom Warren +--- + drivers/net/rtl8169.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index 5ccdfdd..ff89e28 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -237,6 +237,9 @@ enum RTL8169_register_content { + + /*_TBICSRBit*/ + TBILinkOK = 0x02000000, ++ ++ /* FuncEvent/Misc */ ++ RxDv_Gated_En = 0x80000, + }; + + static struct { +@@ -1207,6 +1210,19 @@ static int rtl8169_eth_probe(struct udevice *dev) + return ret; + } + ++ /* ++ * WAR for DHCP failure after rebooting from kernel. ++ * Clear RxDv_Gated_En bit which was set by kernel driver. ++ * Without this, U-Boot can't get an IP via DHCP. ++ * Register (FuncEvent, aka MISC) and RXDV_GATED_EN bit are from ++ * the r8169.c kernel driver. ++ */ ++ ++ u32 val = RTL_R32(FuncEvent); ++ debug("%s: FuncEvent/Misc (0xF0) = 0x%08X\n", __func__, val); ++ val &= ~RxDv_Gated_En; ++ RTL_W32(FuncEvent, val); ++ + return 0; + } + + +From patchwork Thu Mar 26 22:59:14 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262417 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pL6B04lDz9sSH + for ; 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Thu, 26 Mar 2020 15:59:10 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 2/2] tegra: Enable CONFIG_BOOTP_PREFER_SERVERIP for all + Jetson boards +Date: Thu, 26 Mar 2020 15:59:14 -0700 +Message-ID: <1585263554-10258-3-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +This allows the user to set $serverip in the environment before +executing a DHCP request. If they do, U-Boot will use that IP rather +than using the IP in the DHCP response. + +Signed-off-by: Tom Warren +Acked-by: Stephen Warren +--- + configs/e2220-1170_defconfig | 1 + + configs/p2371-0000_defconfig | 1 + + configs/p2371-2180_defconfig | 1 + + configs/p2571_defconfig | 1 + + configs/p2771-0000-000_defconfig | 1 + + configs/p2771-0000-500_defconfig | 1 + + 6 files changed, 6 insertions(+) + +diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig +index 1639040..951ed1d 100644 +--- a/configs/e2220-1170_defconfig ++++ b/configs/e2220-1170_defconfig +@@ -43,3 +43,4 @@ CONFIG_CI_UDC=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y ++CONFIG_BOOTP_PREFER_SERVERIP=y +diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig +index 2070199..7081719 100644 +--- a/configs/p2371-0000_defconfig ++++ b/configs/p2371-0000_defconfig +@@ -44,3 +44,4 @@ CONFIG_CI_UDC=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y ++CONFIG_BOOTP_PREFER_SERVERIP=y +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index 8c808ae..c70217c 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -52,3 +52,4 @@ CONFIG_CI_UDC=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y ++CONFIG_BOOTP_PREFER_SERVERIP=y +diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig +index 721c5c5..43c24b8 100644 +--- a/configs/p2571_defconfig ++++ b/configs/p2571_defconfig +@@ -44,3 +44,4 @@ CONFIG_CI_UDC=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y ++CONFIG_BOOTP_PREFER_SERVERIP=y +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index e347a77..8bf8419 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -37,3 +37,4 @@ CONFIG_SYS_NS16550=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_POSITION_INDEPENDENT=y ++CONFIG_BOOTP_PREFER_SERVERIP=y +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index 0803b26..1f40333 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -37,3 +37,4 @@ CONFIG_SYS_NS16550=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_POSITION_INDEPENDENT=y ++CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch b/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch new file mode 100644 index 0000000..2257083 --- /dev/null +++ b/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch @@ -0,0 +1,453 @@ +From patchwork Thu Mar 26 22:42:00 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262404 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pKkD6xnVz9sRR + for ; + Fri, 27 Mar 2020 09:42:28 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 798238183F; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 15:41:16 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 15:42:02 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:42:02 -0700 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:42:01 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:42:01 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:42:01 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 1/3] qspi: t210: Fix claim_bus's use of the wrong bus/device +Date: Thu, 26 Mar 2020 15:42:00 -0700 +Message-ID: <1585262522-6127-2-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +claim_bus() is passed a udevice *dev, which is the bus device's parent. +In this driver, claim_bus assumed it was the bus, which caused the +'priv' info pointer to be wrong, and periph_id was incorrect. This in +turn caused the periph clock call to assign the wrong clock (PLLM +instead of PLLP0), which caused a kernel warning. I only saw the 'bad' +periph_id when enabling DEBUG due to an assert. Not sure how QSPI was +working w/this errant clock, but it was moot as QSPI wasn't active +unless you probed it, and that wasn't happening until I posted a patch +to enable env save to QSPI for Nano (coming soon). + +Signed-off-by: Tom Warren +--- + Changes in v2: + - None + + drivers/spi/tegra210_qspi.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c +index d82ecaa..2a77126 100644 +--- a/drivers/spi/tegra210_qspi.c ++++ b/drivers/spi/tegra210_qspi.c +@@ -2,7 +2,8 @@ + /* + * NVIDIA Tegra210 QSPI controller driver + * +- * (C) Copyright 2015 NVIDIA Corporation ++ * (C) Copyright 2015-2019 NVIDIA Corporation ++ * + */ + + #include +@@ -137,8 +138,9 @@ static int tegra210_qspi_probe(struct udevice *bus) + return 0; + } + +-static int tegra210_qspi_claim_bus(struct udevice *bus) ++static int tegra210_qspi_claim_bus(struct udevice *dev) + { ++ struct udevice *bus = dev->parent; + struct tegra210_qspi_priv *priv = dev_get_priv(bus); + struct qspi_regs *regs = priv->regs; + + +From patchwork Thu Mar 26 22:42:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262405 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pKkQ1xG5z9sRR + for ; + Fri, 27 Mar 2020 09:42:38 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 0EBF581883; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 15:41:16 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 15:42:02 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:42:02 -0700 +Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 22:42:02 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 22:42:02 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 15:42:02 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 2/3] qspi: t210: Fix QSPI clock and tap delays +Date: Thu, 26 Mar 2020 15:42:01 -0700 +Message-ID: <1585262522-6127-3-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +When claim_bus was setting the clock, it reset the QSPI controller, +which wipes out any tap delays set by previous bootloaders (nvtboot, +CBoot for example on Nano). Instead of doing that in claim_bus, which +gets called a lot, moved clock setting to probe(), and set tap delays +there, too. Also updated clock to 80MHz to match CBoot. Now QSPI env +save works reliably again. + +Signed-off-by: Tom Warren +--- + Changes in v2: + - None + + drivers/spi/tegra210_qspi.c | 19 ++++++++++++------- + 1 file changed, 12 insertions(+), 7 deletions(-) + +diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c +index 2a77126..4284ea9 100644 +--- a/drivers/spi/tegra210_qspi.c ++++ b/drivers/spi/tegra210_qspi.c +@@ -42,10 +42,10 @@ DECLARE_GLOBAL_DATA_PTR; + #define QSPI_CMD1_BITLEN_SHIFT 0 + + /* COMMAND2 */ +-#define QSPI_CMD2_TX_CLK_TAP_DELAY BIT(6) +-#define QSPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(11,6) +-#define QSPI_CMD2_RX_CLK_TAP_DELAY BIT(0) +-#define QSPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(5,0) ++#define QSPI_CMD2_TX_CLK_TAP_DELAY_SHIFT 10 ++#define QSPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(14,10) ++#define QSPI_CMD2_RX_CLK_TAP_DELAY_SHIFT 0 ++#define QSPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(7,0) + + /* TRANSFER STATUS */ + #define QSPI_XFER_STS_RDY BIT(30) +@@ -127,14 +127,22 @@ static int tegra210_qspi_probe(struct udevice *bus) + struct tegra210_qspi_priv *priv = dev_get_priv(bus); + + priv->regs = (struct qspi_regs *)plat->base; ++ struct qspi_regs *regs = priv->regs; + + priv->last_transaction_us = timer_get_us(); + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; + ++ debug("%s: Freq = %u, id = %d\n", __func__, priv->freq, priv->periph_id); + /* Change SPI clock to correct frequency, PLLP_OUT0 source */ + clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); + ++ /* Set tap delays here, clock change above resets QSPI controller */ ++ u32 reg = (0x09 << QSPI_CMD2_TX_CLK_TAP_DELAY_SHIFT) | ++ (0x0C << QSPI_CMD2_RX_CLK_TAP_DELAY_SHIFT); ++ writel(reg, ®s->command2); ++ debug("%s: COMMAND2 = %08x\n", __func__, readl(®s->command2)); ++ + return 0; + } + +@@ -144,9 +152,6 @@ static int tegra210_qspi_claim_bus(struct udevice *dev) + struct tegra210_qspi_priv *priv = dev_get_priv(bus); + struct qspi_regs *regs = priv->regs; + +- /* Change SPI clock to correct frequency, PLLP_OUT0 source */ +- clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); +- + debug("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); + + /* Set master mode and sw controlled CS */ + +From patchwork Thu Mar 26 22:42:02 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262406 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pKkb4wzBz9sRR + for ; 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Thu, 26 Mar 2020 15:42:02 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 3/3] qspi: t210: Use dev_read calls to get FDT data like + base, freq +Date: Thu, 26 Mar 2020 15:42:02 -0700 +Message-ID: <1585262522-6127-4-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +This Tegra QSPI driver hadn't been brought up to date with how +DM drivers are fetching data from the FDT now, and was pulling +in bogus data for base, max freq, etc. Fixed ofdata_to_platdata +to work the same way it does in the tegra114 SPI driver, using +dev_read_ functions. + +Signed-off-by: Tom Warren +--- + Changes in v2: + - New + + drivers/spi/tegra210_qspi.c | 10 ++++------ + 1 file changed, 4 insertions(+), 6 deletions(-) + +diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c +index 4284ea9..466d572 100644 +--- a/drivers/spi/tegra210_qspi.c ++++ b/drivers/spi/tegra210_qspi.c +@@ -2,7 +2,7 @@ + /* + * NVIDIA Tegra210 QSPI controller driver + * +- * (C) Copyright 2015-2019 NVIDIA Corporation ++ * (C) Copyright 2015-2020 NVIDIA Corporation + * + */ + +@@ -97,10 +97,8 @@ struct tegra210_qspi_priv { + static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus) + { + struct tegra_spi_platdata *plat = bus->platdata; +- const void *blob = gd->fdt_blob; +- int node = dev_of_offset(bus); + +- plat->base = devfdt_get_addr(bus); ++ plat->base = dev_read_addr(bus); + plat->periph_id = clock_decode_periph_id(bus); + + if (plat->periph_id == PERIPH_ID_NONE) { +@@ -110,9 +108,9 @@ static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus) + } + + /* Use 500KHz as a suitable default */ +- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", ++ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", + 500000); +- plat->deactivate_delay_us = fdtdec_get_int(blob, node, ++ plat->deactivate_delay_us = dev_read_u32_default(bus, + "spi-deactivate-delay", 0); + debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, diff --git a/t210-miscellaneous-patches.patch b/t210-miscellaneous-patches.patch new file mode 100644 index 0000000..ec41c55 --- /dev/null +++ b/t210-miscellaneous-patches.patch @@ -0,0 +1,2026 @@ +From patchwork Thu Mar 26 23:10:09 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262431 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pLLj2Nttz9sSL + for ; + Fri, 27 Mar 2020 10:10:37 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 67ACD818A2; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 16:08:35 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 16:10:07 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 16:10:07 -0700 +Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 23:10:07 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 23:10:07 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 16:10:06 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 1/3] t210: do not enable PLLE and UPHY PLL HW PWRSEQ +Date: Thu, 26 Mar 2020 16:10:09 -0700 +Message-ID: <1585264211-13739-2-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: JC Kuo + +This commit removes the programming sequence that enables PLLE and UPHY +PLL hardware power sequencers. Per TRM, boot software should enable PLLE +and UPHY PLLs in software controlled power-on state and should power +down PLL before jumping into kernel or the next stage boot software. + +Adds call to board_cleanup_before_linux to facilitate this. + +Signed-off-by: JC Kuo +Signed-off-by: Tom Warren +Acked-by: Stephen Warren +--- + arch/arm/cpu/armv8/cpu.c | 5 ++ + arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + + arch/arm/mach-tegra/board2.c | 6 +++ + arch/arm/mach-tegra/tegra210/clock.c | 19 -------- + arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 +++++++++++++++++---------- + arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ + 6 files changed, 59 insertions(+), 44 deletions(-) + +diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c +index 2467e0b..3575203 100644 +--- a/arch/arm/cpu/armv8/cpu.c ++++ b/arch/arm/cpu/armv8/cpu.c +@@ -32,6 +32,8 @@ void sdelay(unsigned long loops) + "b.ne 1b" : "=r" (loops) : "0"(loops) : "cc"); + } + ++void __weak board_cleanup_before_linux(void){} ++ + int cleanup_before_linux(void) + { + /* +@@ -40,6 +42,9 @@ int cleanup_before_linux(void) + * + * disable interrupt and turn off caches etc ... + */ ++ ++ board_cleanup_before_linux(); ++ + disable_interrupts(); + + /* +diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h +index deccdf4..7e14d81 100644 +--- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h ++++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h +@@ -16,6 +16,7 @@ struct tegra_xusb_phy; + struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type); + + void tegra_xusb_padctl_init(void); ++void tegra_xusb_padctl_exit(void); + int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy); + int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy); + int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy); +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index d3497a2..787ff97 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -181,6 +181,12 @@ int board_init(void) + return nvidia_board_init(); + } + ++void board_cleanup_before_linux(void) ++{ ++ /* power down UPHY PLL */ ++ tegra_xusb_padctl_exit(); ++} ++ + #ifdef CONFIG_BOARD_EARLY_INIT_F + static void __gpio_early_init(void) + { +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index b240860..f1b25e2 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -1235,25 +1235,6 @@ int tegra_plle_enable(void) + value &= ~PLLE_SS_CNTL_INTERP_RESET; + writel(value, NV_PA_CLK_RST_BASE + PLLE_SS_CNTL); + +- /* 7. Enable HW power sequencer for PLLE */ +- +- value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); +- value &= ~PLLE_MISC_IDDQ_SWCTL; +- writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); +- +- value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); +- value &= ~PLLE_AUX_SS_SWCTL; +- value &= ~PLLE_AUX_ENABLE_SWCTL; +- value |= PLLE_AUX_SS_SEQ_INCLUDE; +- value |= PLLE_AUX_USE_LOCKDET; +- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); +- +- /* 8. Wait 1 us */ +- +- udelay(1); +- value |= PLLE_AUX_SEQ_ENABLE; +- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); +- + return 0; + } + +diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c +index ab6684f..64dc297 100644 +--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c ++++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c +@@ -170,6 +170,17 @@ static int phy_unprepare(struct tegra_xusb_phy *phy) + return tegra_xusb_padctl_disable(phy->padctl); + } + ++#define XUSB_PADCTL_USB3_PAD_MUX 0x28 ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE (1 << 0) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 (1 << 1) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 (1 << 2) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 (1 << 3) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 (1 << 4) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 (1 << 5) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 (1 << 6) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 (1 << 7) ++#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 (1 << 8) ++ + #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 + #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK (0xff << 20) + #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(x) (((x) & 0xff) << 20) +@@ -366,31 +377,6 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + +- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); +- value &= ~CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; +- value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL; +- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET; +- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ; +- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); +- +- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); +- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD; +- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); +- +- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); +- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD; +- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); +- +- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); +- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; +- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); +- +- udelay(1); +- +- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); +- value |= CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE; +- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); +- + debug("< %s()\n", __func__); + return 0; + } +@@ -454,3 +440,35 @@ void tegra_xusb_padctl_init(void) + ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata); + debug("%s: done, ret=%d\n", __func__, ret); + } ++ ++void tegra_xusb_padctl_exit(void) ++{ ++ u32 value; ++ ++ debug("> %s\n", __func__); ++ ++ value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX); ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6; ++ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0; ++ padctl_writel(&padctl, value, XUSB_PADCTL_USB3_PAD_MUX); ++ ++ value = padctl_readl(&padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); ++ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ; ++ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK; ++ value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(3); ++ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE; ++ padctl_writel(&padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); ++ ++ reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1); ++ while (padctl.enable) ++ tegra_xusb_padctl_disable(&padctl); ++ ++ debug("< %s()\n", __func__); ++} +diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c +index 3ec27a2..f2d9030 100644 +--- a/arch/arm/mach-tegra/xusb-padctl-dummy.c ++++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c +@@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy) + void __weak tegra_xusb_padctl_init(void) + { + } ++ ++void __weak tegra_xusb_padctl_exit(void) ++{ ++} + +From patchwork Thu Mar 26 23:10:10 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262432 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pLLv1LHNz9sSH + for ; + Fri, 27 Mar 2020 10:10:47 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 78C138188A; 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+ spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 16:09:54 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 16:10:08 -0700 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 16:10:08 -0700 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 23:10:07 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 23:10:07 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 16:10:07 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 2/3] t210: Adjust ramdisk_addr_r/fdt_addr_r to allow for + large kernels +Date: Thu, 26 Mar 2020 16:10:10 -0700 +Message-ID: <1585264211-13739-3-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +The L4T kernel is 32MB+, and can overwrite the ramdisk/fdt loaded +from extlinux.conf. Adjust the load addresses to fix this for now. +Using the calculated_env addresses table from T186 U-Boot is a +better fix, but it isn't working correctly on T210 U-Boot right now, +so this will do until I can fix it. + +Signed-off-by: Tom Warren +--- + include/configs/tegra210-common.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h +index 1c53311..1b8e94b 100644 +--- a/include/configs/tegra210-common.h ++++ b/include/configs/tegra210-common.h +@@ -46,8 +46,8 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ +- "fdt_addr_r=0x82000000\0" \ +- "ramdisk_addr_r=0x82100000\0" ++ "fdt_addr_r=0x83000000\0" \ ++ "ramdisk_addr_r=0x83200000\0" + + /* For USB EHCI controller */ + #define CONFIG_EHCI_IS_TDI + +From patchwork Thu Mar 26 23:10:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tom Warren +X-Patchwork-Id: 1262433 +X-Patchwork-Delegate: twarren@nvidia.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=gmail.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 48pLM80QC1z9sSL + for ; + Fri, 27 Mar 2020 10:10:59 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id F404281888; + Fri, 27 Mar 2020 00:10:56 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 9953D81888; Fri, 27 Mar 2020 00:10:33 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=BAYES_00, + DKIM_ADSP_CUSTOM_MED, + FORGED_GMAIL_RCVD,FREEMAIL_FROM,NML_ADSP_CUSTOM_MED,SPF_HELO_NONE, + UPPERCASE_75_100,URIBL_BLOCKED autolearn=no autolearn_force=no + version=3.4.2 +Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com + [216.228.121.65]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 + bits)) (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id B819481843 + for ; Fri, 27 Mar 2020 00:10:10 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=tomcwarren3959@gmail.com +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Thu, 26 Mar 2020 16:09:55 -0700 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Thu, 26 Mar 2020 16:10:09 -0700 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 16:10:09 -0700 +Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Thu, 26 Mar 2020 23:10:08 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Thu, 26 Mar 2020 23:10:08 +0000 +Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Thu, 26 Mar 2020 16:10:08 -0700 +From: +To: +CC: , , , + , +Subject: [PATCH 3/3] t210: pinmux: Remove pinmux/GPIO init from T210 boards +Date: Thu, 26 Mar 2020 16:10:11 -0700 +Message-ID: <1585264211-13739-4-git-send-email-tomcwarren3959@gmail.com> +X-Mailer: git-send-email 1.8.2.1.610.g562af5b +In-Reply-To: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +References: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Tom Warren + +T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB +tables. Remove pinmux/GPIO init tables & code from all T210-based builds +below: + +p2371-2180 aka TX1 +p2371-0000 +e2220-1170 +p2571 + +Signed-off-by: Tom Warren +Acked-by: Stephen Warren +--- + arch/arm/mach-tegra/tegra210/Makefile | 3 +- + arch/arm/mach-tegra/tegra210/pinmux.c | 194 -------------- + board/nvidia/e2220-1170/e2220-1170.c | 21 +- + board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 276 -------------------- + board/nvidia/p2371-0000/p2371-0000.c | 21 +- + board/nvidia/p2371-0000/pinmux-config-p2371-0000.h | 267 -------------------- + board/nvidia/p2371-2180/p2371-2180.c | 21 +- + board/nvidia/p2371-2180/pinmux-config-p2371-2180.h | 278 --------------------- + board/nvidia/p2571/p2571.c | 21 +- + board/nvidia/p2571/pinmux-config-p2571.h | 242 ------------------ + 10 files changed, 5 insertions(+), 1339 deletions(-) + delete mode 100644 arch/arm/mach-tegra/tegra210/pinmux.c + delete mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h + delete mode 100644 board/nvidia/p2371-0000/pinmux-config-p2371-0000.h + delete mode 100644 board/nvidia/p2371-2180/pinmux-config-p2371-2180.h + delete mode 100644 board/nvidia/p2571/pinmux-config-p2571.h + +diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile +index b6012fc..cfcba5b 100644 +--- a/arch/arm/mach-tegra/tegra210/Makefile ++++ b/arch/arm/mach-tegra/tegra210/Makefile +@@ -1,5 +1,5 @@ + # +-# (C) Copyright 2013-2015 ++# (C) Copyright 2013-2020 + # NVIDIA Corporation + # + # SPDX-License-Identifier: GPL-2.0+ +@@ -7,6 +7,5 @@ + + obj-y += clock.o + obj-y += funcmux.o +-obj-y += pinmux.o + obj-y += xusb-padctl.o + obj-y += ../xusb-padctl-common.o +diff --git a/arch/arm/mach-tegra/tegra210/pinmux.c b/arch/arm/mach-tegra/tegra210/pinmux.c +deleted file mode 100644 +index 6158099..0000000 +--- a/arch/arm/mach-tegra/tegra210/pinmux.c ++++ /dev/null +@@ -1,194 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#include +-#include +-#include +- +-#define PIN(pin, f0, f1, f2, f3) \ +- { \ +- .funcs = { \ +- PMUX_FUNC_##f0, \ +- PMUX_FUNC_##f1, \ +- PMUX_FUNC_##f2, \ +- PMUX_FUNC_##f3, \ +- }, \ +- } +- +-#define PIN_RESERVED {} +- +-static const struct pmux_pingrp_desc tegra210_pingroups[] = { +- /* pin, f0, f1, f2, f3 */ +- /* Offset 0x3000 */ +- PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3), +- PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3), +- PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3), +- PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3), +- PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3), +- PIN_RESERVED, +- /* Offset 0x301c */ +- PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC3_DAT1_PP4, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC3_DAT2_PP3, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(SDMMC3_DAT3_PP2, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN_RESERVED, +- /* Offset 0x3038 */ +- PIN(PEX_L0_RST_N_PA0, PE0, RSVD1, RSVD2, RSVD3), +- PIN(PEX_L0_CLKREQ_N_PA1, PE0, RSVD1, RSVD2, RSVD3), +- PIN(PEX_WAKE_N_PA2, PE, RSVD1, RSVD2, RSVD3), +- PIN(PEX_L1_RST_N_PA3, PE1, RSVD1, RSVD2, RSVD3), +- PIN(PEX_L1_CLKREQ_N_PA4, PE1, RSVD1, RSVD2, RSVD3), +- PIN(SATA_LED_ACTIVE_PA5, SATA, RSVD1, RSVD2, RSVD3), +- PIN(SPI1_MOSI_PC0, SPI1, RSVD1, RSVD2, RSVD3), +- PIN(SPI1_MISO_PC1, SPI1, RSVD1, RSVD2, RSVD3), +- PIN(SPI1_SCK_PC2, SPI1, RSVD1, RSVD2, RSVD3), +- PIN(SPI1_CS0_PC3, SPI1, RSVD1, RSVD2, RSVD3), +- PIN(SPI1_CS1_PC4, SPI1, RSVD1, RSVD2, RSVD3), +- PIN(SPI2_MOSI_PB4, SPI2, DTV, RSVD2, RSVD3), +- PIN(SPI2_MISO_PB5, SPI2, DTV, RSVD2, RSVD3), +- PIN(SPI2_SCK_PB6, SPI2, DTV, RSVD2, RSVD3), +- PIN(SPI2_CS0_PB7, SPI2, DTV, RSVD2, RSVD3), +- PIN(SPI2_CS1_PDD0, SPI2, RSVD1, RSVD2, RSVD3), +- PIN(SPI4_MOSI_PC7, SPI4, RSVD1, RSVD2, RSVD3), +- PIN(SPI4_MISO_PD0, SPI4, RSVD1, RSVD2, RSVD3), +- PIN(SPI4_SCK_PC5, SPI4, RSVD1, RSVD2, RSVD3), +- PIN(SPI4_CS0_PC6, SPI4, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_SCK_PEE0, QSPI, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_CS_N_PEE1, QSPI, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_IO0_PEE2, QSPI, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_IO1_PEE3, QSPI, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_IO2_PEE4, QSPI, RSVD1, RSVD2, RSVD3), +- PIN(QSPI_IO3_PEE5, QSPI, RSVD1, RSVD2, RSVD3), +- PIN_RESERVED, +- /* Offset 0x30a4 */ +- PIN(DMIC1_CLK_PE0, DMIC1, I2S3, RSVD2, RSVD3), +- PIN(DMIC1_DAT_PE1, DMIC1, I2S3, RSVD2, RSVD3), +- PIN(DMIC2_CLK_PE2, DMIC2, I2S3, RSVD2, RSVD3), +- PIN(DMIC2_DAT_PE3, DMIC2, I2S3, RSVD2, RSVD3), +- PIN(DMIC3_CLK_PE4, DMIC3, I2S5A, RSVD2, RSVD3), +- PIN(DMIC3_DAT_PE5, DMIC3, I2S5A, RSVD2, RSVD3), +- PIN(GEN1_I2C_SCL_PJ1, I2C1, RSVD1, RSVD2, RSVD3), +- PIN(GEN1_I2C_SDA_PJ0, I2C1, RSVD1, RSVD2, RSVD3), +- PIN(GEN2_I2C_SCL_PJ2, I2C2, RSVD1, RSVD2, RSVD3), +- PIN(GEN2_I2C_SDA_PJ3, I2C2, RSVD1, RSVD2, RSVD3), +- PIN(GEN3_I2C_SCL_PF0, I2C3, RSVD1, RSVD2, RSVD3), +- PIN(GEN3_I2C_SDA_PF1, I2C3, RSVD1, RSVD2, RSVD3), +- PIN(CAM_I2C_SCL_PS2, I2C3, I2CVI, RSVD2, RSVD3), +- PIN(CAM_I2C_SDA_PS3, I2C3, I2CVI, RSVD2, RSVD3), +- PIN(PWR_I2C_SCL_PY3, I2CPMU, RSVD1, RSVD2, RSVD3), +- PIN(PWR_I2C_SDA_PY4, I2CPMU, RSVD1, RSVD2, RSVD3), +- PIN(UART1_TX_PU0, UARTA, RSVD1, RSVD2, RSVD3), +- PIN(UART1_RX_PU1, UARTA, RSVD1, RSVD2, RSVD3), +- PIN(UART1_RTS_PU2, UARTA, RSVD1, RSVD2, RSVD3), +- PIN(UART1_CTS_PU3, UARTA, RSVD1, RSVD2, RSVD3), +- PIN(UART2_TX_PG0, UARTB, I2S4A, SPDIF, UART), +- PIN(UART2_RX_PG1, UARTB, I2S4A, SPDIF, UART), +- PIN(UART2_RTS_PG2, UARTB, I2S4A, RSVD2, UART), +- PIN(UART2_CTS_PG3, UARTB, I2S4A, RSVD2, UART), +- PIN(UART3_TX_PD1, UARTC, SPI4, RSVD2, RSVD3), +- PIN(UART3_RX_PD2, UARTC, SPI4, RSVD2, RSVD3), +- PIN(UART3_RTS_PD3, UARTC, SPI4, RSVD2, RSVD3), +- PIN(UART3_CTS_PD4, UARTC, SPI4, RSVD2, RSVD3), +- PIN(UART4_TX_PI4, UARTD, UART, RSVD2, RSVD3), +- PIN(UART4_RX_PI5, UARTD, UART, RSVD2, RSVD3), +- PIN(UART4_RTS_PI6, UARTD, UART, RSVD2, RSVD3), +- PIN(UART4_CTS_PI7, UARTD, UART, RSVD2, RSVD3), +- PIN(DAP1_FS_PB0, I2S1, RSVD1, RSVD2, RSVD3), +- PIN(DAP1_DIN_PB1, I2S1, RSVD1, RSVD2, RSVD3), +- PIN(DAP1_DOUT_PB2, I2S1, RSVD1, RSVD2, RSVD3), +- PIN(DAP1_SCLK_PB3, I2S1, RSVD1, RSVD2, RSVD3), +- PIN(DAP2_FS_PAA0, I2S2, RSVD1, RSVD2, RSVD3), +- PIN(DAP2_DIN_PAA2, I2S2, RSVD1, RSVD2, RSVD3), +- PIN(DAP2_DOUT_PAA3, I2S2, RSVD1, RSVD2, RSVD3), +- PIN(DAP2_SCLK_PAA1, I2S2, RSVD1, RSVD2, RSVD3), +- PIN(DAP4_FS_PJ4, I2S4B, RSVD1, RSVD2, RSVD3), +- PIN(DAP4_DIN_PJ5, I2S4B, RSVD1, RSVD2, RSVD3), +- PIN(DAP4_DOUT_PJ6, I2S4B, RSVD1, RSVD2, RSVD3), +- PIN(DAP4_SCLK_PJ7, I2S4B, RSVD1, RSVD2, RSVD3), +- PIN(CAM1_MCLK_PS0, EXTPERIPH3, RSVD1, RSVD2, RSVD3), +- PIN(CAM2_MCLK_PS1, EXTPERIPH3, RSVD1, RSVD2, RSVD3), +- PIN(JTAG_RTCK, JTAG, RSVD1, RSVD2, RSVD3), +- PIN(CLK_32K_IN, CLK, RSVD1, RSVD2, RSVD3), +- PIN(CLK_32K_OUT_PY5, SOC, BLINK, RSVD2, RSVD3), +- PIN(BATT_BCL, BCL, RSVD1, RSVD2, RSVD3), +- PIN(CLK_REQ, SYS, RSVD1, RSVD2, RSVD3), +- PIN(CPU_PWR_REQ, CPU, RSVD1, RSVD2, RSVD3), +- PIN(PWR_INT_N, PMI, RSVD1, RSVD2, RSVD3), +- PIN(SHUTDOWN, SHUTDOWN, RSVD1, RSVD2, RSVD3), +- PIN(CORE_PWR_REQ, CORE, RSVD1, RSVD2, RSVD3), +- PIN(AUD_MCLK_PBB0, AUD, RSVD1, RSVD2, RSVD3), +- PIN(DVFS_PWM_PBB1, RSVD0, CLDVFS, SPI3, RSVD3), +- PIN(DVFS_CLK_PBB2, RSVD0, CLDVFS, SPI3, RSVD3), +- PIN(GPIO_X1_AUD_PBB3, RSVD0, RSVD1, SPI3, RSVD3), +- PIN(GPIO_X3_AUD_PBB4, RSVD0, RSVD1, SPI3, RSVD3), +- PIN(PCC7, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(HDMI_CEC_PCC0, CEC, RSVD1, RSVD2, RSVD3), +- PIN(HDMI_INT_DP_HPD_PCC1, DP, RSVD1, RSVD2, RSVD3), +- PIN(SPDIF_OUT_PCC2, SPDIF, RSVD1, RSVD2, RSVD3), +- PIN(SPDIF_IN_PCC3, SPDIF, RSVD1, RSVD2, RSVD3), +- PIN(USB_VBUS_EN0_PCC4, USB, RSVD1, RSVD2, RSVD3), +- PIN(USB_VBUS_EN1_PCC5, USB, RSVD1, RSVD2, RSVD3), +- PIN(DP_HPD0_PCC6, DP, RSVD1, RSVD2, RSVD3), +- PIN(WIFI_EN_PH0, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(WIFI_RST_PH1, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(WIFI_WAKE_AP_PH2, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(AP_WAKE_BT_PH3, RSVD0, UARTB, SPDIF, RSVD3), +- PIN(BT_RST_PH4, RSVD0, UARTB, SPDIF, RSVD3), +- PIN(BT_WAKE_AP_PH5, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(AP_WAKE_NFC_PH7, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(NFC_EN_PI0, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(NFC_INT_PI1, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(GPS_EN_PI2, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(GPS_RST_PI3, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(CAM_RST_PS4, VGP1, RSVD1, RSVD2, RSVD3), +- PIN(CAM_AF_EN_PS5, VIMCLK, VGP2, RSVD2, RSVD3), +- PIN(CAM_FLASH_EN_PS6, VIMCLK, VGP3, RSVD2, RSVD3), +- PIN(CAM1_PWDN_PS7, VGP4, RSVD1, RSVD2, RSVD3), +- PIN(CAM2_PWDN_PT0, VGP5, RSVD1, RSVD2, RSVD3), +- PIN(CAM1_STROBE_PT1, VGP6, RSVD1, RSVD2, RSVD3), +- PIN(LCD_TE_PY2, DISPLAYA, RSVD1, RSVD2, RSVD3), +- PIN(LCD_BL_PWM_PV0, DISPLAYA, PWM0, SOR0, RSVD3), +- PIN(LCD_BL_EN_PV1, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(LCD_RST_PV2, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(LCD_GPIO1_PV3, DISPLAYB, RSVD1, RSVD2, RSVD3), +- PIN(LCD_GPIO2_PV4, DISPLAYB, PWM1, RSVD2, SOR1), +- PIN(AP_READY_PV5, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(TOUCH_RST_PV6, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(TOUCH_CLK_PV7, TOUCH, RSVD1, RSVD2, RSVD3), +- PIN(MODEM_WAKE_AP_PX0, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(TOUCH_INT_PX1, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(MOTION_INT_PX2, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(ALS_PROX_INT_PX3, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(TEMP_ALERT_PX4, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(BUTTON_POWER_ON_PX5, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(BUTTON_VOL_UP_PX6, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(BUTTON_VOL_DOWN_PX7, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(BUTTON_SLIDE_SW_PY0, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(BUTTON_HOME_PY1, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(PA6, SATA, RSVD1, RSVD2, RSVD3), +- PIN(PE6, RSVD0, I2S5A, PWM2, RSVD3), +- PIN(PE7, RSVD0, I2S5A, PWM3, RSVD3), +- PIN(PH6, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(PK0, IQC0, I2S5B, RSVD2, RSVD3), +- PIN(PK1, IQC0, I2S5B, RSVD2, RSVD3), +- PIN(PK2, IQC0, I2S5B, RSVD2, RSVD3), +- PIN(PK3, IQC0, I2S5B, RSVD2, RSVD3), +- PIN(PK4, IQC1, RSVD1, RSVD2, RSVD3), +- PIN(PK5, IQC1, RSVD1, RSVD2, RSVD3), +- PIN(PK6, IQC1, RSVD1, RSVD2, RSVD3), +- PIN(PK7, IQC1, RSVD1, RSVD2, RSVD3), +- PIN(PL0, RSVD0, RSVD1, RSVD2, RSVD3), +- PIN(PL1, SOC, RSVD1, RSVD2, RSVD3), +- PIN(PZ0, VIMCLK2, RSVD1, RSVD2, RSVD3), +- PIN(PZ1, VIMCLK2, SDMMC1, RSVD2, RSVD3), +- PIN(PZ2, SDMMC3, CCLA, RSVD2, RSVD3), +- PIN(PZ3, SDMMC3, RSVD1, RSVD2, RSVD3), +- PIN(PZ4, SDMMC1, RSVD1, RSVD2, RSVD3), +- PIN(PZ5, SOC, RSVD1, RSVD2, RSVD3), +-}; +-const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra210_pingroups; +diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c +index 8baaf2c..5aac040 100644 +--- a/board/nvidia/e2220-1170/e2220-1170.c ++++ b/board/nvidia/e2220-1170/e2220-1170.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * (C) Copyright 2013-2015 ++ * (C) Copyright 2013-2019 + * NVIDIA Corporation + */ + +@@ -9,7 +9,6 @@ + #include + #include + #include "../p2571/max77620_init.h" +-#include "pinmux-config-e2220-1170.h" + + void pin_mux_mmc(void) + { +@@ -30,21 +29,3 @@ void pin_mux_mmc(void) + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); + } +- +-/* +- * Routine: pinmux_init +- * Description: Do individual peripheral pinmux configs +- */ +-void pinmux_init(void) +-{ +- pinmux_clear_tristate_input_clamping(); +- +- gpio_config_table(e2220_1170_gpio_inits, +- ARRAY_SIZE(e2220_1170_gpio_inits)); +- +- pinmux_config_pingrp_table(e2220_1170_pingrps, +- ARRAY_SIZE(e2220_1170_pingrps)); +- +- pinmux_config_drvgrp_table(e2220_1170_drvgrps, +- ARRAY_SIZE(e2220_1170_drvgrps)); +-} +diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h +deleted file mode 100644 +index 14bbfbf..0000000 +--- a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h ++++ /dev/null +@@ -1,276 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +- */ +- +-/* +- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! +- * +- * To generate this file, use the tegra-pinmux-scripts tool available from +- * https://github.com/NVIDIA/tegra-pinmux-scripts +- * Run "board-to-uboot.py e2220-1170". +- */ +- +-#ifndef _PINMUX_CONFIG_E2220_1170_H_ +-#define _PINMUX_CONFIG_E2220_1170_H_ +- +-#define GPIO_INIT(_port, _gpio, _init) \ +- { \ +- .gpio = TEGRA_GPIO(_port, _gpio), \ +- .init = TEGRA_GPIO_INIT_##_init, \ +- } +- +-static const struct tegra_gpio_config e2220_1170_gpio_inits[] = { +- /* port, pin, init_val */ +- GPIO_INIT(A, 5, IN), +- GPIO_INIT(A, 6, IN), +- GPIO_INIT(B, 4, IN), +- GPIO_INIT(E, 6, IN), +- GPIO_INIT(G, 2, OUT0), +- GPIO_INIT(G, 3, OUT0), +- GPIO_INIT(H, 0, OUT0), +- GPIO_INIT(H, 1, OUT0), +- GPIO_INIT(H, 2, IN), +- GPIO_INIT(H, 3, OUT0), +- GPIO_INIT(H, 4, OUT0), +- GPIO_INIT(H, 5, IN), +- GPIO_INIT(H, 6, OUT0), +- GPIO_INIT(H, 7, OUT0), +- GPIO_INIT(I, 0, OUT0), +- GPIO_INIT(I, 1, IN), +- GPIO_INIT(I, 2, OUT0), +- GPIO_INIT(I, 3, OUT0), +- GPIO_INIT(K, 0, IN), +- GPIO_INIT(K, 1, OUT0), +- GPIO_INIT(K, 2, OUT0), +- GPIO_INIT(K, 3, OUT0), +- GPIO_INIT(K, 4, IN), +- GPIO_INIT(K, 5, OUT0), +- GPIO_INIT(K, 6, IN), +- GPIO_INIT(K, 7, OUT0), +- GPIO_INIT(L, 0, OUT0), +- GPIO_INIT(S, 4, OUT0), +- GPIO_INIT(S, 5, OUT0), +- GPIO_INIT(S, 6, OUT0), +- GPIO_INIT(S, 7, OUT0), +- GPIO_INIT(T, 0, OUT0), +- GPIO_INIT(T, 1, OUT0), +- GPIO_INIT(V, 1, OUT0), +- GPIO_INIT(V, 2, OUT0), +- GPIO_INIT(V, 3, IN), +- GPIO_INIT(V, 5, OUT0), +- GPIO_INIT(V, 6, OUT0), +- GPIO_INIT(X, 0, IN), +- GPIO_INIT(X, 1, IN), +- GPIO_INIT(X, 2, IN), +- GPIO_INIT(X, 3, IN), +- GPIO_INIT(X, 4, IN), +- GPIO_INIT(X, 5, IN), +- GPIO_INIT(X, 6, IN), +- GPIO_INIT(X, 7, IN), +- GPIO_INIT(Y, 0, IN), +- GPIO_INIT(Y, 1, IN), +- GPIO_INIT(Z, 0, IN), +- GPIO_INIT(Z, 4, OUT0), +- GPIO_INIT(BB, 2, OUT0), +- GPIO_INIT(BB, 3, OUT0), +- GPIO_INIT(BB, 4, IN), +- GPIO_INIT(CC, 1, IN), +- GPIO_INIT(CC, 5, OUT0), +- GPIO_INIT(CC, 6, IN), +- GPIO_INIT(CC, 7, OUT0), +-}; +- +-#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ +- { \ +- .pingrp = PMUX_PINGRP_##_pingrp, \ +- .func = PMUX_FUNC_##_mux, \ +- .pull = PMUX_PULL_##_pull, \ +- .tristate = PMUX_TRI_##_tri, \ +- .io = PMUX_PIN_##_io, \ +- .od = PMUX_PIN_OD_##_od, \ +- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ +- .lock = PMUX_PIN_LOCK_DEFAULT, \ +- } +- +-static const struct pmux_pingrp_config e2220_1170_pingrps[] = { +- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ +- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), +- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), +- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), +- PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), +- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +-}; +- +-#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +- { \ +- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ +- .slwf = _slwf, \ +- .slwr = _slwr, \ +- .drvup = _drvup, \ +- .drvdn = _drvdn, \ +- .lpmd = PMUX_LPMD_##_lpmd, \ +- .schmt = PMUX_SCHMT_##_schmt, \ +- .hsm = PMUX_HSM_##_hsm, \ +- } +- +-static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { +-}; +- +-#endif /* PINMUX_CONFIG_E2220_1170_H */ +diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c +index e0c907b..5aac040 100644 +--- a/board/nvidia/p2371-0000/p2371-0000.c ++++ b/board/nvidia/p2371-0000/p2371-0000.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * (C) Copyright 2013-2015 ++ * (C) Copyright 2013-2019 + * NVIDIA Corporation + */ + +@@ -9,7 +9,6 @@ + #include + #include + #include "../p2571/max77620_init.h" +-#include "pinmux-config-p2371-0000.h" + + void pin_mux_mmc(void) + { +@@ -30,21 +29,3 @@ void pin_mux_mmc(void) + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); + } +- +-/* +- * Routine: pinmux_init +- * Description: Do individual peripheral pinmux configs +- */ +-void pinmux_init(void) +-{ +- pinmux_clear_tristate_input_clamping(); +- +- gpio_config_table(p2371_0000_gpio_inits, +- ARRAY_SIZE(p2371_0000_gpio_inits)); +- +- pinmux_config_pingrp_table(p2371_0000_pingrps, +- ARRAY_SIZE(p2371_0000_pingrps)); +- +- pinmux_config_drvgrp_table(p2371_0000_drvgrps, +- ARRAY_SIZE(p2371_0000_drvgrps)); +-} +diff --git a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h +deleted file mode 100644 +index aa5d7f9..0000000 +--- a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h ++++ /dev/null +@@ -1,267 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +- */ +- +-/* +- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! +- * +- * To generate this file, use the tegra-pinmux-scripts tool available from +- * https://github.com/NVIDIA/tegra-pinmux-scripts +- * Run "board-to-uboot.py p2371-0000". +- */ +- +-#ifndef _PINMUX_CONFIG_P2371_0000_H_ +-#define _PINMUX_CONFIG_P2371_0000_H_ +- +-#define GPIO_INIT(_port, _gpio, _init) \ +- { \ +- .gpio = TEGRA_GPIO(_port, _gpio), \ +- .init = TEGRA_GPIO_INIT_##_init, \ +- } +- +-static const struct tegra_gpio_config p2371_0000_gpio_inits[] = { +- /* port, pin, init_val */ +- GPIO_INIT(A, 5, IN), +- GPIO_INIT(E, 4, OUT0), +- GPIO_INIT(E, 6, IN), +- GPIO_INIT(G, 0, IN), +- GPIO_INIT(G, 3, OUT0), +- GPIO_INIT(H, 0, OUT0), +- GPIO_INIT(H, 2, IN), +- GPIO_INIT(H, 3, OUT0), +- GPIO_INIT(H, 4, OUT0), +- GPIO_INIT(H, 5, IN), +- GPIO_INIT(H, 6, OUT0), +- GPIO_INIT(H, 7, OUT0), +- GPIO_INIT(I, 0, OUT0), +- GPIO_INIT(I, 1, IN), +- GPIO_INIT(I, 2, OUT0), +- GPIO_INIT(I, 3, OUT0), +- GPIO_INIT(K, 4, IN), +- GPIO_INIT(K, 5, OUT0), +- GPIO_INIT(K, 6, IN), +- GPIO_INIT(K, 7, OUT0), +- GPIO_INIT(L, 0, OUT0), +- GPIO_INIT(S, 4, OUT0), +- GPIO_INIT(S, 5, OUT0), +- GPIO_INIT(S, 6, OUT0), +- GPIO_INIT(S, 7, OUT0), +- GPIO_INIT(T, 0, OUT0), +- GPIO_INIT(T, 1, OUT0), +- GPIO_INIT(V, 1, OUT0), +- GPIO_INIT(V, 2, OUT0), +- GPIO_INIT(V, 5, OUT0), +- GPIO_INIT(V, 6, OUT0), +- GPIO_INIT(V, 7, OUT1), +- GPIO_INIT(X, 0, IN), +- GPIO_INIT(X, 1, IN), +- GPIO_INIT(X, 2, IN), +- GPIO_INIT(X, 3, IN), +- GPIO_INIT(X, 4, IN), +- GPIO_INIT(X, 5, IN), +- GPIO_INIT(X, 6, IN), +- GPIO_INIT(X, 7, IN), +- GPIO_INIT(Y, 1, IN), +- GPIO_INIT(Z, 0, IN), +- GPIO_INIT(Z, 4, OUT0), +- GPIO_INIT(BB, 2, OUT0), +- GPIO_INIT(BB, 3, OUT0), +- GPIO_INIT(CC, 1, IN), +- GPIO_INIT(CC, 6, IN), +- GPIO_INIT(CC, 7, OUT0), +-}; +- +-#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ +- { \ +- .pingrp = PMUX_PINGRP_##_pingrp, \ +- .func = PMUX_FUNC_##_mux, \ +- .pull = PMUX_PULL_##_pull, \ +- .tristate = PMUX_TRI_##_tri, \ +- .io = PMUX_PIN_##_io, \ +- .od = PMUX_PIN_OD_##_od, \ +- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ +- .lock = PMUX_PIN_LOCK_DEFAULT, \ +- } +- +-static const struct pmux_pingrp_config p2371_0000_pingrps[] = { +- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ +- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), +- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), +- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MOSI_PC0, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MISO_PC1, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_SCK_PC2, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS0_PC3, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS1_PC4, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_DAT_PE1, DMIC1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_DAT_PE3, DMIC2, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK0, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK1, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK2, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK3, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_CLK_PV7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), +- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +-}; +- +-#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +- { \ +- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ +- .slwf = _slwf, \ +- .slwr = _slwr, \ +- .drvup = _drvup, \ +- .drvdn = _drvdn, \ +- .lpmd = PMUX_LPMD_##_lpmd, \ +- .schmt = PMUX_SCHMT_##_schmt, \ +- .hsm = PMUX_HSM_##_hsm, \ +- } +- +-static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = { +-}; +- +-#endif /* PINMUX_CONFIG_P2371_0000_H */ +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index fa5288b..1756bbc 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * (C) Copyright 2013-2015 ++ * (C) Copyright 2013-2019 + * NVIDIA Corporation + */ + +@@ -13,7 +13,6 @@ + #include + #include + #include "../p2571/max77620_init.h" +-#include "pinmux-config-p2371-2180.h" + + void pin_mux_mmc(void) + { +@@ -57,24 +56,6 @@ void pin_mux_mmc(void) + } + } + +-/* +- * Routine: pinmux_init +- * Description: Do individual peripheral pinmux configs +- */ +-void pinmux_init(void) +-{ +- pinmux_clear_tristate_input_clamping(); +- +- gpio_config_table(p2371_2180_gpio_inits, +- ARRAY_SIZE(p2371_2180_gpio_inits)); +- +- pinmux_config_pingrp_table(p2371_2180_pingrps, +- ARRAY_SIZE(p2371_2180_pingrps)); +- +- pinmux_config_drvgrp_table(p2371_2180_drvgrps, +- ARRAY_SIZE(p2371_2180_drvgrps)); +-} +- + #ifdef CONFIG_PCI_TEGRA + int tegra_pcie_board_init(void) + { +diff --git a/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h b/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h +deleted file mode 100644 +index d9abfa7..0000000 +--- a/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h ++++ /dev/null +@@ -1,278 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +- */ +- +-/* +- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! +- * +- * To generate this file, use the tegra-pinmux-scripts tool available from +- * https://github.com/NVIDIA/tegra-pinmux-scripts +- * Run "board-to-uboot.py p2371-2180". +- */ +- +-#ifndef _PINMUX_CONFIG_P2371_2180_H_ +-#define _PINMUX_CONFIG_P2371_2180_H_ +- +-#define GPIO_INIT(_port, _gpio, _init) \ +- { \ +- .gpio = TEGRA_GPIO(_port, _gpio), \ +- .init = TEGRA_GPIO_INIT_##_init, \ +- } +- +-static const struct tegra_gpio_config p2371_2180_gpio_inits[] = { +- /* port, pin, init_val */ +- GPIO_INIT(A, 5, IN), +- GPIO_INIT(B, 0, IN), +- GPIO_INIT(B, 1, IN), +- GPIO_INIT(B, 2, IN), +- GPIO_INIT(B, 3, IN), +- GPIO_INIT(C, 0, IN), +- GPIO_INIT(C, 1, IN), +- GPIO_INIT(C, 2, IN), +- GPIO_INIT(C, 3, IN), +- GPIO_INIT(C, 4, IN), +- GPIO_INIT(E, 4, IN), +- GPIO_INIT(E, 5, IN), +- GPIO_INIT(E, 6, IN), +- GPIO_INIT(H, 0, OUT0), +- GPIO_INIT(H, 1, OUT0), +- GPIO_INIT(H, 2, IN), +- GPIO_INIT(H, 3, OUT0), +- GPIO_INIT(H, 4, OUT0), +- GPIO_INIT(H, 5, IN), +- GPIO_INIT(H, 6, IN), +- GPIO_INIT(H, 7, IN), +- GPIO_INIT(I, 0, OUT0), +- GPIO_INIT(I, 1, IN), +- GPIO_INIT(I, 2, OUT0), +- GPIO_INIT(K, 4, IN), +- GPIO_INIT(K, 5, OUT0), +- GPIO_INIT(K, 6, IN), +- GPIO_INIT(K, 7, IN), +- GPIO_INIT(L, 1, IN), +- GPIO_INIT(S, 4, OUT0), +- GPIO_INIT(S, 5, OUT0), +- GPIO_INIT(S, 6, OUT0), +- GPIO_INIT(S, 7, OUT0), +- GPIO_INIT(T, 0, OUT0), +- GPIO_INIT(T, 1, OUT0), +- GPIO_INIT(U, 2, IN), +- GPIO_INIT(U, 3, IN), +- GPIO_INIT(V, 1, OUT0), +- GPIO_INIT(V, 2, OUT0), +- GPIO_INIT(V, 3, IN), +- GPIO_INIT(V, 5, OUT0), +- GPIO_INIT(V, 6, OUT0), +- GPIO_INIT(X, 0, IN), +- GPIO_INIT(X, 1, IN), +- GPIO_INIT(X, 2, IN), +- GPIO_INIT(X, 3, IN), +- GPIO_INIT(X, 4, IN), +- GPIO_INIT(X, 5, IN), +- GPIO_INIT(X, 6, IN), +- GPIO_INIT(X, 7, IN), +- GPIO_INIT(Y, 0, IN), +- GPIO_INIT(Y, 1, IN), +- GPIO_INIT(Z, 0, IN), +- GPIO_INIT(Z, 2, IN), +- GPIO_INIT(Z, 3, OUT0), +- GPIO_INIT(BB, 0, IN), +- GPIO_INIT(BB, 2, OUT0), +- GPIO_INIT(BB, 3, IN), +- GPIO_INIT(CC, 1, IN), +-}; +- +-#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ +- { \ +- .pingrp = PMUX_PINGRP_##_pingrp, \ +- .func = PMUX_FUNC_##_mux, \ +- .pull = PMUX_PULL_##_pull, \ +- .tristate = PMUX_TRI_##_tri, \ +- .io = PMUX_PIN_##_io, \ +- .od = PMUX_PIN_OD_##_od, \ +- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ +- .lock = PMUX_PIN_LOCK_DEFAULT, \ +- } +- +-static const struct pmux_pingrp_config p2371_2180_pingrps[] = { +- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ +- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), +- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), +- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PA6, SATA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_FS_PB0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DIN_PB1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DOUT_PB2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_SCLK_PB3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MOSI_PB4, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MISO_PB5, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_SCK_PB6, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_CS0_PB7, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_SCK_PC5, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_CS0_PC6, SPI4, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MOSI_PC7, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MISO_PD0, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_CLK_PE4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_DAT_PE5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RX_PG1, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RTS_PG2, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_CTS_PG3, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_INT_PI1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK0, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK1, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK2, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK3, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PK7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RTS_PU2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART1_CTS_PU3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO1_PV3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(ALS_PROX_INT_PX3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(DP_HPD0_PCC6, DP, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(SPI2_CS1_PDD0, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +-}; +- +-#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +- { \ +- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ +- .slwf = _slwf, \ +- .slwr = _slwr, \ +- .drvup = _drvup, \ +- .drvdn = _drvdn, \ +- .lpmd = PMUX_LPMD_##_lpmd, \ +- .schmt = PMUX_SCHMT_##_schmt, \ +- .hsm = PMUX_HSM_##_hsm, \ +- } +- +-static const struct pmux_drvgrp_config p2371_2180_drvgrps[] = { +-}; +- +-#endif /* PINMUX_CONFIG_P2371_2180_H */ +diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c +index dba3579..a9e4d21 100644 +--- a/board/nvidia/p2571/p2571.c ++++ b/board/nvidia/p2571/p2571.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * (C) Copyright 2013-2015 ++ * (C) Copyright 2013-2019 + * NVIDIA Corporation + */ + +@@ -10,7 +10,6 @@ + #include + #include + #include "max77620_init.h" +-#include "pinmux-config-p2571.h" + + void pin_mux_mmc(void) + { +@@ -33,24 +32,6 @@ void pin_mux_mmc(void) + } + + /* +- * Routine: pinmux_init +- * Description: Do individual peripheral pinmux configs +- */ +-void pinmux_init(void) +-{ +- pinmux_clear_tristate_input_clamping(); +- +- gpio_config_table(p2571_gpio_inits, +- ARRAY_SIZE(p2571_gpio_inits)); +- +- pinmux_config_pingrp_table(p2571_pingrps, +- ARRAY_SIZE(p2571_pingrps)); +- +- pinmux_config_drvgrp_table(p2571_drvgrps, +- ARRAY_SIZE(p2571_drvgrps)); +-} +- +-/* + * Routine: start_cpu_fan + * Description: Enable/start PWM CPU fan on P2571 + */ +diff --git a/board/nvidia/p2571/pinmux-config-p2571.h b/board/nvidia/p2571/pinmux-config-p2571.h +deleted file mode 100644 +index 04bb6ce..0000000 +--- a/board/nvidia/p2571/pinmux-config-p2571.h ++++ /dev/null +@@ -1,242 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +- */ +- +-/* +- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! +- * +- * To generate this file, use the tegra-pinmux-scripts tool available from +- * https://github.com/NVIDIA/tegra-pinmux-scripts +- * Run "board-to-uboot.py p2571". +- */ +- +-#ifndef _PINMUX_CONFIG_P2571_H_ +-#define _PINMUX_CONFIG_P2571_H_ +- +-#define GPIO_INIT(_port, _gpio, _init) \ +- { \ +- .gpio = TEGRA_GPIO(_port, _gpio), \ +- .init = TEGRA_GPIO_INIT_##_init, \ +- } +- +-static const struct tegra_gpio_config p2571_gpio_inits[] = { +- /* port, pin, init_val */ +- GPIO_INIT(A, 0, IN), +- GPIO_INIT(A, 5, IN), +- GPIO_INIT(D, 4, IN), +- GPIO_INIT(E, 4, OUT0), +- GPIO_INIT(G, 0, IN), +- GPIO_INIT(H, 0, OUT0), +- GPIO_INIT(H, 2, IN), +- GPIO_INIT(H, 3, OUT0), +- GPIO_INIT(H, 4, OUT0), +- GPIO_INIT(H, 5, IN), +- GPIO_INIT(I, 0, OUT0), +- GPIO_INIT(I, 1, IN), +- GPIO_INIT(V, 1, OUT0), +- GPIO_INIT(V, 6, OUT1), +- GPIO_INIT(X, 4, IN), +- GPIO_INIT(X, 6, IN), +- GPIO_INIT(X, 7, IN), +- GPIO_INIT(Y, 1, IN), +- GPIO_INIT(Z, 0, IN), +- GPIO_INIT(Z, 4, OUT0), +- GPIO_INIT(BB, 2, OUT0), +- GPIO_INIT(CC, 1, IN), +- GPIO_INIT(CC, 3, IN), +-}; +- +-#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ +- { \ +- .pingrp = PMUX_PINGRP_##_pingrp, \ +- .func = PMUX_FUNC_##_mux, \ +- .pull = PMUX_PULL_##_pull, \ +- .tristate = PMUX_TRI_##_tri, \ +- .io = PMUX_PIN_##_io, \ +- .od = PMUX_PIN_OD_##_od, \ +- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ +- .lock = PMUX_PIN_LOCK_DEFAULT, \ +- } +- +-static const struct pmux_pingrp_config p2571_pingrps[] = { +- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ +- PINCFG(PEX_L0_RST_N_PA0, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PEX_L0_CLKREQ_N_PA1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(PEX_WAKE_N_PA2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(PEX_L1_RST_N_PA3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(PEX_L1_CLKREQ_N_PA4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MOSI_PC0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_MISO_PC1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_SCK_PC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS0_PC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI1_CS1_PC4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_TX_PD1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RX_PD2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_RTS_PD3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART3_CTS_PD4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PE6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART2_CTS_PG3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PH6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_WAKE_NFC_PH7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GPS_EN_PI2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(DAP4_FS_PJ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DIN_PJ5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_DOUT_PJ6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DAP4_SCLK_PJ7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_MCLK_PS0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_MCLK_PS1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_AF_EN_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_PWDN_PS7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM2_PWDN_PT0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(ALS_PROX_INT_PX3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_POWER_ON_PX5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(LCD_TE_PY2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), +- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SPDIF_IN_PCC3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), +- PINCFG(DP_HPD0_PCC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), +- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), +- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +-}; +- +-#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +- { \ +- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ +- .slwf = _slwf, \ +- .slwr = _slwr, \ +- .drvup = _drvup, \ +- .drvdn = _drvdn, \ +- .lpmd = PMUX_LPMD_##_lpmd, \ +- .schmt = PMUX_SCHMT_##_schmt, \ +- .hsm = PMUX_HSM_##_hsm, \ +- } +- +-static const struct pmux_drvgrp_config p2571_drvgrps[] = { +-}; +- +-#endif /* PINMUX_CONFIG_P2571_H */ diff --git a/uboot-tools.spec b/uboot-tools.spec index 3832cea..f63ea95 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -24,8 +24,17 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch4: usb-kbd-fixes.patch Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch -Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch -Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch + +Patch10: mtd-spi-Add-Macronix-MX25U3235F-device.patch +Patch11: Misc-fixes-for-Tegra.patch +Patch12: mmc-t210-fix-autocal-and-400KHz-clock.patch +Patch13: qspi-t210-fix-claim_bus-and-clock-tap-delays.patch +Patch14: net-tegra-Misc-network-fixes.patch +Patch15: t210-miscellaneous-patches.patch +# http://patchwork.ozlabs.org/patch/1261582/ +Patch16: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +Patch17: arm-tegra-define-fdtfile-option-for-distro-boot.patch +Patch18: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch BuildRequires: bc BuildRequires: dtc @@ -249,6 +258,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %changelog * Tue Mar 31 2020 Peter Robinson 2020.04-0.6-rc4 - 2020.04 RC4 +- Updates for NVIDIA Jetson platforms * Thu Mar 26 2020 Peter Robinson 2020.04-0.5-rc3 - Fix ext4 alignment issue seen on some NXP i.MX devices From 70d667ee2990c5b7060620472fdeaaaaa436a8bf Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 1 Apr 2020 11:30:30 +0100 Subject: [PATCH 073/351] Support RNG for random seed for KASLR on some Rockchip devices --- ...kchip-rk3399-add-and-enable-rng-node.patch | 863 ++++++++++++++++++ ...nable-rng-on-rock960-and-firefly3399.patch | 108 +++ ...ader-enable-RNG-if-DM_RNG-is-enabled.patch | 31 + uboot-tools.spec | 7 + 4 files changed, 1009 insertions(+) create mode 100644 arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch create mode 100644 arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch create mode 100644 efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch diff --git a/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch b/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch new file mode 100644 index 0000000..0dea1a8 --- /dev/null +++ b/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch @@ -0,0 +1,863 @@ +From patchwork Tue Mar 31 09:39:57 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Lin Jinhan +X-Patchwork-Id: 1264692 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=rock-chips.com +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with 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ESMTPS id 09E15819A7 + for ; Tue, 31 Mar 2020 11:40:07 +0200 (CEST) +Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) + header.from=rock-chips.com +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=troy.lin@rock-chips.com +Received: from localhost (unknown [192.168.167.235]) + by lucky1.263xmail.com (Postfix) with ESMTP id D98D394B53; + Tue, 31 Mar 2020 17:40:03 +0800 (CST) +X-MAIL-GRAY: 0 +X-MAIL-DELIVERY: 1 +X-ADDR-CHECKED: 0 +X-ANTISPAM-LEVEL: 2 +X-ABS-CHECKED: 0 +Received: from localhost.localdomain (unknown [58.22.7.114]) + by smtp.263.net (postfix) whith ESMTP id + P29487T139780956792576S1585647603180703_; + Tue, 31 Mar 2020 17:40:04 +0800 (CST) +X-IP-DOMAINF: 1 +X-UNIQUE-TAG: <29a98dd6429030be44046c52ecfec245> +X-RL-SENDER: troy.lin@rock-chips.com +X-SENDER: troy.lin@rock-chips.com +X-LOGIN-NAME: troy.lin@rock-chips.com +X-FST-TO: u-boot@lists.denx.de +X-SENDER-IP: 58.22.7.114 +X-ATTACHMENT-NUM: 0 +X-DNS-TYPE: 0 +X-System-Flag: 0 +From: Lin Jinhan +To: u-boot@lists.denx.de, + sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, + Lin Jinhan +Subject: [PATCH 1/5] arm: dts: rockchip: rk3399: add and enable rng node +Date: Tue, 31 Mar 2020 17:39:57 +0800 +Message-Id: <20200331094001.13441-1-troy.lin@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Add rng node in rk3399-u-boot.dtsi and enable it in +rk3399-evb-u-boot.dtsi. + +Signed-off-by: Lin Jinhan +--- + arch/arm/dts/rk3399-evb-u-boot.dtsi | 5 +++++ + arch/arm/dts/rk3399-u-boot.dtsi | 6 ++++++ + 2 files changed, 11 insertions(+) + +diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi +index ccb33d34d1..5b50c5ba30 100644 +--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi +@@ -11,3 +11,8 @@ + u-boot,spl-boot-order = &sdhci, &sdmmc; + }; + }; ++ ++&rng { ++ status = "okay"; ++}; ++ +diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi +index 8b857ccfc7..757b8c10a2 100644 +--- a/arch/arm/dts/rk3399-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-u-boot.dtsi +@@ -25,6 +25,12 @@ + clock-names = "pclk_ddr_mon"; + }; + ++ rng: rng@ff8b8000 { ++ compatible = "rockchip,cryptov1-rng"; ++ reg = <0x0 0xff8b8000 0x0 0x1000>; ++ status = "disabled"; ++ }; ++ + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + +From patchwork Tue Mar 31 09:39:58 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Lin Jinhan +X-Patchwork-Id: 1264694 +Return-Path: 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localhost (unknown [192.168.167.235]) + by lucky1.263xmail.com (Postfix) with ESMTP id 65A9594DC1; + Tue, 31 Mar 2020 17:40:04 +0800 (CST) +X-MAIL-GRAY: 0 +X-MAIL-DELIVERY: 1 +X-ADDR-CHECKED: 0 +X-ANTISPAM-LEVEL: 2 +X-ABS-CHECKED: 0 +Received: from localhost.localdomain (unknown [58.22.7.114]) + by smtp.263.net (postfix) whith ESMTP id + P29487T139780956792576S1585647603180703_; + Tue, 31 Mar 2020 17:40:04 +0800 (CST) +X-IP-DOMAINF: 1 +X-UNIQUE-TAG: <5d721e76916e55da5c0d6122d449dd8b> +X-RL-SENDER: troy.lin@rock-chips.com +X-SENDER: troy.lin@rock-chips.com +X-LOGIN-NAME: troy.lin@rock-chips.com +X-FST-TO: u-boot@lists.denx.de +X-SENDER-IP: 58.22.7.114 +X-ATTACHMENT-NUM: 0 +X-DNS-TYPE: 0 +X-System-Flag: 0 +From: Lin Jinhan +To: u-boot@lists.denx.de, + sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, + Lin Jinhan +Subject: [PATCH 2/5] arm: dts: rockchip: px30: add and enable rng node +Date: Tue, 31 Mar 2020 17:39:58 +0800 +Message-Id: <20200331094001.13441-2-troy.lin@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> +References: <20200331094001.13441-1-troy.lin@rock-chips.com> +X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Add enable rng node in px30-evb-u-boot.dtsi. + +Signed-off-by: Lin Jinhan +--- + arch/arm/dts/px30-evb-u-boot.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi b/arch/arm/dts/px30-evb-u-boot.dtsi +index a2a2c07dcc..a73c215c05 100644 +--- a/arch/arm/dts/px30-evb-u-boot.dtsi ++++ b/arch/arm/dts/px30-evb-u-boot.dtsi +@@ -12,6 +12,13 @@ + chosen { + u-boot,spl-boot-order = &emmc, &sdmmc; + }; ++ ++ rng: rng@ff0b0000 { ++ compatible = "rockchip,cryptov2-rng"; ++ reg = <0x0 0xff0b0000 0x0 0x4000>; ++ status = "okay"; ++ }; ++ + }; + + &dmc { + +From patchwork Tue Mar 31 09:39:59 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Lin Jinhan +X-Patchwork-Id: 1264693 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=rock-chips.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No 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+X-ATTACHMENT-NUM: 0 +X-DNS-TYPE: 0 +X-System-Flag: 0 +From: Lin Jinhan +To: u-boot@lists.denx.de, + sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, + Lin Jinhan +Subject: [PATCH 3/5] rockchip: rng: Add a driver for random number + generator(rng) device +Date: Tue, 31 Mar 2020 17:39:59 +0800 +Message-Id: <20200331094001.13441-3-troy.lin@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> +References: <20200331094001.13441-1-troy.lin@rock-chips.com> +X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Add a driver for the rng device found on rockchip platforms. +Support rng module of crypto v1 and crypto v2. + +Signed-off-by: Lin Jinhan +--- + drivers/rng/Kconfig | 8 ++ + drivers/rng/Makefile | 1 + + drivers/rng/rockchip_rng.c | 224 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 233 insertions(+) + create mode 100644 drivers/rng/rockchip_rng.c + +diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig +index edb6152bb9..e4b22d79eb 100644 +--- a/drivers/rng/Kconfig ++++ b/drivers/rng/Kconfig +@@ -31,4 +31,12 @@ config RNG_STM32MP1 + help + Enable STM32MP1 rng driver. + ++config RNG_ROCKCHIP ++ bool "Enable random number generator for rockchip crypto rng" ++ depends on ARCH_ROCKCHIP && DM_RNG ++ default n ++ help ++ Enable random number generator for rockchip.This driver is ++ support rng module of crypto v1 and crypto v2. ++ + endif +diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile +index 6a8a66779b..44a0003917 100644 +--- a/drivers/rng/Makefile ++++ b/drivers/rng/Makefile +@@ -7,3 +7,4 @@ obj-$(CONFIG_DM_RNG) += rng-uclass.o + obj-$(CONFIG_RNG_MESON) += meson-rng.o + obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o + obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o ++obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o +diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c +new file mode 100644 +index 0000000000..47fb140077 +--- /dev/null ++++ b/drivers/rng/rockchip_rng.c +@@ -0,0 +1,224 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define RK_HW_RNG_MAX 32 ++ ++#define _SBF(s, v) ((v) << (s)) ++ ++/* start of CRYPTO V1 register define */ ++#define CRYPTO_V1_CTRL 0x0008 ++#define CRYPTO_V1_RNG_START BIT(8) ++#define CRYPTO_V1_RNG_FLUSH BIT(9) ++ ++#define CRYPTO_V1_TRNG_CTRL 0x0200 ++#define CRYPTO_V1_OSC_ENABLE BIT(16) ++#define CRYPTO_V1_TRNG_SAMPLE_PERIOD(x) (x) ++ ++#define CRYPTO_V1_TRNG_DOUT_0 0x0204 ++/* end of CRYPTO V1 register define */ ++ ++/* start of CRYPTO V2 register define */ ++#define CRYPTO_V2_RNG_CTL 0x0400 ++#define CRYPTO_V2_RNG_64_BIT_LEN _SBF(4, 0x00) ++#define CRYPTO_V2_RNG_128_BIT_LEN _SBF(4, 0x01) ++#define CRYPTO_V2_RNG_192_BIT_LEN _SBF(4, 0x02) ++#define CRYPTO_V2_RNG_256_BIT_LEN _SBF(4, 0x03) ++#define CRYPTO_V2_RNG_FATESY_SOC_RING _SBF(2, 0x00) ++#define CRYPTO_V2_RNG_SLOWER_SOC_RING_0 _SBF(2, 0x01) ++#define CRYPTO_V2_RNG_SLOWER_SOC_RING_1 _SBF(2, 0x02) ++#define CRYPTO_V2_RNG_SLOWEST_SOC_RING _SBF(2, 0x03) ++#define CRYPTO_V2_RNG_ENABLE BIT(1) ++#define CRYPTO_V2_RNG_START BIT(0) ++#define CRYPTO_V2_RNG_SAMPLE_CNT 0x0404 ++#define CRYPTO_V2_RNG_DOUT_0 0x0410 ++/* end of CRYPTO V2 register define */ ++ ++#define RK_RNG_TIME_OUT 50000 /* max 50ms */ ++ ++struct rk_rng_soc_data { ++ int (*rk_rng_read)(struct udevice *dev, void *data, size_t len); ++}; ++ ++struct rk_rng_platdata { ++ fdt_addr_t base; ++ struct rk_rng_soc_data *soc_data; ++}; ++ ++static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size) ++{ ++ u32 count = RK_HW_RNG_MAX / sizeof(u32); ++ u32 reg, tmp_len; ++ ++ if (size > RK_HW_RNG_MAX) ++ return -EINVAL; ++ ++ while (size && count) { ++ reg = readl(addr); ++ tmp_len = min(size, sizeof(u32)); ++ memcpy(buf, ®, tmp_len); ++ addr += sizeof(u32); ++ buf += tmp_len; ++ size -= tmp_len; ++ count--; ++ } ++ ++ return 0; ++} ++ ++static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len) ++{ ++ struct rk_rng_platdata *pdata = dev_get_priv(dev); ++ u32 reg = 0; ++ int retval; ++ ++ if (len > RK_HW_RNG_MAX) ++ return -EINVAL; ++ ++ /* enable osc_ring to get entropy, sample period is set as 100 */ ++ writel(CRYPTO_V1_OSC_ENABLE | CRYPTO_V1_TRNG_SAMPLE_PERIOD(100), ++ pdata->base + CRYPTO_V1_TRNG_CTRL); ++ ++ rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START, ++ CRYPTO_V1_RNG_START); ++ ++ retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg, ++ !(reg & CRYPTO_V1_RNG_START), ++ RK_RNG_TIME_OUT); ++ if (retval) ++ goto exit; ++ ++ rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len); ++ ++exit: ++ /* close TRNG */ ++ rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START); ++ ++ return 0; ++} ++ ++static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len) ++{ ++ struct rk_rng_platdata *pdata = dev_get_priv(dev); ++ u32 reg = 0; ++ int retval; ++ ++ if (len > RK_HW_RNG_MAX) ++ return -EINVAL; ++ ++ /* enable osc_ring to get entropy, sample period is set as 100 */ ++ writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT); ++ ++ reg |= CRYPTO_V2_RNG_256_BIT_LEN; ++ reg |= CRYPTO_V2_RNG_SLOWER_SOC_RING_0; ++ reg |= CRYPTO_V2_RNG_ENABLE; ++ reg |= CRYPTO_V2_RNG_START; ++ ++ rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg); ++ ++ retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg, ++ !(reg & CRYPTO_V2_RNG_START), ++ RK_RNG_TIME_OUT); ++ if (retval) ++ goto exit; ++ ++ rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len); ++ ++exit: ++ /* close TRNG */ ++ rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff); ++ ++ return retval; ++} ++ ++static int rockchip_rng_read(struct udevice *dev, void *data, size_t len) ++{ ++ unsigned char *buf = data; ++ unsigned int i; ++ int ret = -EIO; ++ ++ struct rk_rng_platdata *pdata = dev_get_priv(dev); ++ ++ if (!len) ++ return 0; ++ ++ if (!pdata->soc_data || !pdata->soc_data->rk_rng_read) ++ return -EINVAL; ++ ++ for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) { ++ ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX); ++ if (ret) ++ goto exit; ++ } ++ ++ if (len % RK_HW_RNG_MAX) ++ ret = pdata->soc_data->rk_rng_read(dev, buf, ++ len % RK_HW_RNG_MAX); ++ ++exit: ++ return ret; ++} ++ ++static int rockchip_rng_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct rk_rng_platdata *pdata = dev_get_priv(dev); ++ ++ memset(pdata, 0x00, sizeof(*pdata)); ++ ++ pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev); ++ if (!pdata->base) ++ return -ENOMEM; ++ ++ return 0; ++} ++ ++static int rockchip_rng_probe(struct udevice *dev) ++{ ++ struct rk_rng_platdata *pdata = dev_get_priv(dev); ++ ++ pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev); ++ ++ return 0; ++} ++ ++static const struct rk_rng_soc_data rk_rng_v1_soc_data = { ++ .rk_rng_read = rk_v1_rng_read, ++}; ++ ++static const struct rk_rng_soc_data rk_rng_v2_soc_data = { ++ .rk_rng_read = rk_v2_rng_read, ++}; ++ ++static const struct dm_rng_ops rockchip_rng_ops = { ++ .read = rockchip_rng_read, ++}; ++ ++static const struct udevice_id rockchip_rng_match[] = { ++ { ++ .compatible = "rockchip,cryptov1-rng", ++ .data = (ulong)&rk_rng_v1_soc_data, ++ }, ++ { ++ .compatible = "rockchip,cryptov2-rng", ++ .data = (ulong)&rk_rng_v2_soc_data, ++ }, ++ {}, ++}; ++ ++U_BOOT_DRIVER(rockchip_rng) = { ++ .name = "rockchip-rng", ++ .id = UCLASS_RNG, ++ .of_match = rockchip_rng_match, ++ .ops = &rockchip_rng_ops, ++ .probe = rockchip_rng_probe, ++ .ofdata_to_platdata = rockchip_rng_ofdata_to_platdata, ++ .priv_auto_alloc_size = sizeof(struct rk_rng_platdata), ++}; + +From patchwork Tue Mar 31 09:40:00 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Lin Jinhan +X-Patchwork-Id: 1264696 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=rock-chips.com +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 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3D2A781901 + for ; Tue, 31 Mar 2020 11:40:07 +0200 (CEST) +Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) + header.from=rock-chips.com +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=troy.lin@rock-chips.com +Received: from localhost (unknown [192.168.167.235]) + by lucky1.263xmail.com (Postfix) with ESMTP id 2A506BED2E; + Tue, 31 Mar 2020 17:40:05 +0800 (CST) +X-MAIL-GRAY: 0 +X-MAIL-DELIVERY: 1 +X-ADDR-CHECKED: 0 +X-ANTISPAM-LEVEL: 2 +X-ABS-CHECKED: 0 +Received: from localhost.localdomain (unknown [58.22.7.114]) + by smtp.263.net (postfix) whith ESMTP id + P29487T139780956792576S1585647603180703_; + Tue, 31 Mar 2020 17:40:05 +0800 (CST) +X-IP-DOMAINF: 1 +X-UNIQUE-TAG: <7a2dd5c9974cf72e82c0752b3ad6f8eb> +X-RL-SENDER: troy.lin@rock-chips.com +X-SENDER: troy.lin@rock-chips.com +X-LOGIN-NAME: troy.lin@rock-chips.com +X-FST-TO: u-boot@lists.denx.de +X-SENDER-IP: 58.22.7.114 +X-ATTACHMENT-NUM: 0 +X-DNS-TYPE: 0 +X-System-Flag: 0 +From: Lin Jinhan +To: u-boot@lists.denx.de, + sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, + Lin Jinhan +Subject: [PATCH 4/5] rockchip: rk3399: Enable CONFIG_RNG_ROCKCHIP +Date: Tue, 31 Mar 2020 17:40:00 +0800 +Message-Id: <20200331094001.13441-4-troy.lin@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> +References: <20200331094001.13441-1-troy.lin@rock-chips.com> +X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled. + +Signed-off-by: Lin Jinhan +--- + configs/evb-rk3399_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig +index 3f74be3b3c..7f14e18b1b 100644 +--- a/configs/evb-rk3399_defconfig ++++ b/configs/evb-rk3399_defconfig +@@ -39,6 +39,8 @@ CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y + CONFIG_PWM_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_BAUDRATE=1500000 + CONFIG_DEBUG_UART_SHIFT=2 + CONFIG_SYSRESET=y + +From patchwork Tue Mar 31 09:40:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Lin Jinhan +X-Patchwork-Id: 1264695 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none 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+X-IP-DOMAINF: 1 +X-UNIQUE-TAG: <81a0d8eceb16099cd760d4d11030d27a> +X-RL-SENDER: troy.lin@rock-chips.com +X-SENDER: troy.lin@rock-chips.com +X-LOGIN-NAME: troy.lin@rock-chips.com +X-FST-TO: u-boot@lists.denx.de +X-SENDER-IP: 58.22.7.114 +X-ATTACHMENT-NUM: 0 +X-DNS-TYPE: 0 +X-System-Flag: 0 +From: Lin Jinhan +To: u-boot@lists.denx.de, + sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, + Lin Jinhan +Subject: [PATCH 5/5] rockchip: px30: Enable CONFIG_RNG_ROCKCHIP +Date: Tue, 31 Mar 2020 17:40:01 +0800 +Message-Id: <20200331094001.13441-5-troy.lin@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> +References: <20200331094001.13441-1-troy.lin@rock-chips.com> +X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled. + +Signed-off-by: Lin Jinhan +--- + configs/evb-px30_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig +index b5ba75cc6e..d2cf13e54a 100644 +--- a/configs/evb-px30_defconfig ++++ b/configs/evb-px30_defconfig +@@ -85,6 +85,8 @@ CONFIG_SPL_RAM=y + CONFIG_TPL_RAM=y + CONFIG_ROCKCHIP_SDRAM_COMMON=y + CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + # CONFIG_SPECIFY_CONSOLE_INDEX is not set + CONFIG_DEBUG_UART_SHIFT=2 + CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch new file mode 100644 index 0000000..0987100 --- /dev/null +++ b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch @@ -0,0 +1,108 @@ +From 32f17a93e08227c56a655f9b85977569e4e5daa2 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Apr 2020 10:44:09 +0100 +Subject: [PATCH] arm: rk3399: enable rng on rock960 and firefly3399 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ + arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ + configs/firefly-rk3399_defconfig | 2 ++ + configs/rock960-rk3399_defconfig | 2 ++ + 4 files changed, 12 insertions(+) + +diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi +index 38e0897db9..a6c7b913da 100644 +--- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi +@@ -11,3 +11,7 @@ + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; + }; ++ ++&rng { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +index 82f2c311af..401ad02c45 100644 +--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +@@ -24,3 +24,7 @@ + }; + + }; ++ ++&rng { ++ status = "okay"; ++}; +diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig +index 4c9f1e189b..27306b434f 100644 +--- a/configs/firefly-rk3399_defconfig ++++ b/configs/firefly-rk3399_defconfig +@@ -34,6 +34,8 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index ba4226e173..f823d0dabd 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -35,6 +35,8 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y +-- +2.26.0 + +From 03a3e695cb24257e42a0a97abf7177ca788bedc4 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Apr 2020 11:20:43 +0100 +Subject: [PATCH] arm: rk3399: enable rng on rockpro64 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ + configs/rockpro64-rk3399_defconfig | 2 ++ + 2 files changed, 6 insertions(+) + +diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +index deaa3efd39..2e99ef71f4 100644 +--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +@@ -15,6 +15,10 @@ + }; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &vdd_center { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index 8074e4665a..285dccebe5 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -34,6 +34,8 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +-- +2.26.0 + diff --git a/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch b/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch new file mode 100644 index 0000000..bd70605 --- /dev/null +++ b/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch @@ -0,0 +1,31 @@ +From af59a07dad603740d0aaa103cd02b97e4a3267af Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Apr 2020 11:11:12 +0100 +Subject: [PATCH] efi_loader: enable RNG if DM_RNG is enabled + +Enable EFI_RNG_PROTOCOL by default if DM_RNG is set. + +Signed-off-by: Peter Robinson +--- + +I think it makes sense to enable EFI_RNG_PROTOCOL by default if a config +has enabled both DM_RNG and UEFI. + + lib/efi_loader/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig +index 9890144d41..b9a770281e 100644 +--- a/lib/efi_loader/Kconfig ++++ b/lib/efi_loader/Kconfig +@@ -125,6 +125,7 @@ config EFI_GRUB_ARM32_WORKAROUND + + config EFI_RNG_PROTOCOL + bool "EFI_RNG_PROTOCOL support" ++ default y if DM_RNG + depends on DM_RNG + help + Provide a EFI_RNG_PROTOCOL implementation using the hardware random +-- +2.26.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index f63ea95..40ebdd3 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -24,7 +24,9 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch4: usb-kbd-fixes.patch Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch +Patch7: efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch +# Tegra improvements Patch10: mtd-spi-Add-Macronix-MX25U3235F-device.patch Patch11: Misc-fixes-for-Tegra.patch Patch12: mmc-t210-fix-autocal-and-400KHz-clock.patch @@ -36,6 +38,10 @@ Patch16: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch17: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch18: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch +# Rockchips improvements +Patch20: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch +Patch21: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch + BuildRequires: bc BuildRequires: dtc BuildRequires: make @@ -259,6 +265,7 @@ cp -p board/warp7/README builds/docs/README.warp7 * Tue Mar 31 2020 Peter Robinson 2020.04-0.6-rc4 - 2020.04 RC4 - Updates for NVIDIA Jetson platforms +- Support RNG for random seed for KASLR on some Rockchip devices * Thu Mar 26 2020 Peter Robinson 2020.04-0.5-rc3 - Fix ext4 alignment issue seen on some NXP i.MX devices From d8c86a078c240ecb97f9dbf2ad8fa00f59520ee6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Apr 2020 09:49:18 +0100 Subject: [PATCH 074/351] 2020.04 RC5 --- ARM-tegra-Add-NVIDIA-Jetson-Nano.patch | 710 ------ Misc-fixes-for-Tegra.patch | 274 --- mmc-t210-fix-autocal-and-400KHz-clock.patch | 461 ---- mtd-spi-Add-Macronix-MX25U3235F-device.patch | 116 - net-tegra-Misc-network-fixes.patch | 310 --- ...0-fix-claim_bus-and-clock-tap-delays.patch | 453 ---- sources | 2 +- t210-miscellaneous-patches.patch | 2026 ----------------- uboot-tools.spec | 20 +- 9 files changed, 9 insertions(+), 4363 deletions(-) delete mode 100644 ARM-tegra-Add-NVIDIA-Jetson-Nano.patch delete mode 100644 mmc-t210-fix-autocal-and-400KHz-clock.patch delete mode 100644 mtd-spi-Add-Macronix-MX25U3235F-device.patch delete mode 100644 net-tegra-Misc-network-fixes.patch delete mode 100644 qspi-t210-fix-claim_bus-and-clock-tap-delays.patch delete mode 100644 t210-miscellaneous-patches.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch deleted file mode 100644 index 9ac9e94..0000000 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch +++ /dev/null @@ -1,710 +0,0 @@ -From patchwork Wed Mar 25 18:21:51 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1261582 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48nc0t0FXmz9sR4 - for ; - Thu, 26 Mar 2020 05:22:34 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) 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-Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Wed, 25 Mar 2020 11:22:07 -0700 -From: -To: -CC: , , , - -Subject: [PATCH] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support -Date: Wed, 25 Mar 2020 11:21:51 -0700 -Message-ID: <1585160511-15347-1-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -The Jetson Nano Developer Kit is a Tegra X1-based development board. It -is similar to Jetson TX1 but it is not pin compatible. It features 4GB -of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot -used for storage. - -HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 -and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI -Ethernet controller provides onboard network connectivity. NVMe support -has also been added. Env save is at the end of QSPI (4MB-8K). - -A 40-pin header on the board can be used to extend the capabilities and -exposed interfaces of the Jetson Nano. - -Signed-off-by: Thierry Reding -Signed-off-by: Tom Warren ---- -retry send-email to see if it shows up in Patchwork - - arch/arm/dts/Makefile | 3 +- - arch/arm/dts/tegra210-p3450-0000.dts | 147 +++++++++++++++++++++++++++++ - arch/arm/mach-tegra/board2.c | 25 +++++ - arch/arm/mach-tegra/tegra210/Kconfig | 7 ++ - board/nvidia/p3450-0000/Kconfig | 12 +++ - board/nvidia/p3450-0000/MAINTAINERS | 6 ++ - board/nvidia/p3450-0000/Makefile | 8 ++ - board/nvidia/p3450-0000/p3450-0000.c | 178 +++++++++++++++++++++++++++++++++++ - configs/p3450-0000_defconfig | 64 +++++++++++++ - include/configs/p3450-0000.h | 46 +++++++++ - 10 files changed, 495 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts - create mode 100644 board/nvidia/p3450-0000/Kconfig - create mode 100644 board/nvidia/p3450-0000/MAINTAINERS - create mode 100644 board/nvidia/p3450-0000/Makefile - create mode 100644 board/nvidia/p3450-0000/p3450-0000.c - create mode 100644 configs/p3450-0000_defconfig - create mode 100644 include/configs/p3450-0000.h - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 9c593b2..820ee97 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -180,7 +180,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ - tegra210-e2220-1170.dtb \ - tegra210-p2371-0000.dtb \ - tegra210-p2371-2180.dtb \ -- tegra210-p2571.dtb -+ tegra210-p2571.dtb \ -+ tegra210-p3450-0000.dtb - - dtb-$(CONFIG_ARCH_MVEBU) += \ - armada-3720-db.dtb \ -diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts -new file mode 100644 -index 0000000..9ef744a ---- /dev/null -+++ b/arch/arm/dts/tegra210-p3450-0000.dts -@@ -0,0 +1,147 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2019-2020 NVIDIA Corporation -+ */ -+/dts-v1/; -+ -+#include "tegra210.dtsi" -+ -+/ { -+ model = "NVIDIA Jetson Nano Developer Kit"; -+ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; -+ -+ chosen { -+ stdout-path = &uarta; -+ }; -+ -+ aliases { -+ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; -+ i2c0 = "/i2c@7000d000"; -+ i2c2 = "/i2c@7000c400"; -+ i2c3 = "/i2c@7000c500"; -+ i2c4 = "/i2c@7000c700"; -+ mmc0 = "/sdhci@700b0600"; -+ mmc1 = "/sdhci@700b0000"; -+ spi0 = "/spi@70410000"; -+ usb0 = "/usb@7d000000"; -+ }; -+ -+ memory { -+ reg = <0x0 0x80000000 0x0 0xc0000000>; -+ }; -+ -+ pcie@1003000 { -+ status = "okay"; -+ -+ pci@1,0 { -+ status = "okay"; -+ }; -+ -+ pci@2,0 { -+ status = "okay"; -+ -+ ethernet@0,0 { -+ reg = <0x000000 0 0 0 0>; -+ local-mac-address = [ 00 00 00 00 00 00 ]; -+ }; -+ }; -+ }; -+ -+ serial@70006000 { -+ status = "okay"; -+ }; -+ -+ padctl@7009f000 { -+ pinctrl-0 = <&padctl_default>; -+ pinctrl-names = "default"; -+ -+ padctl_default: pinmux { -+ xusb { -+ nvidia,lanes = "otg-1", "otg-2"; -+ nvidia,function = "xusb"; -+ nvidia,iddq = <0>; -+ }; -+ -+ usb3 { -+ nvidia,lanes = "pcie-5", "pcie-6"; -+ nvidia,function = "usb3"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x1 { -+ nvidia,lanes = "pcie-0"; -+ nvidia,function = "pcie-x1"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x4 { -+ nvidia,lanes = "pcie-1", "pcie-2", -+ "pcie-3", "pcie-4"; -+ nvidia,function = "pcie-x4"; -+ nvidia,iddq = <0>; -+ }; -+ -+ sata { -+ nvidia,lanes = "sata-0"; -+ nvidia,function = "sata"; -+ nvidia,iddq = <0>; -+ }; -+ }; -+ }; -+ -+ sdhci@700b0000 { -+ status = "okay"; -+ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; -+ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ }; -+ -+ sdhci@700b0600 { -+ status = "okay"; -+ bus-width = <8>; -+ non-removable; -+ }; -+ -+ i2c@7000c400 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c500 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c700 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000d000 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ spi@70410000 { -+ status = "okay"; -+ spi-max-frequency = <80000000>; -+ }; -+ -+ usb@7d000000 { -+ status = "okay"; -+ dr_mode = "peripheral"; -+ }; -+ -+ clocks { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ clk32k_in: clock@0 { -+ compatible = "fixed-clock"; -+ reg = <0>; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 787ff97..224efc9 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -217,6 +217,31 @@ int board_early_init_f(void) - arch_timer_init(); - #endif - -+#if defined(CONFIG_DISABLE_SDMMC1_EARLY) -+ /* -+ * Turn off (reset/disable) SDMMC1 on Nano here, before GPIO INIT. -+ * We do this because earlier bootloaders have enabled power to -+ * SDMMC1 on Nano, and toggling power-gpio (PZ3) in pinmux_init() -+ * results in power being back-driven into the SD-card and SDMMC1 -+ * HW, which is 'bad' as per the HW team. -+ * -+ * From the HW team: "LDO2 from the PMIC has already been set to 3.3v in -+ * nvtboot/CBoot on Nano (for SD-card boot). So when U-Boot's GPIO_INIT -+ * table sets PZ3 to OUT0 as per the pinmux spreadsheet, it turns off -+ * the loadswitch. When PZ3 is 0 and not driving, essentially the SDCard -+ * voltage turns off. Since the SDCard voltage is no longer there, the -+ * SDMMC CLK/DAT lines are backdriving into what essentially is a -+ * powered-off SDCard, that's why the voltage drops from 3.3V to ~1.6V" -+ * -+ * Note that this can probably be removed when we change over to storing -+ * all BL components on QSPI on Nano, and U-Boot then becomes the first -+ * one to turn on SDMMC1 power. Another fix would be to have CBoot -+ * disable power/gate SDMMC1 off before handing off to U-Boot/kernel. -+ */ -+ reset_set_enable(PERIPH_ID_SDMMC1, 1); -+ clock_set_enable(PERIPH_ID_SDMMC1, 0); -+#endif /* CONFIG_DISABLE_SDMMC1_EARLY */ -+ - pinmux_init(); - board_init_uart_f(); - -diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig -index 3637473..97ed8e0 100644 ---- a/arch/arm/mach-tegra/tegra210/Kconfig -+++ b/arch/arm/mach-tegra/tegra210/Kconfig -@@ -35,6 +35,12 @@ config TARGET_P2571 - help - P2571 is a P2530 married to a P1963 I/O board - -+config TARGET_P3450_0000 -+ bool "NVIDIA Jetson Nano Developer Kit" -+ select BOARD_LATE_INIT -+ help -+ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. -+ - endchoice - - config SYS_SOC -@@ -44,5 +50,6 @@ source "board/nvidia/e2220-1170/Kconfig" - source "board/nvidia/p2371-0000/Kconfig" - source "board/nvidia/p2371-2180/Kconfig" - source "board/nvidia/p2571/Kconfig" -+source "board/nvidia/p3450-0000/Kconfig" - - endif -diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig -new file mode 100644 -index 0000000..7a08cd8 ---- /dev/null -+++ b/board/nvidia/p3450-0000/Kconfig -@@ -0,0 +1,12 @@ -+if TARGET_P3450_0000 -+ -+config SYS_BOARD -+ default "p3450-0000" -+ -+config SYS_VENDOR -+ default "nvidia" -+ -+config SYS_CONFIG_NAME -+ default "p3450-0000" -+ -+endif -diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS -new file mode 100644 -index 0000000..4070006 ---- /dev/null -+++ b/board/nvidia/p3450-0000/MAINTAINERS -@@ -0,0 +1,6 @@ -+P3450-0000 BOARD -+M: Tom Warren -+S: Maintained -+F: board/nvidia/p3450-0000/ -+F: include/configs/p3450-0000.h -+F: configs/p3450-0000_defconfig -diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile -new file mode 100644 -index 0000000..993c506 ---- /dev/null -+++ b/board/nvidia/p3450-0000/Makefile -@@ -0,0 +1,8 @@ -+# -+# (C) Copyright 2018 -+# NVIDIA Corporation -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += p3450-0000.o -diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c -new file mode 100644 -index 0000000..f4212ab ---- /dev/null -+++ b/board/nvidia/p3450-0000/p3450-0000.c -@@ -0,0 +1,178 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2018-2019 -+ * NVIDIA Corporation -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../p2571/max77620_init.h" -+ -+void pin_mux_mmc(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ -+ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return; -+ } -+ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xF2; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -+ -+ /* Disable LDO4 discharge */ -+ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) { -+ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); -+ } else { -+ val &= ~BIT(1); /* ADE */ -+ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); -+ } -+ -+ /* Set MBLPD */ -+ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) { -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } else { -+ val |= BIT(6); /* MBLPD */ -+ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } -+} -+ -+#ifdef CONFIG_PCI_TEGRA -+int tegra_pcie_board_init(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ -+ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return -1; -+ } -+ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xCA; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); -+ -+ return 0; -+} -+#endif /* PCI */ -+ -+static void ft_mac_address_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+} -+ -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@50000000/dc@54200000", -+ "/host1x@50000000/dc@54240000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ printf("copying carveout for %s...\n", nodes[i]); -+ -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ -+ continue; -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); -+ -+ return 0; -+} -diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig -new file mode 100644 -index 0000000..c861d13 ---- /dev/null -+++ b/configs/p3450-0000_defconfig -@@ -0,0 +1,64 @@ -+CONFIG_ARM=y -+CONFIG_TEGRA=y -+CONFIG_SYS_TEXT_BASE=0x80080000 -+CONFIG_TEGRA210=y -+CONFIG_TARGET_P3450_0000=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_CONSOLE_MUX=y -+CONFIG_SYS_STDIO_DEREGISTER=y -+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_DFU=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+# CONFIG_CMD_NFS is not set -+CONFIG_CMD_EXT4_WRITE=y -+CONFIG_OF_LIVE=y -+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" -+CONFIG_DFU_MMC=y -+CONFIG_DFU_RAM=y -+CONFIG_DFU_SF=y -+CONFIG_SYS_I2C_TEGRA=y -+CONFIG_SPI_FLASH=y -+CONFIG_SPI_FLASH_MACRONIX=y -+CONFIG_SPI_FLASH_USE_4K_SECTORS=y -+CONFIG_SF_DEFAULT_MODE=0 -+CONFIG_SF_DEFAULT_SPEED=24000000 -+CONFIG_RTL8169=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_DM_PCI_COMPAT=y -+CONFIG_PCI_TEGRA=y -+CONFIG_SYS_NS16550=y -+CONFIG_TEGRA114_SPI=y -+CONFIG_TEGRA210_QSPI=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_TEGRA=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a -+CONFIG_CI_UDC=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+# CONFIG_ENV_IS_IN_MMC is not set -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_ENV_SECT_SIZE=0x1000 -+CONFIG_ENV_OFFSET=0xFFFFE000 -+CONFIG_BOOTP_PREFER_SERVERIP=y -+CONFIG_DISABLE_SDMMC1_EARLY=y -+CONFIG_NVME=y -diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h -new file mode 100644 -index 0000000..7f05beb ---- /dev/null -+++ b/include/configs/p3450-0000.h -@@ -0,0 +1,46 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2018-2019 NVIDIA Corporation. -+ */ -+ -+#ifndef _P3450_0000_H -+#define _P3450_0000_H -+ -+#include -+ -+#include "tegra210-common.h" -+ -+/* High-level configuration options */ -+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" -+ -+/* Board-specific serial config */ -+#define CONFIG_TEGRA_ENABLE_UARTA -+ -+/* Only MMC/PXE/DHCP for now, add USB back in later when supported */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 1) \ -+ func(MMC, mmc, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+/* Environment at end of QSPI, in the VER partition */ -+#define CONFIG_ENV_SPI_MAX_HZ 48000000 -+#define CONFIG_ENV_SPI_MODE SPI_MODE_0 -+#define CONFIG_SPI_FLASH_SIZE (4 << 20) -+ -+#define CONFIG_PREBOOT -+ -+#define BOARD_EXTRA_ENV_SETTINGS \ -+ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ -+ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ -+ "source ${scriptaddr}; " \ -+ "fi\0" -+ -+/* General networking support */ -+#include "tegra-common-usb-gadget.h" -+#include "tegra-common-post.h" -+ -+/* Crystal is 38.4MHz. clk_m runs at half that rate */ -+#define COUNTER_FREQUENCY 19200000 -+ -+#endif /* _P3450_0000_H */ diff --git a/Misc-fixes-for-Tegra.patch b/Misc-fixes-for-Tegra.patch index 355bbae..2c3223d 100644 --- a/Misc-fixes-for-Tegra.patch +++ b/Misc-fixes-for-Tegra.patch @@ -1,130 +1,3 @@ -From patchwork Thu Mar 26 22:20:43 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262377 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 26 Mar 2020 15:20:48 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 1/3] ARM: tegra: p2771-0000: enable PIE relocation -Date: Thu, 26 Mar 2020 15:20:43 -0700 -Message-ID: <1585261245-1740-2-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Vishruth - -U-Boot is configured to build as position independent executable. Enable -relocation of RELA section required to work with different load -addresses. - -Signed-off-by: Vishruth -Signed-off-by: Tom Warren ---- - configs/p2771-0000-000_defconfig | 1 + - configs/p2771-0000-500_defconfig | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index 06f12e2..e347a77 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y - CONFIG_SYS_NS16550=y - CONFIG_USB=y - CONFIG_DM_USB=y -+CONFIG_POSITION_INDEPENDENT=y -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index 1a14a92..0803b26 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y - CONFIG_SYS_NS16550=y - CONFIG_USB=y - CONFIG_DM_USB=y -+CONFIG_POSITION_INDEPENDENT=y - From patchwork Thu Mar 26 22:20:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 @@ -245,150 +118,3 @@ index 25a6ed4..36cc726 100644 char *prop; /* property */ int nodeoffset; /* node offset from libfdt */ -From patchwork Thu Mar 26 22:20:45 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262379 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pKGB4dynz9sPR - for ; - Fri, 27 Mar 2020 09:21:38 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 3DA5280199; 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-+ i2c2 = "/i2c@7000c400"; -+ i2c3 = "/i2c@7000c500"; -+ i2c5 = "/i2c@546c0c00"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; - usb0 = "/usb@7d000000"; -@@ -33,6 +36,11 @@ - }; - }; - -+ i2c@546c0c00 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ - padctl@7009f000 { - pinctrl-0 = <&padctl_default>; - pinctrl-names = "default"; -@@ -85,6 +93,16 @@ - non-removable; - }; - -+ i2c@7000c400 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c500 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ - i2c@7000d000 { - status = "okay"; - clock-frequency = <400000>; diff --git a/mmc-t210-fix-autocal-and-400KHz-clock.patch b/mmc-t210-fix-autocal-and-400KHz-clock.patch deleted file mode 100644 index 622e570..0000000 --- a/mmc-t210-fix-autocal-and-400KHz-clock.patch +++ /dev/null @@ -1,461 +0,0 @@ -From patchwork Thu Mar 26 22:30:21 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262385 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 26 Mar 2020 15:30:34 -0700 -X-PGP-Universal: processed; - by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:30:34 -0700 -Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com - (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:30:34 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com - (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 22:30:34 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:30:33 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 1/2] mmc: t210: Add autocal and tap/trim updates for SDMMC1/3 -Date: Thu, 26 Mar 2020 15:30:21 -0700 -Message-ID: <1585261822-3420-2-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -As per the T210 TRM, when running at 3.3v, the SDMMC1 tap/trim and -autocal values need to be set to condition the signals correctly before -talking to the SD-card. This is the same as what's being done in CBoot, -but it gets reset when the SDMMC1 HW is soft-reset during SD driver -init, so needs to be repeated here. Also set autocal and tap/trim for -SDMMC3, although no T210 boards use it for SD-card at this time. - -Signed-off-by: Tom Warren ---- -Changes for v2: - - Added clocks.h include for TEGRA30 to fix T30 32-bit builds - - arch/arm/include/asm/arch-tegra/tegra_mmc.h | 20 +++++-- - drivers/mmc/tegra_mmc.c | 84 ++++++++++++++++++++++++++--- - 2 files changed, 92 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h -index a2b6f63..a8bfa46 100644 ---- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h -+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h -@@ -2,7 +2,7 @@ - /* - * (C) Copyright 2009 SAMSUNG Electronics - * Minkyu Kang -- * Portions Copyright (C) 2011-2012 NVIDIA Corporation -+ * Portions Copyright (C) 2011-2012,2019 NVIDIA Corporation - */ - - #ifndef __TEGRA_MMC_H_ -@@ -52,7 +52,7 @@ struct tegra_mmc { - unsigned char admaerr; /* offset 54h */ - unsigned char res4[3]; /* RESERVED, offset 55h-57h */ - unsigned long admaaddr; /* offset 58h-5Fh */ -- unsigned char res5[0xa0]; /* RESERVED, offset 60h-FBh */ -+ unsigned char res5[0x9c]; /* RESERVED, offset 60h-FBh */ - unsigned short slotintstatus; /* offset FCh */ - unsigned short hcver; /* HOST Version */ - unsigned int venclkctl; /* _VENDOR_CLOCK_CNTRL_0, 100h */ -@@ -127,11 +127,23 @@ struct tegra_mmc { - - #define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE (1 << 1) - --/* SDMMC1/3 settings from section 24.6 of T30 TRM */ -+/* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */ - #define MEMCOMP_PADCTRL_VREF 7 --#define AUTO_CAL_ENABLED (1 << 29) -+#define AUTO_CAL_ENABLE (1 << 29) -+#if defined(CONFIG_TEGRA210) -+#define AUTO_CAL_ACTIVE (1 << 31) -+#define AUTO_CAL_START (1 << 31) -+#define AUTO_CAL_PD_OFFSET (0x7D << 8) -+#define AUTO_CAL_PU_OFFSET (0 << 0) -+#define IO_TRIM_BYPASS_MASK (1 << 2) -+#define TRIM_VAL_SHIFT 24 -+#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT) -+#define TAP_VAL_SHIFT 16 -+#define TAP_VAL_MASK (0xFF << TAP_VAL_SHIFT) -+#else - #define AUTO_CAL_PD_OFFSET (0x70 << 8) - #define AUTO_CAL_PU_OFFSET (0x62 << 0) -+#endif - - #endif /* __ASSEMBLY__ */ - #endif /* __TEGRA_MMC_H_ */ -diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c -index f022e93..73ac58c 100644 ---- a/drivers/mmc/tegra_mmc.c -+++ b/drivers/mmc/tegra_mmc.c -@@ -3,7 +3,7 @@ - * (C) Copyright 2009 SAMSUNG Electronics - * Minkyu Kang - * Jaehoon Chung -- * Portions Copyright 2011-2016 NVIDIA Corporation -+ * Portions Copyright 2011-2019 NVIDIA Corporation - */ - - #include -@@ -15,6 +15,9 @@ - #include - #include - #include -+#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA210) -+#include -+#endif - - struct tegra_mmc_plat { - struct mmc_config cfg; -@@ -30,6 +33,7 @@ struct tegra_mmc_priv { - struct gpio_desc wp_gpio; /* Write Protect GPIO */ - unsigned int version; /* SDHCI spec. version */ - unsigned int clock; /* Current clock (MHz) */ -+ int mmc_id; /* peripheral id */ - }; - - static void tegra_mmc_set_power(struct tegra_mmc_priv *priv, -@@ -446,16 +450,19 @@ static int tegra_mmc_set_ios(struct udevice *dev) - - static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) - { --#if defined(CONFIG_TEGRA30) -+#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA210) - u32 val; -+ u16 clk_con; -+ int timeout; -+ int id = priv->mmc_id; - -- debug("%s: sdmmc address = %08x\n", __func__, (unsigned int)priv->reg); -+ debug("%s: sdmmc address = %p, id = %d\n", __func__, -+ priv->reg, id); - - /* Set the pad drive strength for SDMMC1 or 3 only */ -- if (priv->reg != (void *)0x78000000 && -- priv->reg != (void *)0x78000400) { -+ if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { - debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", -- __func__); -+ __func__); - return; - } - -@@ -464,11 +471,65 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) - val |= MEMCOMP_PADCTRL_VREF; - writel(val, &priv->reg->sdmemcmppadctl); - -+ /* Disable SD Clock Enable before running auto-cal as per TRM */ -+ clk_con = readw(&priv->reg->clkcon); -+ debug("%s: CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); -+ clk_con &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; -+ writew(clk_con, &priv->reg->clkcon); -+ - val = readl(&priv->reg->autocalcfg); - val &= 0xFFFF0000; -- val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; -+ val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET; - writel(val, &priv->reg->autocalcfg); --#endif -+ val |= AUTO_CAL_START | AUTO_CAL_ENABLE; -+ writel(val, &priv->reg->autocalcfg); -+ debug("%s: AUTO_CAL_CFG = 0x%08X\n", __func__, val); -+ udelay(1); -+ timeout = 100; /* 10 mSec max (100*100uS) */ -+ do { -+ val = readl(&priv->reg->autocalsts); -+ udelay(100); -+ } while ((val & AUTO_CAL_ACTIVE) && --timeout); -+ val = readl(&priv->reg->autocalsts); -+ debug("%s: Final AUTO_CAL_STATUS = 0x%08X, timeout = %d\n", -+ __func__, val, timeout); -+ -+ /* Re-enable SD Clock Enable when auto-cal is done */ -+ clk_con |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; -+ writew(clk_con, &priv->reg->clkcon); -+ clk_con = readw(&priv->reg->clkcon); -+ debug("%s: final CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); -+ -+ if (timeout == 0) { -+ printf("%s: Warning: Autocal timed out!\n", __func__); -+ /* TBD: Set CFG2TMC_SDMMC1_PAD_CAL_DRV* regs here */ -+ } -+ -+#if defined(CONFIG_TEGRA210) -+ u32 tap_value, trim_value; -+ -+ /* Set tap/trim values for SDMMC1/3 @ <48MHz here */ -+ val = readl(&priv->reg->venspictl); /* aka VENDOR_SYS_SW_CNTL */ -+ val &= IO_TRIM_BYPASS_MASK; -+ if (id == PERIPH_ID_SDMMC1) { -+ tap_value = 4; /* default */ -+ if (val) -+ tap_value = 3; -+ trim_value = 2; -+ } else { /* SDMMC3 */ -+ tap_value = 3; -+ trim_value = 3; -+ } -+ -+ val = readl(&priv->reg->venclkctl); -+ val &= ~TRIM_VAL_MASK; -+ val |= (trim_value << TRIM_VAL_SHIFT); -+ val &= ~TAP_VAL_MASK; -+ val |= (tap_value << TAP_VAL_SHIFT); -+ writel(val, &priv->reg->venclkctl); -+ debug("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val); -+#endif /* T210 */ -+#endif /* T30/T210 */ - } - - static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc) -@@ -514,6 +575,13 @@ static int tegra_mmc_init(struct udevice *dev) - unsigned int mask; - debug(" tegra_mmc_init called\n"); - -+#if defined(CONFIG_TEGRA210) -+ priv->mmc_id = clock_decode_periph_id(dev); -+ if (priv->mmc_id == PERIPH_ID_NONE) { -+ printf("%s: Missing/invalid peripheral ID\n", __func__); -+ return -EINVAL; -+ } -+#endif - tegra_mmc_reset(priv, mmc); - - #if defined(CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK) - -From patchwork Thu Mar 26 22:30:22 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262386 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 26 Mar 2020 15:30:35 -0700 -X-PGP-Universal: processed; - by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 15:30:35 -0700 -Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com - (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:30:35 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com - (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 22:30:35 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:30:34 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 2/2] mmc: t210: Fix 'bad' SD-card clock when doing 400KHz - card detect -Date: Thu, 26 Mar 2020 15:30:22 -0700 -Message-ID: <1585261822-3420-3-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585261822-3420-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -According to the HW team, for some reason the normal clock select code -picks what appears to be a perfectly valid 375KHz SD card clock, based -on the CAR clock source and SDMMC1 controller register settings (CAR = -408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register -divisor of 16 = 375KHz). But the resulting SD card clock, as measured by -the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the -values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR -clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on -T210 when the requested clock is <= 400KHz. Note that as far as I can -tell, the other requests for clocks in the Tegra MMC driver result in -valid SD clocks. - -Signed-off-by: Tom Warren ---- -Changes for v2: - - None - - arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 +- - drivers/mmc/tegra_mmc.c | 18 ++++++++++++++++++ - 2 files changed, 19 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h -index a8bfa46..70dcf4a 100644 ---- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h -+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h -@@ -130,9 +130,9 @@ struct tegra_mmc { - /* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */ - #define MEMCOMP_PADCTRL_VREF 7 - #define AUTO_CAL_ENABLE (1 << 29) --#if defined(CONFIG_TEGRA210) - #define AUTO_CAL_ACTIVE (1 << 31) - #define AUTO_CAL_START (1 << 31) -+#if defined(CONFIG_TEGRA210) - #define AUTO_CAL_PD_OFFSET (0x7D << 8) - #define AUTO_CAL_PU_OFFSET (0 << 0) - #define IO_TRIM_BYPASS_MASK (1 << 2) -diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c -index 73ac58c..03110ba 100644 ---- a/drivers/mmc/tegra_mmc.c -+++ b/drivers/mmc/tegra_mmc.c -@@ -376,6 +376,24 @@ static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock) - - rate = clk_set_rate(&priv->clk, clock); - div = (rate + clock - 1) / clock; -+ -+#if defined(CONFIG_TEGRA210) -+ if (priv->mmc_id == PERIPH_ID_SDMMC1 && clock <= 400000) { -+ /* clock_adjust_periph_pll_div() chooses a 'bad' clock -+ * on SDMMC1 T210, so skip it here and force a clock -+ * that's been spec'd in the table in the TRM for -+ * card-detect (400KHz). -+ */ -+ uint effective_rate = clock_adjust_periph_pll_div(priv->mmc_id, -+ CLOCK_ID_PERIPH, 24727273, NULL); -+ div = 62; -+ -+ debug("%s: WAR: Using SDMMC1 clock of %u, div %d to achieve %dHz card clock ...\n", -+ __func__, effective_rate, div, clock); -+ } else -+ clock_adjust_periph_pll_div(priv->mmc_id, CLOCK_ID_PERIPH, clock, -+ &div); -+#endif - debug("div = %d\n", div); - - writew(0, &priv->reg->clkcon); diff --git a/mtd-spi-Add-Macronix-MX25U3235F-device.patch b/mtd-spi-Add-Macronix-MX25U3235F-device.patch deleted file mode 100644 index 117fe28..0000000 --- a/mtd-spi-Add-Macronix-MX25U3235F-device.patch +++ /dev/null @@ -1,116 +0,0 @@ -From patchwork Thu Mar 26 21:59:01 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262368 -X-Patchwork-Delegate: jagannadh.teki@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) - server-digest SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pJmv0yfHz9sPR - for ; - Fri, 27 Mar 2020 08:59:42 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id A34AC80199; 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Thu, 26 Mar 2020 14:59:00 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH] mtd: spi: Add Macronix MX25U3235F device -Date: Thu, 26 Mar 2020 14:59:01 -0700 -Message-ID: <1585259941-28879-1-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -Add Macronix MX25U3235F flash device description. -This is a 4MiB part. - -Signed-off-by: Tom Warren ---- - drivers/mtd/spi/spi-nor-ids.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c -index 973b6f8..abdf560 100644 ---- a/drivers/mtd/spi/spi-nor-ids.c -+++ b/drivers/mtd/spi/spi-nor-ids.c -@@ -147,6 +147,7 @@ const struct flash_info spi_nor_ids[] = { - { INFO("mx25l6405d", 0xc22017, 0, 64 * 1024, 128, SECT_4K) }, - { INFO("mx25u2033e", 0xc22532, 0, 64 * 1024, 4, SECT_4K) }, - { INFO("mx25u1635e", 0xc22535, 0, 64 * 1024, 32, SECT_4K) }, -+ { INFO("mx25u3235f", 0xc22536, 0, 4 * 1024, 1024, SECT_4K) }, - { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, - { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) }, - { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, diff --git a/net-tegra-Misc-network-fixes.patch b/net-tegra-Misc-network-fixes.patch deleted file mode 100644 index d177516..0000000 --- a/net-tegra-Misc-network-fixes.patch +++ /dev/null @@ -1,310 +0,0 @@ -From patchwork Thu Mar 26 22:59:13 2020 -Content-Type: text/plain; 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- spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 15:57:38 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate101.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 15:59:10 -0700 -X-PGP-Universal: processed; - by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 15:59:10 -0700 -Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL109.nvidia.com - (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:59:09 +0000 -Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com - (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 - via Frontend Transport; Thu, 26 Mar 2020 22:59:10 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - hqnvemgw03.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:59:09 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 1/2] net: rt8169: WAR for DHCP not getting IP after kernel - boot/reboot -Date: Thu, 26 Mar 2020 15:59:13 -0700 -Message-ID: <1585263554-10258-2-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -This is a WAR for DHCP failure after rebooting from the L4T kernel. The -r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0, -which goes by FuncEvent and MISC in various driver source/datasheets. -That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it -here at the end of probe to ensure that U-Boot can get an IP assigned -via DHCP. - -Signed-off-by: Tom Warren ---- - drivers/net/rtl8169.c | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index 5ccdfdd..ff89e28 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -237,6 +237,9 @@ enum RTL8169_register_content { - - /*_TBICSRBit*/ - TBILinkOK = 0x02000000, -+ -+ /* FuncEvent/Misc */ -+ RxDv_Gated_En = 0x80000, - }; - - static struct { -@@ -1207,6 +1210,19 @@ static int rtl8169_eth_probe(struct udevice *dev) - return ret; - } - -+ /* -+ * WAR for DHCP failure after rebooting from kernel. -+ * Clear RxDv_Gated_En bit which was set by kernel driver. -+ * Without this, U-Boot can't get an IP via DHCP. -+ * Register (FuncEvent, aka MISC) and RXDV_GATED_EN bit are from -+ * the r8169.c kernel driver. -+ */ -+ -+ u32 val = RTL_R32(FuncEvent); -+ debug("%s: FuncEvent/Misc (0xF0) = 0x%08X\n", __func__, val); -+ val &= ~RxDv_Gated_En; -+ RTL_W32(FuncEvent, val); -+ - return 0; - } - - -From patchwork Thu Mar 26 22:59:14 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262417 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pL6B04lDz9sSH - for ; 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Thu, 26 Mar 2020 15:59:10 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 2/2] tegra: Enable CONFIG_BOOTP_PREFER_SERVERIP for all - Jetson boards -Date: Thu, 26 Mar 2020 15:59:14 -0700 -Message-ID: <1585263554-10258-3-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585263554-10258-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -This allows the user to set $serverip in the environment before -executing a DHCP request. If they do, U-Boot will use that IP rather -than using the IP in the DHCP response. - -Signed-off-by: Tom Warren -Acked-by: Stephen Warren ---- - configs/e2220-1170_defconfig | 1 + - configs/p2371-0000_defconfig | 1 + - configs/p2371-2180_defconfig | 1 + - configs/p2571_defconfig | 1 + - configs/p2771-0000-000_defconfig | 1 + - configs/p2771-0000-500_defconfig | 1 + - 6 files changed, 6 insertions(+) - -diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig -index 1639040..951ed1d 100644 ---- a/configs/e2220-1170_defconfig -+++ b/configs/e2220-1170_defconfig -@@ -43,3 +43,4 @@ CONFIG_CI_UDC=y - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y -+CONFIG_BOOTP_PREFER_SERVERIP=y -diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig -index 2070199..7081719 100644 ---- a/configs/p2371-0000_defconfig -+++ b/configs/p2371-0000_defconfig -@@ -44,3 +44,4 @@ CONFIG_CI_UDC=y - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y -+CONFIG_BOOTP_PREFER_SERVERIP=y -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index 8c808ae..c70217c 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -52,3 +52,4 @@ CONFIG_CI_UDC=y - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y -+CONFIG_BOOTP_PREFER_SERVERIP=y -diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig -index 721c5c5..43c24b8 100644 ---- a/configs/p2571_defconfig -+++ b/configs/p2571_defconfig -@@ -44,3 +44,4 @@ CONFIG_CI_UDC=y - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y -+CONFIG_BOOTP_PREFER_SERVERIP=y -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index e347a77..8bf8419 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -37,3 +37,4 @@ CONFIG_SYS_NS16550=y - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_POSITION_INDEPENDENT=y -+CONFIG_BOOTP_PREFER_SERVERIP=y -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index 0803b26..1f40333 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -37,3 +37,4 @@ CONFIG_SYS_NS16550=y - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_POSITION_INDEPENDENT=y -+CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch b/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch deleted file mode 100644 index 2257083..0000000 --- a/qspi-t210-fix-claim_bus-and-clock-tap-delays.patch +++ /dev/null @@ -1,453 +0,0 @@ -From patchwork Thu Mar 26 22:42:00 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262404 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pKkD6xnVz9sRR - for ; - Fri, 27 Mar 2020 09:42:28 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 798238183F; 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- spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 15:41:16 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate102.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 15:42:02 -0700 -X-PGP-Universal: processed; - by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:42:02 -0700 -Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com - (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:42:01 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com - (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 22:42:01 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:42:01 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 1/3] qspi: t210: Fix claim_bus's use of the wrong bus/device -Date: Thu, 26 Mar 2020 15:42:00 -0700 -Message-ID: <1585262522-6127-2-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -claim_bus() is passed a udevice *dev, which is the bus device's parent. -In this driver, claim_bus assumed it was the bus, which caused the -'priv' info pointer to be wrong, and periph_id was incorrect. This in -turn caused the periph clock call to assign the wrong clock (PLLM -instead of PLLP0), which caused a kernel warning. I only saw the 'bad' -periph_id when enabling DEBUG due to an assert. Not sure how QSPI was -working w/this errant clock, but it was moot as QSPI wasn't active -unless you probed it, and that wasn't happening until I posted a patch -to enable env save to QSPI for Nano (coming soon). - -Signed-off-by: Tom Warren ---- - Changes in v2: - - None - - drivers/spi/tegra210_qspi.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c -index d82ecaa..2a77126 100644 ---- a/drivers/spi/tegra210_qspi.c -+++ b/drivers/spi/tegra210_qspi.c -@@ -2,7 +2,8 @@ - /* - * NVIDIA Tegra210 QSPI controller driver - * -- * (C) Copyright 2015 NVIDIA Corporation -+ * (C) Copyright 2015-2019 NVIDIA Corporation -+ * - */ - - #include -@@ -137,8 +138,9 @@ static int tegra210_qspi_probe(struct udevice *bus) - return 0; - } - --static int tegra210_qspi_claim_bus(struct udevice *bus) -+static int tegra210_qspi_claim_bus(struct udevice *dev) - { -+ struct udevice *bus = dev->parent; - struct tegra210_qspi_priv *priv = dev_get_priv(bus); - struct qspi_regs *regs = priv->regs; - - -From patchwork Thu Mar 26 22:42:01 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262405 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pKkQ1xG5z9sRR - for ; - Fri, 27 Mar 2020 09:42:38 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 0EBF581883; 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- spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 15:41:16 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate102.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 15:42:02 -0700 -X-PGP-Universal: processed; - by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:42:02 -0700 -Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL107.nvidia.com - (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:42:02 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com - (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 22:42:02 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:42:02 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 2/3] qspi: t210: Fix QSPI clock and tap delays -Date: Thu, 26 Mar 2020 15:42:01 -0700 -Message-ID: <1585262522-6127-3-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -When claim_bus was setting the clock, it reset the QSPI controller, -which wipes out any tap delays set by previous bootloaders (nvtboot, -CBoot for example on Nano). Instead of doing that in claim_bus, which -gets called a lot, moved clock setting to probe(), and set tap delays -there, too. Also updated clock to 80MHz to match CBoot. Now QSPI env -save works reliably again. - -Signed-off-by: Tom Warren ---- - Changes in v2: - - None - - drivers/spi/tegra210_qspi.c | 19 ++++++++++++------- - 1 file changed, 12 insertions(+), 7 deletions(-) - -diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c -index 2a77126..4284ea9 100644 ---- a/drivers/spi/tegra210_qspi.c -+++ b/drivers/spi/tegra210_qspi.c -@@ -42,10 +42,10 @@ DECLARE_GLOBAL_DATA_PTR; - #define QSPI_CMD1_BITLEN_SHIFT 0 - - /* COMMAND2 */ --#define QSPI_CMD2_TX_CLK_TAP_DELAY BIT(6) --#define QSPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(11,6) --#define QSPI_CMD2_RX_CLK_TAP_DELAY BIT(0) --#define QSPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(5,0) -+#define QSPI_CMD2_TX_CLK_TAP_DELAY_SHIFT 10 -+#define QSPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(14,10) -+#define QSPI_CMD2_RX_CLK_TAP_DELAY_SHIFT 0 -+#define QSPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(7,0) - - /* TRANSFER STATUS */ - #define QSPI_XFER_STS_RDY BIT(30) -@@ -127,14 +127,22 @@ static int tegra210_qspi_probe(struct udevice *bus) - struct tegra210_qspi_priv *priv = dev_get_priv(bus); - - priv->regs = (struct qspi_regs *)plat->base; -+ struct qspi_regs *regs = priv->regs; - - priv->last_transaction_us = timer_get_us(); - priv->freq = plat->frequency; - priv->periph_id = plat->periph_id; - -+ debug("%s: Freq = %u, id = %d\n", __func__, priv->freq, priv->periph_id); - /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); - -+ /* Set tap delays here, clock change above resets QSPI controller */ -+ u32 reg = (0x09 << QSPI_CMD2_TX_CLK_TAP_DELAY_SHIFT) | -+ (0x0C << QSPI_CMD2_RX_CLK_TAP_DELAY_SHIFT); -+ writel(reg, ®s->command2); -+ debug("%s: COMMAND2 = %08x\n", __func__, readl(®s->command2)); -+ - return 0; - } - -@@ -144,9 +152,6 @@ static int tegra210_qspi_claim_bus(struct udevice *dev) - struct tegra210_qspi_priv *priv = dev_get_priv(bus); - struct qspi_regs *regs = priv->regs; - -- /* Change SPI clock to correct frequency, PLLP_OUT0 source */ -- clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); -- - debug("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); - - /* Set master mode and sw controlled CS */ - -From patchwork Thu Mar 26 22:42:02 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262406 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pKkb4wzBz9sRR - for ; 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Thu, 26 Mar 2020 15:42:02 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 3/3] qspi: t210: Use dev_read calls to get FDT data like - base, freq -Date: Thu, 26 Mar 2020 15:42:02 -0700 -Message-ID: <1585262522-6127-4-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585262522-6127-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -This Tegra QSPI driver hadn't been brought up to date with how -DM drivers are fetching data from the FDT now, and was pulling -in bogus data for base, max freq, etc. Fixed ofdata_to_platdata -to work the same way it does in the tegra114 SPI driver, using -dev_read_ functions. - -Signed-off-by: Tom Warren ---- - Changes in v2: - - New - - drivers/spi/tegra210_qspi.c | 10 ++++------ - 1 file changed, 4 insertions(+), 6 deletions(-) - -diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c -index 4284ea9..466d572 100644 ---- a/drivers/spi/tegra210_qspi.c -+++ b/drivers/spi/tegra210_qspi.c -@@ -2,7 +2,7 @@ - /* - * NVIDIA Tegra210 QSPI controller driver - * -- * (C) Copyright 2015-2019 NVIDIA Corporation -+ * (C) Copyright 2015-2020 NVIDIA Corporation - * - */ - -@@ -97,10 +97,8 @@ struct tegra210_qspi_priv { - static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus) - { - struct tegra_spi_platdata *plat = bus->platdata; -- const void *blob = gd->fdt_blob; -- int node = dev_of_offset(bus); - -- plat->base = devfdt_get_addr(bus); -+ plat->base = dev_read_addr(bus); - plat->periph_id = clock_decode_periph_id(bus); - - if (plat->periph_id == PERIPH_ID_NONE) { -@@ -110,9 +108,9 @@ static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus) - } - - /* Use 500KHz as a suitable default */ -- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", -+ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", - 500000); -- plat->deactivate_delay_us = fdtdec_get_int(blob, node, -+ plat->deactivate_delay_us = dev_read_u32_default(bus, - "spi-deactivate-delay", 0); - debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", - __func__, plat->base, plat->periph_id, plat->frequency, diff --git a/sources b/sources index 4c62613..50992b8 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04-rc4.tar.bz2) = 0e8acc06aae5e009122d06fa1cf89d2a428796bfd44b71907493e6c83480b71949e03cb432ebcd78df90fd1fbf21a1d586bb174ad90257b5e64ac41661f974b3 +SHA512 (u-boot-2020.04-rc5.tar.bz2) = 4fed5a45e9ebfc931cb4f06bbdb9ec1a477ed7dff902b8e9013fc7e41a78e4448749b88c450ee5ce62b6756031ec250f11e9afbea01bab2702ac6e9bb22f4ad2 diff --git a/t210-miscellaneous-patches.patch b/t210-miscellaneous-patches.patch deleted file mode 100644 index ec41c55..0000000 --- a/t210-miscellaneous-patches.patch +++ /dev/null @@ -1,2026 +0,0 @@ -From patchwork Thu Mar 26 23:10:09 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262431 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pLLj2Nttz9sSL - for ; - Fri, 27 Mar 2020 10:10:37 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 67ACD818A2; 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- spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 16:08:35 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate102.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 16:10:07 -0700 -X-PGP-Universal: processed; - by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 16:10:07 -0700 -Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com - (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 23:10:07 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com - (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 23:10:07 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 16:10:06 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 1/3] t210: do not enable PLLE and UPHY PLL HW PWRSEQ -Date: Thu, 26 Mar 2020 16:10:09 -0700 -Message-ID: <1585264211-13739-2-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: JC Kuo - -This commit removes the programming sequence that enables PLLE and UPHY -PLL hardware power sequencers. Per TRM, boot software should enable PLLE -and UPHY PLLs in software controlled power-on state and should power -down PLL before jumping into kernel or the next stage boot software. - -Adds call to board_cleanup_before_linux to facilitate this. - -Signed-off-by: JC Kuo -Signed-off-by: Tom Warren -Acked-by: Stephen Warren ---- - arch/arm/cpu/armv8/cpu.c | 5 ++ - arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + - arch/arm/mach-tegra/board2.c | 6 +++ - arch/arm/mach-tegra/tegra210/clock.c | 19 -------- - arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 +++++++++++++++++---------- - arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ - 6 files changed, 59 insertions(+), 44 deletions(-) - -diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c -index 2467e0b..3575203 100644 ---- a/arch/arm/cpu/armv8/cpu.c -+++ b/arch/arm/cpu/armv8/cpu.c -@@ -32,6 +32,8 @@ void sdelay(unsigned long loops) - "b.ne 1b" : "=r" (loops) : "0"(loops) : "cc"); - } - -+void __weak board_cleanup_before_linux(void){} -+ - int cleanup_before_linux(void) - { - /* -@@ -40,6 +42,9 @@ int cleanup_before_linux(void) - * - * disable interrupt and turn off caches etc ... - */ -+ -+ board_cleanup_before_linux(); -+ - disable_interrupts(); - - /* -diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h -index deccdf4..7e14d81 100644 ---- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h -+++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h -@@ -16,6 +16,7 @@ struct tegra_xusb_phy; - struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type); - - void tegra_xusb_padctl_init(void); -+void tegra_xusb_padctl_exit(void); - int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy); - int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy); - int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy); -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index d3497a2..787ff97 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -181,6 +181,12 @@ int board_init(void) - return nvidia_board_init(); - } - -+void board_cleanup_before_linux(void) -+{ -+ /* power down UPHY PLL */ -+ tegra_xusb_padctl_exit(); -+} -+ - #ifdef CONFIG_BOARD_EARLY_INIT_F - static void __gpio_early_init(void) - { -diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c -index b240860..f1b25e2 100644 ---- a/arch/arm/mach-tegra/tegra210/clock.c -+++ b/arch/arm/mach-tegra/tegra210/clock.c -@@ -1235,25 +1235,6 @@ int tegra_plle_enable(void) - value &= ~PLLE_SS_CNTL_INTERP_RESET; - writel(value, NV_PA_CLK_RST_BASE + PLLE_SS_CNTL); - -- /* 7. Enable HW power sequencer for PLLE */ -- -- value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); -- value &= ~PLLE_MISC_IDDQ_SWCTL; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); -- -- value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); -- value &= ~PLLE_AUX_SS_SWCTL; -- value &= ~PLLE_AUX_ENABLE_SWCTL; -- value |= PLLE_AUX_SS_SEQ_INCLUDE; -- value |= PLLE_AUX_USE_LOCKDET; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); -- -- /* 8. Wait 1 us */ -- -- udelay(1); -- value |= PLLE_AUX_SEQ_ENABLE; -- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); -- - return 0; - } - -diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c -index ab6684f..64dc297 100644 ---- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c -+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c -@@ -170,6 +170,17 @@ static int phy_unprepare(struct tegra_xusb_phy *phy) - return tegra_xusb_padctl_disable(phy->padctl); - } - -+#define XUSB_PADCTL_USB3_PAD_MUX 0x28 -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE (1 << 0) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 (1 << 1) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 (1 << 2) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 (1 << 3) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 (1 << 4) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 (1 << 5) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 (1 << 6) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 (1 << 7) -+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 (1 << 8) -+ - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK (0xff << 20) - #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(x) (((x) & 0xff) << 20) -@@ -366,31 +377,6 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) - value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; - padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); - -- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- value &= ~CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; -- value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL; -- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET; -- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ; -- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); -- -- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); -- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; -- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); -- -- udelay(1); -- -- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- value |= CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE; -- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); -- - debug("< %s()\n", __func__); - return 0; - } -@@ -454,3 +440,35 @@ void tegra_xusb_padctl_init(void) - ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata); - debug("%s: done, ret=%d\n", __func__, ret); - } -+ -+void tegra_xusb_padctl_exit(void) -+{ -+ u32 value; -+ -+ debug("> %s\n", __func__); -+ -+ value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX); -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6; -+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0; -+ padctl_writel(&padctl, value, XUSB_PADCTL_USB3_PAD_MUX); -+ -+ value = padctl_readl(&padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ; -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK; -+ value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(3); -+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE; -+ padctl_writel(&padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); -+ -+ reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1); -+ while (padctl.enable) -+ tegra_xusb_padctl_disable(&padctl); -+ -+ debug("< %s()\n", __func__); -+} -diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c -index 3ec27a2..f2d9030 100644 ---- a/arch/arm/mach-tegra/xusb-padctl-dummy.c -+++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c -@@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy) - void __weak tegra_xusb_padctl_init(void) - { - } -+ -+void __weak tegra_xusb_padctl_exit(void) -+{ -+} - -From patchwork Thu Mar 26 23:10:10 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262432 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pLLv1LHNz9sSH - for ; - Fri, 27 Mar 2020 10:10:47 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 78C138188A; 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Adjust the load addresses to fix this for now. -Using the calculated_env addresses table from T186 U-Boot is a -better fix, but it isn't working correctly on T210 U-Boot right now, -so this will do until I can fix it. - -Signed-off-by: Tom Warren ---- - include/configs/tegra210-common.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h -index 1c53311..1b8e94b 100644 ---- a/include/configs/tegra210-common.h -+++ b/include/configs/tegra210-common.h -@@ -46,8 +46,8 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -- "fdt_addr_r=0x82000000\0" \ -- "ramdisk_addr_r=0x82100000\0" -+ "fdt_addr_r=0x83000000\0" \ -+ "ramdisk_addr_r=0x83200000\0" - - /* For USB EHCI controller */ - #define CONFIG_EHCI_IS_TDI - -From patchwork Thu Mar 26 23:10:11 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Tom Warren -X-Patchwork-Id: 1262433 -X-Patchwork-Delegate: twarren@nvidia.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=gmail.com -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 48pLM80QC1z9sSL - for ; - Fri, 27 Mar 2020 10:10:59 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id F404281888; - Fri, 27 Mar 2020 00:10:56 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 9953D81888; Fri, 27 Mar 2020 00:10:33 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=0.0 required=5.0 tests=BAYES_00, - DKIM_ADSP_CUSTOM_MED, - FORGED_GMAIL_RCVD,FREEMAIL_FROM,NML_ADSP_CUSTOM_MED,SPF_HELO_NONE, - UPPERCASE_75_100,URIBL_BLOCKED autolearn=no autolearn_force=no - version=3.4.2 -Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com - [216.228.121.65]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 - bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id B819481843 - for ; Fri, 27 Mar 2020 00:10:10 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 16:09:55 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate101.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 16:10:09 -0700 -X-PGP-Universal: processed; - by hqpgpgate101.nvidia.com on Thu, 26 Mar 2020 16:10:09 -0700 -Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL111.nvidia.com - (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 23:10:08 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com - (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 23:10:08 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 16:10:08 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 3/3] t210: pinmux: Remove pinmux/GPIO init from T210 boards -Date: Thu, 26 Mar 2020 16:10:11 -0700 -Message-ID: <1585264211-13739-4-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585264211-13739-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB -tables. Remove pinmux/GPIO init tables & code from all T210-based builds -below: - -p2371-2180 aka TX1 -p2371-0000 -e2220-1170 -p2571 - -Signed-off-by: Tom Warren -Acked-by: Stephen Warren ---- - arch/arm/mach-tegra/tegra210/Makefile | 3 +- - arch/arm/mach-tegra/tegra210/pinmux.c | 194 -------------- - board/nvidia/e2220-1170/e2220-1170.c | 21 +- - board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 276 -------------------- - board/nvidia/p2371-0000/p2371-0000.c | 21 +- - board/nvidia/p2371-0000/pinmux-config-p2371-0000.h | 267 -------------------- - board/nvidia/p2371-2180/p2371-2180.c | 21 +- - board/nvidia/p2371-2180/pinmux-config-p2371-2180.h | 278 --------------------- - board/nvidia/p2571/p2571.c | 21 +- - board/nvidia/p2571/pinmux-config-p2571.h | 242 ------------------ - 10 files changed, 5 insertions(+), 1339 deletions(-) - delete mode 100644 arch/arm/mach-tegra/tegra210/pinmux.c - delete mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h - delete mode 100644 board/nvidia/p2371-0000/pinmux-config-p2371-0000.h - delete mode 100644 board/nvidia/p2371-2180/pinmux-config-p2371-2180.h - delete mode 100644 board/nvidia/p2571/pinmux-config-p2571.h - -diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile -index b6012fc..cfcba5b 100644 ---- a/arch/arm/mach-tegra/tegra210/Makefile -+++ b/arch/arm/mach-tegra/tegra210/Makefile -@@ -1,5 +1,5 @@ - # --# (C) Copyright 2013-2015 -+# (C) Copyright 2013-2020 - # NVIDIA Corporation - # - # SPDX-License-Identifier: GPL-2.0+ -@@ -7,6 +7,5 @@ - - obj-y += clock.o - obj-y += funcmux.o --obj-y += pinmux.o - obj-y += xusb-padctl.o - obj-y += ../xusb-padctl-common.o -diff --git a/arch/arm/mach-tegra/tegra210/pinmux.c b/arch/arm/mach-tegra/tegra210/pinmux.c -deleted file mode 100644 -index 6158099..0000000 ---- a/arch/arm/mach-tegra/tegra210/pinmux.c -+++ /dev/null -@@ -1,194 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. -- */ -- --#include --#include --#include -- --#define PIN(pin, f0, f1, f2, f3) \ -- { \ -- .funcs = { \ -- PMUX_FUNC_##f0, \ -- PMUX_FUNC_##f1, \ -- PMUX_FUNC_##f2, \ -- PMUX_FUNC_##f3, \ -- }, \ -- } -- --#define PIN_RESERVED {} -- --static const struct pmux_pingrp_desc tegra210_pingroups[] = { -- /* pin, f0, f1, f2, f3 */ -- /* Offset 0x3000 */ -- PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3), -- PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3), -- PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3), -- PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3), -- PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3), -- PIN_RESERVED, -- /* Offset 0x301c */ -- PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC3_DAT1_PP4, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC3_DAT2_PP3, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(SDMMC3_DAT3_PP2, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN_RESERVED, -- /* Offset 0x3038 */ -- PIN(PEX_L0_RST_N_PA0, PE0, RSVD1, RSVD2, RSVD3), -- PIN(PEX_L0_CLKREQ_N_PA1, PE0, RSVD1, RSVD2, RSVD3), -- PIN(PEX_WAKE_N_PA2, PE, RSVD1, RSVD2, RSVD3), -- PIN(PEX_L1_RST_N_PA3, PE1, RSVD1, RSVD2, RSVD3), -- PIN(PEX_L1_CLKREQ_N_PA4, PE1, RSVD1, RSVD2, RSVD3), -- PIN(SATA_LED_ACTIVE_PA5, SATA, RSVD1, RSVD2, RSVD3), -- PIN(SPI1_MOSI_PC0, SPI1, RSVD1, RSVD2, RSVD3), -- PIN(SPI1_MISO_PC1, SPI1, RSVD1, RSVD2, RSVD3), -- PIN(SPI1_SCK_PC2, SPI1, RSVD1, RSVD2, RSVD3), -- PIN(SPI1_CS0_PC3, SPI1, RSVD1, RSVD2, RSVD3), -- PIN(SPI1_CS1_PC4, SPI1, RSVD1, RSVD2, RSVD3), -- PIN(SPI2_MOSI_PB4, SPI2, DTV, RSVD2, RSVD3), -- PIN(SPI2_MISO_PB5, SPI2, DTV, RSVD2, RSVD3), -- PIN(SPI2_SCK_PB6, SPI2, DTV, RSVD2, RSVD3), -- PIN(SPI2_CS0_PB7, SPI2, DTV, RSVD2, RSVD3), -- PIN(SPI2_CS1_PDD0, SPI2, RSVD1, RSVD2, RSVD3), -- PIN(SPI4_MOSI_PC7, SPI4, RSVD1, RSVD2, RSVD3), -- PIN(SPI4_MISO_PD0, SPI4, RSVD1, RSVD2, RSVD3), -- PIN(SPI4_SCK_PC5, SPI4, RSVD1, RSVD2, RSVD3), -- PIN(SPI4_CS0_PC6, SPI4, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_SCK_PEE0, QSPI, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_CS_N_PEE1, QSPI, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_IO0_PEE2, QSPI, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_IO1_PEE3, QSPI, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_IO2_PEE4, QSPI, RSVD1, RSVD2, RSVD3), -- PIN(QSPI_IO3_PEE5, QSPI, RSVD1, RSVD2, RSVD3), -- PIN_RESERVED, -- /* Offset 0x30a4 */ -- PIN(DMIC1_CLK_PE0, DMIC1, I2S3, RSVD2, RSVD3), -- PIN(DMIC1_DAT_PE1, DMIC1, I2S3, RSVD2, RSVD3), -- PIN(DMIC2_CLK_PE2, DMIC2, I2S3, RSVD2, RSVD3), -- PIN(DMIC2_DAT_PE3, DMIC2, I2S3, RSVD2, RSVD3), -- PIN(DMIC3_CLK_PE4, DMIC3, I2S5A, RSVD2, RSVD3), -- PIN(DMIC3_DAT_PE5, DMIC3, I2S5A, RSVD2, RSVD3), -- PIN(GEN1_I2C_SCL_PJ1, I2C1, RSVD1, RSVD2, RSVD3), -- PIN(GEN1_I2C_SDA_PJ0, I2C1, RSVD1, RSVD2, RSVD3), -- PIN(GEN2_I2C_SCL_PJ2, I2C2, RSVD1, RSVD2, RSVD3), -- PIN(GEN2_I2C_SDA_PJ3, I2C2, RSVD1, RSVD2, RSVD3), -- PIN(GEN3_I2C_SCL_PF0, I2C3, RSVD1, RSVD2, RSVD3), -- PIN(GEN3_I2C_SDA_PF1, I2C3, RSVD1, RSVD2, RSVD3), -- PIN(CAM_I2C_SCL_PS2, I2C3, I2CVI, RSVD2, RSVD3), -- PIN(CAM_I2C_SDA_PS3, I2C3, I2CVI, RSVD2, RSVD3), -- PIN(PWR_I2C_SCL_PY3, I2CPMU, RSVD1, RSVD2, RSVD3), -- PIN(PWR_I2C_SDA_PY4, I2CPMU, RSVD1, RSVD2, RSVD3), -- PIN(UART1_TX_PU0, UARTA, RSVD1, RSVD2, RSVD3), -- PIN(UART1_RX_PU1, UARTA, RSVD1, RSVD2, RSVD3), -- PIN(UART1_RTS_PU2, UARTA, RSVD1, RSVD2, RSVD3), -- PIN(UART1_CTS_PU3, UARTA, RSVD1, RSVD2, RSVD3), -- PIN(UART2_TX_PG0, UARTB, I2S4A, SPDIF, UART), -- PIN(UART2_RX_PG1, UARTB, I2S4A, SPDIF, UART), -- PIN(UART2_RTS_PG2, UARTB, I2S4A, RSVD2, UART), -- PIN(UART2_CTS_PG3, UARTB, I2S4A, RSVD2, UART), -- PIN(UART3_TX_PD1, UARTC, SPI4, RSVD2, RSVD3), -- PIN(UART3_RX_PD2, UARTC, SPI4, RSVD2, RSVD3), -- PIN(UART3_RTS_PD3, UARTC, SPI4, RSVD2, RSVD3), -- PIN(UART3_CTS_PD4, UARTC, SPI4, RSVD2, RSVD3), -- PIN(UART4_TX_PI4, UARTD, UART, RSVD2, RSVD3), -- PIN(UART4_RX_PI5, UARTD, UART, RSVD2, RSVD3), -- PIN(UART4_RTS_PI6, UARTD, UART, RSVD2, RSVD3), -- PIN(UART4_CTS_PI7, UARTD, UART, RSVD2, RSVD3), -- PIN(DAP1_FS_PB0, I2S1, RSVD1, RSVD2, RSVD3), -- PIN(DAP1_DIN_PB1, I2S1, RSVD1, RSVD2, RSVD3), -- PIN(DAP1_DOUT_PB2, I2S1, RSVD1, RSVD2, RSVD3), -- PIN(DAP1_SCLK_PB3, I2S1, RSVD1, RSVD2, RSVD3), -- PIN(DAP2_FS_PAA0, I2S2, RSVD1, RSVD2, RSVD3), -- PIN(DAP2_DIN_PAA2, I2S2, RSVD1, RSVD2, RSVD3), -- PIN(DAP2_DOUT_PAA3, I2S2, RSVD1, RSVD2, RSVD3), -- PIN(DAP2_SCLK_PAA1, I2S2, RSVD1, RSVD2, RSVD3), -- PIN(DAP4_FS_PJ4, I2S4B, RSVD1, RSVD2, RSVD3), -- PIN(DAP4_DIN_PJ5, I2S4B, RSVD1, RSVD2, RSVD3), -- PIN(DAP4_DOUT_PJ6, I2S4B, RSVD1, RSVD2, RSVD3), -- PIN(DAP4_SCLK_PJ7, I2S4B, RSVD1, RSVD2, RSVD3), -- PIN(CAM1_MCLK_PS0, EXTPERIPH3, RSVD1, RSVD2, RSVD3), -- PIN(CAM2_MCLK_PS1, EXTPERIPH3, RSVD1, RSVD2, RSVD3), -- PIN(JTAG_RTCK, JTAG, RSVD1, RSVD2, RSVD3), -- PIN(CLK_32K_IN, CLK, RSVD1, RSVD2, RSVD3), -- PIN(CLK_32K_OUT_PY5, SOC, BLINK, RSVD2, RSVD3), -- PIN(BATT_BCL, BCL, RSVD1, RSVD2, RSVD3), -- PIN(CLK_REQ, SYS, RSVD1, RSVD2, RSVD3), -- PIN(CPU_PWR_REQ, CPU, RSVD1, RSVD2, RSVD3), -- PIN(PWR_INT_N, PMI, RSVD1, RSVD2, RSVD3), -- PIN(SHUTDOWN, SHUTDOWN, RSVD1, RSVD2, RSVD3), -- PIN(CORE_PWR_REQ, CORE, RSVD1, RSVD2, RSVD3), -- PIN(AUD_MCLK_PBB0, AUD, RSVD1, RSVD2, RSVD3), -- PIN(DVFS_PWM_PBB1, RSVD0, CLDVFS, SPI3, RSVD3), -- PIN(DVFS_CLK_PBB2, RSVD0, CLDVFS, SPI3, RSVD3), -- PIN(GPIO_X1_AUD_PBB3, RSVD0, RSVD1, SPI3, RSVD3), -- PIN(GPIO_X3_AUD_PBB4, RSVD0, RSVD1, SPI3, RSVD3), -- PIN(PCC7, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(HDMI_CEC_PCC0, CEC, RSVD1, RSVD2, RSVD3), -- PIN(HDMI_INT_DP_HPD_PCC1, DP, RSVD1, RSVD2, RSVD3), -- PIN(SPDIF_OUT_PCC2, SPDIF, RSVD1, RSVD2, RSVD3), -- PIN(SPDIF_IN_PCC3, SPDIF, RSVD1, RSVD2, RSVD3), -- PIN(USB_VBUS_EN0_PCC4, USB, RSVD1, RSVD2, RSVD3), -- PIN(USB_VBUS_EN1_PCC5, USB, RSVD1, RSVD2, RSVD3), -- PIN(DP_HPD0_PCC6, DP, RSVD1, RSVD2, RSVD3), -- PIN(WIFI_EN_PH0, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(WIFI_RST_PH1, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(WIFI_WAKE_AP_PH2, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(AP_WAKE_BT_PH3, RSVD0, UARTB, SPDIF, RSVD3), -- PIN(BT_RST_PH4, RSVD0, UARTB, SPDIF, RSVD3), -- PIN(BT_WAKE_AP_PH5, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(AP_WAKE_NFC_PH7, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(NFC_EN_PI0, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(NFC_INT_PI1, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(GPS_EN_PI2, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(GPS_RST_PI3, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(CAM_RST_PS4, VGP1, RSVD1, RSVD2, RSVD3), -- PIN(CAM_AF_EN_PS5, VIMCLK, VGP2, RSVD2, RSVD3), -- PIN(CAM_FLASH_EN_PS6, VIMCLK, VGP3, RSVD2, RSVD3), -- PIN(CAM1_PWDN_PS7, VGP4, RSVD1, RSVD2, RSVD3), -- PIN(CAM2_PWDN_PT0, VGP5, RSVD1, RSVD2, RSVD3), -- PIN(CAM1_STROBE_PT1, VGP6, RSVD1, RSVD2, RSVD3), -- PIN(LCD_TE_PY2, DISPLAYA, RSVD1, RSVD2, RSVD3), -- PIN(LCD_BL_PWM_PV0, DISPLAYA, PWM0, SOR0, RSVD3), -- PIN(LCD_BL_EN_PV1, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(LCD_RST_PV2, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(LCD_GPIO1_PV3, DISPLAYB, RSVD1, RSVD2, RSVD3), -- PIN(LCD_GPIO2_PV4, DISPLAYB, PWM1, RSVD2, SOR1), -- PIN(AP_READY_PV5, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(TOUCH_RST_PV6, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(TOUCH_CLK_PV7, TOUCH, RSVD1, RSVD2, RSVD3), -- PIN(MODEM_WAKE_AP_PX0, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(TOUCH_INT_PX1, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(MOTION_INT_PX2, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(ALS_PROX_INT_PX3, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(TEMP_ALERT_PX4, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(BUTTON_POWER_ON_PX5, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(BUTTON_VOL_UP_PX6, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(BUTTON_VOL_DOWN_PX7, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(BUTTON_SLIDE_SW_PY0, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(BUTTON_HOME_PY1, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(PA6, SATA, RSVD1, RSVD2, RSVD3), -- PIN(PE6, RSVD0, I2S5A, PWM2, RSVD3), -- PIN(PE7, RSVD0, I2S5A, PWM3, RSVD3), -- PIN(PH6, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(PK0, IQC0, I2S5B, RSVD2, RSVD3), -- PIN(PK1, IQC0, I2S5B, RSVD2, RSVD3), -- PIN(PK2, IQC0, I2S5B, RSVD2, RSVD3), -- PIN(PK3, IQC0, I2S5B, RSVD2, RSVD3), -- PIN(PK4, IQC1, RSVD1, RSVD2, RSVD3), -- PIN(PK5, IQC1, RSVD1, RSVD2, RSVD3), -- PIN(PK6, IQC1, RSVD1, RSVD2, RSVD3), -- PIN(PK7, IQC1, RSVD1, RSVD2, RSVD3), -- PIN(PL0, RSVD0, RSVD1, RSVD2, RSVD3), -- PIN(PL1, SOC, RSVD1, RSVD2, RSVD3), -- PIN(PZ0, VIMCLK2, RSVD1, RSVD2, RSVD3), -- PIN(PZ1, VIMCLK2, SDMMC1, RSVD2, RSVD3), -- PIN(PZ2, SDMMC3, CCLA, RSVD2, RSVD3), -- PIN(PZ3, SDMMC3, RSVD1, RSVD2, RSVD3), -- PIN(PZ4, SDMMC1, RSVD1, RSVD2, RSVD3), -- PIN(PZ5, SOC, RSVD1, RSVD2, RSVD3), --}; --const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra210_pingroups; -diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c -index 8baaf2c..5aac040 100644 ---- a/board/nvidia/e2220-1170/e2220-1170.c -+++ b/board/nvidia/e2220-1170/e2220-1170.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * (C) Copyright 2013-2015 -+ * (C) Copyright 2013-2019 - * NVIDIA Corporation - */ - -@@ -9,7 +9,6 @@ - #include - #include - #include "../p2571/max77620_init.h" --#include "pinmux-config-e2220-1170.h" - - void pin_mux_mmc(void) - { -@@ -30,21 +29,3 @@ void pin_mux_mmc(void) - if (ret) - printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); - } -- --/* -- * Routine: pinmux_init -- * Description: Do individual peripheral pinmux configs -- */ --void pinmux_init(void) --{ -- pinmux_clear_tristate_input_clamping(); -- -- gpio_config_table(e2220_1170_gpio_inits, -- ARRAY_SIZE(e2220_1170_gpio_inits)); -- -- pinmux_config_pingrp_table(e2220_1170_pingrps, -- ARRAY_SIZE(e2220_1170_pingrps)); -- -- pinmux_config_drvgrp_table(e2220_1170_drvgrps, -- ARRAY_SIZE(e2220_1170_drvgrps)); --} -diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h -deleted file mode 100644 -index 14bbfbf..0000000 ---- a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h -+++ /dev/null -@@ -1,276 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. -- */ -- --/* -- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -- * -- * To generate this file, use the tegra-pinmux-scripts tool available from -- * https://github.com/NVIDIA/tegra-pinmux-scripts -- * Run "board-to-uboot.py e2220-1170". -- */ -- --#ifndef _PINMUX_CONFIG_E2220_1170_H_ --#define _PINMUX_CONFIG_E2220_1170_H_ -- --#define GPIO_INIT(_port, _gpio, _init) \ -- { \ -- .gpio = TEGRA_GPIO(_port, _gpio), \ -- .init = TEGRA_GPIO_INIT_##_init, \ -- } -- --static const struct tegra_gpio_config e2220_1170_gpio_inits[] = { -- /* port, pin, init_val */ -- GPIO_INIT(A, 5, IN), -- GPIO_INIT(A, 6, IN), -- GPIO_INIT(B, 4, IN), -- GPIO_INIT(E, 6, IN), -- GPIO_INIT(G, 2, OUT0), -- GPIO_INIT(G, 3, OUT0), -- GPIO_INIT(H, 0, OUT0), -- GPIO_INIT(H, 1, OUT0), -- GPIO_INIT(H, 2, IN), -- GPIO_INIT(H, 3, OUT0), -- GPIO_INIT(H, 4, OUT0), -- GPIO_INIT(H, 5, IN), -- GPIO_INIT(H, 6, OUT0), -- GPIO_INIT(H, 7, OUT0), -- GPIO_INIT(I, 0, OUT0), -- GPIO_INIT(I, 1, IN), -- GPIO_INIT(I, 2, OUT0), -- GPIO_INIT(I, 3, OUT0), -- GPIO_INIT(K, 0, IN), -- GPIO_INIT(K, 1, OUT0), -- GPIO_INIT(K, 2, OUT0), -- GPIO_INIT(K, 3, OUT0), -- GPIO_INIT(K, 4, IN), -- GPIO_INIT(K, 5, OUT0), -- GPIO_INIT(K, 6, IN), -- GPIO_INIT(K, 7, OUT0), -- GPIO_INIT(L, 0, OUT0), -- GPIO_INIT(S, 4, OUT0), -- GPIO_INIT(S, 5, OUT0), -- GPIO_INIT(S, 6, OUT0), -- GPIO_INIT(S, 7, OUT0), -- GPIO_INIT(T, 0, OUT0), -- GPIO_INIT(T, 1, OUT0), -- GPIO_INIT(V, 1, OUT0), -- GPIO_INIT(V, 2, OUT0), -- GPIO_INIT(V, 3, IN), -- GPIO_INIT(V, 5, OUT0), -- GPIO_INIT(V, 6, OUT0), -- GPIO_INIT(X, 0, IN), -- GPIO_INIT(X, 1, IN), -- GPIO_INIT(X, 2, IN), -- GPIO_INIT(X, 3, IN), -- GPIO_INIT(X, 4, IN), -- GPIO_INIT(X, 5, IN), -- GPIO_INIT(X, 6, IN), -- GPIO_INIT(X, 7, IN), -- GPIO_INIT(Y, 0, IN), -- GPIO_INIT(Y, 1, IN), -- GPIO_INIT(Z, 0, IN), -- GPIO_INIT(Z, 4, OUT0), -- GPIO_INIT(BB, 2, OUT0), -- GPIO_INIT(BB, 3, OUT0), -- GPIO_INIT(BB, 4, IN), -- GPIO_INIT(CC, 1, IN), -- GPIO_INIT(CC, 5, OUT0), -- GPIO_INIT(CC, 6, IN), -- GPIO_INIT(CC, 7, OUT0), --}; -- --#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -- { \ -- .pingrp = PMUX_PINGRP_##_pingrp, \ -- .func = PMUX_FUNC_##_mux, \ -- .pull = PMUX_PULL_##_pull, \ -- .tristate = PMUX_TRI_##_tri, \ -- .io = PMUX_PIN_##_io, \ -- .od = PMUX_PIN_OD_##_od, \ -- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -- .lock = PMUX_PIN_LOCK_DEFAULT, \ -- } -- --static const struct pmux_pingrp_config e2220_1170_pingrps[] = { -- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -- PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), --}; -- --#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -- { \ -- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -- .slwf = _slwf, \ -- .slwr = _slwr, \ -- .drvup = _drvup, \ -- .drvdn = _drvdn, \ -- .lpmd = PMUX_LPMD_##_lpmd, \ -- .schmt = PMUX_SCHMT_##_schmt, \ -- .hsm = PMUX_HSM_##_hsm, \ -- } -- --static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { --}; -- --#endif /* PINMUX_CONFIG_E2220_1170_H */ -diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c -index e0c907b..5aac040 100644 ---- a/board/nvidia/p2371-0000/p2371-0000.c -+++ b/board/nvidia/p2371-0000/p2371-0000.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * (C) Copyright 2013-2015 -+ * (C) Copyright 2013-2019 - * NVIDIA Corporation - */ - -@@ -9,7 +9,6 @@ - #include - #include - #include "../p2571/max77620_init.h" --#include "pinmux-config-p2371-0000.h" - - void pin_mux_mmc(void) - { -@@ -30,21 +29,3 @@ void pin_mux_mmc(void) - if (ret) - printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); - } -- --/* -- * Routine: pinmux_init -- * Description: Do individual peripheral pinmux configs -- */ --void pinmux_init(void) --{ -- pinmux_clear_tristate_input_clamping(); -- -- gpio_config_table(p2371_0000_gpio_inits, -- ARRAY_SIZE(p2371_0000_gpio_inits)); -- -- pinmux_config_pingrp_table(p2371_0000_pingrps, -- ARRAY_SIZE(p2371_0000_pingrps)); -- -- pinmux_config_drvgrp_table(p2371_0000_drvgrps, -- ARRAY_SIZE(p2371_0000_drvgrps)); --} -diff --git a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h -deleted file mode 100644 -index aa5d7f9..0000000 ---- a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h -+++ /dev/null -@@ -1,267 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. -- */ -- --/* -- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -- * -- * To generate this file, use the tegra-pinmux-scripts tool available from -- * https://github.com/NVIDIA/tegra-pinmux-scripts -- * Run "board-to-uboot.py p2371-0000". -- */ -- --#ifndef _PINMUX_CONFIG_P2371_0000_H_ --#define _PINMUX_CONFIG_P2371_0000_H_ -- --#define GPIO_INIT(_port, _gpio, _init) \ -- { \ -- .gpio = TEGRA_GPIO(_port, _gpio), \ -- .init = TEGRA_GPIO_INIT_##_init, \ -- } -- --static const struct tegra_gpio_config p2371_0000_gpio_inits[] = { -- /* port, pin, init_val */ -- GPIO_INIT(A, 5, IN), -- GPIO_INIT(E, 4, OUT0), -- GPIO_INIT(E, 6, IN), -- GPIO_INIT(G, 0, IN), -- GPIO_INIT(G, 3, OUT0), -- GPIO_INIT(H, 0, OUT0), -- GPIO_INIT(H, 2, IN), -- GPIO_INIT(H, 3, OUT0), -- GPIO_INIT(H, 4, OUT0), -- GPIO_INIT(H, 5, IN), -- GPIO_INIT(H, 6, OUT0), -- GPIO_INIT(H, 7, OUT0), -- GPIO_INIT(I, 0, OUT0), -- GPIO_INIT(I, 1, IN), -- GPIO_INIT(I, 2, OUT0), -- GPIO_INIT(I, 3, OUT0), -- GPIO_INIT(K, 4, IN), -- GPIO_INIT(K, 5, OUT0), -- GPIO_INIT(K, 6, IN), -- GPIO_INIT(K, 7, OUT0), -- GPIO_INIT(L, 0, OUT0), -- GPIO_INIT(S, 4, OUT0), -- GPIO_INIT(S, 5, OUT0), -- GPIO_INIT(S, 6, OUT0), -- GPIO_INIT(S, 7, OUT0), -- GPIO_INIT(T, 0, OUT0), -- GPIO_INIT(T, 1, OUT0), -- GPIO_INIT(V, 1, OUT0), -- GPIO_INIT(V, 2, OUT0), -- GPIO_INIT(V, 5, OUT0), -- GPIO_INIT(V, 6, OUT0), -- GPIO_INIT(V, 7, OUT1), -- GPIO_INIT(X, 0, IN), -- GPIO_INIT(X, 1, IN), -- GPIO_INIT(X, 2, IN), -- GPIO_INIT(X, 3, IN), -- GPIO_INIT(X, 4, IN), -- GPIO_INIT(X, 5, IN), -- GPIO_INIT(X, 6, IN), -- GPIO_INIT(X, 7, IN), -- GPIO_INIT(Y, 1, IN), -- GPIO_INIT(Z, 0, IN), -- GPIO_INIT(Z, 4, OUT0), -- GPIO_INIT(BB, 2, OUT0), -- GPIO_INIT(BB, 3, OUT0), -- GPIO_INIT(CC, 1, IN), -- GPIO_INIT(CC, 6, IN), -- GPIO_INIT(CC, 7, OUT0), --}; -- --#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -- { \ -- .pingrp = PMUX_PINGRP_##_pingrp, \ -- .func = PMUX_FUNC_##_mux, \ -- .pull = PMUX_PULL_##_pull, \ -- .tristate = PMUX_TRI_##_tri, \ -- .io = PMUX_PIN_##_io, \ -- .od = PMUX_PIN_OD_##_od, \ -- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -- .lock = PMUX_PIN_LOCK_DEFAULT, \ -- } -- --static const struct pmux_pingrp_config p2371_0000_pingrps[] = { -- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MOSI_PC0, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MISO_PC1, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_SCK_PC2, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS0_PC3, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS1_PC4, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_DAT_PE1, DMIC1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_DAT_PE3, DMIC2, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK0, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK1, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK2, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK3, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_CLK_PV7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), --}; -- --#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -- { \ -- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -- .slwf = _slwf, \ -- .slwr = _slwr, \ -- .drvup = _drvup, \ -- .drvdn = _drvdn, \ -- .lpmd = PMUX_LPMD_##_lpmd, \ -- .schmt = PMUX_SCHMT_##_schmt, \ -- .hsm = PMUX_HSM_##_hsm, \ -- } -- --static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = { --}; -- --#endif /* PINMUX_CONFIG_P2371_0000_H */ -diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c -index fa5288b..1756bbc 100644 ---- a/board/nvidia/p2371-2180/p2371-2180.c -+++ b/board/nvidia/p2371-2180/p2371-2180.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * (C) Copyright 2013-2015 -+ * (C) Copyright 2013-2019 - * NVIDIA Corporation - */ - -@@ -13,7 +13,6 @@ - #include - #include - #include "../p2571/max77620_init.h" --#include "pinmux-config-p2371-2180.h" - - void pin_mux_mmc(void) - { -@@ -57,24 +56,6 @@ void pin_mux_mmc(void) - } - } - --/* -- * Routine: pinmux_init -- * Description: Do individual peripheral pinmux configs -- */ --void pinmux_init(void) --{ -- pinmux_clear_tristate_input_clamping(); -- -- gpio_config_table(p2371_2180_gpio_inits, -- ARRAY_SIZE(p2371_2180_gpio_inits)); -- -- pinmux_config_pingrp_table(p2371_2180_pingrps, -- ARRAY_SIZE(p2371_2180_pingrps)); -- -- pinmux_config_drvgrp_table(p2371_2180_drvgrps, -- ARRAY_SIZE(p2371_2180_drvgrps)); --} -- - #ifdef CONFIG_PCI_TEGRA - int tegra_pcie_board_init(void) - { -diff --git a/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h b/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h -deleted file mode 100644 -index d9abfa7..0000000 ---- a/board/nvidia/p2371-2180/pinmux-config-p2371-2180.h -+++ /dev/null -@@ -1,278 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. -- */ -- --/* -- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -- * -- * To generate this file, use the tegra-pinmux-scripts tool available from -- * https://github.com/NVIDIA/tegra-pinmux-scripts -- * Run "board-to-uboot.py p2371-2180". -- */ -- --#ifndef _PINMUX_CONFIG_P2371_2180_H_ --#define _PINMUX_CONFIG_P2371_2180_H_ -- --#define GPIO_INIT(_port, _gpio, _init) \ -- { \ -- .gpio = TEGRA_GPIO(_port, _gpio), \ -- .init = TEGRA_GPIO_INIT_##_init, \ -- } -- --static const struct tegra_gpio_config p2371_2180_gpio_inits[] = { -- /* port, pin, init_val */ -- GPIO_INIT(A, 5, IN), -- GPIO_INIT(B, 0, IN), -- GPIO_INIT(B, 1, IN), -- GPIO_INIT(B, 2, IN), -- GPIO_INIT(B, 3, IN), -- GPIO_INIT(C, 0, IN), -- GPIO_INIT(C, 1, IN), -- GPIO_INIT(C, 2, IN), -- GPIO_INIT(C, 3, IN), -- GPIO_INIT(C, 4, IN), -- GPIO_INIT(E, 4, IN), -- GPIO_INIT(E, 5, IN), -- GPIO_INIT(E, 6, IN), -- GPIO_INIT(H, 0, OUT0), -- GPIO_INIT(H, 1, OUT0), -- GPIO_INIT(H, 2, IN), -- GPIO_INIT(H, 3, OUT0), -- GPIO_INIT(H, 4, OUT0), -- GPIO_INIT(H, 5, IN), -- GPIO_INIT(H, 6, IN), -- GPIO_INIT(H, 7, IN), -- GPIO_INIT(I, 0, OUT0), -- GPIO_INIT(I, 1, IN), -- GPIO_INIT(I, 2, OUT0), -- GPIO_INIT(K, 4, IN), -- GPIO_INIT(K, 5, OUT0), -- GPIO_INIT(K, 6, IN), -- GPIO_INIT(K, 7, IN), -- GPIO_INIT(L, 1, IN), -- GPIO_INIT(S, 4, OUT0), -- GPIO_INIT(S, 5, OUT0), -- GPIO_INIT(S, 6, OUT0), -- GPIO_INIT(S, 7, OUT0), -- GPIO_INIT(T, 0, OUT0), -- GPIO_INIT(T, 1, OUT0), -- GPIO_INIT(U, 2, IN), -- GPIO_INIT(U, 3, IN), -- GPIO_INIT(V, 1, OUT0), -- GPIO_INIT(V, 2, OUT0), -- GPIO_INIT(V, 3, IN), -- GPIO_INIT(V, 5, OUT0), -- GPIO_INIT(V, 6, OUT0), -- GPIO_INIT(X, 0, IN), -- GPIO_INIT(X, 1, IN), -- GPIO_INIT(X, 2, IN), -- GPIO_INIT(X, 3, IN), -- GPIO_INIT(X, 4, IN), -- GPIO_INIT(X, 5, IN), -- GPIO_INIT(X, 6, IN), -- GPIO_INIT(X, 7, IN), -- GPIO_INIT(Y, 0, IN), -- GPIO_INIT(Y, 1, IN), -- GPIO_INIT(Z, 0, IN), -- GPIO_INIT(Z, 2, IN), -- GPIO_INIT(Z, 3, OUT0), -- GPIO_INIT(BB, 0, IN), -- GPIO_INIT(BB, 2, OUT0), -- GPIO_INIT(BB, 3, IN), -- GPIO_INIT(CC, 1, IN), --}; -- --#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -- { \ -- .pingrp = PMUX_PINGRP_##_pingrp, \ -- .func = PMUX_FUNC_##_mux, \ -- .pull = PMUX_PULL_##_pull, \ -- .tristate = PMUX_TRI_##_tri, \ -- .io = PMUX_PIN_##_io, \ -- .od = PMUX_PIN_OD_##_od, \ -- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -- .lock = PMUX_PIN_LOCK_DEFAULT, \ -- } -- --static const struct pmux_pingrp_config p2371_2180_pingrps[] = { -- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), -- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PA6, SATA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_FS_PB0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DIN_PB1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DOUT_PB2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_SCLK_PB3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MOSI_PB4, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MISO_PB5, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_SCK_PB6, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_CS0_PB7, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_SCK_PC5, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_CS0_PC6, SPI4, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MOSI_PC7, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MISO_PD0, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_CLK_PE4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_DAT_PE5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RX_PG1, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RTS_PG2, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_CTS_PG3, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_INT_PI1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK0, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK1, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK2, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK3, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PK7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RTS_PU2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART1_CTS_PU3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO1_PV3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(ALS_PROX_INT_PX3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(DP_HPD0_PCC6, DP, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(SPI2_CS1_PDD0, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), --}; -- --#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -- { \ -- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -- .slwf = _slwf, \ -- .slwr = _slwr, \ -- .drvup = _drvup, \ -- .drvdn = _drvdn, \ -- .lpmd = PMUX_LPMD_##_lpmd, \ -- .schmt = PMUX_SCHMT_##_schmt, \ -- .hsm = PMUX_HSM_##_hsm, \ -- } -- --static const struct pmux_drvgrp_config p2371_2180_drvgrps[] = { --}; -- --#endif /* PINMUX_CONFIG_P2371_2180_H */ -diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c -index dba3579..a9e4d21 100644 ---- a/board/nvidia/p2571/p2571.c -+++ b/board/nvidia/p2571/p2571.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * (C) Copyright 2013-2015 -+ * (C) Copyright 2013-2019 - * NVIDIA Corporation - */ - -@@ -10,7 +10,6 @@ - #include - #include - #include "max77620_init.h" --#include "pinmux-config-p2571.h" - - void pin_mux_mmc(void) - { -@@ -33,24 +32,6 @@ void pin_mux_mmc(void) - } - - /* -- * Routine: pinmux_init -- * Description: Do individual peripheral pinmux configs -- */ --void pinmux_init(void) --{ -- pinmux_clear_tristate_input_clamping(); -- -- gpio_config_table(p2571_gpio_inits, -- ARRAY_SIZE(p2571_gpio_inits)); -- -- pinmux_config_pingrp_table(p2571_pingrps, -- ARRAY_SIZE(p2571_pingrps)); -- -- pinmux_config_drvgrp_table(p2571_drvgrps, -- ARRAY_SIZE(p2571_drvgrps)); --} -- --/* - * Routine: start_cpu_fan - * Description: Enable/start PWM CPU fan on P2571 - */ -diff --git a/board/nvidia/p2571/pinmux-config-p2571.h b/board/nvidia/p2571/pinmux-config-p2571.h -deleted file mode 100644 -index 04bb6ce..0000000 ---- a/board/nvidia/p2571/pinmux-config-p2571.h -+++ /dev/null -@@ -1,242 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. -- */ -- --/* -- * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -- * -- * To generate this file, use the tegra-pinmux-scripts tool available from -- * https://github.com/NVIDIA/tegra-pinmux-scripts -- * Run "board-to-uboot.py p2571". -- */ -- --#ifndef _PINMUX_CONFIG_P2571_H_ --#define _PINMUX_CONFIG_P2571_H_ -- --#define GPIO_INIT(_port, _gpio, _init) \ -- { \ -- .gpio = TEGRA_GPIO(_port, _gpio), \ -- .init = TEGRA_GPIO_INIT_##_init, \ -- } -- --static const struct tegra_gpio_config p2571_gpio_inits[] = { -- /* port, pin, init_val */ -- GPIO_INIT(A, 0, IN), -- GPIO_INIT(A, 5, IN), -- GPIO_INIT(D, 4, IN), -- GPIO_INIT(E, 4, OUT0), -- GPIO_INIT(G, 0, IN), -- GPIO_INIT(H, 0, OUT0), -- GPIO_INIT(H, 2, IN), -- GPIO_INIT(H, 3, OUT0), -- GPIO_INIT(H, 4, OUT0), -- GPIO_INIT(H, 5, IN), -- GPIO_INIT(I, 0, OUT0), -- GPIO_INIT(I, 1, IN), -- GPIO_INIT(V, 1, OUT0), -- GPIO_INIT(V, 6, OUT1), -- GPIO_INIT(X, 4, IN), -- GPIO_INIT(X, 6, IN), -- GPIO_INIT(X, 7, IN), -- GPIO_INIT(Y, 1, IN), -- GPIO_INIT(Z, 0, IN), -- GPIO_INIT(Z, 4, OUT0), -- GPIO_INIT(BB, 2, OUT0), -- GPIO_INIT(CC, 1, IN), -- GPIO_INIT(CC, 3, IN), --}; -- --#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -- { \ -- .pingrp = PMUX_PINGRP_##_pingrp, \ -- .func = PMUX_FUNC_##_mux, \ -- .pull = PMUX_PULL_##_pull, \ -- .tristate = PMUX_TRI_##_tri, \ -- .io = PMUX_PIN_##_io, \ -- .od = PMUX_PIN_OD_##_od, \ -- .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -- .lock = PMUX_PIN_LOCK_DEFAULT, \ -- } -- --static const struct pmux_pingrp_config p2571_pingrps[] = { -- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -- PINCFG(PEX_L0_RST_N_PA0, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PEX_L0_CLKREQ_N_PA1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(PEX_WAKE_N_PA2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(PEX_L1_RST_N_PA3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(PEX_L1_CLKREQ_N_PA4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MOSI_PC0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_MISO_PC1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_SCK_PC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS0_PC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI1_CS1_PC4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_TX_PD1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RX_PD2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_RTS_PD3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART3_CTS_PD4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PE6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART2_CTS_PG3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PH6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_WAKE_NFC_PH7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GPS_EN_PI2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(DAP4_FS_PJ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DIN_PJ5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_DOUT_PJ6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DAP4_SCLK_PJ7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_MCLK_PS0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_MCLK_PS1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_AF_EN_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_PWDN_PS7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM2_PWDN_PT0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(ALS_PROX_INT_PX3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_POWER_ON_PX5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(LCD_TE_PY2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), -- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SPDIF_IN_PCC3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -- PINCFG(DP_HPD0_PCC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), --}; -- --#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -- { \ -- .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -- .slwf = _slwf, \ -- .slwr = _slwr, \ -- .drvup = _drvup, \ -- .drvdn = _drvdn, \ -- .lpmd = PMUX_LPMD_##_lpmd, \ -- .schmt = PMUX_SCHMT_##_schmt, \ -- .hsm = PMUX_HSM_##_hsm, \ -- } -- --static const struct pmux_drvgrp_config p2571_drvgrps[] = { --}; -- --#endif /* PINMUX_CONFIG_P2571_H */ diff --git a/uboot-tools.spec b/uboot-tools.spec index 40ebdd3..2002614 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2020.04 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,16 +27,9 @@ Patch6: dragonboard-fixes.patch Patch7: efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch # Tegra improvements -Patch10: mtd-spi-Add-Macronix-MX25U3235F-device.patch -Patch11: Misc-fixes-for-Tegra.patch -Patch12: mmc-t210-fix-autocal-and-400KHz-clock.patch -Patch13: qspi-t210-fix-claim_bus-and-clock-tap-delays.patch -Patch14: net-tegra-Misc-network-fixes.patch -Patch15: t210-miscellaneous-patches.patch -# http://patchwork.ozlabs.org/patch/1261582/ -Patch16: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch -Patch17: arm-tegra-define-fdtfile-option-for-distro-boot.patch -Patch18: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch +Patch10: Misc-fixes-for-Tegra.patch +Patch11: arm-tegra-define-fdtfile-option-for-distro-boot.patch +Patch12: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # Rockchips improvements Patch20: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch @@ -262,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Apr 7 2020 Peter Robinson 2020.04-0.7-rc5 +- 2020.04 RC5 + * Tue Mar 31 2020 Peter Robinson 2020.04-0.6-rc4 - 2020.04 RC4 - Updates for NVIDIA Jetson platforms From 3084c0898aab2a267ca34f94291b9ce9c9409877 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 14 Apr 2020 10:17:48 +0100 Subject: [PATCH 075/351] 2020.04 --- AllWinner-Pine64-bits.patch | 2173 +++++++++++++++++++++++++++++++++++ aarch64-boards | 2 + sources | 2 +- uboot-tools.spec | 14 +- 4 files changed, 2185 insertions(+), 6 deletions(-) create mode 100644 AllWinner-Pine64-bits.patch diff --git a/AllWinner-Pine64-bits.patch b/AllWinner-Pine64-bits.patch new file mode 100644 index 0000000..27f95f8 --- /dev/null +++ b/AllWinner-Pine64-bits.patch @@ -0,0 +1,2173 @@ +From 2c213379d9ec786480a655f8c5687b2df376017f Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 12:27:15 +0000 +Subject: [PATCH 1/9] arm: dts: AllWinner: sync sun50i-a64.dtsi to 5.6-rc1 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64.dtsi | 472 ++++++++++++++++++++++++++++------- + 1 file changed, 387 insertions(+), 85 deletions(-) + +diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi +index ff41abc96a..862b47dc9d 100644 +--- a/arch/arm/dts/sun50i-a64.dtsi ++++ b/arch/arm/dts/sun50i-a64.dtsi +@@ -1,46 +1,7 @@ +-/* +- * Copyright (C) 2016 ARM Ltd. +- * based on the Allwinner H3 dtsi: +- * Copyright (C) 2015 Jens Kuske +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2016 ARM Ltd. ++// based on the Allwinner H3 dtsi: ++// Copyright (C) 2015 Jens Kuske + + #include + #include +@@ -49,6 +10,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -84,35 +46,47 @@ + #size-cells = <0>; + + cpu0: cpu@0 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <1>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu2: cpu@2 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu3: cpu@3 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + L2: l2-cache { +@@ -139,15 +113,16 @@ + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; +- clock-output-names = "osc32k"; ++ clock-output-names = "ext-osc32k"; + }; + +- iosc: internal-osc-clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <16000000>; +- clock-accuracy = <300000000>; +- clock-output-names = "iosc"; ++ pmu { ++ compatible = "arm,cortex-a53-pmu"; ++ interrupts = , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { +@@ -155,6 +130,30 @@ + method = "smc"; + }; + ++ sound: sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "sun50i-a64-audio"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,frame-master = <&cpudai>; ++ simple-audio-card,bitclock-master = <&cpudai>; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,aux-devs = <&codec_analog>; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC"; ++ status = "disabled"; ++ ++ cpudai: simple-audio-card,cpu { ++ sound-dai = <&dai>; ++ }; ++ ++ link_codec: simple-audio-card,codec { ++ sound-dai = <&codec>; ++ }; ++ }; ++ + sound_spdif { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; +@@ -175,6 +174,7 @@ + + timer { + compatible = "arm,armv8-timer"; ++ allwinner,erratum-unknown1; + interrupts = , + ; + }; + ++ thermal-zones { ++ cpu_thermal: cpu0-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 0>; ++ ++ cooling-maps { ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ ++ trips { ++ cpu_alert0: cpu_alert0 { ++ /* milliCelsius */ ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu_alert1: cpu_alert1 { ++ /* milliCelsius */ ++ temperature = <90000>; ++ hysteresis = <2000>; ++ type = "hot"; ++ }; ++ ++ cpu_crit: cpu_crit { ++ /* milliCelsius */ ++ temperature = <110000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ gpu0_thermal: gpu0-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 1>; ++ }; ++ ++ gpu1_thermal: gpu1-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 2>; ++ }; ++ }; ++ + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + +- de2@1000000 { ++ bus@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de2_sram 1>; +@@ -202,10 +265,10 @@ + display_clocks: clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; + reg = <0x0 0x100000>; +- clocks = <&ccu CLK_DE>, +- <&ccu CLK_BUS_DE>; +- clock-names = "mod", +- "bus"; ++ clocks = <&ccu CLK_BUS_DE>, ++ <&ccu CLK_DE>; ++ clock-names = "bus", ++ "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; +@@ -225,11 +288,19 @@ + #size-cells = <0>; + + mixer0_out: port@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <1>; + +- mixer0_out_tcon0: endpoint { ++ mixer0_out_tcon0: endpoint@0 { ++ reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; ++ ++ mixer0_out_tcon1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&tcon1_in_mixer0>; ++ }; + }; + }; + }; +@@ -248,9 +319,17 @@ + #size-cells = <0>; + + mixer1_out: port@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <1>; + +- mixer1_out_tcon1: endpoint { ++ mixer1_out_tcon0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&tcon0_in_mixer1>; ++ }; ++ ++ mixer1_out_tcon1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&tcon1_in_mixer1>; + }; + }; +@@ -259,8 +338,7 @@ + }; + + syscon: syscon@1c00000 { +- compatible = "allwinner,sun50i-a64-system-control", +- "syscon"; ++ compatible = "allwinner,sun50i-a64-system-control"; + reg = <0x01c00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; +@@ -278,6 +356,20 @@ + reg = <0x0000 0x28000>; + }; + }; ++ ++ sram_c1: sram@1d00000 { ++ compatible = "mmio-sram"; ++ reg = <0x01d00000 0x40000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x01d00000 0x40000>; ++ ++ ve_sram: sram-section@0 { ++ compatible = "allwinner,sun50i-a64-sram-c1", ++ "allwinner,sun4i-a10-sram-c1"; ++ reg = <0x000000 0x40000>; ++ }; ++ }; + }; + + dma: dma-controller@1c02000 { +@@ -299,6 +391,7 @@ + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; ++ #clock-cells = <0>; + resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + +@@ -315,12 +408,23 @@ + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; ++ ++ tcon0_in_mixer1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&mixer1_out_tcon0>; ++ }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; ++ ++ tcon0_out_dsi: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&dsi_in_tcon0>; ++ allwinner,tcon-channel = <1>; ++ }; + }; + }; + }; +@@ -340,9 +444,17 @@ + #size-cells = <0>; + + tcon1_in: port@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0>; + +- tcon1_in_mixer1: endpoint { ++ tcon1_in_mixer0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&mixer0_out_tcon1>; ++ }; ++ ++ tcon1_in_mixer1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&mixer1_out_tcon1>; + }; + }; +@@ -360,6 +472,17 @@ + }; + }; + ++ video-codec@1c0e000 { ++ compatible = "allwinner,sun50i-a64-video-engine"; ++ reg = <0x01c0e000 0x1000>; ++ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, ++ <&ccu CLK_DRAM_VE>; ++ clock-names = "ahb", "mod", "ram"; ++ resets = <&ccu RST_BUS_VE>; ++ interrupts = ; ++ allwinner,sram = <&ve_sram 1>; ++ }; ++ + mmc0: mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x01c0f000 0x1000>; +@@ -405,6 +528,21 @@ + sid: eeprom@1c14000 { + compatible = "allwinner,sun50i-a64-sid"; + reg = <0x1c14000 0x400>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ ths_calibration: thermal-sensor-calibration@34 { ++ reg = <0x34 0x8>; ++ }; ++ }; ++ ++ crypto: crypto@1c15000 { ++ compatible = "allwinner,sun50i-a64-crypto"; ++ reg = <0x01c15000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; ++ clock-names = "bus", "mod"; ++ resets = <&ccu RST_BUS_CE>; + }; + + usb_otg: usb@1c19000 { +@@ -417,6 +555,7 @@ + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; ++ dr_mode = "otg"; + status = "disabled"; + }; + +@@ -491,7 +630,7 @@ + ccu: clock@1c20000 { + compatible = "allwinner,sun50i-a64-ccu"; + reg = <0x01c20000 0x400>; +- clocks = <&osc24M>, <&osc32k>; ++ clocks = <&osc24M>, <&rtc 0>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; +@@ -503,22 +642,45 @@ + interrupts = , + , + ; +- clocks = <&ccu 58>; ++ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; ++ clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + +- i2c0_pins: i2c0_pins { ++ csi_pins: csi-pins { ++ pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", ++ "PE7", "PE8", "PE9", "PE10", "PE11"; ++ function = "csi"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi_mclk_pin: csi-mclk-pin { ++ pins = "PE1"; ++ function = "csi"; ++ }; ++ ++ i2c0_pins: i2c0-pins { + pins = "PH0", "PH1"; + function = "i2c0"; + }; + +- i2c1_pins: i2c1_pins { ++ i2c1_pins: i2c1-pins { + pins = "PH2", "PH3"; + function = "i2c1"; + }; + ++ /omit-if-no-ref/ ++ lcd_rgb666_pins: lcd-rgb666-pins { ++ pins = "PD0", "PD1", "PD2", "PD3", "PD4", ++ "PD5", "PD6", "PD7", "PD8", "PD9", ++ "PD10", "PD11", "PD12", "PD13", ++ "PD14", "PD15", "PD16", "PD17", ++ "PD18", "PD19", "PD20", "PD21"; ++ function = "lcd0"; ++ }; ++ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; +@@ -551,19 +713,19 @@ + bias-pull-up; + }; + +- pwm_pin: pwm_pin { ++ pwm_pin: pwm-pin { + pins = "PD22"; + function = "pwm"; + }; + +- rmii_pins: rmii_pins { ++ rmii_pins: rmii-pins { + pins = "PD10", "PD11", "PD13", "PD14", "PD17", + "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + +- rgmii_pins: rgmii_pins { ++ rgmii_pins: rgmii-pins { + pins = "PD8", "PD9", "PD10", "PD11", "PD12", + "PD13", "PD15", "PD16", "PD17", "PD18", + "PD19", "PD20", "PD21", "PD22", "PD23"; +@@ -571,17 +733,17 @@ + drive-strength = <40>; + }; + +- spdif_tx_pin: spdif { ++ spdif_tx_pin: spdif-tx-pin { + pins = "PH8"; + function = "spdif"; + }; + +- spi0_pins: spi0 { ++ spi0_pins: spi0-pins { + pins = "PC0", "PC1", "PC2", "PC3"; + function = "spi0"; + }; + +- spi1_pins: spi1 { ++ spi1_pins: spi1-pins { + pins = "PD0", "PD1", "PD2", "PD3"; + function = "spi1"; + }; +@@ -591,12 +753,12 @@ + function = "uart0"; + }; + +- uart1_pins: uart1_pins { ++ uart1_pins: uart1-pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; + +- uart1_rts_cts_pins: uart1_rts_cts_pins { ++ uart1_rts_cts_pins: uart1-rts-cts-pins { + pins = "PG8", "PG9"; + function = "uart1"; + }; +@@ -638,6 +800,14 @@ + status = "disabled"; + }; + ++ lradc: lradc@1c21800 { ++ compatible = "allwinner,sun50i-a64-lradc", ++ "allwinner,sun8i-a83t-r-lradc"; ++ reg = <0x01c21800 0x400>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ + i2s0: i2s@1c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-i2s", +@@ -666,6 +836,41 @@ + status = "disabled"; + }; + ++ dai: dai@1c22c00 { ++ #sound-dai-cells = <0>; ++ compatible = "allwinner,sun50i-a64-codec-i2s"; ++ reg = <0x01c22c00 0x200>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; ++ clock-names = "apb", "mod"; ++ resets = <&ccu RST_BUS_CODEC>; ++ dmas = <&dma 15>, <&dma 15>; ++ dma-names = "rx", "tx"; ++ status = "disabled"; ++ }; ++ ++ codec: codec@1c22e00 { ++ #sound-dai-cells = <0>; ++ compatible = "allwinner,sun8i-a33-codec"; ++ reg = <0x01c22e00 0x600>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; ++ clock-names = "bus", "mod"; ++ status = "disabled"; ++ }; ++ ++ ths: thermal-sensor@1c25000 { ++ compatible = "allwinner,sun50i-a64-ths"; ++ reg = <0x01c25000 0x100>; ++ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; ++ clock-names = "bus", "mod"; ++ interrupts = ; ++ resets = <&ccu RST_BUS_THS>; ++ nvmem-cells = <&ths_calibration>; ++ nvmem-cell-names = "calibration"; ++ #thermal-sensor-cells = <1>; ++ }; ++ + uart0: serial@1c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; +@@ -727,6 +932,8 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -738,6 +945,8 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -808,6 +1017,28 @@ + }; + }; + ++ mali: gpu@1c40000 { ++ compatible = "allwinner,sun50i-a64-mali", "arm,mali-400"; ++ reg = <0x01c40000 0x10000>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ ; ++ interrupt-names = "gp", ++ "gpmmu", ++ "pp0", ++ "ppmmu0", ++ "pp1", ++ "ppmmu1", ++ "pmu"; ++ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; ++ clock-names = "bus", "core"; ++ resets = <&ccu RST_BUS_GPU>; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, +@@ -830,6 +1061,51 @@ + status = "disabled"; + }; + ++ csi: csi@1cb0000 { ++ compatible = "allwinner,sun50i-a64-csi"; ++ reg = <0x01cb0000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CSI>, ++ <&ccu CLK_CSI_SCLK>, ++ <&ccu CLK_DRAM_CSI>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_CSI>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_pins>; ++ status = "disabled"; ++ }; ++ ++ dsi: dsi@1ca0000 { ++ compatible = "allwinner,sun50i-a64-mipi-dsi"; ++ reg = <0x01ca0000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_MIPI_DSI>; ++ resets = <&ccu RST_BUS_MIPI_DSI>; ++ phys = <&dphy>; ++ phy-names = "dphy"; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port { ++ dsi_in_tcon0: endpoint { ++ remote-endpoint = <&tcon0_out_dsi>; ++ }; ++ }; ++ }; ++ ++ dphy: d-phy@1ca1000 { ++ compatible = "allwinner,sun50i-a64-mipi-dphy", ++ "allwinner,sun6i-a31-mipi-dphy"; ++ reg = <0x01ca1000 0x1000>; ++ clocks = <&ccu CLK_BUS_MIPI_DSI>, ++ <&ccu CLK_DSI_DPHY>; ++ clock-names = "bus", "mod"; ++ resets = <&ccu RST_BUS_MIPI_DSI>; ++ status = "disabled"; ++ #phy-cells = <0>; ++ }; ++ + hdmi: hdmi@1ee0000 { + compatible = "allwinner,sun50i-a64-dw-hdmi", + "allwinner,sun8i-a83t-dw-hdmi"; +@@ -842,7 +1118,7 @@ + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; +- phy-names = "hdmi-phy"; ++ phy-names = "phy"; + status = "disabled"; + + ports { +@@ -867,7 +1143,7 @@ + compatible = "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x01ef0000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, +- <&ccu 7>; ++ <&ccu CLK_PLL_VIDEO0>; + clock-names = "bus", "mod", "pll-0"; + resets = <&ccu RST_BUS_HDMI0>; + reset-names = "phy"; +@@ -875,11 +1151,12 @@ + }; + + rtc: rtc@1f00000 { +- compatible = "allwinner,sun6i-a31-rtc"; +- reg = <0x01f00000 0x54>; ++ compatible = "allwinner,sun50i-a64-rtc", ++ "allwinner,sun8i-h3-rtc"; ++ reg = <0x01f00000 0x400>; + interrupts = , + ; +- clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; ++ clock-output-names = "osc32k", "osc32k-out", "iosc"; + clocks = <&osc32k>; + #clock-cells = <1>; + }; +@@ -896,13 +1173,19 @@ + r_ccu: clock@1f01400 { + compatible = "allwinner,sun50i-a64-r-ccu"; + reg = <0x01f01400 0x100>; +- clocks = <&osc24M>, <&osc32k>, <&iosc>, +- <&ccu 11>; ++ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, ++ <&ccu CLK_PLL_PERIPH0>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ++ codec_analog: codec-analog@1f015c0 { ++ compatible = "allwinner,sun50i-a64-codec-analog"; ++ reg = <0x01f015c0 0x4>; ++ status = "disabled"; ++ }; ++ + r_i2c: i2c@1f02400 { + compatible = "allwinner,sun50i-a64-i2c", + "allwinner,sun6i-a31-i2c"; +@@ -915,6 +1198,19 @@ + #size-cells = <0>; + }; + ++ r_ir: ir@1f02000 { ++ compatible = "allwinner,sun50i-a64-ir", ++ "allwinner,sun6i-a31-ir"; ++ reg = <0x01f02000 0x400>; ++ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; ++ clock-names = "apb", "ir"; ++ resets = <&r_ccu RST_APB0_IR>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_ir_rx_pin>; ++ status = "disabled"; ++ }; ++ + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun50i-a64-pwm", + "allwinner,sun5i-a13-pwm"; +@@ -942,12 +1238,17 @@ + function = "s_i2c"; + }; + +- r_pwm_pin: pwm { ++ r_ir_rx_pin: r-ir-rx-pin { ++ pins = "PL11"; ++ function = "s_cir_rx"; ++ }; ++ ++ r_pwm_pin: r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + }; + +- r_rsb_pins: rsb { ++ r_rsb_pins: r-rsb-pins { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; +@@ -972,6 +1273,7 @@ + "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = ; ++ clocks = <&osc24M>; + }; + }; + }; +-- +2.26.0 + +From fbe1642e24188e96f20ab5a3b003597288104e31 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 15:32:51 +0000 +Subject: [PATCH 2/9] arm: dts: AllWinner: sync axp803.dtsi to 5.6-rc1 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi +index e5eae8bafc..10e9186a76 100644 +--- a/arch/arm/dts/axp803.dtsi ++++ b/arch/arm/dts/axp803.dtsi +@@ -1,44 +1,5 @@ +-/* +- * Copyright 2017 Icenowy Zheng +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright 2017 Icenowy Zheng + + /* + * AXP803 Integrated Power Management Chip +@@ -49,6 +10,39 @@ + interrupt-controller; + #interrupt-cells = <1>; + ++ ac_power_supply: ac-power-supply { ++ compatible = "x-powers,axp803-ac-power-supply", ++ "x-powers,axp813-ac-power-supply"; ++ status = "disabled"; ++ }; ++ ++ axp_adc: adc { ++ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; ++ #io-channel-cells = <1>; ++ }; ++ ++ axp_gpio: gpio { ++ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ gpio0_ldo: gpio0-ldo { ++ pins = "GPIO0"; ++ function = "ldo"; ++ }; ++ ++ gpio1_ldo: gpio1-ldo { ++ pins = "GPIO1"; ++ function = "ldo"; ++ }; ++ }; ++ ++ battery_power_supply: battery-power-supply { ++ compatible = "x-powers,axp803-battery-power-supply", ++ "x-powers,axp813-battery-power-supply"; ++ status = "disabled"; ++ }; ++ + regulators { + /* Default work frequency for buck regulators */ + x-powers,dcdc-freq = <3000>; +@@ -152,4 +146,10 @@ + status = "disabled"; + }; + }; ++ ++ usb_power_supply: usb-power-supply { ++ compatible = "x-powers,axp803-usb-power-supply", ++ "x-powers,axp813-usb-power-supply"; ++ status = "disabled"; ++ }; + }; +-- +2.26.0 + +From f44987a0ccf064f9da4a119e7700605a3eb56447 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 15:34:58 +0000 +Subject: [PATCH 3/9] arm: dts: AllWinner: sync sun50i-a64.dtsi to 5.7-rc1 + +Adds the following two patches queued for 5.7: +- arm64: dts: sun50i-a64: Add i2c2 pins +- arm64: dts: allwinner: a64: Add MBUS controller node + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64.dtsi | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi +index 862b47dc9d..89a60fcf5a 100644 +--- a/arch/arm/dts/sun50i-a64.dtsi ++++ b/arch/arm/dts/sun50i-a64.dtsi +@@ -671,6 +671,11 @@ + function = "i2c1"; + }; + ++ i2c2_pins: i2c2-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ + /omit-if-no-ref/ + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", +@@ -958,12 +963,13 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + +- + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +@@ -1061,6 +1067,14 @@ + status = "disabled"; + }; + ++ mbus: dram-controller@1c62000 { ++ compatible = "allwinner,sun50i-a64-mbus"; ++ reg = <0x01c62000 0x1000>; ++ clocks = <&ccu 112>; ++ dma-ranges = <0x00000000 0x40000000 0xc0000000>; ++ #interconnect-cells = <1>; ++ }; ++ + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; +-- +2.26.0 + +From 465dbf297edb9881e79c1b81fef8d9328fbaf7ad Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 15:37:39 +0000 +Subject: [PATCH 4/9] arm: dts: allwinner: Add initial support for Pine64 + PinePhone + +The initial DT for the PinePhone models are queued for 5.7-rc1: +- 1.0: Early Developer Batch +- 1.1: Braveheart Batch + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/Makefile | 2 + + arch/arm/dts/sun50i-a64-pinephone-1.0.dts | 11 + + arch/arm/dts/sun50i-a64-pinephone-1.1.dts | 11 + + arch/arm/dts/sun50i-a64-pinephone.dtsi | 379 ++++++++++++++++++++++ + 4 files changed, 403 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.0.dts + create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.1.dts + create mode 100644 arch/arm/dts/sun50i-a64-pinephone.dtsi + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 820ee9733a..fb7516ee83 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -573,6 +573,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \ + sun50i-a64-pine64-plus.dtb \ + sun50i-a64-pine64.dtb \ + sun50i-a64-pinebook.dtb \ ++ sun50i-a64-pinephone-1.0.dtb \ ++ sun50i-a64-pinephone-1.1.dtb \ + sun50i-a64-sopine-baseboard.dtb \ + sun50i-a64-teres-i.dtb + dtb-$(CONFIG_MACH_SUN9I) += \ +diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts +new file mode 100644 +index 0000000000..0c42272106 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Developer Batch (1.0)"; ++ compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts +new file mode 100644 +index 0000000000..06a775c416 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Braveheart (1.1)"; ++ compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi +new file mode 100644 +index 0000000000..cefda145c3 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi +@@ -0,0 +1,379 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2019 Icenowy Zheng ++// Copyright (C) 2020 Martijn Braam ++// Copyright (C) 2020 Ondrej Jirman ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ blue { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ ++ }; ++ ++ green { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ ++ }; ++ ++ red { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vibrator { ++ compatible = "gpio-vibrator"; ++ enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ ++ vcc-supply = <®_dcdc1>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ cpvdd-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* Magnetometer */ ++ lis3mdl@1e { ++ compatible = "st,lis3mdl-magn"; ++ reg = <0x1e>; ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++ ++ /* Accelerometer/gyroscope */ ++ mpu6050@68 { ++ compatible = "invensense,mpu6050"; ++ reg = <0x68>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++}; ++ ++/* Connected to pogo pins (external spring based pinheader for user addons) */ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&pio { ++ vcc-pb-supply = <®_dcdc1>; ++ vcc-pc-supply = <®_dcdc1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_aldo1>; ++ vcc-pf-supply = <®_dcdc1>; ++ vcc-pg-supply = <®_dldo4>; ++ vcc-ph-supply = <®_dcdc1>; ++}; ++ ++&r_pio { ++ /* ++ * FIXME: We can't add that supply for now since it would ++ * create a circular dependency between pinctrl, the regulator ++ * and the RSB Bus. ++ * ++ * vcc-pl-supply = <®_aldo2>; ++ */ ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-dsi-sensor"; ++}; ++ ++®_dldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-mipi-io"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi-io"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-lpddr"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-lcd-ctp-stk"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8-typec"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Headset Microphone", ++ "Microphone", "Internal Microphone", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Earpiece", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Headphone Jack", "HP", ++ "Internal Earpiece", "EARPIECE", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone", "MBIAS", ++ "MIC1", "Internal Microphone", ++ "Headset Microphone", "HBIAS", ++ "MIC2", "Headset Microphone"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++/* Connected to the modem (hardware flow control can't be used) */ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +-- +2.26.0 + +From e8fd62cbf02828da817628d15111e6e974144473 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 15:46:43 +0000 +Subject: [PATCH 5/9] sync sun50i-a64 clocks with linux 5.6 + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h +index d66432c6e6..e512a1c9b0 100644 +--- a/include/dt-bindings/clock/sun50i-a64-ccu.h ++++ b/include/dt-bindings/clock/sun50i-a64-ccu.h +@@ -43,8 +43,10 @@ + #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ + #define _DT_BINDINGS_CLK_SUN50I_A64_H_ + ++#define CLK_PLL_VIDEO0 7 + #define CLK_PLL_PERIPH0 11 + ++#define CLK_CPUX 21 + #define CLK_BUS_MIPI_DSI 28 + #define CLK_BUS_CE 29 + #define CLK_BUS_DMA 30 +-- +2.26.0 + +From a07a9d6cb77ea0bc21cd64922bb428faf5b7e121 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Mar 2020 15:49:11 +0000 +Subject: [PATCH 6/9] add upstream sun50i-a64-cpu-opp.dtsi added in 5.6 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ + 1 file changed, 75 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi + +diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +new file mode 100644 +index 0000000000..578c37490d +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +@@ -0,0 +1,75 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2020 Vasily khoruzhick ++ */ ++ ++/ { ++ cpu0_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ ++ opp-648000000 { ++ opp-hz = /bits/ 64 <648000000>; ++ opp-microvolt = <1040000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-816000000 { ++ opp-hz = /bits/ 64 <816000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-912000000 { ++ opp-hz = /bits/ 64 <912000000>; ++ opp-microvolt = <1120000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-960000000 { ++ opp-hz = /bits/ 64 <960000000>; ++ opp-microvolt = <1160000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1008000000 { ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt = <1200000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1240000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1104000000 { ++ opp-hz = /bits/ 64 <1104000000>; ++ opp-microvolt = <1260000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1152000000 { ++ opp-hz = /bits/ 64 <1152000000>; ++ opp-microvolt = <1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu1 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu2 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu3 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; +-- +2.26.0 + +From 493869ec73e6ba999b6f7c49369e966ebfb8ef0b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 14 Apr 2020 09:50:11 +0100 +Subject: [PATCH 7/9] Initial Pinephone support + +Signed-off-by: Peter Robinson +--- + configs/pinephone_defconfig | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + create mode 100644 configs/pinephone_defconfig + +diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig +new file mode 100644 +index 0000000000..a7d1e610d4 +--- /dev/null ++++ b/configs/pinephone_defconfig +@@ -0,0 +1,26 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN50I=y ++CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y ++CONFIG_DRAM_CLK=552 ++CONFIG_DRAM_ZQ=3881949 ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++CONFIG_R_I2C_ENABLE=y ++CONFIG_SPL_SPI_SUNXI=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_USE_PREBOOT=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.1" ++CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.0" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_SUNXI=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +-- +2.26.0 + +From 163b30d9cd1c0cf77107e0330567bbda063410da Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 14 Apr 2020 09:51:44 +0100 +Subject: [PATCH 8/9] Initial PineTab dts from linux 5.7-rc1 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++++++++++++ + 2 files changed, 461 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-pinetab.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index fb7516ee83..50c1d48e84 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -575,6 +575,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ + sun50i-a64-pinebook.dtb \ + sun50i-a64-pinephone-1.0.dtb \ + sun50i-a64-pinephone-1.1.dtb \ ++ sun50i-a64-pinetab.dtb \ + sun50i-a64-sopine-baseboard.dtb \ + sun50i-a64-teres-i.dtb + dtb-$(CONFIG_MACH_SUN9I) += \ +diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts +new file mode 100644 +index 0000000000..316e8a4439 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinetab.dts +@@ -0,0 +1,460 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2019 Icenowy Zheng ++ * ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "PineTab"; ++ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; ++ ++ aliases { ++ serial0 = &uart0; ++ ethernet0 = &rtl8723cs; ++ }; ++ ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; ++ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; ++ default-brightness-level = <15>; ++ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ ++ power-supply = <&vdd_bl>; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ i2c-csi { ++ compatible = "i2c-gpio"; ++ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ ++ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ ++ i2c-gpio,delay-us = <5>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* Rear camera */ ++ ov5640: camera@3c { ++ compatible = "ovti,ov5640"; ++ reg = <0x3c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_mclk_pin>; ++ clocks = <&ccu CLK_CSI_MCLK>; ++ clock-names = "xclk"; ++ ++ AVDD-supply = <®_dldo3>; ++ DOVDD-supply = <®_aldo1>; ++ DVDD-supply = <®_eldo3>; ++ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ ++ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ ++ ++ port { ++ ov5640_ep: endpoint { ++ remote-endpoint = <&csi_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vdd_bl: regulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "bl-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ hpvcc-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&csi { ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi_ep: endpoint { ++ remote-endpoint = <&ov5640_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "feixin,k101-im2ba02"; ++ reg = <0>; ++ avdd-supply = <®_dc1sw>; ++ dvdd-supply = <®_dc1sw>; ++ cvdd-supply = <®_ldo_io1>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ ++ backlight = <&backlight>; ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt9271"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ ++ AVDD28-supply = <®_ldo_io1>; ++ }; ++}; ++ ++&i2c0_pins { ++ bias-pull-up; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* TODO: add Bochs BMA223 accelerometer here */ ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mixer1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&pwm { ++ status = "okay"; ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ x-powers,drive-vbus-en; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dc1sw { ++ regulator-name = "vcc-lcd"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-hdmi-dsi-sensor"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi"; ++}; ++ ++®_drivevbus { ++ regulator-name = "usb0-vbus"; ++ status = "okay"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "cpvdd"; ++}; ++ ++®_eldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca-1v8"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-usb"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-enable-ramp-delay = <3500000>; ++ regulator-name = "vcc-touchscreen"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", ++ "Microphone", "Internal Microphone Right", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Headphone Jack", "HP", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone Left", "MBIAS", ++ "MIC1", "Internal Microphone Left", ++ "Internal Microphone Right", "HBIAS", ++ "MIC2", "Internal Microphone Right"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; ++ usb1_vbus-supply = <®_ldo_io0>; ++ status = "okay"; ++}; +-- +2.26.0 + +From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 14 Apr 2020 09:53:07 +0100 +Subject: [PATCH 9/9] initial pinetab support + +Signed-off-by: Peter Robinson +--- + configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + create mode 100644 configs/pinetab_defconfig + +diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig +new file mode 100644 +index 0000000000..5b9620f3e5 +--- /dev/null ++++ b/configs/pinetab_defconfig +@@ -0,0 +1,26 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN50I=y ++CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y ++CONFIG_DRAM_CLK=552 ++CONFIG_DRAM_ZQ=3881949 ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++CONFIG_R_I2C_ENABLE=y ++CONFIG_SPL_SPI_SUNXI=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_USE_PREBOOT=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab" ++CONFIG_OF_LIST="sun50i-a64-pinetab" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_SUNXI=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +-- +2.26.0 + diff --git a/aarch64-boards b/aarch64-boards index 4e8f97c..c449481 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -48,6 +48,8 @@ p3450-0000 pine64-lts pine64_plus pinebook +pinephone +pinetab pine_h64 poplar puma-rk3399 diff --git a/sources b/sources index 50992b8..bd41109 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04-rc5.tar.bz2) = 4fed5a45e9ebfc931cb4f06bbdb9ec1a477ed7dff902b8e9013fc7e41a78e4448749b88c450ee5ce62b6756031ec250f11e9afbea01bab2702ac6e9bb22f4ad2 +SHA512 (u-boot-2020.04.tar.bz2) = e04fe54883149123730605b084324ac0d1d72ce6913467bbe587a5a2675bcf7bb393405d9a446dc0c64ba42abc1e862ae5a132e9e51aa7390e2e9fce045af8d8 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2002614..e362f8a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc1 Name: uboot-tools Version: 2020.04 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -30,10 +30,11 @@ Patch7: efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch Patch10: Misc-fixes-for-Tegra.patch Patch11: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch12: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch - # Rockchips improvements -Patch20: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch -Patch21: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch13: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch +Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +# AllWinner improvements +Patch15: AllWinner-Pine64-bits.patch BuildRequires: bc BuildRequires: dtc @@ -255,6 +256,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Apr 14 2020 Peter Robinson - 2020.04-1 +- 2020.04 + * Tue Apr 7 2020 Peter Robinson 2020.04-0.7-rc5 - 2020.04 RC5 From db65f1abecad985b606e831b3dcbbcaaf3416f7a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 14 Apr 2020 10:44:13 +0100 Subject: [PATCH 076/351] add missing patch --- AllWinner-Pine64-bits.patch | 111 ++++++++++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/AllWinner-Pine64-bits.patch b/AllWinner-Pine64-bits.patch index 27f95f8..8353921 100644 --- a/AllWinner-Pine64-bits.patch +++ b/AllWinner-Pine64-bits.patch @@ -2171,3 +2171,114 @@ index 0000000000..5b9620f3e5 -- 2.26.0 +From ba1f187c80bcbb3181a4c6b20ab0c494bc01cf12 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 14 Apr 2020 10:43:10 +0100 +Subject: [PATCH] Add dt-bindings/leds/common.h from linux 5.7-rc1 + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/leds/common.h | 91 +++++++++++++++++++++++++++++++ + 1 file changed, 91 insertions(+) + create mode 100644 include/dt-bindings/leds/common.h + +diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h +new file mode 100644 +index 0000000000..0ce7dfc00d +--- /dev/null ++++ b/include/dt-bindings/leds/common.h +@@ -0,0 +1,91 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * This header provides macros for the common LEDs device tree bindings. ++ * ++ * Copyright (C) 2015, Samsung Electronics Co., Ltd. ++ * Author: Jacek Anaszewski ++ * ++ * Copyright (C) 2019 Jacek Anaszewski ++ * Copyright (C) 2020 Pavel Machek ++ */ ++ ++#ifndef __DT_BINDINGS_LEDS_H ++#define __DT_BINDINGS_LEDS_H ++ ++/* External trigger type */ ++#define LEDS_TRIG_TYPE_EDGE 0 ++#define LEDS_TRIG_TYPE_LEVEL 1 ++ ++/* Boost modes */ ++#define LEDS_BOOST_OFF 0 ++#define LEDS_BOOST_ADAPTIVE 1 ++#define LEDS_BOOST_FIXED 2 ++ ++/* Standard LED colors */ ++#define LED_COLOR_ID_WHITE 0 ++#define LED_COLOR_ID_RED 1 ++#define LED_COLOR_ID_GREEN 2 ++#define LED_COLOR_ID_BLUE 3 ++#define LED_COLOR_ID_AMBER 4 ++#define LED_COLOR_ID_VIOLET 5 ++#define LED_COLOR_ID_YELLOW 6 ++#define LED_COLOR_ID_IR 7 ++#define LED_COLOR_ID_MAX 8 ++ ++/* Standard LED functions */ ++/* Keyboard LEDs, usually it would be input4::capslock etc. */ ++/* Obsolete equivalent: "shift-key-light" */ ++#define LED_FUNCTION_CAPSLOCK "capslock" ++#define LED_FUNCTION_SCROLLLOCK "scrolllock" ++#define LED_FUNCTION_NUMLOCK "numlock" ++/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), ++ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ ++#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" ++ ++/* System LEDs, usually found on system body. ++ platform::mute (etc) is sometimes seen, :mute would be better */ ++#define LED_FUNCTION_POWER "power" ++#define LED_FUNCTION_DISK "disk" ++ ++/* Obsolete: "platform:*:charging" (allwinner sun50i) */ ++#define LED_FUNCTION_CHARGING "charging" ++/* Used RGB notification LEDs common on phones. ++ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), ++ "lp5523:{r,g,b}" (Nokia N900) */ ++#define LED_FUNCTION_STATUS "status" ++ ++#define LED_FUNCTION_MICMUTE "micmute" ++#define LED_FUNCTION_MUTE "mute" ++ ++/* Miscelleaus functions. Use functions above if you can. */ ++#define LED_FUNCTION_ACTIVITY "activity" ++#define LED_FUNCTION_ALARM "alarm" ++#define LED_FUNCTION_BACKLIGHT "backlight" ++#define LED_FUNCTION_BLUETOOTH "bluetooth" ++#define LED_FUNCTION_BOOT "boot" ++#define LED_FUNCTION_CPU "cpu" ++#define LED_FUNCTION_DEBUG "debug" ++#define LED_FUNCTION_DISK_ACTIVITY "disk-activity" ++#define LED_FUNCTION_DISK_ERR "disk-err" ++#define LED_FUNCTION_DISK_READ "disk-read" ++#define LED_FUNCTION_DISK_WRITE "disk-write" ++#define LED_FUNCTION_FAULT "fault" ++#define LED_FUNCTION_FLASH "flash" ++#define LED_FUNCTION_HEARTBEAT "heartbeat" ++#define LED_FUNCTION_INDICATOR "indicator" ++#define LED_FUNCTION_LAN "lan" ++#define LED_FUNCTION_MAIL "mail" ++#define LED_FUNCTION_MTD "mtd" ++#define LED_FUNCTION_PANIC "panic" ++#define LED_FUNCTION_PROGRAMMING "programming" ++#define LED_FUNCTION_RX "rx" ++#define LED_FUNCTION_SD "sd" ++#define LED_FUNCTION_STANDBY "standby" ++#define LED_FUNCTION_TORCH "torch" ++#define LED_FUNCTION_TX "tx" ++#define LED_FUNCTION_USB "usb" ++#define LED_FUNCTION_WAN "wan" ++#define LED_FUNCTION_WLAN "wlan" ++#define LED_FUNCTION_WPS "wps" ++ ++#endif /* __DT_BINDINGS_LEDS_H */ +-- +2.26.0 + From da6fd9ebdefc809433521d57ac2385d3f57efc1c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 18 Apr 2020 13:19:10 +0100 Subject: [PATCH 077/351] Fix Wandboard board detection (rhbz 1825247) --- uboot-tools.spec | 7 +- ...rsion-detection-for-mx6q-mx6dl-revD1.patch | 825 ++++++++++++++++++ 2 files changed, 831 insertions(+), 1 deletion(-) create mode 100644 wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch diff --git a/uboot-tools.spec b/uboot-tools.spec index e362f8a..cfeb178 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -35,6 +35,8 @@ Patch13: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch # AllWinner improvements Patch15: AllWinner-Pine64-bits.patch +# Wandboard fixes +Patch16: wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch BuildRequires: bc BuildRequires: dtc @@ -256,6 +258,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Apr 18 2020 Peter Robinson - 2020.04-2 +- Fix Wandboard board detection (rhbz 1825247) + * Tue Apr 14 2020 Peter Robinson - 2020.04-1 - 2020.04 diff --git a/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch b/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch new file mode 100644 index 0000000..06cbf88 --- /dev/null +++ b/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch @@ -0,0 +1,825 @@ +From patchwork Fri Apr 17 12:27:09 2020 +Content-Type: text/plain; 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+ #include "imx6dl.dtsi" +-#include "imx6qdl-wandboard-revb1.dtsi" ++#include "imx6qdl-wandboard-revd1.dtsi" + + / { +- model = "Wandboard i.MX6 Dual Lite Board rev B1"; ++ model = "Wandboard i.MX6 Dual Lite Board revD1"; + compatible = "wand,imx6dl-wandboard", "fsl,imx6dl"; + + memory@10000000 { +diff --git a/arch/arm/dts/imx6q-wandboard-revb1.dts b/arch/arm/dts/imx6q-wandboard-revd1.dts +similarity index 80% +rename from arch/arm/dts/imx6q-wandboard-revb1.dts +rename to arch/arm/dts/imx6q-wandboard-revd1.dts +index f6ccbecff9..55331021d8 100644 +--- a/arch/arm/dts/imx6q-wandboard-revb1.dts ++++ b/arch/arm/dts/imx6q-wandboard-revd1.dts +@@ -6,10 +6,10 @@ + */ + /dts-v1/; + #include "imx6q.dtsi" +-#include "imx6qdl-wandboard-revb1.dtsi" ++#include "imx6qdl-wandboard-revd1.dtsi" + + / { +- model = "Wandboard i.MX6 Quad Board rev B1"; ++ model = "Wandboard i.MX6 Quad Board revD1"; + compatible = "wand,imx6q-wandboard", "fsl,imx6q"; + + memory@10000000 { +diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c +index 5725c5816c..90957167b2 100644 +--- a/board/wandboard/wandboard.c ++++ b/board/wandboard/wandboard.c +@@ -484,13 +484,13 @@ int checkboard(void) + int board_fit_config_name_match(const char *name) + { + if (is_mx6dq()) { +- if (!strcmp(name, "imx6q-wandboard-revb1")) ++ if (!strcmp(name, "imx6q-wandboard-revd1")) + return 0; + } else if (is_mx6dqp()) { + if (!strcmp(name, "imx6qp-wandboard-revd1")) + return 0; + } else if (is_mx6dl() || is_mx6solo()) { +- if (!strcmp(name, "imx6dl-wandboard-revb1")) ++ if (!strcmp(name, "imx6dl-wandboard-revd1")) + return 0; + } + +diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig +index 82e517b90f..ee70758f3a 100644 +--- a/configs/wandboard_defconfig ++++ b/configs/wandboard_defconfig +@@ -46,8 +46,8 @@ CONFIG_CMD_BMP=y + CONFIG_CMD_CACHE=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_OF_CONTROL=y +-CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revb1" +-CONFIG_OF_LIST="imx6q-wandboard-revb1 imx6qp-wandboard-revd1 imx6dl-wandboard-revb1" ++CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" ++CONFIG_OF_LIST="imx6q-wandboard-revd1 imx6qp-wandboard-revd1 imx6dl-wandboard-revd1" + CONFIG_MULTI_DTB_FIT=y + CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + +From patchwork Fri Apr 17 12:27:10 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 1272206 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Fri, 17 Apr 2020 05:26:41 -0700 (PDT) +Received: from localhost.localdomain ([2804:14c:482:271:a8cc:37bd:62f6:da03]) + by smtp.gmail.com with ESMTPSA id + m66sm16997985qkf.42.2020.04.17.05.26.38 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Fri, 17 Apr 2020 05:26:40 -0700 (PDT) +From: Fabio Estevam +To: sbabic@denx.de +Cc: hs@denx.de, derek@ihtfp.com, u-boot@lists.denx.de, + Fabio Estevam +Subject: [PATCH v2 2/5] pmic: pfuze100: Change error message level to debug +Date: Fri, 17 Apr 2020 09:27:10 -0300 +Message-Id: <20200417122713.30574-2-festevam@gmail.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200417122713.30574-1-festevam@gmail.com> +References: <20200417122713.30574-1-festevam@gmail.com> +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +In some cases U-Boot runs the same binary on different board versions. + +In wandboard, for example, there are versions with the PFUZE100 PMIC +populated and others without it. + +When the PMIC is not present, it is not really useful to get PMIC error, +so change the error message level to debug instead. + +Signed-off-by: Fabio Estevam +--- +Changes since v1: +- Reworded the commit log for clarity + + drivers/power/pmic/pfuze100.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c +index 6cf5f35f0f..db630f3ad0 100644 +--- a/drivers/power/pmic/pfuze100.c ++++ b/drivers/power/pmic/pfuze100.c +@@ -41,7 +41,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff, + static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + { + if (dm_i2c_read(dev, reg, buff, len)) { +- pr_err("read error from device: %p register: %#x!\n", dev, reg); ++ debug("read error from device: %p register: %#x!\n", dev, reg); + return -EIO; + } + + +From patchwork Fri Apr 17 12:27:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 1272207 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20161025 header.b=EvnTm2er; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 493b7F6VRzz9sR4 + for ; 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+ if (reg < 0) { +- printf("pmic_reg_read() ret %d\n", reg); ++ debug("pmic_reg_read() ret %d\n", reg); + return 0; + } + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + +From patchwork Fri Apr 17 12:27:12 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 1272208 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20161025 header.b=Obn1Ycw6; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 493b7d0GvNz9sR4 + for ; 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run finduuid; run distro_bootcmd" + CONFIG_SYS_CONSOLE_IS_IN_ENV=y + CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y + # CONFIG_DISPLAY_BOARDINFO is not set +-CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_BOUNCE_BUFFER=y + CONFIG_BOARD_EARLY_INIT_F=y + CONFIG_SPL_SEPARATE_BSS=y + +From patchwork Fri Apr 17 12:27:13 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Fabio Estevam +X-Patchwork-Id: 1272210 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20161025 header.b=kEVeM9Yu; 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++ gpio_request(REV_DETECTION, "REV_DETECT"); + gpio_direction_input(REV_DETECTION); + + if (gpio_get_value(REV_DETECTION)) +@@ -442,6 +443,14 @@ int board_late_init(void) + env_set("board_name", "B1"); + #endif + setup_iomux_enet(); ++ ++ if (is_revd1()) ++ puts("Board: Wandboard rev D1\n"); ++ else if (is_revc1()) ++ puts("Board: Wandboard rev C1\n"); ++ else ++ puts("Board: Wandboard rev B1\n"); ++ + return 0; + } + +@@ -466,20 +475,6 @@ int board_init(void) + return 0; + } + +-int checkboard(void) +-{ +- gpio_request(REV_DETECTION, "REV_DETECT"); +- +- if (is_revd1()) +- puts("Board: Wandboard rev D1\n"); +- else if (is_revc1()) +- puts("Board: Wandboard rev C1\n"); +- else +- puts("Board: Wandboard rev B1\n"); +- +- return 0; +-} +- + #ifdef CONFIG_SPL_LOAD_FIT + int board_fit_config_name_match(const char *name) + { From 7b999dab4280324fa26ec5321f0e73243f2ff8f2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Apr 2020 22:30:59 +0100 Subject: [PATCH 078/351] Fixes for Rockchips devices --- AllWinner-Pine64-bits.patch | 112 -- ...ort-for-the-Pinebook-Pro-laptop-from.patch | 1674 +++++++++++++++++ rockpro64-limit-speed-on-mSD-slot.patch | 28 + uboot-tools.spec | 18 +- 4 files changed, 1713 insertions(+), 119 deletions(-) create mode 100644 initial-support-for-the-Pinebook-Pro-laptop-from.patch create mode 100644 rockpro64-limit-speed-on-mSD-slot.patch diff --git a/AllWinner-Pine64-bits.patch b/AllWinner-Pine64-bits.patch index 8353921..569afc8 100644 --- a/AllWinner-Pine64-bits.patch +++ b/AllWinner-Pine64-bits.patch @@ -2170,115 +2170,3 @@ index 0000000000..5b9620f3e5 +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- 2.26.0 - -From ba1f187c80bcbb3181a4c6b20ab0c494bc01cf12 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Apr 2020 10:43:10 +0100 -Subject: [PATCH] Add dt-bindings/leds/common.h from linux 5.7-rc1 - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/leds/common.h | 91 +++++++++++++++++++++++++++++++ - 1 file changed, 91 insertions(+) - create mode 100644 include/dt-bindings/leds/common.h - -diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h -new file mode 100644 -index 0000000000..0ce7dfc00d ---- /dev/null -+++ b/include/dt-bindings/leds/common.h -@@ -0,0 +1,91 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * This header provides macros for the common LEDs device tree bindings. -+ * -+ * Copyright (C) 2015, Samsung Electronics Co., Ltd. -+ * Author: Jacek Anaszewski -+ * -+ * Copyright (C) 2019 Jacek Anaszewski -+ * Copyright (C) 2020 Pavel Machek -+ */ -+ -+#ifndef __DT_BINDINGS_LEDS_H -+#define __DT_BINDINGS_LEDS_H -+ -+/* External trigger type */ -+#define LEDS_TRIG_TYPE_EDGE 0 -+#define LEDS_TRIG_TYPE_LEVEL 1 -+ -+/* Boost modes */ -+#define LEDS_BOOST_OFF 0 -+#define LEDS_BOOST_ADAPTIVE 1 -+#define LEDS_BOOST_FIXED 2 -+ -+/* Standard LED colors */ -+#define LED_COLOR_ID_WHITE 0 -+#define LED_COLOR_ID_RED 1 -+#define LED_COLOR_ID_GREEN 2 -+#define LED_COLOR_ID_BLUE 3 -+#define LED_COLOR_ID_AMBER 4 -+#define LED_COLOR_ID_VIOLET 5 -+#define LED_COLOR_ID_YELLOW 6 -+#define LED_COLOR_ID_IR 7 -+#define LED_COLOR_ID_MAX 8 -+ -+/* Standard LED functions */ -+/* Keyboard LEDs, usually it would be input4::capslock etc. */ -+/* Obsolete equivalent: "shift-key-light" */ -+#define LED_FUNCTION_CAPSLOCK "capslock" -+#define LED_FUNCTION_SCROLLLOCK "scrolllock" -+#define LED_FUNCTION_NUMLOCK "numlock" -+/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), -+ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ -+#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" -+ -+/* System LEDs, usually found on system body. -+ platform::mute (etc) is sometimes seen, :mute would be better */ -+#define LED_FUNCTION_POWER "power" -+#define LED_FUNCTION_DISK "disk" -+ -+/* Obsolete: "platform:*:charging" (allwinner sun50i) */ -+#define LED_FUNCTION_CHARGING "charging" -+/* Used RGB notification LEDs common on phones. -+ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), -+ "lp5523:{r,g,b}" (Nokia N900) */ -+#define LED_FUNCTION_STATUS "status" -+ -+#define LED_FUNCTION_MICMUTE "micmute" -+#define LED_FUNCTION_MUTE "mute" -+ -+/* Miscelleaus functions. Use functions above if you can. */ -+#define LED_FUNCTION_ACTIVITY "activity" -+#define LED_FUNCTION_ALARM "alarm" -+#define LED_FUNCTION_BACKLIGHT "backlight" -+#define LED_FUNCTION_BLUETOOTH "bluetooth" -+#define LED_FUNCTION_BOOT "boot" -+#define LED_FUNCTION_CPU "cpu" -+#define LED_FUNCTION_DEBUG "debug" -+#define LED_FUNCTION_DISK_ACTIVITY "disk-activity" -+#define LED_FUNCTION_DISK_ERR "disk-err" -+#define LED_FUNCTION_DISK_READ "disk-read" -+#define LED_FUNCTION_DISK_WRITE "disk-write" -+#define LED_FUNCTION_FAULT "fault" -+#define LED_FUNCTION_FLASH "flash" -+#define LED_FUNCTION_HEARTBEAT "heartbeat" -+#define LED_FUNCTION_INDICATOR "indicator" -+#define LED_FUNCTION_LAN "lan" -+#define LED_FUNCTION_MAIL "mail" -+#define LED_FUNCTION_MTD "mtd" -+#define LED_FUNCTION_PANIC "panic" -+#define LED_FUNCTION_PROGRAMMING "programming" -+#define LED_FUNCTION_RX "rx" -+#define LED_FUNCTION_SD "sd" -+#define LED_FUNCTION_STANDBY "standby" -+#define LED_FUNCTION_TORCH "torch" -+#define LED_FUNCTION_TX "tx" -+#define LED_FUNCTION_USB "usb" -+#define LED_FUNCTION_WAN "wan" -+#define LED_FUNCTION_WLAN "wlan" -+#define LED_FUNCTION_WPS "wps" -+ -+#endif /* __DT_BINDINGS_LEDS_H */ --- -2.26.0 - diff --git a/initial-support-for-the-Pinebook-Pro-laptop-from.patch b/initial-support-for-the-Pinebook-Pro-laptop-from.patch new file mode 100644 index 0000000..47688ee --- /dev/null +++ b/initial-support-for-the-Pinebook-Pro-laptop-from.patch @@ -0,0 +1,1674 @@ +From cc06e37c2b69b7a1263dabeb39aafc1cf98560d8 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Jan 2020 03:13:02 +0000 +Subject: [PATCH 1/5] video: simple_panel: add boe,nv140fhmn49 display + +add "boe,nv140fhmn49" display to compatible node. + +Signed-off-by: Peter Robinson +Cc: Anatolij Gustschin +--- + drivers/video/simple_panel.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c +index c3c0e84732..5722811117 100644 +--- a/drivers/video/simple_panel.c ++++ b/drivers/video/simple_panel.c +@@ -105,6 +105,7 @@ static const struct udevice_id simple_panel_ids[] = { + { .compatible = "auo,b133xtn01" }, + { .compatible = "auo,b116xw03" }, + { .compatible = "auo,b133htn01" }, ++ { .compatible = "boe,nv140fhmn49" }, + { .compatible = "lg,lb070wv8" }, + { } + }; +-- +2.26.1 + +From a3e23dca57bff1043bd6c746458dae2dd446948e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Apr 2020 10:31:53 +0100 +Subject: [PATCH 2/5] dt-bindings: input: adopt Linux gpio-keys binding + constants + +Sync the gpio-keys input bindings from linux 5.7-rc1. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/input/gpio-keys.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + create mode 100644 include/dt-bindings/input/gpio-keys.h + +diff --git a/include/dt-bindings/input/gpio-keys.h b/include/dt-bindings/input/gpio-keys.h +new file mode 100644 +index 0000000000..8962df79e7 +--- /dev/null ++++ b/include/dt-bindings/input/gpio-keys.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * This header provides constants for gpio keys bindings. ++ */ ++ ++#ifndef _DT_BINDINGS_GPIO_KEYS_H ++#define _DT_BINDINGS_GPIO_KEYS_H ++ ++#define EV_ACT_ANY 0x00 /* asserted or deasserted */ ++#define EV_ACT_ASSERTED 0x01 /* asserted */ ++#define EV_ACT_DEASSERTED 0x02 /* deasserted */ ++ ++#endif /* _DT_BINDINGS_GPIO_KEYS_H */ +-- +2.26.1 + +From 6c657b48a13be9b98fea18cd5a72b0d6f547a9d0 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Apr 2020 10:32:21 +0100 +Subject: [PATCH 3/5] dt-bindings: leds: adopt Linux leds common binding + constants + +Sync the common leds bindings from linux 5.7-rc1. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/leds/common.h | 91 +++++++++++++++++++++++++++++++ + 1 file changed, 91 insertions(+) + create mode 100644 include/dt-bindings/leds/common.h + +diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h +new file mode 100644 +index 0000000000..0ce7dfc00d +--- /dev/null ++++ b/include/dt-bindings/leds/common.h +@@ -0,0 +1,91 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * This header provides macros for the common LEDs device tree bindings. ++ * ++ * Copyright (C) 2015, Samsung Electronics Co., Ltd. ++ * Author: Jacek Anaszewski ++ * ++ * Copyright (C) 2019 Jacek Anaszewski ++ * Copyright (C) 2020 Pavel Machek ++ */ ++ ++#ifndef __DT_BINDINGS_LEDS_H ++#define __DT_BINDINGS_LEDS_H ++ ++/* External trigger type */ ++#define LEDS_TRIG_TYPE_EDGE 0 ++#define LEDS_TRIG_TYPE_LEVEL 1 ++ ++/* Boost modes */ ++#define LEDS_BOOST_OFF 0 ++#define LEDS_BOOST_ADAPTIVE 1 ++#define LEDS_BOOST_FIXED 2 ++ ++/* Standard LED colors */ ++#define LED_COLOR_ID_WHITE 0 ++#define LED_COLOR_ID_RED 1 ++#define LED_COLOR_ID_GREEN 2 ++#define LED_COLOR_ID_BLUE 3 ++#define LED_COLOR_ID_AMBER 4 ++#define LED_COLOR_ID_VIOLET 5 ++#define LED_COLOR_ID_YELLOW 6 ++#define LED_COLOR_ID_IR 7 ++#define LED_COLOR_ID_MAX 8 ++ ++/* Standard LED functions */ ++/* Keyboard LEDs, usually it would be input4::capslock etc. */ ++/* Obsolete equivalent: "shift-key-light" */ ++#define LED_FUNCTION_CAPSLOCK "capslock" ++#define LED_FUNCTION_SCROLLLOCK "scrolllock" ++#define LED_FUNCTION_NUMLOCK "numlock" ++/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), ++ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ ++#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" ++ ++/* System LEDs, usually found on system body. ++ platform::mute (etc) is sometimes seen, :mute would be better */ ++#define LED_FUNCTION_POWER "power" ++#define LED_FUNCTION_DISK "disk" ++ ++/* Obsolete: "platform:*:charging" (allwinner sun50i) */ ++#define LED_FUNCTION_CHARGING "charging" ++/* Used RGB notification LEDs common on phones. ++ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), ++ "lp5523:{r,g,b}" (Nokia N900) */ ++#define LED_FUNCTION_STATUS "status" ++ ++#define LED_FUNCTION_MICMUTE "micmute" ++#define LED_FUNCTION_MUTE "mute" ++ ++/* Miscelleaus functions. Use functions above if you can. */ ++#define LED_FUNCTION_ACTIVITY "activity" ++#define LED_FUNCTION_ALARM "alarm" ++#define LED_FUNCTION_BACKLIGHT "backlight" ++#define LED_FUNCTION_BLUETOOTH "bluetooth" ++#define LED_FUNCTION_BOOT "boot" ++#define LED_FUNCTION_CPU "cpu" ++#define LED_FUNCTION_DEBUG "debug" ++#define LED_FUNCTION_DISK_ACTIVITY "disk-activity" ++#define LED_FUNCTION_DISK_ERR "disk-err" ++#define LED_FUNCTION_DISK_READ "disk-read" ++#define LED_FUNCTION_DISK_WRITE "disk-write" ++#define LED_FUNCTION_FAULT "fault" ++#define LED_FUNCTION_FLASH "flash" ++#define LED_FUNCTION_HEARTBEAT "heartbeat" ++#define LED_FUNCTION_INDICATOR "indicator" ++#define LED_FUNCTION_LAN "lan" ++#define LED_FUNCTION_MAIL "mail" ++#define LED_FUNCTION_MTD "mtd" ++#define LED_FUNCTION_PANIC "panic" ++#define LED_FUNCTION_PROGRAMMING "programming" ++#define LED_FUNCTION_RX "rx" ++#define LED_FUNCTION_SD "sd" ++#define LED_FUNCTION_STANDBY "standby" ++#define LED_FUNCTION_TORCH "torch" ++#define LED_FUNCTION_TX "tx" ++#define LED_FUNCTION_USB "usb" ++#define LED_FUNCTION_WAN "wan" ++#define LED_FUNCTION_WLAN "wlan" ++#define LED_FUNCTION_WPS "wps" ++ ++#endif /* __DT_BINDINGS_LEDS_H */ +-- +2.26.1 + +From 27f56eec1fa5baa4fc82ebb356a50826bb9f5643 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Apr 2020 13:28:51 +0100 +Subject: [PATCH 4/5] arm: dts: rockchip: Add initial DT for Pinebook Pro + +Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/rk3399-pinebook-pro.dts | 1096 ++++++++++++++++++++++++++ + 2 files changed, 1097 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 820ee9733a..885bf0ef58 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ + rk3399-nanopi-m4.dtb \ + rk3399-nanopi-neo4.dtb \ + rk3399-orangepi.dtb \ ++ rk3399-pinebook-pro.dtb \ + rk3399-puma-ddr1333.dtb \ + rk3399-puma-ddr1600.dtb \ + rk3399-puma-ddr1866.dtb \ +diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts +new file mode 100644 +index 0000000000..294d21bf45 +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinebook-pro.dts +@@ -0,0 +1,1096 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2018 Akash Gajjar ++ * Copyright (c) 2020 Tobias Schramm ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 Pinebook Pro"; ++ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ backlight: edp-backlight { ++ compatible = "pwm-backlight"; ++ power-supply = <&vcc_12v>; ++ pwms = <&pwm0 0 740740 0>; ++ }; ++ ++ edp_panel: edp-panel { ++ compatible = "boe,nv140fhmn49"; ++ backlight = <&backlight>; ++ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&panel_en_gpio>; ++ power-supply = <&vcc3v3_panel>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ panel_in_edp: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&edp_out_panel>; ++ }; ++ }; ++ }; ++ }; ++ ++ /* ++ * Use separate nodes for gpio-keys to allow for selective deactivation ++ * of wakeup sources via sysfs without disabling the whole key ++ */ ++ gpio-key-lid { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lidbtn_gpio>; ++ ++ lid { ++ debounce-interval = <20>; ++ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; ++ label = "Lid"; ++ linux,code = ; ++ linux,input-type = ; ++ wakeup-event-action = ; ++ wakeup-source; ++ }; ++ }; ++ ++ gpio-key-power { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn_gpio>; ++ ++ power { ++ debounce-interval = <20>; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "Power"; ++ linux,code = ; ++ wakeup-source; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrled_gpio &slpled_gpio>; ++ ++ green-led { ++ color = ; ++ default-state = "on"; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ label = "green:power"; ++ }; ++ ++ red-led { ++ color = ; ++ default-state = "off"; ++ function = LED_FUNCTION_STANDBY; ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "red:standby"; ++ panic-indicator; ++ retain-state-suspended; ++ }; ++ }; ++ ++ /* Power sequence for SDIO WiFi module */ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h_gpio>; ++ post-power-on-delay-ms = <100>; ++ power-off-delay-us = <500000>; ++ ++ /* WL_REG_ON on module */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ /* Audio components */ ++ es8316-sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det_gpio>; ++ simple-audio-card,name = "rockchip,es8316-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphones", ++ "Speaker", "Speaker"; ++ simple-audio-card,routing = ++ "MIC1", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "Speaker Amplifier INL", "HPOL", ++ "Speaker Amplifier INR", "HPOR", ++ "Speaker", "Speaker Amplifier OUTL", ++ "Speaker", "Speaker Amplifier OUTR"; ++ ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; ++ simple-audio-card,aux-devs = <&speaker_amp>; ++ simple-audio-card,pin-switches = "Speaker"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&es8316>; ++ }; ++ }; ++ ++ speaker_amp: speaker-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ sound-name-prefix = "Speaker Amplifier"; ++ VCC-supply = <&pa_5v>; ++ }; ++ ++ /* Power tree */ ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sysin"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ /* Regulators supplied by vcc_sysin */ ++ /* LCD backlight supply */ ++ vcc_12v: vcc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Main 3.3 V supply */ ++ vcc3v3_sys: wifi_bat: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* 5 V USB power supply */ ++ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwr_5v_gpio>; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* RK3399 logic supply */ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc3v3_sys */ ++ /* 0.9 V supply, always on */ ++ vcc_0v9: vcc-0v9 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_0v9"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* S3 1.8 V supply, switched by vcc1v8_s3 */ ++ vcca1v8_s3: vcc1v8-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcca1v8_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* micro SD card power */ ++ vcc3v0_sd: vcc3v0-sd { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_pwr_h_gpio>; ++ regulator-name = "vcc3v0_sd"; ++ regulator-always-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* LCD panel power, called VCC3V3_S0 in schematic */ ++ vcc3v3_panel: vcc3v3-panel { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcdvcc_en_gpio>; ++ regulator-name = "vcc3v3_panel"; ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-enable-ramp-delay = <100000>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* M.2 adapter power, switched by vcc1v8_s3 */ ++ vcc3v3_ssd: vcc3v3-ssd { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_ssd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* USB 3 port power supply regulator */ ++ vcc5v0_otg: vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en_gpio>; ++ regulator-name = "vcc5v0_otg"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* Type C port power supply regulator */ ++ vbus_5vout: vbus_typec: vbus-5vout { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_typec0_en_gpio>; ++ regulator-name = "vbus_5vout"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc_1v8 */ ++ /* Primary 0.9 V LDO */ ++ vcca0v9_s3: vcca0v9-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc0v9_s3"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ mains_charger: dc-charger { ++ compatible = "gpio-charger"; ++ charger-type = "mains"; ++ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; ++ ++ /* Also triggered by USB charger */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dc_det_gpio>; ++ }; ++}; ++ ++&cdn_dp { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&edp { ++ force-hpd; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&edp_hpd>; ++ status = "okay"; ++ ++ ports { ++ edp_out: port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ edp_out_panel: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&panel_in_edp>; ++ }; ++ }; ++ }; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-falling-time-ns = <4>; ++ i2c-scl-rising-time-ns = <168>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ interrupt-parent = <&gpio3>; ++ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l_gpio>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc_sysin>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sysin>; ++ vcc10-supply = <&vcc_sysin>; ++ vcc11-supply = <&vcc_sysin>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vcc13-supply = <&vcc_sysin>; ++ vcc14-supply = <&vcc_sysin>; ++ ++ regulators { ++ /* rk3399 center logic supply */ ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: vcc_wl: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ /* not used */ ++ LDO_REG1 { ++ }; ++ ++ /* not used */ ++ LDO_REG2 { ++ }; ++ ++ vcc1v8_pmupll: LDO_REG3 { ++ regulator-name = "vcc1v8_pmupll"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sdio: LDO_REG4 { ++ regulator-name = "vcc_sdio"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_gpio>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_gpio>; ++ regulator-name = "vdd_gpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ i2c-scl-falling-time-ns = <4>; ++ i2c-scl-rising-time-ns = <168>; ++ status = "okay"; ++ ++ es8316: es8316@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&cru SCLK_I2S_8CH_OUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&i2c3 { ++ i2c-scl-falling-time-ns = <15>; ++ i2c-scl-rising-time-ns = <450>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-falling-time-ns = <20>; ++ i2c-scl-rising-time-ns = <600>; ++ status = "okay"; ++ ++ fusb0: fusb30x@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int_gpio>; ++ vbus-supply = <&vbus_typec>; ++ ++ connector { ++ compatible = "usb-c-connector"; ++ data-role = "host"; ++ label = "USB-C"; ++ op-sink-microwatt = <1000000>; ++ power-role = "dual"; ++ sink-pdos = ++ ; ++ source-pdos = ++ ; ++ try-power-role = "sink"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ usbc_hs: endpoint { ++ remote-endpoint = ++ <&u2phy0_typec_hs>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ usbc_ss: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_ss>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ ++ usbc_dp: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_dp>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s1 { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; ++ rockchip,capture-channels = <8>; ++ rockchip,playback-channels = <8>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ audio-supply = <&vcc_3v0>; ++ gpio1830-supply = <&vcc_3v0>; ++ sdmmc-supply = <&vcc_sdio>; ++ status = "okay"; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ bus-scan-delay-ms = <1000>; ++ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; ++ max-link-speed = <2>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie0v9-supply = <&vcca0v9_s3>; ++ vpcie1v8-supply = <&vcca1v8_s3>; ++ vpcie3v3-supply = <&vcc3v3_ssd>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn_gpio: pwrbtn-gpio { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ lidbtn_gpio: lidbtn-gpio { ++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ dc-charger { ++ dc_det_gpio: dc-det-gpio { ++ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ es8316 { ++ hp_det_gpio: hp-det-gpio { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int_gpio: fusb0-int-gpio { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ i2s1 { ++ i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { ++ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd-panel { ++ lcdvcc_en_gpio: lcdvcc-en-gpio { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ panel_en_gpio: panel-en-gpio { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lcd_panel_reset_gpio: lcd-panel-reset-gpio { ++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ pwrled_gpio: pwrled_gpio { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ slpled_gpio: slpled_gpio { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l_gpio: pmic-int-l-gpio { ++ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdcard { ++ sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h_gpio: wifi-enable-h-gpio { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ pwr_5v_gpio: pwr-5v-gpio { ++ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ bt_wake_gpio: bt-wake-gpio { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_gpio: bt-host-wake-gpio { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_reset_gpio: bt-reset-gpio { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca1v8_s3>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v0_sd>; ++ vqmmc-supply = <&vcc_sdio>; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&spi1 { ++ max-freq = <10000000>; ++ status = "okay"; ++ ++ spiflash: flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ m25p,fast-read; ++ spi-max-frequency = <10000000>; ++ }; ++}; ++ ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy0_dp { ++ port { ++ tcphy0_typec_dp: endpoint { ++ remote-endpoint = <&usbc_dp>; ++ }; ++ }; ++}; ++ ++&tcphy0_usb3 { ++ port { ++ tcphy0_typec_ss: endpoint { ++ remote-endpoint = <&usbc_ss>; ++ }; ++ }; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++ ++ port { ++ u2phy0_typec_hs: endpoint { ++ remote-endpoint = <&usbc_hs>; ++ }; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rk808 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ vbat-supply = <&wifi_bat>; ++ vddio-supply = <&vcc_wl>; ++ }; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +-- +2.26.1 + +From 699fa59c59af63692269e133590d7664335b65ed Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 20 Apr 2020 20:07:04 +0100 +Subject: [PATCH 5/5] Add initial support for the Pinebook Pro laptop from + Pine64. + +Specification: +- Rockchip RK3399 +- 4GB Dual-Channel LPDDR4 +- eMMC socket +- mSD card slot +- 128Mbit (16Mb) SPI Flash +- AP6256 for 11AC WiFi + BT5 +- 14 inch 1920*1080 eDP MiPi display +- Camera +- USB 3.0, 2.0 ports +- Type-C port with alt-mode display (DP 1.2) and 15W charge +- DC 5V/3A +- optional PCIe slot for NVMe SSD drive + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 43 ++++++++++ + arch/arm/mach-rockchip/rk3399/Kconfig | 8 ++ + board/pine64/pinebook-pro-rk3399/Kconfig | 15 ++++ + board/pine64/pinebook-pro-rk3399/MAINTAINERS | 8 ++ + board/pine64/pinebook-pro-rk3399/Makefile | 1 + + .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 76 +++++++++++++++++ + configs/pinebook-pro-rk3399_defconfig | 84 +++++++++++++++++++ + include/configs/pinebook-pro-rk3399.h | 29 +++++++ + 8 files changed, 264 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi + create mode 100644 board/pine64/pinebook-pro-rk3399/Kconfig + create mode 100644 board/pine64/pinebook-pro-rk3399/MAINTAINERS + create mode 100644 board/pine64/pinebook-pro-rk3399/Makefile + create mode 100644 board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c + create mode 100644 configs/pinebook-pro-rk3399_defconfig + create mode 100644 include/configs/pinebook-pro-rk3399.h + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +new file mode 100644 +index 0000000000..1a2e24d3ef +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -0,0 +1,43 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2019 Peter Robinson ++ */ ++ ++#include "rk3399-u-boot.dtsi" ++#include "rk3399-sdram-lpddr4-100.dtsi" ++ ++/ { ++ aliases { ++ spi0 = &spi1; ++ }; ++ ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ }; ++}; ++ ++&i2c0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rk808 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&sdhci { ++ max-frequency = <25000000>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&sdmmc { ++ max-frequency = <20000000>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&spiflash { ++ u-boot,dm-pre-reloc; ++}; ++ ++&vdd_log { ++ regulator-init-microvolt = <950000>; ++}; +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index 927bb62a9f..254b9c5b4d 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -19,6 +19,13 @@ config TARGET_EVB_RK3399 + with full function and physical connectors support like Type-C ports, + USB.0 host ports, LVDS, JTAG, MAC, SD card, HDMI, USB-to-serial... + ++config TARGET_PINEBOOK_PRO_RK3399 ++ bool "Pinebook Pro" ++ help ++ Pinebook Pro is a laptop based on the Rockchip rk3399 SoC ++ with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, ++ 1920*1080 screen and all the usual laptop features. ++ + config TARGET_PUMA_RK3399 + bool "Theobroma Systems RK3399-Q7 (Puma)" + help +@@ -144,6 +151,7 @@ endif # BOOTCOUNT_LIMIT + + source "board/firefly/roc-pc-rk3399/Kconfig" + source "board/google/gru/Kconfig" ++source "board/pine64/pinebook-pro-rk3399/Kconfig" + source "board/pine64/rockpro64_rk3399/Kconfig" + source "board/rockchip/evb_rk3399/Kconfig" + source "board/theobroma-systems/puma_rk3399/Kconfig" +diff --git a/board/pine64/pinebook-pro-rk3399/Kconfig b/board/pine64/pinebook-pro-rk3399/Kconfig +new file mode 100644 +index 0000000000..3bb7ca448e +--- /dev/null ++++ b/board/pine64/pinebook-pro-rk3399/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_PINEBOOK_PRO_RK3399 ++ ++config SYS_BOARD ++ default "pinebook-pro-rk3399" ++ ++config SYS_VENDOR ++ default "pine64" ++ ++config SYS_CONFIG_NAME ++ default "pinebook-pro-rk3399" ++ ++config BOARD_SPECIFIC_OPTIONS ++ def_bool y ++ ++endif +diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS b/board/pine64/pinebook-pro-rk3399/MAINTAINERS +new file mode 100644 +index 0000000000..7153eaf2e0 +--- /dev/null ++++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS +@@ -0,0 +1,8 @@ ++PINEBOOK_PRO ++M: Peter Robinson ++S: Maintained ++F: board/pine64/rk3399-pinebook-pro/ ++F: include/configs/rk3399-pinebook-pro.h ++F: arch/arm/dts/rk3399-pinebook-pro.dts ++F: arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++F: configs/pinebook-pro-rk3399_defconfig +diff --git a/board/pine64/pinebook-pro-rk3399/Makefile b/board/pine64/pinebook-pro-rk3399/Makefile +new file mode 100644 +index 0000000000..2f692a12a6 +--- /dev/null ++++ b/board/pine64/pinebook-pro-rk3399/Makefile +@@ -0,0 +1 @@ ++obj-y += pinebook-pro-rk3399.o +diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +new file mode 100644 +index 0000000000..01421cbac2 +--- /dev/null ++++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +@@ -0,0 +1,76 @@ ++/* ++ * (C) Copyright 2016 Rockchip Electronics Co., Ltd ++ * (C) Copyright 2020 Peter Robinson ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define GRF_IO_VSEL_BT565_SHIFT 0 ++#define PMUGRF_CON0_VSEL_SHIFT 8 ++ ++#ifndef CONFIG_SPL_BUILD ++int board_early_init_f(void) ++{ ++ struct udevice *regulator; ++ int ret; ++ ++ ret = regulator_get_by_platname("vcc5v0_usb", ®ulator); ++ if (ret) { ++ debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = regulator_set_enable(regulator, true); ++ if (ret) ++ debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret); ++ ++out: ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_MISC_INIT_R ++static void setup_iodomain(void) ++{ ++ struct rk3399_grf_regs *grf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); ++ struct rk3399_pmugrf_regs *pmugrf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); ++ ++ /* BT565 is in 1.8v domain */ ++ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); ++ ++ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ ++ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); ++} ++ ++int misc_init_r(void) ++{ ++ const u32 cpuid_offset = 0x7; ++ const u32 cpuid_length = 0x10; ++ u8 cpuid[cpuid_length]; ++ int ret; ++ ++ setup_iodomain(); ++ ++ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); ++ if (ret) ++ return ret; ++ ++ ret = rockchip_cpuid_set(cpuid, cpuid_length); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++#endif +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +new file mode 100644 +index 0000000000..0e9f0ec250 +--- /dev/null ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -0,0 +1,84 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_RAM_RK3399_LPDDR4=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_TARGET_PINEBOOK_PRO_RK3399=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART=y ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" ++CONFIG_MISC_INIT_R=y ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_TPL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTDPARTS=y ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_SF=y ++CONFIG_CMD_TIME=y ++CONFIG_CMD_USB=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_BOOTDELAY=3 ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_ROCKCHIP_SPI=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_DM_ETH=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_DM_PMIC_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++# CONFIG_USB_XHCI_ROCKCHIP is not set ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y ++CONFIG_DM_VIDEO=y ++CONFIG_VIDEO_BPP16=y ++CONFIG_VIDEO_BPP32=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DISPLAY_ROCKCHIP_EDP=y +diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h +new file mode 100644 +index 0000000000..423d742a79 +--- /dev/null ++++ b/include/configs/pinebook-pro-rk3399.h +@@ -0,0 +1,29 @@ ++/* ++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd ++ * Copyright (C) 2020 Peter Robinson ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __PINEBOOK_PRO_RK3399_H ++#define __PINEBOOK_PRO_RK3399_H ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdin=serial,usbkbd\0" \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#include ++ ++#if defined(CONFIG_ENV_IS_IN_MMC) ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) ++#define CONFIG_ENV_SECT_SIZE (8 * 1024) ++#endif ++ ++#undef CONFIG_SYS_SPI_U_BOOT_OFFS ++#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512 ++ ++#define SDRAM_BANK_SIZE (2UL << 30) ++ ++#endif +-- +2.26.1 diff --git a/rockpro64-limit-speed-on-mSD-slot.patch b/rockpro64-limit-speed-on-mSD-slot.patch new file mode 100644 index 0000000..789ea26 --- /dev/null +++ b/rockpro64-limit-speed-on-mSD-slot.patch @@ -0,0 +1,28 @@ +From 0b1a5b30d6d8ad2af9f5518b65fbbdc9e080d41d Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 20 Apr 2020 22:03:00 +0100 +Subject: [PATCH] rockpro64: limit speed on mSD slot + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +index deaa3efd39..e5e05f5a7f 100644 +--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +@@ -19,6 +19,10 @@ + status = "okay"; + }; + ++&sdmmc { ++ max-frequency = <20000000>; ++}; ++ + &vdd_center { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; +-- +2.26.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index cfeb178..e0dc83c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -30,13 +30,15 @@ Patch7: efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch Patch10: Misc-fixes-for-Tegra.patch Patch11: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch12: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch -# Rockchips improvements -Patch13: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch -Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -# AllWinner improvements -Patch15: AllWinner-Pine64-bits.patch # Wandboard fixes -Patch16: wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch +Patch13: wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch +# Rockchips improvements +Patch14: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch +Patch15: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch16: initial-support-for-the-Pinebook-Pro-laptop-from.patch +Patch17: rockpro64-limit-speed-on-mSD-slot.patch +# AllWinner improvements +Patch18: AllWinner-Pine64-bits.patch BuildRequires: bc BuildRequires: dtc @@ -258,8 +260,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Sat Apr 18 2020 Peter Robinson - 2020.04-2 +* Mon Apr 20 2020 Peter Robinson - 2020.04-2 - Fix Wandboard board detection (rhbz 1825247) +- Fix mSD card on RockPro64 +- Enable (inital) Pinebook Pro * Tue Apr 14 2020 Peter Robinson - 2020.04-1 - 2020.04 From 0ca7ebed9d6c97251d37c6b824149b869388a434 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Apr 2020 22:53:57 +0100 Subject: [PATCH 079/351] Add missing patches for rockchips pbp --- ...ort-for-the-Pinebook-Pro-laptop-from.patch | 88 +++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/initial-support-for-the-Pinebook-Pro-laptop-from.patch b/initial-support-for-the-Pinebook-Pro-laptop-from.patch index 47688ee..8d1473b 100644 --- a/initial-support-for-the-Pinebook-Pro-laptop-from.patch +++ b/initial-support-for-the-Pinebook-Pro-laptop-from.patch @@ -1672,3 +1672,91 @@ index 0000000000..423d742a79 +#endif -- 2.26.1 +From 8239d91c6a120fb07df1f84c6441545856d968af Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 20 Apr 2020 22:43:05 +0100 +Subject: [PATCH] pinebook pro: enable rng for KASLR + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++ + configs/pinebook-pro-rk3399_defconfig | 2 ++ + 2 files changed, 6 insertions(+) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index 1a2e24d3ef..296321d697 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -24,6 +24,10 @@ + u-boot,dm-pre-reloc; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &sdhci { + max-frequency = <25000000>; + u-boot,dm-pre-reloc; +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 0e9f0ec250..c15c17a1b0 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -59,6 +59,8 @@ CONFIG_PMIC_RK8XX=y + CONFIG_DM_PMIC_FAN53555=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_PWM_ROCKCHIP=y + CONFIG_SYSRESET=y + CONFIG_USB=y +-- +2.26.1 + +From 7db304da3ae9480f49febc5968e4d02c171d7080 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Apr 2020 13:13:37 +0100 +Subject: [PATCH 08/10] drivers: video: rockchip: fix building eDP and LVDS + drivers + +The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in +hardware.h so include it so the drivers build. Adjust rk_lvds.c so +includes are in alphabetical order while updating. + +Signed-off-by: Peter Robinson +--- + drivers/video/rockchip/rk_edp.c | 1 + + drivers/video/rockchip/rk_lvds.c | 3 ++- + 2 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c +index 8703df0ec0..cf84b886e7 100644 +--- a/drivers/video/rockchip/rk_edp.c ++++ b/drivers/video/rockchip/rk_edp.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + #include + + #define MAX_CR_LOOP 5 +diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c +index cf5c0439b1..79e24baf53 100644 +--- a/drivers/video/rockchip/rk_lvds.c ++++ b/drivers/video/rockchip/rk_lvds.c +@@ -13,8 +13,9 @@ + #include + #include + #include +-#include + #include ++#include ++#include + #include + #include + +-- +2.26.1 + From 37735d002b24c7168423001e88416bb7dd0110df Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Apr 2020 23:58:44 +0100 Subject: [PATCH 080/351] Fix ATF for new aarch64 devices --- aarch64-boards | 1 + uboot-tools.spec | 15 ++++----------- 2 files changed, 5 insertions(+), 11 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index c449481..4782501 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -48,6 +48,7 @@ p3450-0000 pine64-lts pine64_plus pinebook +pinebook-pro-rk3399 pinephone pinetab pine_h64 diff --git a/uboot-tools.spec b/uboot-tools.spec index e0dc83c..64c2fac 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -118,7 +118,7 @@ do echo "Building board: $board" mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook sopine_baseboard teres_i) + sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ @@ -133,7 +133,7 @@ do echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-v-rk3399 khadas-edge-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -141,14 +141,6 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - #if [[ " ${rk3328[*]} " == *" $board "* ]]; then - #builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img - #builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img - #fi - if [[ " ${rk3399[*]} " == *" $board "* ]]; then - builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img - builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img - fi done %endif @@ -166,7 +158,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin + for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -261,6 +253,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %changelog * Mon Apr 20 2020 Peter Robinson - 2020.04-2 +- Fix ATF for new aarch64 devices - Fix Wandboard board detection (rhbz 1825247) - Fix mSD card on RockPro64 - Enable (inital) Pinebook Pro From c5d796ffd3f7409acfec32fdfcbf02241db97235 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 21 Apr 2020 15:57:14 +0100 Subject: [PATCH 081/351] Ship u-boot-rockchip.bin for SPI flash --- uboot-tools.spec | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 64c2fac..71db9e9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.04 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -158,7 +158,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin + for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -171,7 +171,7 @@ done for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl/boot.bin + for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -252,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Apr 21 2020 Peter Robinson - 2020.04-3 +- Ship u-boot-rockchip.bin for SPI flash + * Mon Apr 20 2020 Peter Robinson - 2020.04-2 - Fix ATF for new aarch64 devices - Fix Wandboard board detection (rhbz 1825247) From 771c6cdcdbf8e53cdc49550c6811c0b198c32e1b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 22 Apr 2020 14:25:30 +0100 Subject: [PATCH 082/351] Initial pci/usb support for rpi4 --- ...ost-support-for-Raspberry-Pi-4-board.patch | 2810 +++++++++++++++++ uboot-tools.spec | 7 +- 2 files changed, 2816 insertions(+), 1 deletion(-) create mode 100644 USB-host-support-for-Raspberry-Pi-4-board.patch diff --git a/USB-host-support-for-Raspberry-Pi-4-board.patch b/USB-host-support-for-Raspberry-Pi-4-board.patch new file mode 100644 index 0000000..7e025be --- /dev/null +++ b/USB-host-support-for-Raspberry-Pi-4-board.patch @@ -0,0 +1,2810 @@ +From patchwork Tue Apr 21 16:50:51 2020 +Content-Type: text/plain; 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+ Tue, 21 Apr 2020 16:51:13 +0000 (GMT) +From: Sylwester Nawrocki +To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com +Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, + m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki + +Subject: [RFC PATCH 1/9] usb: xhci: Add missing cache flush in the + scratchpad array initialization +Date: Tue, 21 Apr 2020 18:50:51 +0200 +Message-Id: <20200421165059.19394-2-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm2zln5zhbHKfgi1nCMqJMTTM4qN1IbP4Toh8VaqsdVNymbV7z + j5dQ8555w8RZYa2ZaCbiBcXU5S2TQE3TKaZFefkzTacOze2s+vc8z/s8z8v38lGYqJRwoaKV + 8axKKZWL+QK89cP2mGeGuyb8bGndSWZwfA8xbysbCaYsP4KZ2skimIZ+A8msZqUjpvbJEsH0 + rWYTTM7EPmLWuh6RlwWS+eE0QlJTNYhL2qsMpGR0tg1JClt0SNLYMoFL3o2khpK3BIEyVh6d + yKq8L94RRM1V6/G4HCrZ1J9FpqFJfi6iKKD9YPuLay4SUCJai8D4owZxZAPBpmkO48g6grFp + Iy8X2VkTHeM6m+sVgmHNb/JfpGF7E7e4+LQPFOgLkQU70aEwuV1uTWC0BoHZWG4dONIy0OaX + kRaM0yfg5dMVzIKFdACsTG7xuXVuUN/UY9Xt6EAwbFXiliKgi0hI3yi2vSIIXmfIOb8jLA+0 + kBx2hf12DY/zZyLI75whOVKMYH6gFnGuAJj9tGMtwuhT0NjhzclX4KNpCOf6D8PUmoNFxg5g + SWsFxslCyMkScW532NVV2C7kAnlL+ziHJZBeUGc7YxGCrtJFohi5Vf1fVouQDjmzCWpFJKv2 + VbJJXmqpQp2gjPS6F6toRgd/ZWRvYKMNdZjv9iKaQuJDwqmxmnARIU1Upyh6EVCY2EnYtHAg + CWXSlAesKjZClSBn1b3oCIWLnYXnnv8KE9GR0ng2hmXjWNXfKY+yc0lD55dz3ienzrwJDn7s + UPJicdX3+efuozvfpvLOUKb7RRm3/et/ZhcOL+xEDdZc0l4I0HfaDxUbPHljHl4hZuOk4usz + o71upE3f85A8brgaM+8d1u0nModcr69sdg84tha+eyPyuwc/SJu5sTCtunlttNof9FVFtCyp + sLfOdb3Pw1OMq6OkPqcxlVr6Bzy9nkcnAwAA +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMLMWRmVeSWpSXmKPExsVy+t/xu7pNKvPjDE7cEbA4ceUfo8XGGetZ + Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL + x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj9KzKcovLUlVyMgvLrFVija0MNIztLTQMzKx + 1DM0No+1MjJV0rezSUnNySxLLdK3S9DLuDfnKEtBB0fFjyNt7A2M19i6GDk5JARMJHZdWcXY + xcjFISSwlFFi0rUZQA4HUEJKYn6LEkSNsMSfa11g9UICnxglHj5wBLHZBAwleo/2MYLYIgIh + Ei+OXmECmcMMMudPwxtWkDnCAkkSu39yg9SwCKhKLJv9mhnE5hWwlnh97TvUDfISqzccAItz + CthI3P0+gwVil7VEw6UlLBMY+RYwMqxiFEktLc5Nzy021CtOzC0uzUvXS87P3cQIDPBtx35u + 3sF4aWPwIUYBDkYlHt4b5+fFCbEmlhVX5h5ilOBgVhLh3fAQKMSbklhZlVqUH19UmpNafIjR + FOioicxSosn5wOjLK4k3NDU0t7A0NDc2NzazUBLn7RA4GCMkkJ5YkpqdmlqQWgTTx8TBKdXA + 6LTra6plWsQmuwWK045dDM48yj+vtfXqqqSkoqBLwilHPikq2hWa3TbO25/wunvjY6ZD87SD + 2Sr/ON7d9NNMXpLHyiQiOfEn///MTYYno6+0nPnLOJdpR3t9L/8PU0Gh/YXHVzzNn2YzQ/37 + HO6/kmeSvty49tbYRC7kbMl5hcQNLmukTv+pU2Ipzkg01GIuKk4EAE74o8yGAgAA +X-CMS-MailID: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e +X-Msg-Generator: CA +X-RootMTR: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +In current code there is no cache flush after initializing the scratchpad +buffer array with the scratchpad buffer pointers. This leads to a failure +of the "slot enable" command on the rpi4 board (Broadcom STB PCIe +controller + VL805 USB hub) - the very first TRB transfer on the command +ring fails and there is a timeout while waiting for the command completion +event. After adding the missing cache flush everything seems to be working +as expected. + +Signed-off-by: Sylwester Nawrocki +--- + drivers/usb/host/xhci-mem.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index 93450ee..729bdc3 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -393,6 +393,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + scratchpad->sp_array[i] = cpu_to_le64(ptr); + } + ++ xhci_flush_cache((uintptr_t)scratchpad->sp_array, ++ sizeof(u64) * num_sp); ++ + return 0; + + fail_sp3: + +From patchwork Tue Apr 21 16:50:52 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274444 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) 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Nawrocki +--- + drivers/pci/pci-rcar-gen3.c | 8 -------- + drivers/pci/pcie_intel_fpga.c | 3 --- + include/pci.h | 13 +++++++++++++ + 3 files changed, 13 insertions(+), 11 deletions(-) + +diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c +index 30eff67..393f1c9 100644 +--- a/drivers/pci/pci-rcar-gen3.c ++++ b/drivers/pci/pci-rcar-gen3.c +@@ -117,14 +117,6 @@ + #define RCAR_PCI_MAX_RESOURCES 4 + #define MAX_NR_INBOUND_MAPS 6 + +-#define PCI_EXP_FLAGS 2 /* Capabilities register */ +-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ +-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ +-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ +- + enum { + RCAR_PCI_ACCESS_READ, + RCAR_PCI_ACCESS_WRITE, +diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c +index 6a9f29c..69363a0 100644 +--- a/drivers/pci/pcie_intel_fpga.c ++++ b/drivers/pci/pcie_intel_fpga.c +@@ -65,9 +65,6 @@ + #define IS_ROOT_PORT(pcie, bdf) \ + ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) + +-#define PCI_EXP_LNKSTA 18 /* Link Status */ +-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ +- + /** + * struct intel_fpga_pcie - Intel FPGA PCIe controller state + * @bus: Pointer to the PCI bus +diff --git a/include/pci.h b/include/pci.h +index 174ddd4..3d7646d 100644 +--- a/include/pci.h ++++ b/include/pci.h +@@ -471,11 +471,24 @@ + #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ + + /* PCI Express capabilities */ ++#define PCI_EXP_FLAGS 2 /* Capabilities register */ ++#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ ++#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ ++ + #define PCI_EXP_DEVCAP 4 /* Device capabilities */ + #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ + #define PCI_EXP_DEVCTL 8 /* Device Control */ + #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ + ++#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ ++#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ ++ ++#define PCI_EXP_LNKSTA 18 /* Link Status */ ++#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ ++ ++#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ ++#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ ++ + /* Include the ID list */ + + #include + +From patchwork Tue Apr 21 16:50:53 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274441 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + 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20200421165118eucas1p1dc542f61cefcf53cdb1f17cc59baee5f +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200421165118eucas1p1dc542f61cefcf53cdb1f17cc59baee5f +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +Remove the overlap between DRAM and device's IO area. + +Signed-off-by: Marek Szyprowski +--- + arch/arm/mach-bcm283x/init.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 9966d6c..4295356 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -38,7 +38,7 @@ static struct mm_region bcm2711_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +- .size = 0xfe000000UL, ++ .size = 0xfc000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + +From patchwork Tue Apr 21 16:50:54 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274442 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=samsung.com +Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; + unprotected) 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+X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +Create a non-cacheable mapping for the 0x600000000 physical memory region, +where MMIO registers for the PCIe XHCI controller are instantiated by the +PCIe bridge. + +Signed-off-by: Marek Szyprowski +--- + arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++--- + 1 file changed, 15 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 4295356..6a748da 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -11,10 +11,15 @@ + #include + #include + ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL ++ + #ifdef CONFIG_ARM64 + #include + +-static struct mm_region bcm283x_mem_map[] = { ++#define MAX_MAP_MAX_ENTRIES (4) ++ ++static struct mm_region bcm283x_mem_map[MAX_MAP_MAX_ENTRIES] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -34,7 +39,7 @@ static struct mm_region bcm283x_mem_map[] = { + } + }; + +-static struct mm_region bcm2711_mem_map[] = { ++static struct mm_region bcm2711_mem_map[MAX_MAP_MAX_ENTRIES] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = { + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { ++ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, ++ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, ++ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { + /* List terminator */ + 0, + } +@@ -71,7 +83,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) + { + int i; + +- for (i = 0; i < 2; i++) { ++ for (i = 0; i < MAX_MAP_MAX_ENTRIES; i++) { + mem_map[i].virt = pd[i].virt; + mem_map[i].phys = pd[i].phys; + mem_map[i].size = pd[i].size; + +From patchwork Tue Apr 21 16:50:55 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274445 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=samsung.com +Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; + unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256 + 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+X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +Create a non-cacheable mapping for the 0x600000000 physical memory region, +where MMIO registers for the PCIe XHCI controller are instantiated by the +PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM +32bit mode, this region is mapped at 0xff800000 CPU virtual address. + +Signed-off-by: Marek Szyprowski +--- + arch/arm/mach-bcm283x/Kconfig | 1 + + arch/arm/mach-bcm283x/include/mach/base.h | 7 +++++ + arch/arm/mach-bcm283x/init.c | 52 +++++++++++++++++++++++++++++++ + 3 files changed, 60 insertions(+) + +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 00419bf..bcb7f1d 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -36,6 +36,7 @@ config BCM2711_32B + select BCM2711 + select ARMV7_LPAE + select CPU_V7A ++ select PHYS_64BIT + + config BCM2711_64B + bool "Broadcom BCM2711 SoC 64-bit support" +diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h +index c4ae398..1d10dc9 100644 +--- a/arch/arm/mach-bcm283x/include/mach/base.h ++++ b/arch/arm/mach-bcm283x/include/mach/base.h +@@ -6,6 +6,13 @@ + #ifndef _BCM283x_BASE_H_ + #define _BCM283x_BASE_H_ + ++#include ++ + extern unsigned long rpi_bcm283x_base; + ++#ifdef CONFIG_ARMV7_LPAE ++extern void *rpi4_phys_to_virt(phys_addr_t paddr); ++#define phys_to_virt(x) rpi4_phys_to_virt(x) ++#endif ++ + #endif +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 6a748da..5d0d160 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -145,6 +145,58 @@ int mach_cpu_init(void) + } + + #ifdef CONFIG_ARMV7_LPAE ++ ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL ++ ++void *rpi4_phys_to_virt(phys_addr_t paddr) ++{ ++ if (paddr >= BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS) ++ paddr = paddr - BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS + ++ BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT; ++ return (void *)(unsigned long)paddr; ++} ++ ++static void set_section_phys(unsigned int section, phys_addr_t phys, ++ enum dcache_option option) ++{ ++ u64 *page_table = (u64 *)gd->arch.tlb_addr; ++ /* Need to set the access flag to not fault */ ++ u64 value = TTB_SECT_AP | TTB_SECT_AF; ++ ++ /* Add the page offset */ ++ value |= (phys); ++ ++ /* Add caching bits */ ++ value |= option; ++ ++ /* Set PTE */ ++ page_table[section] = value; ++} ++ ++static void rpi4_create_pcie_xhci_mapping(void) ++{ ++ unsigned sect = BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT >> MMU_SECTION_SHIFT; ++ phys_addr_t phys_addr = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS; ++ unsigned int size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE; ++ ++ while (size) { ++ set_section_phys(sect, phys_addr, DCACHE_OFF); ++ sect++; ++ phys_addr += MMU_SECTION_SIZE; ++ size -= MMU_SECTION_SIZE; ++ } ++} ++ ++void arm_init_domains(void) ++{ ++ /* ++ * Hijack this function to prepare a mappings for the PCIe MMIO ++ * region for the XHCI controller on RPi4 board. ++ * This code is called before enabling the MMU in ARM 32bit mode. ++ */ ++ rpi4_create_pcie_xhci_mapping(); ++} ++ + void enable_caches(void) + { + dcache_enable(); + +From patchwork Tue Apr 21 16:50:56 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274443 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Tue, 21 Apr 2020 16:51:23 +0000 (GMT) +From: Sylwester Nawrocki +To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com +Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, + m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki + +Subject: [RFC PATCH 6/9] usb: xhci: Allow accessing 64-bit registers with + DWORD accesses only +Date: Tue, 21 Apr 2020 18:50:56 +0200 +Message-Id: <20200421165059.19394-7-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCKsWRmVeSWpSXmKPExsWy7djPc7o9KvPjDFY9ErA4ceUfo8XGGetZ + Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL + x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj+KySUnNySxLLdK3S+DKWHP3JXNBg1DFl0W7 + mBsY7/J1MXJySAiYSLy/coIVxBYSWMEo8e2sYxcjF5D9hVFi4beHjBDOZ0aJZQ0/GGE6Jn1d + wASRWM4osW7OOWa4lgfr5oFVsQkYSvQe7QOzRQQCJK79nAY2illgPqPEn0/TwBLCAvES958s + ZgOxWQRUJSZ2rGECsXkFrCWuLp/GDrFOXmL1hgPMIDangI3E3e8zWCDik9klFt2XhrBdJC5c + usoGYQtLvDq+BapXRuL/zvlgp0oINDNK9Oy+zQ7hTGCUuH98AdRD1hJ3zv0C6uYAOk9TYv0u + fYiwo0Tf1HesIGEJAT6JG28FQcLMQOakbdOZIcK8Eh1tQhDVKhK/V01ngrClJLqf/Ic600Pi + w8fFLJAA6meU6Nr7nnECo/wshGULGBlXMYqnlhbnpqcWG+allusVJ+YWl+al6yXn525iBKaV + 0/+Of9rB+PVS0iFGAQ5GJR7eG+fnxQmxJpYVV+YeYpTgYFYS4d3wECjEm5JYWZValB9fVJqT + WnyIUZqDRUmc13jRy1ghgfTEktTs1NSC1CKYLBMHp1QDo0NlrlZnZIZvA8+uwiqVNYzC/zbd + 8izctWfuNx4XYxXelzfU2SRYA08E32U8UlLxXiGjV3fxrc/35C7e3pyxj0dLTePrncrpBptb + FX6rXZLVnDGhff2fSQf+6HP95tKR3+wkzi0kXB99vkvDK6eoVW5d0uRYRxXTCfGnozzfc+wL + 6X+tWFehxFKckWioxVxUnAgAMSV15icDAAA= +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsVy+t/xu7rdKvPjDPr7bCxOXPnHaLFxxnpW + i6k98RY3frWxWqw9cpfd4k1bI6PFgslPWC0Ov2lntei4+p/R4u3eTnYHLo/7pxpYPebNOsHi + sXPWXXaPs3d2MHr0bVnF6LF+y1UWj82nqwPYo/RsivJLS1IVMvKLS2yVog0tjPQMLS30jEws + 9QyNzWOtjEyV9O1sUlJzMstSi/TtEvQy1tx9yVzQIFTxZdEu5gbGu3xdjJwcEgImEpO+LmDq + YuTiEBJYyihx8udKxi5GDqCElMT8FiWIGmGJP9e62CBqPjFKfOxoZgJJsAkYSvQe7WMEsUUE + QiReHL0CNogZZNCfhjesIAlhgViJGXMWsYPYLAKqEhM71oA18wpYS1xdPo0dYoO8xOoNB5hB + bE4BG4m732ewgNhCQDUNl5awTGDkW8DIsIpRJLW0ODc9t9hIrzgxt7g0L10vOT93EyMwyLcd + +7llB2PXu+BDjAIcjEo8vDfOz4sTYk0sK67MPcQowcGsJMK74SFQiDclsbIqtSg/vqg0J7X4 + EKMp0FETmaVEk/OBEZhXEm9oamhuYWlobmxubGahJM7bIXAwRkggPbEkNTs1tSC1CKaPiYNT + qoExbeNShg0BsVpXNX2+ynqZ6E7NXSE7VcnncfFtX/399bscXzZ29OomzhFKnuj8rz715Ruj + Dfa+8s+n7hDYcHyawgFVruDoGTumeS/WeHOltsT4QDWHrfWL65mbVjLm/99wxqyee9+3r8fY + 3h36XGPv8K1gQVD7jm/XPqUe2OMxsVg3m+mz4/cjSizFGYmGWsxFxYkAsqsjeYgCAAA= +X-CMS-MailID: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 +X-Msg-Generator: CA +X-RootMTR: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +This patch adds a Kconfig option which allows accessing 64-bit xHCI +IO registers only with 2 double word accesses rather than using +a single quad word access. There might be HW configurations where +single quad word access doesn't work, even though the CPU is 64-bit. +That seems to be the case on rpi4 board with Broadcom BCM2711 SoC, +where the VL805 USB xHCI hub is connected to the PCIe controller +behind the SCB bridge. + +Signed-off-by: Sylwester Nawrocki +--- +So far I couldn't come up with anything better to make the xHCI host +controller working on the rpi4 board. For some reason dereferencing +a 64-bit pointer to access 64-bit registers doesn't work there, +might be a limitation of the PCIe bridge behind the SCB. In Linux +always 2 double word accesses are used. +--- + drivers/usb/host/Kconfig | 7 +++++++ + include/usb/xhci.h | 4 ++-- + 2 files changed, 9 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index 0987ff2..3990b8a 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -15,6 +15,13 @@ config USB_XHCI_HCD + + if USB_XHCI_HCD + ++config XHCI_64BIT_DWORD_ACCESS_ONLY ++ bool "Access xHCI 64-bit registers with double word accesses only" ++ help ++ Choose this option if your hardware does not support quad word accesses ++ for registers with 64-bit address pointers. ++ If unsure, say Y. ++ + config USB_XHCI_DWC3 + bool "DesignWare USB3 DRD Core Support" + help +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index 6017504..459e76b 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -1111,7 +1111,7 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) + */ + static inline u64 xhci_readq(__le64 volatile *regs) + { +-#if BITS_PER_LONG == 64 ++#if BITS_PER_LONG == 64 && !defined(CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY) + return readq(regs); + #else + __u32 *ptr = (__u32 *)regs; +@@ -1123,7 +1123,7 @@ static inline u64 xhci_readq(__le64 volatile *regs) + + static inline void xhci_writeq(__le64 volatile *regs, const u64 val) + { +-#if BITS_PER_LONG == 64 ++#if BITS_PER_LONG == 64 && !defined(CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY) + writeq(val, regs); + #else + __u32 *ptr = (__u32 *)regs; + +From patchwork Tue Apr 21 16:50:57 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274447 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + 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201P +X-CMS-RootMailID: 20200421165124eucas1p2e7cbc2eea896a682961304de7ff53dc2 +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Add PCI Express capability definitions required by the Broadcom STB PCIe +driver. + +Signed-off-by: Sylwester Nawrocki +--- + include/pci.h | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/include/pci.h b/include/pci.h +index 3d7646d..2b25a17 100644 +--- a/include/pci.h ++++ b/include/pci.h +@@ -481,10 +481,17 @@ + #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ + + #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ ++#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ ++#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ + #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ + + #define PCI_EXP_LNKSTA 18 /* Link Status */ ++#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ ++#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ ++#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ ++ + #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ ++#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ + + #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ + #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ + +From patchwork Tue Apr 21 16:50:58 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1274450 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org 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q3zpPtHlG9bk7lRYe1juQ+jL8jebYzzemgp82DHxjxJLcUaioRZzUXEiAG5+y62IAgAA +X-CMS-MailID: 20200421165125eucas1p1a4cc19f4c58f449375e6d66b19d51e04 +X-Msg-Generator: CA +X-RootMTR: 20200421165125eucas1p1a4cc19f4c58f449375e6d66b19d51e04 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200421165125eucas1p1a4cc19f4c58f449375e6d66b19d51e04 +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +This patch adds basic driver for the Broadcom STB PCIe host controller. +The code is based on Linux upstream driver (pcie-brcmtsb.c) with MSI +handling removed. The inbound access memory region is not currently +parsed from dma-ranges DT property and is fixed as a 1:1 mapping of +whole RAM. +The patch has been tested on rpi4 board, i.e. on BCM2711 SoC with VL805 +USB Host Controller. + +Signed-off-by: Sylwester Nawrocki +--- + drivers/pci/Kconfig | 5 + + drivers/pci/Makefile | 1 + + drivers/pci/pcie_brcmstb.c | 844 +++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 850 insertions(+) + create mode 100644 drivers/pci/pcie_brcmstb.c + +diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig +index 437cd9a..02dcc57 100644 +--- a/drivers/pci/Kconfig ++++ b/drivers/pci/Kconfig +@@ -197,4 +197,9 @@ config PCIE_MEDIATEK + Say Y here if you want to enable Gen2 PCIe controller, + which could be found on MT7623 SoC family. + ++config PCI_BRCMSTB ++ bool "Broadcom STB PCIe controller" ++ depends on DM_PCI ++ help ++ Say Y here if you want to enable PCI controller support on BCM2711 SoC. + endif +diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile +index c051ecc..3e53b1f 100644 +--- a/drivers/pci/Makefile ++++ b/drivers/pci/Makefile +@@ -43,3 +43,4 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o + obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o + obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o + obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o ++obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +new file mode 100644 +index 0000000..e96e163 +--- /dev/null ++++ b/drivers/pci/pcie_brcmstb.c +@@ -0,0 +1,844 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Broadcom STB PCIe controller driver ++ * ++ * Copyright (C) 2020 Samsung Electronics Co., Ltd. ++ * Author: Sylwester Nawrocki ++ * ++ * Based on upstream Linux kernel driver: ++ * ++ * drivers/pci/controller/pcie-brcmstb.c ++ * Copyright (C) 2009 - 2017 Broadcom ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ ++#define BRCM_PCIE_CAP_REGS 0x00ac ++ ++/* ++ * Broadcom Settop Box PCIe Register Offsets. The names are from ++ * the chip's RDB and we use them here so that a script can correlate ++ * this code and the RDB to prevent discrepancies. ++ */ ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 ++#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c ++#define PCIE_RC_DL_MDIO_ADDR 0x1100 ++#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 ++#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 ++#define PCIE_MISC_MISC_CTRL 0x4008 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 ++#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c ++#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 ++#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 ++#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c ++#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 ++#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 ++#define PCIE_MISC_MSI_DATA_CONFIG 0x404c ++#define PCIE_MISC_EOI_CTRL 0x4060 ++#define PCIE_MISC_PCIE_CTRL 0x4064 ++#define PCIE_MISC_PCIE_STATUS 0x4068 ++#define PCIE_MISC_REVISION 0x406c ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 ++#define PCIE_INTR2_CPU_BASE 0x4300 ++#define PCIE_MSI_INTR2_BASE 0x4500 ++ ++/* ++ * Broadcom Settop Box PCIe Register Field shift and mask info. The ++ * names are from the chip's RDB and we use them here so that a script ++ * can correlate this code and the RDB to prevent discrepancies. ++ */ ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_SHIFT 0x2 ++#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff ++#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_SHIFT 0x0 ++#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 ++#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_SHIFT 0xc ++#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 ++#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_SHIFT 0xd ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_SHIFT 0x14 ++#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 ++#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_SHIFT 0x1b ++#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_MASK 0x7c00000 ++#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_SHIFT 0x16 ++#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_MASK 0x1f ++#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4 ++#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_SHIFT 0x2 ++#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 ++#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_SHIFT 0x0 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_SHIFT 0x7 ++#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 ++#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_SHIFT 0x5 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_SHIFT 0x4 ++#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 ++#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_SHIFT 0x6 ++#define PCIE_MISC_REVISION_MAJMIN_MASK 0xffff ++#define PCIE_MISC_REVISION_MAJMIN_SHIFT 0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_SHIFT 0x14 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_SHIFT 0x4 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS 0xc ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_SHIFT 0x0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_SHIFT 0x0 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_SHIFT 0x1 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_SHIFT 0x1b ++#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 ++#define PCIE_RGR1_SW_INIT_1_PERST_SHIFT 0x0 ++ ++/* Offsets from PCIE_INTR2_CPU_BASE */ ++#define STATUS 0x0 ++#define SET 0x4 ++#define CLR 0x8 ++#define MASK_STATUS 0xc ++#define MASK_SET 0x10 ++#define MASK_CLR 0x14 ++ ++#define BRCM_NUM_PCIE_OUT_WINS 0x4 ++#define BRCM_MAX_SCB 0x4 ++ ++#define BURST_SIZE_128 0 ++ ++#define PCIE_BUSNUM_SHIFT 20 ++#define PCIE_SLOT_SHIFT 15 ++#define PCIE_FUNC_SHIFT 12 ++ ++#if defined(__BIG_ENDIAN) ++#define DATA_ENDIAN 2 /* PCIe->DDR inbound traffic */ ++#define MMIO_ENDIAN 2 /* CPU->PCIe outbound traffic */ ++#else ++#define DATA_ENDIAN 0 ++#define MMIO_ENDIAN 0 ++#endif ++ ++#define MDIO_PORT0 0x0 ++#define MDIO_DATA_MASK 0x7fffffff ++#define MDIO_DATA_SHIFT 0x0 ++#define MDIO_PORT_MASK 0xf0000 ++#define MDIO_PORT_SHIFT 0x16 ++#define MDIO_REGAD_MASK 0xffff ++#define MDIO_REGAD_SHIFT 0x0 ++#define MDIO_CMD_MASK 0xfff00000 ++#define MDIO_CMD_SHIFT 0x14 ++#define MDIO_CMD_READ 0x1 ++#define MDIO_CMD_WRITE 0x0 ++#define MDIO_DATA_DONE_MASK 0x80000000 ++#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) ++#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) ++#define SSC_REGS_ADDR 0x1100 ++#define SET_ADDR_OFFSET 0x1f ++#define SSC_CNTL_OFFSET 0x2 ++#define SSC_CNTL_OVRD_EN_MASK 0x8000 ++#define SSC_CNTL_OVRD_EN_SHIFT 0xf ++#define SSC_CNTL_OVRD_VAL_MASK 0x4000 ++#define SSC_CNTL_OVRD_VAL_SHIFT 0xe ++#define SSC_STATUS_OFFSET 0x1 ++#define SSC_STATUS_SSC_MASK 0x400 ++#define SSC_STATUS_SSC_SHIFT 0xa ++#define SSC_STATUS_PLL_LOCK_MASK 0x800 ++#define SSC_STATUS_PLL_LOCK_SHIFT 0xb ++ ++#define IDX_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_INDEX]) ++#define DATA_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_DATA]) ++#define PCIE_RGR1_SW_INIT_1(pcie) ((pcie)->reg_offsets[RGR1_SW_INIT_1]) ++ ++enum { ++ RGR1_SW_INIT_1, ++ EXT_CFG_INDEX, ++ EXT_CFG_DATA, ++}; ++ ++enum { ++ RGR1_SW_INIT_1_INIT_MASK, ++ RGR1_SW_INIT_1_INIT_SHIFT, ++ RGR1_SW_INIT_1_PERST_MASK, ++ RGR1_SW_INIT_1_PERST_SHIFT, ++}; ++ ++enum pcie_type { ++ BCM7425, ++ BCM7435, ++ GENERIC, ++ BCM7278, ++ BCM2711, ++}; ++ ++struct brcm_window { ++ dma_addr_t pci_addr; ++ phys_addr_t phys_addr; ++ dma_addr_t size; ++}; ++ ++struct brcm_pcie { ++ struct resource mem; ++ bool ssc; ++ ++ struct device_node *dn; ++ void __iomem *base; ++ ++ int num_out_wins; ++ struct brcm_window out_wins[BRCM_NUM_PCIE_OUT_WINS]; ++ ++ int gen; ++ unsigned int rev; ++ ++ const int *reg_offsets; ++ const int *reg_field_info; ++ u32 max_burst_size; ++ enum pcie_type type; ++}; ++ ++struct pcie_cfg_data { ++ const int *reg_field_info; ++ const int *offsets; ++ const u32 max_burst_size; ++ const enum pcie_type type; ++}; ++ ++static struct brcm_window dma_ranges[1]; ++static int num_dma_ranges; ++ ++static const int pcie_reg_field_info[] = { ++ [RGR1_SW_INIT_1_INIT_MASK] = 0x2, ++ [RGR1_SW_INIT_1_INIT_SHIFT] = 0x1, ++}; ++ ++static const int pcie_offsets[] = { ++ [RGR1_SW_INIT_1] = 0x9210, ++ [EXT_CFG_INDEX] = 0x9000, ++ [EXT_CFG_DATA] = 0x8000, ++}; ++ ++static const struct pcie_cfg_data generic_cfg = { ++ .reg_field_info = pcie_reg_field_info, ++ .offsets = pcie_offsets, ++ .max_burst_size = BURST_SIZE_128, ++ .type = GENERIC, ++}; ++ ++static const struct pcie_cfg_data bcm2711_cfg = { ++ .reg_field_info = pcie_reg_field_info, ++ .offsets = pcie_offsets, ++ .max_burst_size = BURST_SIZE_128, ++ .type = BCM2711, ++}; ++ ++/* These macros extract/insert fields to host controller's register set */ ++#define WR_FLD(base, reg, field, val) \ ++ wr_fld(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) ++#define WR_FLD_RB(base, reg, field, val) \ ++ wr_fld_rb(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) ++#define WR_FLD_WITH_OFFSET(base, off, reg, field, val) \ ++ wr_fld(base + reg + off, reg##_##field##_MASK, \ ++ reg##_##field##_SHIFT, val) ++#define EXTRACT_FIELD(val, reg, field) \ ++ ((val & reg##_##field##_MASK) >> reg##_##field##_SHIFT) ++#define INSERT_FIELD(val, reg, field, field_val) \ ++ ((val & ~reg##_##field##_MASK) | \ ++ (reg##_##field##_MASK & (field_val << reg##_##field##_SHIFT))) ++ ++#define msleep(a) udelay((a) * 1000) ++ ++/* ++ * The roundup_pow_of_two() from log2.h invokes ++ * __roundup_pow_of_two(unsigned long), but we really need ++ * such a function to take a native u64 since unsigned long ++ * is 32 bits on some configurations. So we provide this helper ++ * function below. ++ */ ++static u64 roundup_pow_of_two_64(u64 n) ++{ ++ return 1ULL << fls64(n - 1); ++} ++ ++/* ++ * This is to convert the size of the inbound "BAR" region to the ++ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE ++ */ ++int encode_ibar_size(u64 size) ++{ ++ int log2_in = ilog2(size); ++ ++ if (log2_in >= 12 && log2_in <= 15) ++ /* Covers 4KB to 32KB (inclusive) */ ++ return (log2_in - 12) + 0x1c; ++ else if (log2_in >= 16 && log2_in <= 37) ++ /* Covers 64KB to 32GB, (inclusive) */ ++ return log2_in - 15; ++ /* Something is awry so disable */ ++ return 0; ++} ++ ++/* Configuration space read/write support */ ++static int cfg_index(int busnr, int devfn, int reg) ++{ ++ return (PCI_DEV(devfn) << PCIE_SLOT_SHIFT) ++ | (PCI_FUNC(devfn) << PCIE_FUNC_SHIFT) ++ | (busnr << PCIE_BUSNUM_SHIFT) ++ | (reg & ~3); ++} ++ ++/* The controller is capable of serving in both RC and EP roles */ ++static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); ++ ++ return !!EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PORT); ++} ++ ++static bool brcm_pcie_link_up(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); ++ u32 dla = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_DL_ACTIVE); ++ u32 plu = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PHYLINKUP); ++ ++ return (dla && plu) ? true : false; ++} ++ ++static int brcm_pcie_config_address(const struct udevice *udev, pci_dev_t bdf, ++ uint offset, void **paddress) ++{ ++ struct brcm_pcie *pcie = dev_get_priv(udev); ++ unsigned int bus = PCI_BUS(bdf); ++ unsigned int dev = PCI_DEV(bdf); ++ int idx; ++ ++ if (bus > 0 && !brcm_pcie_link_up(pcie)) ++ return -ENODEV; ++ ++ /* ++ * Busses 0 (host PCIe bridge) and 1 (its immediate child) ++ * are limited to a single device each ++ */ ++ if ((bus == (udev->seq + 1)) && dev > 0) ++ return -ENODEV; ++ ++ /* Accesses to the RC go right to the RC registers if PCI device == 0 */ ++ if (bus == udev->seq) { ++ if (PCI_DEV(bdf)) ++ return -ENODEV; ++ ++ *paddress = pcie->base + offset; ++ return 0; ++ } ++ ++ /* For devices, write to the config space index register */ ++ idx = cfg_index(bus, bdf, 0); ++ ++ writel(idx, pcie->base + IDX_ADDR(pcie)); ++ *paddress = pcie->base + DATA_ADDR(pcie) + offset; ++ ++ return 0; ++} ++ ++static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, ++ uint offset, ulong *valuep, ++ enum pci_size_t size) ++{ ++ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address, ++ bdf, offset, valuep, size); ++} ++ ++static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf, ++ uint offset, ulong value, ++ enum pci_size_t size) ++{ ++ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address, ++ bdf, offset, value, size); ++} ++ ++static void wr_fld(void __iomem *p, u32 mask, int shift, u32 val) ++{ ++ u32 reg = readl(p); ++ ++ reg = (reg & ~mask) | ((val << shift) & mask); ++ writel(reg, p); ++} ++ ++static void wr_fld_rb(void __iomem *p, u32 mask, int shift, u32 val) ++{ ++ wr_fld(p, mask, shift, val); ++ (void)readl(p); ++} ++ ++static const char *link_speed_to_str(int s) ++{ ++ switch (s) { ++ case 1: ++ return "2.5"; ++ case 2: ++ return "5.0"; ++ case 3: ++ return "8.0"; ++ default: ++ break; ++ } ++ return "???"; ++} ++ ++static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, ++ unsigned int val) ++{ ++ unsigned int shift = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_SHIFT]; ++ u32 mask = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_MASK]; ++ ++ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), mask, shift, val); ++} ++ ++static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, ++ unsigned int val) ++{ ++ if (pcie->type != BCM7278) ++ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), ++ PCIE_RGR1_SW_INIT_1_PERST_MASK, ++ PCIE_RGR1_SW_INIT_1_PERST_SHIFT, val); ++ else ++ /* Assert = 0, de-assert = 1 on 7278 */ ++ WR_FLD_RB(pcie->base, PCIE_MISC_PCIE_CTRL, PCIE_PERSTB, !val); ++} ++ ++static u32 mdio_form_pkt(int port, int regad, int cmd) ++{ ++ u32 pkt = 0; ++ ++ pkt |= (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK; ++ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK; ++ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK; ++ ++ return pkt; ++} ++ ++/* Negative return value indicates error */ ++static int mdio_read(void __iomem *base, u8 port, u8 regad) ++{ ++ int tries; ++ u32 data; ++ ++ writel(mdio_form_pkt(port, regad, MDIO_CMD_READ), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ ++ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ } ++ ++ return MDIO_RD_DONE(data) ++ ? (data & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT ++ : -EIO; ++} ++ ++/* Negative return value indicates error */ ++static int mdio_write(void __iomem *base, u8 port, u8 regad, u16 wrdata) ++{ ++ int tries; ++ u32 data; ++ ++ writel(mdio_form_pkt(port, regad, MDIO_CMD_WRITE), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ writel(MDIO_DATA_DONE_MASK | wrdata, ++ base + PCIE_RC_DL_MDIO_WR_DATA); ++ ++ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ } ++ ++ return MDIO_WT_DONE(data) ? 0 : -EIO; ++} ++ ++/* ++ * Configures device for Spread Spectrum Clocking (SSC) mode; negative ++ * return value indicates error. ++ */ ++static int set_ssc(void __iomem *base) ++{ ++ int tmp; ++ u16 wrdata; ++ int pll, ssc; ++ ++ tmp = mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET, SSC_REGS_ADDR); ++ if (tmp < 0) ++ return tmp; ++ ++ tmp = mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET); ++ if (tmp < 0) ++ return tmp; ++ ++ wrdata = INSERT_FIELD(tmp, SSC_CNTL_OVRD, EN, 1); ++ wrdata = INSERT_FIELD(wrdata, SSC_CNTL_OVRD, VAL, 1); ++ tmp = mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, wrdata); ++ if (tmp < 0) ++ return tmp; ++ ++ udelay(1500); ++ tmp = mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET); ++ if (tmp < 0) ++ return tmp; ++ ++ ssc = EXTRACT_FIELD(tmp, SSC_STATUS, SSC); ++ pll = EXTRACT_FIELD(tmp, SSC_STATUS, PLL_LOCK); ++ ++ return (ssc && pll) ? 0 : -EIO; ++} ++ ++/* Limits operation to a specific generation (1, 2, or 3) */ ++static void set_gen(void __iomem *base, int gen) ++{ ++ u32 lnkcap = readl(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ u16 lnkctl2 = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++ ++ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; ++ writel(lnkcap, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ ++ lnkctl2 = (lnkctl2 & ~0xf) | gen; ++ writew(lnkctl2, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++} ++ ++static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, ++ unsigned int win, phys_addr_t phys_addr, ++ dma_addr_t pcie_addr, dma_addr_t size) ++{ ++ void __iomem *base = pcie->base; ++ phys_addr_t phys_addr_mb, limit_addr_mb; ++ u32 tmp; ++ ++ /* Set the base of the pcie_addr window */ ++ writel(lower_32_bits(pcie_addr) + MMIO_ENDIAN, ++ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + (win * 8)); ++ writel(upper_32_bits(pcie_addr), ++ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + (win * 8)); ++ ++ phys_addr_mb = phys_addr >> 20; ++ limit_addr_mb = (phys_addr + size - 1) >> 20; ++ ++ /* Write the addr base low register */ ++ WR_FLD_WITH_OFFSET(base, (win * 4), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, ++ BASE, phys_addr_mb); ++ /* Write the addr limit low register */ ++ WR_FLD_WITH_OFFSET(base, (win * 4), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, ++ LIMIT, limit_addr_mb); ++ ++ if (pcie->type != BCM7435 && pcie->type != BCM7425) { ++ /* Write the cpu addr high register */ ++ tmp = (u32)(phys_addr_mb >> ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); ++ WR_FLD_WITH_OFFSET(base, (win * 8), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI, ++ BASE, tmp); ++ /* Write the cpu limit high register */ ++ tmp = (u32)(limit_addr_mb >> ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); ++ WR_FLD_WITH_OFFSET(base, (win * 8), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI, ++ LIMIT, tmp); ++ } ++} ++ ++static int brcm_pcie_setup(struct brcm_pcie *pcie) ++{ ++ phys_addr_t scb_size[BRCM_MAX_SCB] = {0}; ++ void __iomem *base = pcie->base; ++ unsigned int scb_size_val; ++ u64 rc_bar2_offset, rc_bar2_size; ++ u64 total_mem_size = 0; ++ int i, j, ret, limit, num_memc; ++ u16 nlw, cls, lnksta; ++ bool ssc_good = false; ++ u32 tmp; ++ ++ /* Reset the bridge */ ++ brcm_pcie_bridge_sw_init_set(pcie, 1); ++ ++ /* ++ * Ensure that the fundamental reset is asserted, except for 7278, ++ * which fails if we do this. ++ */ ++ if (pcie->type != BCM7278) ++ brcm_pcie_perst_set(pcie, 1); ++ ++ udelay(150); ++ ++ /* Take the bridge out of reset */ ++ brcm_pcie_bridge_sw_init_set(pcie, 0); ++ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, SERDES_IDDQ, 0); ++ /* Wait for SerDes to be stable */ ++ udelay(150); ++ ++ /* Grab the PCIe hw revision number */ ++ tmp = readl(base + PCIE_MISC_REVISION); ++ pcie->rev = EXTRACT_FIELD(tmp, PCIE_MISC_REVISION, MAJMIN); ++ ++ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ ++ tmp = INSERT_FIELD(0, PCIE_MISC_MISC_CTRL, SCB_ACCESS_EN, 1); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, CFG_READ_UR_MODE, 1); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, MAX_BURST_SIZE, ++ pcie->max_burst_size); ++ writel(tmp, base + PCIE_MISC_MISC_CTRL); ++ ++ /* ++ * Set up inbound memory view for the EP (called RC_BAR2, not to be ++ * confused with the BARs that are advertised by the EP). ++ * ++ * The PCIe host controller by design must set the inbound viewport ++ * to be a contiguous arrangement of all of the system's memory. ++ * In addition, its size must be a power of two. Further, the MSI ++ * target address must NOT be placed inside this region, as the ++ * decoding logic will consider its address to be inbound memory ++ * traffic. To further complicate matters, the viewport must start ++ * on a pcie-address that is aligned on a multiple of its size. ++ * If a portion of the viewport does not represent system memory ++ * -- e.g. 3GB of memory requires a 4GB viewport -- we can map ++ * the outbound memory in or after 3GB and even though the viewport ++ * will overlap the outbound memory the controller will know to send ++ * outbound memory downstream and everything else upstream. ++ */ ++ ++ if (num_dma_ranges) { ++ /* ++ * Use the base address and size(s) provided in the dma-ranges ++ * property. ++ */ ++ for (i = 0; i < num_dma_ranges; i++) ++ scb_size[i] = roundup_pow_of_two_64(dma_ranges[i].size); ++ ++ num_memc = num_dma_ranges; ++ rc_bar2_offset = dma_ranges[0].pci_addr; ++ } else { ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < num_memc; i++) ++ total_mem_size += scb_size[i]; ++ ++ rc_bar2_size = roundup_pow_of_two_64(total_mem_size); ++ ++ /* Verify the alignment is correct */ ++ if (rc_bar2_offset & (rc_bar2_size - 1)) { ++ printf("PCIe BRCM: inbound window is misaligned\n"); ++ return -EINVAL; ++ } ++ ++ tmp = lower_32_bits(rc_bar2_offset); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_RC_BAR2_CONFIG_LO, SIZE, ++ encode_ibar_size(rc_bar2_size)); ++ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); ++ writel(upper_32_bits(rc_bar2_offset), ++ base + PCIE_MISC_RC_BAR2_CONFIG_HI); ++ ++ scb_size_val = scb_size[0] ++ ? ilog2(scb_size[0]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB0_SIZE, scb_size_val); ++ ++ if (num_memc > 1) { ++ scb_size_val = scb_size[1] ++ ? ilog2(scb_size[1]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB1_SIZE, scb_size_val); ++ } ++ ++ if (num_memc > 2) { ++ scb_size_val = scb_size[2] ++ ? ilog2(scb_size[2]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB2_SIZE, scb_size_val); ++ } ++ ++ /* Disable the PCIe->GISB memory window (RC_BAR1) */ ++ WR_FLD(base, PCIE_MISC_RC_BAR1_CONFIG_LO, SIZE, 0); ++ ++ /* Disable the PCIe->SCB memory window (RC_BAR3) */ ++ WR_FLD(base, PCIE_MISC_RC_BAR3_CONFIG_LO, SIZE, 0); ++ ++ /* Clear any interrupts we find on boot */ ++ writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + CLR); ++ (void)readl(base + PCIE_INTR2_CPU_BASE + CLR); ++ ++ /* Mask all interrupts since we are not handling any yet */ ++ writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + MASK_SET); ++ (void)readl(base + PCIE_INTR2_CPU_BASE + MASK_SET); ++ ++ if (pcie->gen) ++ set_gen(base, pcie->gen); ++ ++ /* Unassert the fundamental reset */ ++ brcm_pcie_perst_set(pcie, 0); ++ ++ /* Give the RC/EP time to wake up, before trying to configure RC. */ ++ limit = 100; ++ for (i = 1, j = 0; j < limit && !brcm_pcie_link_up(pcie); ++ j += i, i = i * 2) ++ msleep(i + j > limit ? limit - j : i); ++ ++ if (!brcm_pcie_link_up(pcie)) { ++ printf("PCIe BRCM: link down\n"); ++ return -ENODEV; ++ } ++ ++ if (!brcm_pcie_rc_mode(pcie)) { ++ printf("PCIe misconfigured; is in EP mode\n"); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < pcie->num_out_wins; i++) ++ brcm_pcie_set_outbound_win(pcie, i, pcie->out_wins[i].phys_addr, ++ pcie->out_wins[i].pci_addr, ++ pcie->out_wins[i].size); ++ ++ /* ++ * For config space accesses on the RC, show the right class for ++ * a PCIe-PCIe bridge (the default setting is to be EP mode). ++ */ ++ WR_FLD_RB(base, PCIE_RC_CFG_PRIV1_ID_VAL3, CLASS_CODE, 0x060400); ++ ++ if (pcie->ssc) { ++ ret = set_ssc(base); ++ if (ret == 0) ++ ssc_good = true; ++ else ++ printf("PCIe BRCM: failed attempt to enter ssc mode\n"); ++ } ++ ++ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); ++ cls = lnksta & PCI_EXP_LNKSTA_CLS; ++ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; ++ ++ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls), ++ nlw, ssc_good ? "(SSC)" : "(!SSC)"); ++ ++ /* PCIe->SCB endian mode for BAR */ ++ /* field ENDIAN_MODE_BAR2 = DATA_ENDIAN */ ++ WR_FLD_RB(base, PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1, ++ ENDIAN_MODE_BAR2, DATA_ENDIAN); ++ ++ /* ++ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 ++ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. ++ */ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, CLKREQ_DEBUG_ENABLE, 1); ++ ++ return 0; ++} ++ ++static const struct udevice_id brcm_pcie_ids[] = { ++ { .compatible = "brcm,bcm7445-pcie", .data = (ulong)&generic_cfg }, ++ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg }, ++ { } ++}; ++ ++static int brcm_pcie_probe(struct udevice *dev) ++{ ++ struct udevice *ctlr = pci_get_controller(dev); ++ struct pci_controller *hose = dev_get_uclass_priv(ctlr); ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ struct pcie_cfg_data *data = (struct pcie_cfg_data *)dev_get_driver_data(dev); ++ ofnode dn = dev_ofnode(dev); ++ u32 max_link_speed; ++ int i; ++ ++ if (hose->region_count < 2) { ++ pr_err("PCIe BRCM: Missing PCI regions definition"); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < hose->region_count; i++) { ++ if (hose->regions[i].flags == PCI_REGION_SYS_MEMORY) ++ continue; ++ ++ pcie->out_wins[i].phys_addr = hose->regions[i].phys_start; ++ pcie->out_wins[i].pci_addr = hose->regions[i].bus_start; ++ pcie->out_wins[i].size = hose->regions[i].size; ++ pcie->num_out_wins++; ++ } ++ ++ /* TODO: Parse inbound access mapping from dma-ranges DT property */ ++ num_dma_ranges = 1; ++ for (i = 0; i < hose->region_count; i++) { ++ if (hose->regions[i].flags != PCI_REGION_SYS_MEMORY) ++ continue; ++ ++ dma_ranges[0].pci_addr = hose->regions[i].bus_start; ++ dma_ranges[0].phys_addr = hose->regions[i].phys_start; ++ dma_ranges[0].size = hose->regions[i].size; ++ break; ++ } ++ ++ pcie->reg_offsets = data->offsets; ++ pcie->reg_field_info = data->reg_field_info; ++ pcie->max_burst_size = data->max_burst_size; ++ pcie->type = data->type; ++ ++ if (ofnode_read_u32(dn, "max-link-speed", &max_link_speed) || ++ max_link_speed > 4) ++ pcie->gen = 0; ++ else ++ pcie->gen = max_link_speed; ++ ++ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); ++ ++ return brcm_pcie_setup(pcie); ++} ++ ++static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ ++ /* Get the controller base address */ ++ pcie->base = dev_read_addr_ptr(dev); ++ if (!pcie->base) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static const struct dm_pci_ops brcm_pcie_ops = { ++ .read_config = brcm_pcie_read_config, ++ .write_config = brcm_pcie_write_config, ++}; ++ ++U_BOOT_DRIVER(pcie_brcm_base) = { ++ .name = "pcie_brcm", ++ .id = UCLASS_PCI, ++ .ops = &brcm_pcie_ops, ++ .of_match = brcm_pcie_ids, ++ .probe = brcm_pcie_probe, ++ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, ++ .priv_auto_alloc_size = sizeof(struct brcm_pcie), ++}; + +From patchwork Tue Apr 21 16:50:59 2020 +Content-Type: text/plain; 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+ Tue, 21 Apr 2020 16:51:25 +0000 (GMT) +From: Sylwester Nawrocki +To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com +Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, + m.szyprowski@samsung.com, b.zolnierkie@samsung.com +Subject: [RFC PATCH 9/9] config: Enable support for the XHCI controller on + RPI4 board +Date: Tue, 21 Apr 2020 18:50:59 +0200 +Message-Id: <20200421165059.19394-10-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA0WSbUhTcRTG+e++zppcp+AflYxhH9LUzIhbiVkG3Q998ENkRWpTb1PTKfc6 + zYQwheVbU7OcTFJLaWWEM81Xwlo1zdcvvoEbthzhLAObIFq63K7Vt995zvNwOIdDItIqzI9M + V+aynFKeKcM90G7TxmSoJqgp8fBYCUoPT20DuqO+HaMfVibRc5tqjH75wULQ39V3AN1ca8Po + 0mknoFfelBExYmZhpAhjGnXDKNOnsxDMuLkXMJquNsC0d02jTOdoYRxxxSMqlc1Mz2O58Ohr + HmnFzRt4TuX+m7XqQawIfPYvByQJqaPQ8DS2HHiQUuoZgMsPHCKhWAOwxdqJCIUDQJNmCZQD + sTvR8mlgt6EHsNioBf8iG48eYy4XTkXAex817oQPFQdnNurcjFA5sG7WhrvYm4qHFYb3bkap + A7DB8U7kYgkVBecNHbgwLRC+MLxFXCze0S3r9ahrGKQqCLhp78EE01lY12ncDXjD5aEuQuAA + 6OxrEgmBEgArB+YJoagGcGGoeXehk9A8sYm7zoFQB2F7f7ggn4Z6rRMTruQJ51a8hAU84f1u + LSLIEliqlgruIPirTSsS2A9W2JyowAy011h3r1UF4OvnZqIaBOr+D2sGoA34sio+S8HyR5Rs + fhgvz+JVSkVYSnbWK7DzJqPbQ2u9oP93shFQJJDtlcxNNiZKMXkeX5BlBJBEZD4Sg3VHkqTK + C26xXHYSp8pkeSPwJ1GZryTyiT1BSinkuewNls1hub9dESn2KwLJg1+3GcJnoqnQntS+dGor + g3FOHjdfGtBf3qOc0h3Sr0dor2/GpFrGwsdmW+P3rVGj+DHrlk2f34qDkC8hIzWmqbvG1YD+ + tBlrRoiXmps5Lynzjmsd+ZnClZ5zLJ4oi/3mQ6Y3jJ9R9Ny2R5pCfySsXo1WiS8uhnHBjYkd + F2QonyaPCEY4Xv4HlRBgdCIDAAA= +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t/xu7q9KvPjDBrnaFmcuPKP0WLjjPWs + FlN74i1u/GpjtVh75C67xZu2RkaLBZOfsFp0XP3PaPF2bye7A6fH/VMNrB7zZp1g8dg56y67 + x9k7Oxg9+rasYvRYv+Uqi8fm09UB7FF6NkX5pSWpChn5xSW2StGGFkZ6hpYWekYmlnqGxuax + VkamSvp2NimpOZllqUX6dgl6GU0LfrIV9ChUTG7bz9rA+EC6i5GTQ0LARGLxyd3MXYxcHEIC + SxklPvy/yt7FyAGUkJKY36IEUSMs8edaFxtEzSdGibXPXzGDJNgEDCV6j/YxgtgiAiESL45e + YQKxmQXKJNa0vgaLCwuEStyd0gNmswioSsz+fBCshlfARuL2ho1sEAvkJVZvOAA2kxMofvf7 + DBYQW0jAWqLh0hKWCYx8CxgZVjGKpJYW56bnFhvpFSfmFpfmpesl5+duYgQG9rZjP7fsYOx6 + F3yIUYCDUYmH98b5eXFCrIllxZW5hxglOJiVRHg3PAQK8aYkVlalFuXHF5XmpBYfYjQFOmoi + s5Rocj4w6vJK4g1NDc0tLA3Njc2NzSyUxHk7BA7GCAmkJ5akZqemFqQWwfQxcXBKNTBWTnjA + 9rfi5OHFK1WDPefc1Lu4NHa3k0wcX1F135VL2qWb2AoizLZIZYrNyrjw0f+d94ZWruRVorea + j/wSO5bju/fInhW3XUo8DDUe22meFxPewrSBefPkV4tqufjmZfw2215cNE+8PDvoi1vXG/vu + HJazefOrPDX48nXr2GPVpXas8L377pESS3FGoqEWc1FxIgDja1QoggIAAA== +X-CMS-MailID: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a +X-Msg-Generator: CA +X-RootMTR: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a +References: <20200421165059.19394-1-s.nawrocki@samsung.com> + +X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI +and USB commands. To get it working one has to call the following commands: +"pci enum; usb start;", thus such commands have been added to the default +"preboot" environment variable. One has to update his environment if it is +already configured to get this feature working out of the box. + +Signed-off-by: Marek Szyprowski +--- + configs/rpi_4_32b_defconfig | 9 +++++++++ + configs/rpi_4_defconfig | 10 ++++++++++ + configs/rpi_arm64_defconfig | 9 ++++++++- + 3 files changed, 27 insertions(+), 1 deletion(-) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 72cda5d..0dd763f 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_DFU=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_INTERFACE="mmc" +@@ -28,12 +32,17 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_MANUFACTURER="FSL" + CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 6d148da..f80e5da 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_DFU=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_INTERFACE="mmc" +@@ -28,12 +32,18 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_MANUFACTURER="FSL" + CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index fea86be..926dfc3 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -7,13 +7,14 @@ CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_USE_PREBOOT=y +-CONFIG_PREBOOT="usb start" ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y +@@ -26,11 +27,17 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_DWC2=y + CONFIG_USB_KEYBOARD=y + CONFIG_USB_HOST_ETHER=y +From 41e5d853779e91ea193ea0251bae9328083e2374 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 21 Apr 2020 20:18:31 +0100 +Subject: [PATCH] rpi4: add usb keyboard/storage + +Signed-off-by: Peter Robinson +--- + configs/rpi_4_32b_defconfig | 2 ++ + configs/rpi_4_defconfig | 2 ++ + 2 files changed, 4 insertions(+) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 0dd763f06f..2e137414f7 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -49,6 +49,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 + CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_STORAGE=y + CONFIG_DM_VIDEO=y + # CONFIG_VIDEO_BPP8 is not set + # CONFIG_VIDEO_BPP16 is not set +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index f80e5dac3e..bdefbd2a45 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -50,6 +50,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 + CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_STORAGE=y + CONFIG_DM_VIDEO=y + # CONFIG_VIDEO_BPP8 is not set + # CONFIG_VIDEO_BPP16 is not set +-- +2.26.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 71db9e9..52d19f2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.04 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Release: 4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -39,6 +39,8 @@ Patch16: initial-support-for-the-Pinebook-Pro-laptop-from.patch Patch17: rockpro64-limit-speed-on-mSD-slot.patch # AllWinner improvements Patch18: AllWinner-Pine64-bits.patch +# RPi4 +Patch19: USB-host-support-for-Raspberry-Pi-4-board.patch BuildRequires: bc BuildRequires: dtc @@ -252,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Apr 21 2020 Peter Robinson - 2020.04-4 +- Initial support for USB on Rasperry Pi 4 + * Tue Apr 21 2020 Peter Robinson - 2020.04-3 - Ship u-boot-rockchip.bin for SPI flash From e46467332f26ff81ef10f5d8080cfb5651cecf5a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 29 Apr 2020 23:07:34 +0100 Subject: [PATCH 083/351] 2020.07 RC1 --- Misc-fixes-for-Tegra.patch | 120 --- ...ader-enable-RNG-if-DM_RNG-is-enabled.patch | 31 - ...ort-for-the-Pinebook-Pro-laptop-from.patch | 189 ---- sources | 2 +- uboot-tools.spec | 29 +- ...rsion-detection-for-mx6q-mx6dl-revD1.patch | 825 ------------------ 6 files changed, 15 insertions(+), 1181 deletions(-) delete mode 100644 Misc-fixes-for-Tegra.patch delete mode 100644 efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch delete mode 100644 wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch diff --git a/Misc-fixes-for-Tegra.patch b/Misc-fixes-for-Tegra.patch deleted file mode 100644 index 2c3223d..0000000 --- a/Misc-fixes-for-Tegra.patch +++ /dev/null @@ -1,120 +0,0 @@ -From patchwork Thu Mar 26 22:20:44 2020 -Content-Type: text/plain; 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- spf=fail smtp.mailfrom=tomcwarren3959@gmail.com -Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by - hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) - id ; Thu, 26 Mar 2020 15:20:03 -0700 -Received: from hqmail.nvidia.com ([172.20.161.6]) - by hqpgpgate102.nvidia.com (PGP Universal service); - Thu, 26 Mar 2020 15:20:49 -0700 -X-PGP-Universal: processed; - by hqpgpgate102.nvidia.com on Thu, 26 Mar 2020 15:20:49 -0700 -Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com - (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; - Thu, 26 Mar 2020 22:20:49 +0000 -Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL101.nvidia.com - (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via - Frontend Transport; Thu, 26 Mar 2020 22:20:49 +0000 -Received: from tom-lt2.nvidia.com (Not Verified[10.2.63.13]) by - rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) - id ; Thu, 26 Mar 2020 15:20:48 -0700 -From: -To: -CC: , , , - , -Subject: [PATCH 2/3] fdt: Fix 'system' command -Date: Thu, 26 Mar 2020 15:20:44 -0700 -Message-ID: <1585261245-1740-3-git-send-email-tomcwarren3959@gmail.com> -X-Mailer: git-send-email 1.8.2.1.610.g562af5b -In-Reply-To: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> -References: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Tom Warren - -'fdt systemsetup' wasn't working, due to the fact that the 'set' command -was being parsed in do_fdt() by only testing for the leading 's' instead -of "se", which kept the "sys" test further down from executing. Changed -to test for "se" instead, now 'fdt systemsetup' works (to test the -ft_system_setup proc w/o having to boot a kernel). - -Signed-off-by: Tom Warren ---- - cmd/fdt.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/cmd/fdt.c b/cmd/fdt.c -index 25a6ed4..36cc726 100644 ---- a/cmd/fdt.c -+++ b/cmd/fdt.c -@@ -286,7 +286,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) - /* - * Set the value of a property in the working_fdt. - */ -- } else if (argv[1][0] == 's') { -+ } else if (strncmp(argv[1], "se", 2) == 0) { - char *pathp; /* path */ - char *prop; /* property */ - int nodeoffset; /* node offset from libfdt */ - diff --git a/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch b/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch deleted file mode 100644 index bd70605..0000000 --- a/efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch +++ /dev/null @@ -1,31 +0,0 @@ -From af59a07dad603740d0aaa103cd02b97e4a3267af Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 1 Apr 2020 11:11:12 +0100 -Subject: [PATCH] efi_loader: enable RNG if DM_RNG is enabled - -Enable EFI_RNG_PROTOCOL by default if DM_RNG is set. - -Signed-off-by: Peter Robinson ---- - -I think it makes sense to enable EFI_RNG_PROTOCOL by default if a config -has enabled both DM_RNG and UEFI. - - lib/efi_loader/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig -index 9890144d41..b9a770281e 100644 ---- a/lib/efi_loader/Kconfig -+++ b/lib/efi_loader/Kconfig -@@ -125,6 +125,7 @@ config EFI_GRUB_ARM32_WORKAROUND - - config EFI_RNG_PROTOCOL - bool "EFI_RNG_PROTOCOL support" -+ default y if DM_RNG - depends on DM_RNG - help - Provide a EFI_RNG_PROTOCOL implementation using the hardware random --- -2.26.0 - diff --git a/initial-support-for-the-Pinebook-Pro-laptop-from.patch b/initial-support-for-the-Pinebook-Pro-laptop-from.patch index 8d1473b..defa2f6 100644 --- a/initial-support-for-the-Pinebook-Pro-laptop-from.patch +++ b/initial-support-for-the-Pinebook-Pro-laptop-from.patch @@ -1,31 +1,3 @@ -From cc06e37c2b69b7a1263dabeb39aafc1cf98560d8 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 19 Jan 2020 03:13:02 +0000 -Subject: [PATCH 1/5] video: simple_panel: add boe,nv140fhmn49 display - -add "boe,nv140fhmn49" display to compatible node. - -Signed-off-by: Peter Robinson -Cc: Anatolij Gustschin ---- - drivers/video/simple_panel.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c -index c3c0e84732..5722811117 100644 ---- a/drivers/video/simple_panel.c -+++ b/drivers/video/simple_panel.c -@@ -105,6 +105,7 @@ static const struct udevice_id simple_panel_ids[] = { - { .compatible = "auo,b133xtn01" }, - { .compatible = "auo,b116xw03" }, - { .compatible = "auo,b133htn01" }, -+ { .compatible = "boe,nv140fhmn49" }, - { .compatible = "lg,lb070wv8" }, - { } - }; --- -2.26.1 - From a3e23dca57bff1043bd6c746458dae2dd446948e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 19 Apr 2020 10:31:53 +0100 @@ -62,120 +34,6 @@ index 0000000000..8962df79e7 -- 2.26.1 -From 6c657b48a13be9b98fea18cd5a72b0d6f547a9d0 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 19 Apr 2020 10:32:21 +0100 -Subject: [PATCH 3/5] dt-bindings: leds: adopt Linux leds common binding - constants - -Sync the common leds bindings from linux 5.7-rc1. - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/leds/common.h | 91 +++++++++++++++++++++++++++++++ - 1 file changed, 91 insertions(+) - create mode 100644 include/dt-bindings/leds/common.h - -diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h -new file mode 100644 -index 0000000000..0ce7dfc00d ---- /dev/null -+++ b/include/dt-bindings/leds/common.h -@@ -0,0 +1,91 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * This header provides macros for the common LEDs device tree bindings. -+ * -+ * Copyright (C) 2015, Samsung Electronics Co., Ltd. -+ * Author: Jacek Anaszewski -+ * -+ * Copyright (C) 2019 Jacek Anaszewski -+ * Copyright (C) 2020 Pavel Machek -+ */ -+ -+#ifndef __DT_BINDINGS_LEDS_H -+#define __DT_BINDINGS_LEDS_H -+ -+/* External trigger type */ -+#define LEDS_TRIG_TYPE_EDGE 0 -+#define LEDS_TRIG_TYPE_LEVEL 1 -+ -+/* Boost modes */ -+#define LEDS_BOOST_OFF 0 -+#define LEDS_BOOST_ADAPTIVE 1 -+#define LEDS_BOOST_FIXED 2 -+ -+/* Standard LED colors */ -+#define LED_COLOR_ID_WHITE 0 -+#define LED_COLOR_ID_RED 1 -+#define LED_COLOR_ID_GREEN 2 -+#define LED_COLOR_ID_BLUE 3 -+#define LED_COLOR_ID_AMBER 4 -+#define LED_COLOR_ID_VIOLET 5 -+#define LED_COLOR_ID_YELLOW 6 -+#define LED_COLOR_ID_IR 7 -+#define LED_COLOR_ID_MAX 8 -+ -+/* Standard LED functions */ -+/* Keyboard LEDs, usually it would be input4::capslock etc. */ -+/* Obsolete equivalent: "shift-key-light" */ -+#define LED_FUNCTION_CAPSLOCK "capslock" -+#define LED_FUNCTION_SCROLLLOCK "scrolllock" -+#define LED_FUNCTION_NUMLOCK "numlock" -+/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), -+ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ -+#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" -+ -+/* System LEDs, usually found on system body. -+ platform::mute (etc) is sometimes seen, :mute would be better */ -+#define LED_FUNCTION_POWER "power" -+#define LED_FUNCTION_DISK "disk" -+ -+/* Obsolete: "platform:*:charging" (allwinner sun50i) */ -+#define LED_FUNCTION_CHARGING "charging" -+/* Used RGB notification LEDs common on phones. -+ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), -+ "lp5523:{r,g,b}" (Nokia N900) */ -+#define LED_FUNCTION_STATUS "status" -+ -+#define LED_FUNCTION_MICMUTE "micmute" -+#define LED_FUNCTION_MUTE "mute" -+ -+/* Miscelleaus functions. Use functions above if you can. */ -+#define LED_FUNCTION_ACTIVITY "activity" -+#define LED_FUNCTION_ALARM "alarm" -+#define LED_FUNCTION_BACKLIGHT "backlight" -+#define LED_FUNCTION_BLUETOOTH "bluetooth" -+#define LED_FUNCTION_BOOT "boot" -+#define LED_FUNCTION_CPU "cpu" -+#define LED_FUNCTION_DEBUG "debug" -+#define LED_FUNCTION_DISK_ACTIVITY "disk-activity" -+#define LED_FUNCTION_DISK_ERR "disk-err" -+#define LED_FUNCTION_DISK_READ "disk-read" -+#define LED_FUNCTION_DISK_WRITE "disk-write" -+#define LED_FUNCTION_FAULT "fault" -+#define LED_FUNCTION_FLASH "flash" -+#define LED_FUNCTION_HEARTBEAT "heartbeat" -+#define LED_FUNCTION_INDICATOR "indicator" -+#define LED_FUNCTION_LAN "lan" -+#define LED_FUNCTION_MAIL "mail" -+#define LED_FUNCTION_MTD "mtd" -+#define LED_FUNCTION_PANIC "panic" -+#define LED_FUNCTION_PROGRAMMING "programming" -+#define LED_FUNCTION_RX "rx" -+#define LED_FUNCTION_SD "sd" -+#define LED_FUNCTION_STANDBY "standby" -+#define LED_FUNCTION_TORCH "torch" -+#define LED_FUNCTION_TX "tx" -+#define LED_FUNCTION_USB "usb" -+#define LED_FUNCTION_WAN "wan" -+#define LED_FUNCTION_WLAN "wlan" -+#define LED_FUNCTION_WPS "wps" -+ -+#endif /* __DT_BINDINGS_LEDS_H */ --- -2.26.1 - From 27f56eec1fa5baa4fc82ebb356a50826bb9f5643 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 19 Apr 2020 13:28:51 +0100 @@ -1713,50 +1571,3 @@ index 0e9f0ec250..c15c17a1b0 100644 CONFIG_USB=y -- 2.26.1 - -From 7db304da3ae9480f49febc5968e4d02c171d7080 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 19 Apr 2020 13:13:37 +0100 -Subject: [PATCH 08/10] drivers: video: rockchip: fix building eDP and LVDS - drivers - -The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in -hardware.h so include it so the drivers build. Adjust rk_lvds.c so -includes are in alphabetical order while updating. - -Signed-off-by: Peter Robinson ---- - drivers/video/rockchip/rk_edp.c | 1 + - drivers/video/rockchip/rk_lvds.c | 3 ++- - 2 files changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c -index 8703df0ec0..cf84b886e7 100644 ---- a/drivers/video/rockchip/rk_edp.c -+++ b/drivers/video/rockchip/rk_edp.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include - - #define MAX_CR_LOOP 5 -diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c -index cf5c0439b1..79e24baf53 100644 ---- a/drivers/video/rockchip/rk_lvds.c -+++ b/drivers/video/rockchip/rk_lvds.c -@@ -13,8 +13,9 @@ - #include - #include - #include --#include - #include -+#include -+#include - #include - #include - --- -2.26.1 - diff --git a/sources b/sources index bd41109..875b362 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.04.tar.bz2) = e04fe54883149123730605b084324ac0d1d72ce6913467bbe587a5a2675bcf7bb393405d9a446dc0c64ba42abc1e862ae5a132e9e51aa7390e2e9fce045af8d8 +SHA512 (u-boot-2020.07-rc1.tar.bz2) = 345b451652ca8bf539f6629ce618113d66ff6690a1f9ccf5a5a4638e6f30c0302fe4af365b5751fa229b09dd354de1db1480c869f511384855d32f692a95acf7 diff --git a/uboot-tools.spec b/uboot-tools.spec index 52d19f2..044a7c4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc1 +%global candidate rc1 Name: uboot-tools -Version: 2020.04 -Release: 4%{?candidate:.%{candidate}}%{?dist} +Version: 2020.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,23 +24,19 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch4: usb-kbd-fixes.patch Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: dragonboard-fixes.patch -Patch7: efi_loader-enable-RNG-if-DM_RNG-is-enabled.patch # Tegra improvements -Patch10: Misc-fixes-for-Tegra.patch -Patch11: arm-tegra-define-fdtfile-option-for-distro-boot.patch -Patch12: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch -# Wandboard fixes -Patch13: wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch +Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch +Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # Rockchips improvements -Patch14: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch -Patch15: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch16: initial-support-for-the-Pinebook-Pro-laptop-from.patch -Patch17: rockpro64-limit-speed-on-mSD-slot.patch +Patch12: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch +Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch14: initial-support-for-the-Pinebook-Pro-laptop-from.patch +Patch15: rockpro64-limit-speed-on-mSD-slot.patch # AllWinner improvements -Patch18: AllWinner-Pine64-bits.patch +Patch16: AllWinner-Pine64-bits.patch # RPi4 -Patch19: USB-host-support-for-Raspberry-Pi-4-board.patch +Patch17: USB-host-support-for-Raspberry-Pi-4-board.patch BuildRequires: bc BuildRequires: dtc @@ -254,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Apr 29 2020 Peter Robinson - 2020.07-0.1.rc1 +- 2020.07 RC1 + * Tue Apr 21 2020 Peter Robinson - 2020.04-4 - Initial support for USB on Rasperry Pi 4 diff --git a/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch b/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch deleted file mode 100644 index 06cbf88..0000000 --- a/wandboard-Fix-version-detection-for-mx6q-mx6dl-revD1.patch +++ /dev/null @@ -1,825 +0,0 @@ -From patchwork Fri Apr 17 12:27:09 2020 -Content-Type: text/plain; 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- #include "imx6dl.dtsi" --#include "imx6qdl-wandboard-revb1.dtsi" -+#include "imx6qdl-wandboard-revd1.dtsi" - - / { -- model = "Wandboard i.MX6 Dual Lite Board rev B1"; -+ model = "Wandboard i.MX6 Dual Lite Board revD1"; - compatible = "wand,imx6dl-wandboard", "fsl,imx6dl"; - - memory@10000000 { -diff --git a/arch/arm/dts/imx6q-wandboard-revb1.dts b/arch/arm/dts/imx6q-wandboard-revd1.dts -similarity index 80% -rename from arch/arm/dts/imx6q-wandboard-revb1.dts -rename to arch/arm/dts/imx6q-wandboard-revd1.dts -index f6ccbecff9..55331021d8 100644 ---- a/arch/arm/dts/imx6q-wandboard-revb1.dts -+++ b/arch/arm/dts/imx6q-wandboard-revd1.dts -@@ -6,10 +6,10 @@ - */ - /dts-v1/; - #include "imx6q.dtsi" --#include "imx6qdl-wandboard-revb1.dtsi" -+#include "imx6qdl-wandboard-revd1.dtsi" - - / { -- model = "Wandboard i.MX6 Quad Board rev B1"; -+ model = "Wandboard i.MX6 Quad Board revD1"; - compatible = "wand,imx6q-wandboard", "fsl,imx6q"; - - memory@10000000 { -diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c -index 5725c5816c..90957167b2 100644 ---- a/board/wandboard/wandboard.c -+++ b/board/wandboard/wandboard.c -@@ -484,13 +484,13 @@ int checkboard(void) - int board_fit_config_name_match(const char *name) - { - if (is_mx6dq()) { -- if (!strcmp(name, "imx6q-wandboard-revb1")) -+ if (!strcmp(name, "imx6q-wandboard-revd1")) - return 0; - } else if (is_mx6dqp()) { - if (!strcmp(name, "imx6qp-wandboard-revd1")) - return 0; - } else if (is_mx6dl() || is_mx6solo()) { -- if (!strcmp(name, "imx6dl-wandboard-revb1")) -+ if (!strcmp(name, "imx6dl-wandboard-revd1")) - return 0; - } - -diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig -index 82e517b90f..ee70758f3a 100644 ---- a/configs/wandboard_defconfig -+++ b/configs/wandboard_defconfig -@@ -46,8 +46,8 @@ CONFIG_CMD_BMP=y - CONFIG_CMD_CACHE=y - CONFIG_CMD_EXT4_WRITE=y - CONFIG_OF_CONTROL=y --CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revb1" --CONFIG_OF_LIST="imx6q-wandboard-revb1 imx6qp-wandboard-revd1 imx6dl-wandboard-revb1" -+CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" -+CONFIG_OF_LIST="imx6q-wandboard-revd1 imx6qp-wandboard-revd1 imx6dl-wandboard-revd1" - CONFIG_MULTI_DTB_FIT=y - CONFIG_ENV_IS_IN_MMC=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - -From patchwork Fri Apr 17 12:27:10 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 1272206 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Fri, 17 Apr 2020 05:26:41 -0700 (PDT) -Received: from localhost.localdomain ([2804:14c:482:271:a8cc:37bd:62f6:da03]) - by smtp.gmail.com with ESMTPSA id - m66sm16997985qkf.42.2020.04.17.05.26.38 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Fri, 17 Apr 2020 05:26:40 -0700 (PDT) -From: Fabio Estevam -To: sbabic@denx.de -Cc: hs@denx.de, derek@ihtfp.com, u-boot@lists.denx.de, - Fabio Estevam -Subject: [PATCH v2 2/5] pmic: pfuze100: Change error message level to debug -Date: Fri, 17 Apr 2020 09:27:10 -0300 -Message-Id: <20200417122713.30574-2-festevam@gmail.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200417122713.30574-1-festevam@gmail.com> -References: <20200417122713.30574-1-festevam@gmail.com> -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -In some cases U-Boot runs the same binary on different board versions. - -In wandboard, for example, there are versions with the PFUZE100 PMIC -populated and others without it. - -When the PMIC is not present, it is not really useful to get PMIC error, -so change the error message level to debug instead. - -Signed-off-by: Fabio Estevam ---- -Changes since v1: -- Reworded the commit log for clarity - - drivers/power/pmic/pfuze100.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c -index 6cf5f35f0f..db630f3ad0 100644 ---- a/drivers/power/pmic/pfuze100.c -+++ b/drivers/power/pmic/pfuze100.c -@@ -41,7 +41,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff, - static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len) - { - if (dm_i2c_read(dev, reg, buff, len)) { -- pr_err("read error from device: %p register: %#x!\n", dev, reg); -+ debug("read error from device: %p register: %#x!\n", dev, reg); - return -EIO; - } - - -From patchwork Fri Apr 17 12:27:11 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 1272207 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20161025 header.b=EvnTm2er; dkim-atps=neutral -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 493b7F6VRzz9sR4 - for ; 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- if (reg < 0) { -- printf("pmic_reg_read() ret %d\n", reg); -+ debug("pmic_reg_read() ret %d\n", reg); - return 0; - } - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); - -From patchwork Fri Apr 17 12:27:12 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 1272208 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20161025 header.b=Obn1Ycw6; dkim-atps=neutral -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 493b7d0GvNz9sR4 - for ; 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run finduuid; run distro_bootcmd" - CONFIG_SYS_CONSOLE_IS_IN_ENV=y - CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y - # CONFIG_DISPLAY_BOARDINFO is not set --CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_BOUNCE_BUFFER=y - CONFIG_BOARD_EARLY_INIT_F=y - CONFIG_SPL_SEPARATE_BSS=y - -From patchwork Fri Apr 17 12:27:13 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Fabio Estevam -X-Patchwork-Id: 1272210 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20161025 header.b=kEVeM9Yu; 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-+ gpio_request(REV_DETECTION, "REV_DETECT"); - gpio_direction_input(REV_DETECTION); - - if (gpio_get_value(REV_DETECTION)) -@@ -442,6 +443,14 @@ int board_late_init(void) - env_set("board_name", "B1"); - #endif - setup_iomux_enet(); -+ -+ if (is_revd1()) -+ puts("Board: Wandboard rev D1\n"); -+ else if (is_revc1()) -+ puts("Board: Wandboard rev C1\n"); -+ else -+ puts("Board: Wandboard rev B1\n"); -+ - return 0; - } - -@@ -466,20 +475,6 @@ int board_init(void) - return 0; - } - --int checkboard(void) --{ -- gpio_request(REV_DETECTION, "REV_DETECT"); -- -- if (is_revd1()) -- puts("Board: Wandboard rev D1\n"); -- else if (is_revc1()) -- puts("Board: Wandboard rev C1\n"); -- else -- puts("Board: Wandboard rev B1\n"); -- -- return 0; --} -- - #ifdef CONFIG_SPL_LOAD_FIT - int board_fit_config_name_match(const char *name) - { From 3e0e8cf1f39da0f2aa0afbb602e3ef73803afb30 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 30 Apr 2020 09:04:51 +0100 Subject: [PATCH 084/351] Xilinx ZYNQ now has a single U-Boot for all boards --- arm-boards | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arm-boards b/arm-boards index 19326dc..ec11458 100644 --- a/arm-boards +++ b/arm-boards @@ -137,6 +137,4 @@ warp7 Wexler_TAB7200 Wits_Pro_A20_DKT Yones_Toptech_BS1078_V2 -zynq_microzed -zynq_zed -zynq_zybo +xilinx_zynq_virt From d5c5edbb726592651c9e4bbdc9b2074dc41312af Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 12 May 2020 23:33:51 +0100 Subject: [PATCH 085/351] 2020.07 RC2 --- ...port-for-Raspberry-Pi-4-board-64-bit.patch | 2526 +++++++++++++++ ...ost-support-for-Raspberry-Pi-4-board.patch | 2810 ----------------- aarch64-boards | 1 + ...kchip-rk3399-add-and-enable-rng-node.patch | 863 ----- ...efine-fdtfile-option-for-distro-boot.patch | 14 +- ...ort-for-the-Pinebook-Pro-laptop-from.patch | 6 +- ...-the-DT-provided-by-the-Raspberry-Pi.patch | 36 +- ...pport-for-the-XHCI-controller-on-RPI.patch | 62 + rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch | 40 + sources | 2 +- uboot-tools.spec | 26 +- ...Load-Raspberry-Pi-4-VL805-s-firmware.patch | 361 +++ 12 files changed, 3035 insertions(+), 3712 deletions(-) create mode 100644 USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch delete mode 100644 USB-host-support-for-Raspberry-Pi-4-board.patch delete mode 100644 arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch create mode 100644 rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch create mode 100644 rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch create mode 100644 usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch diff --git a/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch b/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch new file mode 100644 index 0000000..3e76ea9 --- /dev/null +++ b/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch @@ -0,0 +1,2526 @@ +From patchwork Tue May 12 18:47:08 2020 +Content-Type: text/plain; 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+ Tue, 12 May 2020 18:47:40 +0000 (GMT) +From: Sylwester Nawrocki +To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com +Cc: james.quinlan@broadcom.com, nsaenzjulienne@suse.de, sjg@chromium.org, + jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, + Sylwester Nawrocki +Subject: [PATCH v3 1/9] usb: xhci: Add missing cache flush in the scratchpad + array initialization +Date: Tue, 12 May 2020 20:47:08 +0200 +Message-Id: <20200512184716.2869-2-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsWy7djPc7q+73fFGWxeLm2xccZ6VoupPfEW + e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs + HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BEcdmkpOZklqUW6dslcGXc + XfWasWAKZ8XHpQeYGhjPsncxcnJICJhIrF/3BMjm4hASWMEo8fr8L1YI5wujxJmdXcwQzmdG + idPv17PAtNxZtJQRIrGcUWLemw8scC33Vj8EG8wmYCjRe7SPEcQWEQiQuPZzGlgHs8BRRok1 + +/+AjRIWSJbY+GYJmM0ioCpxsucAmM0rYCXx7u4iVoh18hKrNxxgBrE5Bawlrm8+BnaThMAq + dokV/6ZAveEiMXnjaqgGYYlXx7dAxWUk/u+czwTR0Mwo0bP7NjuEM4FR4v7xBYwQVdYSd879 + Yuti5AC6T1Ni/S59EFNCwFHi83MtCJNP4sZbQZBiZiBz0rbpzBBhXomONiGIGSoSv1dNZ4Kw + pSS6n/yHhpaHxIFJu8DOFxLoY5SY9NFzAqP8LIRVCxgZVzGKp5YW56anFhvnpZbrFSfmFpfm + pesl5+duYgSmmtP/jn/dwbjvT9IhRgEORiUe3oj6XXFCrIllxZW5hxglOJiVRHhbMnfGCfGm + JFZWpRblxxeV5qQWH2KU5mBREuc1XvQyVkggPbEkNTs1tSC1CCbLxMEp1cAY8FeRl+/HltTN + X4Xs903RVHy5e6dgqpeg0jm+4OVBkrPvpUVJPnj+KVdkzo41t/PuMjReEPlxUCtyWmyHz103 + rgXPZq0ykbWOfJ3YefagS9XPQu/PB+O5tq6w9/7zm4Vf6+bV1z8qDodnyLT/WPJqT6T6+32H + jgl/27XgeAnrlllibgaZdotvKrEUZyQaajEXFScCAAKlHx8xAwAA +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsVy+t/xu7o+73fFGUxZr2+xccZ6VoupPfEW + e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs + HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BE6dkU5ZeWpCpk5BeX2CpF + G1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GXcXfWasWAKZ8XHpQeYGhjPsncx + cnJICJhI3Fm0lLGLkYtDSGApo8SCbWtZuhg5gBJSEvNblCBqhCX+XOtig6j5xCixZOleFpAE + m4ChRO/RPkYQW0QgROLF0StMIEXMAmcZJRZ1fmAFSQgLJErMbDgGZrMIqEqc7DkA1swrYCXx + 7u4iVogN8hKrNxxgBrE5Bawlrm8+BmYLAdXs+faObQIj3wJGhlWMIqmlxbnpucWGesWJucWl + eel6yfm5mxiBgb/t2M/NOxgvbQw+xCjAwajEw8tQuytOiDWxrLgy9xCjBAezkghvS+bOOCHe + lMTKqtSi/Pii0pzU4kOMpkBHTWSWEk3OB0ZlXkm8oamhuYWlobmxubGZhZI4b4fAwRghgfTE + ktTs1NSC1CKYPiYOTqkGRvHA5utdDK+71Gc8yncU/Jl1s8GwlfnWtf/fvVcf2j1n1dGNJtMn + +bzXEb/JdkYl/OLZA3Vvo7aKLFyzg7Gsd9N+h4PpR6bHn7zJ79VRWnHmnV1WVtDq6BmPbh3d + 8qTxqqDqXif96Ra5p80yGxK5+NgP7Gd22F52neeB/7I+A4//v1Y946i/MFmJpTgj0VCLuag4 + EQDJGyeQkgIAAA== +X-CMS-MailID: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 +X-Msg-Generator: CA +X-RootMTR: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 +References: <20200512184716.2869-1-s.nawrocki@samsung.com> + +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +In current code there is no cache flush after initializing the scratchpad +buffer array with the scratchpad buffer pointers. This leads to a failure +of the "slot enable" command on the rpi4 board (Broadcom STB PCIe +controller + VL805 USB hub) - the very first TRB transfer on the command +ring fails and there is a timeout while waiting for the command completion +event. After adding the missing cache flush everything seems to be working +as expected. + +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Bin Meng +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v1: + - none. +--- + drivers/usb/host/xhci-mem.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index 93450ee..729bdc3 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -393,6 +393,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + scratchpad->sp_array[i] = cpu_to_le64(ptr); + } + ++ xhci_flush_cache((uintptr_t)scratchpad->sp_array, ++ sizeof(u64) * num_sp); ++ + return 0; + + fail_sp3: + +From patchwork Tue May 12 18:47:09 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1288726 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Tue, 12 May 2020 18:47:43 +0000 (GMT) +From: Sylwester Nawrocki +To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com +Cc: james.quinlan@broadcom.com, nsaenzjulienne@suse.de, sjg@chromium.org, + jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, + Sylwester Nawrocki , Sergey Temerkhanov + +Subject: [PATCH v3 2/9] usb: xhci: Use only 32-bit accesses in + xhci_writeq/xhci_readq +Date: Tue, 12 May 2020 20:47:09 +0200 +Message-Id: <20200512184716.2869-3-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRju2845O5qL05R8M8EYRRhecdQhLylJnh8ikpJSNFt5UPHappb1 + Q0NZzjuJGou8NGyhpKlrOW95NxLTJE1KUcMyRQu1RTPRnEfr3/M+l/d9+PhIvqgatyNjEpJZ + eYIsTkxYYvp+07Bz8I8WqVtrhxfd8KAep0vyIuj2pUKCnlhX4vSz3ikBvaS8i+jK4jmc1qu1 + BN2zdA+nq9UdAvqXTo/o5XaVwNeKUU8PEczDjHcYU65+jTEG9ZSAGZpsRkyBrgYx9boxjGka + vBNMXrL0imTjYlJZuavPVctoQ3EVnrRG3VrJ1hAZaFaYgyxIoCSge1mO5yBLUkQ9RfBdtUhw + w08Ekwuju8MaAlONUrAXaVQqESdoETR8LOH9i+hqX/DMLoJyh/y+AmTGNlQwjJtKdxJ8yojg + Te4IZhasqTBQjc4SZoxRx0G7odkJC6kz8HWwA+POOUDt806+GVtQnvChqZ9vXgRUnQDaCvMJ + zuQPBqMK57A1LA7odrvaw5ahgscFMhHktX4ScEMRgumBSsS5PGHy7fr2JnK7nyPUt7hytB9U + /NbzzDRQB2Bi+aCZ5m/D+/oyPkcLIVsp4tzH4E9NGY/DdpA7t7Xbn4G1vjoB90IFCDK7THgR + clD/P1aJUA2yZVMU8VGswiOBvemikMUrUhKiXK4nxjei7c8zuDlgbEYdG9e6EUUisZUwPL1F + KsJlqYq0+G4EJF9sI8yKMUhFwkhZ2m1WnhghT4ljFd3oCImJbYUejxeuiKgoWTIby7JJrHxP + 5ZEWdhno9GbOeQf7Vl+Jk8nnRLVIMhTnGHaoR+Kq6kppqzi7fMF7ZSKwp9d/3njKu0UyrZUG + Tc84TXaFfjOi1dHQi/OJY5rxG6VPqoZfHVWpIoICwvcHhkCAW2Rr+8RI+rBGmV13+Zzmi/Oj + GTj8WYhQFa/Or3a1d19tQ2xI5/ssqU2BGFNEy9xP8uUK2V8p3t8YOAMAAA== +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmphkeLIzCtJLcpLzFFi42I5/e/4XV3/97viDHb26llsnLGe1WJqT7zF + 3jf9bBY3frWxWqw9cpfd4k1bI6PFgslPWC22zVrOZnH4TTurxdJZ+9gtvm3Zxmjxdm8nuwOP + x6z7Z9k8ZjdcZPGYN+sEi8fOWXfZPc7e2cHo0bdlFaPH+i1XWTw2n64O4IjSsynKLy1JVcjI + Ly6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3s0lJzcksSy3St0vQy9g5eSFrwWeBio8di9ka + GB/ydjFyckgImEhsamtj7GLk4hASWMoosWrtQiCHAyghJTG/RQmiRljiz7UuNoiaT4wSjVff + soAk2AQMJXqP9jGC2CICIRIvjl5hAiliFvjLKDGp9QkrSEJYIFTi7tP5YDaLgKrE8j+LmUBs + XgEriWen97FAbJCXWL3hADOIzSlgLXF98zEwWwioZs+3d2wTGPkWMDKsYhRJLS3OTc8tNtQr + TswtLs1L10vOz93ECIyBbcd+bt7BeGlj8CFGAQ5GJR5ehtpdcUKsiWXFlbmHGCU4mJVEeFsy + d8YJ8aYkVlalFuXHF5XmpBYfYjQFOmois5Rocj4wPvNK4g1NDc0tLA3Njc2NzSyUxHk7BA7G + CAmkJ5akZqemFqQWwfQxcXBKNTB6nbS75KLLcXaSEefxVQuf7fj8f9bj7/+W83UdTBPtbEo9 + LXT2+/znb9WWx/X7dl++fTu/uqBaPixV8t3/v6YG/SXmdQ/NeHqaT3MnmTe3rbNZkZFrr1IY + y//PRYDVYEtvSsrjr8UK0VdCpk42XPb0vaNeRErYDM4ZZm4ajV3LF4k56rzcN0uJpTgj0VCL + uag4EQCTL19flwIAAA== +X-CMS-MailID: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 +X-Msg-Generator: CA +X-RootMTR: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 +References: <20200512184716.2869-1-s.nawrocki@samsung.com> + +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +There might be hardware configurations where 64-bit data accesses +to XHCI registers are not supported properly. This patch removes +the readq/writeq so always two 32-bit accesses are used to read/write +64-bit XHCI registers, similarly as it is done in Linux kernel. + +This patch fixes operation of the XHCI controller on RPI4 Broadcom +BCM2711 SoC based board, where the VL805 USB XHCI controller is +connected to the PCIe Root Complex, which is attached to the system +through the SCB bridge. + +Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely +the 64-bit wide register accesses initiated by the CPU are not properly +translated to a sequence of 32-bit PCIe accesses. +xhci_readq(), for example, always returns same value in upper and lower +32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234. + +Cc: Sergey Temerkhanov +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Bin Meng +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v1: + - none. +Changes since RFC: + - dropped Kconfig option, switched to not using readq/writeq + unconditionally. +--- + include/usb/xhci.h | 8 -------- + 1 file changed, 8 deletions(-) + +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index 6017504..c16106a 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -1111,28 +1111,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) + */ + static inline u64 xhci_readq(__le64 volatile *regs) + { +-#if BITS_PER_LONG == 64 +- return readq(regs); +-#else + __u32 *ptr = (__u32 *)regs; + u64 val_lo = readl(ptr); + u64 val_hi = readl(ptr + 1); + return val_lo + (val_hi << 32); +-#endif + } + + static inline void xhci_writeq(__le64 volatile *regs, const u64 val) + { +-#if BITS_PER_LONG == 64 +- writeq(val, regs); +-#else + __u32 *ptr = (__u32 *)regs; + u32 val_lo = lower_32_bits(val); + /* FIXME */ + u32 val_hi = upper_32_bits(val); + writel(val_lo, ptr); + writel(val_hi, ptr + 1); +-#endif + } + + int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, + +From patchwork Tue May 12 18:47:10 2020 +Content-Type: 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b.zolnierkie@samsung.com, + Sylwester Nawrocki +Subject: [PATCH v3 3/9] pci: Move some PCIe register offset definitions to a + common header +Date: Tue, 12 May 2020 20:47:10 +0200 +Message-Id: <20200512184716.2869-4-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprDKsWRmVeSWpSXmKPExsWy7djPc7oh73fFGTw6rm2xccZ6VoupPfEW + e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs + HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BEcdmkpOZklqUW6dslcGVM + nqNYMF2y4vHC/4wNjM9Euhg5OSQETCSm/ZvDDmILCaxglOjZH9DFyAVkf2GUeLzoMzuE85lR + ou/UDXaYjlM9R1khEssZJQ4+P8UK0Q7Usmy+B4jNJmAo0Xu0jxHEFhEIkLj2cxojSAOzwFFG + iTX7/7CAJIQFYiTO77/MBGKzCKhKTL1xBKyBV8BKYs3S12wQ2+QlVm84wAxicwpYS1zffIwZ + ZJCEwDJ2iVW7F0Kd5CKx79h1RghbWOLV8S1QcRmJ/zvnM0E0NAM9t/s2O4QzgVHi/vEFUB3W + EnfO/QJaxwF0n6bE+l36EGFHiemPdoCFJQT4JG68FQQJMwOZk7ZNZ4YI80p0tAlBVKtI/F41 + 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0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Some PCI Express register offsets are currently defined in multiple +drivers, move them to a common header to avoid re-definitions and +as a pre-requisite for adding new PCIe driver. +While at it replace some spaces with tabs. + +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Bin Meng +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v1: + - none. +Changes since RFC: + - whitespace clean up. +--- + drivers/pci/pci-rcar-gen3.c | 8 -------- + drivers/pci/pcie_intel_fpga.c | 3 --- + include/pci.h | 13 +++++++++++-- + 3 files changed, 11 insertions(+), 13 deletions(-) + +diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c +index 30eff67..393f1c9 100644 +--- a/drivers/pci/pci-rcar-gen3.c ++++ b/drivers/pci/pci-rcar-gen3.c +@@ -117,14 +117,6 @@ + #define RCAR_PCI_MAX_RESOURCES 4 + #define MAX_NR_INBOUND_MAPS 6 + +-#define PCI_EXP_FLAGS 2 /* Capabilities register */ +-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ +-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ +-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ +- + enum { + RCAR_PCI_ACCESS_READ, + RCAR_PCI_ACCESS_WRITE, +diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c +index 6a9f29c..69363a0 100644 +--- a/drivers/pci/pcie_intel_fpga.c ++++ b/drivers/pci/pcie_intel_fpga.c +@@ -65,9 +65,6 @@ + #define IS_ROOT_PORT(pcie, bdf) \ + ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) + +-#define PCI_EXP_LNKSTA 18 /* Link Status */ +-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ +- + /** + * struct intel_fpga_pcie - Intel FPGA PCIe controller state + * @bus: Pointer to the PCI bus +diff --git a/include/pci.h b/include/pci.h +index aff56b2..dfdbb32 100644 +--- a/include/pci.h ++++ b/include/pci.h +@@ -471,10 +471,19 @@ + #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ + + /* PCI Express capabilities */ ++#define PCI_EXP_FLAGS 2 /* Capabilities register */ ++#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ ++#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ + #define PCI_EXP_DEVCAP 4 /* Device capabilities */ +-#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ ++#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ + #define PCI_EXP_DEVCTL 8 /* Device Control */ +-#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ ++#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ ++#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ ++#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ ++#define PCI_EXP_LNKSTA 18 /* Link Status */ ++#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ ++#define 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+List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +Remove the overlap between DRAM and device's IO area. + +Signed-off-by: Marek Szyprowski +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v1: + - none. +--- + arch/arm/mach-bcm283x/init.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 9966d6c..4295356 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -38,7 +38,7 @@ static struct mm_region bcm2711_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +- .size = 0xfe000000UL, ++ .size = 0xfc000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + +From patchwork Tue May 12 18:47:12 2020 +Content-Type: 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b.zolnierkie@samsung.com, + Sylwester Nawrocki +Subject: [PATCH v3 5/9] rpi4: add a mapping for the PCIe XHCI controller + MMIO registers (ARM 64bit) +Date: Tue, 12 May 2020 20:47:12 +0200 +Message-Id: <20200512184716.2869-6-s.nawrocki@samsung.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> +X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprPKsWRmVeSWpSXmKPExsWy7djP87r173fFGXxfxWKxccZ6VoupPfEW + e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs + HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BEcdmkpOZklqUW6dslcGV8 + WriNvWCTYMWOfbvYGxgX8HUxcnJICJhITDy4ka2LkYtDSGAFo0TT213MEM4XRokzu3YwQjif + GSXajuxjg2npnd7MBJFYzihx7fJ5FriWpYe+M4NUsQkYSvQe7WMEsUUEAiSu/ZwGNopZ4Cij + xJr9f1hAEsICqRKNrx6CjWURUJX4Nm82WJxXwEriSu8/qHXyEqs3HAAbyilgLXF98zFmiPgy + domli0UgbBeJ39tnM0HYwhKvjm9hh7BlJP7vnA92qoRAM6NEz+7b7BDOBEaJ+8cXMEJUWUvc + OfcLaBsH0HmaEut36UOEHSWWbO5iBQlLCPBJ3HgrCBJmBjInbZvODBHmlehoE4KoVpH4vWo6 + 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0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Marek Szyprowski + +Create a non-cacheable mapping for the 0x600000000 physical memory region, +where MMIO registers for the PCIe XHCI controller are instantiated by the +PCIe bridge. + +Signed-off-by: Marek Szyprowski +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v2: + - fixed typo MAX_MAP_MAX_ENTRIES -> MEM_MAP_MAX_ENTRIES +Changes since v1: + - none. +--- + arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++--- + 1 file changed, 15 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 4295356..9f5bca3 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -11,10 +11,15 @@ + #include + #include + ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL ++ + #ifdef CONFIG_ARM64 + #include + +-static struct mm_region bcm283x_mem_map[] = { ++#define MEM_MAP_MAX_ENTRIES (4) ++ ++static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -34,7 +39,7 @@ static struct mm_region bcm283x_mem_map[] = { + } + }; + +-static struct mm_region bcm2711_mem_map[] = { ++static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, +@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = { + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { ++ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, ++ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, ++ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { + /* List terminator */ + 0, + } +@@ -71,7 +83,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) + { + int i; + +- for (i = 0; i < 2; i++) { ++ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) { + mem_map[i].virt = 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+ +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +From: Nicolas Saenz Julienne + +Imports Al Viro's original Linux commit 00b0c9b82663a, which contains +an in depth explanation and two fixes from Johannes Berg: + e7d4a95da86e0 "bitfield: fix *_encode_bits()", + 37a3862e12382 "bitfield: add u8 helpers". + +Signed-off-by: Nicolas Saenz Julienne +[s.nawrocki: added empty lines between functions and macros] +Signed-off-by: Sylwester Nawrocki +--- +Changes since v1: + - added empty lines between functions and macros. + +Changes since RFC: + - new patch. +--- + include/linux/bitfield.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 50 insertions(+) + +diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h +index 8b9d6ff..7acba4c 100644 +--- a/include/linux/bitfield.h ++++ b/include/linux/bitfield.h +@@ -103,4 +103,54 @@ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + ++extern void __compiletime_error("value doesn't fit into mask") ++__field_overflow(void); ++extern void __compiletime_error("bad bitfield mask") ++__bad_mask(void); ++static __always_inline u64 field_multiplier(u64 field) ++{ ++ if ((field | (field - 1)) & ((field | (field - 1)) + 1)) ++ __bad_mask(); ++ return field & -field; ++} ++static __always_inline u64 field_mask(u64 field) ++{ ++ return field / field_multiplier(field); ++} ++ ++#define ____MAKE_OP(type,base,to,from) \ ++static __always_inline __##type type##_encode_bits(base v, base field) \ ++{ \ ++ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ ++ __field_overflow(); \ ++ return to((v & field_mask(field)) * field_multiplier(field)); \ ++} \ ++static __always_inline __##type type##_replace_bits(__##type old, \ ++ base val, base field) \ ++{ \ ++ return (old & ~to(field)) | type##_encode_bits(val, field); \ ++} \ ++static __always_inline void type##p_replace_bits(__##type *p, \ ++ base val, base field) \ ++{ \ ++ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ ++} \ ++static __always_inline base type##_get_bits(__##type v, base field) \ ++{ \ ++ return (from(v) & field)/field_multiplier(field); \ ++} ++ ++#define __MAKE_OP(size) \ ++ ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \ ++ ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \ ++ ____MAKE_OP(u##size,u##size,,) ++ ++____MAKE_OP(u8,u8,,) ++__MAKE_OP(16) ++__MAKE_OP(32) ++__MAKE_OP(64) ++ ++#undef __MAKE_OP ++#undef ____MAKE_OP ++ + #endif + +From patchwork Tue May 12 18:47:14 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1288733 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender 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+X-CMS-MailID: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 +X-Msg-Generator: CA +X-RootMTR: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 +References: <20200512184716.2869-1-s.nawrocki@samsung.com> + +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Add PCI Express capability definitions required by the Broadcom +STB PCIe controller driver. + +Signed-off-by: Sylwester Nawrocki +Reviewed-by: Bin Meng +Reviewed-by: Nicolas Saenz Julienne +--- +Changes since v2: + - added Current Link Speed defines. +Changes since v1: + - none. +Changes since RFC: + - ensure the entries are added in order, sorted by ascending + address values. +--- + include/pci.h | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/include/pci.h b/include/pci.h +index dfdbb32..ff5f620 100644 +--- a/include/pci.h ++++ b/include/pci.h +@@ -479,11 +479,20 @@ + #define PCI_EXP_DEVCTL 8 /* Device Control */ + #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ + #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ ++#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ ++#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ + #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ + #define PCI_EXP_LNKSTA 18 /* Link Status */ ++#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ ++#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ ++#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ ++#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ ++#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ ++#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ + #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ + #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ + #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ ++#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ + + /* Include the ID list */ + + +From patchwork Tue May 12 18:47:15 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1288734 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none 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20200512184838eucas1p249588f9ee76dcb5a10209fcb7de01fae +References: <20200512184716.2869-1-s.nawrocki@samsung.com> + +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +This patch adds basic driver PCI Express controller found on Broadcom +set-top-box SoCs, e.g. BCM2711. +The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI +handling removed. The inbound access memory region is not currently +parsed from dma-ranges DT property and a fixed 3GB region is used. + +The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805 +USB Host Controller. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Sylwester Nawrocki +--- +Changes since v2: + - removed MDO_RD_DONE, MDIO_WT_DONE macro definitions, + - updated the Kconfig entry help text, + - reordered #include entries to match the coding style, + - s/udev/dev, + - s/ENODEV/EINVAL in brcm_pcie_probe() and brcm_pcie_config_address() + functions, + - Simplified brcm_pcie_mdio_{read, write} functions (readl_poll_timeout), + - shortened register bit fields macro definitions, + - dropped brcm_pcie_perst_set() and brcm_pcie_bridge_sw_init_set() + function in favour of direct clrbits_le32/setbits_le32 calls, + - use setbits_le32/clrbits_le32/clrsetbits_le32 instead of + readl(), u32p_replace_bits(), writel() sequence + - simplified brcm_pcie_config_address(), brcm_pcie_set_gen() functions, + - changed reset pulse delay to 100 us, + - Replaced FIELD_GET() with open coded bitwise operations, + - brcm_cpie_cfg_index() function merged into brcm_pcie_config_address(), + - use standard PCI PCI_EXP_LNKSTA_CLS_* link speed defines + - added kernel-doc function comments. + +Changes since v1: + - fixed argument in brcm_pcie_set_ssc() function call, + - changed rc_bar2_size assignment to value 0xC0000000, as in upstream + devicetree. +Changes since RFC: + - reworked to align with current Linux mainline version and u-boot + driver by Nicolas Saenz Julienne. +--- + drivers/pci/Kconfig | 9 + + drivers/pci/Makefile | 1 + + drivers/pci/pcie_brcmstb.c | 623 +++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 633 insertions(+) + create mode 100644 drivers/pci/pcie_brcmstb.c + +diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig +index 437cd9a..543bd46 100644 +--- a/drivers/pci/Kconfig ++++ b/drivers/pci/Kconfig +@@ -197,4 +197,13 @@ config PCIE_MEDIATEK + Say Y here if you want to enable Gen2 PCIe controller, + which could be found on MT7623 SoC family. + ++config PCI_BRCMSTB ++ bool "Broadcom STB PCIe controller" ++ depends on DM_PCI ++ depends on ARCH_BCM283X ++ help ++ Say Y here if you want to enable support for PCIe controller ++ on Broadcom set-top-box (STB) SoCs. ++ This driver currently supports only BCM2711 SoC and RC mode ++ of the controller. + endif +diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile +index c051ecc..3e53b1f 100644 +--- a/drivers/pci/Makefile ++++ b/drivers/pci/Makefile +@@ -43,3 +43,4 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o + obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o + obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o + obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o ++obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +new file mode 100644 +index 0000000..dade79e +--- /dev/null ++++ b/drivers/pci/pcie_brcmstb.c +@@ -0,0 +1,623 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Broadcom STB PCIe controller driver ++ * ++ * Copyright (C) 2020 Samsung Electronics Co., Ltd. ++ * ++ * Based on upstream Linux kernel driver: ++ * drivers/pci/controller/pcie-brcmstb.c ++ * Copyright (C) 2009 - 2017 Broadcom ++ * ++ * Based driver by Nicolas Saenz Julienne ++ * Copyright (C) 2020 Nicolas Saenz Julienne ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Offset of the mandatory PCIe capability config registers */ ++#define BRCM_PCIE_CAP_REGS 0x00ac ++ ++/* The PCIe controller register offsets */ ++#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1 0x0188 ++#define VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc ++#define VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN 0x0 ++ ++#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c ++#define CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff ++ ++#define PCIE_RC_DL_MDIO_ADDR 0x1100 ++#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 ++#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 ++ ++#define PCIE_MISC_MISC_CTRL 0x4008 ++#define MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 ++#define MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 ++#define MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 ++#define MISC_CTRL_MAX_BURST_SIZE_128 0x0 ++#define MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c ++#define PCIE_MEM_WIN0_LO(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 ++#define PCIE_MEM_WIN0_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) ++ ++#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c ++#define RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f ++ ++#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 ++#define RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 ++ ++#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c ++#define RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f ++ ++#define PCIE_MISC_PCIE_STATUS 0x4068 ++#define STATUS_PCIE_PORT_MASK 0x80 ++#define STATUS_PCIE_PORT_SHIFT 7 ++#define STATUS_PCIE_DL_ACTIVE_MASK 0x20 ++#define STATUS_PCIE_DL_ACTIVE_SHIFT 5 ++#define STATUS_PCIE_PHYLINKUP_MASK 0x10 ++#define STATUS_PCIE_PHYLINKUP_SHIFT 4 ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 ++#define MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 ++#define MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 ++#define MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT 12 ++#define PCIE_MEM_WIN0_BASE_LIMIT(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 ++#define MEM_WIN0_BASE_HI_BASE_MASK 0xff ++#define PCIE_MEM_WIN0_BASE_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 ++#define PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff ++#define PCIE_MEM_WIN0_LIMIT_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) ++ ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 ++#define PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 ++#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 ++ ++#define PCIE_MSI_INTR2_CLR 0x4508 ++#define PCIE_MSI_INTR2_MASK_SET 0x4510 ++ ++#define PCIE_EXT_CFG_DATA 0x8000 ++ ++#define PCIE_EXT_CFG_INDEX 0x9000 ++#define PCIE_EXT_BUSNUM_SHIFT 20 ++#define PCIE_EXT_SLOT_SHIFT 15 ++#define PCIE_EXT_FUNC_SHIFT 12 ++ ++#define PCIE_RGR1_SW_INIT_1 0x9210 ++#define RGR1_SW_INIT_1_PERST_MASK 0x1 ++#define RGR1_SW_INIT_1_INIT_MASK 0x2 ++ ++/* PCIe parameters */ ++#define BRCM_NUM_PCIE_OUT_WINS 4 ++ ++/* MDIO registers */ ++#define MDIO_PORT0 0x0 ++#define MDIO_DATA_MASK 0x7fffffff ++#define MDIO_DATA_SHIFT 0 ++#define MDIO_PORT_MASK 0xf0000 ++#define MDIO_PORT_SHIFT 16 ++#define MDIO_REGAD_MASK 0xffff ++#define MDIO_REGAD_SHIFT 0 ++#define MDIO_CMD_MASK 0xfff00000 ++#define MDIO_CMD_SHIFT 20 ++#define MDIO_CMD_READ 0x1 ++#define MDIO_CMD_WRITE 0x0 ++#define MDIO_DATA_DONE_MASK 0x80000000 ++#define SSC_REGS_ADDR 0x1100 ++#define SET_ADDR_OFFSET 0x1f ++#define SSC_CNTL_OFFSET 0x2 ++#define SSC_CNTL_OVRD_EN_MASK 0x8000 ++#define SSC_CNTL_OVRD_VAL_MASK 0x4000 ++#define SSC_STATUS_OFFSET 0x1 ++#define SSC_STATUS_SSC_MASK 0x400 ++#define SSC_STATUS_SSC_SHIFT 10 ++#define SSC_STATUS_PLL_LOCK_MASK 0x800 ++#define SSC_STATUS_PLL_LOCK_SHIFT 11 ++ ++/** ++ * struct brcm_pcie - the PCIe controller state ++ * @base: Base address of memory mapped IO registers of the controller ++ * @gen: Non-zero value indicates limitation of the PCIe controller operation ++ * to a specific generation (1, 2 or 3) ++ * @ssc: true indicates active Spread Spectrum Clocking operation ++ */ ++struct brcm_pcie { ++ void __iomem *base; ++ ++ int gen; ++ bool ssc; ++}; ++ ++/** ++ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size ++ * @size: The inbound region size ++ * ++ * This function converts size of the inbound "BAR" region to the non-linear ++ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field. ++ * ++ * Return: The encoded inbound region size ++ */ ++static int brcm_pcie_encode_ibar_size(u64 size) ++{ ++ int log2_in = ilog2(size); ++ ++ if (log2_in >= 12 && log2_in <= 15) ++ /* Covers 4KB to 32KB (inclusive) */ ++ return (log2_in - 12) + 0x1c; ++ else if (log2_in >= 16 && log2_in <= 37) ++ /* Covers 64KB to 32GB, (inclusive) */ ++ return log2_in - 15; ++ ++ /* Something is awry so disable */ ++ return 0; ++} ++ ++/** ++ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode ++ * @pcie: Pointer to the PCIe controller state ++ * ++ * The controller is capable of serving in both RC and EP roles. ++ * ++ * Return: true for RC mode, false for EP mode. ++ */ ++static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) ++{ ++ u32 val; ++ ++ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); ++ ++ return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT; ++} ++ ++/** ++ * brcm_pcie_link_up() - Check whether the PCIe link is up ++ * @pcie: Pointer to the PCIe controller state ++ * ++ * Return: true if the link is up, false otherwise. ++ */ ++static bool brcm_pcie_link_up(struct brcm_pcie *pcie) ++{ ++ u32 val, dla, plu; ++ ++ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); ++ dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT; ++ plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT; ++ ++ return dla && plu; ++} ++ ++static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf, ++ uint offset, void **paddress) ++{ ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ unsigned int pci_bus = PCI_BUS(bdf); ++ unsigned int pci_dev = PCI_DEV(bdf); ++ unsigned int pci_func = PCI_FUNC(bdf); ++ int idx; ++ ++ /* ++ * Busses 0 (host PCIe bridge) and 1 (its immediate child) ++ * are limited to a single device each ++ */ ++ if (pci_bus < 2 && pci_dev > 0) ++ return -EINVAL; ++ ++ /* Accesses to the RC go right to the RC registers */ ++ if (pci_bus == 0) { ++ *paddress = pcie->base + offset; ++ return 0; ++ } ++ ++ /* For devices, write to the config space index register */ ++ idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT) ++ | (pci_dev << PCIE_EXT_SLOT_SHIFT) ++ | (pci_func << PCIE_EXT_FUNC_SHIFT); ++ ++ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); ++ *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset; ++ ++ return 0; ++} ++ ++static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, ++ uint offset, ulong *valuep, ++ enum pci_size_t size) ++{ ++ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address, ++ bdf, offset, valuep, size); ++} ++ ++static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf, ++ uint offset, ulong value, ++ enum pci_size_t size) ++{ ++ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address, ++ bdf, offset, value, size); ++} ++ ++static const char *link_speed_to_str(unsigned int cls) ++{ ++ switch (cls) { ++ case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5"; ++ case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0"; ++ case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0"; ++ default: ++ break; ++ } ++ ++ return "??"; ++} ++ ++static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad, ++ unsigned int cmd) ++{ ++ u32 pkt; ++ ++ pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK; ++ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK; ++ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK; ++ ++ return pkt; ++} ++ ++/** ++ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus ++ * @base: Pointer to the PCIe controller IO registers ++ * @port: The MDIO port number ++ * @regad: The register address ++ * @val: A pointer at which to store the read value ++ * ++ * Return: 0 on success and register value in @val, negative error value ++ * on failure. ++ */ ++static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port, ++ unsigned int regad, u32 *val) ++{ ++ u32 data, addr; ++ int ret; ++ ++ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ); ++ writel(addr, base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ ++ ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data, ++ (data & MDIO_DATA_DONE_MASK), 100); ++ ++ *val = data & MDIO_DATA_MASK; ++ ++ return ret; ++} ++ ++/** ++ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus ++ * @base: Pointer to the PCIe controller IO registers ++ * @port: The MDIO port number ++ * @regad: Address of the register ++ * @wrdata: The value to write ++ * ++ * Return: 0 on success, negative error value on failure. ++ */ ++static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port, ++ unsigned int regad, u16 wrdata) ++{ ++ u32 data, addr; ++ ++ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE); ++ writel(addr, base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); ++ ++ return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data, ++ !(data & MDIO_DATA_DONE_MASK), 100); ++} ++ ++/** ++ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking ++ * @base: pointer to the PCIe controller IO registers ++ * ++ * Return: 0 on success, negative error value on failure. ++ */ ++static int brcm_pcie_set_ssc(void __iomem *base) ++{ ++ int pll, ssc; ++ int ret; ++ u32 tmp; ++ ++ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET, ++ SSC_REGS_ADDR); ++ if (ret < 0) ++ return ret; ++ ++ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK); ++ ++ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp); ++ if (ret < 0) ++ return ret; ++ ++ udelay(1000); ++ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT; ++ pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT; ++ ++ return ssc && pll ? 0 : -EIO; ++} ++ ++/** ++ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3) ++ * @pcie: pointer to the PCIe controller state ++ * @gen: PCIe generation to limit the controller's operation to ++ */ ++static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen) ++{ ++ void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS; ++ ++ u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2); ++ u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP); ++ ++ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; ++ writel(lnkcap, cap_base + PCI_EXP_LNKCAP); ++ ++ lnkctl2 = (lnkctl2 & ~0xf) | gen; ++ writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2); ++} ++ ++static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, ++ unsigned int win, u64 phys_addr, ++ u64 pcie_addr, u64 size) ++{ ++ void __iomem *base = pcie->base; ++ u32 phys_addr_mb_high, limit_addr_mb_high; ++ phys_addr_t phys_addr_mb, limit_addr_mb; ++ int high_addr_shift; ++ u32 tmp; ++ ++ /* Set the base of the pcie_addr window */ ++ writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win)); ++ writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win)); ++ ++ /* Write the addr base & limit lower bits (in MBs) */ ++ phys_addr_mb = phys_addr / SZ_1M; ++ limit_addr_mb = (phys_addr + size - 1) / SZ_1M; ++ ++ tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win)); ++ u32p_replace_bits(&tmp, phys_addr_mb, ++ MEM_WIN0_BASE_LIMIT_BASE_MASK); ++ u32p_replace_bits(&tmp, limit_addr_mb, ++ MEM_WIN0_BASE_LIMIT_LIMIT_MASK); ++ writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win)); ++ ++ /* Write the cpu & limit addr upper bits */ ++ high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT; ++ phys_addr_mb_high = phys_addr_mb >> high_addr_shift; ++ tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win)); ++ u32p_replace_bits(&tmp, phys_addr_mb_high, ++ MEM_WIN0_BASE_HI_BASE_MASK); ++ writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win)); ++ ++ limit_addr_mb_high = limit_addr_mb >> high_addr_shift; ++ tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win)); ++ u32p_replace_bits(&tmp, limit_addr_mb_high, ++ PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK); ++ writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win)); ++} ++ ++static int brcm_pcie_probe(struct udevice *dev) ++{ ++ struct udevice *ctlr = pci_get_controller(dev); ++ struct pci_controller *hose = dev_get_uclass_priv(ctlr); ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ void __iomem *base = pcie->base; ++ bool ssc_good = false; ++ int num_out_wins = 0; ++ u64 rc_bar2_offset, rc_bar2_size; ++ unsigned int scb_size_val; ++ int i, ret; ++ u16 nlw, cls, lnksta; ++ u32 tmp; ++ ++ /* ++ * Reset the bridge, assert the fundamental reset. Note for some SoCs, ++ * e.g. BCM7278, the fundamental reset should not be asserted here. ++ * This will need to be changed when support for other SoCs is added. ++ */ ++ setbits_le32(base + PCIE_RGR1_SW_INIT_1, ++ RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK); ++ /* ++ * The delay is a safety precaution to preclude the reset signal ++ * from looking like a glitch. ++ */ ++ udelay(100); ++ ++ /* Take the bridge out of reset */ ++ clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); ++ ++ clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, ++ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); ++ ++ /* Wait for SerDes to be stable */ ++ udelay(100); ++ ++ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ ++ clrsetbits_le32(base + PCIE_MISC_MISC_CTRL, ++ MISC_CTRL_MAX_BURST_SIZE_MASK, ++ MISC_CTRL_SCB_ACCESS_EN_MASK | ++ MISC_CTRL_CFG_READ_UR_MODE_MASK | ++ MISC_CTRL_MAX_BURST_SIZE_128); ++ /* ++ * TODO: When support for other SoCs than BCM2711 is added we may ++ * need to use the base address and size(s) provided in the dma-ranges ++ * property. ++ */ ++ rc_bar2_offset = 0; ++ rc_bar2_size = 0xc0000000; ++ ++ tmp = lower_32_bits(rc_bar2_offset); ++ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), ++ RC_BAR2_CONFIG_LO_SIZE_MASK); ++ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); ++ writel(upper_32_bits(rc_bar2_offset), ++ base + PCIE_MISC_RC_BAR2_CONFIG_HI); ++ ++ scb_size_val = rc_bar2_size ? ++ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */ ++ ++ tmp = readl(base + PCIE_MISC_MISC_CTRL); ++ u32p_replace_bits(&tmp, scb_size_val, ++ MISC_CTRL_SCB0_SIZE_MASK); ++ writel(tmp, base + PCIE_MISC_MISC_CTRL); ++ ++ /* Disable the PCIe->GISB memory window (RC_BAR1) */ ++ clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO, ++ RC_BAR1_CONFIG_LO_SIZE_MASK); ++ ++ /* Disable the PCIe->SCB memory window (RC_BAR3) */ ++ clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO, ++ RC_BAR3_CONFIG_LO_SIZE_MASK); ++ ++ /* Mask all interrupts since we are not handling any yet */ ++ writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET); ++ ++ /* Clear any interrupts we find on boot */ ++ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR); ++ ++ if (pcie->gen) ++ brcm_pcie_set_gen(pcie, pcie->gen); ++ ++ /* Unassert the fundamental reset */ ++ clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1, ++ RGR1_SW_INIT_1_PERST_MASK); ++ ++ /* Give the RC/EP time to wake up, before trying to configure RC. ++ * Intermittently check status for link-up, up to a total of 100ms. ++ */ ++ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5) ++ mdelay(5); ++ ++ if (!brcm_pcie_link_up(pcie)) { ++ printf("PCIe BRCM: link down\n"); ++ return -EINVAL; ++ } ++ ++ if (!brcm_pcie_rc_mode(pcie)) { ++ printf("PCIe misconfigured; is in EP mode\n"); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < hose->region_count; i++) { ++ struct pci_region *reg = &hose->regions[i]; ++ ++ if (reg->flags != PCI_REGION_MEM) ++ continue; ++ ++ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) ++ return -EINVAL; ++ ++ brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start, ++ reg->bus_start, reg->size); ++ ++ num_out_wins++; ++ } ++ ++ /* ++ * For config space accesses on the RC, show the right class for ++ * a PCIe-PCIe bridge (the default setting is to be EP mode). ++ */ ++ clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3, ++ CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400); ++ ++ if (pcie->ssc) { ++ ret = brcm_pcie_set_ssc(pcie->base); ++ if (!ret) ++ ssc_good = true; ++ else ++ printf("PCIe BRCM: failed attempt to enter SSC mode\n"); ++ } ++ ++ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); ++ cls = lnksta & PCI_EXP_LNKSTA_CLS; ++ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; ++ ++ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls), ++ nlw, ssc_good ? "(SSC)" : "(!SSC)"); ++ ++ /* PCIe->SCB endian mode for BAR */ ++ clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1, ++ VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK, ++ VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN); ++ /* ++ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 ++ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. ++ */ ++ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, ++ PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK); ++ ++ return 0; ++} ++ ++static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ ofnode dn = dev_ofnode(dev); ++ u32 max_link_speed; ++ int ret; ++ ++ /* Get the controller base address */ ++ pcie->base = dev_read_addr_ptr(dev); ++ if (!pcie->base) ++ return -EINVAL; ++ ++ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); ++ ++ ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed); ++ if (ret < 0 || max_link_speed > 4) ++ pcie->gen = 0; ++ else ++ pcie->gen = max_link_speed; ++ ++ return 0; ++} ++ ++static const struct dm_pci_ops brcm_pcie_ops = { ++ .read_config = brcm_pcie_read_config, ++ .write_config = brcm_pcie_write_config, ++}; ++ ++static const struct udevice_id brcm_pcie_ids[] = { ++ { .compatible = "brcm,bcm2711-pcie" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(pcie_brcm_base) = { ++ .name = "pcie_brcm", ++ .id = UCLASS_PCI, ++ .ops = &brcm_pcie_ops, ++ .of_match = brcm_pcie_ids, ++ .probe = brcm_pcie_probe, ++ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, ++ .priv_auto_alloc_size = sizeof(struct brcm_pcie), ++}; + +From patchwork Tue May 12 18:47:16 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sylwester Nawrocki +X-Patchwork-Id: 1288735 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; 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To get it working one has to call the following commands: +"pci enum; usb start;", thus such commands have been added to the default +"preboot" environment variable. One has to update their environment if it +is already configured to get this feature working out of the box. + +Signed-off-by: Marek Szyprowski +Signed-off-by: Sylwester Nawrocki +--- +Changes since v2: + - rpi_4_32b_defconfig, rpi_4_defconfig changes moved to separate + patch +Changes since v1: + - removed unneeded CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY entry. + +Changes since RFC: + - none. +--- + configs/rpi_arm64_defconfig | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index fea86be..f12d1e3 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -7,13 +7,14 @@ CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_USE_PREBOOT=y +-CONFIG_PREBOOT="usb start" ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y +@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_DWC2=y + CONFIG_USB_KEYBOARD=y + CONFIG_USB_HOST_ETHER=y diff --git a/USB-host-support-for-Raspberry-Pi-4-board.patch b/USB-host-support-for-Raspberry-Pi-4-board.patch deleted file mode 100644 index 7e025be..0000000 --- a/USB-host-support-for-Raspberry-Pi-4-board.patch +++ /dev/null @@ -1,2810 +0,0 @@ -From patchwork Tue Apr 21 16:50:51 2020 -Content-Type: text/plain; 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- Tue, 21 Apr 2020 16:51:13 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, - m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki - -Subject: [RFC PATCH 1/9] usb: xhci: Add missing cache flush in the - scratchpad array initialization -Date: Tue, 21 Apr 2020 18:50:51 +0200 -Message-Id: <20200421165059.19394-2-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm2zln5zhbHKfgi1nCMqJMTTM4qN1IbP4Toh8VaqsdVNymbV7z - j5dQ8555w8RZYa2ZaCbiBcXU5S2TQE3TKaZFefkzTacOze2s+vc8z/s8z8v38lGYqJRwoaKV - 8axKKZWL+QK89cP2mGeGuyb8bGndSWZwfA8xbysbCaYsP4KZ2skimIZ+A8msZqUjpvbJEsH0 - rWYTTM7EPmLWuh6RlwWS+eE0QlJTNYhL2qsMpGR0tg1JClt0SNLYMoFL3o2khpK3BIEyVh6d - yKq8L94RRM1V6/G4HCrZ1J9FpqFJfi6iKKD9YPuLay4SUCJai8D4owZxZAPBpmkO48g6grFp - Iy8X2VkTHeM6m+sVgmHNb/JfpGF7E7e4+LQPFOgLkQU70aEwuV1uTWC0BoHZWG4dONIy0OaX - kRaM0yfg5dMVzIKFdACsTG7xuXVuUN/UY9Xt6EAwbFXiliKgi0hI3yi2vSIIXmfIOb8jLA+0 - kBx2hf12DY/zZyLI75whOVKMYH6gFnGuAJj9tGMtwuhT0NjhzclX4KNpCOf6D8PUmoNFxg5g - SWsFxslCyMkScW532NVV2C7kAnlL+ziHJZBeUGc7YxGCrtJFohi5Vf1fVouQDjmzCWpFJKv2 - VbJJXmqpQp2gjPS6F6toRgd/ZWRvYKMNdZjv9iKaQuJDwqmxmnARIU1Upyh6EVCY2EnYtHAg - CWXSlAesKjZClSBn1b3oCIWLnYXnnv8KE9GR0ng2hmXjWNXfKY+yc0lD55dz3ienzrwJDn7s - UPJicdX3+efuozvfpvLOUKb7RRm3/et/ZhcOL+xEDdZc0l4I0HfaDxUbPHljHl4hZuOk4usz - o71upE3f85A8brgaM+8d1u0nModcr69sdg84tha+eyPyuwc/SJu5sTCtunlttNof9FVFtCyp - sLfOdb3Pw1OMq6OkPqcxlVr6Bzy9nkcnAwAA -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMLMWRmVeSWpSXmKPExsVy+t/xu7pNKvPjDE7cEbA4ceUfo8XGGetZ - Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL - x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj9KzKcovLUlVyMgvLrFVija0MNIztLTQMzKx - 1DM0No+1MjJV0rezSUnNySxLLdK3S9DLuDfnKEtBB0fFjyNt7A2M19i6GDk5JARMJHZdWcXY - xcjFISSwlFFi0rUZQA4HUEJKYn6LEkSNsMSfa11g9UICnxglHj5wBLHZBAwleo/2MYLYIgIh - Ei+OXmECmcMMMudPwxtWkDnCAkkSu39yg9SwCKhKLJv9mhnE5hWwlnh97TvUDfISqzccAItz - CthI3P0+gwVil7VEw6UlLBMY+RYwMqxiFEktLc5Nzy021CtOzC0uzUvXS87P3cQIDPBtx35u - 3sF4aWPwIUYBDkYlHt4b5+fFCbEmlhVX5h5ilOBgVhLh3fAQKMSbklhZlVqUH19UmpNafIjR - FOioicxSosn5wOjLK4k3NDU0t7A0NDc2NzazUBLn7RA4GCMkkJ5YkpqdmlqQWgTTx8TBKdXA - 6LTra6plWsQmuwWK045dDM48yj+vtfXqqqSkoqBLwilHPikq2hWa3TbO25/wunvjY6ZD87SD - 2Sr/ON7d9NNMXpLHyiQiOfEn///MTYYno6+0nPnLOJdpR3t9L/8PU0Gh/YXHVzzNn2YzQ/37 - HO6/kmeSvty49tbYRC7kbMl5hcQNLmukTv+pU2Ipzkg01GIuKk4EAE74o8yGAgAA -X-CMS-MailID: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e -X-Msg-Generator: CA -X-RootMTR: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20200421165114eucas1p2baa595b46f7503331ab86163f69b7c0e -References: <20200421165059.19394-1-s.nawrocki@samsung.com> - -X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -In current code there is no cache flush after initializing the scratchpad -buffer array with the scratchpad buffer pointers. This leads to a failure -of the "slot enable" command on the rpi4 board (Broadcom STB PCIe -controller + VL805 USB hub) - the very first TRB transfer on the command -ring fails and there is a timeout while waiting for the command completion -event. After adding the missing cache flush everything seems to be working -as expected. - -Signed-off-by: Sylwester Nawrocki ---- - drivers/usb/host/xhci-mem.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index 93450ee..729bdc3 100644 ---- a/drivers/usb/host/xhci-mem.c -+++ b/drivers/usb/host/xhci-mem.c -@@ -393,6 +393,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - scratchpad->sp_array[i] = cpu_to_le64(ptr); - } - -+ xhci_flush_cache((uintptr_t)scratchpad->sp_array, -+ sizeof(u64) * num_sp); -+ - return 0; - - fail_sp3: - -From patchwork Tue Apr 21 16:50:52 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274444 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Some PCI Express register offsets are currently defined in multiple -drivers, move them to a common header to avoid re-definitions and -as a pre-requisite for adding new PCIe driver. - -Signed-off-by: Sylwester Nawrocki ---- - drivers/pci/pci-rcar-gen3.c | 8 -------- - drivers/pci/pcie_intel_fpga.c | 3 --- - include/pci.h | 13 +++++++++++++ - 3 files changed, 13 insertions(+), 11 deletions(-) - -diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c -index 30eff67..393f1c9 100644 ---- a/drivers/pci/pci-rcar-gen3.c -+++ b/drivers/pci/pci-rcar-gen3.c -@@ -117,14 +117,6 @@ - #define RCAR_PCI_MAX_RESOURCES 4 - #define MAX_NR_INBOUND_MAPS 6 - --#define PCI_EXP_FLAGS 2 /* Capabilities register */ --#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ --#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ --#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ --#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ --#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ --#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -- - enum { - RCAR_PCI_ACCESS_READ, - RCAR_PCI_ACCESS_WRITE, -diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c -index 6a9f29c..69363a0 100644 ---- a/drivers/pci/pcie_intel_fpga.c -+++ b/drivers/pci/pcie_intel_fpga.c -@@ -65,9 +65,6 @@ - #define IS_ROOT_PORT(pcie, bdf) \ - ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) - --#define PCI_EXP_LNKSTA 18 /* Link Status */ --#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -- - /** - * struct intel_fpga_pcie - Intel FPGA PCIe controller state - * @bus: Pointer to the PCI bus -diff --git a/include/pci.h b/include/pci.h -index 174ddd4..3d7646d 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -471,11 +471,24 @@ - #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ - - /* PCI Express capabilities */ -+#define PCI_EXP_FLAGS 2 /* Capabilities register */ -+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ -+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ -+ - #define PCI_EXP_DEVCAP 4 /* Device capabilities */ - #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ - #define PCI_EXP_DEVCTL 8 /* Device Control */ - #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ - -+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ -+ -+#define PCI_EXP_LNKSTA 18 /* Link Status */ -+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -+ -+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ -+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -+ - /* Include the ID list */ - - #include - -From patchwork Tue Apr 21 16:50:53 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274441 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -Remove the overlap between DRAM and device's IO area. - -Signed-off-by: Marek Szyprowski ---- - arch/arm/mach-bcm283x/init.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 9966d6c..4295356 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -38,7 +38,7 @@ static struct mm_region bcm2711_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -- .size = 0xfe000000UL, -+ .size = 0xfc000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { - -From patchwork Tue Apr 21 16:50:54 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274442 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -Create a non-cacheable mapping for the 0x600000000 physical memory region, -where MMIO registers for the PCIe XHCI controller are instantiated by the -PCIe bridge. - -Signed-off-by: Marek Szyprowski ---- - arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++--- - 1 file changed, 15 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 4295356..6a748da 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -11,10 +11,15 @@ - #include - #include - -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL -+ - #ifdef CONFIG_ARM64 - #include - --static struct mm_region bcm283x_mem_map[] = { -+#define MAX_MAP_MAX_ENTRIES (4) -+ -+static struct mm_region bcm283x_mem_map[MAX_MAP_MAX_ENTRIES] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -34,7 +39,7 @@ static struct mm_region bcm283x_mem_map[] = { - } - }; - --static struct mm_region bcm2711_mem_map[] = { -+static struct mm_region bcm2711_mem_map[MAX_MAP_MAX_ENTRIES] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = { - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { -+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, -+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, -+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { - /* List terminator */ - 0, - } -@@ -71,7 +83,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) - { - int i; - -- for (i = 0; i < 2; i++) { -+ for (i = 0; i < MAX_MAP_MAX_ENTRIES; i++) { - mem_map[i].virt = pd[i].virt; - mem_map[i].phys = pd[i].phys; - mem_map[i].size = pd[i].size; - -From patchwork Tue Apr 21 16:50:55 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274445 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -Create a non-cacheable mapping for the 0x600000000 physical memory region, -where MMIO registers for the PCIe XHCI controller are instantiated by the -PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM -32bit mode, this region is mapped at 0xff800000 CPU virtual address. - -Signed-off-by: Marek Szyprowski ---- - arch/arm/mach-bcm283x/Kconfig | 1 + - arch/arm/mach-bcm283x/include/mach/base.h | 7 +++++ - arch/arm/mach-bcm283x/init.c | 52 +++++++++++++++++++++++++++++++ - 3 files changed, 60 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 00419bf..bcb7f1d 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -36,6 +36,7 @@ config BCM2711_32B - select BCM2711 - select ARMV7_LPAE - select CPU_V7A -+ select PHYS_64BIT - - config BCM2711_64B - bool "Broadcom BCM2711 SoC 64-bit support" -diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h -index c4ae398..1d10dc9 100644 ---- a/arch/arm/mach-bcm283x/include/mach/base.h -+++ b/arch/arm/mach-bcm283x/include/mach/base.h -@@ -6,6 +6,13 @@ - #ifndef _BCM283x_BASE_H_ - #define _BCM283x_BASE_H_ - -+#include -+ - extern unsigned long rpi_bcm283x_base; - -+#ifdef CONFIG_ARMV7_LPAE -+extern void *rpi4_phys_to_virt(phys_addr_t paddr); -+#define phys_to_virt(x) rpi4_phys_to_virt(x) -+#endif -+ - #endif -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 6a748da..5d0d160 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -145,6 +145,58 @@ int mach_cpu_init(void) - } - - #ifdef CONFIG_ARMV7_LPAE -+ -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL -+ -+void *rpi4_phys_to_virt(phys_addr_t paddr) -+{ -+ if (paddr >= BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS) -+ paddr = paddr - BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS + -+ BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT; -+ return (void *)(unsigned long)paddr; -+} -+ -+static void set_section_phys(unsigned int section, phys_addr_t phys, -+ enum dcache_option option) -+{ -+ u64 *page_table = (u64 *)gd->arch.tlb_addr; -+ /* Need to set the access flag to not fault */ -+ u64 value = TTB_SECT_AP | TTB_SECT_AF; -+ -+ /* Add the page offset */ -+ value |= (phys); -+ -+ /* Add caching bits */ -+ value |= option; -+ -+ /* Set PTE */ -+ page_table[section] = value; -+} -+ -+static void rpi4_create_pcie_xhci_mapping(void) -+{ -+ unsigned sect = BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT >> MMU_SECTION_SHIFT; -+ phys_addr_t phys_addr = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS; -+ unsigned int size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE; -+ -+ while (size) { -+ set_section_phys(sect, phys_addr, DCACHE_OFF); -+ sect++; -+ phys_addr += MMU_SECTION_SIZE; -+ size -= MMU_SECTION_SIZE; -+ } -+} -+ -+void arm_init_domains(void) -+{ -+ /* -+ * Hijack this function to prepare a mappings for the PCIe MMIO -+ * region for the XHCI controller on RPi4 board. -+ * This code is called before enabling the MMU in ARM 32bit mode. -+ */ -+ rpi4_create_pcie_xhci_mapping(); -+} -+ - void enable_caches(void) - { - dcache_enable(); - -From patchwork Tue Apr 21 16:50:56 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274443 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Tue, 21 Apr 2020 16:51:23 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, - m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki - -Subject: [RFC PATCH 6/9] usb: xhci: Allow accessing 64-bit registers with - DWORD accesses only -Date: Tue, 21 Apr 2020 18:50:56 +0200 -Message-Id: <20200421165059.19394-7-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCKsWRmVeSWpSXmKPExsWy7djPc7o9KvPjDFY9ErA4ceUfo8XGGetZ - Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL - x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj+KySUnNySxLLdK3S+DKWHP3JXNBg1DFl0W7 - mBsY7/J1MXJySAiYSLy/coIVxBYSWMEo8e2sYxcjF5D9hVFi4beHjBDOZ0aJZQ0/GGE6Jn1d - wASRWM4osW7OOWa4lgfr5oFVsQkYSvQe7QOzRQQCJK79nAY2illgPqPEn0/TwBLCAvES958s - ZgOxWQRUJSZ2rGECsXkFrCWuLp/GDrFOXmL1hgPMIDangI3E3e8zWCDik9klFt2XhrBdJC5c - usoGYQtLvDq+BapXRuL/zvlgp0oINDNK9Oy+zQ7hTGCUuH98AdRD1hJ3zv0C6uYAOk9TYv0u - fYiwo0Tf1HesIGEJAT6JG28FQcLMQOakbdOZIcK8Eh1tQhDVKhK/V01ngrClJLqf/Ic600Pi - w8fFLJAA6meU6Nr7nnECo/wshGULGBlXMYqnlhbnpqcWG+allusVJ+YWl+al6yXn525iBKaV - 0/+Of9rB+PVS0iFGAQ5GJR7eG+fnxQmxJpYVV+YeYpTgYFYS4d3wECjEm5JYWZValB9fVJqT - WnyIUZqDRUmc13jRy1ghgfTEktTs1NSC1CKYLBMHp1QDo0NlrlZnZIZvA8+uwiqVNYzC/zbd - 8izctWfuNx4XYxXelzfU2SRYA08E32U8UlLxXiGjV3fxrc/35C7e3pyxj0dLTePrncrpBptb - FX6rXZLVnDGhff2fSQf+6HP95tKR3+wkzi0kXB99vkvDK6eoVW5d0uRYRxXTCfGnozzfc+wL - 6X+tWFehxFKckWioxVxUnAgAMSV15icDAAA= -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsVy+t/xu7rdKvPjDPr7bCxOXPnHaLFxxnpW - i6k98RY3frWxWqw9cpfd4k1bI6PFgslPWC0Ov2lntei4+p/R4u3eTnYHLo/7pxpYPebNOsHi - sXPWXXaPs3d2MHr0bVnF6LF+y1UWj82nqwPYo/RsivJLS1IVMvKLS2yVog0tjPQMLS30jEws - 9QyNzWOtjEyV9O1sUlJzMstSi/TtEvQy1tx9yVzQIFTxZdEu5gbGu3xdjJwcEgImEpO+LmDq - YuTiEBJYyihx8udKxi5GDqCElMT8FiWIGmGJP9e62CBqPjFKfOxoZgJJsAkYSvQe7WMEsUUE - QiReHL0CNogZZNCfhjesIAlhgViJGXMWsYPYLAKqEhM71oA18wpYS1xdPo0dYoO8xOoNB5hB - bE4BG4m732ewgNhCQDUNl5awTGDkW8DIsIpRJLW0ODc9t9hIrzgxt7g0L10vOT93EyMwyLcd - +7llB2PXu+BDjAIcjEo8vDfOz4sTYk0sK67MPcQowcGsJMK74SFQiDclsbIqtSg/vqg0J7X4 - EKMp0FETmaVEk/OBEZhXEm9oamhuYWlobmxubGahJM7bIXAwRkggPbEkNTs1tSC1CKaPiYNT - qoExbeNShg0BsVpXNX2+ynqZ6E7NXSE7VcnncfFtX/399bscXzZ29OomzhFKnuj8rz715Ruj - Dfa+8s+n7hDYcHyawgFVruDoGTumeS/WeHOltsT4QDWHrfWL65mbVjLm/99wxqyee9+3r8fY - 3h36XGPv8K1gQVD7jm/XPqUe2OMxsVg3m+mz4/cjSizFGYmGWsxFxYkAsqsjeYgCAAA= -X-CMS-MailID: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 -X-Msg-Generator: CA -X-RootMTR: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20200421165124eucas1p161d4049c0e136fc74ae2b00c2a1b3883 -References: <20200421165059.19394-1-s.nawrocki@samsung.com> - -X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -This patch adds a Kconfig option which allows accessing 64-bit xHCI -IO registers only with 2 double word accesses rather than using -a single quad word access. There might be HW configurations where -single quad word access doesn't work, even though the CPU is 64-bit. -That seems to be the case on rpi4 board with Broadcom BCM2711 SoC, -where the VL805 USB xHCI hub is connected to the PCIe controller -behind the SCB bridge. - -Signed-off-by: Sylwester Nawrocki ---- -So far I couldn't come up with anything better to make the xHCI host -controller working on the rpi4 board. For some reason dereferencing -a 64-bit pointer to access 64-bit registers doesn't work there, -might be a limitation of the PCIe bridge behind the SCB. In Linux -always 2 double word accesses are used. ---- - drivers/usb/host/Kconfig | 7 +++++++ - include/usb/xhci.h | 4 ++-- - 2 files changed, 9 insertions(+), 2 deletions(-) - -diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig -index 0987ff2..3990b8a 100644 ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -15,6 +15,13 @@ config USB_XHCI_HCD - - if USB_XHCI_HCD - -+config XHCI_64BIT_DWORD_ACCESS_ONLY -+ bool "Access xHCI 64-bit registers with double word accesses only" -+ help -+ Choose this option if your hardware does not support quad word accesses -+ for registers with 64-bit address pointers. -+ If unsure, say Y. -+ - config USB_XHCI_DWC3 - bool "DesignWare USB3 DRD Core Support" - help -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index 6017504..459e76b 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -1111,7 +1111,7 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) - */ - static inline u64 xhci_readq(__le64 volatile *regs) - { --#if BITS_PER_LONG == 64 -+#if BITS_PER_LONG == 64 && !defined(CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY) - return readq(regs); - #else - __u32 *ptr = (__u32 *)regs; -@@ -1123,7 +1123,7 @@ static inline u64 xhci_readq(__le64 volatile *regs) - - static inline void xhci_writeq(__le64 volatile *regs, const u64 val) - { --#if BITS_PER_LONG == 64 -+#if BITS_PER_LONG == 64 && !defined(CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY) - writeq(val, regs); - #else - __u32 *ptr = (__u32 *)regs; - -From patchwork Tue Apr 21 16:50:57 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274447 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - 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Tue, 21 Apr 2020 16:51:23 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, - m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki - -Subject: [RFC PATCH 7/9] pci: Add some PCI Express capability register - offset definitions -Date: Tue, 21 Apr 2020 18:50:57 +0200 -Message-Id: <20200421165059.19394-8-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKKsWRmVeSWpSXmKPExsWy7djPc7o9KvPjDOb3GFqcuPKP0WLjjPWs - FlN74i1u/GpjtVh75C67xZu2RkaLBZOfsFocftPOatFx9T+jxdu9newOXB73TzWwesybdYLF - Y+esu+weZ+/sYPTo27KK0WP9lqssHptPVwewR3HZpKTmZJalFunbJXBlLOnbw1Zwi7Ni8+9z - bA2Mv9m7GDk5JARMJA78WsXaxcjFISSwglHixo1PbBDOF0aJxyvOMUM4nxklNn7czwbT0j75 - CSNEYjmjxP62HQgtB7eeZQWpYhMwlOg92scIYosIBEhc+zkNrINZYD6jxJ9P08ASwgLREt3L - poI1sAioSkw9dxgszitgLXH2+hMWiHXyEqs3HGAGsTkFbCTufp/BAjJIQqCfXeL43lag1RxA - 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-Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Add PCI Express capability definitions required by the Broadcom STB PCIe -driver. - -Signed-off-by: Sylwester Nawrocki ---- - include/pci.h | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/include/pci.h b/include/pci.h -index 3d7646d..2b25a17 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -481,10 +481,17 @@ - #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ - - #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ -+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ - #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ - - #define PCI_EXP_LNKSTA 18 /* Link Status */ -+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ -+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ -+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ -+ - #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ - - #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ - #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ - -From patchwork Tue Apr 21 16:50:58 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1274450 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=samsung.com -Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; - unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256 - header.s=mail20170921 header.b=V2q01bQ/; - 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-X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -This patch adds basic driver for the Broadcom STB PCIe host controller. -The code is based on Linux upstream driver (pcie-brcmtsb.c) with MSI -handling removed. The inbound access memory region is not currently -parsed from dma-ranges DT property and is fixed as a 1:1 mapping of -whole RAM. -The patch has been tested on rpi4 board, i.e. on BCM2711 SoC with VL805 -USB Host Controller. - -Signed-off-by: Sylwester Nawrocki ---- - drivers/pci/Kconfig | 5 + - drivers/pci/Makefile | 1 + - drivers/pci/pcie_brcmstb.c | 844 +++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 850 insertions(+) - create mode 100644 drivers/pci/pcie_brcmstb.c - -diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig -index 437cd9a..02dcc57 100644 ---- a/drivers/pci/Kconfig -+++ b/drivers/pci/Kconfig -@@ -197,4 +197,9 @@ config PCIE_MEDIATEK - Say Y here if you want to enable Gen2 PCIe controller, - which could be found on MT7623 SoC family. - -+config PCI_BRCMSTB -+ bool "Broadcom STB PCIe controller" -+ depends on DM_PCI -+ help -+ Say Y here if you want to enable PCI controller support on BCM2711 SoC. - endif -diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile -index c051ecc..3e53b1f 100644 ---- a/drivers/pci/Makefile -+++ b/drivers/pci/Makefile -@@ -43,3 +43,4 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o - obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o - obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o - obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o -+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -new file mode 100644 -index 0000000..e96e163 ---- /dev/null -+++ b/drivers/pci/pcie_brcmstb.c -@@ -0,0 +1,844 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Broadcom STB PCIe controller driver -+ * -+ * Copyright (C) 2020 Samsung Electronics Co., Ltd. -+ * Author: Sylwester Nawrocki -+ * -+ * Based on upstream Linux kernel driver: -+ * -+ * drivers/pci/controller/pcie-brcmstb.c -+ * Copyright (C) 2009 - 2017 Broadcom -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ -+#define BRCM_PCIE_CAP_REGS 0x00ac -+ -+/* -+ * Broadcom Settop Box PCIe Register Offsets. The names are from -+ * the chip's RDB and we use them here so that a script can correlate -+ * this code and the RDB to prevent discrepancies. -+ */ -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 -+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c -+#define PCIE_RC_DL_MDIO_ADDR 0x1100 -+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 -+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 -+#define PCIE_MISC_MISC_CTRL 0x4008 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 -+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c -+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 -+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 -+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c -+#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 -+#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 -+#define PCIE_MISC_MSI_DATA_CONFIG 0x404c -+#define PCIE_MISC_EOI_CTRL 0x4060 -+#define PCIE_MISC_PCIE_CTRL 0x4064 -+#define PCIE_MISC_PCIE_STATUS 0x4068 -+#define PCIE_MISC_REVISION 0x406c -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 -+#define PCIE_INTR2_CPU_BASE 0x4300 -+#define PCIE_MSI_INTR2_BASE 0x4500 -+ -+/* -+ * Broadcom Settop Box PCIe Register Field shift and mask info. The -+ * names are from the chip's RDB and we use them here so that a script -+ * can correlate this code and the RDB to prevent discrepancies. -+ */ -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_SHIFT 0x2 -+#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff -+#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_SHIFT 0x0 -+#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 -+#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_SHIFT 0xc -+#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 -+#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_SHIFT 0xd -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_SHIFT 0x14 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_SHIFT 0x1b -+#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_MASK 0x7c00000 -+#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_SHIFT 0x16 -+#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_MASK 0x1f -+#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_SHIFT 0x0 -+#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_SHIFT 0x0 -+#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_SHIFT 0x0 -+#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_SHIFT 0x0 -+#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4 -+#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_SHIFT 0x2 -+#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 -+#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_SHIFT 0x0 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_SHIFT 0x7 -+#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 -+#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_SHIFT 0x5 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_SHIFT 0x4 -+#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 -+#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_SHIFT 0x6 -+#define PCIE_MISC_REVISION_MAJMIN_MASK 0xffff -+#define PCIE_MISC_REVISION_MAJMIN_SHIFT 0 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_SHIFT 0x14 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_SHIFT 0x4 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS 0xc -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_SHIFT 0x0 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_SHIFT 0x0 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_SHIFT 0x1 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_SHIFT 0x1b -+#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 -+#define PCIE_RGR1_SW_INIT_1_PERST_SHIFT 0x0 -+ -+/* Offsets from PCIE_INTR2_CPU_BASE */ -+#define STATUS 0x0 -+#define SET 0x4 -+#define CLR 0x8 -+#define MASK_STATUS 0xc -+#define MASK_SET 0x10 -+#define MASK_CLR 0x14 -+ -+#define BRCM_NUM_PCIE_OUT_WINS 0x4 -+#define BRCM_MAX_SCB 0x4 -+ -+#define BURST_SIZE_128 0 -+ -+#define PCIE_BUSNUM_SHIFT 20 -+#define PCIE_SLOT_SHIFT 15 -+#define PCIE_FUNC_SHIFT 12 -+ -+#if defined(__BIG_ENDIAN) -+#define DATA_ENDIAN 2 /* PCIe->DDR inbound traffic */ -+#define MMIO_ENDIAN 2 /* CPU->PCIe outbound traffic */ -+#else -+#define DATA_ENDIAN 0 -+#define MMIO_ENDIAN 0 -+#endif -+ -+#define MDIO_PORT0 0x0 -+#define MDIO_DATA_MASK 0x7fffffff -+#define MDIO_DATA_SHIFT 0x0 -+#define MDIO_PORT_MASK 0xf0000 -+#define MDIO_PORT_SHIFT 0x16 -+#define MDIO_REGAD_MASK 0xffff -+#define MDIO_REGAD_SHIFT 0x0 -+#define MDIO_CMD_MASK 0xfff00000 -+#define MDIO_CMD_SHIFT 0x14 -+#define MDIO_CMD_READ 0x1 -+#define MDIO_CMD_WRITE 0x0 -+#define MDIO_DATA_DONE_MASK 0x80000000 -+#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) -+#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) -+#define SSC_REGS_ADDR 0x1100 -+#define SET_ADDR_OFFSET 0x1f -+#define SSC_CNTL_OFFSET 0x2 -+#define SSC_CNTL_OVRD_EN_MASK 0x8000 -+#define SSC_CNTL_OVRD_EN_SHIFT 0xf -+#define SSC_CNTL_OVRD_VAL_MASK 0x4000 -+#define SSC_CNTL_OVRD_VAL_SHIFT 0xe -+#define SSC_STATUS_OFFSET 0x1 -+#define SSC_STATUS_SSC_MASK 0x400 -+#define SSC_STATUS_SSC_SHIFT 0xa -+#define SSC_STATUS_PLL_LOCK_MASK 0x800 -+#define SSC_STATUS_PLL_LOCK_SHIFT 0xb -+ -+#define IDX_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_INDEX]) -+#define DATA_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_DATA]) -+#define PCIE_RGR1_SW_INIT_1(pcie) ((pcie)->reg_offsets[RGR1_SW_INIT_1]) -+ -+enum { -+ RGR1_SW_INIT_1, -+ EXT_CFG_INDEX, -+ EXT_CFG_DATA, -+}; -+ -+enum { -+ RGR1_SW_INIT_1_INIT_MASK, -+ RGR1_SW_INIT_1_INIT_SHIFT, -+ RGR1_SW_INIT_1_PERST_MASK, -+ RGR1_SW_INIT_1_PERST_SHIFT, -+}; -+ -+enum pcie_type { -+ BCM7425, -+ BCM7435, -+ GENERIC, -+ BCM7278, -+ BCM2711, -+}; -+ -+struct brcm_window { -+ dma_addr_t pci_addr; -+ phys_addr_t phys_addr; -+ dma_addr_t size; -+}; -+ -+struct brcm_pcie { -+ struct resource mem; -+ bool ssc; -+ -+ struct device_node *dn; -+ void __iomem *base; -+ -+ int num_out_wins; -+ struct brcm_window out_wins[BRCM_NUM_PCIE_OUT_WINS]; -+ -+ int gen; -+ unsigned int rev; -+ -+ const int *reg_offsets; -+ const int *reg_field_info; -+ u32 max_burst_size; -+ enum pcie_type type; -+}; -+ -+struct pcie_cfg_data { -+ const int *reg_field_info; -+ const int *offsets; -+ const u32 max_burst_size; -+ const enum pcie_type type; -+}; -+ -+static struct brcm_window dma_ranges[1]; -+static int num_dma_ranges; -+ -+static const int pcie_reg_field_info[] = { -+ [RGR1_SW_INIT_1_INIT_MASK] = 0x2, -+ [RGR1_SW_INIT_1_INIT_SHIFT] = 0x1, -+}; -+ -+static const int pcie_offsets[] = { -+ [RGR1_SW_INIT_1] = 0x9210, -+ [EXT_CFG_INDEX] = 0x9000, -+ [EXT_CFG_DATA] = 0x8000, -+}; -+ -+static const struct pcie_cfg_data generic_cfg = { -+ .reg_field_info = pcie_reg_field_info, -+ .offsets = pcie_offsets, -+ .max_burst_size = BURST_SIZE_128, -+ .type = GENERIC, -+}; -+ -+static const struct pcie_cfg_data bcm2711_cfg = { -+ .reg_field_info = pcie_reg_field_info, -+ .offsets = pcie_offsets, -+ .max_burst_size = BURST_SIZE_128, -+ .type = BCM2711, -+}; -+ -+/* These macros extract/insert fields to host controller's register set */ -+#define WR_FLD(base, reg, field, val) \ -+ wr_fld(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) -+#define WR_FLD_RB(base, reg, field, val) \ -+ wr_fld_rb(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) -+#define WR_FLD_WITH_OFFSET(base, off, reg, field, val) \ -+ wr_fld(base + reg + off, reg##_##field##_MASK, \ -+ reg##_##field##_SHIFT, val) -+#define EXTRACT_FIELD(val, reg, field) \ -+ ((val & reg##_##field##_MASK) >> reg##_##field##_SHIFT) -+#define INSERT_FIELD(val, reg, field, field_val) \ -+ ((val & ~reg##_##field##_MASK) | \ -+ (reg##_##field##_MASK & (field_val << reg##_##field##_SHIFT))) -+ -+#define msleep(a) udelay((a) * 1000) -+ -+/* -+ * The roundup_pow_of_two() from log2.h invokes -+ * __roundup_pow_of_two(unsigned long), but we really need -+ * such a function to take a native u64 since unsigned long -+ * is 32 bits on some configurations. So we provide this helper -+ * function below. -+ */ -+static u64 roundup_pow_of_two_64(u64 n) -+{ -+ return 1ULL << fls64(n - 1); -+} -+ -+/* -+ * This is to convert the size of the inbound "BAR" region to the -+ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE -+ */ -+int encode_ibar_size(u64 size) -+{ -+ int log2_in = ilog2(size); -+ -+ if (log2_in >= 12 && log2_in <= 15) -+ /* Covers 4KB to 32KB (inclusive) */ -+ return (log2_in - 12) + 0x1c; -+ else if (log2_in >= 16 && log2_in <= 37) -+ /* Covers 64KB to 32GB, (inclusive) */ -+ return log2_in - 15; -+ /* Something is awry so disable */ -+ return 0; -+} -+ -+/* Configuration space read/write support */ -+static int cfg_index(int busnr, int devfn, int reg) -+{ -+ return (PCI_DEV(devfn) << PCIE_SLOT_SHIFT) -+ | (PCI_FUNC(devfn) << PCIE_FUNC_SHIFT) -+ | (busnr << PCIE_BUSNUM_SHIFT) -+ | (reg & ~3); -+} -+ -+/* The controller is capable of serving in both RC and EP roles */ -+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); -+ -+ return !!EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PORT); -+} -+ -+static bool brcm_pcie_link_up(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); -+ u32 dla = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_DL_ACTIVE); -+ u32 plu = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PHYLINKUP); -+ -+ return (dla && plu) ? true : false; -+} -+ -+static int brcm_pcie_config_address(const struct udevice *udev, pci_dev_t bdf, -+ uint offset, void **paddress) -+{ -+ struct brcm_pcie *pcie = dev_get_priv(udev); -+ unsigned int bus = PCI_BUS(bdf); -+ unsigned int dev = PCI_DEV(bdf); -+ int idx; -+ -+ if (bus > 0 && !brcm_pcie_link_up(pcie)) -+ return -ENODEV; -+ -+ /* -+ * Busses 0 (host PCIe bridge) and 1 (its immediate child) -+ * are limited to a single device each -+ */ -+ if ((bus == (udev->seq + 1)) && dev > 0) -+ return -ENODEV; -+ -+ /* Accesses to the RC go right to the RC registers if PCI device == 0 */ -+ if (bus == udev->seq) { -+ if (PCI_DEV(bdf)) -+ return -ENODEV; -+ -+ *paddress = pcie->base + offset; -+ return 0; -+ } -+ -+ /* For devices, write to the config space index register */ -+ idx = cfg_index(bus, bdf, 0); -+ -+ writel(idx, pcie->base + IDX_ADDR(pcie)); -+ *paddress = pcie->base + DATA_ADDR(pcie) + offset; -+ -+ return 0; -+} -+ -+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, -+ uint offset, ulong *valuep, -+ enum pci_size_t size) -+{ -+ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address, -+ bdf, offset, valuep, size); -+} -+ -+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf, -+ uint offset, ulong value, -+ enum pci_size_t size) -+{ -+ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address, -+ bdf, offset, value, size); -+} -+ -+static void wr_fld(void __iomem *p, u32 mask, int shift, u32 val) -+{ -+ u32 reg = readl(p); -+ -+ reg = (reg & ~mask) | ((val << shift) & mask); -+ writel(reg, p); -+} -+ -+static void wr_fld_rb(void __iomem *p, u32 mask, int shift, u32 val) -+{ -+ wr_fld(p, mask, shift, val); -+ (void)readl(p); -+} -+ -+static const char *link_speed_to_str(int s) -+{ -+ switch (s) { -+ case 1: -+ return "2.5"; -+ case 2: -+ return "5.0"; -+ case 3: -+ return "8.0"; -+ default: -+ break; -+ } -+ return "???"; -+} -+ -+static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, -+ unsigned int val) -+{ -+ unsigned int shift = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_SHIFT]; -+ u32 mask = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_MASK]; -+ -+ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), mask, shift, val); -+} -+ -+static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, -+ unsigned int val) -+{ -+ if (pcie->type != BCM7278) -+ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), -+ PCIE_RGR1_SW_INIT_1_PERST_MASK, -+ PCIE_RGR1_SW_INIT_1_PERST_SHIFT, val); -+ else -+ /* Assert = 0, de-assert = 1 on 7278 */ -+ WR_FLD_RB(pcie->base, PCIE_MISC_PCIE_CTRL, PCIE_PERSTB, !val); -+} -+ -+static u32 mdio_form_pkt(int port, int regad, int cmd) -+{ -+ u32 pkt = 0; -+ -+ pkt |= (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK; -+ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK; -+ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK; -+ -+ return pkt; -+} -+ -+/* Negative return value indicates error */ -+static int mdio_read(void __iomem *base, u8 port, u8 regad) -+{ -+ int tries; -+ u32 data; -+ -+ writel(mdio_form_pkt(port, regad, MDIO_CMD_READ), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ } -+ -+ return MDIO_RD_DONE(data) -+ ? (data & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT -+ : -EIO; -+} -+ -+/* Negative return value indicates error */ -+static int mdio_write(void __iomem *base, u8 port, u8 regad, u16 wrdata) -+{ -+ int tries; -+ u32 data; -+ -+ writel(mdio_form_pkt(port, regad, MDIO_CMD_WRITE), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ writel(MDIO_DATA_DONE_MASK | wrdata, -+ base + PCIE_RC_DL_MDIO_WR_DATA); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ } -+ -+ return MDIO_WT_DONE(data) ? 0 : -EIO; -+} -+ -+/* -+ * Configures device for Spread Spectrum Clocking (SSC) mode; negative -+ * return value indicates error. -+ */ -+static int set_ssc(void __iomem *base) -+{ -+ int tmp; -+ u16 wrdata; -+ int pll, ssc; -+ -+ tmp = mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET, SSC_REGS_ADDR); -+ if (tmp < 0) -+ return tmp; -+ -+ tmp = mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET); -+ if (tmp < 0) -+ return tmp; -+ -+ wrdata = INSERT_FIELD(tmp, SSC_CNTL_OVRD, EN, 1); -+ wrdata = INSERT_FIELD(wrdata, SSC_CNTL_OVRD, VAL, 1); -+ tmp = mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, wrdata); -+ if (tmp < 0) -+ return tmp; -+ -+ udelay(1500); -+ tmp = mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET); -+ if (tmp < 0) -+ return tmp; -+ -+ ssc = EXTRACT_FIELD(tmp, SSC_STATUS, SSC); -+ pll = EXTRACT_FIELD(tmp, SSC_STATUS, PLL_LOCK); -+ -+ return (ssc && pll) ? 0 : -EIO; -+} -+ -+/* Limits operation to a specific generation (1, 2, or 3) */ -+static void set_gen(void __iomem *base, int gen) -+{ -+ u32 lnkcap = readl(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ u16 lnkctl2 = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+ -+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; -+ writel(lnkcap, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ -+ lnkctl2 = (lnkctl2 & ~0xf) | gen; -+ writew(lnkctl2, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+} -+ -+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, -+ unsigned int win, phys_addr_t phys_addr, -+ dma_addr_t pcie_addr, dma_addr_t size) -+{ -+ void __iomem *base = pcie->base; -+ phys_addr_t phys_addr_mb, limit_addr_mb; -+ u32 tmp; -+ -+ /* Set the base of the pcie_addr window */ -+ writel(lower_32_bits(pcie_addr) + MMIO_ENDIAN, -+ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + (win * 8)); -+ writel(upper_32_bits(pcie_addr), -+ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + (win * 8)); -+ -+ phys_addr_mb = phys_addr >> 20; -+ limit_addr_mb = (phys_addr + size - 1) >> 20; -+ -+ /* Write the addr base low register */ -+ WR_FLD_WITH_OFFSET(base, (win * 4), -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, -+ BASE, phys_addr_mb); -+ /* Write the addr limit low register */ -+ WR_FLD_WITH_OFFSET(base, (win * 4), -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, -+ LIMIT, limit_addr_mb); -+ -+ if (pcie->type != BCM7435 && pcie->type != BCM7425) { -+ /* Write the cpu addr high register */ -+ tmp = (u32)(phys_addr_mb >> -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); -+ WR_FLD_WITH_OFFSET(base, (win * 8), -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI, -+ BASE, tmp); -+ /* Write the cpu limit high register */ -+ tmp = (u32)(limit_addr_mb >> -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); -+ WR_FLD_WITH_OFFSET(base, (win * 8), -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI, -+ LIMIT, tmp); -+ } -+} -+ -+static int brcm_pcie_setup(struct brcm_pcie *pcie) -+{ -+ phys_addr_t scb_size[BRCM_MAX_SCB] = {0}; -+ void __iomem *base = pcie->base; -+ unsigned int scb_size_val; -+ u64 rc_bar2_offset, rc_bar2_size; -+ u64 total_mem_size = 0; -+ int i, j, ret, limit, num_memc; -+ u16 nlw, cls, lnksta; -+ bool ssc_good = false; -+ u32 tmp; -+ -+ /* Reset the bridge */ -+ brcm_pcie_bridge_sw_init_set(pcie, 1); -+ -+ /* -+ * Ensure that the fundamental reset is asserted, except for 7278, -+ * which fails if we do this. -+ */ -+ if (pcie->type != BCM7278) -+ brcm_pcie_perst_set(pcie, 1); -+ -+ udelay(150); -+ -+ /* Take the bridge out of reset */ -+ brcm_pcie_bridge_sw_init_set(pcie, 0); -+ -+ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, SERDES_IDDQ, 0); -+ /* Wait for SerDes to be stable */ -+ udelay(150); -+ -+ /* Grab the PCIe hw revision number */ -+ tmp = readl(base + PCIE_MISC_REVISION); -+ pcie->rev = EXTRACT_FIELD(tmp, PCIE_MISC_REVISION, MAJMIN); -+ -+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ -+ tmp = INSERT_FIELD(0, PCIE_MISC_MISC_CTRL, SCB_ACCESS_EN, 1); -+ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, CFG_READ_UR_MODE, 1); -+ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, MAX_BURST_SIZE, -+ pcie->max_burst_size); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ /* -+ * Set up inbound memory view for the EP (called RC_BAR2, not to be -+ * confused with the BARs that are advertised by the EP). -+ * -+ * The PCIe host controller by design must set the inbound viewport -+ * to be a contiguous arrangement of all of the system's memory. -+ * In addition, its size must be a power of two. Further, the MSI -+ * target address must NOT be placed inside this region, as the -+ * decoding logic will consider its address to be inbound memory -+ * traffic. To further complicate matters, the viewport must start -+ * on a pcie-address that is aligned on a multiple of its size. -+ * If a portion of the viewport does not represent system memory -+ * -- e.g. 3GB of memory requires a 4GB viewport -- we can map -+ * the outbound memory in or after 3GB and even though the viewport -+ * will overlap the outbound memory the controller will know to send -+ * outbound memory downstream and everything else upstream. -+ */ -+ -+ if (num_dma_ranges) { -+ /* -+ * Use the base address and size(s) provided in the dma-ranges -+ * property. -+ */ -+ for (i = 0; i < num_dma_ranges; i++) -+ scb_size[i] = roundup_pow_of_two_64(dma_ranges[i].size); -+ -+ num_memc = num_dma_ranges; -+ rc_bar2_offset = dma_ranges[0].pci_addr; -+ } else { -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < num_memc; i++) -+ total_mem_size += scb_size[i]; -+ -+ rc_bar2_size = roundup_pow_of_two_64(total_mem_size); -+ -+ /* Verify the alignment is correct */ -+ if (rc_bar2_offset & (rc_bar2_size - 1)) { -+ printf("PCIe BRCM: inbound window is misaligned\n"); -+ return -EINVAL; -+ } -+ -+ tmp = lower_32_bits(rc_bar2_offset); -+ tmp = INSERT_FIELD(tmp, PCIE_MISC_RC_BAR2_CONFIG_LO, SIZE, -+ encode_ibar_size(rc_bar2_size)); -+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); -+ writel(upper_32_bits(rc_bar2_offset), -+ base + PCIE_MISC_RC_BAR2_CONFIG_HI); -+ -+ scb_size_val = scb_size[0] -+ ? ilog2(scb_size[0]) - 15 : 0xf; /* 0xf is 1GB */ -+ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB0_SIZE, scb_size_val); -+ -+ if (num_memc > 1) { -+ scb_size_val = scb_size[1] -+ ? ilog2(scb_size[1]) - 15 : 0xf; /* 0xf is 1GB */ -+ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB1_SIZE, scb_size_val); -+ } -+ -+ if (num_memc > 2) { -+ scb_size_val = scb_size[2] -+ ? ilog2(scb_size[2]) - 15 : 0xf; /* 0xf is 1GB */ -+ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB2_SIZE, scb_size_val); -+ } -+ -+ /* Disable the PCIe->GISB memory window (RC_BAR1) */ -+ WR_FLD(base, PCIE_MISC_RC_BAR1_CONFIG_LO, SIZE, 0); -+ -+ /* Disable the PCIe->SCB memory window (RC_BAR3) */ -+ WR_FLD(base, PCIE_MISC_RC_BAR3_CONFIG_LO, SIZE, 0); -+ -+ /* Clear any interrupts we find on boot */ -+ writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + CLR); -+ (void)readl(base + PCIE_INTR2_CPU_BASE + CLR); -+ -+ /* Mask all interrupts since we are not handling any yet */ -+ writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + MASK_SET); -+ (void)readl(base + PCIE_INTR2_CPU_BASE + MASK_SET); -+ -+ if (pcie->gen) -+ set_gen(base, pcie->gen); -+ -+ /* Unassert the fundamental reset */ -+ brcm_pcie_perst_set(pcie, 0); -+ -+ /* Give the RC/EP time to wake up, before trying to configure RC. */ -+ limit = 100; -+ for (i = 1, j = 0; j < limit && !brcm_pcie_link_up(pcie); -+ j += i, i = i * 2) -+ msleep(i + j > limit ? limit - j : i); -+ -+ if (!brcm_pcie_link_up(pcie)) { -+ printf("PCIe BRCM: link down\n"); -+ return -ENODEV; -+ } -+ -+ if (!brcm_pcie_rc_mode(pcie)) { -+ printf("PCIe misconfigured; is in EP mode\n"); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < pcie->num_out_wins; i++) -+ brcm_pcie_set_outbound_win(pcie, i, pcie->out_wins[i].phys_addr, -+ pcie->out_wins[i].pci_addr, -+ pcie->out_wins[i].size); -+ -+ /* -+ * For config space accesses on the RC, show the right class for -+ * a PCIe-PCIe bridge (the default setting is to be EP mode). -+ */ -+ WR_FLD_RB(base, PCIE_RC_CFG_PRIV1_ID_VAL3, CLASS_CODE, 0x060400); -+ -+ if (pcie->ssc) { -+ ret = set_ssc(base); -+ if (ret == 0) -+ ssc_good = true; -+ else -+ printf("PCIe BRCM: failed attempt to enter ssc mode\n"); -+ } -+ -+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); -+ cls = lnksta & PCI_EXP_LNKSTA_CLS; -+ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; -+ -+ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls), -+ nlw, ssc_good ? "(SSC)" : "(!SSC)"); -+ -+ /* PCIe->SCB endian mode for BAR */ -+ /* field ENDIAN_MODE_BAR2 = DATA_ENDIAN */ -+ WR_FLD_RB(base, PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1, -+ ENDIAN_MODE_BAR2, DATA_ENDIAN); -+ -+ /* -+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 -+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. -+ */ -+ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, CLKREQ_DEBUG_ENABLE, 1); -+ -+ return 0; -+} -+ -+static const struct udevice_id brcm_pcie_ids[] = { -+ { .compatible = "brcm,bcm7445-pcie", .data = (ulong)&generic_cfg }, -+ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg }, -+ { } -+}; -+ -+static int brcm_pcie_probe(struct udevice *dev) -+{ -+ struct udevice *ctlr = pci_get_controller(dev); -+ struct pci_controller *hose = dev_get_uclass_priv(ctlr); -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ struct pcie_cfg_data *data = (struct pcie_cfg_data *)dev_get_driver_data(dev); -+ ofnode dn = dev_ofnode(dev); -+ u32 max_link_speed; -+ int i; -+ -+ if (hose->region_count < 2) { -+ pr_err("PCIe BRCM: Missing PCI regions definition"); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < hose->region_count; i++) { -+ if (hose->regions[i].flags == PCI_REGION_SYS_MEMORY) -+ continue; -+ -+ pcie->out_wins[i].phys_addr = hose->regions[i].phys_start; -+ pcie->out_wins[i].pci_addr = hose->regions[i].bus_start; -+ pcie->out_wins[i].size = hose->regions[i].size; -+ pcie->num_out_wins++; -+ } -+ -+ /* TODO: Parse inbound access mapping from dma-ranges DT property */ -+ num_dma_ranges = 1; -+ for (i = 0; i < hose->region_count; i++) { -+ if (hose->regions[i].flags != PCI_REGION_SYS_MEMORY) -+ continue; -+ -+ dma_ranges[0].pci_addr = hose->regions[i].bus_start; -+ dma_ranges[0].phys_addr = hose->regions[i].phys_start; -+ dma_ranges[0].size = hose->regions[i].size; -+ break; -+ } -+ -+ pcie->reg_offsets = data->offsets; -+ pcie->reg_field_info = data->reg_field_info; -+ pcie->max_burst_size = data->max_burst_size; -+ pcie->type = data->type; -+ -+ if (ofnode_read_u32(dn, "max-link-speed", &max_link_speed) || -+ max_link_speed > 4) -+ pcie->gen = 0; -+ else -+ pcie->gen = max_link_speed; -+ -+ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); -+ -+ return brcm_pcie_setup(pcie); -+} -+ -+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) -+{ -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ -+ /* Get the controller base address */ -+ pcie->base = dev_read_addr_ptr(dev); -+ if (!pcie->base) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static const struct dm_pci_ops brcm_pcie_ops = { -+ .read_config = brcm_pcie_read_config, -+ .write_config = brcm_pcie_write_config, -+}; -+ -+U_BOOT_DRIVER(pcie_brcm_base) = { -+ .name = "pcie_brcm", -+ .id = UCLASS_PCI, -+ .ops = &brcm_pcie_ops, -+ .of_match = brcm_pcie_ids, -+ .probe = brcm_pcie_probe, -+ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, -+ .priv_auto_alloc_size = sizeof(struct brcm_pcie), -+}; - -From patchwork Tue Apr 21 16:50:59 2020 -Content-Type: text/plain; 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- Tue, 21 Apr 2020 16:51:25 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, - m.szyprowski@samsung.com, b.zolnierkie@samsung.com -Subject: [RFC PATCH 9/9] config: Enable support for the XHCI controller on - RPI4 board -Date: Tue, 21 Apr 2020 18:50:59 +0200 -Message-Id: <20200421165059.19394-10-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA0WSbUhTcRTG+e++zppcp+AflYxhH9LUzIhbiVkG3Q998ENkRWpTb1PTKfc6 - zYQwheVbU7OcTFJLaWWEM81Xwlo1zdcvvoEbthzhLAObIFq63K7Vt995zvNwOIdDItIqzI9M - V+aynFKeKcM90G7TxmSoJqgp8fBYCUoPT20DuqO+HaMfVibRc5tqjH75wULQ39V3AN1ca8Po - 0mknoFfelBExYmZhpAhjGnXDKNOnsxDMuLkXMJquNsC0d02jTOdoYRxxxSMqlc1Mz2O58Ohr - HmnFzRt4TuX+m7XqQawIfPYvByQJqaPQ8DS2HHiQUuoZgMsPHCKhWAOwxdqJCIUDQJNmCZQD - sTvR8mlgt6EHsNioBf8iG48eYy4XTkXAex817oQPFQdnNurcjFA5sG7WhrvYm4qHFYb3bkap - A7DB8U7kYgkVBecNHbgwLRC+MLxFXCze0S3r9ahrGKQqCLhp78EE01lY12ncDXjD5aEuQuAA - 6OxrEgmBEgArB+YJoagGcGGoeXehk9A8sYm7zoFQB2F7f7ggn4Z6rRMTruQJ51a8hAU84f1u - LSLIEliqlgruIPirTSsS2A9W2JyowAy011h3r1UF4OvnZqIaBOr+D2sGoA34sio+S8HyR5Rs - fhgvz+JVSkVYSnbWK7DzJqPbQ2u9oP93shFQJJDtlcxNNiZKMXkeX5BlBJBEZD4Sg3VHkqTK - C26xXHYSp8pkeSPwJ1GZryTyiT1BSinkuewNls1hub9dESn2KwLJg1+3GcJnoqnQntS+dGor - g3FOHjdfGtBf3qOc0h3Sr0dor2/GpFrGwsdmW+P3rVGj+DHrlk2f34qDkC8hIzWmqbvG1YD+ - tBlrRoiXmps5Lynzjmsd+ZnClZ5zLJ4oi/3mQ6Y3jJ9R9Ny2R5pCfySsXo1WiS8uhnHBjYkd - F2QonyaPCEY4Xv4HlRBgdCIDAAA= -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t/xu7q9KvPjDBrnaFmcuPKP0WLjjPWs - FlN74i1u/GpjtVh75C67xZu2RkaLBZOfsFp0XP3PaPF2bye7A6fH/VMNrB7zZp1g8dg56y67 - x9k7Oxg9+rasYvRYv+Uqi8fm09UB7FF6NkX5pSWpChn5xSW2StGGFkZ6hpYWekYmlnqGxuax - VkamSvp2NimpOZllqUX6dgl6GU0LfrIV9ChUTG7bz9rA+EC6i5GTQ0LARGLxyd3MXYxcHEIC - SxklPvy/yt7FyAGUkJKY36IEUSMs8edaFxtEzSdGibXPXzGDJNgEDCV6j/YxgtgiAiESL45e - YQKxmQXKJNa0vgaLCwuEStyd0gNmswioSsz+fBCshlfARuL2ho1sEAvkJVZvOAA2kxMofvf7 - DBYQW0jAWqLh0hKWCYx8CxgZVjGKpJYW56bnFhvpFSfmFpfmpesl5+duYgQG9rZjP7fsYOx6 - F3yIUYCDUYmH98b5eXFCrIllxZW5hxglOJiVRHg3PAQK8aYkVlalFuXHF5XmpBYfYjQFOmoi - s5Rocj4w6vJK4g1NDc0tLA3Njc2NzSyUxHk7BA7GCAmkJ5akZqemFqQWwfQxcXBKNTBWTnjA - 9rfi5OHFK1WDPefc1Lu4NHa3k0wcX1F135VL2qWb2AoizLZIZYrNyrjw0f+d94ZWruRVorea - j/wSO5bju/fInhW3XUo8DDUe22meFxPewrSBefPkV4tqufjmZfw2215cNE+8PDvoi1vXG/vu - HJazefOrPDX48nXr2GPVpXas8L377pESS3FGoqEWc1FxIgDja1QoggIAAA== -X-CMS-MailID: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a -X-Msg-Generator: CA -X-RootMTR: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20200421165125eucas1p12d7451082887a52073ba795aa0ee398a -References: <20200421165059.19394-1-s.nawrocki@samsung.com> - -X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI -and USB commands. To get it working one has to call the following commands: -"pci enum; usb start;", thus such commands have been added to the default -"preboot" environment variable. One has to update his environment if it is -already configured to get this feature working out of the box. - -Signed-off-by: Marek Szyprowski ---- - configs/rpi_4_32b_defconfig | 9 +++++++++ - configs/rpi_4_defconfig | 10 ++++++++++ - configs/rpi_arm64_defconfig | 9 ++++++++- - 3 files changed, 27 insertions(+), 1 deletion(-) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 72cda5d..0dd763f 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_DFU=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_INTERFACE="mmc" -@@ -28,12 +32,17 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_MANUFACTURER="FSL" - CONFIG_USB_GADGET_VENDOR_NUM=0x0525 -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 6d148da..f80e5da 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_DFU=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_INTERFACE="mmc" -@@ -28,12 +32,18 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_MANUFACTURER="FSL" - CONFIG_USB_GADGET_VENDOR_NUM=0x0525 -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index fea86be..926dfc3 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -7,13 +7,14 @@ CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_USE_PREBOOT=y --CONFIG_PREBOOT="usb start" -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y -@@ -26,11 +27,17 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_DWC2=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y -From 41e5d853779e91ea193ea0251bae9328083e2374 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 21 Apr 2020 20:18:31 +0100 -Subject: [PATCH] rpi4: add usb keyboard/storage - -Signed-off-by: Peter Robinson ---- - configs/rpi_4_32b_defconfig | 2 ++ - configs/rpi_4_defconfig | 2 ++ - 2 files changed, 4 insertions(+) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 0dd763f06f..2e137414f7 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -49,6 +49,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 - CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 - CONFIG_USB_GADGET_DWC2_OTG=y - CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_STORAGE=y - CONFIG_DM_VIDEO=y - # CONFIG_VIDEO_BPP8 is not set - # CONFIG_VIDEO_BPP16 is not set -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index f80e5dac3e..bdefbd2a45 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -50,6 +50,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 - CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 - CONFIG_USB_GADGET_DWC2_OTG=y - CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_STORAGE=y - CONFIG_DM_VIDEO=y - # CONFIG_VIDEO_BPP8 is not set - # CONFIG_VIDEO_BPP16 is not set --- -2.26.1 - diff --git a/aarch64-boards b/aarch64-boards index 4782501..cc0d265 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -61,6 +61,7 @@ rockpro64-rk3399 roc-pc-rk3399 rpi_3 rpi_4 +rpi_arm64 sopine_baseboard teres_i turris_mox diff --git a/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch b/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch deleted file mode 100644 index 0dea1a8..0000000 --- a/arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch +++ /dev/null @@ -1,863 +0,0 @@ -From patchwork Tue Mar 31 09:39:57 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Lin Jinhan -X-Patchwork-Id: 1264692 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - 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2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Add rng node in rk3399-u-boot.dtsi and enable it in -rk3399-evb-u-boot.dtsi. - -Signed-off-by: Lin Jinhan ---- - arch/arm/dts/rk3399-evb-u-boot.dtsi | 5 +++++ - arch/arm/dts/rk3399-u-boot.dtsi | 6 ++++++ - 2 files changed, 11 insertions(+) - -diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi -index ccb33d34d1..5b50c5ba30 100644 ---- a/arch/arm/dts/rk3399-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi -@@ -11,3 +11,8 @@ - u-boot,spl-boot-order = &sdhci, &sdmmc; - }; - }; -+ -+&rng { -+ status = "okay"; -+}; -+ -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index 8b857ccfc7..757b8c10a2 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -25,6 +25,12 @@ - clock-names = "pclk_ddr_mon"; - }; - -+ rng: rng@ff8b8000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff8b8000 0x0 0x1000>; -+ status = "disabled"; -+ }; -+ - dmc: dmc { - u-boot,dm-pre-reloc; - compatible = "rockchip,rk3399-dmc"; - -From patchwork Tue Mar 31 09:39:58 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Lin Jinhan -X-Patchwork-Id: 1264694 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) - smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; - helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; - receiver=) -Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) - header.from=rock-chips.com -Received: from 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-X-UNIQUE-TAG: <5d721e76916e55da5c0d6122d449dd8b> -X-RL-SENDER: troy.lin@rock-chips.com -X-SENDER: troy.lin@rock-chips.com -X-LOGIN-NAME: troy.lin@rock-chips.com -X-FST-TO: u-boot@lists.denx.de -X-SENDER-IP: 58.22.7.114 -X-ATTACHMENT-NUM: 0 -X-DNS-TYPE: 0 -X-System-Flag: 0 -From: Lin Jinhan -To: u-boot@lists.denx.de, - sughosh.ganu@linaro.org, - xypron.glpk@gmx.de -Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, - Lin Jinhan -Subject: [PATCH 2/5] arm: dts: rockchip: px30: add and enable rng node -Date: Tue, 31 Mar 2020 17:39:58 +0800 -Message-Id: <20200331094001.13441-2-troy.lin@rock-chips.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> -References: <20200331094001.13441-1-troy.lin@rock-chips.com> -X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Add enable rng node in px30-evb-u-boot.dtsi. - -Signed-off-by: Lin Jinhan ---- - arch/arm/dts/px30-evb-u-boot.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi b/arch/arm/dts/px30-evb-u-boot.dtsi -index a2a2c07dcc..a73c215c05 100644 ---- a/arch/arm/dts/px30-evb-u-boot.dtsi -+++ b/arch/arm/dts/px30-evb-u-boot.dtsi -@@ -12,6 +12,13 @@ - chosen { - u-boot,spl-boot-order = &emmc, &sdmmc; - }; -+ -+ rng: rng@ff0b0000 { -+ compatible = "rockchip,cryptov2-rng"; -+ reg = <0x0 0xff0b0000 0x0 0x4000>; -+ status = "okay"; -+ }; -+ - }; - - &dmc { - -From patchwork Tue Mar 31 09:39:59 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Lin Jinhan -X-Patchwork-Id: 1264693 -Return-Path: -X-Original-To: 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B1262A3EF8; - Tue, 31 Mar 2020 17:40:04 +0800 (CST) -X-MAIL-GRAY: 0 -X-MAIL-DELIVERY: 1 -X-ADDR-CHECKED: 0 -X-ANTISPAM-LEVEL: 2 -X-ABS-CHECKED: 0 -Received: from localhost.localdomain (unknown [58.22.7.114]) - by smtp.263.net (postfix) whith ESMTP id - P29487T139780956792576S1585647603180703_; - Tue, 31 Mar 2020 17:40:04 +0800 (CST) -X-IP-DOMAINF: 1 -X-UNIQUE-TAG: <78d4a197cac8da659f7b02fbce5e0ad8> -X-RL-SENDER: troy.lin@rock-chips.com -X-SENDER: troy.lin@rock-chips.com -X-LOGIN-NAME: troy.lin@rock-chips.com -X-FST-TO: u-boot@lists.denx.de -X-SENDER-IP: 58.22.7.114 -X-ATTACHMENT-NUM: 0 -X-DNS-TYPE: 0 -X-System-Flag: 0 -From: Lin Jinhan -To: u-boot@lists.denx.de, - sughosh.ganu@linaro.org, - xypron.glpk@gmx.de -Cc: kever.yang@rock-chips.com, zhangzj@rock-chips.com, - Lin Jinhan -Subject: [PATCH 3/5] rockchip: rng: Add a driver for random number - generator(rng) device -Date: Tue, 31 Mar 2020 17:39:59 +0800 -Message-Id: <20200331094001.13441-3-troy.lin@rock-chips.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> -References: <20200331094001.13441-1-troy.lin@rock-chips.com> -X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Add a driver for the rng device found on rockchip platforms. -Support rng module of crypto v1 and crypto v2. - -Signed-off-by: Lin Jinhan ---- - drivers/rng/Kconfig | 8 ++ - drivers/rng/Makefile | 1 + - drivers/rng/rockchip_rng.c | 224 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 233 insertions(+) - create mode 100644 drivers/rng/rockchip_rng.c - -diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig -index edb6152bb9..e4b22d79eb 100644 ---- a/drivers/rng/Kconfig -+++ b/drivers/rng/Kconfig -@@ -31,4 +31,12 @@ config RNG_STM32MP1 - help - Enable STM32MP1 rng driver. - -+config RNG_ROCKCHIP -+ bool "Enable random number generator for rockchip crypto rng" -+ depends on ARCH_ROCKCHIP && DM_RNG -+ default n -+ help -+ Enable random number generator for rockchip.This driver is -+ support rng module of crypto v1 and crypto v2. -+ - endif -diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile -index 6a8a66779b..44a0003917 100644 ---- a/drivers/rng/Makefile -+++ b/drivers/rng/Makefile -@@ -7,3 +7,4 @@ obj-$(CONFIG_DM_RNG) += rng-uclass.o - obj-$(CONFIG_RNG_MESON) += meson-rng.o - obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o - obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o -+obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o -diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c -new file mode 100644 -index 0000000000..47fb140077 ---- /dev/null -+++ b/drivers/rng/rockchip_rng.c -@@ -0,0 +1,224 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define RK_HW_RNG_MAX 32 -+ -+#define _SBF(s, v) ((v) << (s)) -+ -+/* start of CRYPTO V1 register define */ -+#define CRYPTO_V1_CTRL 0x0008 -+#define CRYPTO_V1_RNG_START BIT(8) -+#define CRYPTO_V1_RNG_FLUSH BIT(9) -+ -+#define CRYPTO_V1_TRNG_CTRL 0x0200 -+#define CRYPTO_V1_OSC_ENABLE BIT(16) -+#define CRYPTO_V1_TRNG_SAMPLE_PERIOD(x) (x) -+ -+#define CRYPTO_V1_TRNG_DOUT_0 0x0204 -+/* end of CRYPTO V1 register define */ -+ -+/* start of CRYPTO V2 register define */ -+#define CRYPTO_V2_RNG_CTL 0x0400 -+#define CRYPTO_V2_RNG_64_BIT_LEN _SBF(4, 0x00) -+#define CRYPTO_V2_RNG_128_BIT_LEN _SBF(4, 0x01) -+#define CRYPTO_V2_RNG_192_BIT_LEN _SBF(4, 0x02) -+#define CRYPTO_V2_RNG_256_BIT_LEN _SBF(4, 0x03) -+#define CRYPTO_V2_RNG_FATESY_SOC_RING _SBF(2, 0x00) -+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_0 _SBF(2, 0x01) -+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_1 _SBF(2, 0x02) -+#define CRYPTO_V2_RNG_SLOWEST_SOC_RING _SBF(2, 0x03) -+#define CRYPTO_V2_RNG_ENABLE BIT(1) -+#define CRYPTO_V2_RNG_START BIT(0) -+#define CRYPTO_V2_RNG_SAMPLE_CNT 0x0404 -+#define CRYPTO_V2_RNG_DOUT_0 0x0410 -+/* end of CRYPTO V2 register define */ -+ -+#define RK_RNG_TIME_OUT 50000 /* max 50ms */ -+ -+struct rk_rng_soc_data { -+ int (*rk_rng_read)(struct udevice *dev, void *data, size_t len); -+}; -+ -+struct rk_rng_platdata { -+ fdt_addr_t base; -+ struct rk_rng_soc_data *soc_data; -+}; -+ -+static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size) -+{ -+ u32 count = RK_HW_RNG_MAX / sizeof(u32); -+ u32 reg, tmp_len; -+ -+ if (size > RK_HW_RNG_MAX) -+ return -EINVAL; -+ -+ while (size && count) { -+ reg = readl(addr); -+ tmp_len = min(size, sizeof(u32)); -+ memcpy(buf, ®, tmp_len); -+ addr += sizeof(u32); -+ buf += tmp_len; -+ size -= tmp_len; -+ count--; -+ } -+ -+ return 0; -+} -+ -+static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len) -+{ -+ struct rk_rng_platdata *pdata = dev_get_priv(dev); -+ u32 reg = 0; -+ int retval; -+ -+ if (len > RK_HW_RNG_MAX) -+ return -EINVAL; -+ -+ /* enable osc_ring to get entropy, sample period is set as 100 */ -+ writel(CRYPTO_V1_OSC_ENABLE | CRYPTO_V1_TRNG_SAMPLE_PERIOD(100), -+ pdata->base + CRYPTO_V1_TRNG_CTRL); -+ -+ rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START, -+ CRYPTO_V1_RNG_START); -+ -+ retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg, -+ !(reg & CRYPTO_V1_RNG_START), -+ RK_RNG_TIME_OUT); -+ if (retval) -+ goto exit; -+ -+ rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len); -+ -+exit: -+ /* close TRNG */ -+ rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START); -+ -+ return 0; -+} -+ -+static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len) -+{ -+ struct rk_rng_platdata *pdata = dev_get_priv(dev); -+ u32 reg = 0; -+ int retval; -+ -+ if (len > RK_HW_RNG_MAX) -+ return -EINVAL; -+ -+ /* enable osc_ring to get entropy, sample period is set as 100 */ -+ writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT); -+ -+ reg |= CRYPTO_V2_RNG_256_BIT_LEN; -+ reg |= CRYPTO_V2_RNG_SLOWER_SOC_RING_0; -+ reg |= CRYPTO_V2_RNG_ENABLE; -+ reg |= CRYPTO_V2_RNG_START; -+ -+ rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg); -+ -+ retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg, -+ !(reg & CRYPTO_V2_RNG_START), -+ RK_RNG_TIME_OUT); -+ if (retval) -+ goto exit; -+ -+ rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len); -+ -+exit: -+ /* close TRNG */ -+ rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff); -+ -+ return retval; -+} -+ -+static int rockchip_rng_read(struct udevice *dev, void *data, size_t len) -+{ -+ unsigned char *buf = data; -+ unsigned int i; -+ int ret = -EIO; -+ -+ struct rk_rng_platdata *pdata = dev_get_priv(dev); -+ -+ if (!len) -+ return 0; -+ -+ if (!pdata->soc_data || !pdata->soc_data->rk_rng_read) -+ return -EINVAL; -+ -+ for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) { -+ ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX); -+ if (ret) -+ goto exit; -+ } -+ -+ if (len % RK_HW_RNG_MAX) -+ ret = pdata->soc_data->rk_rng_read(dev, buf, -+ len % RK_HW_RNG_MAX); -+ -+exit: -+ return ret; -+} -+ -+static int rockchip_rng_ofdata_to_platdata(struct udevice *dev) -+{ -+ struct rk_rng_platdata *pdata = dev_get_priv(dev); -+ -+ memset(pdata, 0x00, sizeof(*pdata)); -+ -+ pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev); -+ if (!pdata->base) -+ return -ENOMEM; -+ -+ return 0; -+} -+ -+static int rockchip_rng_probe(struct udevice *dev) -+{ -+ struct rk_rng_platdata *pdata = dev_get_priv(dev); -+ -+ pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev); -+ -+ return 0; -+} -+ -+static const struct rk_rng_soc_data rk_rng_v1_soc_data = { -+ .rk_rng_read = rk_v1_rng_read, -+}; -+ -+static const struct rk_rng_soc_data rk_rng_v2_soc_data = { -+ .rk_rng_read = rk_v2_rng_read, -+}; -+ -+static const struct dm_rng_ops rockchip_rng_ops = { -+ .read = rockchip_rng_read, -+}; -+ -+static const struct udevice_id rockchip_rng_match[] = { -+ { -+ .compatible = "rockchip,cryptov1-rng", -+ .data = (ulong)&rk_rng_v1_soc_data, -+ }, -+ { -+ .compatible = "rockchip,cryptov2-rng", -+ .data = (ulong)&rk_rng_v2_soc_data, -+ }, -+ {}, -+}; -+ -+U_BOOT_DRIVER(rockchip_rng) = { -+ .name = "rockchip-rng", -+ .id = UCLASS_RNG, -+ .of_match = rockchip_rng_match, -+ .ops = &rockchip_rng_ops, -+ .probe = rockchip_rng_probe, -+ .ofdata_to_platdata = rockchip_rng_ofdata_to_platdata, -+ .priv_auto_alloc_size = sizeof(struct rk_rng_platdata), -+}; - -From patchwork Tue Mar 31 09:40:00 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Lin Jinhan -X-Patchwork-Id: 1264696 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org 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<20200331094001.13441-1-troy.lin@rock-chips.com> -X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled. - -Signed-off-by: Lin Jinhan ---- - configs/evb-rk3399_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig -index 3f74be3b3c..7f14e18b1b 100644 ---- a/configs/evb-rk3399_defconfig -+++ b/configs/evb-rk3399_defconfig -@@ -39,6 +39,8 @@ CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y - CONFIG_PWM_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 - 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kever.yang@rock-chips.com, zhangzj@rock-chips.com, - Lin Jinhan -Subject: [PATCH 5/5] rockchip: px30: Enable CONFIG_RNG_ROCKCHIP -Date: Tue, 31 Mar 2020 17:40:01 +0800 -Message-Id: <20200331094001.13441-5-troy.lin@rock-chips.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200331094001.13441-1-troy.lin@rock-chips.com> -References: <20200331094001.13441-1-troy.lin@rock-chips.com> -X-Mailman-Approved-At: Tue, 31 Mar 2020 13:35:19 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled. - -Signed-off-by: Lin Jinhan ---- - configs/evb-px30_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig -index b5ba75cc6e..d2cf13e54a 100644 ---- a/configs/evb-px30_defconfig -+++ b/configs/evb-px30_defconfig -@@ -85,6 +85,8 @@ CONFIG_SPL_RAM=y - CONFIG_TPL_RAM=y - CONFIG_ROCKCHIP_SDRAM_COMMON=y - CONFIG_DM_RESET=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - # CONFIG_SPECIFY_CONSOLE_INDEX is not set - CONFIG_DEBUG_UART_SHIFT=2 - CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/arm-tegra-define-fdtfile-option-for-distro-boot.patch b/arm-tegra-define-fdtfile-option-for-distro-boot.patch index 4f065ff..923ccb1 100644 --- a/arm-tegra-define-fdtfile-option-for-distro-boot.patch +++ b/arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -1,6 +1,6 @@ -From ce2493a9dec8af2dd57839e337b002d256d2a842 Mon Sep 17 00:00:00 2001 +From c3332b102d2ddae01710ae8f4393a2a18a3a1bb3 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 31 Mar 2020 10:38:41 +0100 +Date: Tue, 12 May 2020 08:19:48 +0100 Subject: [PATCH] arm: tegra: define fdtfile option for distro boot For booting via UEFI we need to define the fdtfile option so @@ -20,12 +20,12 @@ Signed-off-by: Peter Robinson 7 files changed, 12 insertions(+) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h -index f2cdd9c019..997b50394b 100644 +index 175c55c613..8026f4b32e 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h -@@ -55,6 +55,12 @@ - #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) - #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) +@@ -52,6 +52,12 @@ + /* Boot Argument Buffer Size */ + #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +#ifdef CONFIG_ARM64 +#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" @@ -109,5 +109,5 @@ index 54bc6756ab..6c5dc24b26 100644 "ramdisk_addr_r=0x83100000\0" -- -2.26.0 +2.26.2 diff --git a/initial-support-for-the-Pinebook-Pro-laptop-from.patch b/initial-support-for-the-Pinebook-Pro-laptop-from.patch index defa2f6..b8b6f34 100644 --- a/initial-support-for-the-Pinebook-Pro-laptop-from.patch +++ b/initial-support-for-the-Pinebook-Pro-laptop-from.patch @@ -49,11 +49,11 @@ Signed-off-by: Peter Robinson create mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 820ee9733a..885bf0ef58 100644 +index 1325134bd4..c4d8ffb13c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ - rk3399-nanopi-m4.dtb \ +@@ -129,6 +129,7 @@ + rk3399-nanopi-m4-2gb.dtb \ rk3399-nanopi-neo4.dtb \ rk3399-orangepi.dtb \ + rk3399-pinebook-pro.dtb \ diff --git a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch index 0efd838..0e30129 100644 --- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +++ b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -1,6 +1,6 @@ -From 7bf054b1b2e1e4105e94642e18fc74a63eccce97 Mon Sep 17 00:00:00 2001 +From 7389a936fbd5ccaae7c39d38d1440e0359f9d0e5 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 4 Dec 2018 15:26:59 +0000 +Date: Tue, 12 May 2020 08:14:26 +0100 Subject: [PATCH] rpi: Use firmware provided device tree Signed-off-by: Peter Robinson @@ -13,70 +13,70 @@ Signed-off-by: Peter Robinson 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index 66b0de31b60..9446465fdf7 100644 +index 5053a38822..3c6af2b367 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig -@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" - CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index ba75e52dda0..d324e2bdd33 100644 +index 0000a759f1..f27c5ab1f6 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig -@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" - CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index bbcdd91e909..46816cd1da7 100644 +index a714f9ec49..90ce6ea22e 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig -@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y +@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" - CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index 54b6303c2d8..f05ddf8f61f 100644 +index 244d9b3a78..f72d6d35e2 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig -@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y +@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" - CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index e7820cb147b..d248873174d 100644 +index 64bb184c2b..645dbbec33 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig -@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" - CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y -- -2.19.2 +2.26.2 diff --git a/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch b/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch new file mode 100644 index 0000000..3b9726c --- /dev/null +++ b/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch @@ -0,0 +1,62 @@ +From 50e353960a36f381f855b34b40117c64dc44ad33 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 12 May 2020 23:23:01 +0100 +Subject: [PATCH] config: Enable support for the XHCI controller on RPI4 board + +From: Marek Szyprowski + +This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI +and USB commands. To get it working one has to call the following commands: +"pci enum; usb start;", thus such commands have been added to the default +"preboot" environment variable. One has to update their environment if it +is already configured to get this feature working out of the box. + +Signed-off-by: Marek Szyprowski +Signed-off-by: Sylwester Nawrocki +--- + configs/rpi_4_defconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index f1c8f5ef7d..b3e7037bf5 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_ARCH_FIXUP_FDT_MEMORY=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_DFU=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +@@ -27,12 +31,17 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_MANUFACTURER="FSL" + CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +-- +2.26.2 + diff --git a/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch b/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch new file mode 100644 index 0000000..a9c00c3 --- /dev/null +++ b/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch @@ -0,0 +1,40 @@ +From c9a14b02aea84a37407df7d295e0f76eb529f472 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 12 May 2020 11:29:00 +0100 +Subject: [PATCH] rpi4: enable ARCH_FIXUP_FDT_MEMORY + +Signed-off-by: Peter Robinson +--- + configs/rpi_4_32b_defconfig | 2 +- + configs/rpi_4_defconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index dd7da1cf06..9a0437d376 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -7,7 +7,7 @@ + CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_ARCH_FIXUP_FDT_MEMORY=y + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 6eeec4592e..b3e7037bf5 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -7,7 +7,7 @@ + CONFIG_NR_DRAM_BANKS=2 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_ARCH_FIXUP_FDT_MEMORY=y + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +-- +2.26.2 + diff --git a/sources b/sources index 875b362..926a830 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.07-rc1.tar.bz2) = 345b451652ca8bf539f6629ce618113d66ff6690a1f9ccf5a5a4638e6f30c0302fe4af365b5751fa229b09dd354de1db1480c869f511384855d32f692a95acf7 +SHA512 (u-boot-2020.07-rc2.tar.bz2) = d4ee96a76cde9305a8733602ce8f9505412f9118e5625f3154249d302445e1c9f970bcf38abb63536129885f3443d1c9fdf9c4e8851e2c1655050d1ebcea7bd2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 044a7c4..2c6e05f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2020.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,21 +22,23 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement Patch4: usb-kbd-fixes.patch -Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch6: dragonboard-fixes.patch +Patch5: dragonboard-fixes.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # Rockchips improvements -Patch12: arm-dts-rockchip-rk3399-add-and-enable-rng-node.patch -Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch14: initial-support-for-the-Pinebook-Pro-laptop-from.patch -Patch15: rockpro64-limit-speed-on-mSD-slot.patch +Patch12: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch13: initial-support-for-the-Pinebook-Pro-laptop-from.patch +Patch14: rockpro64-limit-speed-on-mSD-slot.patch # AllWinner improvements -Patch16: AllWinner-Pine64-bits.patch +Patch15: AllWinner-Pine64-bits.patch # RPi4 -Patch17: USB-host-support-for-Raspberry-Pi-4-board.patch +Patch16: USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch +Patch17: usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch +Patch18: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch19: rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch +Patch20: rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch BuildRequires: bc BuildRequires: dtc @@ -250,6 +252,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue May 12 2020 Peter Robinson - 2020.07-0.2.rc2 +- 2020.07 RC2 +- Minor device updates + * Wed Apr 29 2020 Peter Robinson - 2020.07-0.1.rc1 - 2020.07 RC1 diff --git a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch new file mode 100644 index 0000000..4b5f19c --- /dev/null +++ b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch @@ -0,0 +1,361 @@ +From patchwork Tue May 5 16:26:06 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1283753 +X-Patchwork-Delegate: marek.vasut@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49GlV44bJCz9sT0 + for ; Wed, 6 May 2020 02:26:36 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id C14658209E; + Tue, 5 May 2020 18:26:25 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + 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16:26:19 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v3 1/2] arm: rpi: Add function to trigger VL805's firmware load +Date: Tue, 5 May 2020 18:26:06 +0200 +Message-Id: <20200505162607.334-2-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> +References: <20200505162607.334-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware +may either be loaded directly from an EEPROM or, if not present, by the +SoC's VideCore (the SoC's co-processor). Introduce the function that +informs VideCore that VL805 may need its firmware loaded. + +Signed-off-by: Nicolas Saenz Julienne +--- +Changes since v2: + - Correct wrong function name in comment + - Add better comment on rpi_firmware_init_vl805() + +Changes since v1: + - Rename function so it's not mistaken with regular firmware loading + + arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ + arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ + arch/arm/mach-bcm283x/msg.c | 45 +++++++++++++++++++++++ + 3 files changed, 65 insertions(+) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 60e226ce1d..2ae2d3d97c 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette { + } body; + }; + ++#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058 ++ ++struct bcm2835_mbox_tag_pci_dev_addr { ++ struct bcm2835_mbox_tag_hdr tag_hdr; ++ union { ++ struct { ++ u32 dev_addr; ++ } req; ++ struct { ++ } resp; ++ } body; ++}; ++ + /* + * Pass a raw u32 message to the VC, and receive a raw u32 back. + * +diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h +index 4afb08631b..f5213dd0e0 100644 +--- a/arch/arm/mach-bcm283x/include/mach/msg.h ++++ b/arch/arm/mach-bcm283x/include/mach/msg.h +@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, + int pixel_order, int alpha_mode, ulong *fb_basep, + ulong *fb_sizep, int *pitchp); + ++/** ++ * bcm2711_notify_vl805_reset() - get vl805's firmware loaded ++ * ++ * @return 0 if OK, -EIO on error ++ */ ++int bcm2711_notify_vl805_reset(void); ++ + #endif +diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c +index 94b75283f8..f8ef531652 100644 +--- a/arch/arm/mach-bcm283x/msg.c ++++ b/arch/arm/mach-bcm283x/msg.c +@@ -40,6 +40,12 @@ struct msg_setup { + u32 end_tag; + }; + ++struct msg_notify_vl805_reset { ++ struct bcm2835_mbox_hdr hdr; ++ struct bcm2835_mbox_tag_pci_dev_addr dev_addr; ++ u32 end_tag; ++}; ++ + int bcm2835_power_on_module(u32 module) + { + ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1); +@@ -151,3 +157,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, + + return 0; + } ++ ++/* ++ * The Raspberry Pi 4 gets its USB functionality from VL805, a PCIe chip that ++ * implements xHCI. After a PCI reset, VL805's firmware may either be loaded ++ * directly from an EEPROM or, if not present, by the SoC's co-processor, ++ * VideoCore. RPi4's VideoCore OS contains both the non public firmware load ++ * logic and the VL805 firmware blob. This function triggers the aforementioned ++ * process. ++ */ ++int bcm2711_notify_vl805_reset(void) ++{ ++ ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset, ++ msg_notify_vl805_reset, 1); ++ int ret; ++ ++ BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset); ++ BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr, ++ NOTIFY_XHCI_RESET); ++ ++ /* ++ * The pci device address is expected like this: ++ * ++ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12 ++ * ++ * But since RPi4's PCIe setup is hardwired, we know the address in ++ * advance. ++ */ ++ msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000; ++ ++ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, ++ &msg_notify_vl805_reset->hdr); ++ if (ret) { ++ printf("bcm2711: Faild to load vl805's firmware, %d\n", ret); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ + +From patchwork Tue May 5 16:26:07 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1283757 +X-Patchwork-Delegate: marek.vasut@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49GlVQ0MyZz9sT0 + for ; Wed, 6 May 2020 02:26:52 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 40A20820AB; + Tue, 5 May 2020 18:26:27 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id A816381C4C; Tue, 5 May 2020 18:26:22 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id E5F898196A + for ; Tue, 5 May 2020 18:26:19 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id EB82AAF5D; + Tue, 5 May 2020 16:26:21 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v3 2/2] usb: xhci: Load Raspberry Pi 4 VL805's firmware +Date: Tue, 5 May 2020 18:26:07 +0200 +Message-Id: <20200505162607.334-3-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> +References: <20200505162607.334-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +When needed, RPi4's co-processor (called VideoCore) has to be instructed +to load VL805's firmware (the chip providing xHCI support). VideCore's +firmware expects the board's PCIe bus to be already configured in order +for it to load the xHCI chip firmware. So we have to make sure this +happens in between the PCIe configuration and xHCI startup. + +Introduce a callback in xhci_pci_probe() to run this platform specific +routine. + +Signed-off-by: Nicolas Saenz Julienne +--- + +Changes since v2: + - Get rid of #ifdef CONFIG_BCM2711 + - Get rid of redundant error message + +Changes since v1: + - Create callback + + board/raspberrypi/rpi/rpi.c | 6 ++++++ + drivers/usb/host/xhci-pci.c | 6 ++++++ + include/usb/xhci.h | 3 +++ + 3 files changed, 15 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index e367ba3092..dcaf45fbf2 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -494,3 +495,8 @@ int ft_board_setup(void *blob, bd_t *bd) + + return 0; + } ++ ++void xhci_pci_fixup(struct udevice *dev) ++{ ++ bcm2711_notify_vl805_reset(); ++} +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index c1f60da541..1285dde1ef 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -11,6 +11,10 @@ + #include + #include + ++__weak void xhci_pci_fixup(struct udevice *dev) ++{ ++} ++ + static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + struct xhci_hcor **ret_hcor) + { +@@ -40,6 +44,8 @@ static int xhci_pci_probe(struct udevice *dev) + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + ++ xhci_pci_fixup(dev); ++ + xhci_pci_init(dev, &hccr, &hcor); + + return xhci_register(dev, hccr, hcor); +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index c16106a2fc..57feed7603 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -16,6 +16,7 @@ + #ifndef HOST_XHCI_H_ + #define HOST_XHCI_H_ + ++#include + #include + #include + #include +@@ -1281,4 +1282,6 @@ extern struct dm_usb_ops xhci_usb_ops; + + struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); + ++extern void xhci_pci_fixup(struct udevice *dev); ++ + #endif /* HOST_XHCI_H_ */ From 599c805196c41c57911d377f9cff64ad39c86934 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 10 Jun 2020 13:33:14 +0100 Subject: [PATCH 086/351] 2020.07 RC4 --- ...port-for-Raspberry-Pi-4-board-64-bit.patch | 2121 +++-------------- ...nable-rng-on-rock960-and-firefly3399.patch | 94 +- ...ort-for-the-Pinebook-Pro-laptop-from.patch | 1573 ------------ mmc-sdhci-Fix-HISPD-bit-handling.patch | 182 ++ rockchip-Pinebook-Pro-Fixes.patch | 200 ++ rockpro64-limit-speed-on-mSD-slot.patch | 28 - ...pport-for-the-XHCI-controller-on-RPI.patch | 62 - rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch | 40 - sources | 2 +- uboot-tools.spec | 21 +- 10 files changed, 730 insertions(+), 3593 deletions(-) delete mode 100644 initial-support-for-the-Pinebook-Pro-laptop-from.patch create mode 100644 mmc-sdhci-Fix-HISPD-bit-handling.patch create mode 100644 rockchip-Pinebook-Pro-Fixes.patch delete mode 100644 rockpro64-limit-speed-on-mSD-slot.patch delete mode 100644 rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch delete mode 100644 rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch diff --git a/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch b/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch index 3e76ea9..720b1ba 100644 --- a/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch +++ b/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch @@ -1,990 +1,30 @@ -From patchwork Tue May 12 18:47:08 2020 -Content-Type: text/plain; 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- Tue, 12 May 2020 18:47:40 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: james.quinlan@broadcom.com, nsaenzjulienne@suse.de, sjg@chromium.org, - jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, - Sylwester Nawrocki -Subject: [PATCH v3 1/9] usb: xhci: Add missing cache flush in the scratchpad - array initialization -Date: Tue, 12 May 2020 20:47:08 +0200 -Message-Id: <20200512184716.2869-2-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsWy7djPc7q+73fFGWxeLm2xccZ6VoupPfEW - e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs - HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BEcdmkpOZklqUW6dslcGXc - XfWasWAKZ8XHpQeYGhjPsncxcnJICJhIrF/3BMjm4hASWMEo8fr8L1YI5wujxJmdXcwQzmdG - idPv17PAtNxZtJQRIrGcUWLemw8scC33Vj8EG8wmYCjRe7SPEcQWEQiQuPZzGlgHs8BRRok1 - +/+AjRIWSJbY+GYJmM0ioCpxsucAmM0rYCXx7u4iVoh18hKrNxxgBrE5Bawlrm8+BnaThMAq - dokV/6ZAveEiMXnjaqgGYYlXx7dAxWUk/u+czwTR0Mwo0bP7NjuEM4FR4v7xBYwQVdYSd879 - Yuti5AC6T1Ni/S59EFNCwFHi83MtCJNP4sZbQZBiZiBz0rbpzBBhXomONiGIGSoSv1dNZ4Kw - pSS6n/yHhpaHxIFJu8DOFxLoY5SY9NFzAqP8LIRVCxgZVzGKp5YW56anFhvnpZbrFSfmFpfm - pesl5+duYgSmmtP/jn/dwbjvT9IhRgEORiUe3oj6XXFCrIllxZW5hxglOJiVRHhbMnfGCfGm - JFZWpRblxxeV5qQWH2KU5mBREuc1XvQyVkggPbEkNTs1tSC1CCbLxMEp1cAY8FeRl+/HltTN - X4Xs903RVHy5e6dgqpeg0jm+4OVBkrPvpUVJPnj+KVdkzo41t/PuMjReEPlxUCtyWmyHz103 - rgXPZq0ykbWOfJ3YefagS9XPQu/PB+O5tq6w9/7zm4Vf6+bV1z8qDodnyLT/WPJqT6T6+32H - jgl/27XgeAnrlllibgaZdotvKrEUZyQaajEXFScCAAKlHx8xAwAA -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsVy+t/xu7o+73fFGUxZr2+xccZ6VoupPfEW - e9/0s1nc+NXGarH2yF12izdtjYwWCyY/YbXYNms5m8XhN+2sFt+2bGO0eLu3k92B22PW/bNs - HrMbLrJ4zJt1gsVj56y77B5n7+xg9OjbsorRY/2Wqywem09XB3BE6dkU5ZeWpCpk5BeX2CpF - G1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GXcXfWasWAKZ8XHpQeYGhjPsncx - cnJICJhI3Fm0lLGLkYtDSGApo8SCbWtZuhg5gBJSEvNblCBqhCX+XOtig6j5xCixZOleFpAE - m4ChRO/RPkYQW0QgROLF0StMIEXMAmcZJRZ1fmAFSQgLJErMbDgGZrMIqEqc7DkA1swrYCXx - 7u4iVogN8hKrNxxgBrE5Bawlrm8+BmYLAdXs+faObQIj3wJGhlWMIqmlxbnpucWGesWJucWl - eel6yfm5mxiBgb/t2M/NOxgvbQw+xCjAwajEw8tQuytOiDWxrLgy9xCjBAezkghvS+bOOCHe - lMTKqtSi/Pii0pzU4kOMpkBHTWSWEk3OB0ZlXkm8oamhuYWlobmxubGZhZI4b4fAwRghgfTE - ktTs1NSC1CKYPiYOTqkGRvHA5utdDK+71Gc8yncU/Jl1s8GwlfnWtf/fvVcf2j1n1dGNJtMn - +bzXEb/JdkYl/OLZA3Vvo7aKLFyzg7Gsd9N+h4PpR6bHn7zJ79VRWnHmnV1WVtDq6BmPbh3d - 8qTxqqDqXif96Ra5p80yGxK5+NgP7Gd22F52neeB/7I+A4//v1Y946i/MFmJpTgj0VCLuag4 - EQDJGyeQkgIAAA== -X-CMS-MailID: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 -X-Msg-Generator: CA -X-RootMTR: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9 -References: <20200512184716.2869-1-s.nawrocki@samsung.com> - -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean +From 47d0df70fbe5997770090aca05b07d774a19a722 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 10 Jun 2020 13:15:45 +0100 +Subject: [PATCH] USB host support for Raspberry Pi 4 board (64-bit) -In current code there is no cache flush after initializing the scratchpad -buffer array with the scratchpad buffer pointers. This leads to a failure -of the "slot enable" command on the rpi4 board (Broadcom STB PCIe -controller + VL805 USB hub) - the very first TRB transfer on the command -ring fails and there is a timeout while waiting for the command completion -event. After adding the missing cache flush everything seems to be working -as expected. - -Signed-off-by: Sylwester Nawrocki -Reviewed-by: Bin Meng -Reviewed-by: Nicolas Saenz Julienne +Signed-off-by: Peter Robinson --- -Changes since v1: - - none. ---- - drivers/usb/host/xhci-mem.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index 93450ee..729bdc3 100644 ---- a/drivers/usb/host/xhci-mem.c -+++ b/drivers/usb/host/xhci-mem.c -@@ -393,6 +393,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - scratchpad->sp_array[i] = cpu_to_le64(ptr); - } - -+ xhci_flush_cache((uintptr_t)scratchpad->sp_array, -+ sizeof(u64) * num_sp); -+ - return 0; - - fail_sp3: - -From patchwork Tue May 12 18:47:09 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288726 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Tue, 12 May 2020 18:47:43 +0000 (GMT) -From: Sylwester Nawrocki -To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com -Cc: james.quinlan@broadcom.com, nsaenzjulienne@suse.de, sjg@chromium.org, - jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, - Sylwester Nawrocki , Sergey Temerkhanov - -Subject: [PATCH v3 2/9] usb: xhci: Use only 32-bit accesses in - xhci_writeq/xhci_readq -Date: Tue, 12 May 2020 20:47:09 +0200 -Message-Id: <20200512184716.2869-3-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRju2845O5qL05R8M8EYRRhecdQhLylJnh8ikpJSNFt5UPHappb1 - Q0NZzjuJGou8NGyhpKlrOW95NxLTJE1KUcMyRQu1RTPRnEfr3/M+l/d9+PhIvqgatyNjEpJZ - eYIsTkxYYvp+07Bz8I8WqVtrhxfd8KAep0vyIuj2pUKCnlhX4vSz3ikBvaS8i+jK4jmc1qu1 - BN2zdA+nq9UdAvqXTo/o5XaVwNeKUU8PEczDjHcYU65+jTEG9ZSAGZpsRkyBrgYx9boxjGka - vBNMXrL0imTjYlJZuavPVctoQ3EVnrRG3VrJ1hAZaFaYgyxIoCSge1mO5yBLUkQ9RfBdtUhw - w08Ekwuju8MaAlONUrAXaVQqESdoETR8LOH9i+hqX/DMLoJyh/y+AmTGNlQwjJtKdxJ8yojg - Te4IZhasqTBQjc4SZoxRx0G7odkJC6kz8HWwA+POOUDt806+GVtQnvChqZ9vXgRUnQDaCvMJ - zuQPBqMK57A1LA7odrvaw5ahgscFMhHktX4ScEMRgumBSsS5PGHy7fr2JnK7nyPUt7hytB9U - /NbzzDRQB2Bi+aCZ5m/D+/oyPkcLIVsp4tzH4E9NGY/DdpA7t7Xbn4G1vjoB90IFCDK7THgR - clD/P1aJUA2yZVMU8VGswiOBvemikMUrUhKiXK4nxjei7c8zuDlgbEYdG9e6EUUisZUwPL1F - KsJlqYq0+G4EJF9sI8yKMUhFwkhZ2m1WnhghT4ljFd3oCImJbYUejxeuiKgoWTIby7JJrHxP - 5ZEWdhno9GbOeQf7Vl+Jk8nnRLVIMhTnGHaoR+Kq6kppqzi7fMF7ZSKwp9d/3njKu0UyrZUG - Tc84TXaFfjOi1dHQi/OJY5rxG6VPqoZfHVWpIoICwvcHhkCAW2Rr+8RI+rBGmV13+Zzmi/Oj - GTj8WYhQFa/Or3a1d19tQ2xI5/ssqU2BGFNEy9xP8uUK2V8p3t8YOAMAAA== -X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmphkeLIzCtJLcpLzFFi42I5/e/4XV3/97viDHb26llsnLGe1WJqT7zF - 3jf9bBY3frWxWqw9cpfd4k1bI6PFgslPWC22zVrOZnH4TTurxdJZ+9gtvm3Zxmjxdm8nuwOP - x6z7Z9k8ZjdcZPGYN+sEi8fOWXfZPc7e2cHo0bdlFaPH+i1XWTw2n64O4IjSsynKLy1JVcjI - Ly6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3s0lJzcksSy3St0vQy9g5eSFrwWeBio8di9ka - GB/ydjFyckgImEhsamtj7GLk4hASWMoosWrtQiCHAyghJTG/RQmiRljiz7UuNoiaT4wSjVff - soAk2AQMJXqP9jGC2CICIRIvjl5hAiliFvjLKDGp9QkrSEJYIFTi7tP5YDaLgKrE8j+LmUBs - XgEriWen97FAbJCXWL3hADOIzSlgLXF98zEwWwioZs+3d2wTGPkWMDKsYhRJLS3OTc8tNtQr - TswtLs1L10vOz93ECIyBbcd+bt7BeGlj8CFGAQ5GJR5ehtpdcUKsiWXFlbmHGCU4mJVEeFsy - d8YJ8aYkVlalFuXHF5XmpBYfYjQFOmois5Rocj4wPvNK4g1NDc0tLA3Njc2NzSyUxHk7BA7G - CAmkJ5akZqemFqQWwfQxcXBKNTB6nbS75KLLcXaSEefxVQuf7fj8f9bj7/+W83UdTBPtbEo9 - LXT2+/znb9WWx/X7dl++fTu/uqBaPixV8t3/v6YG/SXmdQ/NeHqaT3MnmTe3rbNZkZFrr1IY - y//PRYDVYEtvSsrjr8UK0VdCpk42XPb0vaNeRErYDM4ZZm4ajV3LF4k56rzcN0uJpTgj0VCL - uag4EQCTL19flwIAAA== -X-CMS-MailID: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 -X-Msg-Generator: CA -X-RootMTR: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58 -References: <20200512184716.2869-1-s.nawrocki@samsung.com> - -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -There might be hardware configurations where 64-bit data accesses -to XHCI registers are not supported properly. This patch removes -the readq/writeq so always two 32-bit accesses are used to read/write -64-bit XHCI registers, similarly as it is done in Linux kernel. - -This patch fixes operation of the XHCI controller on RPI4 Broadcom -BCM2711 SoC based board, where the VL805 USB XHCI controller is -connected to the PCIe Root Complex, which is attached to the system -through the SCB bridge. - -Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely -the 64-bit wide register accesses initiated by the CPU are not properly -translated to a sequence of 32-bit PCIe accesses. -xhci_readq(), for example, always returns same value in upper and lower -32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234. - -Cc: Sergey Temerkhanov -Signed-off-by: Sylwester Nawrocki -Reviewed-by: Bin Meng -Reviewed-by: Nicolas Saenz Julienne ---- -Changes since v1: - - none. -Changes since RFC: - - dropped Kconfig option, switched to not using readq/writeq - unconditionally. ---- - include/usb/xhci.h | 8 -------- - 1 file changed, 8 deletions(-) - -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index 6017504..c16106a 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -1111,28 +1111,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) - */ - static inline u64 xhci_readq(__le64 volatile *regs) - { --#if BITS_PER_LONG == 64 -- return readq(regs); --#else - __u32 *ptr = (__u32 *)regs; - u64 val_lo = readl(ptr); - u64 val_hi = readl(ptr + 1); - return val_lo + (val_hi << 32); --#endif - } - - static inline void xhci_writeq(__le64 volatile *regs, const u64 val) - { --#if BITS_PER_LONG == 64 -- writeq(val, regs); --#else - __u32 *ptr = (__u32 *)regs; - u32 val_lo = lower_32_bits(val); - /* FIXME */ - u32 val_hi = upper_32_bits(val); - writel(val_lo, ptr); - writel(val_hi, ptr + 1); --#endif - } - - int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, - -From patchwork Tue May 12 18:47:10 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288728 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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-X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Some PCI Express register offsets are currently defined in multiple -drivers, move them to a common header to avoid re-definitions and -as a pre-requisite for adding new PCIe driver. -While at it replace some spaces with tabs. - -Signed-off-by: Sylwester Nawrocki -Reviewed-by: Bin Meng -Reviewed-by: Nicolas Saenz Julienne ---- -Changes since v1: - - none. -Changes since RFC: - - whitespace clean up. ---- - drivers/pci/pci-rcar-gen3.c | 8 -------- - drivers/pci/pcie_intel_fpga.c | 3 --- - include/pci.h | 13 +++++++++++-- - 3 files changed, 11 insertions(+), 13 deletions(-) - -diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c -index 30eff67..393f1c9 100644 ---- a/drivers/pci/pci-rcar-gen3.c -+++ b/drivers/pci/pci-rcar-gen3.c -@@ -117,14 +117,6 @@ - #define RCAR_PCI_MAX_RESOURCES 4 - #define MAX_NR_INBOUND_MAPS 6 - --#define PCI_EXP_FLAGS 2 /* Capabilities register */ --#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ --#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ --#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ --#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ --#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ --#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -- - enum { - RCAR_PCI_ACCESS_READ, - RCAR_PCI_ACCESS_WRITE, -diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c -index 6a9f29c..69363a0 100644 ---- a/drivers/pci/pcie_intel_fpga.c -+++ b/drivers/pci/pcie_intel_fpga.c -@@ -65,9 +65,6 @@ - #define IS_ROOT_PORT(pcie, bdf) \ - ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) - --#define PCI_EXP_LNKSTA 18 /* Link Status */ --#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -- - /** - * struct intel_fpga_pcie - Intel FPGA PCIe controller state - * @bus: Pointer to the PCI bus -diff --git a/include/pci.h b/include/pci.h -index aff56b2..dfdbb32 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -471,10 +471,19 @@ - #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ - - /* PCI Express capabilities */ -+#define PCI_EXP_FLAGS 2 /* Capabilities register */ -+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ -+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ - #define PCI_EXP_DEVCAP 4 /* Device capabilities */ --#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ -+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ - #define PCI_EXP_DEVCTL 8 /* Device Control */ --#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ -+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ -+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ -+#define PCI_EXP_LNKSTA 18 /* Link Status */ -+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ -+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ - 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-X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -Remove the overlap between DRAM and device's IO area. - -Signed-off-by: Marek Szyprowski -Signed-off-by: Sylwester Nawrocki -Reviewed-by: Nicolas Saenz Julienne ---- -Changes since v1: - - none. ---- - arch/arm/mach-bcm283x/init.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) + arch/arm/mach-bcm283x/init.c | 20 +- + configs/rpi_4_defconfig | 9 + + configs/rpi_arm64_defconfig | 8 +- + drivers/pci/Kconfig | 9 + + drivers/pci/Makefile | 1 + + drivers/pci/pci-rcar-gen3.c | 8 - + drivers/pci/pcie_brcmstb.c | 623 ++++++++++++++++++++++++++++++++++ + drivers/pci/pcie_intel_fpga.c | 3 - + drivers/usb/host/xhci-mem.c | 3 + + include/linux/bitfield.h | 52 +++ + include/pci.h | 22 +- + include/usb/xhci.h | 8 - + 12 files changed, 740 insertions(+), 26 deletions(-) + create mode 100644 drivers/pci/pcie_brcmstb.c diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 9966d6c..4295356 100644 +index f4d00d892d..cf4c5b245d 100644 --- a/arch/arm/mach-bcm283x/init.c +++ b/arch/arm/mach-bcm283x/init.c -@@ -38,7 +38,7 @@ static struct mm_region bcm2711_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -- .size = 0xfe000000UL, -+ .size = 0xfc000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { - -From patchwork Tue May 12 18:47:12 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288730 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Marek Szyprowski - -Create a non-cacheable mapping for the 0x600000000 physical memory region, -where MMIO registers for the PCIe XHCI controller are instantiated by the -PCIe bridge. - -Signed-off-by: Marek Szyprowski -Signed-off-by: Sylwester Nawrocki -Reviewed-by: Nicolas Saenz Julienne ---- -Changes since v2: - - fixed typo MAX_MAP_MAX_ENTRIES -> MEM_MAP_MAX_ENTRIES -Changes since v1: - - none. ---- - arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++--- - 1 file changed, 15 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 4295356..9f5bca3 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -11,10 +11,15 @@ +@@ -12,10 +12,15 @@ #include #include @@ -1001,7 +41,7 @@ index 4295356..9f5bca3 100644 { .virt = 0x00000000UL, .phys = 0x00000000UL, -@@ -34,7 +39,7 @@ static struct mm_region bcm283x_mem_map[] = { +@@ -35,11 +40,11 @@ static struct mm_region bcm283x_mem_map[] = { } }; @@ -1010,21 +50,26 @@ index 4295356..9f5bca3 100644 { .virt = 0x00000000UL, .phys = 0x00000000UL, +- .size = 0xfe000000UL, ++ .size = 0xfc000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { @@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = { + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { ++ }, { + .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, + .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, + .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { + }, { /* List terminator */ 0, - } -@@ -71,7 +83,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) +@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) { int i; @@ -1033,638 +78,90 @@ index 4295356..9f5bca3 100644 mem_map[i].virt = pd[i].virt; mem_map[i].phys = pd[i].phys; mem_map[i].size = pd[i].size; - -From patchwork Tue May 12 18:47:13 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288732 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -From: Nicolas Saenz Julienne - -Imports Al Viro's original Linux commit 00b0c9b82663a, which contains -an in depth explanation and two fixes from Johannes Berg: - e7d4a95da86e0 "bitfield: fix *_encode_bits()", - 37a3862e12382 "bitfield: add u8 helpers". - -Signed-off-by: Nicolas Saenz Julienne -[s.nawrocki: added empty lines between functions and macros] -Signed-off-by: Sylwester Nawrocki ---- -Changes since v1: - - added empty lines between functions and macros. - -Changes since RFC: - - new patch. ---- - include/linux/bitfield.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - -diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h -index 8b9d6ff..7acba4c 100644 ---- a/include/linux/bitfield.h -+++ b/include/linux/bitfield.h -@@ -103,4 +103,54 @@ - (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ - }) - -+extern void __compiletime_error("value doesn't fit into mask") -+__field_overflow(void); -+extern void __compiletime_error("bad bitfield mask") -+__bad_mask(void); -+static __always_inline u64 field_multiplier(u64 field) -+{ -+ if ((field | (field - 1)) & ((field | (field - 1)) + 1)) -+ __bad_mask(); -+ return field & -field; -+} -+static __always_inline u64 field_mask(u64 field) -+{ -+ return field / field_multiplier(field); -+} -+ -+#define ____MAKE_OP(type,base,to,from) \ -+static __always_inline __##type type##_encode_bits(base v, base field) \ -+{ \ -+ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ -+ __field_overflow(); \ -+ return to((v & field_mask(field)) * field_multiplier(field)); \ -+} \ -+static __always_inline __##type type##_replace_bits(__##type old, \ -+ base val, base field) \ -+{ \ -+ return (old & ~to(field)) | type##_encode_bits(val, field); \ -+} \ -+static __always_inline void type##p_replace_bits(__##type *p, \ -+ base val, base field) \ -+{ \ -+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ -+} \ -+static __always_inline base type##_get_bits(__##type v, base field) \ -+{ \ -+ return (from(v) & field)/field_multiplier(field); \ -+} -+ -+#define __MAKE_OP(size) \ -+ ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \ -+ ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \ -+ ____MAKE_OP(u##size,u##size,,) -+ -+____MAKE_OP(u8,u8,,) -+__MAKE_OP(16) -+__MAKE_OP(32) -+__MAKE_OP(64) -+ -+#undef __MAKE_OP -+#undef ____MAKE_OP -+ - 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definitions -Date: Tue, 12 May 2020 20:47:14 +0200 -Message-Id: <20200512184716.2869-8-s.nawrocki@samsung.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> -X-Brightmail-Tracker: H4sIAAAAAAAAA0WSfUhTURjGObt323U6uV4FDysQhoUFaaLgJUUqpW4QaP1lxrSZFzXnB7vT - siBXyTS/MXQyQ6dBs6lpOYabzGqls0Qtxa9STDHF0kLLcqYt59X67/c+53nO+3A4GELUckVY - SrqClqdLZWKeADX22AeP5H0zxx1VLviTT6pbuWRlcTxpWSrjkeMbKi7Z8mqKTy6pbgFSe2+O - Sxo1Oh75cimfS/40GAG5bLnLP+5Kaab7eVSN8h1K1Wp6UcqkmeJT/ZMdgCo16AHVahhBqfa+ - G9FYrCAskZalZNPygPBLguTBolkks8v9mvK1GlGCdddC4IJBPBh+LankFwIBRuCNAFavlvHY - 4QeAM58+ok4XgX8HULUQtZeoaejisCYdgGrdEPdfQmfJ5zhdPDwQlnSXAid74dFw1F4FnCYE - 7waw+dnmzrWeeCwsGOjdCaD4AWhvuo84WYgfg1vvGzjsOh/Y1PZ8R3fBQ+FYew/C6g/5cP6B - H8uRcO2LhceyJ/xsM/BZ3g8dprqdqhC/A2Bx5wc+O5QDOG3TAtYVCicHNrbT2Ha9Q7DVHMDK - J+DKozXglCHuDseXPZwyso0VRjXCykJYoCJYty/8rVfvVhbBojkHyjIF+yre7j5pKYCWF/1o - OfDR/F+mBUAPvOksJi2JZoLS6av+jDSNyUpP8r+ckfYUbP+avj+2tQ7QtZlgBTgGxG7CmFxz - HMGVZjM5aVYAMUTsJcxLMcURwkRpznVanhEvz5LRjBXsw1CxtzCoYVFC4ElSBZ1K05m0fO+U - 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- none. -Changes since RFC: - - ensure the entries are added in order, sorted by ascending - address values. ---- - include/pci.h | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/include/pci.h b/include/pci.h -index dfdbb32..ff5f620 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -479,11 +479,20 @@ - #define PCI_EXP_DEVCTL 8 /* Device Control */ - #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ - #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ -+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ - #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ - #define PCI_EXP_LNKSTA 18 /* Link Status */ -+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ -+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ -+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ -+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ -+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ -+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ - #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ - #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ - #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ - - /* Include the ID list */ - - -From patchwork Tue May 12 18:47:15 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288734 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=samsung.com -Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; - unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256 - 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-X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -This patch adds basic driver PCI Express controller found on Broadcom -set-top-box SoCs, e.g. BCM2711. -The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI -handling removed. The inbound access memory region is not currently -parsed from dma-ranges DT property and a fixed 3GB region is used. - -The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805 -USB Host Controller. - -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Sylwester Nawrocki ---- -Changes since v2: - - removed MDO_RD_DONE, MDIO_WT_DONE macro definitions, - - updated the Kconfig entry help text, - - reordered #include entries to match the coding style, - - s/udev/dev, - - s/ENODEV/EINVAL in brcm_pcie_probe() and brcm_pcie_config_address() - functions, - - Simplified brcm_pcie_mdio_{read, write} functions (readl_poll_timeout), - - shortened register bit fields macro definitions, - - dropped brcm_pcie_perst_set() and brcm_pcie_bridge_sw_init_set() - function in favour of direct clrbits_le32/setbits_le32 calls, - - use setbits_le32/clrbits_le32/clrsetbits_le32 instead of - readl(), u32p_replace_bits(), writel() sequence - - simplified brcm_pcie_config_address(), brcm_pcie_set_gen() functions, - - changed reset pulse delay to 100 us, - - Replaced FIELD_GET() with open coded bitwise operations, - - brcm_cpie_cfg_index() function merged into brcm_pcie_config_address(), - - use standard PCI PCI_EXP_LNKSTA_CLS_* link speed defines - - added kernel-doc function comments. - -Changes since v1: - - fixed argument in brcm_pcie_set_ssc() function call, - - changed rc_bar2_size assignment to value 0xC0000000, as in upstream - devicetree. -Changes since RFC: - - reworked to align with current Linux mainline version and u-boot - driver by Nicolas Saenz Julienne. ---- - drivers/pci/Kconfig | 9 + - drivers/pci/Makefile | 1 + - drivers/pci/pcie_brcmstb.c | 623 +++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 633 insertions(+) - create mode 100644 drivers/pci/pcie_brcmstb.c - +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index f0301dc8bc..b42efe6072 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ENV_SIZE=0x4000 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_DFU=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_MANUFACTURER="FSL" + CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index d16c2388af..0feea7f0be 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000 + CONFIG_DISTRO_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_USE_PREBOOT=y +-CONFIG_PREBOOT="usb start" ++CONFIG_PREBOOT="pci enum; usb start;" + CONFIG_MISC_INIT_R=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y +@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_BCM2835=y + CONFIG_DM_ETH=y + CONFIG_BCMGENET=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PCI=y + CONFIG_USB_DWC2=y + CONFIG_USB_KEYBOARD=y + CONFIG_USB_HOST_ETHER=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig -index 437cd9a..543bd46 100644 +index 6d8c22aacf..7e1e51d9ea 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig -@@ -197,4 +197,13 @@ config PCIE_MEDIATEK - Say Y here if you want to enable Gen2 PCIe controller, - which could be found on MT7623 SoC family. +@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP + Say Y here if you want to enable PCIe controller support on + Rockchip SoCs. +config PCI_BRCMSTB + bool "Broadcom STB PCIe controller" @@ -1677,17 +174,37 @@ index 437cd9a..543bd46 100644 + of the controller. endif diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile -index c051ecc..3e53b1f 100644 +index 955351c5c2..3e1ff417d7 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile -@@ -43,3 +43,4 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o +@@ -43,4 +43,5 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o +obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o + obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o +diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c +index df7b37a592..1f51854ccc 100644 +--- a/drivers/pci/pci-rcar-gen3.c ++++ b/drivers/pci/pci-rcar-gen3.c +@@ -118,14 +118,6 @@ + #define RCAR_PCI_MAX_RESOURCES 4 + #define MAX_NR_INBOUND_MAPS 6 + +-#define PCI_EXP_FLAGS 2 /* Capabilities register */ +-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ +-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ +-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ +- + enum { + RCAR_PCI_ACCESS_READ, + RCAR_PCI_ACCESS_WRITE, diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c new file mode 100644 -index 0000000..dade79e +index 0000000000..dade79e9c8 --- /dev/null +++ b/drivers/pci/pcie_brcmstb.c @@ -0,0 +1,623 @@ @@ -2314,213 +831,163 @@ index 0000000..dade79e + .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct brcm_pcie), +}; +diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c +index aa1903e547..9f102c64c6 100644 +--- a/drivers/pci/pcie_intel_fpga.c ++++ b/drivers/pci/pcie_intel_fpga.c +@@ -67,9 +67,6 @@ + #define IS_ROOT_PORT(pcie, bdf) \ + ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) + +-#define PCI_EXP_LNKSTA 18 /* Link Status */ +-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ +- + /** + * struct intel_fpga_pcie - Intel FPGA PCIe controller state + * @bus: Pointer to the PCI bus +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index 2d968aafb0..f446520528 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + scratchpad->sp_array[i] = cpu_to_le64(ptr); + } + ++ xhci_flush_cache((uintptr_t)scratchpad->sp_array, ++ sizeof(u64) * num_sp); ++ + return 0; + + fail_sp3: +diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h +index 8b9d6fff00..7ad8b088ed 100644 +--- a/include/linux/bitfield.h ++++ b/include/linux/bitfield.h +@@ -103,4 +103,56 @@ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + ++extern void __compiletime_error("value doesn't fit into mask") ++__field_overflow(void); ++extern void __compiletime_error("bad bitfield mask") ++__bad_mask(void); ++ ++static __always_inline u64 field_multiplier(u64 field) ++{ ++ if ((field | (field - 1)) & ((field | (field - 1)) + 1)) ++ __bad_mask(); ++ return field & -field; ++} ++ ++static __always_inline u64 field_mask(u64 field) ++{ ++ return field / field_multiplier(field); ++} ++ ++#define ____MAKE_OP(type, base, to, from) \ ++static __always_inline __##type type##_encode_bits(base v, base field) \ ++{ \ ++ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ ++ __field_overflow(); \ ++ return to((v & field_mask(field)) * field_multiplier(field)); \ ++} \ ++static __always_inline __##type type##_replace_bits(__##type old, \ ++ base val, base field) \ ++{ \ ++ return (old & ~to(field)) | type##_encode_bits(val, field); \ ++} \ ++static __always_inline void type##p_replace_bits(__##type * p, \ ++ base val, base field) \ ++{ \ ++ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ ++} \ ++static __always_inline base type##_get_bits(__##type v, base field) \ ++{ \ ++ return (from(v) & field) / field_multiplier(field); \ ++} ++ ++#define __MAKE_OP(size) \ ++ ____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \ ++ ____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \ ++ ____MAKE_OP(u##size, u##size, ,) ++ ++____MAKE_OP(u8, u8, ,) ++__MAKE_OP(16) ++__MAKE_OP(32) ++__MAKE_OP(64) ++ ++#undef __MAKE_OP ++#undef ____MAKE_OP ++ + #endif +diff --git a/include/pci.h b/include/pci.h +index 19c9244b94..281f353916 100644 +--- a/include/pci.h ++++ b/include/pci.h +@@ -471,10 +471,28 @@ + #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ + + /* PCI Express capabilities */ ++#define PCI_EXP_FLAGS 2 /* Capabilities register */ ++#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ ++#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ + #define PCI_EXP_DEVCAP 4 /* Device capabilities */ +-#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ ++#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ + #define PCI_EXP_DEVCTL 8 /* Device Control */ +-#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ ++#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ ++#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ ++#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ ++#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ ++#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ ++#define PCI_EXP_LNKSTA 18 /* Link Status */ ++#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ ++#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ ++#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ ++#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ ++#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ ++#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ ++#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ ++#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ ++#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ ++#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ + + /* Include the ID list */ + +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index 20e4a21066..1170c0ac69 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) + */ + static inline u64 xhci_readq(__le64 volatile *regs) + { +-#if BITS_PER_LONG == 64 +- return readq(regs); +-#else + __u32 *ptr = (__u32 *)regs; + u64 val_lo = readl(ptr); + u64 val_hi = readl(ptr + 1); + return val_lo + (val_hi << 32); +-#endif + } + + static inline void xhci_writeq(__le64 volatile *regs, const u64 val) + { +-#if BITS_PER_LONG == 64 +- writeq(val, regs); +-#else + __u32 *ptr = (__u32 *)regs; + u32 val_lo = lower_32_bits(val); + /* FIXME */ + u32 val_hi = upper_32_bits(val); + writel(val_lo, ptr); + writel(val_hi, ptr + 1); +-#endif + } + + int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, +-- +2.26.2 -From patchwork Tue May 12 18:47:16 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sylwester Nawrocki -X-Patchwork-Id: 1288735 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; 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To get it working one has to call the following commands: -"pci enum; usb start;", thus such commands have been added to the default -"preboot" environment variable. One has to update their environment if it -is already configured to get this feature working out of the box. - -Signed-off-by: Marek Szyprowski -Signed-off-by: Sylwester Nawrocki ---- -Changes since v2: - - rpi_4_32b_defconfig, rpi_4_defconfig changes moved to separate - patch -Changes since v1: - - removed unneeded CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY entry. - -Changes since RFC: - - none. ---- - configs/rpi_arm64_defconfig | 8 +++++++- - 1 file changed, 7 insertions(+), 1 deletion(-) - -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index fea86be..f12d1e3 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -7,13 +7,14 @@ CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_USE_PREBOOT=y --CONFIG_PREBOOT="usb start" -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y -@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_DWC2=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y diff --git a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch index 0987100..8f28d1c 100644 --- a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +++ b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch @@ -1,15 +1,17 @@ -From 32f17a93e08227c56a655f9b85977569e4e5daa2 Mon Sep 17 00:00:00 2001 +From 88725c4d036bab25c900cc3c962fc42d94e0ab69 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 1 Apr 2020 10:44:09 +0100 +Date: Wed, 10 Jun 2020 13:26:43 +0100 Subject: [PATCH] arm: rk3399: enable rng on rock960 and firefly3399 Signed-off-by: Peter Robinson --- - arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ - arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ - configs/firefly-rk3399_defconfig | 2 ++ - configs/rock960-rk3399_defconfig | 2 ++ - 4 files changed, 12 insertions(+) + arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ + arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ + configs/firefly-rk3399_defconfig | 2 ++ + configs/rock960-rk3399_defconfig | 2 ++ + configs/rockpro64-rk3399_defconfig | 2 ++ + 6 files changed, 18 insertions(+) diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi index 38e0897db9..a6c7b913da 100644 @@ -24,7 +26,7 @@ index 38e0897db9..a6c7b913da 100644 + status = "okay"; +}; diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -index 82f2c311af..401ad02c45 100644 +index c190089e26..08292dbd39 100644 --- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi @@ -24,3 +24,7 @@ @@ -35,51 +37,11 @@ index 82f2c311af..401ad02c45 100644 +&rng { + status = "okay"; +}; -diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index 4c9f1e189b..27306b434f 100644 ---- a/configs/firefly-rk3399_defconfig -+++ b/configs/firefly-rk3399_defconfig -@@ -34,6 +34,8 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index ba4226e173..f823d0dabd 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -35,6 +35,8 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y --- -2.26.0 - -From 03a3e695cb24257e42a0a97abf7177ca788bedc4 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 1 Apr 2020 11:20:43 +0100 -Subject: [PATCH] arm: rk3399: enable rng on rockpro64 - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ - configs/rockpro64-rk3399_defconfig | 2 ++ - 2 files changed, 6 insertions(+) - diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index deaa3efd39..2e99ef71f4 100644 +index bac09df4a3..38fe3bb0ec 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -15,6 +15,10 @@ +@@ -25,6 +25,10 @@ }; }; @@ -90,11 +52,37 @@ index deaa3efd39..2e99ef71f4 100644 &vdd_center { regulator-min-microvolt = <950000>; regulator-max-microvolt = <950000>; +diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig +index 5bb54f5835..551687d6d0 100644 +--- a/configs/firefly-rk3399_defconfig ++++ b/configs/firefly-rk3399_defconfig +@@ -35,6 +35,8 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 59a85c78a1..f31cb92884 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -37,6 +37,8 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_NVME=y + CONFIG_PCI=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index 8074e4665a..285dccebe5 100644 +index 807747485a..f778f0b640 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig -@@ -34,6 +34,8 @@ CONFIG_MMC_DW=y +@@ -40,6 +40,8 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y @@ -104,5 +92,5 @@ index 8074e4665a..285dccebe5 100644 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y -- -2.26.0 +2.26.2 diff --git a/initial-support-for-the-Pinebook-Pro-laptop-from.patch b/initial-support-for-the-Pinebook-Pro-laptop-from.patch deleted file mode 100644 index b8b6f34..0000000 --- a/initial-support-for-the-Pinebook-Pro-laptop-from.patch +++ /dev/null @@ -1,1573 +0,0 @@ -From a3e23dca57bff1043bd6c746458dae2dd446948e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 19 Apr 2020 10:31:53 +0100 -Subject: [PATCH 2/5] dt-bindings: input: adopt Linux gpio-keys binding - constants - -Sync the gpio-keys input bindings from linux 5.7-rc1. - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/input/gpio-keys.h | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - create mode 100644 include/dt-bindings/input/gpio-keys.h - -diff --git a/include/dt-bindings/input/gpio-keys.h b/include/dt-bindings/input/gpio-keys.h -new file mode 100644 -index 0000000000..8962df79e7 ---- /dev/null -+++ b/include/dt-bindings/input/gpio-keys.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * This header provides constants for gpio keys bindings. -+ */ -+ -+#ifndef _DT_BINDINGS_GPIO_KEYS_H -+#define _DT_BINDINGS_GPIO_KEYS_H -+ -+#define EV_ACT_ANY 0x00 /* asserted or deasserted */ -+#define EV_ACT_ASSERTED 0x01 /* asserted */ -+#define EV_ACT_DEASSERTED 0x02 /* deasserted */ -+ -+#endif /* _DT_BINDINGS_GPIO_KEYS_H */ --- -2.26.1 - -From 27f56eec1fa5baa4fc82ebb356a50826bb9f5643 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 19 Apr 2020 13:28:51 +0100 -Subject: [PATCH 4/5] arm: dts: rockchip: Add initial DT for Pinebook Pro - -Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-pinebook-pro.dts | 1096 ++++++++++++++++++++++++++ - 2 files changed, 1097 insertions(+) - create mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 1325134bd4..c4d8ffb13c 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -129,6 +129,7 @@ - rk3399-nanopi-m4-2gb.dtb \ - rk3399-nanopi-neo4.dtb \ - rk3399-orangepi.dtb \ -+ rk3399-pinebook-pro.dtb \ - rk3399-puma-ddr1333.dtb \ - rk3399-puma-ddr1600.dtb \ - rk3399-puma-ddr1866.dtb \ -diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts -new file mode 100644 -index 0000000000..294d21bf45 ---- /dev/null -+++ b/arch/arm/dts/rk3399-pinebook-pro.dts -@@ -0,0 +1,1096 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * Copyright (c) 2018 Akash Gajjar -+ * Copyright (c) 2020 Tobias Schramm -+ */ -+ -+/dts-v1/; -+#include -+#include -+#include -+#include -+#include -+#include "rk3399.dtsi" -+#include "rk3399-opp.dtsi" -+ -+/ { -+ model = "Pine64 Pinebook Pro"; -+ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ backlight: edp-backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <&vcc_12v>; -+ pwms = <&pwm0 0 740740 0>; -+ }; -+ -+ edp_panel: edp-panel { -+ compatible = "boe,nv140fhmn49"; -+ backlight = <&backlight>; -+ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&panel_en_gpio>; -+ power-supply = <&vcc3v3_panel>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ panel_in_edp: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&edp_out_panel>; -+ }; -+ }; -+ }; -+ }; -+ -+ /* -+ * Use separate nodes for gpio-keys to allow for selective deactivation -+ * of wakeup sources via sysfs without disabling the whole key -+ */ -+ gpio-key-lid { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&lidbtn_gpio>; -+ -+ lid { -+ debounce-interval = <20>; -+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; -+ label = "Lid"; -+ linux,code = ; -+ linux,input-type = ; -+ wakeup-event-action = ; -+ wakeup-source; -+ }; -+ }; -+ -+ gpio-key-power { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn_gpio>; -+ -+ power { -+ debounce-interval = <20>; -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "Power"; -+ linux,code = ; -+ wakeup-source; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrled_gpio &slpled_gpio>; -+ -+ green-led { -+ color = ; -+ default-state = "on"; -+ function = LED_FUNCTION_POWER; -+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; -+ label = "green:power"; -+ }; -+ -+ red-led { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_STANDBY; -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "red:standby"; -+ panic-indicator; -+ retain-state-suspended; -+ }; -+ }; -+ -+ /* Power sequence for SDIO WiFi module */ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rk808 1>; -+ clock-names = "ext_clock"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h_gpio>; -+ post-power-on-delay-ms = <100>; -+ power-off-delay-us = <500000>; -+ -+ /* WL_REG_ON on module */ -+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ /* Audio components */ -+ es8316-sound { -+ compatible = "simple-audio-card"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hp_det_gpio>; -+ simple-audio-card,name = "rockchip,es8316-codec"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <256>; -+ -+ simple-audio-card,widgets = -+ "Microphone", "Mic Jack", -+ "Headphone", "Headphones", -+ "Speaker", "Speaker"; -+ simple-audio-card,routing = -+ "MIC1", "Mic Jack", -+ "Headphones", "HPOL", -+ "Headphones", "HPOR", -+ "Speaker Amplifier INL", "HPOL", -+ "Speaker Amplifier INR", "HPOR", -+ "Speaker", "Speaker Amplifier OUTL", -+ "Speaker", "Speaker Amplifier OUTR"; -+ -+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; -+ simple-audio-card,aux-devs = <&speaker_amp>; -+ simple-audio-card,pin-switches = "Speaker"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&es8316>; -+ }; -+ }; -+ -+ speaker_amp: speaker-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; -+ sound-name-prefix = "Speaker Amplifier"; -+ VCC-supply = <&pa_5v>; -+ }; -+ -+ /* Power tree */ -+ /* Root power source */ -+ vcc_sysin: vcc-sysin { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sysin"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ /* Regulators supplied by vcc_sysin */ -+ /* LCD backlight supply */ -+ vcc_12v: vcc-12v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_12v"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Main 3.3 V supply */ -+ vcc3v3_sys: wifi_bat: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ /* 5 V USB power supply */ -+ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwr_5v_gpio>; -+ regulator-name = "vcc5v0_usb"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* RK3399 logic supply */ -+ vdd_log: vdd-log { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm2 0 25000 1>; -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1400000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc3v3_sys */ -+ /* 0.9 V supply, always on */ -+ vcc_0v9: vcc-0v9 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_0v9"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* S3 1.8 V supply, switched by vcc1v8_s3 */ -+ vcca1v8_s3: vcc1v8-s3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcca1v8_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* micro SD card power */ -+ vcc3v0_sd: vcc3v0-sd { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_pwr_h_gpio>; -+ regulator-name = "vcc3v0_sd"; -+ regulator-always-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* LCD panel power, called VCC3V3_S0 in schematic */ -+ vcc3v3_panel: vcc3v3-panel { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&lcdvcc_en_gpio>; -+ regulator-name = "vcc3v3_panel"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-enable-ramp-delay = <100000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* M.2 adapter power, switched by vcc1v8_s3 */ -+ vcc3v3_ssd: vcc3v3-ssd { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_ssd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* Regulators supplied by vcc5v0_usb */ -+ /* USB 3 port power supply regulator */ -+ vcc5v0_otg: vcc5v0-otg { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_host_en_gpio>; -+ regulator-name = "vcc5v0_otg"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc5v0_usb */ -+ /* Type C port power supply regulator */ -+ vbus_5vout: vbus_typec: vbus-5vout { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_typec0_en_gpio>; -+ regulator-name = "vbus_5vout"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc_1v8 */ -+ /* Primary 0.9 V LDO */ -+ vcca0v9_s3: vcca0v9-s3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc0v9_s3"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ mains_charger: dc-charger { -+ compatible = "gpio-charger"; -+ charger-type = "mains"; -+ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; -+ -+ /* Also triggered by USB charger */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&dc_det_gpio>; -+ }; -+}; -+ -+&cdn_dp { -+ status = "okay"; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&edp { -+ force-hpd; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&edp_hpd>; -+ status = "okay"; -+ -+ ports { -+ edp_out: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ edp_out_panel: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&panel_in_edp>; -+ }; -+ }; -+ }; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-falling-time-ns = <4>; -+ i2c-scl-rising-time-ns = <168>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ interrupt-parent = <&gpio3>; -+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l_gpio>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sysin>; -+ vcc2-supply = <&vcc_sysin>; -+ vcc3-supply = <&vcc_sysin>; -+ vcc4-supply = <&vcc_sysin>; -+ vcc6-supply = <&vcc_sysin>; -+ vcc7-supply = <&vcc_sysin>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc_sysin>; -+ vcc10-supply = <&vcc_sysin>; -+ vcc11-supply = <&vcc_sysin>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vcc13-supply = <&vcc_sysin>; -+ vcc14-supply = <&vcc_sysin>; -+ -+ regulators { -+ /* rk3399 center logic supply */ -+ vdd_center: DCDC_REG1 { -+ regulator-name = "vdd_center"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: vcc_wl: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ /* not used */ -+ LDO_REG1 { -+ }; -+ -+ /* not used */ -+ LDO_REG2 { -+ }; -+ -+ vcc1v8_pmupll: LDO_REG3 { -+ regulator-name = "vcc1v8_pmupll"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sdio: LDO_REG4 { -+ regulator-name = "vcc_sdio"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG5 { -+ regulator-name = "vcca3v0_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca1v8_codec: LDO_REG7 { -+ regulator-name = "vcca1v8_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-name = "vcc_3v0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel1_gpio>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel2_gpio>; -+ regulator-name = "vdd_gpu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ i2c-scl-falling-time-ns = <4>; -+ i2c-scl-rising-time-ns = <168>; -+ status = "okay"; -+ -+ es8316: es8316@11 { -+ compatible = "everest,es8316"; -+ reg = <0x11>; -+ clocks = <&cru SCLK_I2S_8CH_OUT>; -+ clock-names = "mclk"; -+ #sound-dai-cells = <0>; -+ }; -+}; -+ -+&i2c3 { -+ i2c-scl-falling-time-ns = <15>; -+ i2c-scl-rising-time-ns = <450>; -+ status = "okay"; -+}; -+ -+&i2c4 { -+ i2c-scl-falling-time-ns = <20>; -+ i2c-scl-rising-time-ns = <600>; -+ status = "okay"; -+ -+ fusb0: fusb30x@22 { -+ compatible = "fcs,fusb302"; -+ reg = <0x22>; -+ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fusb0_int_gpio>; -+ vbus-supply = <&vbus_typec>; -+ -+ connector { -+ compatible = "usb-c-connector"; -+ data-role = "host"; -+ label = "USB-C"; -+ op-sink-microwatt = <1000000>; -+ power-role = "dual"; -+ sink-pdos = -+ ; -+ source-pdos = -+ ; -+ try-power-role = "sink"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ usbc_hs: endpoint { -+ remote-endpoint = -+ <&u2phy0_typec_hs>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ -+ usbc_ss: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_ss>; -+ }; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ -+ usbc_dp: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_dp>; -+ }; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2s1 { -+ #sound-dai-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; -+ rockchip,capture-channels = <8>; -+ rockchip,playback-channels = <8>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ audio-supply = <&vcc_3v0>; -+ gpio1830-supply = <&vcc_3v0>; -+ sdmmc-supply = <&vcc_sdio>; -+ status = "okay"; -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ bus-scan-delay-ms = <1000>; -+ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; -+ max-link-speed = <2>; -+ num-lanes = <4>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn_cpm>; -+ vpcie0v9-supply = <&vcca0v9_s3>; -+ vpcie1v8-supply = <&vcca1v8_s3>; -+ vpcie3v3-supply = <&vcc3v3_ssd>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ buttons { -+ pwrbtn_gpio: pwrbtn-gpio { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ lidbtn_gpio: lidbtn-gpio { -+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ dc-charger { -+ dc_det_gpio: dc-det-gpio { -+ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ es8316 { -+ hp_det_gpio: hp-det-gpio { -+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ fusb302x { -+ fusb0_int_gpio: fusb0-int-gpio { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ i2s1 { -+ i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { -+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; -+ }; -+ }; -+ -+ lcd-panel { -+ lcdvcc_en_gpio: lcdvcc-en-gpio { -+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ panel_en_gpio: panel-en-gpio { -+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ lcd_panel_reset_gpio: lcd-panel-reset-gpio { -+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ leds { -+ pwrled_gpio: pwrled_gpio { -+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ slpled_gpio: slpled_gpio { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l_gpio: pmic-int-l-gpio { -+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ vsel1_gpio: vsel1-gpio { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_gpio: vsel2-gpio { -+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ sdcard { -+ sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { -+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h_gpio: wifi-enable-h-gpio { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb-typec { -+ vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { -+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ usb2 { -+ pwr_5v_gpio: pwr-5v-gpio { -+ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { -+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ wireless-bluetooth { -+ bt_wake_gpio: bt-wake-gpio { -+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_host_wake_gpio: bt-host-wake-gpio { -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_reset_gpio: bt-reset-gpio { -+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pmu_io_domains { -+ pmu1830-supply = <&vcc_3v0>; -+ status = "okay"; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcca1v8_s3>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc3v0_sd>; -+ vqmmc-supply = <&vcc_sdio>; -+ status = "okay"; -+}; -+ -+&sdio0 { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ keep-power-in-suspend; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ mmc-hs200-1_8v; -+ non-removable; -+ status = "okay"; -+}; -+ -+&spi1 { -+ max-freq = <10000000>; -+ status = "okay"; -+ -+ spiflash: flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ m25p,fast-read; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&tcphy0 { -+ status = "okay"; -+}; -+ -+&tcphy0_dp { -+ port { -+ tcphy0_typec_dp: endpoint { -+ remote-endpoint = <&usbc_dp>; -+ }; -+ }; -+}; -+ -+&tcphy0_usb3 { -+ port { -+ tcphy0_typec_ss: endpoint { -+ remote-endpoint = <&usbc_ss>; -+ }; -+ }; -+}; -+ -+&tcphy1 { -+ status = "okay"; -+}; -+ -+&tsadc { -+ /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-mode = <1>; -+ /* tshut polarity 0:LOW 1:HIGH */ -+ rockchip,hw-tshut-polarity = <1>; -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+ -+ u2phy0_otg: otg-port { -+ status = "okay"; -+ }; -+ -+ u2phy0_host: host-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+ -+ port { -+ u2phy0_typec_hs: endpoint { -+ remote-endpoint = <&usbc_hs>; -+ }; -+ }; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+ -+ u2phy1_otg: otg-port { -+ status = "okay"; -+ }; -+ -+ u2phy1_host: host-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rk808 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; -+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; -+ max-speed = <1500000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; -+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; -+ vbat-supply = <&wifi_bat>; -+ vddio-supply = <&vcc_wl>; -+ }; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usbdrd3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usbdrd3_1 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_1 { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; --- -2.26.1 - -From 699fa59c59af63692269e133590d7664335b65ed Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 20 Apr 2020 20:07:04 +0100 -Subject: [PATCH 5/5] Add initial support for the Pinebook Pro laptop from - Pine64. - -Specification: -- Rockchip RK3399 -- 4GB Dual-Channel LPDDR4 -- eMMC socket -- mSD card slot -- 128Mbit (16Mb) SPI Flash -- AP6256 for 11AC WiFi + BT5 -- 14 inch 1920*1080 eDP MiPi display -- Camera -- USB 3.0, 2.0 ports -- Type-C port with alt-mode display (DP 1.2) and 15W charge -- DC 5V/3A -- optional PCIe slot for NVMe SSD drive - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 43 ++++++++++ - arch/arm/mach-rockchip/rk3399/Kconfig | 8 ++ - board/pine64/pinebook-pro-rk3399/Kconfig | 15 ++++ - board/pine64/pinebook-pro-rk3399/MAINTAINERS | 8 ++ - board/pine64/pinebook-pro-rk3399/Makefile | 1 + - .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 76 +++++++++++++++++ - configs/pinebook-pro-rk3399_defconfig | 84 +++++++++++++++++++ - include/configs/pinebook-pro-rk3399.h | 29 +++++++ - 8 files changed, 264 insertions(+) - create mode 100644 arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi - create mode 100644 board/pine64/pinebook-pro-rk3399/Kconfig - create mode 100644 board/pine64/pinebook-pro-rk3399/MAINTAINERS - create mode 100644 board/pine64/pinebook-pro-rk3399/Makefile - create mode 100644 board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c - create mode 100644 configs/pinebook-pro-rk3399_defconfig - create mode 100644 include/configs/pinebook-pro-rk3399.h - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -new file mode 100644 -index 0000000000..1a2e24d3ef ---- /dev/null -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -0,0 +1,43 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2019 Peter Robinson -+ */ -+ -+#include "rk3399-u-boot.dtsi" -+#include "rk3399-sdram-lpddr4-100.dtsi" -+ -+/ { -+ aliases { -+ spi0 = &spi1; -+ }; -+ -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; -+ }; -+}; -+ -+&i2c0 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&rk808 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&sdhci { -+ max-frequency = <25000000>; -+ u-boot,dm-pre-reloc; -+}; -+ -+&sdmmc { -+ max-frequency = <20000000>; -+ u-boot,dm-pre-reloc; -+}; -+ -+&spiflash { -+ u-boot,dm-pre-reloc; -+}; -+ -+&vdd_log { -+ regulator-init-microvolt = <950000>; -+}; -diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig -index 927bb62a9f..254b9c5b4d 100644 ---- a/arch/arm/mach-rockchip/rk3399/Kconfig -+++ b/arch/arm/mach-rockchip/rk3399/Kconfig -@@ -19,6 +19,13 @@ config TARGET_EVB_RK3399 - with full function and physical connectors support like Type-C ports, - USB.0 host ports, LVDS, JTAG, MAC, SD card, HDMI, USB-to-serial... - -+config TARGET_PINEBOOK_PRO_RK3399 -+ bool "Pinebook Pro" -+ help -+ Pinebook Pro is a laptop based on the Rockchip rk3399 SoC -+ with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, -+ 1920*1080 screen and all the usual laptop features. -+ - config TARGET_PUMA_RK3399 - bool "Theobroma Systems RK3399-Q7 (Puma)" - help -@@ -144,6 +151,7 @@ endif # BOOTCOUNT_LIMIT - - source "board/firefly/roc-pc-rk3399/Kconfig" - source "board/google/gru/Kconfig" -+source "board/pine64/pinebook-pro-rk3399/Kconfig" - source "board/pine64/rockpro64_rk3399/Kconfig" - source "board/rockchip/evb_rk3399/Kconfig" - source "board/theobroma-systems/puma_rk3399/Kconfig" -diff --git a/board/pine64/pinebook-pro-rk3399/Kconfig b/board/pine64/pinebook-pro-rk3399/Kconfig -new file mode 100644 -index 0000000000..3bb7ca448e ---- /dev/null -+++ b/board/pine64/pinebook-pro-rk3399/Kconfig -@@ -0,0 +1,15 @@ -+if TARGET_PINEBOOK_PRO_RK3399 -+ -+config SYS_BOARD -+ default "pinebook-pro-rk3399" -+ -+config SYS_VENDOR -+ default "pine64" -+ -+config SYS_CONFIG_NAME -+ default "pinebook-pro-rk3399" -+ -+config BOARD_SPECIFIC_OPTIONS -+ def_bool y -+ -+endif -diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS b/board/pine64/pinebook-pro-rk3399/MAINTAINERS -new file mode 100644 -index 0000000000..7153eaf2e0 ---- /dev/null -+++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS -@@ -0,0 +1,8 @@ -+PINEBOOK_PRO -+M: Peter Robinson -+S: Maintained -+F: board/pine64/rk3399-pinebook-pro/ -+F: include/configs/rk3399-pinebook-pro.h -+F: arch/arm/dts/rk3399-pinebook-pro.dts -+F: arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+F: configs/pinebook-pro-rk3399_defconfig -diff --git a/board/pine64/pinebook-pro-rk3399/Makefile b/board/pine64/pinebook-pro-rk3399/Makefile -new file mode 100644 -index 0000000000..2f692a12a6 ---- /dev/null -+++ b/board/pine64/pinebook-pro-rk3399/Makefile -@@ -0,0 +1 @@ -+obj-y += pinebook-pro-rk3399.o -diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c -new file mode 100644 -index 0000000000..01421cbac2 ---- /dev/null -+++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c -@@ -0,0 +1,76 @@ -+/* -+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd -+ * (C) Copyright 2020 Peter Robinson -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define GRF_IO_VSEL_BT565_SHIFT 0 -+#define PMUGRF_CON0_VSEL_SHIFT 8 -+ -+#ifndef CONFIG_SPL_BUILD -+int board_early_init_f(void) -+{ -+ struct udevice *regulator; -+ int ret; -+ -+ ret = regulator_get_by_platname("vcc5v0_usb", ®ulator); -+ if (ret) { -+ debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret); -+ goto out; -+ } -+ -+ ret = regulator_set_enable(regulator, true); -+ if (ret) -+ debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret); -+ -+out: -+ return 0; -+} -+#endif -+ -+#ifdef CONFIG_MISC_INIT_R -+static void setup_iodomain(void) -+{ -+ struct rk3399_grf_regs *grf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); -+ struct rk3399_pmugrf_regs *pmugrf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); -+ -+ /* BT565 is in 1.8v domain */ -+ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); -+ -+ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ -+ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); -+} -+ -+int misc_init_r(void) -+{ -+ const u32 cpuid_offset = 0x7; -+ const u32 cpuid_length = 0x10; -+ u8 cpuid[cpuid_length]; -+ int ret; -+ -+ setup_iodomain(); -+ -+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); -+ if (ret) -+ return ret; -+ -+ ret = rockchip_cpuid_set(cpuid, cpuid_length); -+ if (ret) -+ return ret; -+ -+ return ret; -+} -+#endif -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -new file mode 100644 -index 0000000000..0e9f0ec250 ---- /dev/null -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -0,0 +1,84 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_ROCKCHIP_RK3399=y -+CONFIG_RAM_RK3399_LPDDR4=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_TARGET_PINEBOOK_PRO_RK3399=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART=y -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_DEBUG_UART_BASE=0xFF1A0000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_SPI_SUPPORT=y -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_MTD_SUPPORT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" -+CONFIG_MISC_INIT_R=y -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -+CONFIG_TPL=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_MTDPARTS=y -+CONFIG_CMD_PMIC=y -+CONFIG_CMD_REGULATOR=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_SF=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_USB=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_BOOTDELAY=3 -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_MISC=y -+CONFIG_ROCKCHIP_EFUSE=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_ROCKCHIP_SPI=y -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_SPI_FLASH=y -+CONFIG_SPI_FLASH_GIGADEVICE=y -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_DM_ETH=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_DM_PMIC_FAN53555=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+# CONFIG_USB_XHCI_ROCKCHIP is not set -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USE_TINY_PRINTF=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y -+CONFIG_DM_VIDEO=y -+CONFIG_VIDEO_BPP16=y -+CONFIG_VIDEO_BPP32=y -+CONFIG_DISPLAY=y -+CONFIG_VIDEO_ROCKCHIP=y -+CONFIG_DISPLAY_ROCKCHIP_EDP=y -diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h -new file mode 100644 -index 0000000000..423d742a79 ---- /dev/null -+++ b/include/configs/pinebook-pro-rk3399.h -@@ -0,0 +1,29 @@ -+/* -+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd -+ * Copyright (C) 2020 Peter Robinson -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __PINEBOOK_PRO_RK3399_H -+#define __PINEBOOK_PRO_RK3399_H -+ -+#define ROCKCHIP_DEVICE_SETTINGS \ -+ "stdin=serial,usbkbd\0" \ -+ "stdout=serial,vidconsole\0" \ -+ "stderr=serial,vidconsole\0" -+ -+#include -+ -+#if defined(CONFIG_ENV_IS_IN_MMC) -+#define CONFIG_SYS_MMC_ENV_DEV 0 -+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) -+#define CONFIG_ENV_SECT_SIZE (8 * 1024) -+#endif -+ -+#undef CONFIG_SYS_SPI_U_BOOT_OFFS -+#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512 -+ -+#define SDRAM_BANK_SIZE (2UL << 30) -+ -+#endif --- -2.26.1 -From 8239d91c6a120fb07df1f84c6441545856d968af Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 20 Apr 2020 22:43:05 +0100 -Subject: [PATCH] pinebook pro: enable rng for KASLR - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++ - configs/pinebook-pro-rk3399_defconfig | 2 ++ - 2 files changed, 6 insertions(+) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index 1a2e24d3ef..296321d697 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -24,6 +24,10 @@ - u-boot,dm-pre-reloc; - }; - -+&rng { -+ status = "okay"; -+}; -+ - &sdhci { - max-frequency = <25000000>; - u-boot,dm-pre-reloc; -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 0e9f0ec250..c15c17a1b0 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -59,6 +59,8 @@ CONFIG_PMIC_RK8XX=y - CONFIG_DM_PMIC_FAN53555=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_PWM_ROCKCHIP=y - CONFIG_SYSRESET=y - CONFIG_USB=y --- -2.26.1 diff --git a/mmc-sdhci-Fix-HISPD-bit-handling.patch b/mmc-sdhci-Fix-HISPD-bit-handling.patch new file mode 100644 index 0000000..03e1123 --- /dev/null +++ b/mmc-sdhci-Fix-HISPD-bit-handling.patch @@ -0,0 +1,182 @@ +From patchwork Wed Jun 10 11:43:47 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jagan Teki +X-Patchwork-Id: 1306828 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Wed, 10 Jun 2020 04:43:59 -0700 (PDT) +Received: from localhost.localdomain ([2405:201:c809:c7d5:9daa:1b72:7bd0:50df]) + by smtp.gmail.com with ESMTPSA id y4sm12934672pfr.182.2020.06.10.04.43.54 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 10 Jun 2020 04:43:58 -0700 (PDT) +From: Jagan Teki +To: Peng Fan , Jaehoon Chung , + Kever Yang +Cc: Marc Zyngier , sunil@amarulasolutions.com, + u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, + linux-amarula@amarulasolutions.com, + Jagan Teki , + Robin Murphy +Subject: [PATCH v3] mmc: sdhci: Fix HISPD bit handling +Date: Wed, 10 Jun 2020 17:13:47 +0530 +Message-Id: <20200610114347.118501-1-jagan@amarulasolutions.com> +X-Mailer: git-send-email 2.25.1 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +SDHCI HISPD bits need to be configured based on desired mmc +timings mode and some HISPD quirks. + +So, handle the HISPD bit based on the mmc computed selected +mode(timing parameter) rather than fixed mmc card clock +frequency. + +Linux handle the HISPD similar like this in below commit, + +commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") + +This eventually fixed the mmc write issue observed in +rk3399 sdhci controller. + +Bug log for refernece, +=> gpt write mmc 0 $partitions +Writing GPT: mmc write failed +** Can't write to device 0 ** +** Can't write to device 0 ** +error! + +Cc: Robin Murphy +Cc: Kever Yang +Cc: Peng Fan +Reviewed-by: Jaehoon Chung +Tested-by: Marc Zyngier # nanopc-t4 +Tested-by: Suniel Mahesh # roc-rk3399-pc +Signed-off-by: Jagan Teki +--- +Changes for v3: +- use && for quirk check. + + drivers/mmc/sdhci.c | 23 +++++++++++++++-------- + 1 file changed, 15 insertions(+), 8 deletions(-) + +diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c +index 92cc8434af..a7db278a0e 100644 +--- a/drivers/mmc/sdhci.c ++++ b/drivers/mmc/sdhci.c +@@ -594,14 +594,21 @@ static int sdhci_set_ios(struct mmc *mmc) + ctrl &= ~SDHCI_CTRL_4BITBUS; + } + +- if (mmc->clock > 26000000) +- ctrl |= SDHCI_CTRL_HISPD; +- else +- ctrl &= ~SDHCI_CTRL_HISPD; +- +- if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || +- (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) +- ctrl &= ~SDHCI_CTRL_HISPD; ++ if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) && ++ !(host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) { ++ if (mmc->selected_mode == MMC_HS || ++ mmc->selected_mode == SD_HS || ++ mmc->selected_mode == MMC_DDR_52 || ++ mmc->selected_mode == MMC_HS_200 || ++ mmc->selected_mode == MMC_HS_400 || ++ mmc->selected_mode == UHS_SDR25 || ++ mmc->selected_mode == UHS_SDR50 || ++ mmc->selected_mode == UHS_SDR104 || ++ mmc->selected_mode == UHS_DDR50) ++ ctrl |= SDHCI_CTRL_HISPD; ++ else ++ ctrl &= ~SDHCI_CTRL_HISPD; ++ } + + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + diff --git a/rockchip-Pinebook-Pro-Fixes.patch b/rockchip-Pinebook-Pro-Fixes.patch new file mode 100644 index 0000000..0b0a2d7 --- /dev/null +++ b/rockchip-Pinebook-Pro-Fixes.patch @@ -0,0 +1,200 @@ +From e27621a7c2c0e090977c17f604093c720ca01fe4 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 8 Jun 2020 20:31:33 +0100 +Subject: [PATCH 1/3] rockchip: Pinebook Pro: enable rng to provide an entropy + source + +Enable the rng so UEFI can provide entropy for KASLR + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++ + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ + configs/pinebook-pro-rk3399_defconfig | 2 ++ + 3 files changed, 10 insertions(+) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index 1a2e24d3ef..296321d697 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -24,6 +24,10 @@ + u-boot,dm-pre-reloc; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &sdhci { + max-frequency = <25000000>; + u-boot,dm-pre-reloc; +diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +index bac09df4a3..cb8991aa25 100644 +--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +@@ -19,6 +19,10 @@ + }; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &spi1 { + spi_flash: flash@0 { + u-boot,dm-pre-reloc; +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 0c129b9aeb..21eecf477c 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -54,6 +54,8 @@ CONFIG_DM_PMIC_FAN53555=y + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_PWM_ROCKCHIP=y + CONFIG_RAM_RK3399_LPDDR4=y + CONFIG_DM_RESET=y +-- +2.26.2 + +From 99a3c9ba5a8ab7a94aa700649e031f53d498e857 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 8 Jun 2020 22:23:05 +0100 +Subject: [PATCH 2/3] rockchip: Pinebook Pro: Fix USB and the USB attached + keyboard + +The built in keyboard on the Pinebook Pro is attached via USB so +fix this up to ensure USB works as expected. + +Signed-off-by: Peter Robinson +--- + configs/pinebook-pro-rk3399_defconfig | 5 +++++ + include/configs/pinebook-pro-rk3399.h | 3 +++ + 2 files changed, 8 insertions(+) + +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 21eecf477c..733463556a 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -61,6 +61,8 @@ CONFIG_RAM_RK3399_LPDDR4=y + CONFIG_DM_RESET=y + CONFIG_BAUDRATE=1500000 + CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="usb start" + CONFIG_ROCKCHIP_SPI=y + CONFIG_SYSRESET=y + CONFIG_USB=y +@@ -68,8 +70,11 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC3=y + CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_DM_KEYBOARD=y + CONFIG_USB_KEYBOARD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y +diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h +index 4bc8802d11..d910830582 100644 +--- a/include/configs/pinebook-pro-rk3399.h ++++ b/include/configs/pinebook-pro-rk3399.h +@@ -25,4 +25,7 @@ + + #define SDRAM_BANK_SIZE (2UL << 30) + ++#define CONFIG_USB_OHCI_NEW ++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 ++ + #endif +-- +2.26.2 + +From 64d43a4f0a135486a9a524b107c853831e492eb6 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 8 Jun 2020 23:41:50 +0100 +Subject: [PATCH 3/3] rockchip: Pinebook Pro: Fix SPI flash and store env on it + +Some minor fixes for SPI flash on the Pinebook Pro and also +default to saving environment to the SPI flash as it's +guaranteed to be on board. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 6 +++++- + configs/pinebook-pro-rk3399_defconfig | 3 +++ + include/configs/pinebook-pro-rk3399.h | 9 --------- + 3 files changed, 8 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index 296321d697..ded7db0aef 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -12,7 +12,11 @@ + }; + + chosen { +- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; ++ }; ++ ++ config { ++ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ + }; + }; + +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 733463556a..18b2d74253 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -1,6 +1,7 @@ + CONFIG_ARM=y + CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_ENV_SIZE=0x8000 + CONFIG_ROCKCHIP_RK3399=y + CONFIG_TARGET_PINEBOOK_PRO_RK3399=y + CONFIG_NR_DRAM_BANKS=1 +@@ -17,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 + CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_SPI_LOAD=y + CONFIG_TPL=y + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPIO=y +@@ -32,6 +34,7 @@ CONFIG_CMD_REGULATOR=y + CONFIG_SPL_OF_CONTROL=y + CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_SPI_FLASH=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y +diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h +index d910830582..d478b19917 100644 +--- a/include/configs/pinebook-pro-rk3399.h ++++ b/include/configs/pinebook-pro-rk3399.h +@@ -14,15 +14,6 @@ + + #include + +-#if defined(CONFIG_ENV_IS_IN_MMC) +-#define CONFIG_SYS_MMC_ENV_DEV 0 +-#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +-#define CONFIG_ENV_SECT_SIZE (8 * 1024) +-#endif +- +-#undef CONFIG_SYS_SPI_U_BOOT_OFFS +-#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512 +- + #define SDRAM_BANK_SIZE (2UL << 30) + + #define CONFIG_USB_OHCI_NEW +-- +2.26.2 + diff --git a/rockpro64-limit-speed-on-mSD-slot.patch b/rockpro64-limit-speed-on-mSD-slot.patch deleted file mode 100644 index 789ea26..0000000 --- a/rockpro64-limit-speed-on-mSD-slot.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 0b1a5b30d6d8ad2af9f5518b65fbbdc9e080d41d Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 20 Apr 2020 22:03:00 +0100 -Subject: [PATCH] rockpro64: limit speed on mSD slot - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index deaa3efd39..e5e05f5a7f 100644 ---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -19,6 +19,10 @@ - status = "okay"; - }; - -+&sdmmc { -+ max-frequency = <20000000>; -+}; -+ - &vdd_center { - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; --- -2.26.1 - diff --git a/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch b/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch deleted file mode 100644 index 3b9726c..0000000 --- a/rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 50e353960a36f381f855b34b40117c64dc44ad33 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 12 May 2020 23:23:01 +0100 -Subject: [PATCH] config: Enable support for the XHCI controller on RPI4 board - -From: Marek Szyprowski - -This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI -and USB commands. To get it working one has to call the following commands: -"pci enum; usb start;", thus such commands have been added to the default -"preboot" environment variable. One has to update their environment if it -is already configured to get this feature working out of the box. - -Signed-off-by: Marek Szyprowski -Signed-off-by: Sylwester Nawrocki ---- - configs/rpi_4_defconfig | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index f1c8f5ef7d..b3e7037bf5 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_ARCH_FIXUP_FDT_MEMORY=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -15,6 +17,8 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_DFU=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -@@ -27,12 +31,17 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_MANUFACTURER="FSL" - CONFIG_USB_GADGET_VENDOR_NUM=0x0525 --- -2.26.2 - diff --git a/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch b/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch deleted file mode 100644 index a9c00c3..0000000 --- a/rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch +++ /dev/null @@ -1,40 +0,0 @@ -From c9a14b02aea84a37407df7d295e0f76eb529f472 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 12 May 2020 11:29:00 +0100 -Subject: [PATCH] rpi4: enable ARCH_FIXUP_FDT_MEMORY - -Signed-off-by: Peter Robinson ---- - configs/rpi_4_32b_defconfig | 2 +- - configs/rpi_4_defconfig | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index dd7da1cf06..9a0437d376 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -7,7 +7,7 @@ - CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_ARCH_FIXUP_FDT_MEMORY=y - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 6eeec4592e..b3e7037bf5 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -7,7 +7,7 @@ - CONFIG_NR_DRAM_BANKS=2 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -+CONFIG_ARCH_FIXUP_FDT_MEMORY=y - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set --- -2.26.2 - diff --git a/sources b/sources index 926a830..e899314 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.07-rc2.tar.bz2) = d4ee96a76cde9305a8733602ce8f9505412f9118e5625f3154249d302445e1c9f970bcf38abb63536129885f3443d1c9fdf9c4e8851e2c1655050d1ebcea7bd2 +SHA512 (u-boot-2020.07-rc4.tar.bz2) = 81fb2cfaabe2e20addc174798fa7f6506d51bd32aafac6698758417575bd85bb95d476b619e8d78480c0ccef6424f8b6de59c76bc48a555b7b4105acf194f3f8 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2c6e05f..012dcdb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc4 Name: uboot-tools Version: 2020.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -23,22 +23,21 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement Patch4: usb-kbd-fixes.patch Patch5: dragonboard-fixes.patch +# mmc fix +Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch -# Rockchips improvements -Patch12: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch13: initial-support-for-the-Pinebook-Pro-laptop-from.patch -Patch14: rockpro64-limit-speed-on-mSD-slot.patch # AllWinner improvements -Patch15: AllWinner-Pine64-bits.patch +Patch12: AllWinner-Pine64-bits.patch +# Rockchips improvements +Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch14: rockchip-Pinebook-Pro-Fixes.patch # RPi4 Patch16: USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch Patch17: usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch Patch18: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch19: rpi4-enable-ARCH_FIXUP_FDT_MEMORY.patch -Patch20: rpi4-Enable-support-for-the-XHCI-controller-on-RPI.patch BuildRequires: bc BuildRequires: dtc @@ -252,6 +251,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Jun 10 2020 Peter Robinson - 2020.07-0.3.rc4 +- 2020.07 RC4 +- Minor updates and other fixes + * Tue May 12 2020 Peter Robinson - 2020.07-0.2.rc2 - 2020.07 RC2 - Minor device updates From aea19bdfee297ce6704f16130d83ecdd6cab808a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 18 Jun 2020 16:01:52 +0100 Subject: [PATCH 087/351] Update various patches to latest upstream --- ...I-Fix-PSCI-support-for-OF-live-trees.patch | 300 +++++++++ mmc-sdhci-Fix-HISPD-bit-handling.patch | 122 ++-- uboot-tools.spec | 8 +- ...Load-Raspberry-Pi-4-VL805-s-firmware.patch | 623 ++++++++++++++---- 4 files changed, 874 insertions(+), 179 deletions(-) create mode 100644 firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch diff --git a/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch b/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch new file mode 100644 index 0000000..134d436 --- /dev/null +++ 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enabled, dev_of_offset() cannot be used and +if used returns an invalid offset. This causes the call to +fdt_stringlist_get() in the psci_probe() to fail to read the 'method' +property from the PSCI node for the device and hence prevents PSCI +from working. Fix this by using the ofnode_read_string() API instead +of the fdt_stringlist_get() because this will handle reading the +property both when CONFIG_OF_LIVE is enabled or disabled. + +Due to the above problem and since commit 81ea00838c68 ("efi_loader: +PSCI reset and shutdown") was added, the EFI system reset has been +broken for Tegra210 and Tegra196 platforms. This also fixes the EFI +system reset for these Tegra platforms. + +Signed-off-by: Jon Hunter +--- + drivers/firmware/psci.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c +index e0d66d74f54d..23cf807591c4 100644 +--- a/drivers/firmware/psci.c ++++ b/drivers/firmware/psci.c +@@ -67,11 +67,9 @@ static int psci_bind(struct udevice *dev) + + static int psci_probe(struct udevice *dev) + { +- DECLARE_GLOBAL_DATA_PTR; + const char *method; + +- method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method", +- 0, NULL); ++ method = ofnode_read_string(dev_ofnode(dev), "method"); + if (!method) { + pr_warn("missing \"method\" property\n"); + return -ENXIO; + +From patchwork Thu Jun 18 11:54:39 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1312025 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Thu, 18 Jun 2020 04:55:00 -0700 +From: Jon Hunter +To: Tom Rini , Tom Warren +CC: Stephen Warren , Thierry Reding , + Peter Robinson , Heinrich Schuchardt + , , Jon Hunter + +Subject: [PATCH 2/2] ARM: tegra: Enable PSCI support for Tegra210 and Tegra186 +Date: Thu, 18 Jun 2020 12:54:39 +0100 +Message-ID: <20200618115439.25100-2-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200618115439.25100-1-jonathanh@nvidia.com> +References: <20200618115439.25100-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1592481201; bh=uzSllbcYKOPJL8iHAIEIHwlWoILnHTezp4ATOVF+JV4=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=iOzXdHGEdfeZIQXU+bHDE71+zTfyxL6xY1NHC1MlY5528MLezwOTCe7Tsw+SrrAvT + 80Kw7i+HTbIPGfj62pR8l7l6nVm/8F+MpOQtmUWMHirZcR2TSnrBowB+ncNGHZ/iFK + M8BYf+2e3sDEEhBFl5oNo61viGaXxViz5PwKQuy57dhKNlPJZTBfeSbSfNVyp3Y/81 + W0rcx4KuPtwQeKboaC6MSmpxipJ9hzESYwUXUin9kyqzs6m4qjTTrxymcPPAbckh+E + XKd+VJ/uSFayMJOutamX0tvAqPoFtm4x6zcbmzn3ZZUA1AMCZOmF5Vqqoo32wRk+eX + tFZhwM0IryDkg== +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +The PSCI nodes are currently not populated for the Tegra210 and Tegra186 +devices. This prevents the PSCI driver from being able to identify the +PSCI method used by these devices and causes the probe of the PSCI +driver to fail. + +Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was +added, which moves the PSCI EFI system reset handler into the PSCI +driver, this has prevented the EFI system reset from working for +Tegra210 and Tegra186. Therefore, populating these nodes is necessary +to fix the EFI system reset for Tegra210 and Tegra186. + +Signed-off-by: Jon Hunter +--- + arch/arm/dts/tegra186.dtsi | 5 +++++ + arch/arm/dts/tegra210.dtsi | 5 +++++ + 2 files changed, 10 insertions(+) + +diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi +index 0a9db9825b85..edcb7aacb8ee 100644 +--- a/arch/arm/dts/tegra186.dtsi ++++ b/arch/arm/dts/tegra186.dtsi +@@ -335,4 +335,9 @@ + status = "disabled"; + }; + }; ++ ++ psci { ++ compatible = "arm,psci-1.0"; ++ method = "smc"; ++ }; + }; +diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi +index 3ec54b11c43f..a521a43d6cfd 100644 +--- a/arch/arm/dts/tegra210.dtsi ++++ b/arch/arm/dts/tegra210.dtsi +@@ -867,6 +867,11 @@ + }; + }; + ++ psci { ++ compatible = "arm,psci-1.0"; ++ method = "smc"; ++ }; ++ + timer { + compatible = "arm,armv8-timer"; + interrupts = -X-Patchwork-Id: 1306828 +X-Patchwork-Id: 1312150 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -15,84 +15,80 @@ Authentication-Results: ozlabs.org; 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- Wed, 10 Jun 2020 04:43:58 -0700 (PDT) + Thu, 18 Jun 2020 07:03:22 -0700 (PDT) From: Jagan Teki -To: Peng Fan , Jaehoon Chung , - Kever Yang -Cc: Marc Zyngier , sunil@amarulasolutions.com, - u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, - linux-amarula@amarulasolutions.com, - Jagan Teki , - Robin Murphy -Subject: [PATCH v3] mmc: sdhci: Fix HISPD bit handling -Date: Wed, 10 Jun 2020 17:13:47 +0530 -Message-Id: <20200610114347.118501-1-jagan@amarulasolutions.com> +To: Peng Fan +Cc: u-boot@lists.denx.de, Jagan Teki , + Kever Yang , + Suniel Mahesh +Subject: [PATCH v4] mmc: sdhci: Fix HISPD bit handling +Date: Thu, 18 Jun 2020 19:33:12 +0530 +Message-Id: <20200618140312.155157-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de @@ -118,7 +114,8 @@ So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. -Linux handle the HISPD similar like this in below commit, +Linux handle the HISPD similar like this in below commit but no +SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") @@ -132,25 +129,31 @@ Writing GPT: mmc write failed ** Can't write to device 0 ** error! -Cc: Robin Murphy Cc: Kever Yang Cc: Peng Fan -Reviewed-by: Jaehoon Chung -Tested-by: Marc Zyngier # nanopc-t4 Tested-by: Suniel Mahesh # roc-rk3399-pc Signed-off-by: Jagan Teki --- -Changes for v3: -- use && for quirk check. +Changes for v4: +- update commit message +- simplify the logic. - drivers/mmc/sdhci.c | 23 +++++++++++++++-------- - 1 file changed, 15 insertions(+), 8 deletions(-) + drivers/mmc/sdhci.c | 23 +++++++++++++++++------ + 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 92cc8434af..a7db278a0e 100644 +index 92cc8434af..6cb702111b 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c -@@ -594,14 +594,21 @@ static int sdhci_set_ios(struct mmc *mmc) +@@ -567,6 +567,7 @@ static int sdhci_set_ios(struct mmc *mmc) + #endif + u32 ctrl; + struct sdhci_host *host = mmc->priv; ++ bool no_hispd_bit = false; + + if (host->ops && host->ops->set_control_reg) + host->ops->set_control_reg(host); +@@ -594,14 +595,24 @@ static int sdhci_set_ios(struct mmc *mmc) ctrl &= ~SDHCI_CTRL_4BITBUS; } @@ -159,11 +162,12 @@ index 92cc8434af..a7db278a0e 100644 - else - ctrl &= ~SDHCI_CTRL_HISPD; - -- if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || -- (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) + if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || + (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) - ctrl &= ~SDHCI_CTRL_HISPD; -+ if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) && -+ !(host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) { ++ no_hispd_bit = true; ++ ++ if (!no_hispd_bit) { + if (mmc->selected_mode == MMC_HS || + mmc->selected_mode == SD_HS || + mmc->selected_mode == MMC_DDR_52 || diff --git a/uboot-tools.spec b/uboot-tools.spec index 012dcdb..5c854bb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,9 @@ %global candidate rc4 +%global _default_patch_fuzz 2 Name: uboot-tools Version: 2020.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -25,6 +26,8 @@ Patch4: usb-kbd-fixes.patch Patch5: dragonboard-fixes.patch # mmc fix Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch +# Fix PSCI on at least tegra +Patch7: firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -251,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Jun 18 2020 Peter Robinson - 2020.07-0.4.rc4 +- Update various patches to latest upstream + * Wed Jun 10 2020 Peter Robinson - 2020.07-0.3.rc4 - 2020.07 RC4 - Minor updates and other fixes diff --git a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch index 4b5f19c..1d551d0 100644 --- a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch +++ b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch @@ -1,10 +1,9 @@ -From patchwork Tue May 5 16:26:06 2020 +From patchwork Fri Jun 12 16:46:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1283753 -X-Patchwork-Delegate: marek.vasut@gmail.com +X-Patchwork-Id: 1308405 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -16,19 +15,19 @@ Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49GlV44bJCz9sT0 - for ; Wed, 6 May 2020 02:26:36 +1000 (AEST) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49k68q2wrsz9sRN + for ; Sat, 13 Jun 2020 02:47:37 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id C14658209E; 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Fri, 12 Jun 2020 18:47:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id 01199AED5; - Tue, 5 May 2020 16:26:19 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 93F95AC64; + Fri, 12 Jun 2020 16:47:26 +0000 (UTC) From: Nicolas Saenz Julienne To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, linux-kernel@vger.kernel.org Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v3 1/2] arm: rpi: Add function to trigger VL805's firmware load -Date: Tue, 5 May 2020 18:26:06 +0200 -Message-Id: <20200505162607.334-2-nsaenzjulienne@suse.de> +Subject: [PATCH v4 1/5] arm: rpi: Add function to trigger VL805's firmware load +Date: Fri, 12 Jun 2020 18:46:29 +0200 +Message-Id: <20200612164632.25648-2-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> -References: <20200505162607.334-1-nsaenzjulienne@suse.de> +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -81,17 +80,13 @@ informs VideCore that VL805 may need its firmware loaded. Signed-off-by: Nicolas Saenz Julienne --- -Changes since v2: - - Correct wrong function name in comment - - Add better comment on rpi_firmware_init_vl805() - Changes since v1: - Rename function so it's not mistaken with regular firmware loading - +--- arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ - arch/arm/mach-bcm283x/msg.c | 45 +++++++++++++++++++++++ - 3 files changed, 65 insertions(+) + arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++ + 3 files changed, 66 insertions(+) diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h index 60e226ce1d..2ae2d3d97c 100644 @@ -118,7 +113,7 @@ index 60e226ce1d..2ae2d3d97c 100644 * Pass a raw u32 message to the VC, and receive a raw u32 back. * diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h -index 4afb08631b..f5213dd0e0 100644 +index 4afb08631b..e45c1bf010 100644 --- a/arch/arm/mach-bcm283x/include/mach/msg.h +++ b/arch/arm/mach-bcm283x/include/mach/msg.h @@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, @@ -126,7 +121,7 @@ index 4afb08631b..f5213dd0e0 100644 ulong *fb_sizep, int *pitchp); +/** -+ * bcm2711_notify_vl805_reset() - get vl805's firmware loaded ++ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded + * + * @return 0 if OK, -EIO on error + */ @@ -134,10 +129,18 @@ index 4afb08631b..f5213dd0e0 100644 + #endif diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c -index 94b75283f8..f8ef531652 100644 +index 94b75283f8..347aece3cd 100644 --- a/arch/arm/mach-bcm283x/msg.c +++ b/arch/arm/mach-bcm283x/msg.c -@@ -40,6 +40,12 @@ struct msg_setup { +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + struct msg_set_power_state { + struct bcm2835_mbox_hdr hdr; +@@ -40,6 +41,12 @@ struct msg_setup { u32 end_tag; }; @@ -150,18 +153,16 @@ index 94b75283f8..f8ef531652 100644 int bcm2835_power_on_module(u32 module) { ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1); -@@ -151,3 +157,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, +@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, return 0; } + +/* -+ * The Raspberry Pi 4 gets its USB functionality from VL805, a PCIe chip that -+ * implements xHCI. After a PCI reset, VL805's firmware may either be loaded -+ * directly from an EEPROM or, if not present, by the SoC's co-processor, -+ * VideoCore. RPi4's VideoCore OS contains both the non public firmware load -+ * logic and the VL805 firmware blob. This function triggers the aforementioned -+ * process. ++ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware ++ * may either be loaded directly from an EEPROM or, if not present, by the ++ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware ++ * loaded. + */ +int bcm2711_notify_vl805_reset(void) +{ @@ -190,42 +191,42 @@ index 94b75283f8..f8ef531652 100644 + return -EIO; + } + ++ udelay(200); ++ + return 0; +} + -From patchwork Tue May 5 16:26:07 2020 +From patchwork Fri Jun 12 16:46:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1283757 -X-Patchwork-Delegate: marek.vasut@gmail.com +X-Patchwork-Id: 1308409 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49GlVQ0MyZz9sT0 - for ; Wed, 6 May 2020 02:26:52 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 49k69h2xb7z9s1x + for ; Sat, 13 Jun 2020 02:48:24 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 40A20820AB; - Tue, 5 May 2020 18:26:27 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 0365A81C78; + Fri, 12 Jun 2020 18:47:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id A816381C4C; Tue, 5 May 2020 18:26:22 +0200 (CEST) + id 9031981CAF; Fri, 12 Jun 2020 18:47:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, @@ -234,26 +235,26 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id E5F898196A - for ; Tue, 5 May 2020 18:26:19 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 4162B81C80 + for ; Fri, 12 Jun 2020 18:47:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id EB82AAF5D; - Tue, 5 May 2020 16:26:21 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 7CEA1AAD0; + Fri, 12 Jun 2020 16:47:27 +0000 (UTC) From: Nicolas Saenz Julienne To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, linux-kernel@vger.kernel.org Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v3 2/2] usb: xhci: Load Raspberry Pi 4 VL805's firmware -Date: Tue, 5 May 2020 18:26:07 +0200 -Message-Id: <20200505162607.334-3-nsaenzjulienne@suse.de> +Subject: [PATCH v4 2/5] reset: Add Raspberry Pi 4 firmware reset controller +Date: Fri, 12 Jun 2020 18:46:30 +0200 +Message-Id: <20200612164632.25648-3-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> -References: <20200505162607.334-1-nsaenzjulienne@suse.de> +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -271,91 +272,475 @@ Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean -When needed, RPi4's co-processor (called VideoCore) has to be instructed -to load VL805's firmware (the chip providing xHCI support). VideCore's -firmware expects the board's PCIe bus to be already configured in order -for it to load the xHCI chip firmware. So we have to make sure this -happens in between the PCIe configuration and xHCI startup. - -Introduce a callback in xhci_pci_probe() to run this platform specific -routine. +Raspberry Pi 4's co-processor controls some of the board's HW +initialization process, but it's up to Linux to trigger it when +relevant. Introduce a reset controller capable of interfacing with +RPi4's co-processor that models these firmware initialization routines as +reset lines. Signed-off-by: Nicolas Saenz Julienne --- + drivers/reset/Kconfig | 10 ++++ + drivers/reset/Makefile | 1 + + drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++ + .../reset/raspberrypi,firmware-reset.h | 13 ++++ + 4 files changed, 84 insertions(+) + create mode 100644 drivers/reset/reset-raspberrypi.c + create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h -Changes since v2: - - Get rid of #ifdef CONFIG_BCM2711 - - Get rid of redundant error message - -Changes since v1: - - Create callback - - board/raspberrypi/rpi/rpi.c | 6 ++++++ - drivers/usb/host/xhci-pci.c | 6 ++++++ - include/usb/xhci.h | 3 +++ - 3 files changed, 15 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index e367ba3092..dcaf45fbf2 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -494,3 +495,8 @@ int ft_board_setup(void *blob, bd_t *bd) +diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig +index 88d3be1593..d02c1522e5 100644 +--- a/drivers/reset/Kconfig ++++ b/drivers/reset/Kconfig +@@ -148,4 +148,14 @@ config RESET_IMX7 + help + Support for reset controller on i.MX7/8 SoCs. - return 0; - } ++config RESET_RASPBERRYPI ++ bool "Raspberry Pi 4 Firmware Reset Controller Driver" ++ depends on DM_RESET && ARCH_BCM283X ++ default USB_XHCI_PCI ++ help ++ Raspberry Pi 4's co-processor controls some of the board's HW ++ initialization process, but it's up to Linux to trigger it when ++ relevant. This driver provides a reset controller capable of ++ interfacing with RPi4's co-processor and model these firmware ++ initialization routines as reset lines. + endmenu +diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile +index 0a044d5d8c..be54dae725 100644 +--- a/drivers/reset/Makefile ++++ b/drivers/reset/Makefile +@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o + obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o + obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o + obj-$(CONFIG_RESET_IMX7) += reset-imx7.o ++obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o +diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c +new file mode 100644 +index 0000000000..e2d284e5ac +--- /dev/null ++++ b/drivers/reset/reset-raspberrypi.c +@@ -0,0 +1,60 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Raspberry Pi 4 firmware reset driver ++ * ++ * Copyright (C) 2020 Nicolas Saenz Julienne ++ */ ++#include ++#include ++#include ++#include ++#include + -+void xhci_pci_fixup(struct udevice *dev) ++static int raspberrypi_reset_request(struct reset_ctl *reset_ctl) +{ -+ bcm2711_notify_vl805_reset(); ++ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS) ++ return -EINVAL; ++ ++ return 0; +} ++ ++static int raspberrypi_reset_free(struct reset_ctl *reset_ctl) ++{ ++ return 0; ++} ++ ++static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl) ++{ ++ switch (reset_ctl->id) { ++ case RASPBERRYPI_FIRMWARE_RESET_ID_USB: ++ bcm2711_notify_vl805_reset(); ++ return 0; ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl) ++{ ++ return 0; ++} ++ ++struct reset_ops raspberrypi_reset_ops = { ++ .request = raspberrypi_reset_request, ++ .rfree = raspberrypi_reset_free, ++ .rst_assert = raspberrypi_reset_assert, ++ .rst_deassert = raspberrypi_reset_deassert, ++}; ++ ++static const struct udevice_id raspberrypi_reset_ids[] = { ++ { .compatible = "raspberrypi,firmware-reset" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(raspberrypi_reset) = { ++ .name = "raspberrypi-reset", ++ .id = UCLASS_RESET, ++ .of_match = raspberrypi_reset_ids, ++ .ops = &raspberrypi_reset_ops, ++}; ++ +diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h +new file mode 100644 +index 0000000000..1a4f4c7927 +--- /dev/null ++++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ * Author: Nicolas Saenz Julienne ++ */ ++ ++#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H ++#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H ++ ++#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0 ++#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1 ++ ++#endif + +From patchwork Fri Jun 12 16:46:32 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1308408 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Fri, 12 Jun 2020 18:47:25 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 3C117ACCF; + Fri, 12 Jun 2020 16:47:29 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v4 4/5] dm: pci: Assign controller device node to root bridge +Date: Fri, 12 Jun 2020 18:46:32 +0200 +Message-Id: <20200612164632.25648-5-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +There is no distinction in DT between the PCI controller device and the +root bridge, whereas such distinction exists from dm's perspective. Make +sure the root bridge ofnode is assigned to the controller's platform +device node. + +This permits setups like this to work correctly: + + pcie { + compatible = "..."; + ... + dev { + reg = <0 0 0 0 0>; + ... + }; + }; + +Without this the dev node is assigned to the root bridge and the +actual device search starts one level lower than expected. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/pci/pci-uclass.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c +index 9ab3539a49..ea27e78465 100644 +--- a/drivers/pci/pci-uclass.c ++++ b/drivers/pci/pci-uclass.c +@@ -762,7 +762,20 @@ static int pci_find_and_bind_driver(struct udevice *parent, + str = strdup(name); + if (!str) + return -ENOMEM; +- drv = bridge ? "pci_bridge_drv" : "pci_generic_drv"; ++ ++ if (bridge) { ++ drv = "pci_bridge_drv"; ++ ++ /* ++ * If we're dealing with the root bridge pass the parent device ++ * node, as there isn't a distinction in device tree between ++ * that and the actual controller platform device. ++ */ ++ if (!PCI_MASK_BUS(bdf)) ++ node = parent->node; ++ } else { ++ drv = "pci_generic_drv"; ++ } + + ret = device_bind_driver_to_node(parent, drv, str, node, devp); + if (ret) { + +From patchwork Fri Jun 12 16:46:33 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1308407 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49k69F21wdz9s1x + for ; Sat, 13 Jun 2020 02:48:01 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 3049C81CF2; + Fri, 12 Jun 2020 18:47:37 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 0EDC381CF5; Fri, 12 Jun 2020 18:47:31 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 946DD81CCF + for ; Fri, 12 Jun 2020 18:47:26 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id E69F8ACDB; + Fri, 12 Jun 2020 16:47:29 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v4 5/5] usb: xhci-pci: Add reset controller support +Date: Fri, 12 Jun 2020 18:46:33 +0200 +Message-Id: <20200612164632.25648-6-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Some atypical users of xhci-pci might need to manually reset their xHCI +controller before starting the HCD setup. Check if a reset controller +device is available to the PCI bus and trigger a reset. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/usb/host/xhci-pci.c | 38 +++++++++++++++++++++++++++++++++++-- + 1 file changed, 36 insertions(+), 2 deletions(-) + diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c -index c1f60da541..1285dde1ef 100644 +index 9fb6d2f763..710524fbb1 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -11,6 +11,10 @@ +@@ -10,9 +10,14 @@ + #include + #include + #include ++#include #include #include -+__weak void xhci_pci_fixup(struct udevice *dev) -+{ -+} ++struct xhci_pci_platdata { ++ struct reset_ctl reset; ++}; + static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, struct xhci_hcor **ret_hcor) { -@@ -40,6 +44,8 @@ static int xhci_pci_probe(struct udevice *dev) +@@ -39,14 +44,43 @@ static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + + static int xhci_pci_probe(struct udevice *dev) + { ++ struct xhci_pci_platdata *plat = dev_get_platdata(dev); struct xhci_hccr *hccr; struct xhci_hcor *hcor; - -+ xhci_pci_fixup(dev); ++ int ret; + ++ ret = reset_get_by_index(dev, 0, &plat->reset); ++ if (ret && ret != -ENOENT) { ++ dev_err(dev, "failed to get reset\n"); ++ return ret; ++ } ++ ++ if (reset_valid(&plat->reset)) { ++ ret = reset_assert(&plat->reset); ++ if (ret) ++ return ret; ++ ++ ret = reset_deassert(&plat->reset); ++ if (ret) ++ return ret; ++ } + xhci_pci_init(dev, &hccr, &hcor); return xhci_register(dev, hccr, hcor); -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index c16106a2fc..57feed7603 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -16,6 +16,7 @@ - #ifndef HOST_XHCI_H_ - #define HOST_XHCI_H_ + } -+#include - #include - #include - #include -@@ -1281,4 +1282,6 @@ extern struct dm_usb_ops xhci_usb_ops; - - struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); - -+extern void xhci_pci_fixup(struct udevice *dev); ++static int xhci_pci_remove(struct udevice *dev) ++{ ++ struct xhci_pci_platdata *plat = dev_get_platdata(dev); + - #endif /* HOST_XHCI_H_ */ ++ xhci_deregister(dev); ++ if (reset_valid(&plat->reset)) ++ reset_free(&plat->reset); ++ ++ return 0; ++} ++ + static const struct udevice_id xhci_pci_ids[] = { + { .compatible = "xhci-pci" }, + { } +@@ -56,10 +90,10 @@ U_BOOT_DRIVER(xhci_pci) = { + .name = "xhci_pci", + .id = UCLASS_USB, + .probe = xhci_pci_probe, +- .remove = xhci_deregister, ++ .remove = xhci_pci_remove, + .of_match = xhci_pci_ids, + .ops = &xhci_usb_ops, +- .platdata_auto_alloc_size = sizeof(struct usb_platdata), ++ .platdata_auto_alloc_size = sizeof(struct xhci_pci_platdata), + .priv_auto_alloc_size = sizeof(struct xhci_ctrl), + .flags = DM_FLAG_ALLOC_PRIV_DMA, + }; +From f9dfaab9a697f7e1c6456bf7e05eaba39394688c Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Jun 2020 14:24:13 +0100 +Subject: [PATCH] configs: Enable support for reset controllers on RPi4 + +This is required in order to access the reset controller used to +initialize the board's xHCI chip. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Peter Robinson +--- + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + + 3 files changed, 3 insertions(+) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index a36a249540..0df5c17d6e 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index f0301dc8bc..7034eb439b 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index d16c2388af..3663a17048 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +-- +2.26.2 + From f6357946c01f08148229ed47c190b28f1d062ae4 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 23 Jun 2020 23:07:29 +0100 Subject: [PATCH 088/351] 2020.07 RC5 --- ...I-Fix-PSCI-support-for-OF-live-trees.patch | 300 ---------- sources | 2 +- uboot-tools.spec | 9 +- ...Load-Raspberry-Pi-4-VL805-s-firmware.patch | 555 ++++++++---------- 4 files changed, 264 insertions(+), 602 deletions(-) delete mode 100644 firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch diff --git a/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch b/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch deleted file mode 100644 index 134d436..0000000 --- a/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch +++ /dev/null @@ -1,300 +0,0 @@ -From patchwork Thu Jun 18 11:54:38 2020 -Content-Type: text/plain; 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Thu, 18 Jun 2020 04:54:54 -0700 -From: Jon Hunter -To: Tom Rini , Tom Warren -CC: Stephen Warren , Thierry Reding , - Peter Robinson , Heinrich Schuchardt - , , Jon Hunter - -Subject: [PATCH 1/2] firmware: PSCI: Fix PSCI support for OF live trees -Date: Thu, 18 Jun 2020 12:54:38 +0100 -Message-ID: <20200618115439.25100-1-jonathanh@nvidia.com> -X-Mailer: git-send-email 2.17.1 -X-NVConfidentiality: public -MIME-Version: 1.0 -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; - t=1592481246; bh=06Kdq266LOYz5R2QyKOopddySBarFsUxH3Li+Ufuk5Y=; - h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: - X-NVConfidentiality:MIME-Version:Content-Type; - b=MEPdTgP3WAds3UTss1m+sIgLur+SEpPr3iBvVPk7Wh5dOizB3FW23fLfVKyqL5OtQ - gbz3WbWd7HmOEpFYdplLfUVxmxJtfrIZwvgPWj2TqEJIedeVl14ELovHD9R9Y30dkJ - FmnUv8e34oxjz2kEeEgg+T9FEo6YAt/4Jix7q76AWZMkTCDfhykFtlVztztYg9fcju - n1QlBQR2AxHQXG1v54hiTbSNoAGS0VsOdK/QQgGI1uY7YHgNOY2j8vb+VyUqF/Ku0Z - eIbJ8SO/BsNbTjMaTOJcPRRc3LO/RgLPa1p4jNoo9Iqa/q06UxdxmgIHIE1DEpr8bQ - Q2QxwRplMIT3A== -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and -if used returns an invalid offset. This causes the call to -fdt_stringlist_get() in the psci_probe() to fail to read the 'method' -property from the PSCI node for the device and hence prevents PSCI -from working. Fix this by using the ofnode_read_string() API instead -of the fdt_stringlist_get() because this will handle reading the -property both when CONFIG_OF_LIVE is enabled or disabled. - -Due to the above problem and since commit 81ea00838c68 ("efi_loader: -PSCI reset and shutdown") was added, the EFI system reset has been -broken for Tegra210 and Tegra196 platforms. This also fixes the EFI -system reset for these Tegra platforms. - -Signed-off-by: Jon Hunter ---- - drivers/firmware/psci.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c -index e0d66d74f54d..23cf807591c4 100644 ---- a/drivers/firmware/psci.c -+++ b/drivers/firmware/psci.c -@@ -67,11 +67,9 @@ static int psci_bind(struct udevice *dev) - - static int psci_probe(struct udevice *dev) - { -- DECLARE_GLOBAL_DATA_PTR; - const char *method; - -- method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method", -- 0, NULL); -+ method = ofnode_read_string(dev_ofnode(dev), "method"); - if (!method) { - pr_warn("missing \"method\" property\n"); - return -ENXIO; - -From patchwork Thu Jun 18 11:54:39 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Jon Hunter -X-Patchwork-Id: 1312025 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Thu, 18 Jun 2020 04:55:00 -0700 -From: Jon Hunter -To: Tom Rini , Tom Warren -CC: Stephen Warren , Thierry Reding , - Peter Robinson , Heinrich Schuchardt - , , Jon Hunter - -Subject: [PATCH 2/2] ARM: tegra: Enable PSCI support for Tegra210 and Tegra186 -Date: Thu, 18 Jun 2020 12:54:39 +0100 -Message-ID: <20200618115439.25100-2-jonathanh@nvidia.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200618115439.25100-1-jonathanh@nvidia.com> -References: <20200618115439.25100-1-jonathanh@nvidia.com> -X-NVConfidentiality: public -MIME-Version: 1.0 -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; - t=1592481201; bh=uzSllbcYKOPJL8iHAIEIHwlWoILnHTezp4ATOVF+JV4=; - h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: - In-Reply-To:References:X-NVConfidentiality:MIME-Version: - Content-Type; - b=iOzXdHGEdfeZIQXU+bHDE71+zTfyxL6xY1NHC1MlY5528MLezwOTCe7Tsw+SrrAvT - 80Kw7i+HTbIPGfj62pR8l7l6nVm/8F+MpOQtmUWMHirZcR2TSnrBowB+ncNGHZ/iFK - M8BYf+2e3sDEEhBFl5oNo61viGaXxViz5PwKQuy57dhKNlPJZTBfeSbSfNVyp3Y/81 - W0rcx4KuPtwQeKboaC6MSmpxipJ9hzESYwUXUin9kyqzs6m4qjTTrxymcPPAbckh+E - XKd+VJ/uSFayMJOutamX0tvAqPoFtm4x6zcbmzn3ZZUA1AMCZOmF5Vqqoo32wRk+eX - tFZhwM0IryDkg== -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -The PSCI nodes are currently not populated for the Tegra210 and Tegra186 -devices. This prevents the PSCI driver from being able to identify the -PSCI method used by these devices and causes the probe of the PSCI -driver to fail. - -Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was -added, which moves the PSCI EFI system reset handler into the PSCI -driver, this has prevented the EFI system reset from working for -Tegra210 and Tegra186. Therefore, populating these nodes is necessary -to fix the EFI system reset for Tegra210 and Tegra186. - -Signed-off-by: Jon Hunter ---- - arch/arm/dts/tegra186.dtsi | 5 +++++ - arch/arm/dts/tegra210.dtsi | 5 +++++ - 2 files changed, 10 insertions(+) - -diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi -index 0a9db9825b85..edcb7aacb8ee 100644 ---- a/arch/arm/dts/tegra186.dtsi -+++ b/arch/arm/dts/tegra186.dtsi -@@ -335,4 +335,9 @@ - status = "disabled"; - }; - }; -+ -+ psci { -+ compatible = "arm,psci-1.0"; -+ method = "smc"; -+ }; - }; -diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi -index 3ec54b11c43f..a521a43d6cfd 100644 ---- a/arch/arm/dts/tegra210.dtsi -+++ b/arch/arm/dts/tegra210.dtsi -@@ -867,6 +867,11 @@ - }; - }; - -+ psci { -+ compatible = "arm,psci-1.0"; -+ method = "smc"; -+ }; -+ - timer { - compatible = "arm,armv8-timer"; - interrupts = - 2020.07-0.5.rc5 +- 2020.07 RC5 + * Thu Jun 18 2020 Peter Robinson - 2020.07-0.4.rc4 - Update various patches to latest upstream diff --git a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch index 1d551d0..e167bb6 100644 --- a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch +++ b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch @@ -1,33 +1,35 @@ -From patchwork Fri Jun 12 16:46:29 2020 +From patchwork Mon Jun 22 15:30:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1308405 +X-Patchwork-Id: 1314562 +X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49k68q2wrsz9sRN - for ; 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Fri, 12 Jun 2020 18:47:23 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 7C1E981D0B + for ; Mon, 22 Jun 2020 17:31:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id 93F95AC64; - Fri, 12 Jun 2020 16:47:26 +0000 (UTC) +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 76161C1BD; + Mon, 22 Jun 2020 15:31:22 +0000 (UTC) From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, - linux-kernel@vger.kernel.org -Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v4 1/5] arm: rpi: Add function to trigger VL805's firmware load -Date: Fri, 12 Jun 2020 18:46:29 +0200 -Message-Id: <20200612164632.25648-2-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> -References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, + Nicolas Saenz Julienne +Subject: [PATCH v5 1/4] arm: rpi: Add function to trigger VL805's firmware load +Date: Mon, 22 Jun 2020 17:30:48 +0200 +Message-Id: <20200622153050.23193-2-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.27.0 +In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> +References: <20200622153050.23193-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -82,7 +84,7 @@ Signed-off-by: Nicolas Saenz Julienne --- Changes since v1: - Rename function so it's not mistaken with regular firmware loading ---- + arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++ @@ -197,12 +199,13 @@ index 94b75283f8..347aece3cd 100644 +} + -From patchwork Fri Jun 12 16:46:30 2020 +From patchwork Mon Jun 22 15:30:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1308409 +X-Patchwork-Id: 1314565 +X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -216,17 +219,17 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49k69h2xb7z9s1x - for ; Sat, 13 Jun 2020 02:48:24 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 49rD1F72RYz9s6w + for ; Tue, 23 Jun 2020 01:32:17 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 0365A81C78; - Fri, 12 Jun 2020 18:47:41 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 10E5481E20; + Mon, 22 Jun 2020 17:31:41 +0200 (CEST) Authentication-Results: phobos.denx.de; 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spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id 7CEA1AAD0; - Fri, 12 Jun 2020 16:47:27 +0000 (UTC) +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id CFE01C204; + Mon, 22 Jun 2020 15:31:22 +0000 (UTC) From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, - linux-kernel@vger.kernel.org -Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v4 2/5] reset: Add Raspberry Pi 4 firmware reset controller -Date: Fri, 12 Jun 2020 18:46:30 +0200 -Message-Id: <20200612164632.25648-3-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> -References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, + Nicolas Saenz Julienne +Subject: [PATCH v5 2/4] reset: Add Raspberry Pi 4 firmware reset controller +Date: Mon, 22 Jun 2020 17:30:49 +0200 +Message-Id: <20200622153050.23193-3-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.27.0 +In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> +References: <20200622153050.23193-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -402,12 +405,13 @@ index 0000000000..1a4f4c7927 + +#endif -From patchwork Fri Jun 12 16:46:32 2020 +From patchwork Mon Jun 22 15:30:50 2020 Content-Type: text/plain; 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- Fri, 12 Jun 2020 16:47:29 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, - linux-kernel@vger.kernel.org -Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v4 4/5] dm: pci: Assign controller device node to root bridge -Date: Fri, 12 Jun 2020 18:46:32 +0200 -Message-Id: <20200612164632.25648-5-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> -References: <20200612164632.25648-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -There is no distinction in DT between the PCI controller device and the -root bridge, whereas such distinction exists from dm's perspective. Make -sure the root bridge ofnode is assigned to the controller's platform -device node. - -This permits setups like this to work correctly: - - pcie { - compatible = "..."; - ... - dev { - reg = <0 0 0 0 0>; - ... - }; - }; - -Without this the dev node is assigned to the root bridge and the -actual device search starts one level lower than expected. - -Signed-off-by: Nicolas Saenz Julienne ---- - drivers/pci/pci-uclass.c | 15 ++++++++++++++- - 1 file changed, 14 insertions(+), 1 deletion(-) - -diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c -index 9ab3539a49..ea27e78465 100644 ---- a/drivers/pci/pci-uclass.c -+++ b/drivers/pci/pci-uclass.c -@@ -762,7 +762,20 @@ static int pci_find_and_bind_driver(struct udevice *parent, - str = strdup(name); - if (!str) - return -ENOMEM; -- drv = bridge ? "pci_bridge_drv" : "pci_generic_drv"; -+ -+ if (bridge) { -+ drv = "pci_bridge_drv"; -+ -+ /* -+ * If we're dealing with the root bridge pass the parent device -+ * node, as there isn't a distinction in device tree between -+ * that and the actual controller platform device. -+ */ -+ if (!PCI_MASK_BUS(bdf)) -+ node = parent->node; -+ } else { -+ drv = "pci_generic_drv"; -+ } - - ret = device_bind_driver_to_node(parent, drv, str, node, devp); - if (ret) { - -From patchwork Fri Jun 12 16:46:33 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1308407 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49k69F21wdz9s1x - for ; Sat, 13 Jun 2020 02:48:01 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 49rD115xyZz9sQx + for ; Tue, 23 Jun 2020 01:32:05 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 3049C81CF2; - Fri, 12 Jun 2020 18:47:37 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 4627E81E0C; + Mon, 22 Jun 2020 17:31:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 0EDC381CF5; Fri, 12 Jun 2020 18:47:31 +0200 (CEST) + id 5837781E04; Mon, 22 Jun 2020 17:31:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, @@ -567,26 +445,26 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 946DD81CCF - for ; Fri, 12 Jun 2020 18:47:26 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 0D9F281DC9 + for ; Mon, 22 Jun 2020 17:31:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id E69F8ACDB; - Fri, 12 Jun 2020 16:47:29 +0000 (UTC) +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 478B9C207; + Mon, 22 Jun 2020 15:31:23 +0000 (UTC) From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, - linux-kernel@vger.kernel.org -Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v4 5/5] usb: xhci-pci: Add reset controller support -Date: Fri, 12 Jun 2020 18:46:33 +0200 -Message-Id: <20200612164632.25648-6-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> -References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, + Nicolas Saenz Julienne +Subject: [PATCH v5 3/4] configs: Enable support for reset controllers on RPi4 +Date: Mon, 22 Jun 2020 17:30:50 +0200 +Message-Id: <20200622153050.23193-4-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.27.0 +In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> +References: <20200622153050.23193-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -604,101 +482,10 @@ Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean -Some atypical users of xhci-pci might need to manually reset their xHCI -controller before starting the HCD setup. Check if a reset controller -device is available to the PCI bus and trigger a reset. - -Signed-off-by: Nicolas Saenz Julienne ---- - drivers/usb/host/xhci-pci.c | 38 +++++++++++++++++++++++++++++++++++-- - 1 file changed, 36 insertions(+), 2 deletions(-) - -diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c -index 9fb6d2f763..710524fbb1 100644 ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -10,9 +10,14 @@ - #include - #include - #include -+#include - #include - #include - -+struct xhci_pci_platdata { -+ struct reset_ctl reset; -+}; -+ - static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, - struct xhci_hcor **ret_hcor) - { -@@ -39,14 +44,43 @@ static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, - - static int xhci_pci_probe(struct udevice *dev) - { -+ struct xhci_pci_platdata *plat = dev_get_platdata(dev); - struct xhci_hccr *hccr; - struct xhci_hcor *hcor; -+ int ret; -+ -+ ret = reset_get_by_index(dev, 0, &plat->reset); -+ if (ret && ret != -ENOENT) { -+ dev_err(dev, "failed to get reset\n"); -+ return ret; -+ } -+ -+ if (reset_valid(&plat->reset)) { -+ ret = reset_assert(&plat->reset); -+ if (ret) -+ return ret; -+ -+ ret = reset_deassert(&plat->reset); -+ if (ret) -+ return ret; -+ } - - xhci_pci_init(dev, &hccr, &hcor); - - return xhci_register(dev, hccr, hcor); - } - -+static int xhci_pci_remove(struct udevice *dev) -+{ -+ struct xhci_pci_platdata *plat = dev_get_platdata(dev); -+ -+ xhci_deregister(dev); -+ if (reset_valid(&plat->reset)) -+ reset_free(&plat->reset); -+ -+ return 0; -+} -+ - static const struct udevice_id xhci_pci_ids[] = { - { .compatible = "xhci-pci" }, - { } -@@ -56,10 +90,10 @@ U_BOOT_DRIVER(xhci_pci) = { - .name = "xhci_pci", - .id = UCLASS_USB, - .probe = xhci_pci_probe, -- .remove = xhci_deregister, -+ .remove = xhci_pci_remove, - .of_match = xhci_pci_ids, - .ops = &xhci_usb_ops, -- .platdata_auto_alloc_size = sizeof(struct usb_platdata), -+ .platdata_auto_alloc_size = sizeof(struct xhci_pci_platdata), - .priv_auto_alloc_size = sizeof(struct xhci_ctrl), - .flags = DM_FLAG_ALLOC_PRIV_DMA, - }; -From f9dfaab9a697f7e1c6456bf7e05eaba39394688c Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 18 Jun 2020 14:24:13 +0100 -Subject: [PATCH] configs: Enable support for reset controllers on RPi4 - This is required in order to access the reset controller used to initialize the board's xHCI chip. Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Peter Robinson --- configs/rpi_4_32b_defconfig | 1 + configs/rpi_4_defconfig | 1 + @@ -706,11 +493,11 @@ Signed-off-by: Peter Robinson 3 files changed, 3 insertions(+) diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index a36a249540..0df5c17d6e 100644 +index b0797373b5..00c8d963ab 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig -@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y - CONFIG_BCMGENET=y +@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y + CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set +CONFIG_DM_RESET=y @@ -718,11 +505,11 @@ index a36a249540..0df5c17d6e 100644 CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index f0301dc8bc..7034eb439b 100644 +index 932b768164..c73eccb61c 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig -@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y - CONFIG_BCMGENET=y +@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y + CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set +CONFIG_DM_RESET=y @@ -730,17 +517,191 @@ index f0301dc8bc..7034eb439b 100644 CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index d16c2388af..3663a17048 100644 +index 855afcf1cf..800b51e6f5 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig -@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y - CONFIG_BCMGENET=y +@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y + CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set +CONFIG_DM_RESET=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_USB=y CONFIG_DM_USB=y --- -2.26.2 +From patchwork Mon Jun 22 15:30:51 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1314563 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49rD0q0fqDz9s6w + for ; Tue, 23 Jun 2020 01:31:55 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id CE84C81DE7; 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+ Mon, 22 Jun 2020 15:31:23 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, + Nicolas Saenz Julienne +Subject: [PATCH v5 4/4] usb: xhci: Add reset controller support +Date: Mon, 22 Jun 2020 17:30:51 +0200 +Message-Id: <20200622153050.23193-5-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.27.0 +In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> +References: <20200622153050.23193-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Some atypical users of xhci might need to manually reset their xHCI +controller before starting the HCD setup. Check if a reset controller +device is available to the PCI bus and trigger a reset. + +Signed-off-by: Nicolas Saenz Julienne +--- + +Changes since v3: + - Move reset support to xchi core + + drivers/usb/host/xhci-mem.c | 2 ++ + drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++ + include/usb/xhci.h | 2 ++ + 3 files changed, 37 insertions(+) + +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index f446520528..108f4bd8cf 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl) + xhci_free_virt_devices(ctrl); + free(ctrl->erst.entries); + free(ctrl->dcbaa); ++ if (reset_valid(&ctrl->reset)) ++ reset_free(&ctrl->reset); + memset(ctrl, '\0', sizeof(struct xhci_ctrl)); + } + +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index ebd2954571..03b41cc855 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor) + return ret; + } + ++/** ++ * Resets XHCI Hardware ++ * ++ * @param ctrl pointer to host controller ++ * @return 0 if OK, or a negative error code. ++ */ ++static int xhci_reset_hw(struct xhci_ctrl *ctrl) ++{ ++ int ret; ++ ++ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset); ++ if (ret && ret != -ENOENT) { ++ dev_err(ctrl->dev, "failed to get reset\n"); ++ return ret; ++ } ++ ++ if (reset_valid(&ctrl->reset)) { ++ ret = reset_assert(&ctrl->reset); ++ if (ret) ++ return ret; ++ ++ ret = reset_deassert(&ctrl->reset); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ + /** + * Resets the XHCI Controller + * +@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr, + + ctrl->dev = dev; + ++ ret = xhci_reset_hw(ctrl); ++ if (ret) ++ goto err; ++ + /* + * XHCI needs to issue a Address device command to setup + * proper device context structures, before it can interact +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index 1170c0ac69..7d34103fd5 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -16,6 +16,7 @@ + #ifndef HOST_XHCI_H_ + #define HOST_XHCI_H_ + ++#include + #include + #include + #include +@@ -1209,6 +1210,7 @@ struct xhci_ctrl { + #if CONFIG_IS_ENABLED(DM_USB) + struct udevice *dev; + #endif ++ struct reset_ctl reset; + struct xhci_hccr *hccr; /* R/O registers, not need for volatile */ + struct xhci_hcor *hcor; + struct xhci_doorbell_array *dba; From 5037de6420cfb02d72f7b2cec839a8dea26780ac Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 23 Jun 2020 23:37:35 +0100 Subject: [PATCH 089/351] fix up move of docs --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index e579e9f..94b862c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -215,7 +215,6 @@ install -p -m 0755 %{SOURCE5} $RPM_BUILD_ROOT/lib/kernel/install.d/ # Copy sone useful docs over mkdir -p builds/docs -cp -p board/amlogic/p200/README.odroid-c2 builds/docs/README.odroid-c2 cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820 @@ -235,6 +234,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %doc README doc/README.kwbimage doc/README.distro doc/README.gpt %doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst %doc doc/README.chromium builds/docs/* +%doc doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* /lib/kernel/install.d/10-devicetree.install From b7b23dc611f89cb20df75196d5ad6446c697e050 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 24 Jun 2020 10:13:08 +0100 Subject: [PATCH 090/351] drop omap3_pandora, no longer upstream --- arm-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/arm-boards b/arm-boards index ec11458..5a82a80 100644 --- a/arm-boards +++ b/arm-boards @@ -87,7 +87,6 @@ novena odroid odroid-xu3 omap3_beagle -omap3_pandora omap4_panda omap5_uevm Orangepi From 65f13a988ec9dd445bdadd4ab388262c2f58eb02 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 6 Jul 2020 21:37:55 +0100 Subject: [PATCH 091/351] v2020.07 --- mmc-sdhci-Fix-HISPD-bit-handling.patch | 186 ------------------------- sources | 2 +- uboot-tools.spec | 9 +- 3 files changed, 6 insertions(+), 191 deletions(-) delete mode 100644 mmc-sdhci-Fix-HISPD-bit-handling.patch diff --git a/mmc-sdhci-Fix-HISPD-bit-handling.patch b/mmc-sdhci-Fix-HISPD-bit-handling.patch deleted file mode 100644 index 1af557a..0000000 --- a/mmc-sdhci-Fix-HISPD-bit-handling.patch +++ /dev/null @@ -1,186 +0,0 @@ -From patchwork Thu Jun 18 14:03:12 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Jagan Teki -X-Patchwork-Id: 1312150 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - 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header.from=amarulasolutions.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=jagan@amarulasolutions.com -Received: by mail-pg1-x544.google.com with SMTP id l63so2934483pge.12 - for ; Thu, 18 Jun 2020 07:03:25 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=amarulasolutions.com; s=google; - h=from:to:cc:subject:date:message-id:mime-version - :content-transfer-encoding; - bh=CV+hHfK9TAO+pQC8PJPW6c55h0n2inkWKuN1Vxg7SJc=; - b=p2JV38kWm3RwP5F+tk+zn9L45s28eZZdf6WYIyRzWvcNpa+cdS5r2EGgYNf9n5Sy+g - /2qUb1648TqviMk+h5pYZ5FjHuo/ebvq7kB+XCQUI053og85IzaunFoHWp0lK9JdYMAv - BZWNHdEEJxW1ym/a1xbgaG8t5hTQxxZNPW/7E= -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version - :content-transfer-encoding; - bh=CV+hHfK9TAO+pQC8PJPW6c55h0n2inkWKuN1Vxg7SJc=; - b=qO9U8KokdHUFiqhrRgFl4nHyQYO3tSLB0WtE9txbby4Y03rW0qOlUi7FnGYgDEEZgc - l530CIQBkRfWIcv6x0Y96oWXFKYTSrMxX09kM7fwXlk3sIR9TGi9uj2DKkKFN0uxh2Dz - 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-List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -SDHCI HISPD bits need to be configured based on desired mmc -timings mode and some HISPD quirks. - -So, handle the HISPD bit based on the mmc computed selected -mode(timing parameter) rather than fixed mmc card clock -frequency. - -Linux handle the HISPD similar like this in below commit but no -SDHCI_QUIRK_BROKEN_HISPD_MODE, - -commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") - -This eventually fixed the mmc write issue observed in -rk3399 sdhci controller. - -Bug log for refernece, -=> gpt write mmc 0 $partitions -Writing GPT: mmc write failed -** Can't write to device 0 ** -** Can't write to device 0 ** -error! - -Cc: Kever Yang -Cc: Peng Fan -Tested-by: Suniel Mahesh # roc-rk3399-pc -Signed-off-by: Jagan Teki ---- -Changes for v4: -- update commit message -- simplify the logic. - - drivers/mmc/sdhci.c | 23 +++++++++++++++++------ - 1 file changed, 17 insertions(+), 6 deletions(-) - -diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 92cc8434af..6cb702111b 100644 ---- a/drivers/mmc/sdhci.c -+++ b/drivers/mmc/sdhci.c -@@ -567,6 +567,7 @@ static int sdhci_set_ios(struct mmc *mmc) - #endif - u32 ctrl; - struct sdhci_host *host = mmc->priv; -+ bool no_hispd_bit = false; - - if (host->ops && host->ops->set_control_reg) - host->ops->set_control_reg(host); -@@ -594,14 +595,24 @@ static int sdhci_set_ios(struct mmc *mmc) - ctrl &= ~SDHCI_CTRL_4BITBUS; - } - -- if (mmc->clock > 26000000) -- ctrl |= SDHCI_CTRL_HISPD; -- else -- ctrl &= ~SDHCI_CTRL_HISPD; -- - if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || - (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) -- ctrl &= ~SDHCI_CTRL_HISPD; -+ no_hispd_bit = true; -+ -+ if (!no_hispd_bit) { -+ if (mmc->selected_mode == MMC_HS || -+ mmc->selected_mode == SD_HS || -+ mmc->selected_mode == MMC_DDR_52 || -+ mmc->selected_mode == MMC_HS_200 || -+ mmc->selected_mode == MMC_HS_400 || -+ mmc->selected_mode == UHS_SDR25 || -+ mmc->selected_mode == UHS_SDR50 || -+ mmc->selected_mode == UHS_SDR104 || -+ mmc->selected_mode == UHS_DDR50) -+ ctrl |= SDHCI_CTRL_HISPD; -+ else -+ ctrl &= ~SDHCI_CTRL_HISPD; -+ } - - sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); - diff --git a/sources b/sources index 488d463..7678d2e 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.07-rc5.tar.bz2) = a0a1d4749d29d2c86d4ba0d4c04ec6b0515ce2c7e3f335a1e9e2c9833ce6286f572b70be63d3e72cbb0fe3238ea0e0809152a83760f22cf1edf2de54075870b8 +SHA512 (u-boot-2020.07.tar.bz2) = df91264fe8a42e676c3f2aa09d644c6a3035cc8169bf52a8ab95efe7e542cfc758a0ef150949b0d9f03c7dec7d95f8d20a2efe2dbb60c2ef1a61c8063770478d diff --git a/uboot-tools.spec b/uboot-tools.spec index 94b862c..bc2e990 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc5 +#global candidate rc5 %global _default_patch_fuzz 2 Name: uboot-tools Version: 2020.07 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,8 +24,6 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement Patch4: usb-kbd-fixes.patch Patch5: dragonboard-fixes.patch -# mmc fix -Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -252,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jul 06 2020 Peter Robinson - 2020.07-1 +- 2020.07 GA + * Tue Jun 23 2020 Peter Robinson - 2020.07-0.5.rc5 - 2020.07 RC5 From 5efdbcf3bc9d204df25438a2ac44ee3b000a76a0 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Tue, 14 Jul 2020 14:36:26 +0000 Subject: [PATCH 092/351] Use make macros https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro --- uboot-tools.spec | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index bc2e990..7f5fdd1 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -3,7 +3,7 @@ Name: uboot-tools Version: 2020.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -138,13 +138,13 @@ do fi # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ - make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ + %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ done %endif -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only_defconfig V=1 O=builds/ -make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all V=1 O=builds/ +%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ +%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ %install mkdir -p $RPM_BUILD_ROOT%{_bindir} @@ -250,6 +250,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jul 14 2020 Tom Stellard - 2020.07-2 +- Use make macros +- https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro + * Mon Jul 06 2020 Peter Robinson - 2020.07-1 - 2020.07 GA From 2410ac8a2a72c8ebaeacce3cd7107ef99344d641 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 28 Jul 2020 09:16:30 +0100 Subject: [PATCH 093/351] 2020.10 RC1 --- AllWinner-Pine64-bits.patch | 953 ++++++++++------- ...port-for-Raspberry-Pi-4-board-64-bit.patch | 993 ------------------ rockchip-Pinebook-Pro-Fixes.patch | 200 ---- sources | 2 +- uboot-tools.spec | 21 +- ...Load-Raspberry-Pi-4-VL805-s-firmware.patch | 707 ------------- 6 files changed, 590 insertions(+), 2286 deletions(-) delete mode 100644 USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch delete mode 100644 rockchip-Pinebook-Pro-Fixes.patch delete mode 100644 usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch diff --git a/AllWinner-Pine64-bits.patch b/AllWinner-Pine64-bits.patch index 569afc8..8ce13e7 100644 --- a/AllWinner-Pine64-bits.patch +++ b/AllWinner-Pine64-bits.patch @@ -1,15 +1,403 @@ -From 2c213379d9ec786480a655f8c5687b2df376017f Mon Sep 17 00:00:00 2001 +From 6e5d771060dff5350e5940b7e457884b47a560ac Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 10 Mar 2020 12:27:15 +0000 -Subject: [PATCH 1/9] arm: dts: AllWinner: sync sun50i-a64.dtsi to 5.6-rc1 +Date: Thu, 9 Jul 2020 12:20:53 +0100 +Subject: [PATCH 1/8] dt-bindings: clk: sync sun50i-a64-ccu.h to linux 5.8-rc1 + +Sync the clock bindings for the Allwinner A64 to Linux Signed-off-by: Peter Robinson --- - arch/arm/dts/sun50i-a64.dtsi | 472 ++++++++++++++++++++++++++++------- - 1 file changed, 387 insertions(+), 85 deletions(-) + include/dt-bindings/clock/sun50i-a64-ccu.h | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h +index d66432c6e6..318eb15c41 100644 +--- a/include/dt-bindings/clock/sun50i-a64-ccu.h ++++ b/include/dt-bindings/clock/sun50i-a64-ccu.h +@@ -43,8 +43,10 @@ + #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ + #define _DT_BINDINGS_CLK_SUN50I_A64_H_ + ++#define CLK_PLL_VIDEO0 7 + #define CLK_PLL_PERIPH0 11 + ++#define CLK_CPUX 21 + #define CLK_BUS_MIPI_DSI 28 + #define CLK_BUS_CE 29 + #define CLK_BUS_DMA 30 +@@ -129,7 +131,7 @@ + #define CLK_AVS 109 + #define CLK_HDMI 110 + #define CLK_HDMI_DDC 111 +- ++#define CLK_MBUS 112 + #define CLK_DSI_DPHY 113 + #define CLK_GPU 114 + +-- +2.26.2 + +From 274dff055e80778277860f72a903c01ef33f87c7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:29:15 +0100 +Subject: [PATCH 2/8] dt-bindings: leds: sync leds common.h to linux from + 5.8-rc1 + +Sync the leds common.h to the latest Linux version. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/leds/common.h | 36 ++++++++++++++++++++++--------- + 1 file changed, 26 insertions(+), 10 deletions(-) + +diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h +index 9e1256a7c1..0ce7dfc00d 100644 +--- a/include/dt-bindings/leds/common.h ++++ b/include/dt-bindings/leds/common.h +@@ -6,6 +6,7 @@ + * Author: Jacek Anaszewski + * + * Copyright (C) 2019 Jacek Anaszewski ++ * Copyright (C) 2020 Pavel Machek + */ + + #ifndef __DT_BINDINGS_LEDS_H +@@ -32,16 +33,38 @@ + #define LED_COLOR_ID_MAX 8 + + /* Standard LED functions */ ++/* Keyboard LEDs, usually it would be input4::capslock etc. */ ++/* Obsolete equivalent: "shift-key-light" */ ++#define LED_FUNCTION_CAPSLOCK "capslock" ++#define LED_FUNCTION_SCROLLLOCK "scrolllock" ++#define LED_FUNCTION_NUMLOCK "numlock" ++/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), ++ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ ++#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" ++ ++/* System LEDs, usually found on system body. ++ platform::mute (etc) is sometimes seen, :mute would be better */ ++#define LED_FUNCTION_POWER "power" ++#define LED_FUNCTION_DISK "disk" ++ ++/* Obsolete: "platform:*:charging" (allwinner sun50i) */ ++#define LED_FUNCTION_CHARGING "charging" ++/* Used RGB notification LEDs common on phones. ++ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), ++ "lp5523:{r,g,b}" (Nokia N900) */ ++#define LED_FUNCTION_STATUS "status" ++ ++#define LED_FUNCTION_MICMUTE "micmute" ++#define LED_FUNCTION_MUTE "mute" ++ ++/* Miscelleaus functions. Use functions above if you can. */ + #define LED_FUNCTION_ACTIVITY "activity" + #define LED_FUNCTION_ALARM "alarm" + #define LED_FUNCTION_BACKLIGHT "backlight" + #define LED_FUNCTION_BLUETOOTH "bluetooth" + #define LED_FUNCTION_BOOT "boot" + #define LED_FUNCTION_CPU "cpu" +-#define LED_FUNCTION_CAPSLOCK "capslock" +-#define LED_FUNCTION_CHARGING "charging" + #define LED_FUNCTION_DEBUG "debug" +-#define LED_FUNCTION_DISK "disk" + #define LED_FUNCTION_DISK_ACTIVITY "disk-activity" + #define LED_FUNCTION_DISK_ERR "disk-err" + #define LED_FUNCTION_DISK_READ "disk-read" +@@ -50,21 +73,14 @@ + #define LED_FUNCTION_FLASH "flash" + #define LED_FUNCTION_HEARTBEAT "heartbeat" + #define LED_FUNCTION_INDICATOR "indicator" +-#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" + #define LED_FUNCTION_LAN "lan" + #define LED_FUNCTION_MAIL "mail" + #define LED_FUNCTION_MTD "mtd" +-#define LED_FUNCTION_MICMUTE "micmute" +-#define LED_FUNCTION_MUTE "mute" +-#define LED_FUNCTION_NUMLOCK "numlock" + #define LED_FUNCTION_PANIC "panic" + #define LED_FUNCTION_PROGRAMMING "programming" +-#define LED_FUNCTION_POWER "power" + #define LED_FUNCTION_RX "rx" + #define LED_FUNCTION_SD "sd" +-#define LED_FUNCTION_SCROLLLOCK "scrolllock" + #define LED_FUNCTION_STANDBY "standby" +-#define LED_FUNCTION_STATUS "status" + #define LED_FUNCTION_TORCH "torch" + #define LED_FUNCTION_TX "tx" + #define LED_FUNCTION_USB "usb" +-- +2.26.2 + +From 7010e7d2b19d2ded674e376855d2716b7cd421b7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 10 Jul 2020 12:46:11 +0100 +Subject: [PATCH 3/8] dt-bindings: clk/reset: sync updated bindings for + Allwinner DE2 display engine + +Sync the clock and reset bindings for the Allwinner DE2 display engine to Linux 5.8-rc1. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/clock/sun8i-de2.h | 3 +++ + include/dt-bindings/reset/sun8i-de2.h | 1 + + 2 files changed, 4 insertions(+) + +diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h +index 3bed63b524..7768f73b05 100644 +--- a/include/dt-bindings/clock/sun8i-de2.h ++++ b/include/dt-bindings/clock/sun8i-de2.h +@@ -15,4 +15,7 @@ + #define CLK_MIXER1 7 + #define CLK_WB 8 + ++#define CLK_BUS_ROT 9 ++#define CLK_ROT 10 ++ + #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ +diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h +index 9526017432..1c36a6ac86 100644 +--- a/include/dt-bindings/reset/sun8i-de2.h ++++ b/include/dt-bindings/reset/sun8i-de2.h +@@ -10,5 +10,6 @@ + #define RST_MIXER0 0 + #define RST_MIXER1 1 + #define RST_WB 2 ++#define RST_ROT 3 + + #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ +-- +2.26.2 + +From bdbf5f21343571af989754c908299854e81f44dd Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:24:41 +0100 +Subject: [PATCH 4/8] arm: dts: sync axp803.dtsi from linux 5.8-rc1 + +Sync the Allwinner axp803 device tree to the latest upstream Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi +index e5eae8bafc..10e9186a76 100644 +--- a/arch/arm/dts/axp803.dtsi ++++ b/arch/arm/dts/axp803.dtsi +@@ -1,44 +1,5 @@ +-/* +- * Copyright 2017 Icenowy Zheng +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright 2017 Icenowy Zheng + + /* + * AXP803 Integrated Power Management Chip +@@ -49,6 +10,39 @@ + interrupt-controller; + #interrupt-cells = <1>; + ++ ac_power_supply: ac-power-supply { ++ compatible = "x-powers,axp803-ac-power-supply", ++ "x-powers,axp813-ac-power-supply"; ++ status = "disabled"; ++ }; ++ ++ axp_adc: adc { ++ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; ++ #io-channel-cells = <1>; ++ }; ++ ++ axp_gpio: gpio { ++ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ gpio0_ldo: gpio0-ldo { ++ pins = "GPIO0"; ++ function = "ldo"; ++ }; ++ ++ gpio1_ldo: gpio1-ldo { ++ pins = "GPIO1"; ++ function = "ldo"; ++ }; ++ }; ++ ++ battery_power_supply: battery-power-supply { ++ compatible = "x-powers,axp803-battery-power-supply", ++ "x-powers,axp813-battery-power-supply"; ++ status = "disabled"; ++ }; ++ + regulators { + /* Default work frequency for buck regulators */ + x-powers,dcdc-freq = <3000>; +@@ -152,4 +146,10 @@ + status = "disabled"; + }; + }; ++ ++ usb_power_supply: usb-power-supply { ++ compatible = "x-powers,axp803-usb-power-supply", ++ "x-powers,axp813-usb-power-supply"; ++ status = "disabled"; ++ }; + }; +-- +2.26.2 + +From e0f7e9ce1a8a889bf7a1c5842700f0cb368bc81b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:26:34 +0100 +Subject: [PATCH 5/8] arm: dts: Add new sun50i-a64-cpu-opp.dtsi from Linux + 5.8-rc1 + +Sync the Allwinner A64 CPU operating points dtsi from Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ + 1 file changed, 75 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi + +diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +new file mode 100644 +index 0000000000..578c37490d +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +@@ -0,0 +1,75 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2020 Vasily khoruzhick ++ */ ++ ++/ { ++ cpu0_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ ++ opp-648000000 { ++ opp-hz = /bits/ 64 <648000000>; ++ opp-microvolt = <1040000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-816000000 { ++ opp-hz = /bits/ 64 <816000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-912000000 { ++ opp-hz = /bits/ 64 <912000000>; ++ opp-microvolt = <1120000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-960000000 { ++ opp-hz = /bits/ 64 <960000000>; ++ opp-microvolt = <1160000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1008000000 { ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt = <1200000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1240000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1104000000 { ++ opp-hz = /bits/ 64 <1104000000>; ++ opp-microvolt = <1260000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1152000000 { ++ opp-hz = /bits/ 64 <1152000000>; ++ opp-microvolt = <1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu1 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu2 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu3 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; +-- +2.26.2 + +From b077a5962ba631e198d42c14516426b878c157eb Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 10 Jul 2020 12:39:21 +0100 +Subject: [PATCH 6/8] arm: dts: Sync the sun50i-a64.dtsi from Linux 5.8-rc1 + +Sync the Allwinner A64 sun50i-a64.dtsi from Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++------- + 1 file changed, 434 insertions(+), 98 deletions(-) diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index ff41abc96a..862b47dc9d 100644 +index ff41abc96a..8dfbcd1440 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -1,46 +1,7 @@ @@ -147,12 +535,14 @@ index ff41abc96a..862b47dc9d 100644 }; psci { -@@ -155,6 +130,30 @@ +@@ -155,26 +130,33 @@ method = "smc"; }; +- sound_spdif { + sound: sound { -+ compatible = "simple-audio-card"; + compatible = "simple-audio-card"; +- simple-audio-card,name = "On-board SPDIF"; + simple-audio-card,name = "sun50i-a64-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&cpudai>; @@ -165,28 +555,32 @@ index ff41abc96a..862b47dc9d 100644 + "AIF1 Slot 0 Left ADC", "Left ADC", + "AIF1 Slot 0 Right ADC", "Right ADC"; + status = "disabled"; -+ + +- simple-audio-card,cpu { +- sound-dai = <&spdif>; + cpudai: simple-audio-card,cpu { + sound-dai = <&dai>; -+ }; -+ + }; + +- simple-audio-card,codec { +- sound-dai = <&spdif_out>; + link_codec: simple-audio-card,codec { + sound-dai = <&codec>; -+ }; -+ }; -+ - sound_spdif { - compatible = "simple-audio-card"; - simple-audio-card,name = "On-board SPDIF"; -@@ -175,6 +174,7 @@ + }; + }; +- spdif_out: spdif-out { +- #sound-dai-cells = <0>; +- compatible = "linux,spdif-dit"; +- }; +- timer { compatible = "arm,armv8-timer"; + allwinner,erratum-unknown1; interrupts = , ; }; @@ -264,14 +658,16 @@ index ff41abc96a..862b47dc9d 100644 compatible = "allwinner,sun50i-a64-de2"; reg = <0x1000000 0x400000>; allwinner,sram = <&de2_sram 1>; -@@ -202,10 +265,10 @@ +@@ -201,16 +246,28 @@ + display_clocks: clock@0 { compatible = "allwinner,sun50i-a64-de2-clk"; - reg = <0x0 0x100000>; +- reg = <0x0 0x100000>; - clocks = <&ccu CLK_DE>, - <&ccu CLK_BUS_DE>; - clock-names = "mod", - "bus"; ++ reg = <0x0 0x10000>; + clocks = <&ccu CLK_BUS_DE>, + <&ccu CLK_DE>; + clock-names = "bus", @@ -279,7 +675,24 @@ index ff41abc96a..862b47dc9d 100644 resets = <&ccu RST_BUS_DE>; #clock-cells = <1>; #reset-cells = <1>; -@@ -225,11 +288,19 @@ + }; + ++ rotate: rotate@20000 { ++ compatible = "allwinner,sun50i-a64-de2-rotate", ++ "allwinner,sun8i-a83t-de2-rotate"; ++ reg = <0x20000 0x10000>; ++ interrupts = ; ++ clocks = <&display_clocks CLK_BUS_ROT>, ++ <&display_clocks CLK_ROT>; ++ clock-names = "bus", ++ "mod"; ++ resets = <&display_clocks RST_ROT>; ++ }; ++ + mixer0: mixer@100000 { + compatible = "allwinner,sun50i-a64-de2-mixer-0"; + reg = <0x100000 0x100000>; +@@ -225,11 +282,19 @@ #size-cells = <0>; mixer0_out: port@1 { @@ -300,7 +713,7 @@ index ff41abc96a..862b47dc9d 100644 }; }; }; -@@ -248,9 +319,17 @@ +@@ -248,9 +313,17 @@ #size-cells = <0>; mixer1_out: port@1 { @@ -319,7 +732,7 @@ index ff41abc96a..862b47dc9d 100644 remote-endpoint = <&tcon1_in_mixer1>; }; }; -@@ -259,8 +338,7 @@ +@@ -259,8 +332,7 @@ }; syscon: syscon@1c00000 { @@ -329,7 +742,7 @@ index ff41abc96a..862b47dc9d 100644 reg = <0x01c00000 0x1000>; #address-cells = <1>; #size-cells = <1>; -@@ -278,6 +356,20 @@ +@@ -278,6 +350,20 @@ reg = <0x0000 0x28000>; }; }; @@ -350,7 +763,7 @@ index ff41abc96a..862b47dc9d 100644 }; dma: dma-controller@1c02000 { -@@ -299,6 +391,7 @@ +@@ -299,6 +385,7 @@ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; clock-output-names = "tcon-pixel-clock"; @@ -358,7 +771,7 @@ index ff41abc96a..862b47dc9d 100644 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; -@@ -315,12 +408,23 @@ +@@ -315,12 +402,23 @@ reg = <0>; remote-endpoint = <&mixer0_out_tcon0>; }; @@ -382,7 +795,7 @@ index ff41abc96a..862b47dc9d 100644 }; }; }; -@@ -340,9 +444,17 @@ +@@ -340,9 +438,17 @@ #size-cells = <0>; tcon1_in: port@0 { @@ -401,7 +814,7 @@ index ff41abc96a..862b47dc9d 100644 remote-endpoint = <&mixer1_out_tcon1>; }; }; -@@ -360,6 +472,17 @@ +@@ -360,6 +466,17 @@ }; }; @@ -419,7 +832,7 @@ index ff41abc96a..862b47dc9d 100644 mmc0: mmc@1c0f000 { compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; -@@ -405,6 +528,21 @@ +@@ -405,6 +522,31 @@ sid: eeprom@1c14000 { compatible = "allwinner,sun50i-a64-sid"; reg = <0x1c14000 0x400>; @@ -438,10 +851,20 @@ index ff41abc96a..862b47dc9d 100644 + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CE>; ++ }; ++ ++ msgbox: mailbox@1c17000 { ++ compatible = "allwinner,sun50i-a64-msgbox", ++ "allwinner,sun6i-a31-msgbox"; ++ reg = <0x01c17000 0x1000>; ++ clocks = <&ccu CLK_BUS_MSGBOX>; ++ resets = <&ccu RST_BUS_MSGBOX>; ++ interrupts = ; ++ #mbox-cells = <1>; }; usb_otg: usb@1c19000 { -@@ -417,6 +555,7 @@ +@@ -417,6 +559,7 @@ phys = <&usbphy 0>; phy-names = "usb"; extcon = <&usbphy 0>; @@ -449,7 +872,7 @@ index ff41abc96a..862b47dc9d 100644 status = "disabled"; }; -@@ -491,7 +630,7 @@ +@@ -491,7 +634,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun50i-a64-ccu"; reg = <0x01c20000 0x400>; @@ -458,7 +881,7 @@ index ff41abc96a..862b47dc9d 100644 clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; -@@ -503,22 +642,45 @@ +@@ -503,22 +646,50 @@ interrupts = , , ; @@ -494,6 +917,11 @@ index ff41abc96a..862b47dc9d 100644 function = "i2c1"; }; ++ i2c2_pins: i2c2-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ + /omit-if-no-ref/ + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", @@ -507,7 +935,7 @@ index ff41abc96a..862b47dc9d 100644 mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; -@@ -551,19 +713,19 @@ +@@ -551,19 +722,19 @@ bias-pull-up; }; @@ -530,7 +958,7 @@ index ff41abc96a..862b47dc9d 100644 pins = "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23"; -@@ -571,17 +733,17 @@ +@@ -571,17 +742,17 @@ drive-strength = <40>; }; @@ -551,7 +979,7 @@ index ff41abc96a..862b47dc9d 100644 pins = "PD0", "PD1", "PD2", "PD3"; function = "spi1"; }; -@@ -591,12 +753,12 @@ +@@ -591,12 +762,12 @@ function = "uart0"; }; @@ -566,7 +994,7 @@ index ff41abc96a..862b47dc9d 100644 pins = "PG8", "PG9"; function = "uart1"; }; -@@ -638,6 +800,14 @@ +@@ -638,6 +809,14 @@ status = "disabled"; }; @@ -581,7 +1009,7 @@ index ff41abc96a..862b47dc9d 100644 i2s0: i2s@1c22000 { #sound-dai-cells = <0>; compatible = "allwinner,sun50i-a64-i2s", -@@ -666,6 +836,41 @@ +@@ -666,6 +845,41 @@ status = "disabled"; }; @@ -623,7 +1051,7 @@ index ff41abc96a..862b47dc9d 100644 uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -@@ -727,6 +932,8 @@ +@@ -727,6 +941,8 @@ interrupts = ; clocks = <&ccu CLK_BUS_I2C0>; resets = <&ccu RST_BUS_I2C0>; @@ -632,7 +1060,7 @@ index ff41abc96a..862b47dc9d 100644 status = "disabled"; #address-cells = <1>; #size-cells = <0>; -@@ -738,6 +945,8 @@ +@@ -738,6 +954,8 @@ interrupts = ; clocks = <&ccu CLK_BUS_I2C1>; resets = <&ccu RST_BUS_I2C1>; @@ -641,7 +1069,22 @@ index ff41abc96a..862b47dc9d 100644 status = "disabled"; #address-cells = <1>; #size-cells = <0>; -@@ -808,6 +1017,28 @@ +@@ -749,12 +967,13 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + +- + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +@@ -808,6 +1027,28 @@ }; }; @@ -670,10 +1113,20 @@ index ff41abc96a..862b47dc9d 100644 gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, -@@ -830,6 +1061,51 @@ +@@ -830,6 +1071,75 @@ status = "disabled"; }; ++ mbus: dram-controller@1c62000 { ++ compatible = "allwinner,sun50i-a64-mbus"; ++ reg = <0x01c62000 0x1000>; ++ clocks = <&ccu 112>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ dma-ranges = <0x00000000 0x40000000 0xc0000000>; ++ #interconnect-cells = <1>; ++ }; ++ + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; @@ -718,11 +1171,25 @@ index ff41abc96a..862b47dc9d 100644 + status = "disabled"; + #phy-cells = <0>; + }; ++ ++ deinterlace: deinterlace@1e00000 { ++ compatible = "allwinner,sun50i-a64-deinterlace", ++ "allwinner,sun8i-h3-deinterlace"; ++ reg = <0x01e00000 0x20000>; ++ clocks = <&ccu CLK_BUS_DEINTERLACE>, ++ <&ccu CLK_DEINTERLACE>, ++ <&ccu CLK_DRAM_DEINTERLACE>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_DEINTERLACE>; ++ interrupts = ; ++ interconnects = <&mbus 9>; ++ interconnect-names = "dma-mem"; ++ }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; -@@ -842,7 +1118,7 @@ +@@ -842,7 +1152,7 @@ resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; phys = <&hdmi_phy>; @@ -731,7 +1198,7 @@ index ff41abc96a..862b47dc9d 100644 status = "disabled"; ports { -@@ -867,7 +1143,7 @@ +@@ -867,7 +1177,7 @@ compatible = "allwinner,sun50i-a64-hdmi-phy"; reg = <0x01ef0000 0x10000>; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, @@ -740,7 +1207,7 @@ index ff41abc96a..862b47dc9d 100644 clock-names = "bus", "mod", "pll-0"; resets = <&ccu RST_BUS_HDMI0>; reset-names = "phy"; -@@ -875,11 +1151,12 @@ +@@ -875,11 +1185,12 @@ }; rtc: rtc@1f00000 { @@ -756,7 +1223,7 @@ index ff41abc96a..862b47dc9d 100644 clocks = <&osc32k>; #clock-cells = <1>; }; -@@ -896,13 +1173,19 @@ +@@ -896,13 +1207,19 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; @@ -778,7 +1245,7 @@ index ff41abc96a..862b47dc9d 100644 r_i2c: i2c@1f02400 { compatible = "allwinner,sun50i-a64-i2c", "allwinner,sun6i-a31-i2c"; -@@ -915,6 +1198,19 @@ +@@ -915,6 +1232,19 @@ #size-cells = <0>; }; @@ -798,7 +1265,7 @@ index ff41abc96a..862b47dc9d 100644 r_pwm: pwm@1f03800 { compatible = "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"; -@@ -942,12 +1238,17 @@ +@@ -942,12 +1272,17 @@ function = "s_i2c"; }; @@ -818,7 +1285,7 @@ index ff41abc96a..862b47dc9d 100644 pins = "PL0", "PL1"; function = "s_rsb"; }; -@@ -972,6 +1273,7 @@ +@@ -972,6 +1307,7 @@ "allwinner,sun6i-a31-wdt"; reg = <0x01c20ca0 0x20>; interrupts = ; @@ -827,196 +1294,21 @@ index ff41abc96a..862b47dc9d 100644 }; }; -- -2.26.0 +2.26.2 -From fbe1642e24188e96f20ab5a3b003597288104e31 Mon Sep 17 00:00:00 2001 +From 9e91885814f880ce13ee98cab79876338811949f Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 10 Mar 2020 15:32:51 +0000 -Subject: [PATCH 2/9] arm: dts: AllWinner: sync axp803.dtsi to 5.6-rc1 - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - -diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi -index e5eae8bafc..10e9186a76 100644 ---- a/arch/arm/dts/axp803.dtsi -+++ b/arch/arm/dts/axp803.dtsi -@@ -1,44 +1,5 @@ --/* -- * Copyright 2017 Icenowy Zheng -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright 2017 Icenowy Zheng - - /* - * AXP803 Integrated Power Management Chip -@@ -49,6 +10,39 @@ - interrupt-controller; - #interrupt-cells = <1>; - -+ ac_power_supply: ac-power-supply { -+ compatible = "x-powers,axp803-ac-power-supply", -+ "x-powers,axp813-ac-power-supply"; -+ status = "disabled"; -+ }; -+ -+ axp_adc: adc { -+ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; -+ #io-channel-cells = <1>; -+ }; -+ -+ axp_gpio: gpio { -+ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ gpio0_ldo: gpio0-ldo { -+ pins = "GPIO0"; -+ function = "ldo"; -+ }; -+ -+ gpio1_ldo: gpio1-ldo { -+ pins = "GPIO1"; -+ function = "ldo"; -+ }; -+ }; -+ -+ battery_power_supply: battery-power-supply { -+ compatible = "x-powers,axp803-battery-power-supply", -+ "x-powers,axp813-battery-power-supply"; -+ status = "disabled"; -+ }; -+ - regulators { - /* Default work frequency for buck regulators */ - x-powers,dcdc-freq = <3000>; -@@ -152,4 +146,10 @@ - status = "disabled"; - }; - }; -+ -+ usb_power_supply: usb-power-supply { -+ compatible = "x-powers,axp803-usb-power-supply", -+ "x-powers,axp813-usb-power-supply"; -+ status = "disabled"; -+ }; - }; --- -2.26.0 - -From f44987a0ccf064f9da4a119e7700605a3eb56447 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 10 Mar 2020 15:34:58 +0000 -Subject: [PATCH 3/9] arm: dts: AllWinner: sync sun50i-a64.dtsi to 5.7-rc1 - -Adds the following two patches queued for 5.7: -- arm64: dts: sun50i-a64: Add i2c2 pins -- arm64: dts: allwinner: a64: Add MBUS controller node - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64.dtsi | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index 862b47dc9d..89a60fcf5a 100644 ---- a/arch/arm/dts/sun50i-a64.dtsi -+++ b/arch/arm/dts/sun50i-a64.dtsi -@@ -671,6 +671,11 @@ - function = "i2c1"; - }; - -+ i2c2_pins: i2c2-pins { -+ pins = "PE14", "PE15"; -+ function = "i2c2"; -+ }; -+ - /omit-if-no-ref/ - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", -@@ -958,12 +963,13 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - -- - spi0: spi@1c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; -@@ -1061,6 +1067,14 @@ - status = "disabled"; - }; - -+ mbus: dram-controller@1c62000 { -+ compatible = "allwinner,sun50i-a64-mbus"; -+ reg = <0x01c62000 0x1000>; -+ clocks = <&ccu 112>; -+ dma-ranges = <0x00000000 0x40000000 0xc0000000>; -+ #interconnect-cells = <1>; -+ }; -+ - csi: csi@1cb0000 { - compatible = "allwinner,sun50i-a64-csi"; - reg = <0x01cb0000 0x1000>; --- -2.26.0 - -From 465dbf297edb9881e79c1b81fef8d9328fbaf7ad Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 10 Mar 2020 15:37:39 +0000 -Subject: [PATCH 4/9] arm: dts: allwinner: Add initial support for Pine64 +Date: Thu, 9 Jul 2020 12:44:55 +0100 +Subject: [PATCH 7/8] arm64: dts: allwinner: Add initial support for Pine64 PinePhone -The initial DT for the PinePhone models are queued for 5.7-rc1: +At the moment PinePhone comes in two slightly incompatible variants: + - 1.0: Early Developer Batch - 1.1: Braveheart Batch +This syncs the Pinephone DTs from Linux 5.8-rc1. + Signed-off-by: Peter Robinson --- arch/arm/dts/Makefile | 2 + @@ -1029,10 +1321,10 @@ Signed-off-by: Peter Robinson create mode 100644 arch/arm/dts/sun50i-a64-pinephone.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 820ee9733a..fb7516ee83 100644 +index cee10f533f..efaadeecf3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -573,6 +573,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \ +@@ -597,6 +597,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb \ sun50i-a64-pinebook.dtb \ @@ -1461,148 +1753,50 @@ index 0000000000..cefda145c3 + status = "okay"; +}; -- -2.26.0 +2.26.2 -From e8fd62cbf02828da817628d15111e6e974144473 Mon Sep 17 00:00:00 2001 +From ab4bad52587be7da4262d943f19b5db02a24a045 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 10 Mar 2020 15:46:43 +0000 -Subject: [PATCH 5/9] sync sun50i-a64 clocks with linux 5.6 +Date: Wed, 15 Jul 2020 13:14:09 +0100 +Subject: [PATCH 8/8] Initial Pine64 Pinephone support + +The Pine64 Pinephone is a smartphone based on the AllWinner A64 SoC. +It has the following features: +* 2GB LPDDR3 SDRAM +* 5.95 inch 1440x720 HD IPS capacitive touchscreen +* 16GB eMMC, mSD slot +* Quectel EG25 LTE Modem +* Realtek RTL8723CS WiFi/BT +* Front and read cameras +* Accelerometer, gyro, proximity, ambient light, compass sensors +* A USB Type-C, USB Host, DisplayPort alt mode output, 15W 5V 3A Quick Charge, follows USB PD specification Signed-off-by: Peter Robinson --- - include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h -index d66432c6e6..e512a1c9b0 100644 ---- a/include/dt-bindings/clock/sun50i-a64-ccu.h -+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h -@@ -43,8 +43,10 @@ - #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ - #define _DT_BINDINGS_CLK_SUN50I_A64_H_ - -+#define CLK_PLL_VIDEO0 7 - #define CLK_PLL_PERIPH0 11 - -+#define CLK_CPUX 21 - #define CLK_BUS_MIPI_DSI 28 - #define CLK_BUS_CE 29 - #define CLK_BUS_DMA 30 --- -2.26.0 - -From a07a9d6cb77ea0bc21cd64922bb428faf5b7e121 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 10 Mar 2020 15:49:11 +0000 -Subject: [PATCH 6/9] add upstream sun50i-a64-cpu-opp.dtsi added in 5.6 - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ - 1 file changed, 75 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi - -diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -new file mode 100644 -index 0000000000..578c37490d ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -@@ -0,0 +1,75 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2020 Vasily khoruzhick -+ */ -+ -+/ { -+ cpu0_opp_table: opp_table0 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ -+ opp-648000000 { -+ opp-hz = /bits/ 64 <648000000>; -+ opp-microvolt = <1040000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-816000000 { -+ opp-hz = /bits/ 64 <816000000>; -+ opp-microvolt = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-912000000 { -+ opp-hz = /bits/ 64 <912000000>; -+ opp-microvolt = <1120000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-960000000 { -+ opp-hz = /bits/ 64 <960000000>; -+ opp-microvolt = <1160000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; -+ opp-microvolt = <1200000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1240000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt = <1260000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1152000000 { -+ opp-hz = /bits/ 64 <1152000000>; -+ opp-microvolt = <1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; --- -2.26.0 - -From 493869ec73e6ba999b6f7c49369e966ebfb8ef0b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Apr 2020 09:50:11 +0100 -Subject: [PATCH 7/9] Initial Pinephone support - -Signed-off-by: Peter Robinson ---- - configs/pinephone_defconfig | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) + arch/arm/Kconfig | 2 +- + configs/pinephone_defconfig | 38 +++++++++++++++++++++++++++++++++++++ + 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 configs/pinephone_defconfig +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index e16fe03887..636ba26938 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1004,7 +1004,7 @@ config ARCH_SUNXI + bool "Support sunxi (Allwinner) SoCs" + select BINMAN + select CMD_GPIO +- select CMD_MMC if MMC ++select CMD_MMC if MMC + select CMD_USB if DISTRO_DEFAULTS + select CLK + select DM diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig new file mode 100644 -index 0000000000..a7d1e610d4 +index 0000000000..d5750aa954 --- /dev/null +++ b/configs/pinephone_defconfig -@@ -0,0 +1,26 @@ +@@ -0,0 +1,38 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y @@ -1610,11 +1804,11 @@ index 0000000000..a7d1e610d4 +CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 ++CONFIG_NR_DRAM_BANKS=1 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_R_I2C_ENABLE=y -+CONFIG_SPL_SPI_SUNXI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_USE_PREBOOT=y ++# CONFIG_SPL_SPI_SUNXI is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.1" @@ -1624,14 +1818,25 @@ index 0000000000..a7d1e610d4 +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_SUNXI=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++# CONFIG_CMD_MII is not set ++# CONFIG_CMD_NFS is not set ++# CONFIG_DM_ETH is not set ++# CONFIG_PHY is not set ++# CONFIG_PHY_GIGE is not set ++# CONFIG_SUN8I_EMAC is not set ++# CONFIG_PHY_REALTEK is not set ++# CONFIG_CMD_SF is not set ++# CONFIG_SPI is not set ++# CONFIG_DM_SPI is not set ++# CONFIG_SPI_FLASH is not set ++# CONFIG_SPI_MEM is not set ++# CONFIG_DM_SPI_FLASH is not set -- -2.26.0 - +2.26.2 From 163b30d9cd1c0cf77107e0330567bbda063410da Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 14 Apr 2020 09:51:44 +0100 diff --git a/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch b/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch deleted file mode 100644 index 720b1ba..0000000 --- a/USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch +++ /dev/null @@ -1,993 +0,0 @@ -From 47d0df70fbe5997770090aca05b07d774a19a722 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 10 Jun 2020 13:15:45 +0100 -Subject: [PATCH] USB host support for Raspberry Pi 4 board (64-bit) - -Signed-off-by: Peter Robinson ---- - arch/arm/mach-bcm283x/init.c | 20 +- - configs/rpi_4_defconfig | 9 + - configs/rpi_arm64_defconfig | 8 +- - drivers/pci/Kconfig | 9 + - drivers/pci/Makefile | 1 + - drivers/pci/pci-rcar-gen3.c | 8 - - drivers/pci/pcie_brcmstb.c | 623 ++++++++++++++++++++++++++++++++++ - drivers/pci/pcie_intel_fpga.c | 3 - - drivers/usb/host/xhci-mem.c | 3 + - include/linux/bitfield.h | 52 +++ - include/pci.h | 22 +- - include/usb/xhci.h | 8 - - 12 files changed, 740 insertions(+), 26 deletions(-) - create mode 100644 drivers/pci/pcie_brcmstb.c - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index f4d00d892d..cf4c5b245d 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -12,10 +12,15 @@ - #include - #include - -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL -+ - #ifdef CONFIG_ARM64 - #include - --static struct mm_region bcm283x_mem_map[] = { -+#define MEM_MAP_MAX_ENTRIES (4) -+ -+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -35,11 +40,11 @@ static struct mm_region bcm283x_mem_map[] = { - } - }; - --static struct mm_region bcm2711_mem_map[] = { -+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -- .size = 0xfe000000UL, -+ .size = 0xfc000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { -@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = { - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, -+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS, -+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - /* List terminator */ - 0, -@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd) - { - int i; - -- for (i = 0; i < 2; i++) { -+ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) { - mem_map[i].virt = pd[i].virt; - mem_map[i].phys = pd[i].phys; - mem_map[i].size = pd[i].size; -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index f0301dc8bc..b42efe6072 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 - CONFIG_ENV_SIZE=0x4000 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_DFU=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_MANUFACTURER="FSL" - CONFIG_USB_GADGET_VENDOR_NUM=0x0525 -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index d16c2388af..0feea7f0be 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_USE_PREBOOT=y --CONFIG_PREBOOT="usb start" -+CONFIG_PREBOOT="pci enum; usb start;" - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y -@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_BCM2835=y - CONFIG_DM_ETH=y - CONFIG_BCMGENET=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_PCI=y - CONFIG_USB_DWC2=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y -diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig -index 6d8c22aacf..7e1e51d9ea 100644 ---- a/drivers/pci/Kconfig -+++ b/drivers/pci/Kconfig -@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP - Say Y here if you want to enable PCIe controller support on - Rockchip SoCs. - -+config PCI_BRCMSTB -+ bool "Broadcom STB PCIe controller" -+ depends on DM_PCI -+ depends on ARCH_BCM283X -+ help -+ Say Y here if you want to enable support for PCIe controller -+ on Broadcom set-top-box (STB) SoCs. -+ This driver currently supports only BCM2711 SoC and RC mode -+ of the controller. - endif -diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile -index 955351c5c2..3e1ff417d7 100644 ---- a/drivers/pci/Makefile -+++ b/drivers/pci/Makefile -@@ -43,4 +43,5 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o - obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o - obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o - obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o -+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o - obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o -diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c -index df7b37a592..1f51854ccc 100644 ---- a/drivers/pci/pci-rcar-gen3.c -+++ b/drivers/pci/pci-rcar-gen3.c -@@ -118,14 +118,6 @@ - #define RCAR_PCI_MAX_RESOURCES 4 - #define MAX_NR_INBOUND_MAPS 6 - --#define PCI_EXP_FLAGS 2 /* Capabilities register */ --#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ --#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ --#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ --#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ --#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ --#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -- - enum { - RCAR_PCI_ACCESS_READ, - RCAR_PCI_ACCESS_WRITE, -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -new file mode 100644 -index 0000000000..dade79e9c8 ---- /dev/null -+++ b/drivers/pci/pcie_brcmstb.c -@@ -0,0 +1,623 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Broadcom STB PCIe controller driver -+ * -+ * Copyright (C) 2020 Samsung Electronics Co., Ltd. -+ * -+ * Based on upstream Linux kernel driver: -+ * drivers/pci/controller/pcie-brcmstb.c -+ * Copyright (C) 2009 - 2017 Broadcom -+ * -+ * Based driver by Nicolas Saenz Julienne -+ * Copyright (C) 2020 Nicolas Saenz Julienne -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* Offset of the mandatory PCIe capability config registers */ -+#define BRCM_PCIE_CAP_REGS 0x00ac -+ -+/* The PCIe controller register offsets */ -+#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1 0x0188 -+#define VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc -+#define VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN 0x0 -+ -+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c -+#define CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff -+ -+#define PCIE_RC_DL_MDIO_ADDR 0x1100 -+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 -+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 -+ -+#define PCIE_MISC_MISC_CTRL 0x4008 -+#define MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 -+#define MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 -+#define MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 -+#define MISC_CTRL_MAX_BURST_SIZE_128 0x0 -+#define MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c -+#define PCIE_MEM_WIN0_LO(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 -+#define PCIE_MEM_WIN0_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) -+ -+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c -+#define RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 -+#define RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 -+ -+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c -+#define RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_PCIE_STATUS 0x4068 -+#define STATUS_PCIE_PORT_MASK 0x80 -+#define STATUS_PCIE_PORT_SHIFT 7 -+#define STATUS_PCIE_DL_ACTIVE_MASK 0x20 -+#define STATUS_PCIE_DL_ACTIVE_SHIFT 5 -+#define STATUS_PCIE_PHYLINKUP_MASK 0x10 -+#define STATUS_PCIE_PHYLINKUP_SHIFT 4 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 -+#define MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 -+#define MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 -+#define MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT 12 -+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 -+#define MEM_WIN0_BASE_HI_BASE_MASK 0xff -+#define PCIE_MEM_WIN0_BASE_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 -+#define PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff -+#define PCIE_MEM_WIN0_LIMIT_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) -+ -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 -+#define PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 -+#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 -+ -+#define PCIE_MSI_INTR2_CLR 0x4508 -+#define PCIE_MSI_INTR2_MASK_SET 0x4510 -+ -+#define PCIE_EXT_CFG_DATA 0x8000 -+ -+#define PCIE_EXT_CFG_INDEX 0x9000 -+#define PCIE_EXT_BUSNUM_SHIFT 20 -+#define PCIE_EXT_SLOT_SHIFT 15 -+#define PCIE_EXT_FUNC_SHIFT 12 -+ -+#define PCIE_RGR1_SW_INIT_1 0x9210 -+#define RGR1_SW_INIT_1_PERST_MASK 0x1 -+#define RGR1_SW_INIT_1_INIT_MASK 0x2 -+ -+/* PCIe parameters */ -+#define BRCM_NUM_PCIE_OUT_WINS 4 -+ -+/* MDIO registers */ -+#define MDIO_PORT0 0x0 -+#define MDIO_DATA_MASK 0x7fffffff -+#define MDIO_DATA_SHIFT 0 -+#define MDIO_PORT_MASK 0xf0000 -+#define MDIO_PORT_SHIFT 16 -+#define MDIO_REGAD_MASK 0xffff -+#define MDIO_REGAD_SHIFT 0 -+#define MDIO_CMD_MASK 0xfff00000 -+#define MDIO_CMD_SHIFT 20 -+#define MDIO_CMD_READ 0x1 -+#define MDIO_CMD_WRITE 0x0 -+#define MDIO_DATA_DONE_MASK 0x80000000 -+#define SSC_REGS_ADDR 0x1100 -+#define SET_ADDR_OFFSET 0x1f -+#define SSC_CNTL_OFFSET 0x2 -+#define SSC_CNTL_OVRD_EN_MASK 0x8000 -+#define SSC_CNTL_OVRD_VAL_MASK 0x4000 -+#define SSC_STATUS_OFFSET 0x1 -+#define SSC_STATUS_SSC_MASK 0x400 -+#define SSC_STATUS_SSC_SHIFT 10 -+#define SSC_STATUS_PLL_LOCK_MASK 0x800 -+#define SSC_STATUS_PLL_LOCK_SHIFT 11 -+ -+/** -+ * struct brcm_pcie - the PCIe controller state -+ * @base: Base address of memory mapped IO registers of the controller -+ * @gen: Non-zero value indicates limitation of the PCIe controller operation -+ * to a specific generation (1, 2 or 3) -+ * @ssc: true indicates active Spread Spectrum Clocking operation -+ */ -+struct brcm_pcie { -+ void __iomem *base; -+ -+ int gen; -+ bool ssc; -+}; -+ -+/** -+ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size -+ * @size: The inbound region size -+ * -+ * This function converts size of the inbound "BAR" region to the non-linear -+ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field. -+ * -+ * Return: The encoded inbound region size -+ */ -+static int brcm_pcie_encode_ibar_size(u64 size) -+{ -+ int log2_in = ilog2(size); -+ -+ if (log2_in >= 12 && log2_in <= 15) -+ /* Covers 4KB to 32KB (inclusive) */ -+ return (log2_in - 12) + 0x1c; -+ else if (log2_in >= 16 && log2_in <= 37) -+ /* Covers 64KB to 32GB, (inclusive) */ -+ return log2_in - 15; -+ -+ /* Something is awry so disable */ -+ return 0; -+} -+ -+/** -+ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode -+ * @pcie: Pointer to the PCIe controller state -+ * -+ * The controller is capable of serving in both RC and EP roles. -+ * -+ * Return: true for RC mode, false for EP mode. -+ */ -+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) -+{ -+ u32 val; -+ -+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); -+ -+ return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT; -+} -+ -+/** -+ * brcm_pcie_link_up() - Check whether the PCIe link is up -+ * @pcie: Pointer to the PCIe controller state -+ * -+ * Return: true if the link is up, false otherwise. -+ */ -+static bool brcm_pcie_link_up(struct brcm_pcie *pcie) -+{ -+ u32 val, dla, plu; -+ -+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); -+ dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT; -+ plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT; -+ -+ return dla && plu; -+} -+ -+static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf, -+ uint offset, void **paddress) -+{ -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ unsigned int pci_bus = PCI_BUS(bdf); -+ unsigned int pci_dev = PCI_DEV(bdf); -+ unsigned int pci_func = PCI_FUNC(bdf); -+ int idx; -+ -+ /* -+ * Busses 0 (host PCIe bridge) and 1 (its immediate child) -+ * are limited to a single device each -+ */ -+ if (pci_bus < 2 && pci_dev > 0) -+ return -EINVAL; -+ -+ /* Accesses to the RC go right to the RC registers */ -+ if (pci_bus == 0) { -+ *paddress = pcie->base + offset; -+ return 0; -+ } -+ -+ /* For devices, write to the config space index register */ -+ idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT) -+ | (pci_dev << PCIE_EXT_SLOT_SHIFT) -+ | (pci_func << PCIE_EXT_FUNC_SHIFT); -+ -+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); -+ *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset; -+ -+ return 0; -+} -+ -+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, -+ uint offset, ulong *valuep, -+ enum pci_size_t size) -+{ -+ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address, -+ bdf, offset, valuep, size); -+} -+ -+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf, -+ uint offset, ulong value, -+ enum pci_size_t size) -+{ -+ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address, -+ bdf, offset, value, size); -+} -+ -+static const char *link_speed_to_str(unsigned int cls) -+{ -+ switch (cls) { -+ case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5"; -+ case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0"; -+ case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0"; -+ default: -+ break; -+ } -+ -+ return "??"; -+} -+ -+static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad, -+ unsigned int cmd) -+{ -+ u32 pkt; -+ -+ pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK; -+ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK; -+ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK; -+ -+ return pkt; -+} -+ -+/** -+ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus -+ * @base: Pointer to the PCIe controller IO registers -+ * @port: The MDIO port number -+ * @regad: The register address -+ * @val: A pointer at which to store the read value -+ * -+ * Return: 0 on success and register value in @val, negative error value -+ * on failure. -+ */ -+static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port, -+ unsigned int regad, u32 *val) -+{ -+ u32 data, addr; -+ int ret; -+ -+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ); -+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ -+ ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data, -+ (data & MDIO_DATA_DONE_MASK), 100); -+ -+ *val = data & MDIO_DATA_MASK; -+ -+ return ret; -+} -+ -+/** -+ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus -+ * @base: Pointer to the PCIe controller IO registers -+ * @port: The MDIO port number -+ * @regad: Address of the register -+ * @wrdata: The value to write -+ * -+ * Return: 0 on success, negative error value on failure. -+ */ -+static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port, -+ unsigned int regad, u16 wrdata) -+{ -+ u32 data, addr; -+ -+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE); -+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); -+ -+ return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data, -+ !(data & MDIO_DATA_DONE_MASK), 100); -+} -+ -+/** -+ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking -+ * @base: pointer to the PCIe controller IO registers -+ * -+ * Return: 0 on success, negative error value on failure. -+ */ -+static int brcm_pcie_set_ssc(void __iomem *base) -+{ -+ int pll, ssc; -+ int ret; -+ u32 tmp; -+ -+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET, -+ SSC_REGS_ADDR); -+ if (ret < 0) -+ return ret; -+ -+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK); -+ -+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp); -+ if (ret < 0) -+ return ret; -+ -+ udelay(1000); -+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT; -+ pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT; -+ -+ return ssc && pll ? 0 : -EIO; -+} -+ -+/** -+ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3) -+ * @pcie: pointer to the PCIe controller state -+ * @gen: PCIe generation to limit the controller's operation to -+ */ -+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen) -+{ -+ void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS; -+ -+ u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2); -+ u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP); -+ -+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; -+ writel(lnkcap, cap_base + PCI_EXP_LNKCAP); -+ -+ lnkctl2 = (lnkctl2 & ~0xf) | gen; -+ writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2); -+} -+ -+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, -+ unsigned int win, u64 phys_addr, -+ u64 pcie_addr, u64 size) -+{ -+ void __iomem *base = pcie->base; -+ u32 phys_addr_mb_high, limit_addr_mb_high; -+ phys_addr_t phys_addr_mb, limit_addr_mb; -+ int high_addr_shift; -+ u32 tmp; -+ -+ /* Set the base of the pcie_addr window */ -+ writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win)); -+ writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win)); -+ -+ /* Write the addr base & limit lower bits (in MBs) */ -+ phys_addr_mb = phys_addr / SZ_1M; -+ limit_addr_mb = (phys_addr + size - 1) / SZ_1M; -+ -+ tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ u32p_replace_bits(&tmp, phys_addr_mb, -+ MEM_WIN0_BASE_LIMIT_BASE_MASK); -+ u32p_replace_bits(&tmp, limit_addr_mb, -+ MEM_WIN0_BASE_LIMIT_LIMIT_MASK); -+ writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ -+ /* Write the cpu & limit addr upper bits */ -+ high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT; -+ phys_addr_mb_high = phys_addr_mb >> high_addr_shift; -+ tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win)); -+ u32p_replace_bits(&tmp, phys_addr_mb_high, -+ MEM_WIN0_BASE_HI_BASE_MASK); -+ writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win)); -+ -+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift; -+ tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+ u32p_replace_bits(&tmp, limit_addr_mb_high, -+ PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK); -+ writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+} -+ -+static int brcm_pcie_probe(struct udevice *dev) -+{ -+ struct udevice *ctlr = pci_get_controller(dev); -+ struct pci_controller *hose = dev_get_uclass_priv(ctlr); -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ void __iomem *base = pcie->base; -+ bool ssc_good = false; -+ int num_out_wins = 0; -+ u64 rc_bar2_offset, rc_bar2_size; -+ unsigned int scb_size_val; -+ int i, ret; -+ u16 nlw, cls, lnksta; -+ u32 tmp; -+ -+ /* -+ * Reset the bridge, assert the fundamental reset. Note for some SoCs, -+ * e.g. BCM7278, the fundamental reset should not be asserted here. -+ * This will need to be changed when support for other SoCs is added. -+ */ -+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, -+ RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK); -+ /* -+ * The delay is a safety precaution to preclude the reset signal -+ * from looking like a glitch. -+ */ -+ udelay(100); -+ -+ /* Take the bridge out of reset */ -+ clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); -+ -+ clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); -+ -+ /* Wait for SerDes to be stable */ -+ udelay(100); -+ -+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ -+ clrsetbits_le32(base + PCIE_MISC_MISC_CTRL, -+ MISC_CTRL_MAX_BURST_SIZE_MASK, -+ MISC_CTRL_SCB_ACCESS_EN_MASK | -+ MISC_CTRL_CFG_READ_UR_MODE_MASK | -+ MISC_CTRL_MAX_BURST_SIZE_128); -+ /* -+ * TODO: When support for other SoCs than BCM2711 is added we may -+ * need to use the base address and size(s) provided in the dma-ranges -+ * property. -+ */ -+ rc_bar2_offset = 0; -+ rc_bar2_size = 0xc0000000; -+ -+ tmp = lower_32_bits(rc_bar2_offset); -+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), -+ RC_BAR2_CONFIG_LO_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); -+ writel(upper_32_bits(rc_bar2_offset), -+ base + PCIE_MISC_RC_BAR2_CONFIG_HI); -+ -+ scb_size_val = rc_bar2_size ? -+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */ -+ -+ tmp = readl(base + PCIE_MISC_MISC_CTRL); -+ u32p_replace_bits(&tmp, scb_size_val, -+ MISC_CTRL_SCB0_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ /* Disable the PCIe->GISB memory window (RC_BAR1) */ -+ clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO, -+ RC_BAR1_CONFIG_LO_SIZE_MASK); -+ -+ /* Disable the PCIe->SCB memory window (RC_BAR3) */ -+ clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO, -+ RC_BAR3_CONFIG_LO_SIZE_MASK); -+ -+ /* Mask all interrupts since we are not handling any yet */ -+ writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET); -+ -+ /* Clear any interrupts we find on boot */ -+ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR); -+ -+ if (pcie->gen) -+ brcm_pcie_set_gen(pcie, pcie->gen); -+ -+ /* Unassert the fundamental reset */ -+ clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1, -+ RGR1_SW_INIT_1_PERST_MASK); -+ -+ /* Give the RC/EP time to wake up, before trying to configure RC. -+ * Intermittently check status for link-up, up to a total of 100ms. -+ */ -+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5) -+ mdelay(5); -+ -+ if (!brcm_pcie_link_up(pcie)) { -+ printf("PCIe BRCM: link down\n"); -+ return -EINVAL; -+ } -+ -+ if (!brcm_pcie_rc_mode(pcie)) { -+ printf("PCIe misconfigured; is in EP mode\n"); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < hose->region_count; i++) { -+ struct pci_region *reg = &hose->regions[i]; -+ -+ if (reg->flags != PCI_REGION_MEM) -+ continue; -+ -+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) -+ return -EINVAL; -+ -+ brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start, -+ reg->bus_start, reg->size); -+ -+ num_out_wins++; -+ } -+ -+ /* -+ * For config space accesses on the RC, show the right class for -+ * a PCIe-PCIe bridge (the default setting is to be EP mode). -+ */ -+ clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3, -+ CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400); -+ -+ if (pcie->ssc) { -+ ret = brcm_pcie_set_ssc(pcie->base); -+ if (!ret) -+ ssc_good = true; -+ else -+ printf("PCIe BRCM: failed attempt to enter SSC mode\n"); -+ } -+ -+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); -+ cls = lnksta & PCI_EXP_LNKSTA_CLS; -+ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; -+ -+ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls), -+ nlw, ssc_good ? "(SSC)" : "(!SSC)"); -+ -+ /* PCIe->SCB endian mode for BAR */ -+ clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1, -+ VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK, -+ VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN); -+ /* -+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 -+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. -+ */ -+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK); -+ -+ return 0; -+} -+ -+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) -+{ -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ ofnode dn = dev_ofnode(dev); -+ u32 max_link_speed; -+ int ret; -+ -+ /* Get the controller base address */ -+ pcie->base = dev_read_addr_ptr(dev); -+ if (!pcie->base) -+ return -EINVAL; -+ -+ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); -+ -+ ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed); -+ if (ret < 0 || max_link_speed > 4) -+ pcie->gen = 0; -+ else -+ pcie->gen = max_link_speed; -+ -+ return 0; -+} -+ -+static const struct dm_pci_ops brcm_pcie_ops = { -+ .read_config = brcm_pcie_read_config, -+ .write_config = brcm_pcie_write_config, -+}; -+ -+static const struct udevice_id brcm_pcie_ids[] = { -+ { .compatible = "brcm,bcm2711-pcie" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(pcie_brcm_base) = { -+ .name = "pcie_brcm", -+ .id = UCLASS_PCI, -+ .ops = &brcm_pcie_ops, -+ .of_match = brcm_pcie_ids, -+ .probe = brcm_pcie_probe, -+ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, -+ .priv_auto_alloc_size = sizeof(struct brcm_pcie), -+}; -diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c -index aa1903e547..9f102c64c6 100644 ---- a/drivers/pci/pcie_intel_fpga.c -+++ b/drivers/pci/pcie_intel_fpga.c -@@ -67,9 +67,6 @@ - #define IS_ROOT_PORT(pcie, bdf) \ - ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) - --#define PCI_EXP_LNKSTA 18 /* Link Status */ --#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -- - /** - * struct intel_fpga_pcie - Intel FPGA PCIe controller state - * @bus: Pointer to the PCI bus -diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index 2d968aafb0..f446520528 100644 ---- a/drivers/usb/host/xhci-mem.c -+++ b/drivers/usb/host/xhci-mem.c -@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - scratchpad->sp_array[i] = cpu_to_le64(ptr); - } - -+ xhci_flush_cache((uintptr_t)scratchpad->sp_array, -+ sizeof(u64) * num_sp); -+ - return 0; - - fail_sp3: -diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h -index 8b9d6fff00..7ad8b088ed 100644 ---- a/include/linux/bitfield.h -+++ b/include/linux/bitfield.h -@@ -103,4 +103,56 @@ - (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ - }) - -+extern void __compiletime_error("value doesn't fit into mask") -+__field_overflow(void); -+extern void __compiletime_error("bad bitfield mask") -+__bad_mask(void); -+ -+static __always_inline u64 field_multiplier(u64 field) -+{ -+ if ((field | (field - 1)) & ((field | (field - 1)) + 1)) -+ __bad_mask(); -+ return field & -field; -+} -+ -+static __always_inline u64 field_mask(u64 field) -+{ -+ return field / field_multiplier(field); -+} -+ -+#define ____MAKE_OP(type, base, to, from) \ -+static __always_inline __##type type##_encode_bits(base v, base field) \ -+{ \ -+ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ -+ __field_overflow(); \ -+ return to((v & field_mask(field)) * field_multiplier(field)); \ -+} \ -+static __always_inline __##type type##_replace_bits(__##type old, \ -+ base val, base field) \ -+{ \ -+ return (old & ~to(field)) | type##_encode_bits(val, field); \ -+} \ -+static __always_inline void type##p_replace_bits(__##type * p, \ -+ base val, base field) \ -+{ \ -+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ -+} \ -+static __always_inline base type##_get_bits(__##type v, base field) \ -+{ \ -+ return (from(v) & field) / field_multiplier(field); \ -+} -+ -+#define __MAKE_OP(size) \ -+ ____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \ -+ ____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \ -+ ____MAKE_OP(u##size, u##size, ,) -+ -+____MAKE_OP(u8, u8, ,) -+__MAKE_OP(16) -+__MAKE_OP(32) -+__MAKE_OP(64) -+ -+#undef __MAKE_OP -+#undef ____MAKE_OP -+ - #endif -diff --git a/include/pci.h b/include/pci.h -index 19c9244b94..281f353916 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -471,10 +471,28 @@ - #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ - - /* PCI Express capabilities */ -+#define PCI_EXP_FLAGS 2 /* Capabilities register */ -+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ -+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ - #define PCI_EXP_DEVCAP 4 /* Device capabilities */ --#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ -+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ - #define PCI_EXP_DEVCTL 8 /* Device Control */ --#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ -+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ -+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ -+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ -+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ -+#define PCI_EXP_LNKSTA 18 /* Link Status */ -+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ -+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ -+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ -+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ -+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ -+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ -+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ -+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ -+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ -+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ - - /* Include the ID list */ - -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index 20e4a21066..1170c0ac69 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val) - */ - static inline u64 xhci_readq(__le64 volatile *regs) - { --#if BITS_PER_LONG == 64 -- return readq(regs); --#else - __u32 *ptr = (__u32 *)regs; - u64 val_lo = readl(ptr); - u64 val_hi = readl(ptr + 1); - return val_lo + (val_hi << 32); --#endif - } - - static inline void xhci_writeq(__le64 volatile *regs, const u64 val) - { --#if BITS_PER_LONG == 64 -- writeq(val, regs); --#else - __u32 *ptr = (__u32 *)regs; - u32 val_lo = lower_32_bits(val); - /* FIXME */ - u32 val_hi = upper_32_bits(val); - writel(val_lo, ptr); - writel(val_hi, ptr + 1); --#endif - } - - int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, --- -2.26.2 - diff --git a/rockchip-Pinebook-Pro-Fixes.patch b/rockchip-Pinebook-Pro-Fixes.patch deleted file mode 100644 index 0b0a2d7..0000000 --- a/rockchip-Pinebook-Pro-Fixes.patch +++ /dev/null @@ -1,200 +0,0 @@ -From e27621a7c2c0e090977c17f604093c720ca01fe4 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 8 Jun 2020 20:31:33 +0100 -Subject: [PATCH 1/3] rockchip: Pinebook Pro: enable rng to provide an entropy - source - -Enable the rng so UEFI can provide entropy for KASLR - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++ - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ - configs/pinebook-pro-rk3399_defconfig | 2 ++ - 3 files changed, 10 insertions(+) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index 1a2e24d3ef..296321d697 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -24,6 +24,10 @@ - u-boot,dm-pre-reloc; - }; - -+&rng { -+ status = "okay"; -+}; -+ - &sdhci { - max-frequency = <25000000>; - u-boot,dm-pre-reloc; -diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index bac09df4a3..cb8991aa25 100644 ---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -19,6 +19,10 @@ - }; - }; - -+&rng { -+ status = "okay"; -+}; -+ - &spi1 { - spi_flash: flash@0 { - u-boot,dm-pre-reloc; -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 0c129b9aeb..21eecf477c 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -54,6 +54,8 @@ CONFIG_DM_PMIC_FAN53555=y - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_PWM_ROCKCHIP=y - CONFIG_RAM_RK3399_LPDDR4=y - CONFIG_DM_RESET=y --- -2.26.2 - -From 99a3c9ba5a8ab7a94aa700649e031f53d498e857 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 8 Jun 2020 22:23:05 +0100 -Subject: [PATCH 2/3] rockchip: Pinebook Pro: Fix USB and the USB attached - keyboard - -The built in keyboard on the Pinebook Pro is attached via USB so -fix this up to ensure USB works as expected. - -Signed-off-by: Peter Robinson ---- - configs/pinebook-pro-rk3399_defconfig | 5 +++++ - include/configs/pinebook-pro-rk3399.h | 3 +++ - 2 files changed, 8 insertions(+) - -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 21eecf477c..733463556a 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -61,6 +61,8 @@ CONFIG_RAM_RK3399_LPDDR4=y - CONFIG_DM_RESET=y - CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="usb start" - CONFIG_ROCKCHIP_SPI=y - CONFIG_SYSRESET=y - CONFIG_USB=y -@@ -68,8 +70,11 @@ CONFIG_USB_XHCI_HCD=y - CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC3=y - CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_DM_KEYBOARD=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y -diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h -index 4bc8802d11..d910830582 100644 ---- a/include/configs/pinebook-pro-rk3399.h -+++ b/include/configs/pinebook-pro-rk3399.h -@@ -25,4 +25,7 @@ - - #define SDRAM_BANK_SIZE (2UL << 30) - -+#define CONFIG_USB_OHCI_NEW -+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -+ - #endif --- -2.26.2 - -From 64d43a4f0a135486a9a524b107c853831e492eb6 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 8 Jun 2020 23:41:50 +0100 -Subject: [PATCH 3/3] rockchip: Pinebook Pro: Fix SPI flash and store env on it - -Some minor fixes for SPI flash on the Pinebook Pro and also -default to saving environment to the SPI flash as it's -guaranteed to be on board. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 6 +++++- - configs/pinebook-pro-rk3399_defconfig | 3 +++ - include/configs/pinebook-pro-rk3399.h | 9 --------- - 3 files changed, 8 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index 296321d697..ded7db0aef 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -12,7 +12,11 @@ - }; - - chosen { -- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; -+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; -+ }; -+ -+ config { -+ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ - }; - }; - -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 733463556a..18b2d74253 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -1,6 +1,7 @@ - CONFIG_ARM=y - CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_ENV_SIZE=0x8000 - CONFIG_ROCKCHIP_RK3399=y - CONFIG_TARGET_PINEBOOK_PRO_RK3399=y - CONFIG_NR_DRAM_BANKS=1 -@@ -17,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 - CONFIG_SPL_MTD_SUPPORT=y -+CONFIG_SPL_SPI_LOAD=y - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPIO=y -@@ -32,6 +34,7 @@ CONFIG_CMD_REGULATOR=y - CONFIG_SPL_OF_CONTROL=y - CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" - CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_ENV_IS_IN_SPI_FLASH=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y -diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h -index d910830582..d478b19917 100644 ---- a/include/configs/pinebook-pro-rk3399.h -+++ b/include/configs/pinebook-pro-rk3399.h -@@ -14,15 +14,6 @@ - - #include - --#if defined(CONFIG_ENV_IS_IN_MMC) --#define CONFIG_SYS_MMC_ENV_DEV 0 --#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) --#define CONFIG_ENV_SECT_SIZE (8 * 1024) --#endif -- --#undef CONFIG_SYS_SPI_U_BOOT_OFFS --#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512 -- - #define SDRAM_BANK_SIZE (2UL << 30) - - #define CONFIG_USB_OHCI_NEW --- -2.26.2 - diff --git a/sources b/sources index 7678d2e..dcf9aad 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.07.tar.bz2) = df91264fe8a42e676c3f2aa09d644c6a3035cc8169bf52a8ab95efe7e542cfc758a0ef150949b0d9f03c7dec7d95f8d20a2efe2dbb60c2ef1a61c8063770478d +SHA512 (u-boot-2020.10-rc1.tar.bz2) = 8a8841280249e35de95fb2438733adafcfd7bb8a9bb15daaff8406b616fcfa63b90c40a0b54a529c66ad16ee06b2ab309fda3dd452ce2482846ebed1d08851d0 diff --git a/uboot-tools.spec b/uboot-tools.spec index 7f5fdd1..c9cb437 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,8 @@ -#global candidate rc5 -%global _default_patch_fuzz 2 +%global candidate rc1 Name: uboot-tools -Version: 2020.07 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2020.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,8 +21,8 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -Patch4: usb-kbd-fixes.patch -Patch5: dragonboard-fixes.patch +Patch3: usb-kbd-fixes.patch +Patch4: dragonboard-fixes.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -32,11 +31,8 @@ Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch Patch12: AllWinner-Pine64-bits.patch # Rockchips improvements Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch14: rockchip-Pinebook-Pro-Fixes.patch -# RPi4 -Patch16: USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch -Patch17: usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch -Patch18: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +# RPi +Patch14: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch BuildRequires: bc BuildRequires: dtc @@ -250,6 +246,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jul 28 2020 Peter Robinson - 2020.10-0.1.rc1 +- 2020.10 RC1 + * Tue Jul 14 2020 Tom Stellard - 2020.07-2 - Use make macros - https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro diff --git a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch deleted file mode 100644 index e167bb6..0000000 --- a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch +++ /dev/null @@ -1,707 +0,0 @@ -From patchwork Mon Jun 22 15:30:48 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1314562 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49rD0h00Mbz9s6w - for ; Tue, 23 Jun 2020 01:31:47 +1000 (AEST) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 1284581DC9; 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- Mon, 22 Jun 2020 15:31:22 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 1/4] arm: rpi: Add function to trigger VL805's firmware load -Date: Mon, 22 Jun 2020 17:30:48 +0200 -Message-Id: <20200622153050.23193-2-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.27.0 -In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> -References: <20200622153050.23193-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware -may either be loaded directly from an EEPROM or, if not present, by the -SoC's VideCore (the SoC's co-processor). Introduce the function that -informs VideCore that VL805 may need its firmware loaded. - -Signed-off-by: Nicolas Saenz Julienne ---- -Changes since v1: - - Rename function so it's not mistaken with regular firmware loading - - arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ - arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ - arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++ - 3 files changed, 66 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 60e226ce1d..2ae2d3d97c 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette { - } body; - }; - -+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058 -+ -+struct bcm2835_mbox_tag_pci_dev_addr { -+ struct bcm2835_mbox_tag_hdr tag_hdr; -+ union { -+ struct { -+ u32 dev_addr; -+ } req; -+ struct { -+ } resp; -+ } body; -+}; -+ - /* - * Pass a raw u32 message to the VC, and receive a raw u32 back. - * -diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h -index 4afb08631b..e45c1bf010 100644 ---- a/arch/arm/mach-bcm283x/include/mach/msg.h -+++ b/arch/arm/mach-bcm283x/include/mach/msg.h -@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, - int pixel_order, int alpha_mode, ulong *fb_basep, - ulong *fb_sizep, int *pitchp); - -+/** -+ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded -+ * -+ * @return 0 if OK, -EIO on error -+ */ -+int bcm2711_notify_vl805_reset(void); -+ - #endif -diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c -index 94b75283f8..347aece3cd 100644 ---- a/arch/arm/mach-bcm283x/msg.c -+++ b/arch/arm/mach-bcm283x/msg.c -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - - struct msg_set_power_state { - struct bcm2835_mbox_hdr hdr; -@@ -40,6 +41,12 @@ struct msg_setup { - u32 end_tag; - }; - -+struct msg_notify_vl805_reset { -+ struct bcm2835_mbox_hdr hdr; -+ struct bcm2835_mbox_tag_pci_dev_addr dev_addr; -+ u32 end_tag; -+}; -+ - int bcm2835_power_on_module(u32 module) - { - ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1); -@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, - - return 0; - } -+ -+/* -+ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware -+ * may either be loaded directly from an EEPROM or, if not present, by the -+ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware -+ * loaded. -+ */ -+int bcm2711_notify_vl805_reset(void) -+{ -+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset, -+ msg_notify_vl805_reset, 1); -+ int ret; -+ -+ BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset); -+ BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr, -+ NOTIFY_XHCI_RESET); -+ -+ /* -+ * The pci device address is expected like this: -+ * -+ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12 -+ * -+ * But since RPi4's PCIe setup is hardwired, we know the address in -+ * advance. -+ */ -+ msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000; -+ -+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, -+ &msg_notify_vl805_reset->hdr); -+ if (ret) { -+ printf("bcm2711: Faild to load vl805's firmware, %d\n", ret); -+ return -EIO; -+ } -+ -+ udelay(200); -+ -+ return 0; -+} -+ - -From patchwork Mon Jun 22 15:30:49 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1314565 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49rD1F72RYz9s6w - for ; Tue, 23 Jun 2020 01:32:17 +1000 (AEST) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 10E5481E20; - Mon, 22 Jun 2020 17:31:41 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 9851E81DE9; Mon, 22 Jun 2020 17:31:30 +0200 (CEST) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id A2A2281D52 - for ; Mon, 22 Jun 2020 17:31:23 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id CFE01C204; - Mon, 22 Jun 2020 15:31:22 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 2/4] reset: Add Raspberry Pi 4 firmware reset controller -Date: Mon, 22 Jun 2020 17:30:49 +0200 -Message-Id: <20200622153050.23193-3-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.27.0 -In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> -References: <20200622153050.23193-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Raspberry Pi 4's co-processor controls some of the board's HW -initialization process, but it's up to Linux to trigger it when -relevant. Introduce a reset controller capable of interfacing with -RPi4's co-processor that models these firmware initialization routines as -reset lines. - -Signed-off-by: Nicolas Saenz Julienne ---- - drivers/reset/Kconfig | 10 ++++ - drivers/reset/Makefile | 1 + - drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++ - .../reset/raspberrypi,firmware-reset.h | 13 ++++ - 4 files changed, 84 insertions(+) - create mode 100644 drivers/reset/reset-raspberrypi.c - create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h - -diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig -index 88d3be1593..d02c1522e5 100644 ---- a/drivers/reset/Kconfig -+++ b/drivers/reset/Kconfig -@@ -148,4 +148,14 @@ config RESET_IMX7 - help - Support for reset controller on i.MX7/8 SoCs. - -+config RESET_RASPBERRYPI -+ bool "Raspberry Pi 4 Firmware Reset Controller Driver" -+ depends on DM_RESET && ARCH_BCM283X -+ default USB_XHCI_PCI -+ help -+ Raspberry Pi 4's co-processor controls some of the board's HW -+ initialization process, but it's up to Linux to trigger it when -+ relevant. This driver provides a reset controller capable of -+ interfacing with RPi4's co-processor and model these firmware -+ initialization routines as reset lines. - endmenu -diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile -index 0a044d5d8c..be54dae725 100644 ---- a/drivers/reset/Makefile -+++ b/drivers/reset/Makefile -@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o - obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o - obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o - obj-$(CONFIG_RESET_IMX7) += reset-imx7.o -+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o -diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c -new file mode 100644 -index 0000000000..e2d284e5ac ---- /dev/null -+++ b/drivers/reset/reset-raspberrypi.c -@@ -0,0 +1,60 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Raspberry Pi 4 firmware reset driver -+ * -+ * Copyright (C) 2020 Nicolas Saenz Julienne -+ */ -+#include -+#include -+#include -+#include -+#include -+ -+static int raspberrypi_reset_request(struct reset_ctl *reset_ctl) -+{ -+ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int raspberrypi_reset_free(struct reset_ctl *reset_ctl) -+{ -+ return 0; -+} -+ -+static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl) -+{ -+ switch (reset_ctl->id) { -+ case RASPBERRYPI_FIRMWARE_RESET_ID_USB: -+ bcm2711_notify_vl805_reset(); -+ return 0; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl) -+{ -+ return 0; -+} -+ -+struct reset_ops raspberrypi_reset_ops = { -+ .request = raspberrypi_reset_request, -+ .rfree = raspberrypi_reset_free, -+ .rst_assert = raspberrypi_reset_assert, -+ .rst_deassert = raspberrypi_reset_deassert, -+}; -+ -+static const struct udevice_id raspberrypi_reset_ids[] = { -+ { .compatible = "raspberrypi,firmware-reset" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(raspberrypi_reset) = { -+ .name = "raspberrypi-reset", -+ .id = UCLASS_RESET, -+ .of_match = raspberrypi_reset_ids, -+ .ops = &raspberrypi_reset_ops, -+}; -+ -diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h -new file mode 100644 -index 0000000000..1a4f4c7927 ---- /dev/null -+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2020 Nicolas Saenz Julienne -+ * Author: Nicolas Saenz Julienne -+ */ -+ -+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H -+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H -+ -+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0 -+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1 -+ -+#endif - -From patchwork Mon Jun 22 15:30:50 2020 -Content-Type: text/plain; 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- Mon, 22 Jun 2020 15:31:23 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 3/4] configs: Enable support for reset controllers on RPi4 -Date: Mon, 22 Jun 2020 17:30:50 +0200 -Message-Id: <20200622153050.23193-4-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.27.0 -In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> -References: <20200622153050.23193-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -This is required in order to access the reset controller used to -initialize the board's xHCI chip. - -Signed-off-by: Nicolas Saenz Julienne ---- - configs/rpi_4_32b_defconfig | 1 + - configs/rpi_4_defconfig | 1 + - configs/rpi_arm64_defconfig | 1 + - 3 files changed, 3 insertions(+) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index b0797373b5..00c8d963ab 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y - CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set -+CONFIG_DM_RESET=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 932b768164..c73eccb61c 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y - CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set -+CONFIG_DM_RESET=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 855afcf1cf..800b51e6f5 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y - CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set -+CONFIG_DM_RESET=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y - -From patchwork Mon Jun 22 15:30:51 2020 -Content-Type: text/plain; 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- Mon, 22 Jun 2020 15:31:23 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 4/4] usb: xhci: Add reset controller support -Date: Mon, 22 Jun 2020 17:30:51 +0200 -Message-Id: <20200622153050.23193-5-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.27.0 -In-Reply-To: <20200622153050.23193-1-nsaenzjulienne@suse.de> -References: <20200622153050.23193-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.30rc1 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de -X-Virus-Status: Clean - -Some atypical users of xhci might need to manually reset their xHCI -controller before starting the HCD setup. Check if a reset controller -device is available to the PCI bus and trigger a reset. - -Signed-off-by: Nicolas Saenz Julienne ---- - -Changes since v3: - - Move reset support to xchi core - - drivers/usb/host/xhci-mem.c | 2 ++ - drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++ - include/usb/xhci.h | 2 ++ - 3 files changed, 37 insertions(+) - -diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index f446520528..108f4bd8cf 100644 ---- a/drivers/usb/host/xhci-mem.c -+++ b/drivers/usb/host/xhci-mem.c -@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl) - xhci_free_virt_devices(ctrl); - free(ctrl->erst.entries); - free(ctrl->dcbaa); -+ if (reset_valid(&ctrl->reset)) -+ reset_free(&ctrl->reset); - memset(ctrl, '\0', sizeof(struct xhci_ctrl)); - } - -diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c -index ebd2954571..03b41cc855 100644 ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor) - return ret; - } - -+/** -+ * Resets XHCI Hardware -+ * -+ * @param ctrl pointer to host controller -+ * @return 0 if OK, or a negative error code. -+ */ -+static int xhci_reset_hw(struct xhci_ctrl *ctrl) -+{ -+ int ret; -+ -+ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset); -+ if (ret && ret != -ENOENT) { -+ dev_err(ctrl->dev, "failed to get reset\n"); -+ return ret; -+ } -+ -+ if (reset_valid(&ctrl->reset)) { -+ ret = reset_assert(&ctrl->reset); -+ if (ret) -+ return ret; -+ -+ ret = reset_deassert(&ctrl->reset); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ - /** - * Resets the XHCI Controller - * -@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr, - - ctrl->dev = dev; - -+ ret = xhci_reset_hw(ctrl); -+ if (ret) -+ goto err; -+ - /* - * XHCI needs to issue a Address device command to setup - * proper device context structures, before it can interact -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index 1170c0ac69..7d34103fd5 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -16,6 +16,7 @@ - #ifndef HOST_XHCI_H_ - #define HOST_XHCI_H_ - -+#include - #include - #include - #include -@@ -1209,6 +1210,7 @@ struct xhci_ctrl { - #if CONFIG_IS_ENABLED(DM_USB) - struct udevice *dev; - #endif -+ struct reset_ctl reset; - struct xhci_hccr *hccr; /* R/O registers, not need for volatile */ - struct xhci_hcor *hcor; - struct xhci_doorbell_array *dba; From 4a13ab93a826af7579f1756f7e5eaceb0aeda4f3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 10 Aug 2020 22:23:45 +0100 Subject: [PATCH 094/351] 2020.10 RC2 --- ...-the-DT-provided-by-the-Raspberry-Pi.patch | 50 ++++++++++++------- sources | 2 +- uboot-tools.spec | 7 ++- 3 files changed, 38 insertions(+), 21 deletions(-) diff --git a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch index 0e30129..c156e4d 100644 --- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +++ b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -1,19 +1,20 @@ -From 7389a936fbd5ccaae7c39d38d1440e0359f9d0e5 Mon Sep 17 00:00:00 2001 +From f10f94831450671a77f61fe413b4a57459963860 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 12 May 2020 08:14:26 +0100 +Date: Mon, 10 Aug 2020 22:20:29 +0100 Subject: [PATCH] rpi: Use firmware provided device tree Signed-off-by: Peter Robinson --- - configs/rpi_0_w_defconfig | 2 +- - configs/rpi_2_defconfig | 2 +- - configs/rpi_3_32b_defconfig | 2 +- - configs/rpi_3_defconfig | 2 +- - configs/rpi_defconfig | 2 +- - 5 files changed, 5 insertions(+), 5 deletions(-) + configs/rpi_0_w_defconfig | 2 +- + configs/rpi_2_defconfig | 2 +- + configs/rpi_3_32b_defconfig | 2 +- + configs/rpi_3_b_plus_defconfig | 2 +- + configs/rpi_3_defconfig | 2 +- + configs/rpi_defconfig | 2 +- + 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index 5053a38822..3c6af2b367 100644 +index bba5e12b12..0241f4c6d3 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y @@ -22,11 +23,11 @@ index 5053a38822..3c6af2b367 100644 CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y - CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index 0000a759f1..f27c5ab1f6 100644 +index 1c2bbb29ce..9573e475f4 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y @@ -35,11 +36,11 @@ index 0000a759f1..f27c5ab1f6 100644 CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y - CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index a714f9ec49..90ce6ea22e 100644 +index b8a3d17f43..252df994e6 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y @@ -48,11 +49,24 @@ index a714f9ec49..90ce6ea22e 100644 CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y - CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig +index 4c361438fa..3b2996a2f9 100644 +--- a/configs/rpi_3_b_plus_defconfig ++++ b/configs/rpi_3_b_plus_defconfig +@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index 244d9b3a78..f72d6d35e2 100644 +index 9b281a4f15..1e9ee6122e 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y @@ -61,11 +75,11 @@ index 244d9b3a78..f72d6d35e2 100644 CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y - CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index 64bb184c2b..645dbbec33 100644 +index b5ad53c37b..223fc03275 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y @@ -74,9 +88,9 @@ index 64bb184c2b..645dbbec33 100644 CONFIG_CMD_FS_UUID=y -CONFIG_OF_EMBED=y +CONFIG_OF_BOARD=y - CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -- 2.26.2 diff --git a/sources b/sources index dcf9aad..a197564 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.10-rc1.tar.bz2) = 8a8841280249e35de95fb2438733adafcfd7bb8a9bb15daaff8406b616fcfa63b90c40a0b54a529c66ad16ee06b2ab309fda3dd452ce2482846ebed1d08851d0 +SHA512 (u-boot-2020.10-rc2.tar.bz2) = 9364a555e34830359c5cfffa87cc3d192ff15b23bf8bda054778e02ab4b37ede09a1a37757eb2121787de924fc563880dd4417bf53cd80d3649acb55d05994e8 diff --git a/uboot-tools.spec b/uboot-tools.spec index c9cb437..435047b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2020.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -246,6 +246,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Aug 10 2020 Peter Robinson - 2020.10-0.2.rc2 +- Update to 2020.10 RC2 + * Tue Jul 28 2020 Peter Robinson - 2020.10-0.1.rc1 - 2020.10 RC1 From 609e2fbd0174f3e661d483ca481c8082dda68af1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 19 Aug 2020 15:55:37 +0100 Subject: [PATCH 095/351] Minor patch updates and cleanups --- ...nable-rng-on-rock960-and-firefly3399.patch | 145 ++++++++++-------- uboot-tools.spec | 3 +- 2 files changed, 82 insertions(+), 66 deletions(-) diff --git a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch index 8f28d1c..89e38f5 100644 --- a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +++ b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch @@ -1,17 +1,87 @@ -From 88725c4d036bab25c900cc3c962fc42d94e0ab69 Mon Sep 17 00:00:00 2001 +From c206a750c80dc4aaa8e7eade50199b3198a3e288 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 10 Jun 2020 13:26:43 +0100 -Subject: [PATCH] arm: rk3399: enable rng on rock960 and firefly3399 +Date: Wed, 19 Aug 2020 15:49:25 +0100 +Subject: [PATCH 1/3] rockchip: RockPro64: enable rng to provide an entropy + source + +Enable the rng so UEFI can provide entropy for KASLR Signed-off-by: Peter Robinson --- - arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ - arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++ - configs/firefly-rk3399_defconfig | 2 ++ - configs/rock960-rk3399_defconfig | 2 ++ - configs/rockpro64-rk3399_defconfig | 2 ++ - 6 files changed, 18 insertions(+) + configs/rockpro64-rk3399_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index a6e2c3d71d..9b1ba04b9e 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -41,6 +41,8 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +-- +2.26.2 + +From 91db3a7baa4cfc8f1f8879b4bdafeb05902f2114 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 19 Aug 2020 15:52:15 +0100 +Subject: [PATCH 2/3] rockchip: Rock960: enable rng to provide an entropy + source + +Enable the rng so UEFI can provide entropy for KASLR + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ + configs/rock960-rk3399_defconfig | 2 ++ + 2 files changed, 6 insertions(+) + +diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +index c190089e26..08292dbd39 100644 +--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi +@@ -24,3 +24,7 @@ + }; + + }; ++ ++&rng { ++ status = "okay"; ++}; +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 1d997847c2..9c4d8871b7 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -38,6 +38,8 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_NVME=y + CONFIG_PCI=y +-- +2.26.2 + +From ac0793c7c4ee032da11bddbd0bdefee2322bb621 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 19 Aug 2020 15:53:58 +0100 +Subject: [PATCH 3/3] rockchip: firefly-rk3399: enable rng to provide an + entropy source + +Enable the rng so UEFI can provide entropy for KASLR + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ + configs/firefly-rk3399_defconfig | 2 ++ + 2 files changed, 6 insertions(+) diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi index 38e0897db9..a6c7b913da 100644 @@ -25,35 +95,8 @@ index 38e0897db9..a6c7b913da 100644 +&rng { + status = "okay"; +}; -diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -index c190089e26..08292dbd39 100644 ---- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -@@ -24,3 +24,7 @@ - }; - - }; -+ -+&rng { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index bac09df4a3..38fe3bb0ec 100644 ---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -25,6 +25,10 @@ - }; - }; - -+&rng { -+ status = "okay"; -+}; -+ - &vdd_center { - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index 5bb54f5835..551687d6d0 100644 +index ea4a30ebf3..e242ee5009 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -35,6 +35,8 @@ CONFIG_MMC_DW=y @@ -65,32 +108,6 @@ index 5bb54f5835..551687d6d0 100644 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 59a85c78a1..f31cb92884 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -37,6 +37,8 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_NVME=y - CONFIG_PCI=y -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index 807747485a..f778f0b640 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -40,6 +40,8 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -- 2.26.2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 435047b..d4fdb0a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -21,8 +21,7 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -Patch3: usb-kbd-fixes.patch -Patch4: dragonboard-fixes.patch +# Patch4: dragonboard-fixes.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch From ac3269a2ff746f239fcdeaf7e989bd1b53038b96 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 25 Aug 2020 14:53:52 +0100 Subject: [PATCH 096/351] Enable a number of new Rockchip devices --- aarch64-boards | 6 ++++++ arm-boards | 1 + uboot-tools.spec | 50 +++++++++++++++++++++++++----------------------- 3 files changed, 33 insertions(+), 24 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index cc0d265..e5d4147 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -29,6 +29,7 @@ nanopc-t4-rk3399 nanopi_a64 nanopi-k2 nanopi-m4-rk3399 +nanopi-m4-2gb-rk3399 nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 @@ -57,8 +58,13 @@ puma-rk3399 rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 +rock-pi-4c-rk3399 +rock-pi-e-rk3328 +rock-pi-n10-rk3399pro rockpro64-rk3399 +roc-cc-rk3328 roc-pc-rk3399 +roc-pc-mezzanine-rk3399 rpi_3 rpi_4 rpi_arm64 diff --git a/arm-boards b/arm-boards index 5a82a80..46524ad 100644 --- a/arm-boards +++ b/arm-boards @@ -112,6 +112,7 @@ qemu_arm r7-tv-dongle riotboard rock +rock-pi-n8-rk3288 rock2 rpi_2 rpi_3_32b diff --git a/uboot-tools.spec b/uboot-tools.spec index d4fdb0a..493acfd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,37 +1,36 @@ %global candidate rc2 -Name: uboot-tools -Version: 2020.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} -Summary: U-Boot utilities -License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ -URL: http://www.denx.de/wiki/U-Boot +Name: uboot-tools +Version: 2020.10 +Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Summary: U-Boot utilities +License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ +URL: http://www.denx.de/wiki/U-Boot -Source0: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 -Source1: arm-boards -Source2: arm-chromebooks -Source3: aarch64-boards -Source4: aarch64-chromebooks -Source5: 10-devicetree.install +Source0: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 +Source1: arm-boards +Source2: arm-chromebooks +Source3: aarch64-boards +Source4: aarch64-chromebooks +Source5: 10-devicetree.install # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition -Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Needed due to issues with shim -Patch2: uefi-use-Fedora-specific-path-name.patch +Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement -# Patch4: dragonboard-fixes.patch - +# RPi - uses RPI firmware device tree for HAT support +Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Tegra improvements -Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch -Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch +Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch +Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # AllWinner improvements -Patch12: AllWinner-Pine64-bits.patch +Patch8: AllWinner-Pine64-bits.patch # Rockchips improvements -Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -# RPi -Patch14: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch9: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch10: rockchip-Rock960-Fix-up-USB-support.patch BuildRequires: bc BuildRequires: dtc @@ -121,12 +120,12 @@ do echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3328=(evb-rk3328 rock64-rk3328) + rk3328=(evb-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-v-rk3399 khadas-edge-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -245,6 +244,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Aug 19 2020 Peter Robinson - 2020.10-0.3.rc2 +- Enable a number of new Rockchip devices + * Mon Aug 10 2020 Peter Robinson - 2020.10-0.2.rc2 - Update to 2020.10 RC2 From 6d250131e666d26087540ee065707cd1c8fbd21a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 25 Aug 2020 14:55:15 +0100 Subject: [PATCH 097/351] add missing patch --- rockchip-Rock960-Fix-up-USB-support.patch | 69 +++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 rockchip-Rock960-Fix-up-USB-support.patch diff --git a/rockchip-Rock960-Fix-up-USB-support.patch b/rockchip-Rock960-Fix-up-USB-support.patch new file mode 100644 index 0000000..bb534a0 --- /dev/null +++ b/rockchip-Rock960-Fix-up-USB-support.patch @@ -0,0 +1,69 @@ +From 74ac6aad46c7d05e925b767fdb9a1306af6d5168 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 19 Aug 2020 16:55:11 +0100 +Subject: [PATCH] rockchip: Rock960: Fix up USB support + +Fix up USB config options so keyboards and other USB devices work. + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 9 ++++++++- + include/configs/rock960_rk3399.h | 2 ++ + 2 files changed, 10 insertions(+), 1 deletion(-) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 9c4d8871b7..d6d787aa02 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -33,6 +33,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=1 + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEYBOARD=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y +@@ -43,6 +44,8 @@ CONFIG_RNG_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_NVME=y + CONFIG_PCI=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y +@@ -56,8 +59,10 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC3=y +-CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_KEYBOARD=y + CONFIG_USB_GADGET=y + CONFIG_USB_HOST_ETHER=y +@@ -68,6 +73,8 @@ CONFIG_USB_ETHER_RTL8152=y + CONFIG_USB_ETHER_SMSC95XX=y + CONFIG_DM_VIDEO=y + CONFIG_DISPLAY=y ++CONFIG_VIDEO_BPP16=y ++CONFIG_VIDEO_BPP32=y + CONFIG_VIDEO_ROCKCHIP=y + CONFIG_DISPLAY_ROCKCHIP_HDMI=y + CONFIG_SPL_TINY_MEMSET=y +diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h +index c6f9122154..2edad71028 100644 +--- a/include/configs/rock960_rk3399.h ++++ b/include/configs/rock960_rk3399.h +@@ -15,4 +15,6 @@ + + #define SDRAM_BANK_SIZE (2UL << 30) + ++#define CONFIG_USB_OHCI_NEW ++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 + #endif +-- +2.26.2 + From e87d4e06705a13d02df117f86de17a9064565c42 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 9 Sep 2020 11:02:55 +0100 Subject: [PATCH 098/351] Update to 2020.10 rc4 --- ...64-bits.patch => AllWinner-PinePhone.patch | 605 +-------- AllWinner-PineTab.patch | 538 ++++++++ ...hone-automatic-device-tree-selection.patch | 1114 +++++++++++++++++ sources | 2 +- uboot-tools.spec | 15 +- 5 files changed, 1722 insertions(+), 552 deletions(-) rename AllWinner-Pine64-bits.patch => AllWinner-PinePhone.patch (80%) create mode 100644 AllWinner-PineTab.patch create mode 100644 PinePhone-automatic-device-tree-selection.patch diff --git a/AllWinner-Pine64-bits.patch b/AllWinner-PinePhone.patch similarity index 80% rename from AllWinner-Pine64-bits.patch rename to AllWinner-PinePhone.patch index 8ce13e7..cc13eac 100644 --- a/AllWinner-Pine64-bits.patch +++ b/AllWinner-PinePhone.patch @@ -1302,34 +1302,38 @@ Date: Thu, 9 Jul 2020 12:44:55 +0100 Subject: [PATCH 7/8] arm64: dts: allwinner: Add initial support for Pine64 PinePhone -At the moment PinePhone comes in two slightly incompatible variants: +At the moment PinePhone comes in three slightly incompatible variants: - 1.0: Early Developer Batch - 1.1: Braveheart Batch +- 1.2: Initial Production version This syncs the Pinephone DTs from Linux 5.8-rc1. Signed-off-by: Peter Robinson --- - arch/arm/dts/Makefile | 2 + + arch/arm/dts/Makefile | 3 + arch/arm/dts/sun50i-a64-pinephone-1.0.dts | 11 + arch/arm/dts/sun50i-a64-pinephone-1.1.dts | 11 + + arch/arm/dts/sun50i-a64-pinephone-1.2.dts | 40 +++++++++++++++++++++++ arch/arm/dts/sun50i-a64-pinephone.dtsi | 379 ++++++++++++++++++++++ - 4 files changed, 403 insertions(+) + 5 files changed, 403 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.0.dts create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.1.dts + create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.2.dts create mode 100644 arch/arm/dts/sun50i-a64-pinephone.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index cee10f533f..efaadeecf3 100644 +index f8f529435b..193f5c6138 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -597,6 +597,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \ +@@ -608,6 +608,9 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb \ sun50i-a64-pinebook.dtb \ + sun50i-a64-pinephone-1.0.dtb \ + sun50i-a64-pinephone-1.1.dtb \ ++ sun50i-a64-pinephone-1.2.dtb \ sun50i-a64-sopine-baseboard.dtb \ sun50i-a64-teres-i.dtb dtb-$(CONFIG_MACH_SUN9I) += \ @@ -1367,6 +1371,52 @@ index 0000000000..06a775c416 + model = "Pine64 PinePhone Braveheart (1.1)"; + compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; +}; +diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.2.dts b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts +new file mode 100644 +index 0000000000..a9f5b670c9 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts +@@ -0,0 +1,40 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone (1.2)"; ++ compatible = "pine64,pinephone-1.2", "allwinner,sun50i-a64"; ++}; ++ ++&backlight { ++ power-supply = <®_ldo_io0>; ++ /* ++ * PWM backlight circuit on this PinePhone revision was changed since 1.0, ++ * and the lowest PWM duty cycle that doesn't lead to backlight being off ++ * is around 10%. Duty cycle for the lowest brightness level also varries ++ * quite a bit between individual boards, so the lowest value here was ++ * chosen as a safe default. ++ */ ++ brightness-levels = < ++ 5000 5248 5506 5858 6345 ++ 6987 7805 8823 10062 11543 ++ 13287 15317 17654 20319 23336 ++ 26724 30505 34702 39335 44427 ++ 50000 ++ >; ++ num-interpolated-steps = <50>; ++ default-brightness-level = <500>; ++}; ++ ++&lis3mdl { ++ /* ++ * Board revision 1.2 fixed routing of the interrupt to DRDY pin, ++ * enable interrupts. ++ */ ++ interrupt-parent = <&pio>; ++ interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */ ++}; diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi new file mode 100644 index 0000000000..cefda145c3 @@ -1796,7 +1846,7 @@ new file mode 100644 index 0000000000..d5750aa954 --- /dev/null +++ b/configs/pinephone_defconfig -@@ -0,0 +1,38 @@ +@@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y @@ -1811,8 +1861,9 @@ index 0000000000..d5750aa954 +# CONFIG_SPL_SPI_SUNXI is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.1" -+CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.0" ++CONFIG_PINEPHONE_DT_SELECTION=y ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" ++CONFIG_OF_LIST=" sun50i-a64-pinephone-1.2 sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.0" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y @@ -1837,541 +1888,3 @@ index 0000000000..d5750aa954 +# CONFIG_DM_SPI_FLASH is not set -- 2.26.2 -From 163b30d9cd1c0cf77107e0330567bbda063410da Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Apr 2020 09:51:44 +0100 -Subject: [PATCH 8/9] Initial PineTab dts from linux 5.7-rc1 - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++++++++++++ - 2 files changed, 461 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-pinetab.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index fb7516ee83..50c1d48e84 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -575,6 +575,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-pinebook.dtb \ - sun50i-a64-pinephone-1.0.dtb \ - sun50i-a64-pinephone-1.1.dtb \ -+ sun50i-a64-pinetab.dtb \ - sun50i-a64-sopine-baseboard.dtb \ - sun50i-a64-teres-i.dtb - dtb-$(CONFIG_MACH_SUN9I) += \ -diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts -new file mode 100644 -index 0000000000..316e8a4439 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinetab.dts -@@ -0,0 +1,460 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2019 Icenowy Zheng -+ * -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-a64.dtsi" -+#include "sun50i-a64-cpu-opp.dtsi" -+ -+#include -+#include -+#include -+ -+/ { -+ model = "PineTab"; -+ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; -+ -+ aliases { -+ serial0 = &uart0; -+ ethernet0 = &rtl8723cs; -+ }; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; -+ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; -+ default-brightness-level = <15>; -+ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ -+ power-supply = <&vdd_bl>; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ i2c-csi { -+ compatible = "i2c-gpio"; -+ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ -+ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ -+ i2c-gpio,delay-us = <5>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* Rear camera */ -+ ov5640: camera@3c { -+ compatible = "ovti,ov5640"; -+ reg = <0x3c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&csi_mclk_pin>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ -+ AVDD-supply = <®_dldo3>; -+ DOVDD-supply = <®_aldo1>; -+ DVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ -+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ -+ -+ port { -+ ov5640_ep: endpoint { -+ remote-endpoint = <&csi_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+ }; -+ }; -+ -+ speaker_amp: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ sound-name-prefix = "Speaker Amp"; -+ }; -+ -+ vdd_bl: regulator@0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "bl-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ -+ enable-active-high; -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&codec { -+ status = "okay"; -+}; -+ -+&codec_analog { -+ hpvcc-supply = <®_eldo1>; -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu1 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu2 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu3 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&csi { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_ep: endpoint { -+ remote-endpoint = <&ov5640_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+}; -+ -+&dai { -+ status = "okay"; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&dphy { -+ status = "okay"; -+}; -+ -+&dsi { -+ vcc-dsi-supply = <®_dldo1>; -+ status = "okay"; -+ -+ panel@0 { -+ compatible = "feixin,k101-im2ba02"; -+ reg = <0>; -+ avdd-supply = <®_dc1sw>; -+ dvdd-supply = <®_dc1sw>; -+ cvdd-supply = <®_ldo_io1>; -+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ -+ backlight = <&backlight>; -+ }; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ status = "okay"; -+ -+ touchscreen@5d { -+ compatible = "goodix,gt9271"; -+ reg = <0x5d>; -+ interrupt-parent = <&pio>; -+ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ -+ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ -+ AVDD28-supply = <®_ldo_io1>; -+ }; -+}; -+ -+&i2c0_pins { -+ bias-pull-up; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ /* TODO: add Bochs BMA223 accelerometer here */ -+}; -+ -+&lradc { -+ vref-supply = <®_aldo3>; -+ status = "okay"; -+ -+ button-200 { -+ label = "Volume Up"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <200000>; -+ }; -+ -+ button-400 { -+ label = "Volume Down"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <400000>; -+ }; -+}; -+ -+&mixer1 { -+ status = "okay"; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins>; -+ vmmc-supply = <®_dcdc1>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins>; -+ vmmc-supply = <®_dldo4>; -+ vqmmc-supply = <®_eldo1>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ rtl8723cs: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+&mmc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc2_pins>; -+ vmmc-supply = <®_dcdc1>; -+ vqmmc-supply = <®_dcdc1>; -+ bus-width = <8>; -+ non-removable; -+ cap-mmc-hw-reset; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&pwm { -+ status = "okay"; -+}; -+ -+&r_rsb { -+ status = "okay"; -+ -+ axp803: pmic@3a3 { -+ compatible = "x-powers,axp803"; -+ reg = <0x3a3>; -+ interrupt-parent = <&r_intc>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ x-powers,drive-vbus-en; -+ }; -+}; -+ -+#include "axp803.dtsi" -+ -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ -+®_aldo1 { -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ regulator-name = "dovdd-csi"; -+}; -+ -+®_aldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pl"; -+}; -+ -+®_aldo3 { -+ regulator-always-on; -+ regulator-min-microvolt = <2700000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pll-avcc"; -+}; -+ -+®_dc1sw { -+ regulator-name = "vcc-lcd"; -+}; -+ -+®_dcdc1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; -+}; -+ -+®_dcdc2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-name = "vdd-cpux"; -+}; -+ -+/* DCDC3 is polyphased with DCDC2 */ -+ -+®_dcdc5 { -+ regulator-always-on; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-dram"; -+}; -+ -+®_dcdc6 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-sys"; -+}; -+ -+®_dldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-hdmi-dsi-sensor"; -+}; -+ -+®_dldo3 { -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ regulator-name = "avdd-csi"; -+}; -+ -+®_dldo4 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-wifi"; -+}; -+ -+®_drivevbus { -+ regulator-name = "usb0-vbus"; -+ status = "okay"; -+}; -+ -+®_eldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "cpvdd"; -+}; -+ -+®_eldo2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcca-1v8"; -+}; -+ -+®_eldo3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "dvdd-1v8-csi"; -+}; -+ -+®_fldo1 { -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-1v2-hsic"; -+}; -+ -+®_fldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-cpus"; -+}; -+ -+®_ldo_io0 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-usb"; -+ status = "okay"; -+}; -+ -+®_ldo_io1 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-enable-ramp-delay = <3500000>; -+ regulator-name = "vcc-touchscreen"; -+ status = "okay"; -+}; -+ -+®_rtc_ldo { -+ regulator-name = "vcc-rtc"; -+}; -+ -+&sound { -+ status = "okay"; -+ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; -+ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", -+ "Microphone", "Internal Microphone Right", -+ "Headphone", "Headphone Jack", -+ "Speaker", "Internal Speaker"; -+ simple-audio-card,routing = -+ "Left DAC", "AIF1 Slot 0 Left", -+ "Right DAC", "AIF1 Slot 0 Right", -+ "Speaker Amp INL", "LINEOUT", -+ "Speaker Amp INR", "LINEOUT", -+ "Internal Speaker", "Speaker Amp OUTL", -+ "Internal Speaker", "Speaker Amp OUTR", -+ "Headphone Jack", "HP", -+ "AIF1 Slot 0 Left ADC", "Left ADC", -+ "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Internal Microphone Left", "MBIAS", -+ "MIC1", "Internal Microphone Left", -+ "Internal Microphone Right", "HBIAS", -+ "MIC2", "Internal Microphone Right"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pb_pins>; -+ status = "okay"; -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; -+ usb1_vbus-supply = <®_ldo_io0>; -+ status = "okay"; -+}; --- -2.26.0 - -From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Apr 2020 09:53:07 +0100 -Subject: [PATCH 9/9] initial pinetab support - -Signed-off-by: Peter Robinson ---- - configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - create mode 100644 configs/pinetab_defconfig - -diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig -new file mode 100644 -index 0000000000..5b9620f3e5 ---- /dev/null -+++ b/configs/pinetab_defconfig -@@ -0,0 +1,26 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN50I=y -+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y -+CONFIG_DRAM_CLK=552 -+CONFIG_DRAM_ZQ=3881949 -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_R_I2C_ENABLE=y -+CONFIG_SPL_SPI_SUNXI=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_USE_PREBOOT=y -+# CONFIG_SPL_DOS_PARTITION is not set -+# CONFIG_SPL_EFI_PARTITION is not set -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab" -+CONFIG_OF_LIST="sun50i-a64-pinetab" -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_PWM=y -+CONFIG_PWM_SUNXI=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y --- -2.26.0 diff --git a/AllWinner-PineTab.patch b/AllWinner-PineTab.patch new file mode 100644 index 0000000..ce569e7 --- /dev/null +++ b/AllWinner-PineTab.patch @@ -0,0 +1,538 @@ +From 9b10863bc8b14ca5463a95dd2c77555cfc68f326 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 9 Sep 2020 10:59:31 +0100 +Subject: [PATCH] Initial PineTab dts from linux 5.7-rc1 + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++++++++++++ + 2 files changed, 461 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-pinetab.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 193f5c6138..57ef94450a 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -611,6 +611,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ + sun50i-a64-pinephone-1.0.dtb \ + sun50i-a64-pinephone-1.1.dtb \ + sun50i-a64-pinephone-1.2.dtb \ ++ sun50i-a64-pinetab.dtb \ + sun50i-a64-sopine-baseboard.dtb \ + sun50i-a64-teres-i.dtb + dtb-$(CONFIG_MACH_SUN9I) += \ +diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts +new file mode 100644 +index 0000000000..316e8a4439 +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-pinetab.dts +@@ -0,0 +1,460 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2019 Icenowy Zheng ++ * ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "PineTab"; ++ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; ++ ++ aliases { ++ serial0 = &uart0; ++ ethernet0 = &rtl8723cs; ++ }; ++ ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; ++ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; ++ default-brightness-level = <15>; ++ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ ++ power-supply = <&vdd_bl>; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ i2c-csi { ++ compatible = "i2c-gpio"; ++ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ ++ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ ++ i2c-gpio,delay-us = <5>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* Rear camera */ ++ ov5640: camera@3c { ++ compatible = "ovti,ov5640"; ++ reg = <0x3c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_mclk_pin>; ++ clocks = <&ccu CLK_CSI_MCLK>; ++ clock-names = "xclk"; ++ ++ AVDD-supply = <®_dldo3>; ++ DOVDD-supply = <®_aldo1>; ++ DVDD-supply = <®_eldo3>; ++ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ ++ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ ++ ++ port { ++ ov5640_ep: endpoint { ++ remote-endpoint = <&csi_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vdd_bl: regulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "bl-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ hpvcc-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&csi { ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi_ep: endpoint { ++ remote-endpoint = <&ov5640_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "feixin,k101-im2ba02"; ++ reg = <0>; ++ avdd-supply = <®_dc1sw>; ++ dvdd-supply = <®_dc1sw>; ++ cvdd-supply = <®_ldo_io1>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ ++ backlight = <&backlight>; ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt9271"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ ++ AVDD28-supply = <®_ldo_io1>; ++ }; ++}; ++ ++&i2c0_pins { ++ bias-pull-up; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* TODO: add Bochs BMA223 accelerometer here */ ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mixer1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&pwm { ++ status = "okay"; ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ x-powers,drive-vbus-en; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dc1sw { ++ regulator-name = "vcc-lcd"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-hdmi-dsi-sensor"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi"; ++}; ++ ++®_drivevbus { ++ regulator-name = "usb0-vbus"; ++ status = "okay"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "cpvdd"; ++}; ++ ++®_eldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca-1v8"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-usb"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-enable-ramp-delay = <3500000>; ++ regulator-name = "vcc-touchscreen"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", ++ "Microphone", "Internal Microphone Right", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Headphone Jack", "HP", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone Left", "MBIAS", ++ "MIC1", "Internal Microphone Left", ++ "Internal Microphone Right", "HBIAS", ++ "MIC2", "Internal Microphone Right"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; ++ usb1_vbus-supply = <®_ldo_io0>; ++ status = "okay"; ++}; +-- +2.26.2 + +From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 14 Apr 2020 09:53:07 +0100 +Subject: [PATCH 9/9] initial pinetab support + +Signed-off-by: Peter Robinson +--- + configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + create mode 100644 configs/pinetab_defconfig + +diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig +new file mode 100644 +index 0000000000..5b9620f3e5 +--- /dev/null ++++ b/configs/pinetab_defconfig +@@ -0,0 +1,26 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN50I=y ++CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y ++CONFIG_DRAM_CLK=552 ++CONFIG_DRAM_ZQ=3881949 ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++CONFIG_R_I2C_ENABLE=y ++CONFIG_SPL_SPI_SUNXI=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_USE_PREBOOT=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab" ++CONFIG_OF_LIST="sun50i-a64-pinetab" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_SUNXI=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +-- +2.26.0 diff --git a/PinePhone-automatic-device-tree-selection.patch b/PinePhone-automatic-device-tree-selection.patch new file mode 100644 index 0000000..ac2bac4 --- /dev/null +++ b/PinePhone-automatic-device-tree-selection.patch @@ -0,0 +1,1114 @@ +From patchwork Thu Sep 3 05:07:09 2020 +Content-Type: text/plain; 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+ Thu, 3 Sep 2020 01:07:17 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 1/8] sunxi: board: Use a more descriptive variable name +Date: Thu, 3 Sep 2020 00:07:09 -0500 +Message-Id: <20200903050716.48488-2-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The variable "cmp_str" always leaves me wondering if it is the DT name +of the current board (yes) or DT name in the FIT config entry (no). + +In preparation for expanding the functionality here, rename it to +something that obviously means "this is the DT name we are looking for". + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 71e2b758a3e..674e6816d2d 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -892,14 +892,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) + int board_fit_config_name_match(const char *name) + { + struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); +- const char *cmp_str = (const char *)spl; ++ const char *best_dt_name = (const char *)spl; + + /* Check if there is a DT name stored in the SPL header and use that. */ + if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { +- cmp_str += spl->dt_name_offset; ++ best_dt_name += spl->dt_name_offset; + } else { + #ifdef CONFIG_DEFAULT_DEVICE_TREE +- cmp_str = CONFIG_DEFAULT_DEVICE_TREE; ++ best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; + #else + return 0; + #endif +@@ -907,15 +907,15 @@ int board_fit_config_name_match(const char *name) + + #ifdef CONFIG_PINE64_DT_SELECTION + /* Differentiate the two Pine64 board DTs by their DRAM size. */ +- if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { ++ if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { + if ((gd->ram_size > 512 * 1024 * 1024)) + return !strstr(name, "plus"); + else + return !!strstr(name, "plus"); + } else { +- return strcmp(name, cmp_str); ++ return strcmp(name, best_dt_name); + } + #endif +- return strcmp(name, cmp_str); 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 2/8] sunxi: board: Add a helper to get the SPL DT name +Date: Thu, 3 Sep 2020 00:07:10 -0500 +Message-Id: <20200903050716.48488-3-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +This moves the validity checking and typecasts all to one place away +from the string comparison logic, and it detangles the compile-time +and runtime control flow. + +The new helper will also be used by U-Boot proper in a future commit. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 26 +++++++++++++++++--------- + 1 file changed, 17 insertions(+), 9 deletions(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 674e6816d2d..5c9b811f27a 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -319,6 +319,17 @@ static struct boot_file_head * get_spl_header(uint8_t req_version) + return spl; + } + ++static const char *get_spl_dt_name(void) ++{ ++ struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); ++ ++ /* Check if there is a DT name stored in the SPL header. */ ++ if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) ++ return (char *)spl + spl->dt_name_offset; ++ ++ return NULL; ++} ++ + int dram_init(void) + { + struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); +@@ -891,20 +902,17 @@ int ft_board_setup(void *blob, struct bd_info *bd) + #ifdef CONFIG_SPL_LOAD_FIT + int board_fit_config_name_match(const char *name) + { +- struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); +- const char *best_dt_name = (const char *)spl; ++ const char *best_dt_name = get_spl_dt_name(); + +- /* Check if there is a DT name stored in the SPL header and use that. */ +- if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { +- best_dt_name += spl->dt_name_offset; +- } else { + #ifdef CONFIG_DEFAULT_DEVICE_TREE ++ if (best_dt_name == NULL) + best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; +-#else +- return 0; + #endif +- }; + ++ if (best_dt_name == NULL) { ++ /* No DT name was provided, so accept the first config. */ ++ return 0; ++ } + #ifdef CONFIG_PINE64_DT_SELECTION + /* Differentiate the two Pine64 board DTs by their DRAM size. */ + if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { + +From patchwork Thu Sep 3 05:07:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356311 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=sholland.org +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 3/8] sunxi: board: Simplify Pine A64 DT selection logic +Date: Thu, 3 Sep 2020 00:07:11 -0500 +Message-Id: <20200903050716.48488-4-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Instead of using an entirely separate matching algorithm, simply update +the name of the DT we want to match. Enabling this logic does not depend +on the FIT config name, only on the initial guess of the board name. + +Importantly, the initial guess must be "sun50i-a64-pine64-plus", because +otherwise the logic would trigger when "sun50i-a64-pine64-lts" was +written to the SPL header. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 12 ++++-------- + 1 file changed, 4 insertions(+), 8 deletions(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 5c9b811f27a..fb0d5bf4743 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -914,14 +914,10 @@ int board_fit_config_name_match(const char *name) + return 0; + } + #ifdef CONFIG_PINE64_DT_SELECTION +-/* Differentiate the two Pine64 board DTs by their DRAM size. */ +- if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { +- if ((gd->ram_size > 512 * 1024 * 1024)) +- return !strstr(name, "plus"); +- else +- return !!strstr(name, "plus"); +- } else { +- return strcmp(name, best_dt_name); ++ else if (strstr(best_dt_name, "-pine64-plus")) { ++ /* Differentiate the Pine A64 boards by their DRAM size. */ ++ if ((gd->ram_size == 512 * 1024 * 1024)) ++ best_dt_name = "sun50i-a64-pine64"; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 4/8] sunxi: board: Add PinePhone DT selection logic +Date: Thu, 3 Sep 2020 00:07:12 -0500 +Message-Id: <20200903050716.48488-5-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +There are two different publicly-released revisions of the PinePhone +hardware, versions 1.1 and 1.2; and they need different device trees. +Since some GPIO pins were rerouted, we can use that to distinguish +between them. + +Signed-off-by: Samuel Holland +--- + arch/arm/mach-sunxi/Kconfig | 7 +++++++ + board/sunxi/board.c | 21 +++++++++++++++++++++ + 2 files changed, 28 insertions(+) + +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index be0822bfb7d..8421f3b6854 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -1010,4 +1010,11 @@ config PINE64_DT_SELECTION + option, the device tree selection code specific to Pine64 which + utilizes the DRAM size will be enabled. + ++config PINEPHONE_DT_SELECTION ++ bool "Enable PinePhone device tree selection code" ++ depends on MACH_SUN50I ++ help ++ Enable this option to automatically select the device tree for the ++ correct PinePhone hardware revision during boot. ++ + endif +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index fb0d5bf4743..3d64ed18664 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -920,6 +921,26 @@ int board_fit_config_name_match(const char *name) + best_dt_name = "sun50i-a64-pine64"; + } + #endif ++#ifdef CONFIG_PINEPHONE_DT_SELECTION ++ else if (strstr(best_dt_name, "-pinephone")) { ++ /* Differentiate the PinePhone revisions by GPIO inputs. */ ++ prcm_apb0_enable(PRCM_APB0_GATE_PIO); ++ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT); ++ udelay(100); ++ ++ /* PL6 is pulled low by the modem on v1.2. */ ++ if (gpio_get_value(SUNXI_GPL(6)) == 0) ++ best_dt_name = "sun50i-a64-pinephone-1.2"; ++ else ++ best_dt_name = "sun50i-a64-pinephone-1.1"; ++ ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE); ++ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE); ++ prcm_apb0_disable(PRCM_APB0_GATE_PIO); ++ } ++#endif ++ + return strcmp(name, best_dt_name); + } + #endif + +From patchwork Thu Sep 3 05:07:13 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356314 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 5/8] sunxi: board: Save the chosen DT name in the SPL header +Date: Thu, 3 Sep 2020 00:07:13 -0500 +Message-Id: <20200903050716.48488-6-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +This overwrites the name loaded from the SPL image. It will be different +if there was previously no name provided, or if a more accurate name was +determined by the board variant selection logic. This means that the DT +name in the SPL header now always matches the DT appended to U-Boot. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 27 ++++++++++++++++++++++++++- + 1 file changed, 26 insertions(+), 1 deletion(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 3d64ed18664..eaa40a1ea96 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -331,6 +331,21 @@ static const char *get_spl_dt_name(void) + return NULL; + } + ++static void set_spl_dt_name(const char *name) ++{ ++ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); ++ ++ if (spl == INVALID_SPL_HEADER) ++ return; ++ ++ /* Promote the header version for U-Boot proper, if needed. */ ++ if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION) ++ spl->spl_signature[3] = SPL_DT_HEADER_VERSION; ++ ++ strcpy((char *)&spl->string_pool, name); ++ spl->dt_name_offset = offsetof(struct boot_file_head, string_pool); ++} ++ + int dram_init(void) + { + struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); +@@ -904,6 +919,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) + int board_fit_config_name_match(const char *name) + { + const char *best_dt_name = get_spl_dt_name(); ++ int ret; + + #ifdef CONFIG_DEFAULT_DEVICE_TREE + if (best_dt_name == NULL) +@@ -941,6 +957,15 @@ int board_fit_config_name_match(const char *name) + } + #endif + +- return strcmp(name, best_dt_name); ++ ret = strcmp(name, best_dt_name); ++ ++ /* ++ * If one of the FIT configurations matches the most accurate DT name, ++ * update the SPL header to provide that DT name to U-Boot proper. ++ */ ++ if (ret == 0) ++ set_spl_dt_name(best_dt_name); ++ ++ return ret; + } + #endif + +From patchwork Thu Sep 3 05:07:14 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356313 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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+ Thu, 3 Sep 2020 01:07:19 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 6/8] sunxi: board: Set fdtfile to match the DT chosen by SPL +Date: Thu, 3 Sep 2020 00:07:14 -0500 +Message-Id: <20200903050716.48488-7-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. +This meant that, regardless of the DT chosen by SPL (either by changing +the header in the image or by the selection code at runtime), Linux +always used the default DT. + +By using the name from the SPL header (which, because of the previous +commit, always matches the DT used by U-Boot proper), Linux also sees +the same board as U-Boot/SPL, even if the boot script later loads a DT +from disk. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index eaa40a1ea96..5457b28e135 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -870,6 +870,7 @@ static void setup_environment(const void *fdt) + + int misc_init_r(void) + { ++ const char *spl_dt_name; + uint boot; + + env_set("fel_booted", NULL); +@@ -888,6 +889,16 @@ int misc_init_r(void) + env_set("mmc_bootdev", "1"); + } + ++ /* Set fdtfile to match the FIT configuration chosen in SPL. */ ++ spl_dt_name = get_spl_dt_name(); ++ if (spl_dt_name) { ++ char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : ""; ++ char str[64]; ++ ++ snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name); ++ env_set("fdtfile", str); ++ } ++ + setup_environment(gd->fdt_blob); + + #ifdef CONFIG_USB_ETHER + diff --git a/sources b/sources index a197564..9cdc2e2 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.10-rc2.tar.bz2) = 9364a555e34830359c5cfffa87cc3d192ff15b23bf8bda054778e02ab4b37ede09a1a37757eb2121787de924fc563880dd4417bf53cd80d3649acb55d05994e8 +SHA512 (u-boot-2020.10-rc4.tar.bz2) = ba944bf9cbd8285de6fd4c2e67c2411eda6c504e87720854b36fbcd290927dabb25deee28302e8b81a982f41d29d4ddf908d4891c4f5b2bda4324a0191eb701d diff --git a/uboot-tools.spec b/uboot-tools.spec index 493acfd..c119c66 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc4 Name: uboot-tools Version: 2020.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,10 +27,12 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # AllWinner improvements -Patch8: AllWinner-Pine64-bits.patch +Patch8: PinePhone-automatic-device-tree-selection.patch +Patch9: AllWinner-PinePhone.patch +Patch10: AllWinner-PineTab.patch # Rockchips improvements -Patch9: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch10: rockchip-Rock960-Fix-up-USB-support.patch +Patch11: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch12: rockchip-Rock960-Fix-up-USB-support.patch BuildRequires: bc BuildRequires: dtc @@ -244,6 +246,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Sep 09 2020 Peter Robinson - 2020.10-0.4.rc4 +- Update to 2020.10 RC4 + * Wed Aug 19 2020 Peter Robinson - 2020.10-0.3.rc2 - Enable a number of new Rockchip devices From 5bf1926b83bb228cfafb051cd60f6353e89d61bc Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 9 Sep 2020 11:20:31 +0100 Subject: [PATCH 099/351] Fix pinephone dts compile fail --- AllWinner-PinePhone.patch | 2485 ++++++++--------- AllWinner-UpstreamSync.patch | 1297 +++++++++ ...hone-automatic-device-tree-selection.patch | 1114 -------- uboot-tools.spec | 2 +- 4 files changed, 2517 insertions(+), 2381 deletions(-) create mode 100644 AllWinner-UpstreamSync.patch delete mode 100644 PinePhone-automatic-device-tree-selection.patch diff --git a/AllWinner-PinePhone.patch b/AllWinner-PinePhone.patch index cc13eac..baa7119 100644 --- a/AllWinner-PinePhone.patch +++ b/AllWinner-PinePhone.patch @@ -1,1300 +1,1116 @@ -From 6e5d771060dff5350e5940b7e457884b47a560ac Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:20:53 +0100 -Subject: [PATCH 1/8] dt-bindings: clk: sync sun50i-a64-ccu.h to linux 5.8-rc1 +From patchwork Thu Sep 3 05:07:09 2020 +Content-Type: text/plain; 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+ Thu, 3 Sep 2020 01:07:17 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 1/8] sunxi: board: Use a more descriptive variable name +Date: Thu, 3 Sep 2020 00:07:09 -0500 +Message-Id: <20200903050716.48488-2-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean -Sync the clock bindings for the Allwinner A64 to Linux +The variable "cmp_str" always leaves me wondering if it is the DT name +of the current board (yes) or DT name in the FIT config entry (no). -Signed-off-by: Peter Robinson +In preparation for expanding the functionality here, rename it to +something that obviously means "this is the DT name we are looking for". + +Signed-off-by: Samuel Holland --- - include/dt-bindings/clock/sun50i-a64-ccu.h | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) + board/sunxi/board.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) -diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h -index d66432c6e6..318eb15c41 100644 ---- a/include/dt-bindings/clock/sun50i-a64-ccu.h -+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h -@@ -43,8 +43,10 @@ - #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ - #define _DT_BINDINGS_CLK_SUN50I_A64_H_ +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 71e2b758a3e..674e6816d2d 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -892,14 +892,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) + int board_fit_config_name_match(const char *name) + { + struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); +- const char *cmp_str = (const char *)spl; ++ const char *best_dt_name = (const char *)spl; -+#define CLK_PLL_VIDEO0 7 - #define CLK_PLL_PERIPH0 11 + /* Check if there is a DT name stored in the SPL header and use that. */ + if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { +- cmp_str += spl->dt_name_offset; ++ best_dt_name += spl->dt_name_offset; + } else { + #ifdef CONFIG_DEFAULT_DEVICE_TREE +- cmp_str = CONFIG_DEFAULT_DEVICE_TREE; ++ best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; + #else + return 0; + #endif +@@ -907,15 +907,15 @@ int board_fit_config_name_match(const char *name) -+#define CLK_CPUX 21 - #define CLK_BUS_MIPI_DSI 28 - #define CLK_BUS_CE 29 - #define CLK_BUS_DMA 30 -@@ -129,7 +131,7 @@ - #define CLK_AVS 109 - #define CLK_HDMI 110 - #define CLK_HDMI_DDC 111 -- -+#define CLK_MBUS 112 - #define CLK_DSI_DPHY 113 - #define CLK_GPU 114 - --- -2.26.2 + #ifdef CONFIG_PINE64_DT_SELECTION + /* Differentiate the two Pine64 board DTs by their DRAM size. */ +- if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { ++ if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { + if ((gd->ram_size > 512 * 1024 * 1024)) + return !strstr(name, "plus"); + else + return !!strstr(name, "plus"); + } else { +- return strcmp(name, cmp_str); ++ return strcmp(name, best_dt_name); + } + #endif +- return strcmp(name, cmp_str); ++ return strcmp(name, best_dt_name); + } + #endif -From 274dff055e80778277860f72a903c01ef33f87c7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:29:15 +0100 -Subject: [PATCH 2/8] dt-bindings: leds: sync leds common.h to linux from - 5.8-rc1 +From patchwork Thu Sep 3 05:07:10 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356309 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 2/8] sunxi: board: Add a helper to get the SPL DT name +Date: Thu, 3 Sep 2020 00:07:10 -0500 +Message-Id: <20200903050716.48488-3-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean -Sync the leds common.h to the latest Linux version. +This moves the validity checking and typecasts all to one place away +from the string comparison logic, and it detangles the compile-time +and runtime control flow. -Signed-off-by: Peter Robinson +The new helper will also be used by U-Boot proper in a future commit. + +Signed-off-by: Samuel Holland --- - include/dt-bindings/leds/common.h | 36 ++++++++++++++++++++++--------- - 1 file changed, 26 insertions(+), 10 deletions(-) + board/sunxi/board.c | 26 +++++++++++++++++--------- + 1 file changed, 17 insertions(+), 9 deletions(-) -diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h -index 9e1256a7c1..0ce7dfc00d 100644 ---- a/include/dt-bindings/leds/common.h -+++ b/include/dt-bindings/leds/common.h -@@ -6,6 +6,7 @@ - * Author: Jacek Anaszewski - * - * Copyright (C) 2019 Jacek Anaszewski -+ * Copyright (C) 2020 Pavel Machek - */ +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 674e6816d2d..5c9b811f27a 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -319,6 +319,17 @@ static struct boot_file_head * get_spl_header(uint8_t req_version) + return spl; + } - #ifndef __DT_BINDINGS_LEDS_H -@@ -32,16 +33,38 @@ - #define LED_COLOR_ID_MAX 8 ++static const char *get_spl_dt_name(void) ++{ ++ struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); ++ ++ /* Check if there is a DT name stored in the SPL header. */ ++ if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) ++ return (char *)spl + spl->dt_name_offset; ++ ++ return NULL; ++} ++ + int dram_init(void) + { + struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); +@@ -891,20 +902,17 @@ int ft_board_setup(void *blob, struct bd_info *bd) + #ifdef CONFIG_SPL_LOAD_FIT + int board_fit_config_name_match(const char *name) + { +- struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); +- const char *best_dt_name = (const char *)spl; ++ const char *best_dt_name = get_spl_dt_name(); - /* Standard LED functions */ -+/* Keyboard LEDs, usually it would be input4::capslock etc. */ -+/* Obsolete equivalent: "shift-key-light" */ -+#define LED_FUNCTION_CAPSLOCK "capslock" -+#define LED_FUNCTION_SCROLLLOCK "scrolllock" -+#define LED_FUNCTION_NUMLOCK "numlock" -+/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), -+ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ -+#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" -+ -+/* System LEDs, usually found on system body. -+ platform::mute (etc) is sometimes seen, :mute would be better */ -+#define LED_FUNCTION_POWER "power" -+#define LED_FUNCTION_DISK "disk" -+ -+/* Obsolete: "platform:*:charging" (allwinner sun50i) */ -+#define LED_FUNCTION_CHARGING "charging" -+/* Used RGB notification LEDs common on phones. -+ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), -+ "lp5523:{r,g,b}" (Nokia N900) */ -+#define LED_FUNCTION_STATUS "status" -+ -+#define LED_FUNCTION_MICMUTE "micmute" -+#define LED_FUNCTION_MUTE "mute" -+ -+/* Miscelleaus functions. Use functions above if you can. */ - #define LED_FUNCTION_ACTIVITY "activity" - #define LED_FUNCTION_ALARM "alarm" - #define LED_FUNCTION_BACKLIGHT "backlight" - #define LED_FUNCTION_BLUETOOTH "bluetooth" - #define LED_FUNCTION_BOOT "boot" - #define LED_FUNCTION_CPU "cpu" --#define LED_FUNCTION_CAPSLOCK "capslock" --#define LED_FUNCTION_CHARGING "charging" - #define LED_FUNCTION_DEBUG "debug" --#define LED_FUNCTION_DISK "disk" - #define LED_FUNCTION_DISK_ACTIVITY "disk-activity" - #define LED_FUNCTION_DISK_ERR "disk-err" - #define LED_FUNCTION_DISK_READ "disk-read" -@@ -50,21 +73,14 @@ - #define LED_FUNCTION_FLASH "flash" - #define LED_FUNCTION_HEARTBEAT "heartbeat" - #define LED_FUNCTION_INDICATOR "indicator" --#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" - #define LED_FUNCTION_LAN "lan" - #define LED_FUNCTION_MAIL "mail" - #define LED_FUNCTION_MTD "mtd" --#define LED_FUNCTION_MICMUTE "micmute" --#define LED_FUNCTION_MUTE "mute" --#define LED_FUNCTION_NUMLOCK "numlock" - #define LED_FUNCTION_PANIC "panic" - #define LED_FUNCTION_PROGRAMMING "programming" --#define LED_FUNCTION_POWER "power" - #define LED_FUNCTION_RX "rx" - #define LED_FUNCTION_SD "sd" --#define LED_FUNCTION_SCROLLLOCK "scrolllock" - #define LED_FUNCTION_STANDBY "standby" --#define LED_FUNCTION_STATUS "status" - #define LED_FUNCTION_TORCH "torch" - #define LED_FUNCTION_TX "tx" - #define LED_FUNCTION_USB "usb" --- -2.26.2 - -From 7010e7d2b19d2ded674e376855d2716b7cd421b7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 10 Jul 2020 12:46:11 +0100 -Subject: [PATCH 3/8] dt-bindings: clk/reset: sync updated bindings for - Allwinner DE2 display engine - -Sync the clock and reset bindings for the Allwinner DE2 display engine to Linux 5.8-rc1. - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/clock/sun8i-de2.h | 3 +++ - include/dt-bindings/reset/sun8i-de2.h | 1 + - 2 files changed, 4 insertions(+) - -diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h -index 3bed63b524..7768f73b05 100644 ---- a/include/dt-bindings/clock/sun8i-de2.h -+++ b/include/dt-bindings/clock/sun8i-de2.h -@@ -15,4 +15,7 @@ - #define CLK_MIXER1 7 - #define CLK_WB 8 - -+#define CLK_BUS_ROT 9 -+#define CLK_ROT 10 -+ - #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ -diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h -index 9526017432..1c36a6ac86 100644 ---- a/include/dt-bindings/reset/sun8i-de2.h -+++ b/include/dt-bindings/reset/sun8i-de2.h -@@ -10,5 +10,6 @@ - #define RST_MIXER0 0 - #define RST_MIXER1 1 - #define RST_WB 2 -+#define RST_ROT 3 - - #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ --- -2.26.2 - -From bdbf5f21343571af989754c908299854e81f44dd Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:24:41 +0100 -Subject: [PATCH 4/8] arm: dts: sync axp803.dtsi from linux 5.8-rc1 - -Sync the Allwinner axp803 device tree to the latest upstream Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - -diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi -index e5eae8bafc..10e9186a76 100644 ---- a/arch/arm/dts/axp803.dtsi -+++ b/arch/arm/dts/axp803.dtsi -@@ -1,44 +1,5 @@ --/* -- * Copyright 2017 Icenowy Zheng -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright 2017 Icenowy Zheng - - /* - * AXP803 Integrated Power Management Chip -@@ -49,6 +10,39 @@ - interrupt-controller; - #interrupt-cells = <1>; - -+ ac_power_supply: ac-power-supply { -+ compatible = "x-powers,axp803-ac-power-supply", -+ "x-powers,axp813-ac-power-supply"; -+ status = "disabled"; -+ }; -+ -+ axp_adc: adc { -+ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; -+ #io-channel-cells = <1>; -+ }; -+ -+ axp_gpio: gpio { -+ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ gpio0_ldo: gpio0-ldo { -+ pins = "GPIO0"; -+ function = "ldo"; -+ }; -+ -+ gpio1_ldo: gpio1-ldo { -+ pins = "GPIO1"; -+ function = "ldo"; -+ }; -+ }; -+ -+ battery_power_supply: battery-power-supply { -+ compatible = "x-powers,axp803-battery-power-supply", -+ "x-powers,axp813-battery-power-supply"; -+ status = "disabled"; -+ }; -+ - regulators { - /* Default work frequency for buck regulators */ - x-powers,dcdc-freq = <3000>; -@@ -152,4 +146,10 @@ - status = "disabled"; - }; - }; -+ -+ usb_power_supply: usb-power-supply { -+ compatible = "x-powers,axp803-usb-power-supply", -+ "x-powers,axp813-usb-power-supply"; -+ status = "disabled"; -+ }; - }; --- -2.26.2 - -From e0f7e9ce1a8a889bf7a1c5842700f0cb368bc81b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:26:34 +0100 -Subject: [PATCH 5/8] arm: dts: Add new sun50i-a64-cpu-opp.dtsi from Linux - 5.8-rc1 - -Sync the Allwinner A64 CPU operating points dtsi from Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ - 1 file changed, 75 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi - -diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -new file mode 100644 -index 0000000000..578c37490d ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -@@ -0,0 +1,75 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2020 Vasily khoruzhick -+ */ -+ -+/ { -+ cpu0_opp_table: opp_table0 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ -+ opp-648000000 { -+ opp-hz = /bits/ 64 <648000000>; -+ opp-microvolt = <1040000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-816000000 { -+ opp-hz = /bits/ 64 <816000000>; -+ opp-microvolt = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-912000000 { -+ opp-hz = /bits/ 64 <912000000>; -+ opp-microvolt = <1120000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-960000000 { -+ opp-hz = /bits/ 64 <960000000>; -+ opp-microvolt = <1160000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; -+ opp-microvolt = <1200000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1240000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt = <1260000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1152000000 { -+ opp-hz = /bits/ 64 <1152000000>; -+ opp-microvolt = <1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; --- -2.26.2 - -From b077a5962ba631e198d42c14516426b878c157eb Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 10 Jul 2020 12:39:21 +0100 -Subject: [PATCH 6/8] arm: dts: Sync the sun50i-a64.dtsi from Linux 5.8-rc1 - -Sync the Allwinner A64 sun50i-a64.dtsi from Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++------- - 1 file changed, 434 insertions(+), 98 deletions(-) - -diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index ff41abc96a..8dfbcd1440 100644 ---- a/arch/arm/dts/sun50i-a64.dtsi -+++ b/arch/arm/dts/sun50i-a64.dtsi -@@ -1,46 +1,7 @@ --/* -- * Copyright (C) 2016 ARM Ltd. -- * based on the Allwinner H3 dtsi: -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2016 ARM Ltd. -+// based on the Allwinner H3 dtsi: -+// Copyright (C) 2015 Jens Kuske - - #include - #include -@@ -49,6 +10,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -84,35 +46,47 @@ - #size-cells = <0>; - - cpu0: cpu@0 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - L2: l2-cache { -@@ -139,15 +113,16 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; -- clock-output-names = "osc32k"; -+ clock-output-names = "ext-osc32k"; - }; - -- iosc: internal-osc-clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <16000000>; -- clock-accuracy = <300000000>; -- clock-output-names = "iosc"; -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = , -+ , -+ , -+ ; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { -@@ -155,26 +130,33 @@ - method = "smc"; - }; - -- sound_spdif { -+ sound: sound { - compatible = "simple-audio-card"; -- simple-audio-card,name = "On-board SPDIF"; -+ simple-audio-card,name = "sun50i-a64-audio"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,frame-master = <&cpudai>; -+ simple-audio-card,bitclock-master = <&cpudai>; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,aux-devs = <&codec_analog>; -+ simple-audio-card,routing = -+ "Left DAC", "AIF1 Slot 0 Left", -+ "Right DAC", "AIF1 Slot 0 Right", -+ "AIF1 Slot 0 Left ADC", "Left ADC", -+ "AIF1 Slot 0 Right ADC", "Right ADC"; -+ status = "disabled"; - -- simple-audio-card,cpu { -- sound-dai = <&spdif>; -+ cpudai: simple-audio-card,cpu { -+ sound-dai = <&dai>; - }; - -- simple-audio-card,codec { -- sound-dai = <&spdif_out>; -+ link_codec: simple-audio-card,codec { -+ sound-dai = <&codec>; - }; - }; - -- spdif_out: spdif-out { -- #sound-dai-cells = <0>; -- compatible = "linux,spdif-dit"; +- /* Check if there is a DT name stored in the SPL header and use that. */ +- if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { +- best_dt_name += spl->dt_name_offset; +- } else { + #ifdef CONFIG_DEFAULT_DEVICE_TREE ++ if (best_dt_name == NULL) + best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; +-#else +- return 0; + #endif - }; -- - timer { - compatible = "arm,armv8-timer"; -+ allwinner,erratum-unknown1; - interrupts = , - ; - }; -+ thermal-zones { -+ cpu_thermal: cpu0-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 0>; ++ if (best_dt_name == NULL) { ++ /* No DT name was provided, so accept the first config. */ ++ return 0; ++ } + #ifdef CONFIG_PINE64_DT_SELECTION + /* Differentiate the two Pine64 board DTs by their DRAM size. */ + if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { + +From patchwork Thu Sep 3 05:07:11 2020 +Content-Type: text/plain; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 3/8] sunxi: board: Simplify Pine A64 DT selection logic +Date: Thu, 3 Sep 2020 00:07:11 -0500 +Message-Id: <20200903050716.48488-4-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Instead of using an entirely separate matching algorithm, simply update +the name of the DT we want to match. Enabling this logic does not depend +on the FIT config name, only on the initial guess of the board name. + +Importantly, the initial guess must be "sun50i-a64-pine64-plus", because +otherwise the logic would trigger when "sun50i-a64-pine64-lts" was +written to the SPL header. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 12 ++++-------- + 1 file changed, 4 insertions(+), 8 deletions(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 5c9b811f27a..fb0d5bf4743 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -914,14 +914,10 @@ int board_fit_config_name_match(const char *name) + return 0; + } + #ifdef CONFIG_PINE64_DT_SELECTION +-/* Differentiate the two Pine64 board DTs by their DRAM size. */ +- if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { +- if ((gd->ram_size > 512 * 1024 * 1024)) +- return !strstr(name, "plus"); +- else +- return !!strstr(name, "plus"); +- } else { +- return strcmp(name, best_dt_name); ++ else if (strstr(best_dt_name, "-pine64-plus")) { ++ /* Differentiate the Pine A64 boards by their DRAM size. */ ++ if ((gd->ram_size == 512 * 1024 * 1024)) ++ best_dt_name = "sun50i-a64-pine64"; + } + #endif + return strcmp(name, best_dt_name); + +From patchwork Thu Sep 3 05:07:12 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356310 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=sholland.org +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=sholland.org header.i=@sholland.org header.a=rsa-sha256 + header.s=fm3 header.b=WQvh0tb6; + dkim=pass (2048-bit key; + unprotected) header.d=messagingengine.com header.i=@messagingengine.com + header.a=rsa-sha256 header.s=fm3 header.b=Va8mMuMz; + dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Bhphw0Nkzz9sTR + for ; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 4/8] sunxi: board: Add PinePhone DT selection logic +Date: Thu, 3 Sep 2020 00:07:12 -0500 +Message-Id: <20200903050716.48488-5-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +There are two different publicly-released revisions of the PinePhone +hardware, versions 1.1 and 1.2; and they need different device trees. +Since some GPIO pins were rerouted, we can use that to distinguish +between them. + +Signed-off-by: Samuel Holland +--- + arch/arm/mach-sunxi/Kconfig | 7 +++++++ + board/sunxi/board.c | 21 +++++++++++++++++++++ + 2 files changed, 28 insertions(+) + +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index be0822bfb7d..8421f3b6854 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -1010,4 +1010,11 @@ config PINE64_DT_SELECTION + option, the device tree selection code specific to Pine64 which + utilizes the DRAM size will be enabled. + ++config PINEPHONE_DT_SELECTION ++ bool "Enable PinePhone device tree selection code" ++ depends on MACH_SUN50I ++ help ++ Enable this option to automatically select the device tree for the ++ correct PinePhone hardware revision during boot. + -+ cooling-maps { -+ map0 { -+ trip = <&cpu_alert0>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ map1 { -+ trip = <&cpu_alert1>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; + endif +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index fb0d5bf4743..3d64ed18664 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -920,6 +921,26 @@ int board_fit_config_name_match(const char *name) + best_dt_name = "sun50i-a64-pine64"; + } + #endif ++#ifdef CONFIG_PINEPHONE_DT_SELECTION ++ else if (strstr(best_dt_name, "-pinephone")) { ++ /* Differentiate the PinePhone revisions by GPIO inputs. */ ++ prcm_apb0_enable(PRCM_APB0_GATE_PIO); ++ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT); ++ udelay(100); + -+ trips { -+ cpu_alert0: cpu_alert0 { -+ /* milliCelsius */ -+ temperature = <75000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; ++ /* PL6 is pulled low by the modem on v1.2. */ ++ if (gpio_get_value(SUNXI_GPL(6)) == 0) ++ best_dt_name = "sun50i-a64-pinephone-1.2"; ++ else ++ best_dt_name = "sun50i-a64-pinephone-1.1"; + -+ cpu_alert1: cpu_alert1 { -+ /* milliCelsius */ -+ temperature = <90000>; -+ hysteresis = <2000>; -+ type = "hot"; -+ }; ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE); ++ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE); ++ prcm_apb0_disable(PRCM_APB0_GATE_PIO); ++ } ++#endif + -+ cpu_crit: cpu_crit { -+ /* milliCelsius */ -+ temperature = <110000>; -+ hysteresis = <2000>; -+ type = "critical"; -+ }; -+ }; -+ }; + return strcmp(name, best_dt_name); + } + #endif + +From patchwork Thu Sep 3 05:07:13 2020 +Content-Type: text/plain; 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+ Thu, 3 Sep 2020 01:07:18 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 5/8] sunxi: board: Save the chosen DT name in the SPL header +Date: Thu, 3 Sep 2020 00:07:13 -0500 +Message-Id: <20200903050716.48488-6-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +This overwrites the name loaded from the SPL image. It will be different +if there was previously no name provided, or if a more accurate name was +determined by the board variant selection logic. This means that the DT +name in the SPL header now always matches the DT appended to U-Boot. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 27 ++++++++++++++++++++++++++- + 1 file changed, 26 insertions(+), 1 deletion(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 3d64ed18664..eaa40a1ea96 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -331,6 +331,21 @@ static const char *get_spl_dt_name(void) + return NULL; + } + ++static void set_spl_dt_name(const char *name) ++{ ++ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); + -+ gpu0_thermal: gpu0-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ }; ++ if (spl == INVALID_SPL_HEADER) ++ return; + -+ gpu1_thermal: gpu1-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 2>; -+ }; -+ }; ++ /* Promote the header version for U-Boot proper, if needed. */ ++ if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION) ++ spl->spl_signature[3] = SPL_DT_HEADER_VERSION; + - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - -- de2@1000000 { -+ bus@1000000 { - compatible = "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; -@@ -201,16 +246,28 @@ - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-a64-de2-clk"; -- reg = <0x0 0x100000>; -- clocks = <&ccu CLK_DE>, -- <&ccu CLK_BUS_DE>; -- clock-names = "mod", -- "bus"; -+ reg = <0x0 0x10000>; -+ clocks = <&ccu CLK_BUS_DE>, -+ <&ccu CLK_DE>; -+ clock-names = "bus", -+ "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ rotate: rotate@20000 { -+ compatible = "allwinner,sun50i-a64-de2-rotate", -+ "allwinner,sun8i-a83t-de2-rotate"; -+ reg = <0x20000 0x10000>; -+ interrupts = ; -+ clocks = <&display_clocks CLK_BUS_ROT>, -+ <&display_clocks CLK_ROT>; -+ clock-names = "bus", -+ "mod"; -+ resets = <&display_clocks RST_ROT>; -+ }; ++ strcpy((char *)&spl->string_pool, name); ++ spl->dt_name_offset = offsetof(struct boot_file_head, string_pool); ++} + - mixer0: mixer@100000 { - compatible = "allwinner,sun50i-a64-de2-mixer-0"; - reg = <0x100000 0x100000>; -@@ -225,11 +282,19 @@ - #size-cells = <0>; + int dram_init(void) + { + struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); +@@ -904,6 +919,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) + int board_fit_config_name_match(const char *name) + { + const char *best_dt_name = get_spl_dt_name(); ++ int ret; - mixer0_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; + #ifdef CONFIG_DEFAULT_DEVICE_TREE + if (best_dt_name == NULL) +@@ -941,6 +957,15 @@ int board_fit_config_name_match(const char *name) + } + #endif -- mixer0_out_tcon0: endpoint { -+ mixer0_out_tcon0: endpoint@0 { -+ reg = <0>; - remote-endpoint = <&tcon0_in_mixer0>; - }; +- return strcmp(name, best_dt_name); ++ ret = strcmp(name, best_dt_name); + -+ mixer0_out_tcon1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon1_in_mixer0>; -+ }; - }; - }; - }; -@@ -248,9 +313,17 @@ - #size-cells = <0>; - - mixer1_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; - -- mixer1_out_tcon1: endpoint { -+ mixer1_out_tcon0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon0_in_mixer1>; -+ }; ++ /* ++ * If one of the FIT configurations matches the most accurate DT name, ++ * update the SPL header to provide that DT name to U-Boot proper. ++ */ ++ if (ret == 0) ++ set_spl_dt_name(best_dt_name); + -+ mixer1_out_tcon1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&tcon1_in_mixer1>; - }; - }; -@@ -259,8 +332,7 @@ - }; ++ return ret; + } + #endif + +From patchwork Thu Sep 3 05:07:14 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Samuel Holland +X-Patchwork-Id: 1356313 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; 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+ Thu, 3 Sep 2020 01:07:19 -0400 (EDT) +From: Samuel Holland +To: Jagan Teki , Maxime Ripard +Cc: Andre Przywara , + Peter Robinson , u-boot@lists.denx.de, + Samuel Holland +Subject: [PATCH 6/8] sunxi: board: Set fdtfile to match the DT chosen by SPL +Date: Thu, 3 Sep 2020 00:07:14 -0500 +Message-Id: <20200903050716.48488-7-samuel@sholland.org> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> +References: <20200903050716.48488-1-samuel@sholland.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. +This meant that, regardless of the DT chosen by SPL (either by changing +the header in the image or by the selection code at runtime), Linux +always used the default DT. + +By using the name from the SPL header (which, because of the previous +commit, always matches the DT used by U-Boot proper), Linux also sees +the same board as U-Boot/SPL, even if the boot script later loads a DT +from disk. + +Signed-off-by: Samuel Holland +--- + board/sunxi/board.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index eaa40a1ea96..5457b28e135 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -870,6 +870,7 @@ static void setup_environment(const void *fdt) - syscon: syscon@1c00000 { -- compatible = "allwinner,sun50i-a64-system-control", -- "syscon"; -+ compatible = "allwinner,sun50i-a64-system-control"; - reg = <0x01c00000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; -@@ -278,6 +350,20 @@ - reg = <0x0000 0x28000>; - }; - }; + int misc_init_r(void) + { ++ const char *spl_dt_name; + uint boot; + + env_set("fel_booted", NULL); +@@ -888,6 +889,16 @@ int misc_init_r(void) + env_set("mmc_bootdev", "1"); + } + ++ /* Set fdtfile to match the FIT configuration chosen in SPL. */ ++ spl_dt_name = get_spl_dt_name(); ++ if (spl_dt_name) { ++ char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : ""; ++ char str[64]; + -+ sram_c1: sram@1d00000 { -+ compatible = "mmio-sram"; -+ reg = <0x01d00000 0x40000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x01d00000 0x40000>; ++ snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name); ++ env_set("fdtfile", str); ++ } + -+ ve_sram: sram-section@0 { -+ compatible = "allwinner,sun50i-a64-sram-c1", -+ "allwinner,sun4i-a10-sram-c1"; -+ reg = <0x000000 0x40000>; -+ }; -+ }; - }; + setup_environment(gd->fdt_blob); - dma: dma-controller@1c02000 { -@@ -299,6 +385,7 @@ - clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; -+ #clock-cells = <0>; - resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; - reset-names = "lcd", "lvds"; - -@@ -315,12 +402,23 @@ - reg = <0>; - remote-endpoint = <&mixer0_out_tcon0>; - }; -+ -+ tcon0_in_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&mixer1_out_tcon0>; -+ }; - }; - - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; -+ -+ tcon0_out_dsi: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&dsi_in_tcon0>; -+ allwinner,tcon-channel = <1>; -+ }; - }; - }; - }; -@@ -340,9 +438,17 @@ - #size-cells = <0>; - - tcon1_in: port@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <0>; - -- tcon1_in_mixer1: endpoint { -+ tcon1_in_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mixer0_out_tcon1>; -+ }; -+ -+ tcon1_in_mixer1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&mixer1_out_tcon1>; - }; - }; -@@ -360,6 +466,17 @@ - }; - }; - -+ video-codec@1c0e000 { -+ compatible = "allwinner,sun50i-a64-video-engine"; -+ reg = <0x01c0e000 0x1000>; -+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, -+ <&ccu CLK_DRAM_VE>; -+ clock-names = "ahb", "mod", "ram"; -+ resets = <&ccu RST_BUS_VE>; -+ interrupts = ; -+ allwinner,sram = <&ve_sram 1>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc"; - reg = <0x01c0f000 0x1000>; -@@ -405,6 +522,31 @@ - sid: eeprom@1c14000 { - compatible = "allwinner,sun50i-a64-sid"; - reg = <0x1c14000 0x400>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@34 { -+ reg = <0x34 0x8>; -+ }; -+ }; -+ -+ crypto: crypto@1c15000 { -+ compatible = "allwinner,sun50i-a64-crypto"; -+ reg = <0x01c15000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_CE>; -+ }; -+ -+ msgbox: mailbox@1c17000 { -+ compatible = "allwinner,sun50i-a64-msgbox", -+ "allwinner,sun6i-a31-msgbox"; -+ reg = <0x01c17000 0x1000>; -+ clocks = <&ccu CLK_BUS_MSGBOX>; -+ resets = <&ccu RST_BUS_MSGBOX>; -+ interrupts = ; -+ #mbox-cells = <1>; - }; - - usb_otg: usb@1c19000 { -@@ -417,6 +559,7 @@ - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; -+ dr_mode = "otg"; - status = "disabled"; - }; - -@@ -491,7 +634,7 @@ - ccu: clock@1c20000 { - compatible = "allwinner,sun50i-a64-ccu"; - reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -+ clocks = <&osc24M>, <&rtc 0>; - clock-names = "hosc", "losc"; - #clock-cells = <1>; - #reset-cells = <1>; -@@ -503,22 +646,50 @@ - interrupts = , - , - ; -- clocks = <&ccu 58>; -+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; -+ clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - -- i2c0_pins: i2c0_pins { -+ csi_pins: csi-pins { -+ pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", -+ "PE7", "PE8", "PE9", "PE10", "PE11"; -+ function = "csi"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi_mclk_pin: csi-mclk-pin { -+ pins = "PE1"; -+ function = "csi"; -+ }; -+ -+ i2c0_pins: i2c0-pins { - pins = "PH0", "PH1"; - function = "i2c0"; - }; - -- i2c1_pins: i2c1_pins { -+ i2c1_pins: i2c1-pins { - pins = "PH2", "PH3"; - function = "i2c1"; - }; - -+ i2c2_pins: i2c2-pins { -+ pins = "PE14", "PE15"; -+ function = "i2c2"; -+ }; -+ -+ /omit-if-no-ref/ -+ lcd_rgb666_pins: lcd-rgb666-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD6", "PD7", "PD8", "PD9", -+ "PD10", "PD11", "PD12", "PD13", -+ "PD14", "PD15", "PD16", "PD17", -+ "PD18", "PD19", "PD20", "PD21"; -+ function = "lcd0"; -+ }; -+ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; -@@ -551,19 +722,19 @@ - bias-pull-up; - }; - -- pwm_pin: pwm_pin { -+ pwm_pin: pwm-pin { - pins = "PD22"; - function = "pwm"; - }; - -- rmii_pins: rmii_pins { -+ rmii_pins: rmii-pins { - pins = "PD10", "PD11", "PD13", "PD14", "PD17", - "PD18", "PD19", "PD20", "PD22", "PD23"; - function = "emac"; - drive-strength = <40>; - }; - -- rgmii_pins: rgmii_pins { -+ rgmii_pins: rgmii-pins { - pins = "PD8", "PD9", "PD10", "PD11", "PD12", - "PD13", "PD15", "PD16", "PD17", "PD18", - "PD19", "PD20", "PD21", "PD22", "PD23"; -@@ -571,17 +742,17 @@ - drive-strength = <40>; - }; - -- spdif_tx_pin: spdif { -+ spdif_tx_pin: spdif-tx-pin { - pins = "PH8"; - function = "spdif"; - }; - -- spi0_pins: spi0 { -+ spi0_pins: spi0-pins { - pins = "PC0", "PC1", "PC2", "PC3"; - function = "spi0"; - }; - -- spi1_pins: spi1 { -+ spi1_pins: spi1-pins { - pins = "PD0", "PD1", "PD2", "PD3"; - function = "spi1"; - }; -@@ -591,12 +762,12 @@ - function = "uart0"; - }; - -- uart1_pins: uart1_pins { -+ uart1_pins: uart1-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - -- uart1_rts_cts_pins: uart1_rts_cts_pins { -+ uart1_rts_cts_pins: uart1-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; -@@ -638,6 +809,14 @@ - status = "disabled"; - }; - -+ lradc: lradc@1c21800 { -+ compatible = "allwinner,sun50i-a64-lradc", -+ "allwinner,sun8i-a83t-r-lradc"; -+ reg = <0x01c21800 0x400>; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ - i2s0: i2s@1c22000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-a64-i2s", -@@ -666,6 +845,41 @@ - status = "disabled"; - }; - -+ dai: dai@1c22c00 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun50i-a64-codec-i2s"; -+ reg = <0x01c22c00 0x200>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_CODEC>; -+ dmas = <&dma 15>, <&dma 15>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ codec: codec@1c22e00 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun8i-a33-codec"; -+ reg = <0x01c22e00 0x600>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -+ clock-names = "bus", "mod"; -+ status = "disabled"; -+ }; -+ -+ ths: thermal-sensor@1c25000 { -+ compatible = "allwinner,sun50i-a64-ths"; -+ reg = <0x01c25000 0x100>; -+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; -+ clock-names = "bus", "mod"; -+ interrupts = ; -+ resets = <&ccu RST_BUS_THS>; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <1>; -+ }; -+ - uart0: serial@1c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; -@@ -727,6 +941,8 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C0>; - resets = <&ccu RST_BUS_I2C0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; -@@ -738,6 +954,8 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C1>; - resets = <&ccu RST_BUS_I2C1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; -@@ -749,12 +967,13 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - -- - spi0: spi@1c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; -@@ -808,6 +1027,28 @@ - }; - }; - -+ mali: gpu@1c40000 { -+ compatible = "allwinner,sun50i-a64-mali", "arm,mali-400"; -+ reg = <0x01c40000 0x10000>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ interrupt-names = "gp", -+ "gpmmu", -+ "pp0", -+ "ppmmu0", -+ "pp1", -+ "ppmmu1", -+ "pmu"; -+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; -+ clock-names = "bus", "core"; -+ resets = <&ccu RST_BUS_GPU>; -+ }; -+ - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, -@@ -830,6 +1071,75 @@ - status = "disabled"; - }; - -+ mbus: dram-controller@1c62000 { -+ compatible = "allwinner,sun50i-a64-mbus"; -+ reg = <0x01c62000 0x1000>; -+ clocks = <&ccu 112>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ dma-ranges = <0x00000000 0x40000000 0xc0000000>; -+ #interconnect-cells = <1>; -+ }; -+ -+ csi: csi@1cb0000 { -+ compatible = "allwinner,sun50i-a64-csi"; -+ reg = <0x01cb0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CSI>, -+ <&ccu CLK_CSI_SCLK>, -+ <&ccu CLK_DRAM_CSI>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_CSI>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&csi_pins>; -+ status = "disabled"; -+ }; -+ -+ dsi: dsi@1ca0000 { -+ compatible = "allwinner,sun50i-a64-mipi-dsi"; -+ reg = <0x01ca0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ phys = <&dphy>; -+ phy-names = "dphy"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port { -+ dsi_in_tcon0: endpoint { -+ remote-endpoint = <&tcon0_out_dsi>; -+ }; -+ }; -+ }; -+ -+ dphy: d-phy@1ca1000 { -+ compatible = "allwinner,sun50i-a64-mipi-dphy", -+ "allwinner,sun6i-a31-mipi-dphy"; -+ reg = <0x01ca1000 0x1000>; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>, -+ <&ccu CLK_DSI_DPHY>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ status = "disabled"; -+ #phy-cells = <0>; -+ }; -+ -+ deinterlace: deinterlace@1e00000 { -+ compatible = "allwinner,sun50i-a64-deinterlace", -+ "allwinner,sun8i-h3-deinterlace"; -+ reg = <0x01e00000 0x20000>; -+ clocks = <&ccu CLK_BUS_DEINTERLACE>, -+ <&ccu CLK_DEINTERLACE>, -+ <&ccu CLK_DRAM_DEINTERLACE>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_DEINTERLACE>; -+ interrupts = ; -+ interconnects = <&mbus 9>; -+ interconnect-names = "dma-mem"; -+ }; -+ - hdmi: hdmi@1ee0000 { - compatible = "allwinner,sun50i-a64-dw-hdmi", - "allwinner,sun8i-a83t-dw-hdmi"; -@@ -842,7 +1152,7 @@ - resets = <&ccu RST_BUS_HDMI1>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; -- phy-names = "hdmi-phy"; -+ phy-names = "phy"; - status = "disabled"; - - ports { -@@ -867,7 +1177,7 @@ - compatible = "allwinner,sun50i-a64-hdmi-phy"; - reg = <0x01ef0000 0x10000>; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, -- <&ccu 7>; -+ <&ccu CLK_PLL_VIDEO0>; - clock-names = "bus", "mod", "pll-0"; - resets = <&ccu RST_BUS_HDMI0>; - reset-names = "phy"; -@@ -875,11 +1185,12 @@ - }; - - rtc: rtc@1f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -+ compatible = "allwinner,sun50i-a64-rtc", -+ "allwinner,sun8i-h3-rtc"; -+ reg = <0x01f00000 0x400>; - interrupts = , - ; -- clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; -+ clock-output-names = "osc32k", "osc32k-out", "iosc"; - clocks = <&osc32k>; - #clock-cells = <1>; - }; -@@ -896,13 +1207,19 @@ - r_ccu: clock@1f01400 { - compatible = "allwinner,sun50i-a64-r-ccu"; - reg = <0x01f01400 0x100>; -- clocks = <&osc24M>, <&osc32k>, <&iosc>, -- <&ccu 11>; -+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, -+ <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ codec_analog: codec-analog@1f015c0 { -+ compatible = "allwinner,sun50i-a64-codec-analog"; -+ reg = <0x01f015c0 0x4>; -+ status = "disabled"; -+ }; -+ - r_i2c: i2c@1f02400 { - compatible = "allwinner,sun50i-a64-i2c", - "allwinner,sun6i-a31-i2c"; -@@ -915,6 +1232,19 @@ - #size-cells = <0>; - }; - -+ r_ir: ir@1f02000 { -+ compatible = "allwinner,sun50i-a64-ir", -+ "allwinner,sun6i-a31-ir"; -+ reg = <0x01f02000 0x400>; -+ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_APB0_IR>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_ir_rx_pin>; -+ status = "disabled"; -+ }; -+ - r_pwm: pwm@1f03800 { - compatible = "allwinner,sun50i-a64-pwm", - "allwinner,sun5i-a13-pwm"; -@@ -942,12 +1272,17 @@ - function = "s_i2c"; - }; - -- r_pwm_pin: pwm { -+ r_ir_rx_pin: r-ir-rx-pin { -+ pins = "PL11"; -+ function = "s_cir_rx"; -+ }; -+ -+ r_pwm_pin: r-pwm-pin { - pins = "PL10"; - function = "s_pwm"; - }; - -- r_rsb_pins: rsb { -+ r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; - }; -@@ -972,6 +1307,7 @@ - "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = ; -+ clocks = <&osc24M>; - }; - }; - }; --- -2.26.2 + #ifdef CONFIG_USB_ETHER From 9e91885814f880ce13ee98cab79876338811949f Mon Sep 17 00:00:00 2001 From: Peter Robinson @@ -1805,6 +1621,143 @@ index 0000000000..cefda145c3 -- 2.26.2 +From bed9375bf6d11bdbf08839135541c44d80189384 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 9 Sep 2020 11:19:09 +0100 +Subject: [PATCH] pinephone dts sync to 5.9-rc1 + +--- + arch/arm/dts/sun50i-a64-pinephone-1.1.dts | 19 ++++++++ + arch/arm/dts/sun50i-a64-pinephone.dtsi | 54 ++++++++++++++++++++++- + 2 files changed, 71 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts +index 06a775c416..3e99a87e9c 100644 +--- a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts ++++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts +@@ -9,3 +9,22 @@ + model = "Pine64 PinePhone Braveheart (1.1)"; + compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; + }; ++ ++&backlight { ++ power-supply = <®_ldo_io0>; ++ /* ++ * PWM backlight circuit on this PinePhone revision was changed since ++ * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight ++ * being off is around 20%. Duty cycle for the lowest brightness level ++ * also varries quite a bit between individual boards, so the lowest ++ * value here was chosen as a safe default. ++ */ ++ brightness-levels = < ++ 774 793 814 842 ++ 882 935 1003 1088 ++ 1192 1316 1462 1633 ++ 1830 2054 2309 2596 ++ 2916 3271 3664 4096>; ++ num-interpolated-steps = <50>; ++ default-brightness-level = <400>; ++}; +diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi +index cefda145c3..25150aba74 100644 +--- a/arch/arm/dts/sun50i-a64-pinephone.dtsi ++++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi +@@ -16,6 +16,13 @@ + serial0 = &uart0; + }; + ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>; ++ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ ++ /* Backlight configuration differs per PinePhone revision. */ ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -84,6 +91,28 @@ + status = "okay"; + }; + ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "xingbangda,xbd599"; ++ reg = <0>; ++ reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */ ++ iovcc-supply = <®_dldo2>; ++ vcc-supply = <®_ldo_io0>; ++ backlight = <&backlight>; ++ }; ++}; ++ + &ehci0 { + status = "okay"; + }; +@@ -92,11 +121,28 @@ + status = "okay"; + }; + ++&i2c0 { ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt917s"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ ++ AVDD28-supply = <®_ldo_io0>; ++ VDDIO-supply = <®_ldo_io0>; ++ touchscreen-size-x = <720>; ++ touchscreen-size-y = <1440>; ++ }; ++}; ++ + &i2c1 { + status = "okay"; + + /* Magnetometer */ +- lis3mdl@1e { ++ lis3mdl: lis3mdl@1e { + compatible = "st,lis3mdl-magn"; + reg = <0x1e>; + vdd-supply = <®_dldo1>; +@@ -188,6 +234,10 @@ + */ + }; + ++&r_pwm { ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -279,7 +329,7 @@ + + ®_dldo4 { + regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; ++ regulator-max-microvolt = <1800000>; + regulator-name = "vcc-wifi-io"; + }; + +-- +2.26.2 + From ab4bad52587be7da4262d943f19b5db02a24a045 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 15 Jul 2020 13:14:09 +0100 diff --git a/AllWinner-UpstreamSync.patch b/AllWinner-UpstreamSync.patch new file mode 100644 index 0000000..0b6bac4 --- /dev/null +++ b/AllWinner-UpstreamSync.patch @@ -0,0 +1,1297 @@ +From 6e5d771060dff5350e5940b7e457884b47a560ac Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:20:53 +0100 +Subject: [PATCH 1/8] dt-bindings: clk: sync sun50i-a64-ccu.h to linux 5.8-rc1 + +Sync the clock bindings for the Allwinner A64 to Linux + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/clock/sun50i-a64-ccu.h | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h +index d66432c6e6..318eb15c41 100644 +--- a/include/dt-bindings/clock/sun50i-a64-ccu.h ++++ b/include/dt-bindings/clock/sun50i-a64-ccu.h +@@ -43,8 +43,10 @@ + #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ + #define _DT_BINDINGS_CLK_SUN50I_A64_H_ + ++#define CLK_PLL_VIDEO0 7 + #define CLK_PLL_PERIPH0 11 + ++#define CLK_CPUX 21 + #define CLK_BUS_MIPI_DSI 28 + #define CLK_BUS_CE 29 + #define CLK_BUS_DMA 30 +@@ -129,7 +131,7 @@ + #define CLK_AVS 109 + #define CLK_HDMI 110 + #define CLK_HDMI_DDC 111 +- ++#define CLK_MBUS 112 + #define CLK_DSI_DPHY 113 + #define CLK_GPU 114 + +-- +2.26.2 + +From 274dff055e80778277860f72a903c01ef33f87c7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:29:15 +0100 +Subject: [PATCH 2/8] dt-bindings: leds: sync leds common.h to linux from + 5.8-rc1 + +Sync the leds common.h to the latest Linux version. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/leds/common.h | 36 ++++++++++++++++++++++--------- + 1 file changed, 26 insertions(+), 10 deletions(-) + +diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h +index 9e1256a7c1..0ce7dfc00d 100644 +--- a/include/dt-bindings/leds/common.h ++++ b/include/dt-bindings/leds/common.h +@@ -6,6 +6,7 @@ + * Author: Jacek Anaszewski + * + * Copyright (C) 2019 Jacek Anaszewski ++ * Copyright (C) 2020 Pavel Machek + */ + + #ifndef __DT_BINDINGS_LEDS_H +@@ -32,16 +33,38 @@ + #define LED_COLOR_ID_MAX 8 + + /* Standard LED functions */ ++/* Keyboard LEDs, usually it would be input4::capslock etc. */ ++/* Obsolete equivalent: "shift-key-light" */ ++#define LED_FUNCTION_CAPSLOCK "capslock" ++#define LED_FUNCTION_SCROLLLOCK "scrolllock" ++#define LED_FUNCTION_NUMLOCK "numlock" ++/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), ++ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ ++#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" ++ ++/* System LEDs, usually found on system body. ++ platform::mute (etc) is sometimes seen, :mute would be better */ ++#define LED_FUNCTION_POWER "power" ++#define LED_FUNCTION_DISK "disk" ++ ++/* Obsolete: "platform:*:charging" (allwinner sun50i) */ ++#define LED_FUNCTION_CHARGING "charging" ++/* Used RGB notification LEDs common on phones. ++ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), ++ "lp5523:{r,g,b}" (Nokia N900) */ ++#define LED_FUNCTION_STATUS "status" ++ ++#define LED_FUNCTION_MICMUTE "micmute" ++#define LED_FUNCTION_MUTE "mute" ++ ++/* Miscelleaus functions. Use functions above if you can. */ + #define LED_FUNCTION_ACTIVITY "activity" + #define LED_FUNCTION_ALARM "alarm" + #define LED_FUNCTION_BACKLIGHT "backlight" + #define LED_FUNCTION_BLUETOOTH "bluetooth" + #define LED_FUNCTION_BOOT "boot" + #define LED_FUNCTION_CPU "cpu" +-#define LED_FUNCTION_CAPSLOCK "capslock" +-#define LED_FUNCTION_CHARGING "charging" + #define LED_FUNCTION_DEBUG "debug" +-#define LED_FUNCTION_DISK "disk" + #define LED_FUNCTION_DISK_ACTIVITY "disk-activity" + #define LED_FUNCTION_DISK_ERR "disk-err" + #define LED_FUNCTION_DISK_READ "disk-read" +@@ -50,21 +73,14 @@ + #define LED_FUNCTION_FLASH "flash" + #define LED_FUNCTION_HEARTBEAT "heartbeat" + #define LED_FUNCTION_INDICATOR "indicator" +-#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" + #define LED_FUNCTION_LAN "lan" + #define LED_FUNCTION_MAIL "mail" + #define LED_FUNCTION_MTD "mtd" +-#define LED_FUNCTION_MICMUTE "micmute" +-#define LED_FUNCTION_MUTE "mute" +-#define LED_FUNCTION_NUMLOCK "numlock" + #define LED_FUNCTION_PANIC "panic" + #define LED_FUNCTION_PROGRAMMING "programming" +-#define LED_FUNCTION_POWER "power" + #define LED_FUNCTION_RX "rx" + #define LED_FUNCTION_SD "sd" +-#define LED_FUNCTION_SCROLLLOCK "scrolllock" + #define LED_FUNCTION_STANDBY "standby" +-#define LED_FUNCTION_STATUS "status" + #define LED_FUNCTION_TORCH "torch" + #define LED_FUNCTION_TX "tx" + #define LED_FUNCTION_USB "usb" +-- +2.26.2 + +From 7010e7d2b19d2ded674e376855d2716b7cd421b7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 10 Jul 2020 12:46:11 +0100 +Subject: [PATCH 3/8] dt-bindings: clk/reset: sync updated bindings for + Allwinner DE2 display engine + +Sync the clock and reset bindings for the Allwinner DE2 display engine to Linux 5.8-rc1. + +Signed-off-by: Peter Robinson +--- + include/dt-bindings/clock/sun8i-de2.h | 3 +++ + include/dt-bindings/reset/sun8i-de2.h | 1 + + 2 files changed, 4 insertions(+) + +diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h +index 3bed63b524..7768f73b05 100644 +--- a/include/dt-bindings/clock/sun8i-de2.h ++++ b/include/dt-bindings/clock/sun8i-de2.h +@@ -15,4 +15,7 @@ + #define CLK_MIXER1 7 + #define CLK_WB 8 + ++#define CLK_BUS_ROT 9 ++#define CLK_ROT 10 ++ + #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ +diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h +index 9526017432..1c36a6ac86 100644 +--- a/include/dt-bindings/reset/sun8i-de2.h ++++ b/include/dt-bindings/reset/sun8i-de2.h +@@ -10,5 +10,6 @@ + #define RST_MIXER0 0 + #define RST_MIXER1 1 + #define RST_WB 2 ++#define RST_ROT 3 + + #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ +-- +2.26.2 + +From bdbf5f21343571af989754c908299854e81f44dd Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:24:41 +0100 +Subject: [PATCH 4/8] arm: dts: sync axp803.dtsi from linux 5.8-rc1 + +Sync the Allwinner axp803 device tree to the latest upstream Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi +index e5eae8bafc..10e9186a76 100644 +--- a/arch/arm/dts/axp803.dtsi ++++ b/arch/arm/dts/axp803.dtsi +@@ -1,44 +1,5 @@ +-/* +- * Copyright 2017 Icenowy Zheng +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright 2017 Icenowy Zheng + + /* + * AXP803 Integrated Power Management Chip +@@ -49,6 +10,39 @@ + interrupt-controller; + #interrupt-cells = <1>; + ++ ac_power_supply: ac-power-supply { ++ compatible = "x-powers,axp803-ac-power-supply", ++ "x-powers,axp813-ac-power-supply"; ++ status = "disabled"; ++ }; ++ ++ axp_adc: adc { ++ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; ++ #io-channel-cells = <1>; ++ }; ++ ++ axp_gpio: gpio { ++ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ gpio0_ldo: gpio0-ldo { ++ pins = "GPIO0"; ++ function = "ldo"; ++ }; ++ ++ gpio1_ldo: gpio1-ldo { ++ pins = "GPIO1"; ++ function = "ldo"; ++ }; ++ }; ++ ++ battery_power_supply: battery-power-supply { ++ compatible = "x-powers,axp803-battery-power-supply", ++ "x-powers,axp813-battery-power-supply"; ++ status = "disabled"; ++ }; ++ + regulators { + /* Default work frequency for buck regulators */ + x-powers,dcdc-freq = <3000>; +@@ -152,4 +146,10 @@ + status = "disabled"; + }; + }; ++ ++ usb_power_supply: usb-power-supply { ++ compatible = "x-powers,axp803-usb-power-supply", ++ "x-powers,axp813-usb-power-supply"; ++ status = "disabled"; ++ }; + }; +-- +2.26.2 + +From e0f7e9ce1a8a889bf7a1c5842700f0cb368bc81b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 9 Jul 2020 12:26:34 +0100 +Subject: [PATCH 5/8] arm: dts: Add new sun50i-a64-cpu-opp.dtsi from Linux + 5.8-rc1 + +Sync the Allwinner A64 CPU operating points dtsi from Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ + 1 file changed, 75 insertions(+) + create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi + +diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +new file mode 100644 +index 0000000000..578c37490d +--- /dev/null ++++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi +@@ -0,0 +1,75 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2020 Vasily khoruzhick ++ */ ++ ++/ { ++ cpu0_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ ++ opp-648000000 { ++ opp-hz = /bits/ 64 <648000000>; ++ opp-microvolt = <1040000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-816000000 { ++ opp-hz = /bits/ 64 <816000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-912000000 { ++ opp-hz = /bits/ 64 <912000000>; ++ opp-microvolt = <1120000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-960000000 { ++ opp-hz = /bits/ 64 <960000000>; ++ opp-microvolt = <1160000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1008000000 { ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt = <1200000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1240000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1104000000 { ++ opp-hz = /bits/ 64 <1104000000>; ++ opp-microvolt = <1260000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp-1152000000 { ++ opp-hz = /bits/ 64 <1152000000>; ++ opp-microvolt = <1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu1 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu2 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; ++ ++&cpu3 { ++ operating-points-v2 = <&cpu0_opp_table>; ++}; +-- +2.26.2 + +From b077a5962ba631e198d42c14516426b878c157eb Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 10 Jul 2020 12:39:21 +0100 +Subject: [PATCH 6/8] arm: dts: Sync the sun50i-a64.dtsi from Linux 5.8-rc1 + +Sync the Allwinner A64 sun50i-a64.dtsi from Linux. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++------- + 1 file changed, 434 insertions(+), 98 deletions(-) + +diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi +index ff41abc96a..8dfbcd1440 100644 +--- a/arch/arm/dts/sun50i-a64.dtsi ++++ b/arch/arm/dts/sun50i-a64.dtsi +@@ -1,46 +1,7 @@ +-/* +- * Copyright (C) 2016 ARM Ltd. +- * based on the Allwinner H3 dtsi: +- * Copyright (C) 2015 Jens Kuske +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2016 ARM Ltd. ++// based on the Allwinner H3 dtsi: ++// Copyright (C) 2015 Jens Kuske + + #include + #include +@@ -49,6 +10,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -84,35 +46,47 @@ + #size-cells = <0>; + + cpu0: cpu@0 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <1>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu2: cpu@2 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + cpu3: cpu@3 { +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; + next-level-cache = <&L2>; ++ clocks = <&ccu 21>; ++ clock-names = "cpu"; ++ #cooling-cells = <2>; + }; + + L2: l2-cache { +@@ -139,15 +113,16 @@ + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; +- clock-output-names = "osc32k"; ++ clock-output-names = "ext-osc32k"; + }; + +- iosc: internal-osc-clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <16000000>; +- clock-accuracy = <300000000>; +- clock-output-names = "iosc"; ++ pmu { ++ compatible = "arm,cortex-a53-pmu"; ++ interrupts = , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { +@@ -155,26 +130,33 @@ + method = "smc"; + }; + +- sound_spdif { ++ sound: sound { + compatible = "simple-audio-card"; +- simple-audio-card,name = "On-board SPDIF"; ++ simple-audio-card,name = "sun50i-a64-audio"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,frame-master = <&cpudai>; ++ simple-audio-card,bitclock-master = <&cpudai>; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,aux-devs = <&codec_analog>; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC"; ++ status = "disabled"; + +- simple-audio-card,cpu { +- sound-dai = <&spdif>; ++ cpudai: simple-audio-card,cpu { ++ sound-dai = <&dai>; + }; + +- simple-audio-card,codec { +- sound-dai = <&spdif_out>; ++ link_codec: simple-audio-card,codec { ++ sound-dai = <&codec>; + }; + }; + +- spdif_out: spdif-out { +- #sound-dai-cells = <0>; +- compatible = "linux,spdif-dit"; +- }; +- + timer { + compatible = "arm,armv8-timer"; ++ allwinner,erratum-unknown1; + interrupts = , + ; + }; + ++ thermal-zones { ++ cpu_thermal: cpu0-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 0>; ++ ++ cooling-maps { ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ ++ trips { ++ cpu_alert0: cpu_alert0 { ++ /* milliCelsius */ ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu_alert1: cpu_alert1 { ++ /* milliCelsius */ ++ temperature = <90000>; ++ hysteresis = <2000>; ++ type = "hot"; ++ }; ++ ++ cpu_crit: cpu_crit { ++ /* milliCelsius */ ++ temperature = <110000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ gpu0_thermal: gpu0-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 1>; ++ }; ++ ++ gpu1_thermal: gpu1-thermal { ++ /* milliseconds */ ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 2>; ++ }; ++ }; ++ + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + +- de2@1000000 { ++ bus@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de2_sram 1>; +@@ -201,16 +246,28 @@ + + display_clocks: clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; +- reg = <0x0 0x100000>; +- clocks = <&ccu CLK_DE>, +- <&ccu CLK_BUS_DE>; +- clock-names = "mod", +- "bus"; ++ reg = <0x0 0x10000>; ++ clocks = <&ccu CLK_BUS_DE>, ++ <&ccu CLK_DE>; ++ clock-names = "bus", ++ "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ++ rotate: rotate@20000 { ++ compatible = "allwinner,sun50i-a64-de2-rotate", ++ "allwinner,sun8i-a83t-de2-rotate"; ++ reg = <0x20000 0x10000>; ++ interrupts = ; ++ clocks = <&display_clocks CLK_BUS_ROT>, ++ <&display_clocks CLK_ROT>; ++ clock-names = "bus", ++ "mod"; ++ resets = <&display_clocks RST_ROT>; ++ }; ++ + mixer0: mixer@100000 { + compatible = "allwinner,sun50i-a64-de2-mixer-0"; + reg = <0x100000 0x100000>; +@@ -225,11 +282,19 @@ + #size-cells = <0>; + + mixer0_out: port@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <1>; + +- mixer0_out_tcon0: endpoint { ++ mixer0_out_tcon0: endpoint@0 { ++ reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; ++ ++ mixer0_out_tcon1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&tcon1_in_mixer0>; ++ }; + }; + }; + }; +@@ -248,9 +313,17 @@ + #size-cells = <0>; + + mixer1_out: port@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <1>; + +- mixer1_out_tcon1: endpoint { ++ mixer1_out_tcon0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&tcon0_in_mixer1>; ++ }; ++ ++ mixer1_out_tcon1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&tcon1_in_mixer1>; + }; + }; +@@ -259,8 +332,7 @@ + }; + + syscon: syscon@1c00000 { +- compatible = "allwinner,sun50i-a64-system-control", +- "syscon"; ++ compatible = "allwinner,sun50i-a64-system-control"; + reg = <0x01c00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; +@@ -278,6 +350,20 @@ + reg = <0x0000 0x28000>; + }; + }; ++ ++ sram_c1: sram@1d00000 { ++ compatible = "mmio-sram"; ++ reg = <0x01d00000 0x40000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x01d00000 0x40000>; ++ ++ ve_sram: sram-section@0 { ++ compatible = "allwinner,sun50i-a64-sram-c1", ++ "allwinner,sun4i-a10-sram-c1"; ++ reg = <0x000000 0x40000>; ++ }; ++ }; + }; + + dma: dma-controller@1c02000 { +@@ -299,6 +385,7 @@ + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; ++ #clock-cells = <0>; + resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + +@@ -315,12 +402,23 @@ + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; ++ ++ tcon0_in_mixer1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&mixer1_out_tcon0>; ++ }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; ++ ++ tcon0_out_dsi: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&dsi_in_tcon0>; ++ allwinner,tcon-channel = <1>; ++ }; + }; + }; + }; +@@ -340,9 +438,17 @@ + #size-cells = <0>; + + tcon1_in: port@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0>; + +- tcon1_in_mixer1: endpoint { ++ tcon1_in_mixer0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&mixer0_out_tcon1>; ++ }; ++ ++ tcon1_in_mixer1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&mixer1_out_tcon1>; + }; + }; +@@ -360,6 +466,17 @@ + }; + }; + ++ video-codec@1c0e000 { ++ compatible = "allwinner,sun50i-a64-video-engine"; ++ reg = <0x01c0e000 0x1000>; ++ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, ++ <&ccu CLK_DRAM_VE>; ++ clock-names = "ahb", "mod", "ram"; ++ resets = <&ccu RST_BUS_VE>; ++ interrupts = ; ++ allwinner,sram = <&ve_sram 1>; ++ }; ++ + mmc0: mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x01c0f000 0x1000>; +@@ -405,6 +522,31 @@ + sid: eeprom@1c14000 { + compatible = "allwinner,sun50i-a64-sid"; + reg = <0x1c14000 0x400>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ ths_calibration: thermal-sensor-calibration@34 { ++ reg = <0x34 0x8>; ++ }; ++ }; ++ ++ crypto: crypto@1c15000 { ++ compatible = "allwinner,sun50i-a64-crypto"; ++ reg = <0x01c15000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; ++ clock-names = "bus", "mod"; ++ resets = <&ccu RST_BUS_CE>; ++ }; ++ ++ msgbox: mailbox@1c17000 { ++ compatible = "allwinner,sun50i-a64-msgbox", ++ "allwinner,sun6i-a31-msgbox"; ++ reg = <0x01c17000 0x1000>; ++ clocks = <&ccu CLK_BUS_MSGBOX>; ++ resets = <&ccu RST_BUS_MSGBOX>; ++ interrupts = ; ++ #mbox-cells = <1>; + }; + + usb_otg: usb@1c19000 { +@@ -417,6 +559,7 @@ + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; ++ dr_mode = "otg"; + status = "disabled"; + }; + +@@ -491,7 +634,7 @@ + ccu: clock@1c20000 { + compatible = "allwinner,sun50i-a64-ccu"; + reg = <0x01c20000 0x400>; +- clocks = <&osc24M>, <&osc32k>; ++ clocks = <&osc24M>, <&rtc 0>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; +@@ -503,22 +646,50 @@ + interrupts = , + , + ; +- clocks = <&ccu 58>; ++ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; ++ clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + +- i2c0_pins: i2c0_pins { ++ csi_pins: csi-pins { ++ pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", ++ "PE7", "PE8", "PE9", "PE10", "PE11"; ++ function = "csi"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi_mclk_pin: csi-mclk-pin { ++ pins = "PE1"; ++ function = "csi"; ++ }; ++ ++ i2c0_pins: i2c0-pins { + pins = "PH0", "PH1"; + function = "i2c0"; + }; + +- i2c1_pins: i2c1_pins { ++ i2c1_pins: i2c1-pins { + pins = "PH2", "PH3"; + function = "i2c1"; + }; + ++ i2c2_pins: i2c2-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ ++ /omit-if-no-ref/ ++ lcd_rgb666_pins: lcd-rgb666-pins { ++ pins = "PD0", "PD1", "PD2", "PD3", "PD4", ++ "PD5", "PD6", "PD7", "PD8", "PD9", ++ "PD10", "PD11", "PD12", "PD13", ++ "PD14", "PD15", "PD16", "PD17", ++ "PD18", "PD19", "PD20", "PD21"; ++ function = "lcd0"; ++ }; ++ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; +@@ -551,19 +722,19 @@ + bias-pull-up; + }; + +- pwm_pin: pwm_pin { ++ pwm_pin: pwm-pin { + pins = "PD22"; + function = "pwm"; + }; + +- rmii_pins: rmii_pins { ++ rmii_pins: rmii-pins { + pins = "PD10", "PD11", "PD13", "PD14", "PD17", + "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + +- rgmii_pins: rgmii_pins { ++ rgmii_pins: rgmii-pins { + pins = "PD8", "PD9", "PD10", "PD11", "PD12", + "PD13", "PD15", "PD16", "PD17", "PD18", + "PD19", "PD20", "PD21", "PD22", "PD23"; +@@ -571,17 +742,17 @@ + drive-strength = <40>; + }; + +- spdif_tx_pin: spdif { ++ spdif_tx_pin: spdif-tx-pin { + pins = "PH8"; + function = "spdif"; + }; + +- spi0_pins: spi0 { ++ spi0_pins: spi0-pins { + pins = "PC0", "PC1", "PC2", "PC3"; + function = "spi0"; + }; + +- spi1_pins: spi1 { ++ spi1_pins: spi1-pins { + pins = "PD0", "PD1", "PD2", "PD3"; + function = "spi1"; + }; +@@ -591,12 +762,12 @@ + function = "uart0"; + }; + +- uart1_pins: uart1_pins { ++ uart1_pins: uart1-pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; + +- uart1_rts_cts_pins: uart1_rts_cts_pins { ++ uart1_rts_cts_pins: uart1-rts-cts-pins { + pins = "PG8", "PG9"; + function = "uart1"; + }; +@@ -638,6 +809,14 @@ + status = "disabled"; + }; + ++ lradc: lradc@1c21800 { ++ compatible = "allwinner,sun50i-a64-lradc", ++ "allwinner,sun8i-a83t-r-lradc"; ++ reg = <0x01c21800 0x400>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ + i2s0: i2s@1c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-i2s", +@@ -666,6 +845,41 @@ + status = "disabled"; + }; + ++ dai: dai@1c22c00 { ++ #sound-dai-cells = <0>; ++ compatible = "allwinner,sun50i-a64-codec-i2s"; ++ reg = <0x01c22c00 0x200>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; ++ clock-names = "apb", "mod"; ++ resets = <&ccu RST_BUS_CODEC>; ++ dmas = <&dma 15>, <&dma 15>; ++ dma-names = "rx", "tx"; ++ status = "disabled"; ++ }; ++ ++ codec: codec@1c22e00 { ++ #sound-dai-cells = <0>; ++ compatible = "allwinner,sun8i-a33-codec"; ++ reg = <0x01c22e00 0x600>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; ++ clock-names = "bus", "mod"; ++ status = "disabled"; ++ }; ++ ++ ths: thermal-sensor@1c25000 { ++ compatible = "allwinner,sun50i-a64-ths"; ++ reg = <0x01c25000 0x100>; ++ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; ++ clock-names = "bus", "mod"; ++ interrupts = ; ++ resets = <&ccu RST_BUS_THS>; ++ nvmem-cells = <&ths_calibration>; ++ nvmem-cell-names = "calibration"; ++ #thermal-sensor-cells = <1>; ++ }; ++ + uart0: serial@1c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; +@@ -727,6 +941,8 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -738,6 +954,8 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -749,12 +967,13 @@ + interrupts = ; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + +- + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +@@ -808,6 +1027,28 @@ + }; + }; + ++ mali: gpu@1c40000 { ++ compatible = "allwinner,sun50i-a64-mali", "arm,mali-400"; ++ reg = <0x01c40000 0x10000>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ ; ++ interrupt-names = "gp", ++ "gpmmu", ++ "pp0", ++ "ppmmu0", ++ "pp1", ++ "ppmmu1", ++ "pmu"; ++ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; ++ clock-names = "bus", "core"; ++ resets = <&ccu RST_BUS_GPU>; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, +@@ -830,6 +1071,75 @@ + status = "disabled"; + }; + ++ mbus: dram-controller@1c62000 { ++ compatible = "allwinner,sun50i-a64-mbus"; ++ reg = <0x01c62000 0x1000>; ++ clocks = <&ccu 112>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ dma-ranges = <0x00000000 0x40000000 0xc0000000>; ++ #interconnect-cells = <1>; ++ }; ++ ++ csi: csi@1cb0000 { ++ compatible = "allwinner,sun50i-a64-csi"; ++ reg = <0x01cb0000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CSI>, ++ <&ccu CLK_CSI_SCLK>, ++ <&ccu CLK_DRAM_CSI>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_CSI>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_pins>; ++ status = "disabled"; ++ }; ++ ++ dsi: dsi@1ca0000 { ++ compatible = "allwinner,sun50i-a64-mipi-dsi"; ++ reg = <0x01ca0000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_MIPI_DSI>; ++ resets = <&ccu RST_BUS_MIPI_DSI>; ++ phys = <&dphy>; ++ phy-names = "dphy"; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port { ++ dsi_in_tcon0: endpoint { ++ remote-endpoint = <&tcon0_out_dsi>; ++ }; ++ }; ++ }; ++ ++ dphy: d-phy@1ca1000 { ++ compatible = "allwinner,sun50i-a64-mipi-dphy", ++ "allwinner,sun6i-a31-mipi-dphy"; ++ reg = <0x01ca1000 0x1000>; ++ clocks = <&ccu CLK_BUS_MIPI_DSI>, ++ <&ccu CLK_DSI_DPHY>; ++ clock-names = "bus", "mod"; ++ resets = <&ccu RST_BUS_MIPI_DSI>; ++ status = "disabled"; ++ #phy-cells = <0>; ++ }; ++ ++ deinterlace: deinterlace@1e00000 { ++ compatible = "allwinner,sun50i-a64-deinterlace", ++ "allwinner,sun8i-h3-deinterlace"; ++ reg = <0x01e00000 0x20000>; ++ clocks = <&ccu CLK_BUS_DEINTERLACE>, ++ <&ccu CLK_DEINTERLACE>, ++ <&ccu CLK_DRAM_DEINTERLACE>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_DEINTERLACE>; ++ interrupts = ; ++ interconnects = <&mbus 9>; ++ interconnect-names = "dma-mem"; ++ }; ++ + hdmi: hdmi@1ee0000 { + compatible = "allwinner,sun50i-a64-dw-hdmi", + "allwinner,sun8i-a83t-dw-hdmi"; +@@ -842,7 +1152,7 @@ + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; +- phy-names = "hdmi-phy"; ++ phy-names = "phy"; + status = "disabled"; + + ports { +@@ -867,7 +1177,7 @@ + compatible = "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x01ef0000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, +- <&ccu 7>; ++ <&ccu CLK_PLL_VIDEO0>; + clock-names = "bus", "mod", "pll-0"; + resets = <&ccu RST_BUS_HDMI0>; + reset-names = "phy"; +@@ -875,11 +1185,12 @@ + }; + + rtc: rtc@1f00000 { +- compatible = "allwinner,sun6i-a31-rtc"; +- reg = <0x01f00000 0x54>; ++ compatible = "allwinner,sun50i-a64-rtc", ++ "allwinner,sun8i-h3-rtc"; ++ reg = <0x01f00000 0x400>; + interrupts = , + ; +- clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; ++ clock-output-names = "osc32k", "osc32k-out", "iosc"; + clocks = <&osc32k>; + #clock-cells = <1>; + }; +@@ -896,13 +1207,19 @@ + r_ccu: clock@1f01400 { + compatible = "allwinner,sun50i-a64-r-ccu"; + reg = <0x01f01400 0x100>; +- clocks = <&osc24M>, <&osc32k>, <&iosc>, +- <&ccu 11>; ++ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, ++ <&ccu CLK_PLL_PERIPH0>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ++ codec_analog: codec-analog@1f015c0 { ++ compatible = "allwinner,sun50i-a64-codec-analog"; ++ reg = <0x01f015c0 0x4>; ++ status = "disabled"; ++ }; ++ + r_i2c: i2c@1f02400 { + compatible = "allwinner,sun50i-a64-i2c", + "allwinner,sun6i-a31-i2c"; +@@ -915,6 +1232,19 @@ + #size-cells = <0>; + }; + ++ r_ir: ir@1f02000 { ++ compatible = "allwinner,sun50i-a64-ir", ++ "allwinner,sun6i-a31-ir"; ++ reg = <0x01f02000 0x400>; ++ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; ++ clock-names = "apb", "ir"; ++ resets = <&r_ccu RST_APB0_IR>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_ir_rx_pin>; ++ status = "disabled"; ++ }; ++ + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun50i-a64-pwm", + "allwinner,sun5i-a13-pwm"; +@@ -942,12 +1272,17 @@ + function = "s_i2c"; + }; + +- r_pwm_pin: pwm { ++ r_ir_rx_pin: r-ir-rx-pin { ++ pins = "PL11"; ++ function = "s_cir_rx"; ++ }; ++ ++ r_pwm_pin: r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + }; + +- r_rsb_pins: rsb { ++ r_rsb_pins: r-rsb-pins { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; +@@ -972,6 +1307,7 @@ + "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = ; ++ clocks = <&osc24M>; + }; + }; + }; +-- +2.26.2 diff --git a/PinePhone-automatic-device-tree-selection.patch b/PinePhone-automatic-device-tree-selection.patch deleted file mode 100644 index ac2bac4..0000000 --- a/PinePhone-automatic-device-tree-selection.patch +++ /dev/null @@ -1,1114 +0,0 @@ -From patchwork Thu Sep 3 05:07:09 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356315 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 3 Sep 2020 01:07:17 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 1/8] sunxi: board: Use a more descriptive variable name -Date: Thu, 3 Sep 2020 00:07:09 -0500 -Message-Id: <20200903050716.48488-2-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -The variable "cmp_str" always leaves me wondering if it is the DT name -of the current board (yes) or DT name in the FIT config entry (no). - -In preparation for expanding the functionality here, rename it to -something that obviously means "this is the DT name we are looking for". - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 71e2b758a3e..674e6816d2d 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -892,14 +892,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) - int board_fit_config_name_match(const char *name) - { - struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -- const char *cmp_str = (const char *)spl; -+ const char *best_dt_name = (const char *)spl; - - /* Check if there is a DT name stored in the SPL header and use that. */ - if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { -- cmp_str += spl->dt_name_offset; -+ best_dt_name += spl->dt_name_offset; - } else { - #ifdef CONFIG_DEFAULT_DEVICE_TREE -- cmp_str = CONFIG_DEFAULT_DEVICE_TREE; -+ best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; - #else - return 0; - #endif -@@ -907,15 +907,15 @@ int board_fit_config_name_match(const char *name) - - #ifdef CONFIG_PINE64_DT_SELECTION - /* Differentiate the two Pine64 board DTs by their DRAM size. */ -- if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { -+ if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { - if ((gd->ram_size > 512 * 1024 * 1024)) - return !strstr(name, "plus"); - else - return !!strstr(name, "plus"); - } else { -- return strcmp(name, cmp_str); -+ return strcmp(name, best_dt_name); - } - #endif -- return strcmp(name, cmp_str); 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 2/8] sunxi: board: Add a helper to get the SPL DT name -Date: Thu, 3 Sep 2020 00:07:10 -0500 -Message-Id: <20200903050716.48488-3-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -This moves the validity checking and typecasts all to one place away -from the string comparison logic, and it detangles the compile-time -and runtime control flow. - -The new helper will also be used by U-Boot proper in a future commit. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 26 +++++++++++++++++--------- - 1 file changed, 17 insertions(+), 9 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 674e6816d2d..5c9b811f27a 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -319,6 +319,17 @@ static struct boot_file_head * get_spl_header(uint8_t req_version) - return spl; - } - -+static const char *get_spl_dt_name(void) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -+ -+ /* Check if there is a DT name stored in the SPL header. */ -+ if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) -+ return (char *)spl + spl->dt_name_offset; -+ -+ return NULL; -+} -+ - int dram_init(void) - { - struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); -@@ -891,20 +902,17 @@ int ft_board_setup(void *blob, struct bd_info *bd) - #ifdef CONFIG_SPL_LOAD_FIT - int board_fit_config_name_match(const char *name) - { -- struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -- const char *best_dt_name = (const char *)spl; -+ const char *best_dt_name = get_spl_dt_name(); - -- /* Check if there is a DT name stored in the SPL header and use that. */ -- if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { -- best_dt_name += spl->dt_name_offset; -- } else { - #ifdef CONFIG_DEFAULT_DEVICE_TREE -+ if (best_dt_name == NULL) - best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; --#else -- return 0; - #endif -- }; - -+ if (best_dt_name == NULL) { -+ /* No DT name was provided, so accept the first config. */ -+ return 0; -+ } - #ifdef CONFIG_PINE64_DT_SELECTION - /* Differentiate the two Pine64 board DTs by their DRAM size. */ - if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { - -From patchwork Thu Sep 3 05:07:11 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356311 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=sholland.org -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 3/8] sunxi: board: Simplify Pine A64 DT selection logic -Date: Thu, 3 Sep 2020 00:07:11 -0500 -Message-Id: <20200903050716.48488-4-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -Instead of using an entirely separate matching algorithm, simply update -the name of the DT we want to match. Enabling this logic does not depend -on the FIT config name, only on the initial guess of the board name. - -Importantly, the initial guess must be "sun50i-a64-pine64-plus", because -otherwise the logic would trigger when "sun50i-a64-pine64-lts" was -written to the SPL header. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 12 ++++-------- - 1 file changed, 4 insertions(+), 8 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 5c9b811f27a..fb0d5bf4743 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -914,14 +914,10 @@ int board_fit_config_name_match(const char *name) - return 0; - } - #ifdef CONFIG_PINE64_DT_SELECTION --/* Differentiate the two Pine64 board DTs by their DRAM size. */ -- if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { -- if ((gd->ram_size > 512 * 1024 * 1024)) -- return !strstr(name, "plus"); -- else -- return !!strstr(name, "plus"); -- } else { -- return strcmp(name, best_dt_name); -+ else if (strstr(best_dt_name, "-pine64-plus")) { -+ /* Differentiate the Pine A64 boards by their DRAM size. */ -+ if ((gd->ram_size == 512 * 1024 * 1024)) -+ best_dt_name = "sun50i-a64-pine64"; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 4/8] sunxi: board: Add PinePhone DT selection logic -Date: Thu, 3 Sep 2020 00:07:12 -0500 -Message-Id: <20200903050716.48488-5-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -There are two different publicly-released revisions of the PinePhone -hardware, versions 1.1 and 1.2; and they need different device trees. -Since some GPIO pins were rerouted, we can use that to distinguish -between them. - -Signed-off-by: Samuel Holland ---- - arch/arm/mach-sunxi/Kconfig | 7 +++++++ - board/sunxi/board.c | 21 +++++++++++++++++++++ - 2 files changed, 28 insertions(+) - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index be0822bfb7d..8421f3b6854 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -1010,4 +1010,11 @@ config PINE64_DT_SELECTION - option, the device tree selection code specific to Pine64 which - utilizes the DRAM size will be enabled. - -+config PINEPHONE_DT_SELECTION -+ bool "Enable PinePhone device tree selection code" -+ depends on MACH_SUN50I -+ help -+ Enable this option to automatically select the device tree for the -+ correct PinePhone hardware revision during boot. -+ - endif -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index fb0d5bf4743..3d64ed18664 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -920,6 +921,26 @@ int board_fit_config_name_match(const char *name) - best_dt_name = "sun50i-a64-pine64"; - } - #endif -+#ifdef CONFIG_PINEPHONE_DT_SELECTION -+ else if (strstr(best_dt_name, "-pinephone")) { -+ /* Differentiate the PinePhone revisions by GPIO inputs. */ -+ prcm_apb0_enable(PRCM_APB0_GATE_PIO); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP); -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT); -+ udelay(100); -+ -+ /* PL6 is pulled low by the modem on v1.2. */ -+ if (gpio_get_value(SUNXI_GPL(6)) == 0) -+ best_dt_name = "sun50i-a64-pinephone-1.2"; -+ else -+ best_dt_name = "sun50i-a64-pinephone-1.1"; -+ -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE); -+ prcm_apb0_disable(PRCM_APB0_GATE_PIO); -+ } -+#endif -+ - return strcmp(name, best_dt_name); - } - #endif - -From patchwork Thu Sep 3 05:07:13 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356314 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 5/8] sunxi: board: Save the chosen DT name in the SPL header -Date: Thu, 3 Sep 2020 00:07:13 -0500 -Message-Id: <20200903050716.48488-6-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -This overwrites the name loaded from the SPL image. It will be different -if there was previously no name provided, or if a more accurate name was -determined by the board variant selection logic. This means that the DT -name in the SPL header now always matches the DT appended to U-Boot. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 27 ++++++++++++++++++++++++++- - 1 file changed, 26 insertions(+), 1 deletion(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 3d64ed18664..eaa40a1ea96 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -331,6 +331,21 @@ static const char *get_spl_dt_name(void) - return NULL; - } - -+static void set_spl_dt_name(const char *name) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); -+ -+ if (spl == INVALID_SPL_HEADER) -+ return; -+ -+ /* Promote the header version for U-Boot proper, if needed. */ -+ if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION) -+ spl->spl_signature[3] = SPL_DT_HEADER_VERSION; -+ -+ strcpy((char *)&spl->string_pool, name); -+ spl->dt_name_offset = offsetof(struct boot_file_head, string_pool); -+} -+ - int dram_init(void) - { - struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); -@@ -904,6 +919,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) - int board_fit_config_name_match(const char *name) - { - const char *best_dt_name = get_spl_dt_name(); -+ int ret; - - #ifdef CONFIG_DEFAULT_DEVICE_TREE - if (best_dt_name == NULL) -@@ -941,6 +957,15 @@ int board_fit_config_name_match(const char *name) - } - #endif - -- return strcmp(name, best_dt_name); -+ ret = strcmp(name, best_dt_name); -+ -+ /* -+ * If one of the FIT configurations matches the most accurate DT name, -+ * update the SPL header to provide that DT name to U-Boot proper. -+ */ -+ if (ret == 0) -+ set_spl_dt_name(best_dt_name); -+ -+ return ret; - } - #endif - -From patchwork Thu Sep 3 05:07:14 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356313 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 3 Sep 2020 01:07:19 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 6/8] sunxi: board: Set fdtfile to match the DT chosen by SPL -Date: Thu, 3 Sep 2020 00:07:14 -0500 -Message-Id: <20200903050716.48488-7-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. -This meant that, regardless of the DT chosen by SPL (either by changing -the header in the image or by the selection code at runtime), Linux -always used the default DT. - -By using the name from the SPL header (which, because of the previous -commit, always matches the DT used by U-Boot proper), Linux also sees -the same board as U-Boot/SPL, even if the boot script later loads a DT -from disk. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index eaa40a1ea96..5457b28e135 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -870,6 +870,7 @@ static void setup_environment(const void *fdt) - - int misc_init_r(void) - { -+ const char *spl_dt_name; - uint boot; - - env_set("fel_booted", NULL); -@@ -888,6 +889,16 @@ int misc_init_r(void) - env_set("mmc_bootdev", "1"); - } - -+ /* Set fdtfile to match the FIT configuration chosen in SPL. */ -+ spl_dt_name = get_spl_dt_name(); -+ if (spl_dt_name) { -+ char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : ""; -+ char str[64]; -+ -+ snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name); -+ env_set("fdtfile", str); -+ } -+ - setup_environment(gd->fdt_blob); - - #ifdef CONFIG_USB_ETHER - diff --git a/uboot-tools.spec b/uboot-tools.spec index c119c66..2c78421 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -27,7 +27,7 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # AllWinner improvements -Patch8: PinePhone-automatic-device-tree-selection.patch +Patch8: AllWinner-UpstreamSync.patch Patch9: AllWinner-PinePhone.patch Patch10: AllWinner-PineTab.patch # Rockchips improvements From 651347517010c0240afbb769f847fbdbba728f4c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 22 Sep 2020 12:52:02 +0100 Subject: [PATCH 100/351] 2020.10 RC5 --- 0001-Fix-BeagleAI-detection.patch | 29 +++++++++++++++++++++++++++++ arm-boards | 1 + sources | 2 +- uboot-tools.spec | 9 +++++++-- 4 files changed, 38 insertions(+), 3 deletions(-) create mode 100644 0001-Fix-BeagleAI-detection.patch diff --git a/0001-Fix-BeagleAI-detection.patch b/0001-Fix-BeagleAI-detection.patch new file mode 100644 index 0000000..dfd96cc --- /dev/null +++ b/0001-Fix-BeagleAI-detection.patch @@ -0,0 +1,29 @@ +From 1849ef423238aeb1732eb3b8e67eb46bc21401c7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 10 Sep 2020 14:24:12 +0100 +Subject: [PATCH] Fix BeagleAI detection + +Signed-off-by: Peter Robinson +--- + board/ti/am57xx/board.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c +index 7809875510..3232812a97 100644 +--- a/board/ti/am57xx/board.c ++++ b/board/ti/am57xx/board.c +@@ -527,8 +527,10 @@ void do_board_detect(void) + + rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS); +- if (rc) ++ if (rc) { + printf("ti_i2c_eeprom_init failed %d\n", rc); ++ ti_i2c_eeprom_am_set("BBONE-AI", "A"); ++ } + + #ifdef CONFIG_SUPPORT_EMMC_BOOT + rc = board_bootmode_has_emmc(); +-- +2.26.2 + diff --git a/arm-boards b/arm-boards index 46524ad..b73f726 100644 --- a/arm-boards +++ b/arm-boards @@ -121,6 +121,7 @@ Sinlinx_SinA31s Sinovoip_BPI_M2 Sinovoip_BPI_M3 stih410-b2260 +stm32mp15_basic sunxi_Gemei_G9 tbs_a711 tinker-rk3288 diff --git a/sources b/sources index 9cdc2e2..6548dda 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.10-rc4.tar.bz2) = ba944bf9cbd8285de6fd4c2e67c2411eda6c504e87720854b36fbcd290927dabb25deee28302e8b81a982f41d29d4ddf908d4891c4f5b2bda4324a0191eb701d +SHA512 (u-boot-2020.10-rc5.tar.bz2) = 8c0f6cceca4aeb67a51743886d65e420d95a70cc427acd17ac81281cad996339a9b376994ff76e46cb862d54797269da52dd05dfc7e12c8c271ed7aca828e2b4 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2c78421..a51a705 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2020.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -33,6 +33,8 @@ Patch10: AllWinner-PineTab.patch # Rockchips improvements Patch11: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch12: rockchip-Rock960-Fix-up-USB-support.patch +# TI fixes +Patch13: 0001-Fix-BeagleAI-detection.patch BuildRequires: bc BuildRequires: dtc @@ -246,6 +248,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Sep 22 2020 Peter Robinson - 2020.10-0.5.rc5 +- Update to 2020.10 RC5 + * Wed Sep 09 2020 Peter Robinson - 2020.10-0.4.rc4 - Update to 2020.10 RC4 From 003e91fbfc1fac6928e2f1fb52fc5881178c6f74 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 27 Sep 2020 17:20:39 +0100 Subject: [PATCH 101/351] Initial support for display output on Pinebook Pro --- rk3399-Pinebook-pro-EDP-support.patch | 1027 +++++++++++++++++++++++++ rk3399-reset-display-hack.patch | 46 ++ uboot-tools.spec | 9 +- 3 files changed, 1080 insertions(+), 2 deletions(-) create mode 100644 rk3399-Pinebook-pro-EDP-support.patch create mode 100644 rk3399-reset-display-hack.patch diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch new file mode 100644 index 0000000..e04b62d --- /dev/null +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -0,0 +1,1027 @@ +From patchwork Fri Sep 25 18:36:55 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371525 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4BygrL4fh7z9sS8 + for ; Sat, 26 Sep 2020 04:47:14 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 1DE9D823F2; + Fri, 25 Sep 2020 20:46:51 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 7FF818240A; Fri, 25 Sep 2020 20:46:47 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 60178823ED + for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 21266180A8C; Fri, 25 Sep 2020 20:46:42 +0200 (CEST) +Message-ID: <20200925183856.346332079@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:36:55 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 1/8] RFC: drivers/video/rockchip/rk_vop.c: Use endpoint + compatible string to find VOP mode +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The current code is using an hard coded enum and the of node reg value of +endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order +is different between rk3288, rk3399 vop little, rk3399 vop big. + +A possible solution would be to make sure that the rk3288.dtsi and +rk3399.dtsi files have "expected" reg value or an other solution is +to find the kind of endpoint by comparing the endpoint compatible value. + +This patch is implementing the more flexible second solution. + +Signed-off-by: Arnaud Patard + +Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +=================================================================== +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/vop_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +@@ -85,26 +85,13 @@ enum { + LB_RGB_1280X8 = 0x5 + }; + +-#if defined(CONFIG_ROCKCHIP_RK3399) + enum vop_modes { + VOP_MODE_EDP = 0, + VOP_MODE_MIPI, + VOP_MODE_HDMI, +- VOP_MODE_MIPI1, +- VOP_MODE_DP, +- VOP_MODE_NONE, +-}; +-#else +-enum vop_modes { +- VOP_MODE_EDP = 0, +- VOP_MODE_HDMI, + VOP_MODE_LVDS, +- VOP_MODE_MIPI, +- VOP_MODE_NONE, +- VOP_MODE_AUTO_DETECT, +- VOP_MODE_UNKNOWN, ++ VOP_MODE_DP, + }; +-#endif + + /* VOP_VERSION_INFO */ + #define M_FPGA_VERSION (0xffff << 16) +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -235,12 +235,11 @@ static int rk_display_init(struct udevic + struct clk clk; + enum video_log2_bpp l2bpp; + ofnode remote; ++ const char *compat; + + debug("%s(%s, %lu, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); + +- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); +- debug("vop_id=%d\n", vop_id); + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); + if (ret) + return ret; +@@ -282,6 +281,28 @@ static int rk_display_init(struct udevic + if (disp) + break; + }; ++ compat = ofnode_get_property(remote, "compatible", NULL); ++ if (!compat) { ++ debug("%s(%s): Failed to find compatible property\n", ++ __func__, dev_read_name(dev)); ++ return -EINVAL; ++ } ++ if (strstr(compat, "edp")) { ++ vop_id = VOP_MODE_EDP; ++ } else if (strstr(compat, "mipi")) { ++ vop_id = VOP_MODE_MIPI; ++ } else if (strstr(compat, "hdmi")) { ++ vop_id = VOP_MODE_HDMI; ++ } else if (strstr(compat, "cdn-dp")) { ++ vop_id = VOP_MODE_DP; ++ } else if (strstr(compat, "lvds")) { ++ vop_id = VOP_MODE_LVDS; ++ } else { ++ debug("%s(%s): Failed to find vop mode for %s\n", ++ __func__, dev_read_name(dev), compat); ++ return -EINVAL; ++ } ++ debug("vop_id=%d\n", vop_id); + + disp_uc_plat = dev_get_uclass_platdata(disp); + debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); + +From patchwork Fri Sep 25 18:36:56 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371530 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Fri, 25 Sep 2020 20:46:44 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 0B30218054F; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.398231733@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:36:56 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 2/8] RFC: drivers/video/rockchip/rk_edp.c: Add rk3399 support +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP +support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 +eDP IPs are nearly the same, the difference is in the grf register +(SOC_CON6 versus SOC_CON20). So, change the code to use the right +register on each IP. + +The clocks don't seem to be the same, the eDP clock is not at index 1 +on rk3399, so don't try changing the clock at index 1 to rate 0 on +rk3399. + +Signed-off-by: Arnaud Patard + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -17,11 +17,10 @@ + #include + #include + #include ++#include + #include + #include +-#include +-#include +-#include ++#include + + #define MAX_CR_LOOP 5 + #define MAX_EQ_LOOP 5 +@@ -37,18 +36,42 @@ static const char * const pre_emph_names + #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 + #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 + ++#define RK3288_GRF_SOC_CON6 0x025c ++#define RK3288_GRF_SOC_CON12 0x0274 ++#define RK3399_GRF_SOC_CON20 0x6250 ++#define RK3399_GRF_SOC_CON25 0x6264 ++ ++enum rockchip_dp_types { ++ RK3288_DP = 0, ++ RK3399_EDP ++}; ++ ++struct rockchip_dp_data { ++ unsigned long reg_vop_big_little; ++ unsigned long reg_vop_big_little_sel; ++ unsigned long reg_ref_clk_sel; ++ unsigned long ref_clk_sel_bit; ++ enum rockchip_dp_types chip_type; ++}; ++ + struct rk_edp_priv { + struct rk3288_edp *regs; +- struct rk3288_grf *grf; ++ void *grf; + struct udevice *panel; + struct link_train link_train; + u8 train_set[4]; + }; + +-static void rk_edp_init_refclk(struct rk3288_edp *regs) ++static void rk_edp_init_refclk(struct rk3288_edp *regs, enum rockchip_dp_types chip_type) + { + writel(SEL_24M, ®s->analog_ctl_2); +- writel(REF_CLK_24M, ®s->pll_reg_1); ++ u32 reg; ++ ++ reg = REF_CLK_24M; ++ if (chip_type == RK3288_DP) ++ reg ^= REF_CLK_MASK; ++ writel(reg, ®s->pll_reg_1); ++ + + writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | + V2L_CUR_SEL_1MA, ®s->pll_reg_2); +@@ -1023,6 +1046,8 @@ static int rk_edp_probe(struct udevice * + struct display_plat *uc_plat = dev_get_uclass_platdata(dev); + struct rk_edp_priv *priv = dev_get_priv(dev); + struct rk3288_edp *regs = priv->regs; ++ struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); ++ + struct clk clk; + int ret; + +@@ -1037,16 +1062,17 @@ static int rk_edp_probe(struct udevice * + int vop_id = uc_plat->source_id; + debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + +- ret = clk_get_by_index(dev, 1, &clk); +- if (ret >= 0) { +- ret = clk_set_rate(&clk, 0); +- clk_free(&clk); +- } +- if (ret) { +- debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); +- return ret; ++ if (edp_data->chip_type == RK3288_DP) { ++ ret = clk_get_by_index(dev, 1, &clk); ++ if (ret >= 0) { ++ ret = clk_set_rate(&clk, 0); ++ clk_free(&clk); ++ } ++ if (ret) { ++ debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); ++ return ret; ++ } + } +- + ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); + if (ret >= 0) { + ret = clk_set_rate(&clk, 192000000); +@@ -1059,15 +1085,17 @@ static int rk_edp_probe(struct udevice * + } + + /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ +- rk_setreg(&priv->grf->soc_con12, 1 << 4); ++ rk_setreg(priv->grf + edp_data->reg_ref_clk_sel, ++ edp_data->ref_clk_sel_bit); + + /* select epd signal from vop0 or vop1 */ +- rk_clrsetreg(&priv->grf->soc_con6, (1 << 5), +- (vop_id == 1) ? (1 << 5) : (0 << 5)); ++ rk_clrsetreg(priv->grf + edp_data->reg_vop_big_little, ++ edp_data->reg_vop_big_little_sel, ++ (vop_id == 1) ? edp_data->reg_vop_big_little_sel : 0); + + rockchip_edp_wait_hpd(priv); + +- rk_edp_init_refclk(regs); ++ rk_edp_init_refclk(regs, edp_data->chip_type); + rk_edp_init_interrupt(regs); + rk_edp_enable_sw_function(regs); + ret = rk_edp_init_analog_func(regs); +@@ -1083,8 +1111,25 @@ static const struct dm_display_ops dp_ro + .enable = rk_edp_enable, + }; + ++static const struct rockchip_dp_data rk3399_edp = { ++ .reg_vop_big_little = RK3399_GRF_SOC_CON20, ++ .reg_vop_big_little_sel = BIT(5), ++ .reg_ref_clk_sel = RK3399_GRF_SOC_CON25, ++ .ref_clk_sel_bit = BIT(11), ++ .chip_type = RK3399_EDP, ++}; ++ ++static const struct rockchip_dp_data rk3288_dp = { ++ .reg_vop_big_little = RK3288_GRF_SOC_CON6, ++ .reg_vop_big_little_sel = BIT(5), ++ .reg_ref_clk_sel = RK3288_GRF_SOC_CON12, ++ .ref_clk_sel_bit = BIT(4), ++ .chip_type = RK3288_DP, ++}; ++ + static const struct udevice_id rockchip_dp_ids[] = { +- { .compatible = "rockchip,rk3288-edp" }, ++ { .compatible = "rockchip,rk3288-edp", .data = (ulong)&rk3288_dp }, ++ { .compatible = "rockchip,rk3399-edp", .data = (ulong)&rk3399_edp }, + { } + }; + +Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +=================================================================== +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 + #define PD_CH0 (0x1 << 0) + + /* pll_reg_1 */ +-#define REF_CLK_24M (0x1 << 1) +-#define REF_CLK_27M (0x0 << 1) ++#define REF_CLK_24M (0x1 << 0) ++#define REF_CLK_27M (0x0 << 0) ++#define REF_CLK_MASK (0x1 << 0) + + /* line_map */ + #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) + +From patchwork Fri Sep 25 18:36:57 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371528 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Bygrs3CVDz9sSJ + for ; Sat, 26 Sep 2020 04:47:41 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id A6BF7824BB; + Fri, 25 Sep 2020 20:47:04 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id A050F82499; Fri, 25 Sep 2020 20:46:50 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 8F65D823F0 + for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 3BBA4180A6C; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.447902421@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:36:57 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 3/8] RFC: drivers/video/rockchip/rk_edp.c: Change interrupt + polarity configuration +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The linux code is setting polarity configuration to 3 but +uboot code is setting it to 1. Change the configuration to match the +linux configuration + +Signed-off-by: Arnaud Patard + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -100,10 +100,13 @@ static void rk_edp_init_refclk(struct rk + ®s->dp_reserv2); + } + ++#define INT_POL1 (0x1 << 1) ++#define INT_POL0 (0x1 << 0) ++ + static void rk_edp_init_interrupt(struct rk3288_edp *regs) + { + /* Set interrupt pin assertion polarity as high */ +- writel(INT_POL, ®s->int_ctl); ++ writel(INT_POL0 | INT_POL1, ®s->int_ctl); + + /* Clear pending registers */ + writel(0xff, ®s->common_int_sta_1); + +From patchwork Fri Sep 25 18:36:58 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371526 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Fri, 25 Sep 2020 20:46:50 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 8FB9B823F2 + for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 4C3F8180AAC; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.497901419@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:36:58 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 4/8] RFC: drivers/video/rockchip/rk_edp.c: Change clock rate +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The current code is setting the clock rate to 192000000, but +due to the current device-tree configuration and linux code, +it should rather be 100000000. + +Signed-off-by: Arnaud Patard + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -1075,7 +1078,7 @@ static int rk_edp_probe(struct udevice * + } + ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); + if (ret >= 0) { +- ret = clk_set_rate(&clk, 192000000); ++ ret = clk_set_rate(&clk, 100000000); + clk_free(&clk); + } + if (ret < 0) { + +From patchwork Fri Sep 25 18:36:59 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371529 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Bygs45XdNz9sS8 + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 6D075180ABF; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.548086571@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:36:59 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 5/8] RFC: drivers/video/rockchip/rk_vop.c: Reserve efi fb + memory +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +When booting with EFI and graphics, the memory used for framebuffer +has to be reserved, otherwise it may leads to kernel memory +overwrite. + +Signed-off-by: Arnaud Patard + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -20,6 +20,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -394,6 +396,13 @@ int rk_vop_probe(struct udevice *dev) + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + ++ plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; ++ ++#if defined(CONFIG_EFI_LOADER) ++ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); ++ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); ++#endif ++ + priv->regs = (struct rk3288_vop *)dev_read_addr(dev); + + /* + +From patchwork Fri Sep 25 18:37:00 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371527 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Bygrg0YBjz9sS8 + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 81B21180AC6; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.598156739@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:37:00 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 6/8] RFC: rk3399-pinebook-pro-u-boot.dtsi: Enable edp +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +- uboot rockchip edp code is looking for a rockchip,panel property + for the edp dts node, so add it. + +Signed-off-by: Arnaud Patard + +Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +=================================================================== +--- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -49,3 +49,7 @@ + &vdd_log { + regulator-init-microvolt = <950000>; + }; ++ ++&edp { ++ rockchip,panel = <&edp_panel>; ++}; + +From patchwork Fri Sep 25 18:37:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371532 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Bygsg53Gnz9sSJ + for ; Sat, 26 Sep 2020 04:48:23 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id C15BF82513; + Fri, 25 Sep 2020 20:47:13 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 4F0DE8247A; Fri, 25 Sep 2020 20:46:53 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id EFE03823FF + for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 9A94A180ACB; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.648221737@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:37:01 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 7/8] RFC: configs/pinebook-pro-rk3399_defconfig: enable + SYS_USB_EVENT_POLL_VIA_INT_QUEUE +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The default configuration will use SYS_USB_EVENT_POLL for handling the +usb keyboard and it makes the system really slow (eg slow keypress, +loading kernel/initrd from grub-efi is taking ages). + +Using CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE seems to be improving +things a lot, so use it. + +Tested-by: Samuel Dionne-Riel +Signed-off-by: Arnaud Patard + +Index: u-boot/configs/pinebook-pro-rk3399_defconfig +=================================================================== +--- u-boot.orig/configs/pinebook-pro-rk3399_defconfig ++++ u-boot/configs/pinebook-pro-rk3399_defconfig +@@ -78,6 +78,7 @@ CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC3=y + CONFIG_ROCKCHIP_USB2_PHY=y + CONFIG_USB_KEYBOARD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_RTL8152=y + +From patchwork Fri Sep 25 18:37:02 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1371531 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4BygsV69FWz9sS8 + for ; Sat, 26 Sep 2020 04:48:14 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 94D3B824F4; + Fri, 25 Sep 2020 20:47:11 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id EA6CB8248B; Fri, 25 Sep 2020 20:46:52 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 0460082475 + for ; Fri, 25 Sep 2020 20:46:45 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id B7788180ACE; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) +Message-ID: <20200925183856.699546249@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 25 Sep 2020 20:37:02 +0200 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Arnaud Patard +Subject: [patch 8/8] RFC: drivers/pwm/rk_pwm.c: Fix default polarity +References: <20200925183654.723338620@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +In the code, the default polarity is set to positive/positive, +which is neither normal polarity or inverted polarity. It's +only the hardware default. This leads to booting linux with +wrong polarity setting. + +Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE +by default instead. + +Signed-off-by: Arnaud Patard + +Index: u-boot/drivers/pwm/rk_pwm.c +=================================================================== +--- u-boot.orig/drivers/pwm/rk_pwm.c ++++ u-boot/drivers/pwm/rk_pwm.c +@@ -146,7 +146,7 @@ static int rk_pwm_probe(struct udevice * + priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); + + if (priv->data->supports_polarity) +- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; ++ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; + + return 0; + } diff --git a/rk3399-reset-display-hack.patch b/rk3399-reset-display-hack.patch new file mode 100644 index 0000000..67adeb3 --- /dev/null +++ b/rk3399-reset-display-hack.patch @@ -0,0 +1,46 @@ +[HACK NOTFORMERGE] PBP: Fix panel reset + +On warm reset, the pinebook pro panel is not working correctly. +The issue is not yet debugged so, for now, this hack seems to be +enough. It toggles the GPIO1_C6 gpio [ LCDVCC_EN signal in the +schematics ] used by the vcc3v3_panel regulator. + +There's no gpio_request, since the gpio is already in use at this +stage, so it can only fail. +Index: u-boot/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +=================================================================== +--- u-boot.orig/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c ++++ u-boot/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +@@ -7,9 +7,12 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include ++#include + #include + #include + #include +@@ -59,6 +62,7 @@ int misc_init_r(void) + const u32 cpuid_length = 0x10; + u8 cpuid[cpuid_length]; + int ret; ++ unsigned int gpio; + + setup_iodomain(); + +@@ -70,6 +74,11 @@ int misc_init_r(void) + if (ret) + return ret; + ++ gpio_lookup_name("B22", NULL, NULL, &gpio); ++ gpio_direction_output(gpio, 0); ++ mdelay(500); ++ gpio_direction_output(gpio, 1); ++ + return ret; + } + #endif diff --git a/uboot-tools.spec b/uboot-tools.spec index a51a705..191d1dc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -33,8 +33,10 @@ Patch10: AllWinner-PineTab.patch # Rockchips improvements Patch11: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch12: rockchip-Rock960-Fix-up-USB-support.patch +Patch13: rk3399-Pinebook-pro-EDP-support.patch +Patch14: rk3399-reset-display-hack.patch # TI fixes -Patch13: 0001-Fix-BeagleAI-detection.patch +Patch15: 0001-Fix-BeagleAI-detection.patch BuildRequires: bc BuildRequires: dtc @@ -248,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Sep 27 2020 Peter Robinson - 2020.10-0.6.rc5 +- Initial support for display output on Pinebook Pro + * Tue Sep 22 2020 Peter Robinson - 2020.10-0.5.rc5 - Update to 2020.10 RC5 From 569f76e54ab47267d476afad857987a84f5b6233 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 29 Sep 2020 10:51:39 +0100 Subject: [PATCH 102/351] fix USB starting for keyboard/storage --- ...ONFIG_PREBOOT-with-right-config-opti.patch | 42 +++++++++++++++++++ uboot-tools.spec | 1 + 2 files changed, 43 insertions(+) create mode 100644 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch diff --git a/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch b/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch new file mode 100644 index 0000000..c468adf --- /dev/null +++ b/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch @@ -0,0 +1,42 @@ +From 5cd7e94ea67d13d16628af865ae68b8fbc6ef62a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 29 Sep 2020 10:44:07 +0100 +Subject: [PATCH] Define default CONFIG_PREBOOT with right config option + +The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT +Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means +we regress because 'usb start' isn't run when expected, it should also be run +for devices that have USB storage because keyboards aren't the only thing we +might need the USB bus for. + +Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig") +Signed-off-by: Peter Robinson +Cc: Jonas Smedegaard +Cc: Neil Armstrong +--- + common/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/common/Kconfig b/common/Kconfig +index b1934b3a9c..9c20a9738e 100644 +--- a/common/Kconfig ++++ b/common/Kconfig +@@ -403,7 +403,6 @@ config BOOTCOMMAND + + config USE_PREBOOT + bool "Enable preboot" +- default "usb start" if USB_KEYBOARD + help + When this option is enabled, the existence of the environment + variable "preboot" will be checked immediately before starting the +@@ -417,6 +416,7 @@ config USE_PREBOOT + config PREBOOT + string "preboot default value" + depends on USE_PREBOOT && !USE_DEFAULT_ENV_FILE ++ default "usb start" if USB_KEYBOARD || USB_STORAGE + default "" + help + This is the default of "preboot" environment variable. +-- +2.26.2 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 191d1dc..0f89190 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -37,6 +37,7 @@ Patch13: rk3399-Pinebook-pro-EDP-support.patch Patch14: rk3399-reset-display-hack.patch # TI fixes Patch15: 0001-Fix-BeagleAI-detection.patch +Patch16: 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch BuildRequires: bc BuildRequires: dtc From cfe13af2a500e2cbc9f43a519d9a4e7610fb896c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 29 Sep 2020 14:40:43 +0100 Subject: [PATCH 103/351] Update Rock960 patch --- rockchip-Rock960-Fix-up-USB-support.patch | 55 +++++++++++------------ uboot-tools.spec | 14 +++--- 2 files changed, 33 insertions(+), 36 deletions(-) diff --git a/rockchip-Rock960-Fix-up-USB-support.patch b/rockchip-Rock960-Fix-up-USB-support.patch index bb534a0..5102787 100644 --- a/rockchip-Rock960-Fix-up-USB-support.patch +++ b/rockchip-Rock960-Fix-up-USB-support.patch @@ -1,29 +1,33 @@ -From 74ac6aad46c7d05e925b767fdb9a1306af6d5168 Mon Sep 17 00:00:00 2001 +From aec6cfccd62e21bdb8686839a22eaff5f8cece1d Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 19 Aug 2020 16:55:11 +0100 -Subject: [PATCH] rockchip: Rock960: Fix up USB support +Date: Tue, 29 Sep 2020 13:12:15 +0100 +Subject: [PATCH] rockchip: Rock960: fix up USB support Fix up USB config options so keyboards and other USB devices work. - -Signed-off-by: Peter Robinson --- - configs/rock960-rk3399_defconfig | 9 ++++++++- + configs/rock960-rk3399_defconfig | 9 ++++++--- include/configs/rock960_rk3399.h | 2 ++ - 2 files changed, 10 insertions(+), 1 deletion(-) + 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 9c4d8871b7..d6d787aa02 100644 +index 1d997847c2..a5a50785c5 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig -@@ -33,6 +33,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_SYS_MMC_ENV_DEV=1 - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_DM_KEYBOARD=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y -@@ -43,6 +44,8 @@ CONFIG_RNG_ROCKCHIP=y +@@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 + CONFIG_ENV_OFFSET=0x3F8000 + CONFIG_ROCKCHIP_RK3399=y +-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 + CONFIG_TARGET_ROCK960_RK3399=y + CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" + CONFIG_MISC_INIT_R=y + CONFIG_DISPLAY_BOARDINFO_LATE=y +@@ -41,6 +41,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y CONFIG_NVME=y CONFIG_PCI=y @@ -32,7 +36,7 @@ index 9c4d8871b7..d6d787aa02 100644 CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y -@@ -56,8 +59,10 @@ CONFIG_USB_XHCI_HCD=y +@@ -54,10 +56,11 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y @@ -40,19 +44,12 @@ index 9c4d8871b7..d6d787aa02 100644 +CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y -CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_USB_DWC3_GENERIC=y ++CONFIG_DM_KEYBOARD=y CONFIG_USB_KEYBOARD=y - CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET=y CONFIG_USB_HOST_ETHER=y -@@ -68,6 +73,8 @@ CONFIG_USB_ETHER_RTL8152=y - CONFIG_USB_ETHER_SMSC95XX=y - CONFIG_DM_VIDEO=y - CONFIG_DISPLAY=y -+CONFIG_VIDEO_BPP16=y -+CONFIG_VIDEO_BPP32=y - CONFIG_VIDEO_ROCKCHIP=y - CONFIG_DISPLAY_ROCKCHIP_HDMI=y - CONFIG_SPL_TINY_MEMSET=y + CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_ASIX88179=y diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h index c6f9122154..2edad71028 100644 --- a/include/configs/rock960_rk3399.h diff --git a/uboot-tools.spec b/uboot-tools.spec index 0f89190..6bd4c64 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -30,14 +30,14 @@ Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch Patch8: AllWinner-UpstreamSync.patch Patch9: AllWinner-PinePhone.patch Patch10: AllWinner-PineTab.patch -# Rockchips improvements -Patch11: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch12: rockchip-Rock960-Fix-up-USB-support.patch -Patch13: rk3399-Pinebook-pro-EDP-support.patch -Patch14: rk3399-reset-display-hack.patch # TI fixes -Patch15: 0001-Fix-BeagleAI-detection.patch -Patch16: 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch +Patch12: 0001-Fix-BeagleAI-detection.patch +# Rockchips improvements +Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch14: rk3399-Pinebook-pro-EDP-support.patch +Patch15: rk3399-reset-display-hack.patch +Patch16: 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch +Patch17: rockchip-Rock960-Fix-up-USB-support.patch BuildRequires: bc BuildRequires: dtc From 68cd2ba55a572ca548c14f55eebd2bb62fbf15de Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 7 Oct 2020 11:14:09 +0100 Subject: [PATCH 104/351] 2020.10 --- ...ONFIG_PREBOOT-with-right-config-opti.patch | 42 ------------------- sources | 2 +- uboot-tools.spec | 22 +++++----- 3 files changed, 12 insertions(+), 54 deletions(-) delete mode 100644 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch diff --git a/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch b/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch deleted file mode 100644 index c468adf..0000000 --- a/0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 5cd7e94ea67d13d16628af865ae68b8fbc6ef62a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 29 Sep 2020 10:44:07 +0100 -Subject: [PATCH] Define default CONFIG_PREBOOT with right config option - -The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT -Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means -we regress because 'usb start' isn't run when expected, it should also be run -for devices that have USB storage because keyboards aren't the only thing we -might need the USB bus for. - -Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig") -Signed-off-by: Peter Robinson -Cc: Jonas Smedegaard -Cc: Neil Armstrong ---- - common/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/common/Kconfig b/common/Kconfig -index b1934b3a9c..9c20a9738e 100644 ---- a/common/Kconfig -+++ b/common/Kconfig -@@ -403,7 +403,6 @@ config BOOTCOMMAND - - config USE_PREBOOT - bool "Enable preboot" -- default "usb start" if USB_KEYBOARD - help - When this option is enabled, the existence of the environment - variable "preboot" will be checked immediately before starting the -@@ -417,6 +416,7 @@ config USE_PREBOOT - config PREBOOT - string "preboot default value" - depends on USE_PREBOOT && !USE_DEFAULT_ENV_FILE -+ default "usb start" if USB_KEYBOARD || USB_STORAGE - default "" - help - This is the default of "preboot" environment variable. --- -2.26.2 - diff --git a/sources b/sources index 6548dda..532714c 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.10-rc5.tar.bz2) = 8c0f6cceca4aeb67a51743886d65e420d95a70cc427acd17ac81281cad996339a9b376994ff76e46cb862d54797269da52dd05dfc7e12c8c271ed7aca828e2b4 +SHA512 (u-boot-2020.10.tar.bz2) = fd26534f2d72ffc3167919c32067c550636f6a4ee5fead6937e2583ba4ff6165e88b8b50fbbddde7354a8c42701433d0cb2ce982e43c014db60b08415288baf9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 6bd4c64..289a303 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc5 Name: uboot-tools Version: 2020.10 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -36,8 +36,7 @@ Patch12: 0001-Fix-BeagleAI-detection.patch Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch14: rk3399-Pinebook-pro-EDP-support.patch Patch15: rk3399-reset-display-hack.patch -Patch16: 0001-Define-default-CONFIG_PREBOOT-with-right-config-opti.patch -Patch17: rockchip-Rock960-Fix-up-USB-support.patch +Patch16: rockchip-Rock960-Fix-up-USB-support.patch BuildRequires: bc BuildRequires: dtc @@ -48,7 +47,7 @@ BuildRequires: devtoolset-7-build BuildRequires: devtoolset-7-binutils BuildRequires: devtoolset-7-gcc BuildRequires: python2-devel -BuildRequires: python3-setuptools +BuildRequires: python2-setuptools BuildRequires: python2-libfdt %else BuildRequires: gcc @@ -80,22 +79,20 @@ and fw_printenv/fw_setenv for manipulating the boot environment variables. %ifarch aarch64 %package -n uboot-images-armv8 -Summary: u-boot bootloader images for aarch64 boards -Requires: uboot-tools +Summary: U-Boot firmware images for aarch64 boards BuildArch: noarch %description -n uboot-images-armv8 -u-boot bootloader binaries for aarch64 boards +U-Boot firmware binaries for aarch64 boards %endif %ifarch %{arm} %package -n uboot-images-armv7 -Summary: u-boot bootloader images for armv7 boards -Requires: uboot-tools +Summary: U-Boot firmware images for armv7 boards BuildArch: noarch %description -n uboot-images-armv7 -u-boot bootloader binaries for armv7 boards +U-Boot firmware binaries for armv7 boards %endif %prep @@ -251,6 +248,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Oct 06 2020 Peter Robinson - 2020.10-1 +- Update to 2020.10 + * Sun Sep 27 2020 Peter Robinson - 2020.10-0.6.rc5 - Initial support for display output on Pinebook Pro From 2aca29e4a7854b370d980ffecf39a16b67e5b94d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 7 Oct 2020 16:12:13 +0100 Subject: [PATCH 105/351] Rockchips fixes --- arm-boards | 1 + rockchip-spl-u-boot-itb-offset.patch | 11 +++++++++++ uboot-tools.spec | 1 + 3 files changed, 13 insertions(+) create mode 100644 rockchip-spl-u-boot-itb-offset.patch diff --git a/arm-boards b/arm-boards index b73f726..bc80bb8 100644 --- a/arm-boards +++ b/arm-boards @@ -125,6 +125,7 @@ stm32mp15_basic sunxi_Gemei_G9 tbs_a711 tinker-rk3288 +tinker-s-rk3288 trimslice udoo udoo_neo diff --git a/rockchip-spl-u-boot-itb-offset.patch b/rockchip-spl-u-boot-itb-offset.patch new file mode 100644 index 0000000..d78c2f2 --- /dev/null +++ b/rockchip-spl-u-boot-itb-offset.patch @@ -0,0 +1,11 @@ +--- u-boot-2020.10/common/spl/Kconfig.orig 2020-10-07 12:08:54.972632715 +0100 ++++ u-boot-2020.10/common/spl/Kconfig 2020-10-07 12:08:59.100672506 +0100 +@@ -324,7 +324,7 @@ + default 0x200 if ARCH_SOCFPGA || ARCH_AT91 + default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \ + OMAP54XX || AM33XX || AM43XX || ARCH_K3 +- default 0x4000 if ARCH_ROCKCHIP ++ default 0x200 if ARCH_ROCKCHIP + default 0x822 if TARGET_SIFIVE_FU540 + help + Address on the MMC to load U-Boot from, when the MMC is being used diff --git a/uboot-tools.spec b/uboot-tools.spec index 289a303..5326ea9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -19,6 +19,7 @@ Source5: 10-devicetree.install Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Needed due to issues with shim Patch2: uefi-use-Fedora-specific-path-name.patch +Patch3: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support From ecfe5a01c58036af0f264e8522c870f915ef094b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 28 Oct 2020 08:22:07 +0000 Subject: [PATCH 106/351] Fix kernel installs for non EBBR systems --- uboot-tools.spec | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 5326ea9..955160d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.10 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -81,6 +81,7 @@ and fw_printenv/fw_setenv for manipulating the boot environment variables. %ifarch aarch64 %package -n uboot-images-armv8 Summary: U-Boot firmware images for aarch64 boards +Requires: uboot-tools BuildArch: noarch %description -n uboot-images-armv8 @@ -90,6 +91,7 @@ U-Boot firmware binaries for aarch64 boards %ifarch %{arm} %package -n uboot-images-armv7 Summary: U-Boot firmware images for armv7 boards +Requires: uboot-tools BuildArch: noarch %description -n uboot-images-armv7 @@ -249,6 +251,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Oct 28 08:21:56 GMT 2020 Peter Robinson - 2020.10-2 +- Fix kernel installs for non EBBR systems + * Tue Oct 06 2020 Peter Robinson - 2020.10-1 - Update to 2020.10 From 244095cafc95bca9476b24a518a0f49282612e1c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 28 Oct 2020 10:12:12 +0000 Subject: [PATCH 107/351] fix for upstream Allwinner network issues --- ...llWinner-ethernet-network-interfaces.patch | 518 ++++++++++++++++++ uboot-tools.spec | 2 + 2 files changed, 520 insertions(+) create mode 100644 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch diff --git a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch new file mode 100644 index 0000000..68626db --- /dev/null +++ b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch @@ -0,0 +1,518 @@ +From 25ce28126444900b7b3efef36c6b9d15a6ab9af1 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 28 Oct 2020 10:08:44 +0000 +Subject: [PATCH] Fixes for AllWinner ethernet network interfaces + +The upstream kernel in fixing stuff has broken stuff. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64-bananapi-m64.dts | 2 +- + arch/arm/dts/sun50i-a64-nanopi-a64.dts | 2 +- + arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +- + arch/arm/dts/sun50i-a64-olinuxino.dts | 2 +- + arch/arm/dts/sun50i-a64-orangepi-win.dts | 2 +- + arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- + arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 2 +- + arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- + arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- + arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 2 +- + arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 2 +- + arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- + arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 2 +- + arch/arm/dts/sun50i-h6-beelink-gs1.dts | 2 +- + arch/arm/dts/sun50i-h6-pine-h64.dts | 2 +- + arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +- + arch/arm/dts/sun7i-a20-bananapi.dts | 2 +- + arch/arm/dts/sun7i-a20-bananapro.dts | 2 +- + arch/arm/dts/sun7i-a20-cubietruck.dts | 2 +- + arch/arm/dts/sun7i-a20-hummingbird.dts | 2 +- + arch/arm/dts/sun7i-a20-lamobo-r1.dts | 2 +- + arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 2 +- + arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 2 +- + arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 2 +- + arch/arm/dts/sun7i-a20-orangepi-mini.dts | 2 +- + arch/arm/dts/sun7i-a20-orangepi.dts | 2 +- + arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 2 +- + arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +- + arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 2 +- + arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 2 +- + arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 2 +- + arch/arm/dts/sun8i-h3-orangepi-plus.dts | 2 +- + arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- + arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +- + arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +- + arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- + 36 files changed, 36 insertions(+), 36 deletions(-) + +diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts +index ef1c90401b..e1c22aeb29 100644 +--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts +@@ -112,7 +112,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts +index 31884dbc88..03ebe3e44b 100644 +--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts ++++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts +@@ -102,7 +102,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dcdc1>; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts +index 6a2154525d..94caf110ab 100644 +--- a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts ++++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts +@@ -30,7 +30,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + allwinner,tx-delay-ps = <600>; +diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts +index f7a4bccaa5..2396d9b797 100644 +--- a/arch/arm/dts/sun50i-a64-olinuxino.dts ++++ b/arch/arm/dts/sun50i-a64-olinuxino.dts +@@ -102,7 +102,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dcdc1>; + allwinner,tx-delay-ps = <600>; +diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts +index b0c64f7579..5b5d4f31b6 100644 +--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts ++++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts +@@ -127,7 +127,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_gmac_3v3>; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts +index 24f1aac366..b09b4276f1 100644 +--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts ++++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts +@@ -52,7 +52,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +index 53fcc9098d..4a50a18128 100644 +--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +@@ -95,7 +95,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +index df1b9263ad..6e30a564c8 100644 +--- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts ++++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +@@ -36,7 +36,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + /delete-property/ allwinner,leds-active-low; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +index 4f9ba53ffa..9d93fe1536 100644 +--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts ++++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +@@ -96,7 +96,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts +index b059e20813..e8ab8c2df5 100644 +--- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts ++++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts +@@ -75,7 +75,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +index 70b5f09984..6cc567ea99 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +@@ -118,7 +118,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts +index cb44bfa598..33ab44072e 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts +@@ -124,7 +124,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts +index ef5ca64442..de448ca51e 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts +@@ -69,7 +69,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts +index 0dc33c90dd..024035d36e 100644 +--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts ++++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts +@@ -64,7 +64,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_aldo2>; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts +index 1898345183..13fbf26817 100644 +--- a/arch/arm/dts/sun50i-h6-pine-h64.dts ++++ b/arch/arm/dts/sun50i-h6-pine-h64.dts +@@ -66,7 +66,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_aldo2>; + allwinner,rx-delay-ps = <200>; +diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +index e2bfe00588..4dbcad1343 100644 +--- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts ++++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +@@ -130,7 +130,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts +index 81bc85d398..33040c43bc 100644 +--- a/arch/arm/dts/sun7i-a20-bananapi.dts ++++ b/arch/arm/dts/sun7i-a20-bananapi.dts +@@ -132,7 +132,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts +index 0176e9de01..8a75545e22 100644 +--- a/arch/arm/dts/sun7i-a20-bananapro.dts ++++ b/arch/arm/dts/sun7i-a20-bananapro.dts +@@ -110,7 +110,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts +index 99f531b8d2..46a9f4669e 100644 +--- a/arch/arm/dts/sun7i-a20-cubietruck.dts ++++ b/arch/arm/dts/sun7i-a20-cubietruck.dts +@@ -151,7 +151,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@1 { +diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts +index fd0153f656..5c3d107094 100644 +--- a/arch/arm/dts/sun7i-a20-hummingbird.dts ++++ b/arch/arm/dts/sun7i-a20-hummingbird.dts +@@ -101,7 +101,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_vdd>; + /* phy reset config */ + snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ +diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts +index f91e1bee44..8173d77c12 100644 +--- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts ++++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts +@@ -120,7 +120,7 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + /delete-property/#address-cells; +diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +index f0e6a96e57..f0c5160ff8 100644 +--- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts ++++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +@@ -112,7 +112,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@1 { +diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts +index 823aabce04..ff42708137 100644 +--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts ++++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts +@@ -106,7 +106,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy3>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_vcc3v3>; + + snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +index 4e1c590eb0..996201665b 100644 +--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts ++++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +@@ -112,7 +112,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@1 { +diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts +index 15881081ca..b80215c61c 100644 +--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts ++++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts +@@ -121,7 +121,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts +index d64de2e73a..66efb7d1ab 100644 +--- a/arch/arm/dts/sun7i-a20-orangepi.dts ++++ b/arch/arm/dts/sun7i-a20-orangepi.dts +@@ -97,7 +97,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +index 538ea15fa3..205eaae44a 100644 +--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts ++++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +@@ -115,7 +115,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@1 { +diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +index c27e56091f..56cc5791c4 100644 +--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts ++++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +@@ -82,7 +82,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@1 { +diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +index eaff6fa401..2beafe3a31 100644 +--- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts ++++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +@@ -123,7 +123,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_sw>; + phy-handle = <&rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + allwinner,rx-delay-ps = <700>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts +index 5dba4fc310..ecd9ff38a8 100644 +--- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts ++++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts +@@ -160,7 +160,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_dldo4>; + phy-handle = <&rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts +index 4ba533b034..bc370d4ea1 100644 +--- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -96,7 +96,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + + status = "okay"; + }; +diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts +index 97f497854e..d05fa679dc 100644 +--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts +@@ -85,7 +85,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + + status = "okay"; + }; +diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +index 6dbf7b2e0c..b6ca45d18e 100644 +--- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +@@ -67,7 +67,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +index c488aaacbd..9c20245eef 100644 +--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts ++++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +@@ -129,7 +129,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_dc1sw>; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +index 15c22b06fc..3ab6f47cea 100644 +--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts ++++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +@@ -120,7 +120,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_dc1sw>; + status = "okay"; + }; +diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +index 39263e74fb..8e5cb3b3fd 100644 +--- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi ++++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +@@ -126,7 +126,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + + status = "okay"; + }; +-- +2.28.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 955160d..d76901d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -31,6 +31,7 @@ Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch Patch8: AllWinner-UpstreamSync.patch Patch9: AllWinner-PinePhone.patch Patch10: AllWinner-PineTab.patch +Patch11: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch # TI fixes Patch12: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements @@ -253,6 +254,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %changelog * Wed Oct 28 08:21:56 GMT 2020 Peter Robinson - 2020.10-2 - Fix kernel installs for non EBBR systems +- Fix for wired networks on some Allwinner devices * Tue Oct 06 2020 Peter Robinson - 2020.10-1 - Update to 2020.10 From 955b9471d4ac9ecd50bc69d99bd1198660fceb8d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 28 Oct 2020 19:59:52 +0000 Subject: [PATCH 108/351] tweak pine64 fix --- 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch index 68626db..3dc423b 100644 --- a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch +++ b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch @@ -119,7 +119,7 @@ index 24f1aac366..b09b4276f1 100644 pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; ++ phy-mode = "rgmii-txid"; phy-handle = <&ext_rgmii_phy>; status = "okay"; }; From 2cf8c77ba4b65797d5b84d3514cafb551202edd2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 8 Nov 2020 23:08:27 +0000 Subject: [PATCH 109/351] Fix SPI on Rockchip devices --- ...b-specific-bits-to-it-s-specific-u-b.patch | 104 +++++++ uboot-tools.spec | 260 +----------------- 2 files changed, 110 insertions(+), 254 deletions(-) create mode 100644 rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch diff --git a/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch b/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch new file mode 100644 index 0000000..2718f7b --- /dev/null +++ b/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch @@ -0,0 +1,104 @@ +From 71f86c48580642a8d6a7d1049427bb72cb93b480 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 8 Nov 2020 19:57:50 +0000 +Subject: [PATCH] rockchip: Move Bob specific bits to it's specific u-boot.dtsi + +Move the bits that are device specific to the -u-boot.dtsi as the +bits may be different on other devices and hence breaks SPI on +those devices such as the Pinebook Pro. + +Signed-off-by: Peter Robinson +Fixes: c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob") +Cc: Simon Glass +--- + arch/arm/dts/rk3399-gru-u-boot.dtsi | 30 +++++++++++++++++++++++++++++ + arch/arm/dts/rk3399-u-boot.dtsi | 25 ------------------------ + 2 files changed, 30 insertions(+), 25 deletions(-) + +diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi +index 390ac2bb5a..5e95cacfea 100644 +--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi +@@ -5,6 +5,36 @@ + + #include "rk3399-u-boot.dtsi" + ++/ { ++ aliases { ++ spi1 = &spi1; ++ }; ++}; ++ ++#ifdef CONFIG_ROCKCHIP_SPI_IMAGE ++&binman { ++ rom { ++ filename = "u-boot.rom"; ++ size = <0x400000>; ++ pad-byte = <0xff>; ++ ++ mkimage { ++ args = "-n rk3399 -T rkspi"; ++ u-boot-spl { ++ }; ++ }; ++ u-boot-img { ++ offset = <0x40000>; ++ }; ++ u-boot { ++ offset = <0x300000>; ++ }; ++ fdtmap { ++ }; ++ }; ++}; ++#endif ++ + &spi_flash { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi +index ecd230c720..26b0a34e64 100644 +--- a/arch/arm/dts/rk3399-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-u-boot.dtsi +@@ -11,7 +11,6 @@ + mmc0 = &sdhci; + mmc1 = &sdmmc; + pci0 = &pcie0; +- spi1 = &spi1; + }; + + cic: syscon@ff620000 { +@@ -60,30 +59,6 @@ + + }; + +-#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +-&binman { +- rom { +- filename = "u-boot.rom"; +- size = <0x400000>; +- pad-byte = <0xff>; +- +- mkimage { +- args = "-n rk3399 -T rkspi"; +- u-boot-spl { +- }; +- }; +- u-boot-img { +- offset = <0x40000>; +- }; +- u-boot { +- offset = <0x300000>; +- }; +- fdtmap { +- }; +- }; +-}; +-#endif +- + &cru { + u-boot,dm-pre-reloc; + }; +-- +2.28.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index d76901d..f9f20b4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.10 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -39,6 +39,7 @@ Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch14: rk3399-Pinebook-pro-EDP-support.patch Patch15: rk3399-reset-display-hack.patch Patch16: rockchip-Rock960-Fix-up-USB-support.patch +Patch17: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch BuildRequires: bc BuildRequires: dtc @@ -252,7 +253,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Wed Oct 28 08:21:56 GMT 2020 Peter Robinson - 2020.10-2 +* Sun Nov 8 2020 Peter Robinson - 2020.10-3 +- Fix SPI on Rockchip devices + +* Wed Oct 28 2020 Peter Robinson - 2020.10-2 - Fix kernel installs for non EBBR systems - Fix for wired networks on some Allwinner devices @@ -341,255 +345,3 @@ cp -p board/warp7/README builds/docs/README.warp7 * Tue Jan 7 2020 Peter Robinson 2020.01-1 - 2020.01 - -* Tue Dec 17 2019 Peter Robinson 2020.01-0.9-rc5 -- 2020.01 RC5 - -* Thu Dec 12 2019 Peter Robinson 2020.01-0.8-rc4 -- Fixes for Raspberry Pi - -* Thu Dec 5 2019 Peter Robinson 2020.01-0.7-rc4 -- Enable the Khadas Edge and VIM series of devices -- Minor other fixes - -* Tue Dec 3 2019 Peter Robinson 2020.01-0.6-rc4 -- Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP - -* Tue Dec 3 2019 Peter Robinson 2020.01-0.5-rc4 -- 2020.01 RC4 - -* Tue Nov 19 2019 Peter Robinson 2020.01-0.4-rc3 -- 2020.01 RC3 - -* Tue Nov 12 2019 Peter Robinson 2020.01-0.3-rc2 -- 2020.01 RC2 - -* Tue Nov 5 2019 Peter Robinson 2020.01-0.2-rc1 -- Include new ATF 2.2 - -* Wed Oct 30 2019 Peter Robinson 2020.01-0.1-rc1 -- 2020.01 RC1 -- Initial migration to python3 - -* Wed Oct 9 2019 Peter Robinson 2019.10-2 -- Fixes for Rockchips rk3328 and rk3399 platforms - -* Mon Oct 7 2019 Peter Robinson 2019.10-1 -- 2019.10 - -* Mon Sep 23 2019 Peter Robinson 2019.10-0.5-rc4 -- 2019.10 RC4 - -* Wed Sep 11 2019 Peter Robinson 2019.10-0.4-rc3 -- Minor fixes - -* Tue Aug 27 2019 Peter Robinson 2019.10-0.3-rc3 -- 2019.10 RC3 - -* Mon Aug 26 2019 Peter Robinson 2019.10-0.2-rc2 -- Temporarily disable Chrome devices due to unexpected retirement of vboot-utils - -* Wed Aug 14 2019 Peter Robinson 2019.10-0.1-rc2 -- 2019.10 RC2 - -* Sun Aug 4 2019 Peter Robinson 2019.07-3 -- Fixes for Rock960 -- Iniital Raspberry Pi 4 support - -* Sat Jul 27 2019 Fedora Release Engineering - 2019.07-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild - -* Mon Jul 8 2019 Peter Robinson 2019.07-1 -- 2019.07 -- Enable Rock64 -- Rock960 enhancements - -* Fri Jun 28 2019 Peter Robinson 2019.07-0.2-rc4 -- Fix build with explicit python2 -- Drop a couple of unused boards - -* Tue Jun 18 2019 Peter Robinson 2019.07-0.1-rc4 -- 2019.07 RC4 -- Obsolete unused elf packages -- A number of new rk3399 devices - -* Sat May 4 2019 Peter Robinson 2019.04-2 -- Build and ship pre built SD/SPI SPL bits for all rk3399 boards - -* Sun Apr 14 2019 Peter Robinson 2019.04-1 -- 2019.04 -- Fixes for AllWinner and NVIDIA Jetson devices - -* Thu Apr 4 2019 Peter Robinson 2019.04-0.9-rc4 -- Latest Tegra patch revision - -* Sun Mar 31 2019 Peter Robinson 2019.04-0.8-rc4 -- Add ability to make creation of boot/dtb symlink configurable - -* Sun Mar 24 2019 Peter Robinson 2019.04-0.7-rc4 -- Minor UEFI fixes, Tegra Jetson TX series rebase - -* Wed Mar 20 2019 Peter Robinson 2019.04-0.6-rc4 -- Tegra Jetson TX-series improvements - -* Tue Mar 19 2019 Peter Robinson 2019.04-0.5-rc4 -- 2019.04 RC4 - -* Tue Mar 5 2019 Peter Robinson 2019.04-0.4-rc3 -- 2019.04 RC3 - -* Tue Feb 19 2019 Peter Robinson 2019.04-0.3-rc2 -- 2019.04 RC2 - -* Sat Feb 9 2019 Peter Robinson 2019.04-0.2-rc1 -- Build against new ATF snapshot - -* Fri Feb 8 2019 Peter Robinson 2019.04-0.1-rc1 -- 2019.04 RC1 - -* Sun Feb 03 2019 Fedora Release Engineering - 2019.01-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild - -* Tue Jan 15 2019 Peter Robinson 2019.01-1 -- 2019.01 - -* Tue Jan 8 2019 Peter Robinson 2019.01-0.4-rc3 -- 2019.01 RC3 - -* Tue Dec 18 2018 Peter Robinson 2019.01-0.3-rc2 -- 2019.01 RC2 - -* Wed Dec 12 2018 Peter Robinson 2019.01-0.2-rc1 -- ATF tweaks and fixes -- Enable amarula_a64_relic, nanopi_a64, puma-rk3399 - -* Tue Dec 4 2018 Peter Robinson 2019.01-0.1-rc1 -- 2019.01 RC1 -- Enable new devices - -* Tue Dec 4 2018 Peter Robinson 2018.11-1 -- 2018.11 -- Build with ATF 2.0 -- Fix Hummingboard and CuBox-i devices - -* Tue Oct 30 2018 Peter Robinson 2018.11-0.1.rc3 -- 2018.11 RC3 - -* Sun Sep 30 2018 Pablo Greco -- Added conditional to enable devtoolset-7-gcc for .el7 build (Arrfab) -- Added conditional BR, python2-pyelftools is python-pyelftools in .el7 (Arrfab) - -* Sun Sep 23 2018 Peter Robinson -- Update Rock960 patches, enable Rock960 Enterprise Edition (ficus) - -* Mon Sep 10 2018 Peter Robinson 2018.09-1 -- 2018.09 - -* Tue Sep 4 2018 Peter Robinson 2018.09-0.4.rc3 -- 2018.09 RC3 -- Enable nanopi_neo_plus2, pine_h64, rock960-rk3399, a64-olinuxino -- Build against new upstream AllWinner ATF support -- Use firmware provided DT on Raspberry Pi -- Support for Pine64-LTS - -* Tue Aug 14 2018 Peter Robinson 2018.09-0.2.rc2 -- 2018.09 RC2 -- Improve Jetson TX1 support -- Enable OrangePi 1+ and Avnet Ultra96 - -* Tue Jul 31 2018 Peter Robinson 2018.09-0.1.rc1 -- 2018.09 RC1 - -* Sat Jul 14 2018 Fedora Release Engineering - 2018.07-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild - -* Mon Jul 9 2018 Peter Robinson 2018.07-1 -- 2018.07 - -* Tue Jul 3 2018 Peter Robinson 2018.07-0.4.rc3 -- 2018.07 RC3 - -* Wed Jun 20 2018 Peter Robinson 2018.07-0.3.rc2 -- 2018.07 RC2 -- Enable Helios4 - -* Fri Jun 8 2018 Peter Robinson 2018.07-0.2.rc1 -- Update sunxi MMC patch series, Tegra Nyan patch, SolidRun i.MX6 SoM rev 1.5 patch - -* Tue Jun 5 2018 Peter Robinson 2018.07-0.1.rc1 -- 2018.07 RC1 -- Enable Turris Mox, BananaPi m2 Berry, some Libretech boards - -* Mon May 7 2018 Peter Robinson 2018.05-1 -- 2018.05 GA - -* Wed May 2 2018 Peter Robinson 2018.05-0.5.rc3 -- Build Xilnix ZynqMP zcu100 (96boards Ultra96) - -* Tue May 1 2018 Peter Robinson 2018.05-0.4.rc3 -- 2018.05 RC3 - -* Thu Apr 26 2018 Peter Robinson 2018.05-0.3.rc2 -- uEFI improvements -- Fixes for Rockchips rk33xx 64 bit devices -- Build AllWinner 64 bit devices against new ATF - -* Tue Apr 17 2018 Peter Robinson 2018.05-0.2.rc2 -- 2018.05 RC2 -- Enable Raspberry Pi option to use firmware DT - -* Sun Apr 8 2018 Peter Robinson 2018.05-0.1.rc1 -- 2018.05 RC1 - -* Fri Apr 6 2018 Peter Robinson 2018.03-4 -- Improvements for Raspberry Pi, AllWinner MMC perf, mvebu devices - -* Tue Mar 20 2018 Peter Robinson 2018.03-3 -- Fix issue with certain MMC cards on Raspberry Pi - -* Fri Mar 16 2018 Peter Robinson 2018.03-2 -- Add support for Raspberry Pi 3+ - -* Tue Mar 13 2018 Peter Robinson 2018.03-1 -- 2018.03 GA - -* Fri Mar 9 2018 Peter Robinson 2018.03-0.11.rc4 -- Enable support for Jetson TX2 - -* Thu Mar 8 2018 Peter Robinson 2018.03-0.10.rc4 -- Fix for Raspberry Pi 2 boot - -* Wed Mar 7 2018 Peter Robinson 2018.03-0.9.rc4 -- 2018.03 RC4 -- Fixes for Raspberry Pi 3 boot -- Minor kernel install fixes -- Enable am335x_evm_usbspl for Beagle Pocket -- DragonBoard patch rebase - -* Sun Mar 4 2018 Peter Robinson 2018.03-0.8.rc3 -- Add support for SoM rev 1.5 to mx6cuboxi -- Rebuild for new ATF 1.5 rc0 release - -* Sun Feb 25 2018 Peter Robinson 2018.03-0.7.rc3 -- Build 64 bit Rockchips FIT images with ARM Trusted Firmware - -* Tue Feb 20 2018 Peter Robinson 2018.03-0.6.rc3 -- 2018.03 RC3 - -* Fri Feb 16 2018 Peter Robinson 2018.03-0.5.rc2 -- A few upstream fixes - -* Thu Feb 15 2018 Peter Robinson 2018.03-0.4.rc2 -- Fix for GBps network on some AllWinner devices - -* Tue Feb 13 2018 Peter Robinson 2018.03-0.3.rc2 -- 2018.03 RC2 - -* Wed Feb 7 2018 Peter Robinson 2018.03-0.2.rc1 -- Update uEFI patches - -* Tue Jan 30 2018 Peter Robinson 2018.03-0.1.rc1 -- 2018.03 RC1 - -* Tue Jan 9 2018 Peter Robinson 2018.01-1 -- 2018.01 From 642bba9fd3b12efe27cc5e347ca4b36b789aee80 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 8 Nov 2020 23:30:08 +0000 Subject: [PATCH 110/351] Latest Pinebook Pro display patches --- rk3399-Pinebook-pro-EDP-support.patch | 816 ++++++++++++++++++-------- rk3399-reset-display-hack.patch | 46 -- uboot-tools.spec | 8 +- 3 files changed, 588 insertions(+), 282 deletions(-) delete mode 100644 rk3399-reset-display-hack.patch diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch index e04b62d..ae07e11 100644 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -1,53 +1,52 @@ -From patchwork Fri Sep 25 18:36:55 2020 +From patchwork Tue Oct 27 13:21:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371525 +X-Patchwork-Id: 1388576 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) 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header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 21266180A8C; Fri, 25 Sep 2020 20:46:42 +0200 (CEST) -Message-ID: <20200925183856.346332079@rtp-net.org> + id 166971802C6; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.729230758@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:36:55 +0200 +Date: Tue, 27 Oct 2020 14:21:32 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -55,10 +54,11 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 1/8] RFC: drivers/video/rockchip/rk_vop.c: Use endpoint +Subject: [patch v2 01/10] drivers/video/rockchip/rk_vop.c: Use endpoint compatible string to find VOP mode -References: <20200925183654.723338620@rtp-net.org> +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -87,6 +87,7 @@ to find the kind of endpoint by comparing the endpoint compatible value. This patch is implementing the more flexible second solution. Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h =================================================================== @@ -168,12 +169,13 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c disp_uc_plat = dev_get_uclass_platdata(disp); debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); -From patchwork Fri Sep 25 18:36:56 2020 +From patchwork Tue Oct 27 13:21:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371530 +X-Patchwork-Id: 1388588 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -188,35 +190,36 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4BygsJ4hGqz9sS8 - for ; Sat, 26 Sep 2020 04:48:04 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 4CLCC535Xyz9sV1 + for ; Wed, 28 Oct 2020 00:26:07 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 50C6E82503; - Fri, 25 Sep 2020 20:47:09 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id F3D8182517; + Tue, 27 Oct 2020 14:24:08 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 0F41F8246F; Fri, 25 Sep 2020 20:46:51 +0200 (CEST) + id 99F18824A7; Tue, 27 Oct 2020 14:23:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id BD6E0823F5 - for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 6CEE382496 + for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 0B30218054F; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.398231733@rtp-net.org> + id 354541806F5; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.781283753@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:36:56 +0200 +Date: Tue, 27 Oct 2020 14:21:33 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -224,9 +227,10 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 2/8] RFC: drivers/video/rockchip/rk_edp.c: Add rk3399 support -References: <20200925183654.723338620@rtp-net.org> +Subject: [patch v2 02/10] drivers/video/rockchip/rk_edp.c: Add rk3399 support +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -255,6 +259,7 @@ on rk3399, so don't try changing the clock at index 1 to rate 0 on rk3399. Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_edp.c =================================================================== @@ -422,12 +427,13 @@ Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h /* line_map */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) -From patchwork Fri Sep 25 18:36:57 2020 +From patchwork Tue Oct 27 13:21:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371528 +X-Patchwork-Id: 1388575 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -439,19 +445,20 @@ Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Bygrs3CVDz9sSJ - for ; Sat, 26 Sep 2020 04:47:41 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 4CLC8l3jS0z9sSG + for ; Wed, 28 Oct 2020 00:23:56 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id A6BF7824BB; - Fri, 25 Sep 2020 20:47:04 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 4A07082361; + Tue, 27 Oct 2020 14:23:48 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id A050F82499; Fri, 25 Sep 2020 20:46:50 +0200 (CEST) + id 1BE93824A7; Tue, 27 Oct 2020 14:23:47 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -459,17 +466,17 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 8F65D823F0 - for ; Fri, 25 Sep 2020 20:46:44 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id BEBE082361 + for ; Tue, 27 Oct 2020 14:23:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 3BBA4180A6C; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.447902421@rtp-net.org> + id 5A45C1808B6; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.832232313@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:36:57 +0200 +Date: Tue, 27 Oct 2020 14:21:34 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -477,10 +484,11 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 3/8] RFC: drivers/video/rockchip/rk_edp.c: Change interrupt +Subject: [patch v2 03/10] drivers/video/rockchip/rk_edp.c: Change interrupt polarity configuration -References: <20200925183654.723338620@rtp-net.org> +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -503,77 +511,73 @@ uboot code is setting it to 1. Change the configuration to match the linux configuration Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak -Index: u-boot/drivers/video/rockchip/rk_edp.c +Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h =================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -100,10 +100,13 @@ static void rk_edp_init_refclk(struct rk - ®s->dp_reserv2); - } +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 -+#define INT_POL1 (0x1 << 1) -+#define INT_POL0 (0x1 << 0) -+ - static void rk_edp_init_interrupt(struct rk3288_edp *regs) - { - /* Set interrupt pin assertion polarity as high */ -- writel(INT_POL, ®s->int_ctl); -+ writel(INT_POL0 | INT_POL1, ®s->int_ctl); + /* int_ctl */ + #define SOFT_INT_CTRL (0x1 << 2) +-#define INT_POL (0x1 << 0) ++#define INT_POL1 (0x1 << 1) ++#define INT_POL0 (0x1 << 0) ++#define INT_POL (INT_POL0 | INT_POL1) - /* Clear pending registers */ - writel(0xff, ®s->common_int_sta_1); + /* sys_ctl_1 */ + #define DET_STA (0x1 << 2) -From patchwork Fri Sep 25 18:36:58 2020 +From patchwork Tue Oct 27 13:21:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371526 +X-Patchwork-Id: 1388577 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4BygrP4k49z9sS8 - for ; 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Fri, 25 Sep 2020 20:46:44 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id ED572823FC + for ; Tue, 27 Oct 2020 14:23:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 4C3F8180AAC; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.497901419@rtp-net.org> + id 6676F1808BC; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.883717675@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:36:58 +0200 +Date: Tue, 27 Oct 2020 14:21:35 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -581,107 +585,11 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 4/8] RFC: drivers/video/rockchip/rk_edp.c: Change clock rate -References: <20200925183654.723338620@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -The current code is setting the clock rate to 192000000, but -due to the current device-tree configuration and linux code, -it should rather be 100000000. - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -1075,7 +1078,7 @@ static int rk_edp_probe(struct udevice * - } - ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); - if (ret >= 0) { -- ret = clk_set_rate(&clk, 192000000); -+ ret = clk_set_rate(&clk, 100000000); - clk_free(&clk); - } - if (ret < 0) { - -From patchwork Fri Sep 25 18:36:59 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371529 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Bygs45XdNz9sS8 - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 6D075180ABF; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.548086571@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:36:59 +0200 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Arnaud Patard -Subject: [patch 5/8] RFC: drivers/video/rockchip/rk_vop.c: Reserve efi fb +Subject: [patch v2 04/10] drivers/video/rockchip/rk_vop.c: Reserve efi fb memory -References: <20200925183654.723338620@rtp-net.org> +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -704,6 +612,7 @@ has to be reserved, otherwise it may leads to kernel memory overwrite. Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_vop.c =================================================================== @@ -733,55 +642,56 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c /* -From patchwork Fri Sep 25 18:37:00 2020 +From patchwork Tue Oct 27 13:21:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371527 +X-Patchwork-Id: 1388583 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Bygrg0YBjz9sS8 - for ; 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Fri, 25 Sep 2020 20:46:44 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 16A2C8246A + for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 81B21180AC6; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.598156739@rtp-net.org> + id 8FBF11808D1; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.934181387@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:37:00 +0200 +Date: Tue, 27 Oct 2020 14:21:36 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -789,9 +699,10 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 6/8] RFC: rk3399-pinebook-pro-u-boot.dtsi: Enable edp -References: <20200925183654.723338620@rtp-net.org> +Subject: [patch v2 05/10] rk3399-pinebook-pro-u-boot.dtsi: Enable edp +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -827,12 +738,13 @@ Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi + rockchip,panel = <&edp_panel>; +}; -From patchwork Fri Sep 25 18:37:01 2020 +From patchwork Tue Oct 27 13:21:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371532 +X-Patchwork-Id: 1388578 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -846,36 +758,35 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Bygsg53Gnz9sSJ - for ; Sat, 26 Sep 2020 04:48:23 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 4CLC9J4D9wz9sSf + for ; Wed, 28 Oct 2020 00:24:35 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id C15BF82513; - Fri, 25 Sep 2020 20:47:13 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 164CE82494; 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Tue, 27 Oct 2020 14:23:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 9A94A180ACB; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.648221737@rtp-net.org> + id B8905180904; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132235.984153676@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:37:01 +0200 +Date: Tue, 27 Oct 2020 14:21:37 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -883,10 +794,11 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 7/8] RFC: configs/pinebook-pro-rk3399_defconfig: enable +Subject: [patch v2 06/10] configs/pinebook-pro-rk3399_defconfig: enable SYS_USB_EVENT_POLL_VIA_INT_QUEUE -References: <20200925183654.723338620@rtp-net.org> +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -927,54 +839,57 @@ Index: u-boot/configs/pinebook-pro-rk3399_defconfig CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_RTL8152=y -From patchwork Fri Sep 25 18:37:02 2020 +From patchwork Tue Oct 27 13:21:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1371531 +X-Patchwork-Id: 1388584 +X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4BygsV69FWz9sS8 - for ; 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Fri, 25 Sep 2020 20:46:45 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 51B9D82483 + for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id B7788180ACE; Fri, 25 Sep 2020 20:46:43 +0200 (CEST) -Message-ID: <20200925183856.699546249@rtp-net.org> + id CD3AC180A2B; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132236.036333749@rtp-net.org> User-Agent: quilt/0.66 -Date: Fri, 25 Sep 2020 20:37:02 +0200 +Date: Tue, 27 Oct 2020 14:21:38 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -982,9 +897,10 @@ Cc: Kever Yang , Philipp Tomsich , Peter Robinson , Samuel Dionne-Riel , + Alper Nebi Yasak , Arnaud Patard -Subject: [patch 8/8] RFC: drivers/pwm/rk_pwm.c: Fix default polarity -References: <20200925183654.723338620@rtp-net.org> +Subject: [patch v2 07/10] drivers/pwm/rk_pwm.c: Fix default polarity +References: <20201027132131.016984025@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -1011,6 +927,7 @@ Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE by default instead. Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak Index: u-boot/drivers/pwm/rk_pwm.c =================================================================== @@ -1025,3 +942,438 @@ Index: u-boot/drivers/pwm/rk_pwm.c return 0; } + +From patchwork Tue Oct 27 13:21:39 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1388585 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CLCBc1H6Xz9sSG + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id ECF51180ACB; Tue, 27 Oct 2020 14:23:43 +0100 (CET) +Message-ID: <20201027132236.086716818@rtp-net.org> +User-Agent: quilt/0.66 +Date: Tue, 27 Oct 2020 14:21:39 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v2 08/10] drivers/video/rockchip/rk_vop.c: Fix format of + fbbase in debug string +References: <20201027132131.016984025@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The debug string printing the device name, framebuffer address and of node +is using %lu as format for the framebuffer address, which is not so nice. +Change it to %lx. + +Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -239,7 +239,7 @@ static int rk_display_init(struct udevic + ofnode remote; + const char *compat; + +- debug("%s(%s, %lu, %s)\n", __func__, ++ debug("%s(%s, %lx, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); + + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); + +From patchwork Tue Oct 27 13:21:40 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1388579 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CLC9j13jpz9sSG + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 24EC8180ACE; Tue, 27 Oct 2020 14:23:44 +0100 (CET) +Message-ID: <20201027132236.137690139@rtp-net.org> +User-Agent: quilt/0.66 +Date: Tue, 27 Oct 2020 14:21:40 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v2 09/10] drivers/video/rockchip/rk_edp.c: Add missing reset + support +References: <20201027132131.016984025@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +In order to ensure that the eDP registers are in correct state, +add missing support for the eDP reset lines found in the device-tree. + + +Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -8,11 +8,13 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -1047,6 +1049,7 @@ static int rk_edp_probe(struct udevice * + struct rk_edp_priv *priv = dev_get_priv(dev); + struct rk3288_edp *regs = priv->regs; + struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); ++ struct reset_ctl dp_rst; + + struct clk clk; + int ret; +@@ -1059,6 +1062,25 @@ static int rk_edp_probe(struct udevice * + return ret; + } + ++ ret = reset_get_by_name(dev, "dp", &dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ ++ ret = reset_assert(&dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ udelay(20); ++ ++ ret = reset_deassert(&dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ + int vop_id = uc_plat->source_id; + debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + + +From patchwork Tue Oct 27 13:21:41 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1388586 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Tue, 27 Oct 2020 14:23:52 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, + URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 7009E8249C + for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 2F20C180AF9; Tue, 27 Oct 2020 14:23:44 +0100 (CET) +Message-ID: <20201027132236.187863854@rtp-net.org> +User-Agent: quilt/0.66 +Date: Tue, 27 Oct 2020 14:21:41 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v2 10/10] drivers/video/rockchip/rk_vop.c: Add reset support +References: <20201027132131.016984025@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +In order to ensure that the VOP registers are in correct state, +add missing support for the VOP reset lines found in the device-tree + +Signed-off-by: Arnaud Patard +Tested-by: Alper Nebi Yasak + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -8,9 +8,11 @@ + #include + #include + #include ++#include + #include + #include + #include ++#include + #include + #include + #include +@@ -36,14 +38,16 @@ enum vop_pol { + DCLK_INVERT = 3 + }; + +-static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, ++static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, + int fb_bits_per_pixel, +- const struct display_timing *edid) ++ const struct display_timing *edid, ++ struct reset_ctl *dclk_rst) + { + u32 lb_mode; + u32 rgb_mode; + u32 hactive = edid->hactive.typ; + u32 vactive = edid->vactive.typ; ++ int ret; + + writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), + ®s->win0_act_info); +@@ -91,6 +95,18 @@ static void rkvop_enable(struct rk3288_v + + writel(fbbase, ®s->win0_yrgb_mst); + writel(0x01, ®s->reg_cfg_done); /* enable reg config */ ++ ++ ret = reset_assert(dclk_rst); ++ if (ret) { ++ dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret); ++ return; ++ } ++ udelay(20); ++ ++ ret = reset_deassert(dclk_rst); ++ if (ret) ++ dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret); ++ + } + + static void rkvop_set_pin_polarity(struct udevice *dev, +@@ -238,6 +254,7 @@ static int rk_display_init(struct udevic + enum video_log2_bpp l2bpp; + ofnode remote; + const char *compat; ++ struct reset_ctl dclk_rst; + + debug("%s(%s, %lx, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); +@@ -354,7 +371,14 @@ static int rk_display_init(struct udevic + } + + rkvop_mode_set(dev, &timing, vop_id); +- rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); ++ ++ ret = reset_get_by_name(dev, "dclk", &dclk_rst); ++ if (ret) { ++ dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret); ++ return ret; ++ } ++ ++ rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); + + ret = display_enable(disp, 1 << l2bpp, &timing); + if (ret) +@@ -391,11 +415,31 @@ int rk_vop_probe(struct udevice *dev) + struct rk_vop_priv *priv = dev_get_priv(dev); + int ret = 0; + ofnode port, node; ++ struct reset_ctl ahb_rst; + + /* Before relocation we don't need to do anything */ + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + ++ ret = reset_get_by_name(dev, "ahb", &ahb_rst); ++ if (ret) { ++ dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret); ++ return ret; ++ } ++ ++ ret = reset_assert(&ahb_rst); ++ if (ret) { ++ dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret); ++ return ret; ++ } ++ udelay(20); ++ ++ ret = reset_deassert(&ahb_rst); ++ if (ret) { ++ dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret); ++ return ret; ++ } ++ + plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; + + #if defined(CONFIG_EFI_LOADER) diff --git a/rk3399-reset-display-hack.patch b/rk3399-reset-display-hack.patch deleted file mode 100644 index 67adeb3..0000000 --- a/rk3399-reset-display-hack.patch +++ /dev/null @@ -1,46 +0,0 @@ -[HACK NOTFORMERGE] PBP: Fix panel reset - -On warm reset, the pinebook pro panel is not working correctly. -The issue is not yet debugged so, for now, this hack seems to be -enough. It toggles the GPIO1_C6 gpio [ LCDVCC_EN signal in the -schematics ] used by the vcc3v3_panel regulator. - -There's no gpio_request, since the gpio is already in use at this -stage, so it can only fail. -Index: u-boot/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c -=================================================================== ---- u-boot.orig/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c -+++ u-boot/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c -@@ -7,9 +7,12 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -59,6 +62,7 @@ int misc_init_r(void) - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; -+ unsigned int gpio; - - setup_iodomain(); - -@@ -70,6 +74,11 @@ int misc_init_r(void) - if (ret) - return ret; - -+ gpio_lookup_name("B22", NULL, NULL, &gpio); -+ gpio_direction_output(gpio, 0); -+ mdelay(500); -+ gpio_direction_output(gpio, 1); -+ - return ret; - } - #endif diff --git a/uboot-tools.spec b/uboot-tools.spec index f9f20b4..9cbd2ad 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -36,10 +36,9 @@ Patch11: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch Patch12: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch14: rk3399-Pinebook-pro-EDP-support.patch -Patch15: rk3399-reset-display-hack.patch -Patch16: rockchip-Rock960-Fix-up-USB-support.patch -Patch17: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch +Patch14: rockchip-Rock960-Fix-up-USB-support.patch +Patch15: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch +Patch16: rk3399-Pinebook-pro-EDP-support.patch BuildRequires: bc BuildRequires: dtc @@ -255,6 +254,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %changelog * Sun Nov 8 2020 Peter Robinson - 2020.10-3 - Fix SPI on Rockchip devices +- Latest Pinebook Pro display patches * Wed Oct 28 2020 Peter Robinson - 2020.10-2 - Fix kernel installs for non EBBR systems From 39205cc2da444a73f116c8ac794fe2d47370c059 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 10 Nov 2020 10:25:30 +0000 Subject: [PATCH 111/351] Fix Keyboard and USB-A ports on Pinebook Pro Signed-off-by: Peter Robinson --- rk3399-Pinebook-pro-EDP-support.patch | 101 -------------------------- rockchip-Pinebook-Pro-Fix-USB.patch | 39 ++++++++++ uboot-tools.spec | 2 + 3 files changed, 41 insertions(+), 101 deletions(-) create mode 100644 rockchip-Pinebook-Pro-Fix-USB.patch diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch index ae07e11..3fd30cb 100644 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -738,107 +738,6 @@ Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi + rockchip,panel = <&edp_panel>; +}; -From patchwork Tue Oct 27 13:21:37 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388578 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLC9J4D9wz9sSf - for ; Wed, 28 Oct 2020 00:24:35 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 164CE82494; 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Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.984153676@rtp-net.org> -User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:37 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v2 06/10] configs/pinebook-pro-rk3399_defconfig: enable - SYS_USB_EVENT_POLL_VIA_INT_QUEUE -References: <20201027132131.016984025@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -The default configuration will use SYS_USB_EVENT_POLL for handling the -usb keyboard and it makes the system really slow (eg slow keypress, -loading kernel/initrd from grub-efi is taking ages). - -Using CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE seems to be improving -things a lot, so use it. - -Tested-by: Samuel Dionne-Riel -Signed-off-by: Arnaud Patard - -Index: u-boot/configs/pinebook-pro-rk3399_defconfig -=================================================================== ---- u-boot.orig/configs/pinebook-pro-rk3399_defconfig -+++ u-boot/configs/pinebook-pro-rk3399_defconfig -@@ -78,6 +78,7 @@ CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC3=y - CONFIG_ROCKCHIP_USB2_PHY=y - CONFIG_USB_KEYBOARD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_RTL8152=y - From patchwork Tue Oct 27 13:21:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 diff --git a/rockchip-Pinebook-Pro-Fix-USB.patch b/rockchip-Pinebook-Pro-Fix-USB.patch new file mode 100644 index 0000000..8f81454 --- /dev/null +++ b/rockchip-Pinebook-Pro-Fix-USB.patch @@ -0,0 +1,39 @@ +From 12bc3e2c7c805f989629d1a546276491a7d28922 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 9 Nov 2020 23:01:19 +0000 +Subject: [PATCH] rockchip: Pinebook Pro: Fix USB + +Improve USB config so keyboard and USB-A ports work. + +Signed-off-by: Peter Robinson +--- + configs/pinebook-pro-rk3399_defconfig | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 1ed54ad0ed..8fbd7280ac 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -55,6 +55,8 @@ CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y + CONFIG_NVME=y + CONFIG_PCI=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y + CONFIG_DM_PMIC_FAN53555=y + CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y +@@ -76,8 +78,9 @@ CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC3=y +-CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_KEYBOARD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_RTL8152=y +-- +2.28.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 9cbd2ad..8b15690 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -39,6 +39,7 @@ Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch14: rockchip-Rock960-Fix-up-USB-support.patch Patch15: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch Patch16: rk3399-Pinebook-pro-EDP-support.patch +Patch17: rockchip-Pinebook-Pro-Fix-USB.patch BuildRequires: bc BuildRequires: dtc @@ -255,6 +256,7 @@ cp -p board/warp7/README builds/docs/README.warp7 * Sun Nov 8 2020 Peter Robinson - 2020.10-3 - Fix SPI on Rockchip devices - Latest Pinebook Pro display patches +- Fix Keyboard and USB-A ports on Pinebook Pro * Wed Oct 28 2020 Peter Robinson - 2020.10-2 - Fix kernel installs for non EBBR systems From 63553e6b2a576110e3e088d556dc9fb04e0cf9c0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 10 Nov 2020 13:22:57 +0000 Subject: [PATCH 112/351] Disable rockchip offset patch for the moment --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 8b15690..e2d64d3 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -19,7 +19,7 @@ Source5: 10-devicetree.install Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Needed due to issues with shim Patch2: uefi-use-Fedora-specific-path-name.patch -Patch3: rockchip-spl-u-boot-itb-offset.patch +#Patch3: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support From 0d5a9f5f0bbb3d4259118b0d9d66161347380a08 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Nov 2020 10:43:24 +0000 Subject: [PATCH 113/351] 2021.01 RC2 Latest Pinebook Pro display patches Initial RPi-400 support patch Update Fedora specific patches --- 10-devicetree.install | 73 ---- rk3399-Pinebook-pro-EDP-support.patch | 343 +++++++++--------- rockchip-Rock960-Fix-up-USB-support.patch | 66 ---- sources | 2 +- uboot-tools.spec | 36 +- ...DT-from-any-partition-on-boot-device.patch | 22 +- uefi-use-Fedora-specific-path-name.patch | 22 +- 7 files changed, 199 insertions(+), 365 deletions(-) delete mode 100755 10-devicetree.install delete mode 100644 rockchip-Rock960-Fix-up-USB-support.patch diff --git a/10-devicetree.install b/10-devicetree.install deleted file mode 100755 index 3345391..0000000 --- a/10-devicetree.install +++ /dev/null @@ -1,73 +0,0 @@ -#!/bin/bash - -# set -x - -if [[ "$(uname -m)" == arm* || "$(uname -m)" == aarch64 ]] -then -COMMAND="$1" -KERNEL_VERSION="$2" -#BOOT_DIR_ABS="$3" -#KERNEL_IMAGE="$4" - -[ -f /etc/u-boot.conf ] && source /etc/u-boot.conf || true -[ -z "$FIRMWAREDT" ] || FirmwareDT=$FIRMWAREDT - -if [[ $FirmwareDT == "True" ]] -then - # if we want to use firmware DT we remove symlink to current kernel DT - if [ -h /boot/dtb ]; then - rm -f /boot/dtb - fi - exit 0 -fi - -# Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that -# u-boot can find the correct dtb to load. -# -# If invoked to 'add' a new kernel, find the newest based on `sort`ing -# the kernel versions dtb. If 'remove', then follow basically the same -# procedure but exclude the version currently being removed. -# -# The theory of operation here is that, while newer kernels may add new -# dtb nodes and fields, as upstreaming hw support for some particular -# device progresses, it should never make backward incompatible changes. -# So it should always be safe to use a newer dtb with an older kernel. - - list_dtb_versions() { - excluded_version="$1" - for dtbdir in /boot/dtb-*; do - dtbver=${dtbdir#*-} - if [ "$dtbver" != "$excluded_version" ]; then - echo $dtbver - fi - done - } - - setup_dtb_link() { - ver=`list_dtb_versions $1 | sort -r --sort=version | head -1` - if [ -h /boot/dtb ]; then - rm -f /boot/dtb - fi - ln -s dtb-$ver /boot/dtb - } - - ret=0 - case "$COMMAND" in - add) - # If we're adding a kernel we want that version - if [ -h /boot/dtb ]; then - rm -f /boot/dtb - fi - ln -s dtb-$KERNEL_VERSION /boot/dtb - ret=$? - ;; - remove) - setup_dtb_link $KERNEL_VERSION - ret=$? - ;; - esac - exit $ret -else - # Just exit on non ARM - exit 0 -fi diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch index 3fd30cb..1851fcd 100644 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -1,34 +1,34 @@ -From patchwork Tue Oct 27 13:21:32 2020 +From patchwork Fri Nov 20 13:24:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388576 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403693 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLC8m2r2mz9sV1 - for ; Wed, 28 Oct 2020 00:24:08 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4Ccy8k6NTZz9sT6 + for ; Sat, 21 Nov 2020 00:30:14 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id AD95E823FC; - Tue, 27 Oct 2020 14:23:49 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id CA2FF82552; + Fri, 20 Nov 2020 14:29:53 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 37F7C8249E; Tue, 27 Oct 2020 14:23:47 +0100 (CET) + id F16538232D; Fri, 20 Nov 2020 14:29:46 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -36,17 +36,17 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 65DDC81260 - for ; Tue, 27 Oct 2020 14:23:44 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 379648232D + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 166971802C6; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.729230758@rtp-net.org> + id 29B3C18054C; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.638207109@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:32 +0100 +Date: Fri, 20 Nov 2020 14:24:22 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -56,9 +56,9 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 01/10] drivers/video/rockchip/rk_vop.c: Use endpoint - compatible string to find VOP mode -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 1/9] rockchip: video: vop: Use endpoint compatible string + to find VOP mode +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -87,7 +87,6 @@ to find the kind of endpoint by comparing the endpoint compatible value. This patch is implementing the more flexible second solution. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h =================================================================== @@ -169,38 +168,36 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c disp_uc_plat = dev_get_uclass_platdata(disp); debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); -From patchwork Tue Oct 27 13:21:33 2020 +From patchwork Fri Nov 20 13:24:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388588 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403700 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLCC535Xyz9sV1 - for ; Wed, 28 Oct 2020 00:26:07 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CcyC43w72z9sTv + for ; Sat, 21 Nov 2020 00:32:16 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id F3D8182517; - Tue, 27 Oct 2020 14:24:08 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id F3481825F6; + Fri, 20 Nov 2020 14:30:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 99F18824A7; Tue, 27 Oct 2020 14:23:53 +0100 (CET) + id 32EBC825A4; Fri, 20 Nov 2020 14:29:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -209,17 +206,17 @@ Received: from lechat.rtp-net.org (lechat.rtp-net.org [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 6CEE382496 - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id B9D9782384 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 354541806F5; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.781283753@rtp-net.org> + id 39BC31807FD; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.697547510@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:33 +0100 +Date: Fri, 20 Nov 2020 14:24:23 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -229,8 +226,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 02/10] drivers/video/rockchip/rk_edp.c: Add rk3399 support -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 2/9] rockchip: video: edp: Add rk3399 support +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -259,7 +256,6 @@ on rk3399, so don't try changing the clock at index 1 to rate 0 on rk3399. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_edp.c =================================================================== @@ -325,7 +321,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | V2L_CUR_SEL_1MA, ®s->pll_reg_2); -@@ -1023,6 +1046,8 @@ static int rk_edp_probe(struct udevice * +@@ -1029,6 +1052,8 @@ static int rk_edp_probe(struct udevice * struct display_plat *uc_plat = dev_get_uclass_platdata(dev); struct rk_edp_priv *priv = dev_get_priv(dev); struct rk3288_edp *regs = priv->regs; @@ -334,7 +330,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c struct clk clk; int ret; -@@ -1037,16 +1062,17 @@ static int rk_edp_probe(struct udevice * +@@ -1043,16 +1068,17 @@ static int rk_edp_probe(struct udevice * int vop_id = uc_plat->source_id; debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); @@ -361,7 +357,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); if (ret >= 0) { ret = clk_set_rate(&clk, 192000000); -@@ -1059,15 +1085,17 @@ static int rk_edp_probe(struct udevice * +@@ -1065,15 +1091,17 @@ static int rk_edp_probe(struct udevice * } /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ @@ -383,7 +379,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c rk_edp_init_interrupt(regs); rk_edp_enable_sw_function(regs); ret = rk_edp_init_analog_func(regs); -@@ -1083,8 +1111,25 @@ static const struct dm_display_ops dp_ro +@@ -1089,8 +1117,25 @@ static const struct dm_display_ops dp_ro .enable = rk_edp_enable, }; @@ -427,13 +423,12 @@ Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h /* line_map */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) -From patchwork Tue Oct 27 13:21:34 2020 +From patchwork Fri Nov 20 13:24:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388575 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403694 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -445,20 +440,19 @@ Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLC8l3jS0z9sSG - for ; Wed, 28 Oct 2020 00:23:56 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4Ccy8z1vdvz9sT6 + for ; Sat, 21 Nov 2020 00:30:26 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 4A07082361; - Tue, 27 Oct 2020 14:23:48 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 54C2A825A4; + Fri, 20 Nov 2020 14:30:12 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 1BE93824A7; Tue, 27 Oct 2020 14:23:47 +0100 (CET) + id 1EC30825AB; Fri, 20 Nov 2020 14:29:47 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -466,17 +460,17 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id BEBE082361 - for ; Tue, 27 Oct 2020 14:23:44 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 6507782366 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 5A45C1808B6; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.832232313@rtp-net.org> + id 44C66180A3F; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.748319735@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:34 +0100 +Date: Fri, 20 Nov 2020 14:24:24 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -486,9 +480,9 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 03/10] drivers/video/rockchip/rk_edp.c: Change interrupt - polarity configuration -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 3/9] ockchip: video: edp: Change interrupt polarity + configuration +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -511,7 +505,6 @@ uboot code is setting it to 1. Change the configuration to match the linux configuration Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h =================================================================== @@ -529,13 +522,12 @@ Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h /* sys_ctl_1 */ #define DET_STA (0x1 << 2) -From patchwork Tue Oct 27 13:21:35 2020 +From patchwork Fri Nov 20 13:24:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388577 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403697 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -549,35 +541,36 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLC932V0Bz9sSG - for ; Wed, 28 Oct 2020 00:24:22 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CcyBG0XK7z9sVC + for ; Sat, 21 Nov 2020 00:31:33 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 129E182496; - Tue, 27 Oct 2020 14:23:55 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 82245825AA; + Fri, 20 Nov 2020 14:30:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 7EA32824BC; Tue, 27 Oct 2020 14:23:49 +0100 (CET) + id A2EE5825BB; Fri, 20 Nov 2020 14:29:54 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id ED572823FC - for ; Tue, 27 Oct 2020 14:23:44 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id BBD6B82591 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 6676F1808BC; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.883717675@rtp-net.org> + id 6ED14180A47; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.799855386@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:35 +0100 +Date: Fri, 20 Nov 2020 14:24:25 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -587,9 +580,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 04/10] drivers/video/rockchip/rk_vop.c: Reserve efi fb - memory -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 4/9] ockchip: video: vop: Reserve efi fb memory +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -612,7 +604,6 @@ has to be reserved, otherwise it may leads to kernel memory overwrite. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_vop.c =================================================================== @@ -642,56 +633,56 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c /* -From patchwork Tue Oct 27 13:21:36 2020 +From patchwork Fri Nov 20 13:24:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388583 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403695 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLCB85bVhz9sSf - for ; Wed, 28 Oct 2020 00:25:20 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4Ccy9V13SHz9sTL + for ; Sat, 21 Nov 2020 00:30:53 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 1CD88824E5; - Tue, 27 Oct 2020 14:24:01 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 54822825C3; + Fri, 20 Nov 2020 14:30:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 15038824A9; Tue, 27 Oct 2020 14:23:50 +0100 (CET) + id 2796E825A0; Fri, 20 Nov 2020 14:29:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) +Received: from lechat.rtp-net.org (lechat.rtp-net.org + [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 16A2C8246A - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id E8AB4825A2 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 8FBF11808D1; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132235.934181387@rtp-net.org> + id 7FA88180A70; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.849890740@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:36 +0100 +Date: Fri, 20 Nov 2020 14:24:26 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -701,8 +692,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 05/10] rk3399-pinebook-pro-u-boot.dtsi: Enable edp -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 5/9] rockchip: Pinebook Pro: Enable edp +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -729,22 +720,24 @@ Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi =================================================================== --- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -49,3 +49,7 @@ - &vdd_log { - regulator-init-microvolt = <950000>; +@@ -20,6 +20,10 @@ + }; }; -+ + +&edp { + rockchip,panel = <&edp_panel>; +}; ++ + &i2c0 { + u-boot,dm-pre-reloc; + }; -From patchwork Tue Oct 27 13:21:38 2020 +From patchwork Fri Nov 20 13:24:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388584 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403696 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -759,17 +752,17 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLCBN6wXXz9sSG - for ; Wed, 28 Oct 2020 00:25:32 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4Ccy9w51kSz9sT6 + for ; Sat, 21 Nov 2020 00:31:16 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id E86AC824F1; - Tue, 27 Oct 2020 14:24:03 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 39197825D4; + Fri, 20 Nov 2020 14:30:22 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id DED28824A9; Tue, 27 Oct 2020 14:23:51 +0100 (CET) + id 1BDA2825C3; Fri, 20 Nov 2020 14:29:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -778,17 +771,17 @@ Received: from lechat.rtp-net.org (lechat.rtp-net.org [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 51B9D82483 - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id E6C7F825A0 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id CD3AC180A2B; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132236.036333749@rtp-net.org> + id 98B36180A7D; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.910975188@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:38 +0100 +Date: Fri, 20 Nov 2020 14:24:27 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -798,8 +791,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 07/10] drivers/pwm/rk_pwm.c: Fix default polarity -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 6/9] rockchip: pwm: Fix default polarity +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -826,7 +819,6 @@ Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE by default instead. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/pwm/rk_pwm.c =================================================================== @@ -842,56 +834,55 @@ Index: u-boot/drivers/pwm/rk_pwm.c return 0; } -From patchwork Tue Oct 27 13:21:39 2020 +From patchwork Fri Nov 20 13:24:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388585 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403702 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLCBc1H6Xz9sSG - for ; Wed, 28 Oct 2020 00:25:44 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CcyCX6HJRz9sTv + for ; Sat, 21 Nov 2020 00:32:40 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id A78FF824FC; - Tue, 27 Oct 2020 14:24:05 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id EE6E482605; + Fri, 20 Nov 2020 14:30:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 038C68248F; Tue, 27 Oct 2020 14:23:52 +0100 (CET) + id 3C66C82591; Fri, 20 Nov 2020 14:30:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org - [IPv6:2001:bc8:3430:1000::c0f:fee]) +Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 5684482494 - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id F3045825AA + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id ECF51180ACB; Tue, 27 Oct 2020 14:23:43 +0100 (CET) -Message-ID: <20201027132236.086716818@rtp-net.org> + id B6F29180ACB; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132823.962072859@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:39 +0100 +Date: Fri, 20 Nov 2020 14:24:28 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -901,9 +892,9 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 08/10] drivers/video/rockchip/rk_vop.c: Fix format of - fbbase in debug string -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 7/9] rockchip: video: vop: Fix format of fbbase in debug + string +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -926,7 +917,6 @@ is using %lu as format for the framebuffer address, which is not so nice. Change it to %lx. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_vop.c =================================================================== @@ -942,39 +932,36 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); -From patchwork Tue Oct 27 13:21:40 2020 +From patchwork Fri Nov 20 13:24:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388579 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403698 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLC9j13jpz9sSG - for ; Wed, 28 Oct 2020 00:24:56 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CcyBb1882z9sT6 + for ; Sat, 21 Nov 2020 00:31:51 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 83485824BC; - Tue, 27 Oct 2020 14:23:57 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id C6B40825DF; + Fri, 20 Nov 2020 14:30:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id A548C824AD; Tue, 27 Oct 2020 14:23:49 +0100 (CET) + id A7375825B9; Fri, 20 Nov 2020 14:29:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -982,17 +969,17 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 547EC8248F - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 04A88825A6 + for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 24EC8180ACE; Tue, 27 Oct 2020 14:23:44 +0100 (CET) -Message-ID: <20201027132236.137690139@rtp-net.org> + id E02FE180ACE; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132824.012845278@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:40 +0100 +Date: Fri, 20 Nov 2020 14:24:29 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -1002,9 +989,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 09/10] drivers/video/rockchip/rk_edp.c: Add missing reset - support -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 8/9] rockchip: video: edp: Add missing reset support +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -1027,7 +1013,6 @@ add missing support for the eDP reset lines found in the device-tree. Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_edp.c =================================================================== @@ -1047,7 +1032,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c #include #include #include -@@ -1047,6 +1049,7 @@ static int rk_edp_probe(struct udevice * +@@ -1053,6 +1055,7 @@ static int rk_edp_probe(struct udevice * struct rk_edp_priv *priv = dev_get_priv(dev); struct rk3288_edp *regs = priv->regs; struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); @@ -1055,7 +1040,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c struct clk clk; int ret; -@@ -1059,6 +1062,25 @@ static int rk_edp_probe(struct udevice * +@@ -1065,6 +1068,25 @@ static int rk_edp_probe(struct udevice * return ret; } @@ -1082,13 +1067,12 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); -From patchwork Tue Oct 27 13:21:41 2020 +From patchwork Fri Nov 20 13:24:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1388586 -X-Patchwork-Delegate: ykai007@gmail.com +X-Patchwork-Id: 1403699 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -1102,17 +1086,17 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CLCBq60Vjz9sSf - for ; Wed, 28 Oct 2020 00:25:55 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CcyBq0jYrz9sTL + for ; Sat, 21 Nov 2020 00:32:02 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id EE5EB82508; - Tue, 27 Oct 2020 14:24:06 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id E40ED825E8; + Fri, 20 Nov 2020 14:30:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 7F9D582494; Tue, 27 Oct 2020 14:23:52 +0100 (CET) + id EB086825AB; Fri, 20 Nov 2020 14:29:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, @@ -1121,17 +1105,17 @@ Received: from lechat.rtp-net.org (lechat.rtp-net.org [IPv6:2001:bc8:3430:1000::c0f:fee]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 7009E8249C - for ; Tue, 27 Oct 2020 14:23:45 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 29B89825A4 + for ; Fri, 20 Nov 2020 14:29:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rtp-net.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 2F20C180AF9; Tue, 27 Oct 2020 14:23:44 +0100 (CET) -Message-ID: <20201027132236.187863854@rtp-net.org> + id 0EC35180AF9; Fri, 20 Nov 2020 14:29:43 +0100 (CET) +Message-ID: <20201120132824.063180167@rtp-net.org> User-Agent: quilt/0.66 -Date: Tue, 27 Oct 2020 14:21:41 +0100 +Date: Fri, 20 Nov 2020 14:24:30 +0100 From: Arnaud Patard (Rtp) To: u-boot@lists.denx.de Cc: Kever Yang , @@ -1141,8 +1125,8 @@ Cc: Kever Yang , Samuel Dionne-Riel , Alper Nebi Yasak , Arnaud Patard -Subject: [patch v2 10/10] drivers/video/rockchip/rk_vop.c: Add reset support -References: <20201027132131.016984025@rtp-net.org> +Subject: [patch v3 9/9] rockchip: videp: vop: Add reset support +References: <20201120132421.500365403@rtp-net.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -1164,7 +1148,6 @@ In order to ensure that the VOP registers are in correct state, add missing support for the VOP reset lines found in the device-tree Signed-off-by: Arnaud Patard -Tested-by: Alper Nebi Yasak Index: u-boot/drivers/video/rockchip/rk_vop.c =================================================================== diff --git a/rockchip-Rock960-Fix-up-USB-support.patch b/rockchip-Rock960-Fix-up-USB-support.patch deleted file mode 100644 index 5102787..0000000 --- a/rockchip-Rock960-Fix-up-USB-support.patch +++ /dev/null @@ -1,66 +0,0 @@ -From aec6cfccd62e21bdb8686839a22eaff5f8cece1d Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 29 Sep 2020 13:12:15 +0100 -Subject: [PATCH] rockchip: Rock960: fix up USB support - -Fix up USB config options so keyboards and other USB devices work. ---- - configs/rock960-rk3399_defconfig | 9 ++++++--- - include/configs/rock960_rk3399.h | 2 ++ - 2 files changed, 8 insertions(+), 3 deletions(-) - -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 1d997847c2..a5a50785c5 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 - CONFIG_ENV_OFFSET=0x3F8000 - CONFIG_ROCKCHIP_RK3399=y --CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 - CONFIG_TARGET_ROCK960_RK3399=y - CONFIG_DEBUG_UART_BASE=0xFF1A0000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" - CONFIG_MISC_INIT_R=y - CONFIG_DISPLAY_BOARDINFO_LATE=y -@@ -41,6 +41,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_NVME=y - CONFIG_PCI=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_TYPEC=y - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y -@@ -54,10 +56,11 @@ CONFIG_USB_XHCI_HCD=y - CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC3=y --CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_DM_KEYBOARD=y - CONFIG_USB_KEYBOARD=y --CONFIG_USB_GADGET=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_ASIX88179=y -diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h -index c6f9122154..2edad71028 100644 ---- a/include/configs/rock960_rk3399.h -+++ b/include/configs/rock960_rk3399.h -@@ -15,4 +15,6 @@ - - #define SDRAM_BANK_SIZE (2UL << 30) - -+#define CONFIG_USB_OHCI_NEW -+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif --- -2.26.2 - diff --git a/sources b/sources index 532714c..2551a01 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2020.10.tar.bz2) = fd26534f2d72ffc3167919c32067c550636f6a4ee5fead6937e2583ba4ff6165e88b8b50fbbddde7354a8c42701433d0cb2ce982e43c014db60b08415288baf9 +SHA512 (u-boot-2021.01-rc2.tar.bz2) = ac21ed6ce160de377a8ea5750cd617f1c6d6e2b9508c8999fafb641e210e3bd030dcd26cea38259639c45ae0d0b9fda6d1007c547fdee002d8d946d6fb1952bb diff --git a/uboot-tools.spec b/uboot-tools.spec index e2d64d3..39a089a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc5 +%global candidate rc2 Name: uboot-tools -Version: 2020.10 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2021.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -12,7 +12,6 @@ Source1: arm-boards Source2: arm-chromebooks Source3: aarch64-boards Source4: aarch64-chromebooks -Source5: 10-devicetree.install # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition @@ -23,7 +22,8 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support -Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch4: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch5: rpi-Add-identifier-for-the-new-RPi400.patch # Tegra improvements Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch @@ -36,10 +36,9 @@ Patch11: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch Patch12: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch14: rockchip-Rock960-Fix-up-USB-support.patch -Patch15: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch -Patch16: rk3399-Pinebook-pro-EDP-support.patch -Patch17: rockchip-Pinebook-Pro-Fix-USB.patch +Patch14: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch +Patch15: rk3399-Pinebook-pro-EDP-support.patch +Patch16: rockchip-Pinebook-Pro-Fix-USB.patch BuildRequires: bc BuildRequires: dtc @@ -68,13 +67,7 @@ BuildRequires: vboot-utils %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 %endif - Requires: dtc -Requires: systemd -%ifarch aarch64 %{arm} -Obsoletes: uboot-images-elf < 2019.07 -Provides: uboot-images-elf < 2019.07 -%endif %description This package contains a few U-Boot utilities - mkimage for creating boot images @@ -83,7 +76,6 @@ and fw_printenv/fw_setenv for manipulating the boot environment variables. %ifarch aarch64 %package -n uboot-images-armv8 Summary: U-Boot firmware images for aarch64 boards -Requires: uboot-tools BuildArch: noarch %description -n uboot-images-armv8 @@ -93,7 +85,6 @@ U-Boot firmware binaries for aarch64 boards %ifarch %{arm} %package -n uboot-images-armv7 Summary: U-Boot firmware images for armv7 boards -Requires: uboot-tools BuildArch: noarch %description -n uboot-images-armv7 @@ -210,10 +201,6 @@ install -p -m 0755 builds/tools/env/fw_printenv $RPM_BUILD_ROOT%{_bindir} install -p -m 0644 tools/env/fw_env.config $RPM_BUILD_ROOT%{_sysconfdir} -# systemd kernel-install script for device tree -mkdir -p $RPM_BUILD_ROOT/lib/kernel/install.d/ -install -p -m 0755 %{SOURCE5} $RPM_BUILD_ROOT/lib/kernel/install.d/ - # Copy sone useful docs over mkdir -p builds/docs cp -p board/hisilicon/hikey/README builds/docs/README.hikey @@ -238,7 +225,6 @@ cp -p board/warp7/README builds/docs/README.warp7 %doc doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* -/lib/kernel/install.d/10-devicetree.install %dir %{_datadir}/uboot/ %config(noreplace) %{_sysconfdir}/fw_env.config @@ -253,6 +239,12 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Nov 22 2020 Peter Robinson - 2021.01-0.1.rc2 +- Update to 2021.01 RC2 +- Latest Pinebook Pro display patches +- Initial RPi-400 support patch +- Update Fedora specific patches + * Sun Nov 8 2020 Peter Robinson - 2020.10-3 - Fix SPI on Rockchip devices - Latest Pinebook Pro display patches diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index c5ecb61..9d70978 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -1,6 +1,6 @@ -From 67c05a07288ef24b3ac9d013f35a0868d26a34c7 Mon Sep 17 00:00:00 2001 +From 7f91e98f42f620684fc5a1e918e24cfb838a12c5 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 18 Jun 2019 11:51:21 +0100 +Date: Tue, 24 Nov 2020 10:35:48 +0000 Subject: [PATCH 1/2] distro: load FDT from any partition on boot device In the EFI_LOADER boot path, we were only checking the FAT partition @@ -22,19 +22,17 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know). Signed-off-by: Rob Clark Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 34 ++++++++++++++++++++++----------- - 1 file changed, 23 insertions(+), 11 deletions(-) + include/config_distro_bootcmd.h | 31 ++++++++++++++++++++++--------- + 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 4993303f4d..f4b3b62fca 100644 +index ff29ef5a90..e6a5267159 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h -@@ -138,25 +138,37 @@ - "fi\0" \ - \ +@@ -142,24 +142,37 @@ "load_efi_dtb=" \ -- "load ${devtype} ${devnum}:${distro_bootpart} " \ -- "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \ + "load ${devtype} ${devnum}:${dtb_devp} " \ + "${fdt_addr_r} ${prefix}${efi_fdtfile} && " \ + "run boot_efi_binary\0" \ @@ -67,7 +65,7 @@ index 4993303f4d..f4b3b62fca 100644 + "fi;" \ + "done; " \ + "done; " \ -+ "run boot_efi_binary\0" \ + "run boot_efi_bootmgr;" \ + "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ "efi/boot/"BOOTEFI_NAME"; then " \ @@ -79,5 +77,5 @@ index 4993303f4d..f4b3b62fca 100644 "fi; " \ "setenv efi_fdtfile\0" -- -2.21.0 +2.28.0 diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index f51f79c..6eb691e 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -1,6 +1,6 @@ -From 3cc3f7de06dcf9614554d63b159f0cd6710b96b0 Mon Sep 17 00:00:00 2001 +From 26b8c1e30342515e252ebf779c79b7bbe1d91747 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 18 Jun 2019 12:08:57 +0100 +Date: Tue, 24 Nov 2020 10:37:28 +0000 Subject: [PATCH 2/2] use Fedora specific EFI path/name Signed-off-by: Peter Robinson @@ -9,7 +9,7 @@ Signed-off-by: Peter Robinson 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index f4b3b62fca..2dc8be9815 100644 +index e6a5267159..f8c4f58907 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -92,9 +92,9 @@ @@ -24,27 +24,27 @@ index f4b3b62fca..2dc8be9815 100644 #elif defined(CONFIG_X86_RUN_32BIT) #define BOOTEFI_NAME "bootia32.efi" #elif defined(CONFIG_X86_RUN_64BIT) -@@ -130,7 +130,7 @@ - "bootefi bootmgr ${fdtcontroladdr};" \ - "fi;" \ +@@ -132,7 +132,7 @@ + \ + "boot_efi_binary=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ - "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ + "${kernel_addr_r} efi/fedora/"BOOTEFI_NAME"; " \ "if fdt addr ${fdt_addr_r}; then " \ "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ -@@ -165,9 +165,9 @@ - "run boot_efi_binary\0" \ +@@ -169,9 +169,9 @@ + "run boot_efi_bootmgr;" \ "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/boot/"BOOTEFI_NAME"; then " \ -+ "efi/fedora/"BOOTEFI_NAME"; then " \ ++ "efi/fedora/"BOOTEFI_NAME"; then " \ "echo Found EFI removable media binary " \ - "efi/boot/"BOOTEFI_NAME"; " \ -+ "efi/fedora/"BOOTEFI_NAME"; " \ ++ "efi/fedora/"BOOTEFI_NAME"; " \ "run scan_dev_for_dtb; " \ "echo EFI LOAD FAILED: continuing...; " \ "fi; " \ -- -2.21.0 +2.28.0 From 1c8ae2917fc3e155f6dd770af54f1a4202450133 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Nov 2020 10:48:10 +0000 Subject: [PATCH 114/351] add rpi400 patch --- rpi-Add-identifier-for-the-new-RPi400.patch | 1508 +++++++++++++++++++ 1 file changed, 1508 insertions(+) create mode 100644 rpi-Add-identifier-for-the-new-RPi400.patch diff --git a/rpi-Add-identifier-for-the-new-RPi400.patch b/rpi-Add-identifier-for-the-new-RPi400.patch new file mode 100644 index 0000000..eb8ec31 --- /dev/null +++ b/rpi-Add-identifier-for-the-new-RPi400.patch @@ -0,0 +1,1508 @@ +From patchwork Thu Nov 19 17:48:15 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403195 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRyK4z4fz9sTR + for ; Fri, 20 Nov 2020 04:49:25 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 350D882578; 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+ Thu, 19 Nov 2020 17:49:01 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 1/8] rpi: Add identifier for the new RPi400 +Date: Thu, 19 Nov 2020 18:48:15 +0100 +Message-Id: <20201119174820.7820-2-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The Raspberry Pi Foundation released the new RPi400 which we want to +detect, so we can enable Ethernet on it and know the correct device tree +file name. + +So far the Raspberry Pi foundation is using the RPi4b device-tree file +to boot RPi400. I see no reason not to do the same as they are +completely compatible. + +Signed-off-by: Nicolas Saenz Julienne +--- + board/raspberrypi/rpi/rpi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 6b1fa5fc14..ce60a24352 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -157,6 +157,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2711-rpi-4-b.dtb", + true, + }, ++ [0x13] = { ++ "400", ++ DTB_DIR "bcm2711-rpi-4-b.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { + +From patchwork Thu Nov 19 17:48:16 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403200 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRzB2rFTz9s1l + for ; Fri, 20 Nov 2020 04:50:14 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 647BF825AA; + Thu, 19 Nov 2020 18:49:19 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 8A3B282571; Thu, 19 Nov 2020 18:49:09 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 3FBD7823E1 + for ; Thu, 19 Nov 2020 18:49:02 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 0360EACEB; + Thu, 19 Nov 2020 17:49:02 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 2/8] rpi: Add identifier for the new CM4 +Date: Thu, 19 Nov 2020 18:48:16 +0100 +Message-Id: <20201119174820.7820-3-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The Raspberry Pi Foundation released the new Compute Module 4which we +want to detect, so we can enable Ethernet on it and know the correct +device tree file name. + +Note that this sets the Ethernet option to true since the official CM4 +IO board has an Ethernet port. But that might not be the case when using +custom ones. + +Signed-off-by: Nicolas Saenz Julienne +--- +--- + board/raspberrypi/rpi/rpi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index ce60a24352..4ffd23c6ac 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -162,6 +162,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2711-rpi-4-b.dtb", + true, + }, ++ [0x14] = { ++ "Compute Modue 4", ++ DTB_DIR "bcm2711-rpi-cm4.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { + +From patchwork Thu Nov 19 17:48:17 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403196 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRyb0r6Jz9s1l + for ; Fri, 20 Nov 2020 04:49:43 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id CC8548258E; + Thu, 19 Nov 2020 18:49:11 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id D7281825A1; Thu, 19 Nov 2020 18:49:07 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id B218F8254E + for ; Thu, 19 Nov 2020 18:49:02 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 7CC19ACF1; + Thu, 19 Nov 2020 17:49:02 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 3/8] pci: pcie-brcmstb: Fix inbound window configurations +Date: Thu, 19 Nov 2020 18:48:17 +0100 +Message-Id: <20201119174820.7820-4-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +So far we've assumed a fixed configuration for inbound windows as we had +a single user for this controller. But the controller's DMA constraints +were improved starting with BCM2711's B1 revision of the SoC, notably +available in CM4 and Pi400. They allow for wider inbound windows. We can +now cover the whole address space, whereas before we where limited to +the lower 3GB. + +This information is passed to us through DT's 'dma-ranges' property and +it's specially important for us to honor it them since some interactions +with the board's co-processor assume we're doing so (specifically the +XHCI firmware load operation, which is handled by the co-processor after +u-boot has correctly configured the PCIe controller). + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/pci/pcie_brcmstb.c | 12 +++++------- + 1 file changed, 5 insertions(+), 7 deletions(-) + +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +index dade79e9c8..f6e8ad0d0a 100644 +--- a/drivers/pci/pcie_brcmstb.c ++++ b/drivers/pci/pcie_brcmstb.c +@@ -432,6 +432,7 @@ static int brcm_pcie_probe(struct udevice *dev) + struct pci_controller *hose = dev_get_uclass_priv(ctlr); + struct brcm_pcie *pcie = dev_get_priv(dev); + void __iomem *base = pcie->base; ++ struct pci_region region; + bool ssc_good = false; + int num_out_wins = 0; + u64 rc_bar2_offset, rc_bar2_size; +@@ -468,13 +469,10 @@ static int brcm_pcie_probe(struct udevice *dev) + MISC_CTRL_SCB_ACCESS_EN_MASK | + MISC_CTRL_CFG_READ_UR_MODE_MASK | + MISC_CTRL_MAX_BURST_SIZE_128); +- /* +- * TODO: When support for other SoCs than BCM2711 is added we may +- * need to use the base address and size(s) provided in the dma-ranges +- * property. +- */ +- rc_bar2_offset = 0; +- rc_bar2_size = 0xc0000000; ++ ++ pci_get_dma_regions(dev, ®ion, 0); ++ rc_bar2_offset = region.bus_start - region.phys_start; ++ rc_bar2_size = 1ULL << fls64(region.size - 1); + + tmp = lower_32_bits(rc_bar2_offset); + u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), + +From patchwork Thu Nov 19 17:48:18 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403201 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Thu, 19 Nov 2020 18:49:09 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 3C8D282552 + for ; Thu, 19 Nov 2020 18:49:03 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 01C33ACF5; + Thu, 19 Nov 2020 17:49:03 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 4/8] dm: Introduce xxx_get_dma_range() +Date: Thu, 19 Nov 2020 18:48:18 +0100 +Message-Id: <20201119174820.7820-5-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Add the follwing functions to get a specific device's DMA ranges: + - dev_get_dma_range() + - ofnode_get_dma_range() + - of_get_dma_range() + - fdt_get_dma_range() +They are specially useful in oder to be able validate a physical address +space range into a bus's and to convert addresses from and to address +spaces. + +Signed-off-by: Nicolas Saenz Julienne +--- + common/fdt_support.c | 72 ++++++++++++++++++++++++++++++++++++++++++ + drivers/core/of_addr.c | 68 +++++++++++++++++++++++++++++++++++++++ + drivers/core/ofnode.c | 9 ++++++ + drivers/core/read.c | 5 +++ + include/dm/of_addr.h | 17 ++++++++++ + include/dm/ofnode.h | 16 ++++++++++ + include/dm/read.h | 6 ++++ + include/fdt_support.h | 14 ++++++++ + 8 files changed, 207 insertions(+) + +diff --git a/common/fdt_support.c b/common/fdt_support.c +index 5ae75df3c6..78dc7906bd 100644 +--- a/common/fdt_support.c ++++ b/common/fdt_support.c +@@ -1342,6 +1342,78 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, + return __of_translate_address(blob, node_offset, in_addr, "dma-ranges"); + } + ++int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size) ++{ ++ bool found_dma_ranges = false; ++ const fdt32_t *ranges; ++ int na, ns, pna, pns; ++ int parent = node; ++ u64 cpu_addr; ++ int ret = 0; ++ int len; ++ ++ /* Find the closest dma-ranges property */ ++ while (parent >= 0) { ++ ranges = fdt_getprop(blob, parent, "dma-ranges", &len); ++ ++ /* Ignore empty ranges, they imply no translation required */ ++ if (ranges && len > 0) ++ break; ++ ++ /* Once we find 'dma-ranges', then a missing one is an error */ ++ if (found_dma_ranges && !ranges) { ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ if (ranges) ++ found_dma_ranges = true; ++ ++ parent = fdt_parent_offset(blob, parent); ++ } ++ ++ if (!ranges || parent < 0) { ++ debug("no dma-ranges found for node %s\n", ++ fdt_get_name(blob, node, NULL)); ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ /* switch to that node */ ++ node = parent; ++ parent = fdt_parent_offset(blob, node); ++ if (parent < 0) { ++ printf("Found dma-ranges in root node, shoudln't happen\n"); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ /* Get the address sizes both for the bus and its parent */ ++ of_match_bus(blob, node)->count_cells(blob, node, &na, &ns); ++ if (!OF_CHECK_COUNTS(na, ns)) { ++ printf("%s: Bad cell count for %s\n", __FUNCTION__, ++ fdt_get_name(blob, node, NULL)); ++ return -EINVAL; ++ goto out; ++ } ++ ++ of_match_bus(blob, parent)->count_cells(blob, parent, &pna, &pns); ++ if (!OF_CHECK_COUNTS(pna, pns)) { ++ printf("%s: Bad cell count for %s\n", __FUNCTION__, ++ fdt_get_name(blob, parent, NULL)); ++ return -EINVAL; ++ goto out; ++ } ++ ++ *bus = fdt_read_number(ranges, na); ++ cpu_addr = fdt_read_number(ranges + na, pna); ++ *cpu = fdt_translate_dma_address(blob, node, (const fdt32_t*)&cpu_addr); ++ *size = fdt_read_number(ranges + na + pna, ns); ++out: ++ return ret; ++} ++ + /** + * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and + * who's reg property matches a physical cpu address +diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c +index ca34d84922..8457e04a25 100644 +--- a/drivers/core/of_addr.c ++++ b/drivers/core/of_addr.c +@@ -325,6 +325,74 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add + return __of_translate_address(dev, in_addr, "dma-ranges"); + } + ++int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size) ++{ ++ bool found_dma_ranges = false; ++ struct device_node parent; ++ int na, ns, pna, pns; ++ const __be32 *ranges; ++ int ret = 0; ++ int len; ++ ++ /* Find the closest dma-ranges property */ ++ while (dev) { ++ ranges = of_get_property(dev, "dma-ranges", &len); ++ ++ /* Ignore empty ranges, they imply no translation required */ ++ if (ranges && len > 0) ++ break; ++ ++ /* Once we find 'dma-ranges', then a missing one is an error */ ++ if (found_dma_ranges && !ranges) { ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ if (ranges) ++ found_dma_ranges = true; ++ ++ dev = of_get_parent(dev); ++ } ++ ++ if (!dev || !ranges) { ++ debug("no dma-ranges found for node %s\n", ++ of_node_full_name(dev)); ++ ret = -ENODEV ++ goto out; ++ } ++ ++ /* switch to that node */ ++ parent = of_get_parent(dev); ++ if (!parent) { ++ printf("Found dma-ranges in root node, shoudln't happen\n"); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ /* Get the address sizes both for the bus and its parent */ ++ of_match_bus(dev)->count_cells(dev, &na, &ns); ++ if (!OF_CHECK_COUNTS(na, ns)) { ++ printf("Bad cell count for %s\n", of_node_full_name(dev)); ++ return -EINVAL; ++ goto out; ++ } ++ ++ of_match_bus(parent)->count_cells(parent, &pna, &pns); ++ if (!OF_CHECK_COUNTS(pna, pns)) { ++ printf("Bad cell count for %s\n", of_node_full_name(parent)); ++ return -EINVAL; ++ goto out; ++ } ++ ++ *bus = of_read_number(ranges, na); ++ *cpu = of_translate_dma_address(dev, of_read_number(ranges + na, pna)); ++ *size = of_read_number(ranges + na + pna, ns); ++out: ++ return ret; ++} ++ ++ + static int __of_address_to_resource(const struct device_node *dev, + const __be32 *addrp, u64 size, unsigned int flags, + const char *name, struct resource *r) +diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c +index a68076bf35..15470d4875 100644 +--- a/drivers/core/ofnode.c ++++ b/drivers/core/ofnode.c +@@ -911,6 +911,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) + return fdt_translate_dma_address(gd->fdt_blob, ofnode_to_offset(node), in_addr); + } + ++int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, u64 *size) ++{ ++ if (ofnode_is_np(node)) ++ return of_get_dma_range(ofnode_to_np(node), cpu, bus, size); ++ else ++ return fdt_get_dma_range(gd->fdt_blob, ofnode_to_offset(node), ++ cpu, bus, size); ++} ++ + int ofnode_device_is_compatible(ofnode node, const char *compat) + { + if (ofnode_is_np(node)) +diff --git a/drivers/core/read.c b/drivers/core/read.c +index 076125824c..b835e82be9 100644 +--- a/drivers/core/read.c ++++ b/drivers/core/read.c +@@ -338,6 +338,11 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) + return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); + } + ++u64 dev_translate_cpu_address(const struct udevice *dev, const fdt32_t *in_addr) ++{ ++ return ofnode_translate_cpu_address(dev_ofnode(dev), in_addr); ++} ++ + int dev_read_alias_highest_id(const char *stem) + { + if (of_live_active()) +diff --git a/include/dm/of_addr.h b/include/dm/of_addr.h +index 3fa1ffce81..ee21d5cf4f 100644 +--- a/include/dm/of_addr.h ++++ b/include/dm/of_addr.h +@@ -44,6 +44,23 @@ u64 of_translate_address(const struct device_node *no, const __be32 *in_addr); + */ + u64 of_translate_dma_address(const struct device_node *no, const __be32 *in_addr); + ++ ++/** ++ * of_get_dma_range() - get dma-ranges for a specific DT node ++ * ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + /** + * of_get_address() - obtain an address from a node + * +diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h +index ced7f6ffb2..dc3dd84d9f 100644 +--- a/include/dm/ofnode.h ++++ b/include/dm/ofnode.h +@@ -939,6 +939,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); + */ + u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr); + ++/** ++ * ofnode_get_dma_range() - get dma-ranges for a specific DT node ++ * ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, ++ u64 *size); ++ + /** + * ofnode_device_is_compatible() - check if the node is compatible with compat + * +diff --git a/include/dm/read.h b/include/dm/read.h +index 0585eb1228..9e1f3f5f12 100644 +--- a/include/dm/read.h ++++ b/include/dm/read.h +@@ -1004,6 +1004,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, + return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); + } + ++static inline u64 dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size) ++{ ++ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); ++} ++ + static inline int dev_read_alias_highest_id(const char *stem) + { + if (!CONFIG_IS_ENABLED(OF_LIBFDT)) +diff --git a/include/fdt_support.h b/include/fdt_support.h +index dbbac0fb6a..46eb1dbbb2 100644 +--- a/include/fdt_support.h ++++ b/include/fdt_support.h +@@ -260,6 +260,20 @@ u64 fdt_translate_address(const void *blob, int node_offset, + u64 fdt_translate_dma_address(const void *blob, int node_offset, + const __be32 *in_addr); + ++/** ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + int fdt_node_offset_by_compat_reg(void *blob, const char *compat, + phys_addr_t compat_off); + int fdt_alloc_phandle(void *blob); + +From patchwork Thu Nov 19 17:48:19 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403197 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRyk3Wgvz9s1l + for ; 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+ dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 7CCA0AD09; + Thu, 19 Nov 2020 17:49:03 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 5/8] dm: Introduce DMA constraints into the core device model +Date: Thu, 19 Nov 2020 18:48:19 +0100 +Message-Id: <20201119174820.7820-6-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Calculating the DMA offset between a bus address space and CPU's every +time we call phys_to_bus() and bus_to_phys() isn't ideal performance +wise. This information is static and available before initializing the +devices so parse it before the probe call an provide the DMA offset it +in 'struct udevice' for the DMA code to use it. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/core/device.c | 24 ++++++++++++++++++++++++ + include/dm/device.h | 1 + + 2 files changed, 25 insertions(+) + +diff --git a/drivers/core/device.c b/drivers/core/device.c +index 4b3dcb3b37..4255bea24d 100644 +--- a/drivers/core/device.c ++++ b/drivers/core/device.c +@@ -421,6 +421,28 @@ fail: + return ret; + } + ++void device_get_dma_constraints(struct udevice *dev) ++{ ++ phys_addr_t cpu; ++ dma_addr_t bus; ++ u64 size; ++ int ret; ++ ++ if (!dev_of_valid(dev)) ++ return; ++ ++ ret = dev_get_dma_range(dev, &cpu, &bus, &size); ++ if (ret) { ++ /* Don't complain if no 'dma-ranges' were found */ ++ if (ret != -ENODEV) ++ dm_warn("%s: failed to get DMA range, %d\n", ++ dev->name, ret); ++ return; ++ } ++ ++ dev->dma_offset = cpu - bus; ++} ++ + int device_probe(struct udevice *dev) + { + const struct driver *drv; +@@ -482,6 +504,8 @@ int device_probe(struct udevice *dev) + goto fail; + } + ++ device_get_dma_constraints(dev); ++ + ret = uclass_pre_probe_device(dev); + if (ret) + goto fail; +diff --git a/include/dm/device.h b/include/dm/device.h +index 5bef484247..59f711e3dd 100644 +--- a/include/dm/device.h ++++ b/include/dm/device.h +@@ -161,6 +161,7 @@ struct udevice { + #ifdef CONFIG_DEVRES + struct list_head devres_head; + #endif ++ u64 dma_offset; + }; + + /* Maximum sequence number supported */ + +From patchwork Thu Nov 19 17:48:20 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403199 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRyy5XbHz9sVd + for ; Fri, 20 Nov 2020 04:50:02 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 32DE7825B9; + Thu, 19 Nov 2020 18:49:15 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 0DC4482563; Thu, 19 Nov 2020 18:49:09 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 375DF82571 + for ; Thu, 19 Nov 2020 18:49:04 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 0202DAD0B; + Thu, 19 Nov 2020 17:49:04 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 6/8] dm: Introduce dev_phys_to_bus()/dev_bus_to_phys() +Date: Thu, 19 Nov 2020 18:48:20 +0100 +Message-Id: <20201119174820.7820-7-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +These functions, instead of relying on hard-coded platform-specific +address translations, make use of the DMA constraints provided by the DM +core. This allows for per-device translations. + +Signed-off-by: Nicolas Saenz Julienne +--- + include/phys2bus.h | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/include/phys2bus.h b/include/phys2bus.h +index dc9b8e5a25..a380063af4 100644 +--- a/include/phys2bus.h ++++ b/include/phys2bus.h +@@ -21,4 +21,20 @@ static inline unsigned long bus_to_phys(unsigned long bus) + } + #endif + ++#if CONFIG_IS_ENABLED(DM) ++#include ++ ++static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, ++ phys_addr_t phys) ++{ ++ return phys - dev->dma_offset; ++} ++ ++static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, ++ dma_addr_t bus) ++{ ++ return bus + dev->dma_offset; ++} ++#endif ++ + #endif + +From patchwork Thu Nov 19 17:48:21 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403203 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRzp2ZpRz9sTR + for ; Fri, 20 Nov 2020 04:50:46 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 2D4E0825D9; + Thu, 19 Nov 2020 18:49:25 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id BFF1B825A3; Thu, 19 Nov 2020 18:49:12 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id B7CCF82586 + for ; Thu, 19 Nov 2020 18:49:04 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 7AA0FAD0F; + Thu, 19 Nov 2020 17:49:04 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 7/8] xhci: translate virtual addresses into the bus's address + space +Date: Thu, 19 Nov 2020 18:48:21 +0100 +Message-Id: <20201119174820.7820-8-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +So far we've been content with passing physical addresses when +configuring memory addresses into XHCI controllers, but not all +platforms have buses with transparent mappings. Specifically the +Raspberry Pi 4 might introduce an offset to memory accesses incoming +from its PCIe port. + +Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these +limitations and make sure we don't break non DM users. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/usb/host/xhci-mem.c | 45 +++++++++++++++++++----------------- + drivers/usb/host/xhci-ring.c | 11 +++++---- + drivers/usb/host/xhci.c | 4 ++-- + include/usb/xhci.h | 22 +++++++++++++++++- + 4 files changed, 54 insertions(+), 28 deletions(-) + +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index b002d6f166..e8d435d644 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -110,7 +110,7 @@ static void xhci_scratchpad_free(struct xhci_ctrl *ctrl) + + ctrl->dcbaa->dev_context_ptrs[0] = 0; + +- free((void *)(uintptr_t)le64_to_cpu(ctrl->scratchpad->sp_array[0])); ++ free(xhci_bus_to_virt(ctrl, le64_to_cpu(ctrl->scratchpad->sp_array[0]))); + free(ctrl->scratchpad->sp_array); + free(ctrl->scratchpad); + ctrl->scratchpad = NULL; +@@ -216,8 +216,8 @@ static void *xhci_malloc(unsigned int size) + * @param link_trbs flag to indicate whether to link the trbs or NOT + * @return none + */ +-static void xhci_link_segments(struct xhci_segment *prev, +- struct xhci_segment *next, bool link_trbs) ++static void xhci_link_segments(struct xhci_ctrl *ctrl, struct xhci_segment *prev, ++ struct xhci_segment *next, bool link_trbs) + { + u32 val; + u64 val_64 = 0; +@@ -226,7 +226,7 @@ static void xhci_link_segments(struct xhci_segment *prev, + return; + prev->next = next; + if (link_trbs) { +- val_64 = virt_to_phys(next->trbs); ++ val_64 = xhci_virt_to_bus(ctrl, next->trbs); + prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = + cpu_to_le64(val_64); + +@@ -304,7 +304,8 @@ static struct xhci_segment *xhci_segment_alloc(void) + * @param link_trbs flag to indicate whether to link the trbs or NOT + * @return pointer to the newly created RING + */ +-struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs) ++struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs, ++ bool link_trbs) + { + struct xhci_ring *ring; + struct xhci_segment *prev; +@@ -327,12 +328,12 @@ struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs) + next = xhci_segment_alloc(); + BUG_ON(!next); + +- xhci_link_segments(prev, next, link_trbs); ++ xhci_link_segments(ctrl, prev, next, link_trbs); + + prev = next; + num_segs--; + } +- xhci_link_segments(prev, ring->first_seg, link_trbs); ++ xhci_link_segments(ctrl, prev, ring->first_seg, link_trbs); + if (link_trbs) { + /* See section 4.9.2.1 and 6.4.4.1 */ + prev->trbs[TRBS_PER_SEGMENT-1].link.control |= +@@ -354,6 +355,7 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + struct xhci_hccr *hccr = ctrl->hccr; + struct xhci_hcor *hcor = ctrl->hcor; + struct xhci_scratchpad *scratchpad; ++ uint64_t val_64; + int num_sp; + uint32_t page_size; + void *buf; +@@ -371,8 +373,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64)); + if (!scratchpad->sp_array) + goto fail_sp2; +- ctrl->dcbaa->dev_context_ptrs[0] = +- cpu_to_le64((uintptr_t)scratchpad->sp_array); ++ ++ val_64 = xhci_virt_to_bus(ctrl, scratchpad->sp_array); ++ ctrl->dcbaa->dev_context_ptrs[0] = cpu_to_le64((uintptr_t)val_64); + + xhci_flush_cache((uintptr_t)&ctrl->dcbaa->dev_context_ptrs[0], + sizeof(ctrl->dcbaa->dev_context_ptrs[0])); +@@ -393,8 +396,8 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) + xhci_flush_cache((uintptr_t)buf, num_sp * page_size); + + for (i = 0; i < num_sp; i++) { +- uintptr_t ptr = (uintptr_t)buf + i * page_size; +- scratchpad->sp_array[i] = cpu_to_le64(ptr); ++ val_64 = xhci_virt_to_bus(ctrl, buf + i * page_size); ++ scratchpad->sp_array[i] = cpu_to_le64(val_64); + } + + xhci_flush_cache((uintptr_t)scratchpad->sp_array, +@@ -484,9 +487,9 @@ int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id) + } + + /* Allocate endpoint 0 ring */ +- virt_dev->eps[0].ring = xhci_ring_alloc(1, true); ++ virt_dev->eps[0].ring = xhci_ring_alloc(ctrl, 1, true); + +- byte_64 = virt_to_phys(virt_dev->out_ctx->bytes); ++ byte_64 = xhci_virt_to_bus(ctrl, virt_dev->out_ctx->bytes); + + /* Point to output device context in dcbaa. */ + ctrl->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(byte_64); +@@ -522,15 +525,15 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + return -ENOMEM; + } + +- val_64 = virt_to_phys(ctrl->dcbaa); ++ val_64 = xhci_virt_to_bus(ctrl, ctrl->dcbaa); + /* Set the pointer in DCBAA register */ + xhci_writeq(&hcor->or_dcbaap, val_64); + + /* Command ring control pointer register initialization */ +- ctrl->cmd_ring = xhci_ring_alloc(1, true); ++ ctrl->cmd_ring = xhci_ring_alloc(ctrl, 1, true); + + /* Set the address in the Command Ring Control register */ +- trb_64 = virt_to_phys(ctrl->cmd_ring->first_seg->trbs); ++ trb_64 = xhci_virt_to_bus(ctrl, ctrl->cmd_ring->first_seg->trbs); + val_64 = xhci_readq(&hcor->or_crcr); + val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | + (trb_64 & (u64) ~CMD_RING_RSVD_BITS) | +@@ -551,7 +554,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + ctrl->ir_set = &ctrl->run_regs->ir_set[0]; + + /* Event ring does not maintain link TRB */ +- ctrl->event_ring = xhci_ring_alloc(ERST_NUM_SEGS, false); ++ ctrl->event_ring = xhci_ring_alloc(ctrl, ERST_NUM_SEGS, false); + ctrl->erst.entries = xhci_malloc(sizeof(struct xhci_erst_entry) * + ERST_NUM_SEGS); + +@@ -560,8 +563,8 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + for (val = 0, seg = ctrl->event_ring->first_seg; + val < ERST_NUM_SEGS; + val++) { +- trb_64 = virt_to_phys(seg->trbs); + struct xhci_erst_entry *entry = &ctrl->erst.entries[val]; ++ trb_64 = xhci_virt_to_bus(ctrl, seg->trbs); + entry->seg_addr = cpu_to_le64(trb_64); + entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); + entry->rsvd = 0; +@@ -570,7 +573,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + xhci_flush_cache((uintptr_t)ctrl->erst.entries, + ERST_NUM_SEGS * sizeof(struct xhci_erst_entry)); + +- deq = virt_to_phys(ctrl->event_ring->dequeue); ++ deq = xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue); + + /* Update HC event ring dequeue pointer */ + xhci_writeq(&ctrl->ir_set->erst_dequeue, +@@ -585,7 +588,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + /* this is the event ring segment table pointer */ + val_64 = xhci_readq(&ctrl->ir_set->erst_base); + val_64 &= ERST_PTR_MASK; +- val_64 |= virt_to_phys(ctrl->erst.entries) & ~ERST_PTR_MASK; ++ val_64 |= xhci_virt_to_bus(ctrl, ctrl->erst.entries) & ~ERST_PTR_MASK; + + xhci_writeq(&ctrl->ir_set->erst_base, val_64); + +@@ -848,7 +851,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, + /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ + ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3)); + +- trb_64 = virt_to_phys(virt_dev->eps[0].ring->first_seg->trbs); ++ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[0].ring->first_seg->trbs); + ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state); + + /* +diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c +index 13065d7ca9..5a6ad383cd 100644 +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -275,10 +275,13 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id, + u32 ep_index, trb_type cmd) + { + u32 fields[4]; +- u64 val_64 = virt_to_phys(ptr); ++ u64 val_64 = 0; + + BUG_ON(prepare_ring(ctrl, ctrl->cmd_ring, EP_STATE_RUNNING)); + ++ if (ptr) ++ val_64 = xhci_virt_to_bus(ctrl, ptr); ++ + fields[0] = lower_32_bits(val_64); + fields[1] = upper_32_bits(val_64); + fields[2] = 0; +@@ -401,7 +404,7 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl) + + /* Inform the hardware */ + xhci_writeq(&ctrl->ir_set->erst_dequeue, +- virt_to_phys(ctrl->event_ring->dequeue) | ERST_EHB); ++ xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue) | ERST_EHB); + } + + /** +@@ -579,7 +582,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, + u64 addr; + int ret; + u32 trb_fields[4]; +- u64 val_64 = virt_to_phys(buffer); ++ u64 val_64 = xhci_virt_to_bus(ctrl, buffer); + + debug("dev=%p, pipe=%lx, buffer=%p, length=%d\n", + udev, pipe, buffer, length); +@@ -872,7 +875,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + if (length > 0) { + if (req->requesttype & USB_DIR_IN) + field |= TRB_DIR_IN; +- buf_64 = virt_to_phys(buffer); ++ buf_64 = xhci_virt_to_bus(ctrl, buffer); + + trb_fields[0] = lower_32_bits(buf_64); + trb_fields[1] = upper_32_bits(buf_64); +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index 7080f8fabe..d27ac01c83 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -604,7 +604,7 @@ static int xhci_set_configuration(struct usb_device *udev) + ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index); + + /* Allocate the ep rings */ +- virt_dev->eps[ep_index].ring = xhci_ring_alloc(1, true); ++ virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true); + if (!virt_dev->eps[ep_index].ring) + return -ENOMEM; + +@@ -628,7 +628,7 @@ static int xhci_set_configuration(struct usb_device *udev) + cpu_to_le32(MAX_BURST(max_burst) | + ERROR_COUNT(err_count)); + +- trb_64 = virt_to_phys(virt_dev->eps[ep_index].ring->enqueue); ++ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[ep_index].ring->enqueue); + ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 | + virt_dev->eps[ep_index].ring->cycle_state); + +diff --git a/include/usb/xhci.h b/include/usb/xhci.h +index e1d382369a..57e06087a1 100644 +--- a/include/usb/xhci.h ++++ b/include/usb/xhci.h +@@ -16,6 +16,7 @@ + #ifndef HOST_XHCI_H_ + #define HOST_XHCI_H_ + ++#include + #include + #include + #include +@@ -1250,7 +1251,8 @@ int xhci_check_maxpacket(struct usb_device *udev); + void xhci_flush_cache(uintptr_t addr, u32 type_len); + void xhci_inval_cache(uintptr_t addr, u32 type_len); + void xhci_cleanup(struct xhci_ctrl *ctrl); +-struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs); ++struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs, ++ bool link_trbs); + int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id); + int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, + struct xhci_hcor *hcor); +@@ -1278,4 +1280,22 @@ extern struct dm_usb_ops xhci_usb_ops; + + struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); + ++static inline dma_addr_t xhci_virt_to_bus(struct xhci_ctrl *ctrl, void *addr) ++{ ++#if CONFIG_IS_ENABLED(DM_USB) ++ return dev_phys_to_bus(ctrl->dev, virt_to_phys(addr)); ++#else ++ return phys_to_bus(virt_to_phys(addr)); ++#endif ++} ++ ++static inline void *xhci_bus_to_virt(struct xhci_ctrl *ctrl, dma_addr_t addr) ++{ ++#if CONFIG_IS_ENABLED(DM_USB) ++ return phys_to_virt(dev_bus_to_phys(ctrl->dev, addr)); ++#else ++ return phys_to_virt(bus_to_phys(addr)); ++#endif ++} ++ + #endif /* HOST_XHCI_H_ */ + +From patchwork Thu Nov 19 17:48:22 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1403202 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CcRzc5cjwz9s1l + for ; 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+ dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id F38DCAD11; + Thu, 19 Nov 2020 17:49:04 +0000 (UTC) +From: Nicolas Saenz Julienne +To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de +Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + swarren@wwwdotorg.org, peng.fan@nxp.com, + Nicolas Saenz Julienne +Subject: [PATCH 8/8] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() +Date: Thu, 19 Nov 2020 18:48:22 +0100 +Message-Id: <20201119174820.7820-9-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> +References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +This will allow us to use DM variants of phys_to_bus()/bus_to_phys() +when relevant. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/mmc/sdhci.c | 7 ++++--- + include/mmc.h | 10 ++++++++++ + 2 files changed, 14 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c +index 0628934312..2086d7cdb1 100644 +--- a/drivers/mmc/sdhci.c ++++ b/drivers/mmc/sdhci.c +@@ -19,7 +19,6 @@ + #include + #include + #include +-#include + + static void sdhci_reset(struct sdhci_host *host, u8 mask) + { +@@ -103,7 +102,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, + mmc_get_dma_dir(data)); + + if (host->flags & USE_SDMA) { +- sdhci_writel(host, phys_to_bus((ulong)host->start_addr), ++ sdhci_writel(host, ++ mmc_phys_to_bus(host->mmc, (ulong)host->start_addr), + SDHCI_DMA_ADDRESS); + } + #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) +@@ -162,7 +162,8 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) + start_addr &= + ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); + start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; +- sdhci_writel(host, phys_to_bus((ulong)start_addr), ++ sdhci_writel(host, ++ mmc_phys_to_bus(host->mmc, (ulong)start_addr), + SDHCI_DMA_ADDRESS); + } + } +diff --git a/include/mmc.h b/include/mmc.h +index 1d377e0281..805a3b2215 100644 +--- a/include/mmc.h ++++ b/include/mmc.h +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + + struct bd_info; + +@@ -977,4 +978,13 @@ static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) + return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; + } + ++static inline dma_addr_t mmc_phys_to_bus(struct mmc *mmc, phys_addr_t addr) ++{ ++#if CONFIG_IS_ENABLED(DM_MMC) ++ return dev_phys_to_bus(mmc->dev, addr); ++#else ++ return phys_to_bus(addr); ++#endif ++} ++ + #endif /* _MMC_H_ */ From f8bd28f34b9c13a293ca86cb4cb11b4986a52834 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Nov 2020 23:40:26 +0000 Subject: [PATCH 115/351] drop tegra devices for the momenet --- aarch64-boards | 3 --- arm-boards | 3 --- 2 files changed, 6 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index e5d4147..ac7a3f8 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -43,9 +43,6 @@ orangepi_win orangepi_zero_plus orangepi_zero_plus2 p212 -p2371-2180 -p2771-0000-500 -p3450-0000 pine64-lts pine64_plus pinebook diff --git a/arm-boards b/arm-boards index bc80bb8..75bba7c 100644 --- a/arm-boards +++ b/arm-boards @@ -56,7 +56,6 @@ inet9f_rev03 inet_q972 Itead_Ibox_A20 jesurun_q5 -jetson-tk1 kc1 Lamobo_R1 libretech_all_h3_cc_h2_plus @@ -101,7 +100,6 @@ orangepi_plus2e orangepi_r1 orangepi_zero origen -paz00 polaroid_mid2809pxe04 pov_protab2_ips9 q8_a13_tablet @@ -126,7 +124,6 @@ sunxi_Gemei_G9 tbs_a711 tinker-rk3288 tinker-s-rk3288 -trimslice udoo udoo_neo usbarmory From 87d65f314f6b3f5289f77d1b2a86e95213126e9b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 25 Nov 2020 21:30:20 +0000 Subject: [PATCH 116/351] temp drop a few more broken boards --- aarch64-boards | 1 - arm-boards | 4 ---- 2 files changed, 5 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index ac7a3f8..d849833 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -51,7 +51,6 @@ pinephone pinetab pine_h64 poplar -puma-rk3399 rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 diff --git a/arm-boards b/arm-boards index 75bba7c..335871f 100644 --- a/arm-boards +++ b/arm-boards @@ -63,7 +63,6 @@ Linksprite_pcDuino Linksprite_pcDuino3 Linksprite_pcDuino3_Nano liteboard -marsboard Marsboard_A10 Mele_A1000 Mele_A1000G_quad @@ -108,10 +107,8 @@ q8_a33_tablet_1024x600 q8_a33_tablet_800x480 qemu_arm r7-tv-dongle -riotboard rock rock-pi-n8-rk3288 -rock2 rpi_2 rpi_3_32b rpi_4_32b @@ -125,7 +122,6 @@ tbs_a711 tinker-rk3288 tinker-s-rk3288 udoo -udoo_neo usbarmory UTOO_P66 vexpress_ca15_tc2 From 6623ecd52613674450ad85ee7277003649de4bc9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 26 Nov 2020 09:13:41 +0000 Subject: [PATCH 117/351] more failures --- arm-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/arm-boards b/arm-boards index 335871f..f4a04d4 100644 --- a/arm-boards +++ b/arm-boards @@ -121,7 +121,6 @@ sunxi_Gemei_G9 tbs_a711 tinker-rk3288 tinker-s-rk3288 -udoo usbarmory UTOO_P66 vexpress_ca15_tc2 From 5fa2e9250cf9cdb39168a205a106ace7f6e59edd Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 14 Dec 2020 09:41:34 +0100 Subject: [PATCH 118/351] Fix a "scan_dev_for_efi" not defined error A previous commit dropped a NUL character at the end of scan_dev_for_dtb definition and this caused scan_dev_for_efi to not be defined. Following error is shown by U-Boot when trying to boot an EFI binary: Scanning mmc 0:2... ## Error: "scan_dev_for_efi" not defined --- uboot-tools.spec | 5 ++++- ...load-FDT-from-any-partition-on-boot-device.patch | 13 +++++++------ uefi-use-Fedora-specific-path-name.patch | 8 ++++---- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 39a089a..31a75ec 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -239,6 +239,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Dec 14 2020 Javier Martinez Canillas - 2021.01-0.2.rc2 +- Fix a "scan_dev_for_efi" not defined error + * Sun Nov 22 2020 Peter Robinson - 2021.01-0.1.rc2 - Update to 2021.01 RC2 - Latest Pinebook Pro display patches diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index 9d70978..cc2c4f8 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -1,4 +1,4 @@ -From 7f91e98f42f620684fc5a1e918e24cfb838a12c5 Mon Sep 17 00:00:00 2001 +From cc3700b5c65494547308df395fe63166ff48a1e3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Nov 2020 10:35:48 +0000 Subject: [PATCH 1/2] distro: load FDT from any partition on boot device @@ -22,11 +22,11 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know). Signed-off-by: Rob Clark Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 31 ++++++++++++++++++++++--------- - 1 file changed, 22 insertions(+), 9 deletions(-) + include/config_distro_bootcmd.h | 33 +++++++++++++++++++++++---------- + 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index ff29ef5a90..e6a5267159 100644 +index ff29ef5a905..769477cd80e 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -142,24 +142,37 @@ @@ -49,6 +49,7 @@ index ff29ef5a90..e6a5267159 100644 - "run load_efi_dtb; " \ - "fi;" \ - "done;" \ +- "run boot_efi_bootmgr;" \ + "part list ${devtype} ${devnum} dtb_devplist; " \ + "env exists dtb_devplist || setenv dtb_devplist " \ + "${distro_bootpart}; " \ @@ -65,7 +66,7 @@ index ff29ef5a90..e6a5267159 100644 + "fi;" \ + "done; " \ + "done; " \ - "run boot_efi_bootmgr;" \ ++ "run boot_efi_bootmgr\0" \ + "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ "efi/boot/"BOOTEFI_NAME"; then " \ @@ -77,5 +78,5 @@ index ff29ef5a90..e6a5267159 100644 "fi; " \ "setenv efi_fdtfile\0" -- -2.28.0 +2.29.2 diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index 6eb691e..a7f6a16 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -1,4 +1,4 @@ -From 26b8c1e30342515e252ebf779c79b7bbe1d91747 Mon Sep 17 00:00:00 2001 +From d8fcb72d566b0ebca1613555ac13c0798817487e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Nov 2020 10:37:28 +0000 Subject: [PATCH 2/2] use Fedora specific EFI path/name @@ -9,7 +9,7 @@ Signed-off-by: Peter Robinson 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index e6a5267159..f8c4f58907 100644 +index 769477cd80e..22ce3685758 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -92,9 +92,9 @@ @@ -34,7 +34,7 @@ index e6a5267159..f8c4f58907 100644 "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ @@ -169,9 +169,9 @@ - "run boot_efi_bootmgr;" \ + "run boot_efi_bootmgr\0" \ "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/boot/"BOOTEFI_NAME"; then " \ @@ -46,5 +46,5 @@ index e6a5267159..f8c4f58907 100644 "echo EFI LOAD FAILED: continuing...; " \ "fi; " \ -- -2.28.0 +2.29.2 From ce18c50c5de8b82d69e393353d9ff438f1e59e5a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Dec 2020 18:07:49 +0000 Subject: [PATCH 119/351] 2021.01 RC3, latest proposed RPi-400 patch, UEFI boot fixes --- AllWinner-PinePhone.patch | 1843 ----------------- AllWinner-PineTab.patch | 493 ----- AllWinner-UpstreamSync.patch | 1297 ------------ ...erry-Pi-400-Compute-Module-4-support.patch | 1277 +++++++++--- aarch64-boards | 4 + arm-boards | 9 + ...b-specific-bits-to-it-s-specific-u-b.patch | 104 - rockchip-Pinebook-Pro-Fix-USB.patch | 39 - sources | 2 +- uboot-tools.spec | 20 +- 10 files changed, 1032 insertions(+), 4056 deletions(-) delete mode 100644 AllWinner-PinePhone.patch delete mode 100644 AllWinner-UpstreamSync.patch rename rpi-Add-identifier-for-the-new-RPi400.patch => Raspberry-Pi-400-Compute-Module-4-support.patch (52%) delete mode 100644 rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch delete mode 100644 rockchip-Pinebook-Pro-Fix-USB.patch diff --git a/AllWinner-PinePhone.patch b/AllWinner-PinePhone.patch deleted file mode 100644 index baa7119..0000000 --- a/AllWinner-PinePhone.patch +++ /dev/null @@ -1,1843 +0,0 @@ -From patchwork Thu Sep 3 05:07:09 2020 -Content-Type: text/plain; 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- Thu, 3 Sep 2020 01:07:17 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 1/8] sunxi: board: Use a more descriptive variable name -Date: Thu, 3 Sep 2020 00:07:09 -0500 -Message-Id: <20200903050716.48488-2-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -The variable "cmp_str" always leaves me wondering if it is the DT name -of the current board (yes) or DT name in the FIT config entry (no). - -In preparation for expanding the functionality here, rename it to -something that obviously means "this is the DT name we are looking for". - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 71e2b758a3e..674e6816d2d 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -892,14 +892,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) - int board_fit_config_name_match(const char *name) - { - struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -- const char *cmp_str = (const char *)spl; -+ const char *best_dt_name = (const char *)spl; - - /* Check if there is a DT name stored in the SPL header and use that. */ - if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { -- cmp_str += spl->dt_name_offset; -+ best_dt_name += spl->dt_name_offset; - } else { - #ifdef CONFIG_DEFAULT_DEVICE_TREE -- cmp_str = CONFIG_DEFAULT_DEVICE_TREE; -+ best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; - #else - return 0; - #endif -@@ -907,15 +907,15 @@ int board_fit_config_name_match(const char *name) - - #ifdef CONFIG_PINE64_DT_SELECTION - /* Differentiate the two Pine64 board DTs by their DRAM size. */ -- if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { -+ if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { - if ((gd->ram_size > 512 * 1024 * 1024)) - return !strstr(name, "plus"); - else - return !!strstr(name, "plus"); - } else { -- return strcmp(name, cmp_str); -+ return strcmp(name, best_dt_name); - } - #endif -- return strcmp(name, cmp_str); -+ return strcmp(name, best_dt_name); - } - #endif - -From patchwork Thu Sep 3 05:07:10 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356309 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=sholland.org -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; - unprotected) header.d=sholland.org header.i=@sholland.org header.a=rsa-sha256 - header.s=fm3 header.b=Sj8OLfL4; - dkim=pass (2048-bit key; - unprotected) header.d=messagingengine.com header.i=@messagingengine.com - header.a=rsa-sha256 header.s=fm3 header.b=gP0Xb3h8; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 2/8] sunxi: board: Add a helper to get the SPL DT name -Date: Thu, 3 Sep 2020 00:07:10 -0500 -Message-Id: <20200903050716.48488-3-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -This moves the validity checking and typecasts all to one place away -from the string comparison logic, and it detangles the compile-time -and runtime control flow. - -The new helper will also be used by U-Boot proper in a future commit. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 26 +++++++++++++++++--------- - 1 file changed, 17 insertions(+), 9 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 674e6816d2d..5c9b811f27a 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -319,6 +319,17 @@ static struct boot_file_head * get_spl_header(uint8_t req_version) - return spl; - } - -+static const char *get_spl_dt_name(void) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -+ -+ /* Check if there is a DT name stored in the SPL header. */ -+ if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) -+ return (char *)spl + spl->dt_name_offset; -+ -+ return NULL; -+} -+ - int dram_init(void) - { - struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); -@@ -891,20 +902,17 @@ int ft_board_setup(void *blob, struct bd_info *bd) - #ifdef CONFIG_SPL_LOAD_FIT - int board_fit_config_name_match(const char *name) - { -- struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); -- const char *best_dt_name = (const char *)spl; -+ const char *best_dt_name = get_spl_dt_name(); - -- /* Check if there is a DT name stored in the SPL header and use that. */ -- if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { -- best_dt_name += spl->dt_name_offset; -- } else { - #ifdef CONFIG_DEFAULT_DEVICE_TREE -+ if (best_dt_name == NULL) - best_dt_name = CONFIG_DEFAULT_DEVICE_TREE; --#else -- return 0; - #endif -- }; - -+ if (best_dt_name == NULL) { -+ /* No DT name was provided, so accept the first config. */ -+ return 0; -+ } - #ifdef CONFIG_PINE64_DT_SELECTION - /* Differentiate the two Pine64 board DTs by their DRAM size. */ - if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { - -From patchwork Thu Sep 3 05:07:11 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356311 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=sholland.org -Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 3/8] sunxi: board: Simplify Pine A64 DT selection logic -Date: Thu, 3 Sep 2020 00:07:11 -0500 -Message-Id: <20200903050716.48488-4-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -Instead of using an entirely separate matching algorithm, simply update -the name of the DT we want to match. Enabling this logic does not depend -on the FIT config name, only on the initial guess of the board name. - -Importantly, the initial guess must be "sun50i-a64-pine64-plus", because -otherwise the logic would trigger when "sun50i-a64-pine64-lts" was -written to the SPL header. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 12 ++++-------- - 1 file changed, 4 insertions(+), 8 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 5c9b811f27a..fb0d5bf4743 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -914,14 +914,10 @@ int board_fit_config_name_match(const char *name) - return 0; - } - #ifdef CONFIG_PINE64_DT_SELECTION --/* Differentiate the two Pine64 board DTs by their DRAM size. */ -- if (strstr(name, "-pine64") && strstr(best_dt_name, "-pine64")) { -- if ((gd->ram_size > 512 * 1024 * 1024)) -- return !strstr(name, "plus"); -- else -- return !!strstr(name, "plus"); -- } else { -- return strcmp(name, best_dt_name); -+ else if (strstr(best_dt_name, "-pine64-plus")) { -+ /* Differentiate the Pine A64 boards by their DRAM size. */ -+ if ((gd->ram_size == 512 * 1024 * 1024)) -+ best_dt_name = "sun50i-a64-pine64"; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 4/8] sunxi: board: Add PinePhone DT selection logic -Date: Thu, 3 Sep 2020 00:07:12 -0500 -Message-Id: <20200903050716.48488-5-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -There are two different publicly-released revisions of the PinePhone -hardware, versions 1.1 and 1.2; and they need different device trees. -Since some GPIO pins were rerouted, we can use that to distinguish -between them. - -Signed-off-by: Samuel Holland ---- - arch/arm/mach-sunxi/Kconfig | 7 +++++++ - board/sunxi/board.c | 21 +++++++++++++++++++++ - 2 files changed, 28 insertions(+) - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index be0822bfb7d..8421f3b6854 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -1010,4 +1010,11 @@ config PINE64_DT_SELECTION - option, the device tree selection code specific to Pine64 which - utilizes the DRAM size will be enabled. - -+config PINEPHONE_DT_SELECTION -+ bool "Enable PinePhone device tree selection code" -+ depends on MACH_SUN50I -+ help -+ Enable this option to automatically select the device tree for the -+ correct PinePhone hardware revision during boot. -+ - endif -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index fb0d5bf4743..3d64ed18664 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -920,6 +921,26 @@ int board_fit_config_name_match(const char *name) - best_dt_name = "sun50i-a64-pine64"; - } - #endif -+#ifdef CONFIG_PINEPHONE_DT_SELECTION -+ else if (strstr(best_dt_name, "-pinephone")) { -+ /* Differentiate the PinePhone revisions by GPIO inputs. */ -+ prcm_apb0_enable(PRCM_APB0_GATE_PIO); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP); -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT); -+ udelay(100); -+ -+ /* PL6 is pulled low by the modem on v1.2. */ -+ if (gpio_get_value(SUNXI_GPL(6)) == 0) -+ best_dt_name = "sun50i-a64-pinephone-1.2"; -+ else -+ best_dt_name = "sun50i-a64-pinephone-1.1"; -+ -+ sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE); -+ sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE); -+ prcm_apb0_disable(PRCM_APB0_GATE_PIO); -+ } -+#endif -+ - return strcmp(name, best_dt_name); - } - #endif - -From patchwork Thu Sep 3 05:07:13 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356314 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 3 Sep 2020 01:07:18 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 5/8] sunxi: board: Save the chosen DT name in the SPL header -Date: Thu, 3 Sep 2020 00:07:13 -0500 -Message-Id: <20200903050716.48488-6-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -This overwrites the name loaded from the SPL image. It will be different -if there was previously no name provided, or if a more accurate name was -determined by the board variant selection logic. This means that the DT -name in the SPL header now always matches the DT appended to U-Boot. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 27 ++++++++++++++++++++++++++- - 1 file changed, 26 insertions(+), 1 deletion(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 3d64ed18664..eaa40a1ea96 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -331,6 +331,21 @@ static const char *get_spl_dt_name(void) - return NULL; - } - -+static void set_spl_dt_name(const char *name) -+{ -+ struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); -+ -+ if (spl == INVALID_SPL_HEADER) -+ return; -+ -+ /* Promote the header version for U-Boot proper, if needed. */ -+ if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION) -+ spl->spl_signature[3] = SPL_DT_HEADER_VERSION; -+ -+ strcpy((char *)&spl->string_pool, name); -+ spl->dt_name_offset = offsetof(struct boot_file_head, string_pool); -+} -+ - int dram_init(void) - { - struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); -@@ -904,6 +919,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) - int board_fit_config_name_match(const char *name) - { - const char *best_dt_name = get_spl_dt_name(); -+ int ret; - - #ifdef CONFIG_DEFAULT_DEVICE_TREE - if (best_dt_name == NULL) -@@ -941,6 +957,15 @@ int board_fit_config_name_match(const char *name) - } - #endif - -- return strcmp(name, best_dt_name); -+ ret = strcmp(name, best_dt_name); -+ -+ /* -+ * If one of the FIT configurations matches the most accurate DT name, -+ * update the SPL header to provide that DT name to U-Boot proper. -+ */ -+ if (ret == 0) -+ set_spl_dt_name(best_dt_name); -+ -+ return ret; - } - #endif - -From patchwork Thu Sep 3 05:07:14 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Samuel Holland -X-Patchwork-Id: 1356313 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Thu, 3 Sep 2020 01:07:19 -0400 (EDT) -From: Samuel Holland -To: Jagan Teki , Maxime Ripard -Cc: Andre Przywara , - Peter Robinson , u-boot@lists.denx.de, - Samuel Holland -Subject: [PATCH 6/8] sunxi: board: Set fdtfile to match the DT chosen by SPL -Date: Thu, 3 Sep 2020 00:07:14 -0500 -Message-Id: <20200903050716.48488-7-samuel@sholland.org> -X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200903050716.48488-1-samuel@sholland.org> -References: <20200903050716.48488-1-samuel@sholland.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. -This meant that, regardless of the DT chosen by SPL (either by changing -the header in the image or by the selection code at runtime), Linux -always used the default DT. - -By using the name from the SPL header (which, because of the previous -commit, always matches the DT used by U-Boot proper), Linux also sees -the same board as U-Boot/SPL, even if the boot script later loads a DT -from disk. - -Signed-off-by: Samuel Holland ---- - board/sunxi/board.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index eaa40a1ea96..5457b28e135 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -870,6 +870,7 @@ static void setup_environment(const void *fdt) - - int misc_init_r(void) - { -+ const char *spl_dt_name; - uint boot; - - env_set("fel_booted", NULL); -@@ -888,6 +889,16 @@ int misc_init_r(void) - env_set("mmc_bootdev", "1"); - } - -+ /* Set fdtfile to match the FIT configuration chosen in SPL. */ -+ spl_dt_name = get_spl_dt_name(); -+ if (spl_dt_name) { -+ char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : ""; -+ char str[64]; -+ -+ snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name); -+ env_set("fdtfile", str); -+ } -+ - setup_environment(gd->fdt_blob); - - #ifdef CONFIG_USB_ETHER - -From 9e91885814f880ce13ee98cab79876338811949f Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:44:55 +0100 -Subject: [PATCH 7/8] arm64: dts: allwinner: Add initial support for Pine64 - PinePhone - -At the moment PinePhone comes in three slightly incompatible variants: - -- 1.0: Early Developer Batch -- 1.1: Braveheart Batch -- 1.2: Initial Production version - -This syncs the Pinephone DTs from Linux 5.8-rc1. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/Makefile | 3 + - arch/arm/dts/sun50i-a64-pinephone-1.0.dts | 11 + - arch/arm/dts/sun50i-a64-pinephone-1.1.dts | 11 + - arch/arm/dts/sun50i-a64-pinephone-1.2.dts | 40 +++++++++++++++++++++++ - arch/arm/dts/sun50i-a64-pinephone.dtsi | 379 ++++++++++++++++++++++ - 5 files changed, 403 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.0.dts - create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.1.dts - create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.2.dts - create mode 100644 arch/arm/dts/sun50i-a64-pinephone.dtsi - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index f8f529435b..193f5c6138 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -608,6 +608,9 @@ dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-pine64-plus.dtb \ - sun50i-a64-pine64.dtb \ - sun50i-a64-pinebook.dtb \ -+ sun50i-a64-pinephone-1.0.dtb \ -+ sun50i-a64-pinephone-1.1.dtb \ -+ sun50i-a64-pinephone-1.2.dtb \ - sun50i-a64-sopine-baseboard.dtb \ - sun50i-a64-teres-i.dtb - dtb-$(CONFIG_MACH_SUN9I) += \ -diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts -new file mode 100644 -index 0000000000..0c42272106 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts -@@ -0,0 +1,11 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+ -+/dts-v1/; -+ -+#include "sun50i-a64-pinephone.dtsi" -+ -+/ { -+ model = "Pine64 PinePhone Developer Batch (1.0)"; -+ compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64"; -+}; -diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts -new file mode 100644 -index 0000000000..06a775c416 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts -@@ -0,0 +1,11 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+ -+/dts-v1/; -+ -+#include "sun50i-a64-pinephone.dtsi" -+ -+/ { -+ model = "Pine64 PinePhone Braveheart (1.1)"; -+ compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; -+}; -diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.2.dts b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts -new file mode 100644 -index 0000000000..a9f5b670c9 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts -@@ -0,0 +1,40 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+ -+/dts-v1/; -+ -+#include "sun50i-a64-pinephone.dtsi" -+ -+/ { -+ model = "Pine64 PinePhone (1.2)"; -+ compatible = "pine64,pinephone-1.2", "allwinner,sun50i-a64"; -+}; -+ -+&backlight { -+ power-supply = <®_ldo_io0>; -+ /* -+ * PWM backlight circuit on this PinePhone revision was changed since 1.0, -+ * and the lowest PWM duty cycle that doesn't lead to backlight being off -+ * is around 10%. Duty cycle for the lowest brightness level also varries -+ * quite a bit between individual boards, so the lowest value here was -+ * chosen as a safe default. -+ */ -+ brightness-levels = < -+ 5000 5248 5506 5858 6345 -+ 6987 7805 8823 10062 11543 -+ 13287 15317 17654 20319 23336 -+ 26724 30505 34702 39335 44427 -+ 50000 -+ >; -+ num-interpolated-steps = <50>; -+ default-brightness-level = <500>; -+}; -+ -+&lis3mdl { -+ /* -+ * Board revision 1.2 fixed routing of the interrupt to DRDY pin, -+ * enable interrupts. -+ */ -+ interrupt-parent = <&pio>; -+ interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */ -+}; -diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi -new file mode 100644 -index 0000000000..cefda145c3 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi -@@ -0,0 +1,379 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2019 Icenowy Zheng -+// Copyright (C) 2020 Martijn Braam -+// Copyright (C) 2020 Ondrej Jirman -+ -+#include "sun50i-a64.dtsi" -+#include "sun50i-a64-cpu-opp.dtsi" -+ -+#include -+#include -+#include -+#include -+ -+/ { -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ blue { -+ function = LED_FUNCTION_INDICATOR; -+ color = ; -+ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ -+ }; -+ -+ green { -+ function = LED_FUNCTION_INDICATOR; -+ color = ; -+ gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ -+ }; -+ -+ red { -+ function = LED_FUNCTION_INDICATOR; -+ color = ; -+ gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ -+ }; -+ }; -+ -+ speaker_amp: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ -+ sound-name-prefix = "Speaker Amp"; -+ }; -+ -+ vibrator { -+ compatible = "gpio-vibrator"; -+ enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ -+ vcc-supply = <®_dcdc1>; -+ }; -+}; -+ -+&codec { -+ status = "okay"; -+}; -+ -+&codec_analog { -+ cpvdd-supply = <®_eldo1>; -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu1 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu2 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu3 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&dai { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ /* Magnetometer */ -+ lis3mdl@1e { -+ compatible = "st,lis3mdl-magn"; -+ reg = <0x1e>; -+ vdd-supply = <®_dldo1>; -+ vddio-supply = <®_dldo1>; -+ }; -+ -+ /* Accelerometer/gyroscope */ -+ mpu6050@68 { -+ compatible = "invensense,mpu6050"; -+ reg = <0x68>; -+ interrupt-parent = <&pio>; -+ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ -+ vdd-supply = <®_dldo1>; -+ vddio-supply = <®_dldo1>; -+ }; -+}; -+ -+/* Connected to pogo pins (external spring based pinheader for user addons) */ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&lradc { -+ vref-supply = <®_aldo3>; -+ status = "okay"; -+ -+ button-200 { -+ label = "Volume Up"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <200000>; -+ }; -+ -+ button-400 { -+ label = "Volume Down"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <400000>; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins>; -+ vmmc-supply = <®_dcdc1>; -+ vqmmc-supply = <®_dcdc1>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -+ disable-wp; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc2_pins>; -+ vmmc-supply = <®_dcdc1>; -+ vqmmc-supply = <®_dcdc1>; -+ bus-width = <8>; -+ non-removable; -+ cap-mmc-hw-reset; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&pio { -+ vcc-pb-supply = <®_dcdc1>; -+ vcc-pc-supply = <®_dcdc1>; -+ vcc-pd-supply = <®_dcdc1>; -+ vcc-pe-supply = <®_aldo1>; -+ vcc-pf-supply = <®_dcdc1>; -+ vcc-pg-supply = <®_dldo4>; -+ vcc-ph-supply = <®_dcdc1>; -+}; -+ -+&r_pio { -+ /* -+ * FIXME: We can't add that supply for now since it would -+ * create a circular dependency between pinctrl, the regulator -+ * and the RSB Bus. -+ * -+ * vcc-pl-supply = <®_aldo2>; -+ */ -+}; -+ -+&r_rsb { -+ status = "okay"; -+ -+ axp803: pmic@3a3 { -+ compatible = "x-powers,axp803"; -+ reg = <0x3a3>; -+ interrupt-parent = <&r_intc>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ }; -+}; -+ -+#include "axp803.dtsi" -+ -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ -+®_aldo1 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "dovdd-csi"; -+}; -+ -+®_aldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc-pl"; -+}; -+ -+®_aldo3 { -+ regulator-always-on; -+ regulator-min-microvolt = <2700000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pll-avcc"; -+}; -+ -+®_dcdc1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; -+}; -+ -+®_dcdc2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-name = "vdd-cpux"; -+}; -+ -+/* DCDC3 is polyphased with DCDC2 */ -+ -+®_dcdc5 { -+ regulator-always-on; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-dram"; -+}; -+ -+®_dcdc6 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-sys"; -+}; -+ -+®_dldo1 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-dsi-sensor"; -+}; -+ -+®_dldo2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc-mipi-io"; -+}; -+ -+®_dldo3 { -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ regulator-name = "avdd-csi"; -+}; -+ -+®_dldo4 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-wifi-io"; -+}; -+ -+®_eldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc-lpddr"; -+}; -+ -+®_eldo3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "dvdd-1v8-csi"; -+}; -+ -+®_fldo1 { -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-1v2-hsic"; -+}; -+ -+®_fldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-cpus"; -+}; -+ -+®_ldo_io0 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-lcd-ctp-stk"; -+ status = "okay"; -+}; -+ -+®_ldo_io1 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc-1v8-typec"; -+ status = "okay"; -+}; -+ -+®_rtc_ldo { -+ regulator-name = "vcc-rtc"; -+}; -+ -+&sound { -+ status = "okay"; -+ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; -+ simple-audio-card,widgets = "Microphone", "Headset Microphone", -+ "Microphone", "Internal Microphone", -+ "Headphone", "Headphone Jack", -+ "Speaker", "Internal Earpiece", -+ "Speaker", "Internal Speaker"; -+ simple-audio-card,routing = -+ "Headphone Jack", "HP", -+ "Internal Earpiece", "EARPIECE", -+ "Internal Speaker", "Speaker Amp OUTL", -+ "Internal Speaker", "Speaker Amp OUTR", -+ "Speaker Amp INL", "LINEOUT", -+ "Speaker Amp INR", "LINEOUT", -+ "Left DAC", "AIF1 Slot 0 Left", -+ "Right DAC", "AIF1 Slot 0 Right", -+ "AIF1 Slot 0 Left ADC", "Left ADC", -+ "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Internal Microphone", "MBIAS", -+ "MIC1", "Internal Microphone", -+ "Headset Microphone", "HBIAS", -+ "MIC2", "Headset Microphone"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pb_pins>; -+ status = "okay"; -+}; -+ -+/* Connected to the modem (hardware flow control can't be used) */ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart3_pins>; -+ status = "okay"; -+}; -+ -+&usb_otg { -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; --- -2.26.2 - -From bed9375bf6d11bdbf08839135541c44d80189384 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 9 Sep 2020 11:19:09 +0100 -Subject: [PATCH] pinephone dts sync to 5.9-rc1 - ---- - arch/arm/dts/sun50i-a64-pinephone-1.1.dts | 19 ++++++++ - arch/arm/dts/sun50i-a64-pinephone.dtsi | 54 ++++++++++++++++++++++- - 2 files changed, 71 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts -index 06a775c416..3e99a87e9c 100644 ---- a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts -+++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts -@@ -9,3 +9,22 @@ - model = "Pine64 PinePhone Braveheart (1.1)"; - compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; - }; -+ -+&backlight { -+ power-supply = <®_ldo_io0>; -+ /* -+ * PWM backlight circuit on this PinePhone revision was changed since -+ * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight -+ * being off is around 20%. Duty cycle for the lowest brightness level -+ * also varries quite a bit between individual boards, so the lowest -+ * value here was chosen as a safe default. -+ */ -+ brightness-levels = < -+ 774 793 814 842 -+ 882 935 1003 1088 -+ 1192 1316 1462 1633 -+ 1830 2054 2309 2596 -+ 2916 3271 3664 4096>; -+ num-interpolated-steps = <50>; -+ default-brightness-level = <400>; -+}; -diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi -index cefda145c3..25150aba74 100644 ---- a/arch/arm/dts/sun50i-a64-pinephone.dtsi -+++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi -@@ -16,6 +16,13 @@ - serial0 = &uart0; - }; - -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>; -+ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ -+ /* Backlight configuration differs per PinePhone revision. */ -+ }; -+ - chosen { - stdout-path = "serial0:115200n8"; - }; -@@ -84,6 +91,28 @@ - status = "okay"; - }; - -+&de { -+ status = "okay"; -+}; -+ -+&dphy { -+ status = "okay"; -+}; -+ -+&dsi { -+ vcc-dsi-supply = <®_dldo1>; -+ status = "okay"; -+ -+ panel@0 { -+ compatible = "xingbangda,xbd599"; -+ reg = <0>; -+ reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */ -+ iovcc-supply = <®_dldo2>; -+ vcc-supply = <®_ldo_io0>; -+ backlight = <&backlight>; -+ }; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -92,11 +121,28 @@ - status = "okay"; - }; - -+&i2c0 { -+ status = "okay"; -+ -+ touchscreen@5d { -+ compatible = "goodix,gt917s"; -+ reg = <0x5d>; -+ interrupt-parent = <&pio>; -+ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ -+ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ -+ AVDD28-supply = <®_ldo_io0>; -+ VDDIO-supply = <®_ldo_io0>; -+ touchscreen-size-x = <720>; -+ touchscreen-size-y = <1440>; -+ }; -+}; -+ - &i2c1 { - status = "okay"; - - /* Magnetometer */ -- lis3mdl@1e { -+ lis3mdl: lis3mdl@1e { - compatible = "st,lis3mdl-magn"; - reg = <0x1e>; - vdd-supply = <®_dldo1>; -@@ -188,6 +234,10 @@ - */ - }; - -+&r_pwm { -+ status = "okay"; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -279,7 +329,7 @@ - - ®_dldo4 { - regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -+ regulator-max-microvolt = <1800000>; - regulator-name = "vcc-wifi-io"; - }; - --- -2.26.2 - -From ab4bad52587be7da4262d943f19b5db02a24a045 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 15 Jul 2020 13:14:09 +0100 -Subject: [PATCH 8/8] Initial Pine64 Pinephone support - -The Pine64 Pinephone is a smartphone based on the AllWinner A64 SoC. -It has the following features: -* 2GB LPDDR3 SDRAM -* 5.95 inch 1440x720 HD IPS capacitive touchscreen -* 16GB eMMC, mSD slot -* Quectel EG25 LTE Modem -* Realtek RTL8723CS WiFi/BT -* Front and read cameras -* Accelerometer, gyro, proximity, ambient light, compass sensors -* A USB Type-C, USB Host, DisplayPort alt mode output, 15W 5V 3A Quick Charge, follows USB PD specification - -Signed-off-by: Peter Robinson ---- - arch/arm/Kconfig | 2 +- - configs/pinephone_defconfig | 38 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 39 insertions(+), 1 deletion(-) - create mode 100644 configs/pinephone_defconfig - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index e16fe03887..636ba26938 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1004,7 +1004,7 @@ config ARCH_SUNXI - bool "Support sunxi (Allwinner) SoCs" - select BINMAN - select CMD_GPIO -- select CMD_MMC if MMC -+select CMD_MMC if MMC - select CMD_USB if DISTRO_DEFAULTS - select CLK - select DM -diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig -new file mode 100644 -index 0000000000..d5750aa954 ---- /dev/null -+++ b/configs/pinephone_defconfig -@@ -0,0 +1,39 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN50I=y -+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y -+CONFIG_DRAM_CLK=552 -+CONFIG_DRAM_ZQ=3881949 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_R_I2C_ENABLE=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+# CONFIG_SPL_SPI_SUNXI is not set -+# CONFIG_SPL_DOS_PARTITION is not set -+# CONFIG_SPL_EFI_PARTITION is not set -+CONFIG_PINEPHONE_DT_SELECTION=y -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" -+CONFIG_OF_LIST=" sun50i-a64-pinephone-1.2 sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.0" -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_PWM=y -+CONFIG_PWM_SUNXI=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+# CONFIG_CMD_MII is not set -+# CONFIG_CMD_NFS is not set -+# CONFIG_DM_ETH is not set -+# CONFIG_PHY is not set -+# CONFIG_PHY_GIGE is not set -+# CONFIG_SUN8I_EMAC is not set -+# CONFIG_PHY_REALTEK is not set -+# CONFIG_CMD_SF is not set -+# CONFIG_SPI is not set -+# CONFIG_DM_SPI is not set -+# CONFIG_SPI_FLASH is not set -+# CONFIG_SPI_MEM is not set -+# CONFIG_DM_SPI_FLASH is not set --- -2.26.2 diff --git a/AllWinner-PineTab.patch b/AllWinner-PineTab.patch index ce569e7..04b6896 100644 --- a/AllWinner-PineTab.patch +++ b/AllWinner-PineTab.patch @@ -1,496 +1,3 @@ -From 9b10863bc8b14ca5463a95dd2c77555cfc68f326 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 9 Sep 2020 10:59:31 +0100 -Subject: [PATCH] Initial PineTab dts from linux 5.7-rc1 - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++++++++++++ - 2 files changed, 461 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-pinetab.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 193f5c6138..57ef94450a 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -611,6 +611,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-pinephone-1.0.dtb \ - sun50i-a64-pinephone-1.1.dtb \ - sun50i-a64-pinephone-1.2.dtb \ -+ sun50i-a64-pinetab.dtb \ - sun50i-a64-sopine-baseboard.dtb \ - sun50i-a64-teres-i.dtb - dtb-$(CONFIG_MACH_SUN9I) += \ -diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts -new file mode 100644 -index 0000000000..316e8a4439 ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-pinetab.dts -@@ -0,0 +1,460 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2019 Icenowy Zheng -+ * -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-a64.dtsi" -+#include "sun50i-a64-cpu-opp.dtsi" -+ -+#include -+#include -+#include -+ -+/ { -+ model = "PineTab"; -+ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; -+ -+ aliases { -+ serial0 = &uart0; -+ ethernet0 = &rtl8723cs; -+ }; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; -+ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; -+ default-brightness-level = <15>; -+ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ -+ power-supply = <&vdd_bl>; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ i2c-csi { -+ compatible = "i2c-gpio"; -+ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ -+ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ -+ i2c-gpio,delay-us = <5>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* Rear camera */ -+ ov5640: camera@3c { -+ compatible = "ovti,ov5640"; -+ reg = <0x3c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&csi_mclk_pin>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ -+ AVDD-supply = <®_dldo3>; -+ DOVDD-supply = <®_aldo1>; -+ DVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ -+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ -+ -+ port { -+ ov5640_ep: endpoint { -+ remote-endpoint = <&csi_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+ }; -+ }; -+ -+ speaker_amp: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ sound-name-prefix = "Speaker Amp"; -+ }; -+ -+ vdd_bl: regulator@0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "bl-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ -+ enable-active-high; -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&codec { -+ status = "okay"; -+}; -+ -+&codec_analog { -+ hpvcc-supply = <®_eldo1>; -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu1 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu2 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu3 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&csi { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_ep: endpoint { -+ remote-endpoint = <&ov5640_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+}; -+ -+&dai { -+ status = "okay"; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&dphy { -+ status = "okay"; -+}; -+ -+&dsi { -+ vcc-dsi-supply = <®_dldo1>; -+ status = "okay"; -+ -+ panel@0 { -+ compatible = "feixin,k101-im2ba02"; -+ reg = <0>; -+ avdd-supply = <®_dc1sw>; -+ dvdd-supply = <®_dc1sw>; -+ cvdd-supply = <®_ldo_io1>; -+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ -+ backlight = <&backlight>; -+ }; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ status = "okay"; -+ -+ touchscreen@5d { -+ compatible = "goodix,gt9271"; -+ reg = <0x5d>; -+ interrupt-parent = <&pio>; -+ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ -+ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ -+ AVDD28-supply = <®_ldo_io1>; -+ }; -+}; -+ -+&i2c0_pins { -+ bias-pull-up; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ /* TODO: add Bochs BMA223 accelerometer here */ -+}; -+ -+&lradc { -+ vref-supply = <®_aldo3>; -+ status = "okay"; -+ -+ button-200 { -+ label = "Volume Up"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <200000>; -+ }; -+ -+ button-400 { -+ label = "Volume Down"; -+ linux,code = ; -+ channel = <0>; -+ voltage = <400000>; -+ }; -+}; -+ -+&mixer1 { -+ status = "okay"; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins>; -+ vmmc-supply = <®_dcdc1>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins>; -+ vmmc-supply = <®_dldo4>; -+ vqmmc-supply = <®_eldo1>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ rtl8723cs: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+&mmc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc2_pins>; -+ vmmc-supply = <®_dcdc1>; -+ vqmmc-supply = <®_dcdc1>; -+ bus-width = <8>; -+ non-removable; -+ cap-mmc-hw-reset; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&pwm { -+ status = "okay"; -+}; -+ -+&r_rsb { -+ status = "okay"; -+ -+ axp803: pmic@3a3 { -+ compatible = "x-powers,axp803"; -+ reg = <0x3a3>; -+ interrupt-parent = <&r_intc>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ x-powers,drive-vbus-en; -+ }; -+}; -+ -+#include "axp803.dtsi" -+ -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ -+®_aldo1 { -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ regulator-name = "dovdd-csi"; -+}; -+ -+®_aldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pl"; -+}; -+ -+®_aldo3 { -+ regulator-always-on; -+ regulator-min-microvolt = <2700000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pll-avcc"; -+}; -+ -+®_dc1sw { -+ regulator-name = "vcc-lcd"; -+}; -+ -+®_dcdc1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; -+}; -+ -+®_dcdc2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-name = "vdd-cpux"; -+}; -+ -+/* DCDC3 is polyphased with DCDC2 */ -+ -+®_dcdc5 { -+ regulator-always-on; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-dram"; -+}; -+ -+®_dcdc6 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-sys"; -+}; -+ -+®_dldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-hdmi-dsi-sensor"; -+}; -+ -+®_dldo3 { -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ regulator-name = "avdd-csi"; -+}; -+ -+®_dldo4 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-wifi"; -+}; -+ -+®_drivevbus { -+ regulator-name = "usb0-vbus"; -+ status = "okay"; -+}; -+ -+®_eldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "cpvdd"; -+}; -+ -+®_eldo2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcca-1v8"; -+}; -+ -+®_eldo3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "dvdd-1v8-csi"; -+}; -+ -+®_fldo1 { -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-1v2-hsic"; -+}; -+ -+®_fldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-cpus"; -+}; -+ -+®_ldo_io0 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-usb"; -+ status = "okay"; -+}; -+ -+®_ldo_io1 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-enable-ramp-delay = <3500000>; -+ regulator-name = "vcc-touchscreen"; -+ status = "okay"; -+}; -+ -+®_rtc_ldo { -+ regulator-name = "vcc-rtc"; -+}; -+ -+&sound { -+ status = "okay"; -+ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; -+ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", -+ "Microphone", "Internal Microphone Right", -+ "Headphone", "Headphone Jack", -+ "Speaker", "Internal Speaker"; -+ simple-audio-card,routing = -+ "Left DAC", "AIF1 Slot 0 Left", -+ "Right DAC", "AIF1 Slot 0 Right", -+ "Speaker Amp INL", "LINEOUT", -+ "Speaker Amp INR", "LINEOUT", -+ "Internal Speaker", "Speaker Amp OUTL", -+ "Internal Speaker", "Speaker Amp OUTR", -+ "Headphone Jack", "HP", -+ "AIF1 Slot 0 Left ADC", "Left ADC", -+ "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Internal Microphone Left", "MBIAS", -+ "MIC1", "Internal Microphone Left", -+ "Internal Microphone Right", "HBIAS", -+ "MIC2", "Internal Microphone Right"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pb_pins>; -+ status = "okay"; -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; -+ usb1_vbus-supply = <®_ldo_io0>; -+ status = "okay"; -+}; --- -2.26.2 - From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 14 Apr 2020 09:53:07 +0100 diff --git a/AllWinner-UpstreamSync.patch b/AllWinner-UpstreamSync.patch deleted file mode 100644 index 0b6bac4..0000000 --- a/AllWinner-UpstreamSync.patch +++ /dev/null @@ -1,1297 +0,0 @@ -From 6e5d771060dff5350e5940b7e457884b47a560ac Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:20:53 +0100 -Subject: [PATCH 1/8] dt-bindings: clk: sync sun50i-a64-ccu.h to linux 5.8-rc1 - -Sync the clock bindings for the Allwinner A64 to Linux - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/clock/sun50i-a64-ccu.h | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h -index d66432c6e6..318eb15c41 100644 ---- a/include/dt-bindings/clock/sun50i-a64-ccu.h -+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h -@@ -43,8 +43,10 @@ - #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ - #define _DT_BINDINGS_CLK_SUN50I_A64_H_ - -+#define CLK_PLL_VIDEO0 7 - #define CLK_PLL_PERIPH0 11 - -+#define CLK_CPUX 21 - #define CLK_BUS_MIPI_DSI 28 - #define CLK_BUS_CE 29 - #define CLK_BUS_DMA 30 -@@ -129,7 +131,7 @@ - #define CLK_AVS 109 - #define CLK_HDMI 110 - #define CLK_HDMI_DDC 111 -- -+#define CLK_MBUS 112 - #define CLK_DSI_DPHY 113 - #define CLK_GPU 114 - --- -2.26.2 - -From 274dff055e80778277860f72a903c01ef33f87c7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:29:15 +0100 -Subject: [PATCH 2/8] dt-bindings: leds: sync leds common.h to linux from - 5.8-rc1 - -Sync the leds common.h to the latest Linux version. - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/leds/common.h | 36 ++++++++++++++++++++++--------- - 1 file changed, 26 insertions(+), 10 deletions(-) - -diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h -index 9e1256a7c1..0ce7dfc00d 100644 ---- a/include/dt-bindings/leds/common.h -+++ b/include/dt-bindings/leds/common.h -@@ -6,6 +6,7 @@ - * Author: Jacek Anaszewski - * - * Copyright (C) 2019 Jacek Anaszewski -+ * Copyright (C) 2020 Pavel Machek - */ - - #ifndef __DT_BINDINGS_LEDS_H -@@ -32,16 +33,38 @@ - #define LED_COLOR_ID_MAX 8 - - /* Standard LED functions */ -+/* Keyboard LEDs, usually it would be input4::capslock etc. */ -+/* Obsolete equivalent: "shift-key-light" */ -+#define LED_FUNCTION_CAPSLOCK "capslock" -+#define LED_FUNCTION_SCROLLLOCK "scrolllock" -+#define LED_FUNCTION_NUMLOCK "numlock" -+/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads), -+ "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */ -+#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" -+ -+/* System LEDs, usually found on system body. -+ platform::mute (etc) is sometimes seen, :mute would be better */ -+#define LED_FUNCTION_POWER "power" -+#define LED_FUNCTION_DISK "disk" -+ -+/* Obsolete: "platform:*:charging" (allwinner sun50i) */ -+#define LED_FUNCTION_CHARGING "charging" -+/* Used RGB notification LEDs common on phones. -+ Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4), -+ "lp5523:{r,g,b}" (Nokia N900) */ -+#define LED_FUNCTION_STATUS "status" -+ -+#define LED_FUNCTION_MICMUTE "micmute" -+#define LED_FUNCTION_MUTE "mute" -+ -+/* Miscelleaus functions. Use functions above if you can. */ - #define LED_FUNCTION_ACTIVITY "activity" - #define LED_FUNCTION_ALARM "alarm" - #define LED_FUNCTION_BACKLIGHT "backlight" - #define LED_FUNCTION_BLUETOOTH "bluetooth" - #define LED_FUNCTION_BOOT "boot" - #define LED_FUNCTION_CPU "cpu" --#define LED_FUNCTION_CAPSLOCK "capslock" --#define LED_FUNCTION_CHARGING "charging" - #define LED_FUNCTION_DEBUG "debug" --#define LED_FUNCTION_DISK "disk" - #define LED_FUNCTION_DISK_ACTIVITY "disk-activity" - #define LED_FUNCTION_DISK_ERR "disk-err" - #define LED_FUNCTION_DISK_READ "disk-read" -@@ -50,21 +73,14 @@ - #define LED_FUNCTION_FLASH "flash" - #define LED_FUNCTION_HEARTBEAT "heartbeat" - #define LED_FUNCTION_INDICATOR "indicator" --#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" - #define LED_FUNCTION_LAN "lan" - #define LED_FUNCTION_MAIL "mail" - #define LED_FUNCTION_MTD "mtd" --#define LED_FUNCTION_MICMUTE "micmute" --#define LED_FUNCTION_MUTE "mute" --#define LED_FUNCTION_NUMLOCK "numlock" - #define LED_FUNCTION_PANIC "panic" - #define LED_FUNCTION_PROGRAMMING "programming" --#define LED_FUNCTION_POWER "power" - #define LED_FUNCTION_RX "rx" - #define LED_FUNCTION_SD "sd" --#define LED_FUNCTION_SCROLLLOCK "scrolllock" - #define LED_FUNCTION_STANDBY "standby" --#define LED_FUNCTION_STATUS "status" - #define LED_FUNCTION_TORCH "torch" - #define LED_FUNCTION_TX "tx" - #define LED_FUNCTION_USB "usb" --- -2.26.2 - -From 7010e7d2b19d2ded674e376855d2716b7cd421b7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 10 Jul 2020 12:46:11 +0100 -Subject: [PATCH 3/8] dt-bindings: clk/reset: sync updated bindings for - Allwinner DE2 display engine - -Sync the clock and reset bindings for the Allwinner DE2 display engine to Linux 5.8-rc1. - -Signed-off-by: Peter Robinson ---- - include/dt-bindings/clock/sun8i-de2.h | 3 +++ - include/dt-bindings/reset/sun8i-de2.h | 1 + - 2 files changed, 4 insertions(+) - -diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h -index 3bed63b524..7768f73b05 100644 ---- a/include/dt-bindings/clock/sun8i-de2.h -+++ b/include/dt-bindings/clock/sun8i-de2.h -@@ -15,4 +15,7 @@ - #define CLK_MIXER1 7 - #define CLK_WB 8 - -+#define CLK_BUS_ROT 9 -+#define CLK_ROT 10 -+ - #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ -diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h -index 9526017432..1c36a6ac86 100644 ---- a/include/dt-bindings/reset/sun8i-de2.h -+++ b/include/dt-bindings/reset/sun8i-de2.h -@@ -10,5 +10,6 @@ - #define RST_MIXER0 0 - #define RST_MIXER1 1 - #define RST_WB 2 -+#define RST_ROT 3 - - #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ --- -2.26.2 - -From bdbf5f21343571af989754c908299854e81f44dd Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:24:41 +0100 -Subject: [PATCH 4/8] arm: dts: sync axp803.dtsi from linux 5.8-rc1 - -Sync the Allwinner axp803 device tree to the latest upstream Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/axp803.dtsi | 82 ++++++++++++++++++++-------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - -diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi -index e5eae8bafc..10e9186a76 100644 ---- a/arch/arm/dts/axp803.dtsi -+++ b/arch/arm/dts/axp803.dtsi -@@ -1,44 +1,5 @@ --/* -- * Copyright 2017 Icenowy Zheng -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright 2017 Icenowy Zheng - - /* - * AXP803 Integrated Power Management Chip -@@ -49,6 +10,39 @@ - interrupt-controller; - #interrupt-cells = <1>; - -+ ac_power_supply: ac-power-supply { -+ compatible = "x-powers,axp803-ac-power-supply", -+ "x-powers,axp813-ac-power-supply"; -+ status = "disabled"; -+ }; -+ -+ axp_adc: adc { -+ compatible = "x-powers,axp803-adc", "x-powers,axp813-adc"; -+ #io-channel-cells = <1>; -+ }; -+ -+ axp_gpio: gpio { -+ compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ gpio0_ldo: gpio0-ldo { -+ pins = "GPIO0"; -+ function = "ldo"; -+ }; -+ -+ gpio1_ldo: gpio1-ldo { -+ pins = "GPIO1"; -+ function = "ldo"; -+ }; -+ }; -+ -+ battery_power_supply: battery-power-supply { -+ compatible = "x-powers,axp803-battery-power-supply", -+ "x-powers,axp813-battery-power-supply"; -+ status = "disabled"; -+ }; -+ - regulators { - /* Default work frequency for buck regulators */ - x-powers,dcdc-freq = <3000>; -@@ -152,4 +146,10 @@ - status = "disabled"; - }; - }; -+ -+ usb_power_supply: usb-power-supply { -+ compatible = "x-powers,axp803-usb-power-supply", -+ "x-powers,axp813-usb-power-supply"; -+ status = "disabled"; -+ }; - }; --- -2.26.2 - -From e0f7e9ce1a8a889bf7a1c5842700f0cb368bc81b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 9 Jul 2020 12:26:34 +0100 -Subject: [PATCH 5/8] arm: dts: Add new sun50i-a64-cpu-opp.dtsi from Linux - 5.8-rc1 - -Sync the Allwinner A64 CPU operating points dtsi from Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 75 ++++++++++++++++++++++++++++ - 1 file changed, 75 insertions(+) - create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi - -diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -new file mode 100644 -index 0000000000..578c37490d ---- /dev/null -+++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi -@@ -0,0 +1,75 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2020 Vasily khoruzhick -+ */ -+ -+/ { -+ cpu0_opp_table: opp_table0 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ -+ opp-648000000 { -+ opp-hz = /bits/ 64 <648000000>; -+ opp-microvolt = <1040000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-816000000 { -+ opp-hz = /bits/ 64 <816000000>; -+ opp-microvolt = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-912000000 { -+ opp-hz = /bits/ 64 <912000000>; -+ opp-microvolt = <1120000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-960000000 { -+ opp-hz = /bits/ 64 <960000000>; -+ opp-microvolt = <1160000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; -+ opp-microvolt = <1200000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1240000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt = <1260000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1152000000 { -+ opp-hz = /bits/ 64 <1152000000>; -+ opp-microvolt = <1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu0_opp_table>; -+}; --- -2.26.2 - -From b077a5962ba631e198d42c14516426b878c157eb Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 10 Jul 2020 12:39:21 +0100 -Subject: [PATCH 6/8] arm: dts: Sync the sun50i-a64.dtsi from Linux 5.8-rc1 - -Sync the Allwinner A64 sun50i-a64.dtsi from Linux. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++------- - 1 file changed, 434 insertions(+), 98 deletions(-) - -diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index ff41abc96a..8dfbcd1440 100644 ---- a/arch/arm/dts/sun50i-a64.dtsi -+++ b/arch/arm/dts/sun50i-a64.dtsi -@@ -1,46 +1,7 @@ --/* -- * Copyright (C) 2016 ARM Ltd. -- * based on the Allwinner H3 dtsi: -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2016 ARM Ltd. -+// based on the Allwinner H3 dtsi: -+// Copyright (C) 2015 Jens Kuske - - #include - #include -@@ -49,6 +10,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -84,35 +46,47 @@ - #size-cells = <0>; - - cpu0: cpu@0 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -- compatible = "arm,cortex-a53", "arm,armv8"; -+ compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; - next-level-cache = <&L2>; -+ clocks = <&ccu 21>; -+ clock-names = "cpu"; -+ #cooling-cells = <2>; - }; - - L2: l2-cache { -@@ -139,15 +113,16 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; -- clock-output-names = "osc32k"; -+ clock-output-names = "ext-osc32k"; - }; - -- iosc: internal-osc-clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <16000000>; -- clock-accuracy = <300000000>; -- clock-output-names = "iosc"; -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = , -+ , -+ , -+ ; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { -@@ -155,26 +130,33 @@ - method = "smc"; - }; - -- sound_spdif { -+ sound: sound { - compatible = "simple-audio-card"; -- simple-audio-card,name = "On-board SPDIF"; -+ simple-audio-card,name = "sun50i-a64-audio"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,frame-master = <&cpudai>; -+ simple-audio-card,bitclock-master = <&cpudai>; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,aux-devs = <&codec_analog>; -+ simple-audio-card,routing = -+ "Left DAC", "AIF1 Slot 0 Left", -+ "Right DAC", "AIF1 Slot 0 Right", -+ "AIF1 Slot 0 Left ADC", "Left ADC", -+ "AIF1 Slot 0 Right ADC", "Right ADC"; -+ status = "disabled"; - -- simple-audio-card,cpu { -- sound-dai = <&spdif>; -+ cpudai: simple-audio-card,cpu { -+ sound-dai = <&dai>; - }; - -- simple-audio-card,codec { -- sound-dai = <&spdif_out>; -+ link_codec: simple-audio-card,codec { -+ sound-dai = <&codec>; - }; - }; - -- spdif_out: spdif-out { -- #sound-dai-cells = <0>; -- compatible = "linux,spdif-dit"; -- }; -- - timer { - compatible = "arm,armv8-timer"; -+ allwinner,erratum-unknown1; - interrupts = , - ; - }; - -+ thermal-zones { -+ cpu_thermal: cpu0-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 0>; -+ -+ cooling-maps { -+ map0 { -+ trip = <&cpu_alert0>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ map1 { -+ trip = <&cpu_alert1>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ -+ trips { -+ cpu_alert0: cpu_alert0 { -+ /* milliCelsius */ -+ temperature = <75000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu_alert1: cpu_alert1 { -+ /* milliCelsius */ -+ temperature = <90000>; -+ hysteresis = <2000>; -+ type = "hot"; -+ }; -+ -+ cpu_crit: cpu_crit { -+ /* milliCelsius */ -+ temperature = <110000>; -+ hysteresis = <2000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ gpu0_thermal: gpu0-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ }; -+ -+ gpu1_thermal: gpu1-thermal { -+ /* milliseconds */ -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 2>; -+ }; -+ }; -+ - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - -- de2@1000000 { -+ bus@1000000 { - compatible = "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; -@@ -201,16 +246,28 @@ - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-a64-de2-clk"; -- reg = <0x0 0x100000>; -- clocks = <&ccu CLK_DE>, -- <&ccu CLK_BUS_DE>; -- clock-names = "mod", -- "bus"; -+ reg = <0x0 0x10000>; -+ clocks = <&ccu CLK_BUS_DE>, -+ <&ccu CLK_DE>; -+ clock-names = "bus", -+ "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ rotate: rotate@20000 { -+ compatible = "allwinner,sun50i-a64-de2-rotate", -+ "allwinner,sun8i-a83t-de2-rotate"; -+ reg = <0x20000 0x10000>; -+ interrupts = ; -+ clocks = <&display_clocks CLK_BUS_ROT>, -+ <&display_clocks CLK_ROT>; -+ clock-names = "bus", -+ "mod"; -+ resets = <&display_clocks RST_ROT>; -+ }; -+ - mixer0: mixer@100000 { - compatible = "allwinner,sun50i-a64-de2-mixer-0"; - reg = <0x100000 0x100000>; -@@ -225,11 +282,19 @@ - #size-cells = <0>; - - mixer0_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; - -- mixer0_out_tcon0: endpoint { -+ mixer0_out_tcon0: endpoint@0 { -+ reg = <0>; - remote-endpoint = <&tcon0_in_mixer0>; - }; -+ -+ mixer0_out_tcon1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon1_in_mixer0>; -+ }; - }; - }; - }; -@@ -248,9 +313,17 @@ - #size-cells = <0>; - - mixer1_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; - -- mixer1_out_tcon1: endpoint { -+ mixer1_out_tcon0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon0_in_mixer1>; -+ }; -+ -+ mixer1_out_tcon1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&tcon1_in_mixer1>; - }; - }; -@@ -259,8 +332,7 @@ - }; - - syscon: syscon@1c00000 { -- compatible = "allwinner,sun50i-a64-system-control", -- "syscon"; -+ compatible = "allwinner,sun50i-a64-system-control"; - reg = <0x01c00000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; -@@ -278,6 +350,20 @@ - reg = <0x0000 0x28000>; - }; - }; -+ -+ sram_c1: sram@1d00000 { -+ compatible = "mmio-sram"; -+ reg = <0x01d00000 0x40000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x01d00000 0x40000>; -+ -+ ve_sram: sram-section@0 { -+ compatible = "allwinner,sun50i-a64-sram-c1", -+ "allwinner,sun4i-a10-sram-c1"; -+ reg = <0x000000 0x40000>; -+ }; -+ }; - }; - - dma: dma-controller@1c02000 { -@@ -299,6 +385,7 @@ - clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; -+ #clock-cells = <0>; - resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; - reset-names = "lcd", "lvds"; - -@@ -315,12 +402,23 @@ - reg = <0>; - remote-endpoint = <&mixer0_out_tcon0>; - }; -+ -+ tcon0_in_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&mixer1_out_tcon0>; -+ }; - }; - - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; -+ -+ tcon0_out_dsi: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&dsi_in_tcon0>; -+ allwinner,tcon-channel = <1>; -+ }; - }; - }; - }; -@@ -340,9 +438,17 @@ - #size-cells = <0>; - - tcon1_in: port@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <0>; - -- tcon1_in_mixer1: endpoint { -+ tcon1_in_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mixer0_out_tcon1>; -+ }; -+ -+ tcon1_in_mixer1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&mixer1_out_tcon1>; - }; - }; -@@ -360,6 +466,17 @@ - }; - }; - -+ video-codec@1c0e000 { -+ compatible = "allwinner,sun50i-a64-video-engine"; -+ reg = <0x01c0e000 0x1000>; -+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, -+ <&ccu CLK_DRAM_VE>; -+ clock-names = "ahb", "mod", "ram"; -+ resets = <&ccu RST_BUS_VE>; -+ interrupts = ; -+ allwinner,sram = <&ve_sram 1>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc"; - reg = <0x01c0f000 0x1000>; -@@ -405,6 +522,31 @@ - sid: eeprom@1c14000 { - compatible = "allwinner,sun50i-a64-sid"; - reg = <0x1c14000 0x400>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@34 { -+ reg = <0x34 0x8>; -+ }; -+ }; -+ -+ crypto: crypto@1c15000 { -+ compatible = "allwinner,sun50i-a64-crypto"; -+ reg = <0x01c15000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_CE>; -+ }; -+ -+ msgbox: mailbox@1c17000 { -+ compatible = "allwinner,sun50i-a64-msgbox", -+ "allwinner,sun6i-a31-msgbox"; -+ reg = <0x01c17000 0x1000>; -+ clocks = <&ccu CLK_BUS_MSGBOX>; -+ resets = <&ccu RST_BUS_MSGBOX>; -+ interrupts = ; -+ #mbox-cells = <1>; - }; - - usb_otg: usb@1c19000 { -@@ -417,6 +559,7 @@ - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; -+ dr_mode = "otg"; - status = "disabled"; - }; - -@@ -491,7 +634,7 @@ - ccu: clock@1c20000 { - compatible = "allwinner,sun50i-a64-ccu"; - reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -+ clocks = <&osc24M>, <&rtc 0>; - clock-names = "hosc", "losc"; - #clock-cells = <1>; - #reset-cells = <1>; -@@ -503,22 +646,50 @@ - interrupts = , - , - ; -- clocks = <&ccu 58>; -+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; -+ clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - -- i2c0_pins: i2c0_pins { -+ csi_pins: csi-pins { -+ pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", -+ "PE7", "PE8", "PE9", "PE10", "PE11"; -+ function = "csi"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi_mclk_pin: csi-mclk-pin { -+ pins = "PE1"; -+ function = "csi"; -+ }; -+ -+ i2c0_pins: i2c0-pins { - pins = "PH0", "PH1"; - function = "i2c0"; - }; - -- i2c1_pins: i2c1_pins { -+ i2c1_pins: i2c1-pins { - pins = "PH2", "PH3"; - function = "i2c1"; - }; - -+ i2c2_pins: i2c2-pins { -+ pins = "PE14", "PE15"; -+ function = "i2c2"; -+ }; -+ -+ /omit-if-no-ref/ -+ lcd_rgb666_pins: lcd-rgb666-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD6", "PD7", "PD8", "PD9", -+ "PD10", "PD11", "PD12", "PD13", -+ "PD14", "PD15", "PD16", "PD17", -+ "PD18", "PD19", "PD20", "PD21"; -+ function = "lcd0"; -+ }; -+ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; -@@ -551,19 +722,19 @@ - bias-pull-up; - }; - -- pwm_pin: pwm_pin { -+ pwm_pin: pwm-pin { - pins = "PD22"; - function = "pwm"; - }; - -- rmii_pins: rmii_pins { -+ rmii_pins: rmii-pins { - pins = "PD10", "PD11", "PD13", "PD14", "PD17", - "PD18", "PD19", "PD20", "PD22", "PD23"; - function = "emac"; - drive-strength = <40>; - }; - -- rgmii_pins: rgmii_pins { -+ rgmii_pins: rgmii-pins { - pins = "PD8", "PD9", "PD10", "PD11", "PD12", - "PD13", "PD15", "PD16", "PD17", "PD18", - "PD19", "PD20", "PD21", "PD22", "PD23"; -@@ -571,17 +742,17 @@ - drive-strength = <40>; - }; - -- spdif_tx_pin: spdif { -+ spdif_tx_pin: spdif-tx-pin { - pins = "PH8"; - function = "spdif"; - }; - -- spi0_pins: spi0 { -+ spi0_pins: spi0-pins { - pins = "PC0", "PC1", "PC2", "PC3"; - function = "spi0"; - }; - -- spi1_pins: spi1 { -+ spi1_pins: spi1-pins { - pins = "PD0", "PD1", "PD2", "PD3"; - function = "spi1"; - }; -@@ -591,12 +762,12 @@ - function = "uart0"; - }; - -- uart1_pins: uart1_pins { -+ uart1_pins: uart1-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - -- uart1_rts_cts_pins: uart1_rts_cts_pins { -+ uart1_rts_cts_pins: uart1-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; -@@ -638,6 +809,14 @@ - status = "disabled"; - }; - -+ lradc: lradc@1c21800 { -+ compatible = "allwinner,sun50i-a64-lradc", -+ "allwinner,sun8i-a83t-r-lradc"; -+ reg = <0x01c21800 0x400>; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ - i2s0: i2s@1c22000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-a64-i2s", -@@ -666,6 +845,41 @@ - status = "disabled"; - }; - -+ dai: dai@1c22c00 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun50i-a64-codec-i2s"; -+ reg = <0x01c22c00 0x200>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_CODEC>; -+ dmas = <&dma 15>, <&dma 15>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ codec: codec@1c22e00 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun8i-a33-codec"; -+ reg = <0x01c22e00 0x600>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -+ clock-names = "bus", "mod"; -+ status = "disabled"; -+ }; -+ -+ ths: thermal-sensor@1c25000 { -+ compatible = "allwinner,sun50i-a64-ths"; -+ reg = <0x01c25000 0x100>; -+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; -+ clock-names = "bus", "mod"; -+ interrupts = ; -+ resets = <&ccu RST_BUS_THS>; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <1>; -+ }; -+ - uart0: serial@1c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; -@@ -727,6 +941,8 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C0>; - resets = <&ccu RST_BUS_I2C0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; -@@ -738,6 +954,8 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C1>; - resets = <&ccu RST_BUS_I2C1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; -@@ -749,12 +967,13 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - -- - spi0: spi@1c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; -@@ -808,6 +1027,28 @@ - }; - }; - -+ mali: gpu@1c40000 { -+ compatible = "allwinner,sun50i-a64-mali", "arm,mali-400"; -+ reg = <0x01c40000 0x10000>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ interrupt-names = "gp", -+ "gpmmu", -+ "pp0", -+ "ppmmu0", -+ "pp1", -+ "ppmmu1", -+ "pmu"; -+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; -+ clock-names = "bus", "core"; -+ resets = <&ccu RST_BUS_GPU>; -+ }; -+ - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, -@@ -830,6 +1071,75 @@ - status = "disabled"; - }; - -+ mbus: dram-controller@1c62000 { -+ compatible = "allwinner,sun50i-a64-mbus"; -+ reg = <0x01c62000 0x1000>; -+ clocks = <&ccu 112>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ dma-ranges = <0x00000000 0x40000000 0xc0000000>; -+ #interconnect-cells = <1>; -+ }; -+ -+ csi: csi@1cb0000 { -+ compatible = "allwinner,sun50i-a64-csi"; -+ reg = <0x01cb0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CSI>, -+ <&ccu CLK_CSI_SCLK>, -+ <&ccu CLK_DRAM_CSI>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_CSI>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&csi_pins>; -+ status = "disabled"; -+ }; -+ -+ dsi: dsi@1ca0000 { -+ compatible = "allwinner,sun50i-a64-mipi-dsi"; -+ reg = <0x01ca0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ phys = <&dphy>; -+ phy-names = "dphy"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port { -+ dsi_in_tcon0: endpoint { -+ remote-endpoint = <&tcon0_out_dsi>; -+ }; -+ }; -+ }; -+ -+ dphy: d-phy@1ca1000 { -+ compatible = "allwinner,sun50i-a64-mipi-dphy", -+ "allwinner,sun6i-a31-mipi-dphy"; -+ reg = <0x01ca1000 0x1000>; -+ clocks = <&ccu CLK_BUS_MIPI_DSI>, -+ <&ccu CLK_DSI_DPHY>; -+ clock-names = "bus", "mod"; -+ resets = <&ccu RST_BUS_MIPI_DSI>; -+ status = "disabled"; -+ #phy-cells = <0>; -+ }; -+ -+ deinterlace: deinterlace@1e00000 { -+ compatible = "allwinner,sun50i-a64-deinterlace", -+ "allwinner,sun8i-h3-deinterlace"; -+ reg = <0x01e00000 0x20000>; -+ clocks = <&ccu CLK_BUS_DEINTERLACE>, -+ <&ccu CLK_DEINTERLACE>, -+ <&ccu CLK_DRAM_DEINTERLACE>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_DEINTERLACE>; -+ interrupts = ; -+ interconnects = <&mbus 9>; -+ interconnect-names = "dma-mem"; -+ }; -+ - hdmi: hdmi@1ee0000 { - compatible = "allwinner,sun50i-a64-dw-hdmi", - "allwinner,sun8i-a83t-dw-hdmi"; -@@ -842,7 +1152,7 @@ - resets = <&ccu RST_BUS_HDMI1>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; -- phy-names = "hdmi-phy"; -+ phy-names = "phy"; - status = "disabled"; - - ports { -@@ -867,7 +1177,7 @@ - compatible = "allwinner,sun50i-a64-hdmi-phy"; - reg = <0x01ef0000 0x10000>; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, -- <&ccu 7>; -+ <&ccu CLK_PLL_VIDEO0>; - clock-names = "bus", "mod", "pll-0"; - resets = <&ccu RST_BUS_HDMI0>; - reset-names = "phy"; -@@ -875,11 +1185,12 @@ - }; - - rtc: rtc@1f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -+ compatible = "allwinner,sun50i-a64-rtc", -+ "allwinner,sun8i-h3-rtc"; -+ reg = <0x01f00000 0x400>; - interrupts = , - ; -- clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; -+ clock-output-names = "osc32k", "osc32k-out", "iosc"; - clocks = <&osc32k>; - #clock-cells = <1>; - }; -@@ -896,13 +1207,19 @@ - r_ccu: clock@1f01400 { - compatible = "allwinner,sun50i-a64-r-ccu"; - reg = <0x01f01400 0x100>; -- clocks = <&osc24M>, <&osc32k>, <&iosc>, -- <&ccu 11>; -+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, -+ <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ codec_analog: codec-analog@1f015c0 { -+ compatible = "allwinner,sun50i-a64-codec-analog"; -+ reg = <0x01f015c0 0x4>; -+ status = "disabled"; -+ }; -+ - r_i2c: i2c@1f02400 { - compatible = "allwinner,sun50i-a64-i2c", - "allwinner,sun6i-a31-i2c"; -@@ -915,6 +1232,19 @@ - #size-cells = <0>; - }; - -+ r_ir: ir@1f02000 { -+ compatible = "allwinner,sun50i-a64-ir", -+ "allwinner,sun6i-a31-ir"; -+ reg = <0x01f02000 0x400>; -+ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_APB0_IR>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_ir_rx_pin>; -+ status = "disabled"; -+ }; -+ - r_pwm: pwm@1f03800 { - compatible = "allwinner,sun50i-a64-pwm", - "allwinner,sun5i-a13-pwm"; -@@ -942,12 +1272,17 @@ - function = "s_i2c"; - }; - -- r_pwm_pin: pwm { -+ r_ir_rx_pin: r-ir-rx-pin { -+ pins = "PL11"; -+ function = "s_cir_rx"; -+ }; -+ -+ r_pwm_pin: r-pwm-pin { - pins = "PL10"; - function = "s_pwm"; - }; - -- r_rsb_pins: rsb { -+ r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; - }; -@@ -972,6 +1307,7 @@ - "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = ; -+ clocks = <&osc24M>; - }; - }; - }; --- -2.26.2 diff --git a/rpi-Add-identifier-for-the-new-RPi400.patch b/Raspberry-Pi-400-Compute-Module-4-support.patch similarity index 52% rename from rpi-Add-identifier-for-the-new-RPi400.patch rename to Raspberry-Pi-400-Compute-Module-4-support.patch index eb8ec31..6d0a27c 100644 --- a/rpi-Add-identifier-for-the-new-RPi400.patch +++ b/Raspberry-Pi-400-Compute-Module-4-support.patch @@ -1,64 +1,62 @@ -From patchwork Thu Nov 19 17:48:15 2020 +From patchwork Tue Dec 15 17:23:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403195 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRyK4z4fz9sTR - for ; Fri, 20 Nov 2020 04:49:25 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ8l3Yy3z9sPB + for ; Wed, 16 Dec 2020 04:23:41 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 350D882578; - Thu, 19 Nov 2020 18:49:06 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 9EE4A829F3; + Tue, 15 Dec 2020 18:23:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 0C6CC8258E; Thu, 19 Nov 2020 18:49:05 +0100 (CET) + id 9EDCF829F5; Tue, 15 Dec 2020 18:23:30 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id F2DC482384 - for ; Thu, 19 Nov 2020 18:49:01 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 1E15E829EE + for ; Tue, 15 Dec 2020 18:23:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 80AEDACC6; - Thu, 19 Nov 2020 17:49:01 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id D500BACC6; + Tue, 15 Dec 2020 17:23:27 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 1/8] rpi: Add identifier for the new RPi400 -Date: Thu, 19 Nov 2020 18:48:15 +0100 -Message-Id: <20201119174820.7820-2-nsaenzjulienne@suse.de> +Subject: [PATCH v3 01/12] rpi: Add identifier for the new RPi400 +Date: Tue, 15 Dec 2020 18:23:12 +0100 +Message-Id: <20201215172323.13309-2-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -80,17 +78,18 @@ The Raspberry Pi Foundation released the new RPi400 which we want to detect, so we can enable Ethernet on it and know the correct device tree file name. -So far the Raspberry Pi foundation is using the RPi4b device-tree file -to boot RPi400. I see no reason not to do the same as they are -completely compatible. - Signed-off-by: Nicolas Saenz Julienne --- + +Changes since v1: + - The RPi Foundation introduced a RPi400 specific device tree, so use + that file name instead of the fallback (RPi4b). + board/raspberrypi/rpi/rpi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6b1fa5fc14..ce60a24352 100644 +index 6b1fa5fc14..b66698e4a9 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -157,6 +157,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { @@ -99,20 +98,19 @@ index 6b1fa5fc14..ce60a24352 100644 }, + [0x13] = { + "400", -+ DTB_DIR "bcm2711-rpi-4-b.dtb", ++ DTB_DIR "bcm2711-rpi-400.dtb", + true, + }, }; static const struct rpi_model rpi_models_old_scheme[] = { -From patchwork Thu Nov 19 17:48:16 2020 +From patchwork Tue Dec 15 17:23:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403200 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -127,45 +125,46 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRzB2rFTz9s1l - for ; Fri, 20 Nov 2020 04:50:14 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ8w3WB6z9sS8 + for ; Wed, 16 Dec 2020 04:24:00 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 647BF825AA; - Thu, 19 Nov 2020 18:49:19 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id DD01382A02; + Tue, 15 Dec 2020 18:23:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 8A3B282571; Thu, 19 Nov 2020 18:49:09 +0100 (CET) + id 9BF99829FB; Tue, 15 Dec 2020 18:23:33 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 3FBD7823E1 - for ; Thu, 19 Nov 2020 18:49:02 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id A9EDA829EF + for ; Tue, 15 Dec 2020 18:23:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 0360EACEB; - Thu, 19 Nov 2020 17:49:02 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 6F5BBAF1A; + Tue, 15 Dec 2020 17:23:28 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 2/8] rpi: Add identifier for the new CM4 -Date: Thu, 19 Nov 2020 18:48:16 +0100 -Message-Id: <20201119174820.7820-3-nsaenzjulienne@suse.de> +Subject: [PATCH v3 02/12] rpi: Add identifier for the new CM4 +Date: Tue, 15 Dec 2020 18:23:13 +0100 +Message-Id: <20201215172323.13309-3-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -183,7 +182,7 @@ Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean -The Raspberry Pi Foundation released the new Compute Module 4which we +The Raspberry Pi Foundation released the new Compute Module 4 which we want to detect, so we can enable Ethernet on it and know the correct device tree file name. @@ -192,21 +191,20 @@ IO board has an Ethernet port. But that might not be the case when using custom ones. Signed-off-by: Nicolas Saenz Julienne ---- --- board/raspberrypi/rpi/rpi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index ce60a24352..4ffd23c6ac 100644 +index b66698e4a9..abcf41a5a8 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -162,6 +162,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2711-rpi-4-b.dtb", + DTB_DIR "bcm2711-rpi-400.dtb", true, }, + [0x14] = { -+ "Compute Modue 4", ++ "Compute Module 4", + DTB_DIR "bcm2711-rpi-cm4.dtb", + true, + }, @@ -214,13 +212,12 @@ index ce60a24352..4ffd23c6ac 100644 static const struct rpi_model rpi_models_old_scheme[] = { -From patchwork Thu Nov 19 17:48:17 2020 +From patchwork Tue Dec 15 17:23:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403196 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416601 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -232,48 +229,48 @@ Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRyb0r6Jz9s1l - for ; Fri, 20 Nov 2020 04:49:43 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ9K2mz5z9sPB + for ; Wed, 16 Dec 2020 04:24:21 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id CC8548258E; - Thu, 19 Nov 2020 18:49:11 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id D4983829F1; + Tue, 15 Dec 2020 18:23:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id D7281825A1; Thu, 19 Nov 2020 18:49:07 +0100 (CET) + id DF1AE829FB; Tue, 15 Dec 2020 18:23:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id B218F8254E - for ; Thu, 19 Nov 2020 18:49:02 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 3D7D2829F0 + for ; Tue, 15 Dec 2020 18:23:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 7CC19ACF1; - Thu, 19 Nov 2020 17:49:02 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 07A04AF22; + Tue, 15 Dec 2020 17:23:29 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 3/8] pci: pcie-brcmstb: Fix inbound window configurations -Date: Thu, 19 Nov 2020 18:48:17 +0100 -Message-Id: <20201119174820.7820-4-nsaenzjulienne@suse.de> +Subject: [PATCH v3 03/12] pci: pcie-brcmstb: Fix inbound window configurations +Date: Tue, 15 Dec 2020 18:23:14 +0100 +Message-Id: <20201215172323.13309-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -299,9 +296,9 @@ now cover the whole address space, whereas before we where limited to the lower 3GB. This information is passed to us through DT's 'dma-ranges' property and -it's specially important for us to honor it them since some interactions -with the board's co-processor assume we're doing so (specifically the -XHCI firmware load operation, which is handled by the co-processor after +it's specially important for us to honor it since some interactions with +the board's co-processor assume we're doing so (specifically the XHCI +firmware load operation, which is handled by the co-processor after u-boot has correctly configured the PCIe controller). Signed-off-by: Nicolas Saenz Julienne @@ -340,13 +337,12 @@ index dade79e9c8..f6e8ad0d0a 100644 tmp = lower_32_bits(rc_bar2_offset); u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), -From patchwork Thu Nov 19 17:48:18 2020 +From patchwork Tue Dec 15 17:23:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403201 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416603 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -361,45 +357,46 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRzP329Pz9s1l - for ; Fri, 20 Nov 2020 04:50:25 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ9n295dz9sPB + for ; Wed, 16 Dec 2020 04:24:45 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 4AFAA825C6; - Thu, 19 Nov 2020 18:49:21 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 67F0A82A0D; + Tue, 15 Dec 2020 18:23:49 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id EFDD38258E; Thu, 19 Nov 2020 18:49:09 +0100 (CET) + id 01A3B829EF; Tue, 15 Dec 2020 18:23:37 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 3C8D282552 - for ; Thu, 19 Nov 2020 18:49:03 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id CF965829F1 + for ; Tue, 15 Dec 2020 18:23:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 01C33ACF5; - Thu, 19 Nov 2020 17:49:03 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 933CFAF8D; + Tue, 15 Dec 2020 17:23:29 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 4/8] dm: Introduce xxx_get_dma_range() -Date: Thu, 19 Nov 2020 18:48:18 +0100 -Message-Id: <20201119174820.7820-5-nsaenzjulienne@suse.de> +Subject: [PATCH v3 04/12] dm: Introduce xxx_get_dma_range() +Date: Tue, 15 Dec 2020 18:23:15 +0100 +Message-Id: <20201215172323.13309-5-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -417,7 +414,7 @@ Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean -Add the follwing functions to get a specific device's DMA ranges: +Add the following functions to get a specific device's DMA ranges: - dev_get_dma_range() - ofnode_get_dma_range() - of_get_dma_range() @@ -428,21 +425,31 @@ spaces. Signed-off-by: Nicolas Saenz Julienne --- - common/fdt_support.c | 72 ++++++++++++++++++++++++++++++++++++++++++ - drivers/core/of_addr.c | 68 +++++++++++++++++++++++++++++++++++++++ - drivers/core/ofnode.c | 9 ++++++ - drivers/core/read.c | 5 +++ - include/dm/of_addr.h | 17 ++++++++++ - include/dm/ofnode.h | 16 ++++++++++ - include/dm/read.h | 6 ++++ +Changes since v2: + - Return ENOENT instead of ENODEV + - Refcount OF nodes + +Changes since v1: + - Fix wrong arguments in of_get_dma_range()'s call to of_translate_dma_address() + - Fix build in SPL/TPL and no LIBFDT supprt + - Add missing declaration in 'core/read.c' + - Address Matthias' comments + + common/fdt_support.c | 73 +++++++++++++++++++++++++++++++++++++++ + drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++++++++++++++ + drivers/core/ofnode.c | 9 +++++ + drivers/core/read.c | 6 ++++ + include/dm/of_addr.h | 17 +++++++++ + include/dm/ofnode.h | 16 +++++++++ + include/dm/read.h | 21 ++++++++++++ include/fdt_support.h | 14 ++++++++ - 8 files changed, 207 insertions(+) + 8 files changed, 234 insertions(+) diff --git a/common/fdt_support.c b/common/fdt_support.c -index 5ae75df3c6..78dc7906bd 100644 +index 5ae75df3c6..bf855d26c8 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c -@@ -1342,6 +1342,78 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, +@@ -1342,6 +1342,79 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, return __of_translate_address(blob, node_offset, in_addr, "dma-ranges"); } @@ -450,10 +457,10 @@ index 5ae75df3c6..78dc7906bd 100644 + dma_addr_t *bus, u64 *size) +{ + bool found_dma_ranges = false; ++ struct of_bus *bus_node; + const fdt32_t *ranges; + int na, ns, pna, pns; + int parent = node; -+ u64 cpu_addr; + int ret = 0; + int len; + @@ -467,7 +474,7 @@ index 5ae75df3c6..78dc7906bd 100644 + + /* Once we find 'dma-ranges', then a missing one is an error */ + if (found_dma_ranges && !ranges) { -+ ret = -ENODEV; ++ ret = -EINVAL; + goto out; + } + @@ -480,7 +487,7 @@ index 5ae75df3c6..78dc7906bd 100644 + if (!ranges || parent < 0) { + debug("no dma-ranges found for node %s\n", + fdt_get_name(blob, node, NULL)); -+ ret = -ENODEV; ++ ret = -ENOENT; + goto out; + } + @@ -494,7 +501,8 @@ index 5ae75df3c6..78dc7906bd 100644 + } + + /* Get the address sizes both for the bus and its parent */ -+ of_match_bus(blob, node)->count_cells(blob, node, &na, &ns); ++ bus_node = of_match_bus(blob, node); ++ bus_node->count_cells(blob, node, &na, &ns); + if (!OF_CHECK_COUNTS(na, ns)) { + printf("%s: Bad cell count for %s\n", __FUNCTION__, + fdt_get_name(blob, node, NULL)); @@ -502,7 +510,8 @@ index 5ae75df3c6..78dc7906bd 100644 + goto out; + } + -+ of_match_bus(blob, parent)->count_cells(blob, parent, &pna, &pns); ++ bus_node = of_match_bus(blob, parent); ++ bus_node->count_cells(blob, parent, &pna, &pns); + if (!OF_CHECK_COUNTS(pna, pns)) { + printf("%s: Bad cell count for %s\n", __FUNCTION__, + fdt_get_name(blob, parent, NULL)); @@ -511,8 +520,7 @@ index 5ae75df3c6..78dc7906bd 100644 + } + + *bus = fdt_read_number(ranges, na); -+ cpu_addr = fdt_read_number(ranges + na, pna); -+ *cpu = fdt_translate_dma_address(blob, node, (const fdt32_t*)&cpu_addr); ++ *cpu = fdt_translate_dma_address(blob, node, ranges + na); + *size = fdt_read_number(ranges + na + pna, ns); +out: + return ret; @@ -522,10 +530,10 @@ index 5ae75df3c6..78dc7906bd 100644 * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and * who's reg property matches a physical cpu address diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c -index ca34d84922..8457e04a25 100644 +index ca34d84922..703bc3e3f5 100644 --- a/drivers/core/of_addr.c +++ b/drivers/core/of_addr.c -@@ -325,6 +325,74 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add +@@ -325,6 +325,84 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add return __of_translate_address(dev, in_addr, "dma-ranges"); } @@ -533,13 +541,15 @@ index ca34d84922..8457e04a25 100644 + dma_addr_t *bus, u64 *size) +{ + bool found_dma_ranges = false; -+ struct device_node parent; ++ struct device_node *parent; ++ struct of_bus *bus_node; + int na, ns, pna, pns; + const __be32 *ranges; + int ret = 0; + int len; + + /* Find the closest dma-ranges property */ ++ dev = of_node_get(dev); + while (dev) { + ranges = of_get_property(dev, "dma-ranges", &len); + @@ -549,20 +559,22 @@ index ca34d84922..8457e04a25 100644 + + /* Once we find 'dma-ranges', then a missing one is an error */ + if (found_dma_ranges && !ranges) { -+ ret = -ENODEV; ++ ret = -EINVAL; + goto out; + } + + if (ranges) + found_dma_ranges = true; + -+ dev = of_get_parent(dev); ++ parent = of_get_parent(dev); ++ of_node_put(dev); ++ dev = parent; + } + + if (!dev || !ranges) { + debug("no dma-ranges found for node %s\n", + of_node_full_name(dev)); -+ ret = -ENODEV ++ ret = -ENOENT; + goto out; + } + @@ -575,24 +587,30 @@ index ca34d84922..8457e04a25 100644 + } + + /* Get the address sizes both for the bus and its parent */ -+ of_match_bus(dev)->count_cells(dev, &na, &ns); ++ bus_node = of_match_bus((struct device_node*)dev); ++ bus_node->count_cells(dev, &na, &ns); + if (!OF_CHECK_COUNTS(na, ns)) { + printf("Bad cell count for %s\n", of_node_full_name(dev)); + return -EINVAL; -+ goto out; ++ goto out_parent; + } + -+ of_match_bus(parent)->count_cells(parent, &pna, &pns); ++ bus_node = of_match_bus(parent); ++ bus_node->count_cells(parent, &pna, &pns); + if (!OF_CHECK_COUNTS(pna, pns)) { + printf("Bad cell count for %s\n", of_node_full_name(parent)); + return -EINVAL; -+ goto out; ++ goto out_parent; + } + + *bus = of_read_number(ranges, na); -+ *cpu = of_translate_dma_address(dev, of_read_number(ranges + na, pna)); ++ *cpu = of_translate_dma_address(dev, ranges + na); + *size = of_read_number(ranges + na + pna, ns); ++ ++out_parent: ++ of_node_put(parent); +out: ++ of_node_put(dev); + return ret; +} + @@ -621,16 +639,17 @@ index a68076bf35..15470d4875 100644 { if (ofnode_is_np(node)) diff --git a/drivers/core/read.c b/drivers/core/read.c -index 076125824c..b835e82be9 100644 +index 076125824c..0994fbd979 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c -@@ -338,6 +338,11 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) +@@ -338,6 +338,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); } -+u64 dev_translate_cpu_address(const struct udevice *dev, const fdt32_t *in_addr) ++int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size) +{ -+ return ofnode_translate_cpu_address(dev_ofnode(dev), in_addr); ++ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); +} + int dev_read_alias_highest_id(const char *stem) @@ -692,14 +711,36 @@ index ced7f6ffb2..dc3dd84d9f 100644 * ofnode_device_is_compatible() - check if the node is compatible with compat * diff --git a/include/dm/read.h b/include/dm/read.h -index 0585eb1228..9e1f3f5f12 100644 +index 0585eb1228..46e902c57d 100644 --- a/include/dm/read.h +++ b/include/dm/read.h -@@ -1004,6 +1004,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, +@@ -664,6 +664,21 @@ u64 dev_translate_address(const struct udevice *dev, const fdt32_t *in_addr); + u64 dev_translate_dma_address(const struct udevice *dev, + const fdt32_t *in_addr); + ++/** ++ * dev_get_dma_range() - Get a device's DMA constraints ++ * ++ * Provide the address bases and size of the linear mapping between the CPU and ++ * a device's BUS address space. ++ * ++ * @dev: device giving the context in which to translate the DMA address ++ * @cpu: base address for CPU's view of memory ++ * @bus: base address for BUS's view of memory ++ * @size: size of the address space ++ * @return 0 if ok, negative on error ++ */ ++int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + /** + * dev_read_alias_highest_id - Get highest alias id for the given stem + * @stem: Alias stem to be examined +@@ -1004,6 +1019,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); } -+static inline u64 dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++static inline int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, + dma_addr_t *bus, u64 *size) +{ + return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); @@ -734,13 +775,12 @@ index dbbac0fb6a..46eb1dbbb2 100644 phys_addr_t compat_off); int fdt_alloc_phandle(void *blob); -From patchwork Thu Nov 19 17:48:19 2020 +From patchwork Tue Dec 15 17:23:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403197 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -755,45 +795,230 @@ Received: from phobos.denx.de (phobos.denx.de (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRyk3Wgvz9s1l - for ; Fri, 20 Nov 2020 04:49:50 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ965n7dz9sPB + for ; Wed, 16 Dec 2020 04:24:10 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 7EFFE825A3; - Thu, 19 Nov 2020 18:49:13 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id 3E93F82A06; + Tue, 15 Dec 2020 18:23:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 31A79825A4; Thu, 19 Nov 2020 18:49:08 +0100 (CET) + id C092C829FB; Tue, 15 Dec 2020 18:23:34 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, - RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id B2CC482563 - for ; Thu, 19 Nov 2020 18:49:03 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 78A6C829F4 + for ; Tue, 15 Dec 2020 18:23:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 7CCA0AD09; - Thu, 19 Nov 2020 17:49:03 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 299DBB27A; + Tue, 15 Dec 2020 17:23:30 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 5/8] dm: Introduce DMA constraints into the core device model -Date: Thu, 19 Nov 2020 18:48:19 +0100 -Message-Id: <20201119174820.7820-6-nsaenzjulienne@suse.de> +Subject: [PATCH v3 05/12] dm: test: Add test case for dev_get_dma_ranges() +Date: Tue, 15 Dec 2020 18:23:16 +0100 +Message-Id: <20201215172323.13309-6-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Introduce some new nodes in sandbox's test device-tree and dm tests in +order to validate dev_get_dma_range(). + +Signed-off-by: Nicolas Saenz Julienne +--- + arch/sandbox/dts/test.dts | 17 ++++++++++++++ + test/dm/Makefile | 1 + + test/dm/read.c | 49 +++++++++++++++++++++++++++++++++++++++ + 3 files changed, 67 insertions(+) + create mode 100644 test/dm/read.c + +diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts +index f3b766271d..3a3b51f83b 100644 +--- a/arch/sandbox/dts/test.dts ++++ b/arch/sandbox/dts/test.dts +@@ -292,6 +292,23 @@ + test5-gpios = <&gpio_a 19>; + }; + ++ mmio-bus@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "denx,u-boot-test-bus"; ++ dma-ranges = <0x10000000 0x00000000 0x00040000>; ++ ++ subnode@0 { ++ compatible = "denx,u-boot-fdt-test"; ++ }; ++ }; ++ ++ mmio-bus@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "denx,u-boot-test-bus"; ++ }; ++ + acpi_test1: acpi-test { + compatible = "denx,u-boot-acpi-test"; + acpi-ssdt-test-data = "ab"; +diff --git a/test/dm/Makefile b/test/dm/Makefile +index 46e076ed09..5c52d8b6ea 100644 +--- a/test/dm/Makefile ++++ b/test/dm/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_UT_DM) += test-fdt.o + obj-$(CONFIG_UT_DM) += test-uclass.o + + obj-$(CONFIG_UT_DM) += core.o ++obj-$(CONFIG_UT_DM) += read.o + ifneq ($(CONFIG_SANDBOX),) + obj-$(CONFIG_ACPIGEN) += acpi.o + obj-$(CONFIG_ACPIGEN) += acpigen.o +diff --git a/test/dm/read.c b/test/dm/read.c +new file mode 100644 +index 0000000000..090eee0544 +--- /dev/null ++++ b/test/dm/read.c +@@ -0,0 +1,49 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int dm_test_dma_ranges(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ phys_addr_t cpu; ++ dma_addr_t bus; ++ ofnode node; ++ u64 size; ++ ++ /* dma-ranges are on the device's node */ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assert(!dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_asserteq_64(0x40000, size); ++ ut_asserteq_64(0x0, cpu); ++ ut_asserteq_64(0x10000000, bus); ++ ++ /* dma-ranges are on the bus' node */ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_assert(!dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_asserteq_64(0x40000, size); ++ ut_asserteq_64(0x0, cpu); ++ ut_asserteq_64(0x10000000, bus); ++ ++ /* No dma-ranges available */ ++ node = ofnode_path("/mmio-bus@1"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ++ return 0; ++} ++DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +From patchwork Tue Dec 15 17:23:17 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1416602 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CwQ9Y1YbZz9sPB + for ; Wed, 16 Dec 2020 04:24:33 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 5A5D482A08; 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+ Tue, 15 Dec 2020 17:23:30 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, + Nicolas Saenz Julienne +Subject: [PATCH v3 06/12] dm: Introduce DMA constraints into the core device + model +Date: Tue, 15 Dec 2020 18:23:17 +0100 +Message-Id: <20201215172323.13309-7-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -813,78 +1038,123 @@ X-Virus-Status: Clean Calculating the DMA offset between a bus address space and CPU's every time we call phys_to_bus() and bus_to_phys() isn't ideal performance -wise. This information is static and available before initializing the -devices so parse it before the probe call an provide the DMA offset it -in 'struct udevice' for the DMA code to use it. +wise, as it implies traversing the device tree from the device's node up +to the root. Since this information is static and available before the +device's initialization, parse it before the probe call an provide the +DMA offset in 'struct udevice' for the address translation code to use +it. Signed-off-by: Nicolas Saenz Julienne --- - drivers/core/device.c | 24 ++++++++++++++++++++++++ - include/dm/device.h | 1 + - 2 files changed, 25 insertions(+) +Changes since v2: + - Return/Fail on error + - Add config option + - use ulong instead for u64 for dev->dma_offset +Changes since v1: + - Update commit message so as to explain better the reasoning behind + this + + drivers/core/Kconfig | 10 ++++++++++ + drivers/core/device.c | 35 +++++++++++++++++++++++++++++++++++ + include/dm/device.h | 3 +++ + 3 files changed, 48 insertions(+) + +diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig +index ffae6f9795..153be25351 100644 +--- a/drivers/core/Kconfig ++++ b/drivers/core/Kconfig +@@ -113,6 +113,16 @@ config SPL_DM_SEQ_ALIAS + numbered devices (e.g. serial0 = &serial0). This feature can be + disabled if it is not required, to save code space in SPL. + ++config DM_DMA ++ bool "Support per device DMA constraints" ++ depends on DM ++ default n ++ help ++ Enable this to extract per-device DMA constraints, only supported on ++ device-tree systems for now. This is needed in order translate ++ addresses on systems where different buses have different views of ++ the physical address space. ++ + config REGMAP + bool "Support register maps" + depends on DM diff --git a/drivers/core/device.c b/drivers/core/device.c -index 4b3dcb3b37..4255bea24d 100644 +index 4b3dcb3b37..21285432d8 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c -@@ -421,6 +421,28 @@ fail: +@@ -421,6 +421,37 @@ fail: return ret; } -+void device_get_dma_constraints(struct udevice *dev) ++#if CONFIG_IS_ENABLED(DM_DMA) ++static int device_get_dma_constraints(struct udevice *dev) +{ -+ phys_addr_t cpu; -+ dma_addr_t bus; -+ u64 size; ++ struct udevice *parent = dev->parent; ++ phys_addr_t cpu = 0; ++ dma_addr_t bus = 0; ++ u64 size = 0; + int ret; + -+ if (!dev_of_valid(dev)) -+ return; ++ if (!parent || !dev_of_valid(parent)) ++ return 0; + -+ ret = dev_get_dma_range(dev, &cpu, &bus, &size); -+ if (ret) { -+ /* Don't complain if no 'dma-ranges' were found */ -+ if (ret != -ENODEV) -+ dm_warn("%s: failed to get DMA range, %d\n", -+ dev->name, ret); -+ return; ++ /* ++ * We start parsing for dma-ranges from the device's bus node. This is ++ * specially important on nested buses. ++ */ ++ ret = dev_get_dma_range(parent, &cpu, &bus, &size); ++ /* Don't return an error if no 'dma-ranges' were found */ ++ if (ret && ret != -ENOENT) { ++ dm_warn("%s: failed to get DMA range, %d\n", dev->name, ret); ++ return ret; + } + + dev->dma_offset = cpu - bus; ++ ++ return 0; +} ++#else ++static int device_get_dma_constraints(struct udevice *dev) { return 0; } ++#endif + int device_probe(struct udevice *dev) { const struct driver *drv; -@@ -482,6 +504,8 @@ int device_probe(struct udevice *dev) +@@ -482,6 +513,10 @@ int device_probe(struct udevice *dev) goto fail; } -+ device_get_dma_constraints(dev); ++ ret = device_get_dma_constraints(dev); ++ if (ret) ++ goto fail; + ret = uclass_pre_probe_device(dev); if (ret) goto fail; diff --git a/include/dm/device.h b/include/dm/device.h -index 5bef484247..59f711e3dd 100644 +index 5bef484247..9126dc00fe 100644 --- a/include/dm/device.h +++ b/include/dm/device.h -@@ -161,6 +161,7 @@ struct udevice { +@@ -161,6 +161,9 @@ struct udevice { #ifdef CONFIG_DEVRES struct list_head devres_head; #endif -+ u64 dma_offset; ++#ifdef CONFIG_DM_DMA ++ ulong dma_offset; ++#endif }; /* Maximum sequence number supported */ -From patchwork Thu Nov 19 17:48:20 2020 +From patchwork Tue Dec 15 17:23:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403199 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416604 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -898,45 +1168,237 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRyy5XbHz9sVd - for ; Fri, 20 Nov 2020 04:50:02 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQB14gCvz9sPB + for ; Wed, 16 Dec 2020 04:24:57 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 32DE7825B9; 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Thu, 19 Nov 2020 18:49:04 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 65B40829ED + for ; Tue, 15 Dec 2020 18:23:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 0202DAD0B; - Thu, 19 Nov 2020 17:49:04 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 54CF4B1C2; + Tue, 15 Dec 2020 17:23:31 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 6/8] dm: Introduce dev_phys_to_bus()/dev_bus_to_phys() -Date: Thu, 19 Nov 2020 18:48:20 +0100 -Message-Id: <20201119174820.7820-7-nsaenzjulienne@suse.de> +Subject: [PATCH v3 07/12] dm: test: Add test case for dev->dma_offset +Date: Tue, 15 Dec 2020 18:23:18 +0100 +Message-Id: <20201215172323.13309-8-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +Add test to validate dev->dma_offset is properly set on devices. + +Signed-off-by: Nicolas Saenz Julienne +--- + arch/sandbox/dts/test.dts | 4 ++++ + configs/sandbox64_defconfig | 1 + + configs/sandbox_defconfig | 1 + + configs/sandbox_flattree_defconfig | 1 + + configs/sandbox_spl_defconfig | 1 + + test/dm/core.c | 30 ++++++++++++++++++++++++++++++ + 6 files changed, 38 insertions(+) + +diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts +index 3a3b51f83b..78f0100282 100644 +--- a/arch/sandbox/dts/test.dts ++++ b/arch/sandbox/dts/test.dts +@@ -307,6 +307,10 @@ + #address-cells = <1>; + #size-cells = <1>; + compatible = "denx,u-boot-test-bus"; ++ ++ subnode@0 { ++ compatible = "denx,u-boot-fdt-test"; ++ }; + }; + + acpi_test1: acpi-test { +diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig +index 5fbbfd7236..2c189a8a00 100644 +--- a/configs/sandbox64_defconfig ++++ b/configs/sandbox64_defconfig +@@ -94,6 +94,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index f1ec701a9f..ac97c16cef 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -108,6 +108,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig +index edca7f1808..f5923bf713 100644 +--- a/configs/sandbox_flattree_defconfig ++++ b/configs/sandbox_flattree_defconfig +@@ -75,6 +75,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig +index 479f0226e3..0a4815770c 100644 +--- a/configs/sandbox_spl_defconfig ++++ b/configs/sandbox_spl_defconfig +@@ -94,6 +94,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y + CONFIG_SPL_DM=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SPL_REGMAP=y + CONFIG_SYSCON=y +diff --git a/test/dm/core.c b/test/dm/core.c +index 6f380a574c..998874ffee 100644 +--- a/test/dm/core.c ++++ b/test/dm/core.c +@@ -1066,3 +1066,33 @@ static int dm_test_inactive_child(struct unit_test_state *uts) + return 0; + } + DM_TEST(dm_test_inactive_child, UT_TESTF_SCAN_PDATA); ++ ++static int dm_test_dma_offset(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ ofnode node; ++ ++ /* Make sure the bus's dma-ranges aren't taken into account here */ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_asserteq_64(0, dev->dma_offset); ++ ++ /* Device behind a bus with dma-ranges */ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_64(-0x10000000ULL, dev->dma_offset); ++ ++ /* This one has no dma-ranges */ ++ node = ofnode_path("/mmio-bus@1"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ node = ofnode_path("/mmio-bus@1/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_64(0, dev->dma_offset); ++ ++ return 0; ++} ++DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +From patchwork Tue Dec 15 17:23:19 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1416605 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CwQBD2DRkz9sRK + for ; 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+ dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id DC8BFB71A; + Tue, 15 Dec 2020 17:23:31 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, + Nicolas Saenz Julienne +Subject: [PATCH v3 08/12] dm: Introduce dev_phys_to_bus()/dev_bus_to_phys() +Date: Tue, 15 Dec 2020 18:23:19 +0100 +Message-Id: <20201215172323.13309-9-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -958,20 +1420,28 @@ These functions, instead of relying on hard-coded platform-specific address translations, make use of the DMA constraints provided by the DM core. This allows for per-device translations. +We can't yet get rid of the legacy phys_to_bus()/bus_to_phys() +implementations as some of its users are not integrated into the +device model. + Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- +Changes since v2: + - Use CONFIG_DM_DMA + include/phys2bus.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/phys2bus.h b/include/phys2bus.h -index dc9b8e5a25..a380063af4 100644 +index dc9b8e5a25..516d630aea 100644 --- a/include/phys2bus.h +++ b/include/phys2bus.h @@ -21,4 +21,20 @@ static inline unsigned long bus_to_phys(unsigned long bus) } #endif -+#if CONFIG_IS_ENABLED(DM) ++#if CONFIG_IS_ENABLED(DM_DMA) +#include + +static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, @@ -989,13 +1459,12 @@ index dc9b8e5a25..a380063af4 100644 + #endif -From patchwork Thu Nov 19 17:48:21 2020 +From patchwork Tue Dec 15 17:23:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403203 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416606 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -1009,46 +1478,190 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRzp2ZpRz9sTR - for ; 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Thu, 19 Nov 2020 18:49:04 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTPS id 02380829F8 + for ; Tue, 15 Dec 2020 18:23:33 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 7AA0FAD0F; - Thu, 19 Nov 2020 17:49:04 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 8760FAFD7; + Tue, 15 Dec 2020 17:23:32 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 7/8] xhci: translate virtual addresses into the bus's address - space -Date: Thu, 19 Nov 2020 18:48:21 +0100 -Message-Id: <20201119174820.7820-8-nsaenzjulienne@suse.de> +Subject: [PATCH v3 09/12] dm: test: Add test case for + dev_phys_to_bus()/dev_bus_to_phys() +Date: Tue, 15 Dec 2020 18:23:20 +0100 +Message-Id: <20201215172323.13309-10-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +By reusing DT nodes already available in sandbox's test DT introduce a +test to validate dev_phys_to_bus()/dev_bus_to_phys(). + +Signed-off-by: Nicolas Saenz Julienne +--- + test/dm/Makefile | 1 + + test/dm/phys2bus.c | 36 ++++++++++++++++++++++++++++++++++++ + 2 files changed, 37 insertions(+) + create mode 100644 test/dm/phys2bus.c + +diff --git a/test/dm/Makefile b/test/dm/Makefile +index 5c52d8b6ea..ac86abaa88 100644 +--- a/test/dm/Makefile ++++ b/test/dm/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_UT_DM) += test-uclass.o + + obj-$(CONFIG_UT_DM) += core.o + obj-$(CONFIG_UT_DM) += read.o ++obj-$(CONFIG_UT_DM) += phys2bus.o + ifneq ($(CONFIG_SANDBOX),) + obj-$(CONFIG_ACPIGEN) += acpi.o + obj-$(CONFIG_ACPIGEN) += acpigen.o +diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c +new file mode 100644 +index 0000000000..06a045c168 +--- /dev/null ++++ b/test/dm/phys2bus.c +@@ -0,0 +1,36 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int dm_test_phys_to_bus(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ ofnode node; ++ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ /* In this case it should be transparent, no dma-ranges in parent bus */ ++ ut_asserteq_ptr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_ptr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); ++ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_ptr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_ptr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); ++ ++ return 0; ++} ++DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +From patchwork Tue Dec 15 17:23:21 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1416608 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Tue, 15 Dec 2020 18:23:43 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, + RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 4BFAE829F9 + for ; Tue, 15 Dec 2020 18:23:33 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 0AEEDB1C9; + Tue, 15 Dec 2020 17:23:33 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, + Nicolas Saenz Julienne +Subject: [PATCH v3 10/12] xhci: translate virtual addresses into the bus's + address space +Date: Tue, 15 Dec 2020 18:23:21 +0100 +Message-Id: <20201215172323.13309-11-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -1073,7 +1686,7 @@ Raspberry Pi 4 might introduce an offset to memory accesses incoming from its PCIe port. Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these -limitations and make sure we don't break non DM users. +limitations, and make sure we don't break non DM users. Signed-off-by: Nicolas Saenz Julienne --- @@ -1084,7 +1697,7 @@ Signed-off-by: Nicolas Saenz Julienne 4 files changed, 54 insertions(+), 28 deletions(-) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index b002d6f166..e8d435d644 100644 +index b002d6f166..83147d51b5 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -110,7 +110,7 @@ static void xhci_scratchpad_free(struct xhci_ctrl *ctrl) @@ -1157,7 +1770,7 @@ index b002d6f166..e8d435d644 100644 - cpu_to_le64((uintptr_t)scratchpad->sp_array); + + val_64 = xhci_virt_to_bus(ctrl, scratchpad->sp_array); -+ ctrl->dcbaa->dev_context_ptrs[0] = cpu_to_le64((uintptr_t)val_64); ++ ctrl->dcbaa->dev_context_ptrs[0] = cpu_to_le64(val_64); xhci_flush_cache((uintptr_t)&ctrl->dcbaa->dev_context_ptrs[0], sizeof(ctrl->dcbaa->dev_context_ptrs[0])); @@ -1318,7 +1931,7 @@ index 7080f8fabe..d27ac01c83 100644 virt_dev->eps[ep_index].ring->cycle_state); diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index e1d382369a..57e06087a1 100644 +index e1d382369a..b87210b9ba 100644 --- a/include/usb/xhci.h +++ b/include/usb/xhci.h @@ -16,6 +16,7 @@ @@ -1345,7 +1958,7 @@ index e1d382369a..57e06087a1 100644 +static inline dma_addr_t xhci_virt_to_bus(struct xhci_ctrl *ctrl, void *addr) +{ -+#if CONFIG_IS_ENABLED(DM_USB) ++#if CONFIG_IS_ENABLED(DM_DMA) + return dev_phys_to_bus(ctrl->dev, virt_to_phys(addr)); +#else + return phys_to_bus(virt_to_phys(addr)); @@ -1354,7 +1967,7 @@ index e1d382369a..57e06087a1 100644 + +static inline void *xhci_bus_to_virt(struct xhci_ctrl *ctrl, dma_addr_t addr) +{ -+#if CONFIG_IS_ENABLED(DM_USB) ++#if CONFIG_IS_ENABLED(DM_DMA) + return phys_to_virt(dev_bus_to_phys(ctrl->dev, addr)); +#else + return phys_to_virt(bus_to_phys(addr)); @@ -1363,13 +1976,12 @@ index e1d382369a..57e06087a1 100644 + #endif /* HOST_XHCI_H_ */ -From patchwork Thu Nov 19 17:48:22 2020 +From patchwork Tue Dec 15 17:23:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1403202 -X-Patchwork-Delegate: matthias.bgg@gmail.com +X-Patchwork-Id: 1416607 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -1383,45 +1995,46 @@ Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcRzc5cjwz9s1l - for ; Fri, 20 Nov 2020 04:50:36 +1100 (AEDT) + by ozlabs.org (Postfix) with ESMTPS id 4CwQBb0GLmz9sPB + for ; Wed, 16 Dec 2020 04:25:27 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 4A055825D4; - Thu, 19 Nov 2020 18:49:23 +0100 (CET) + by phobos.denx.de (Postfix) with ESMTP id E7F9482A20; + Tue, 15 Dec 2020 18:23:57 +0100 (CET) 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(CET) + by phobos.denx.de (Postfix) with ESMTPS id CA59E829FA + for ; Tue, 15 Dec 2020 18:23:33 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id F38DCAD11; - Thu, 19 Nov 2020 17:49:04 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 92E15AF1A; + Tue, 15 Dec 2020 17:23:33 +0000 (UTC) From: Nicolas Saenz Julienne -To: u-boot@lists.denx.de, bmeng.cn@gmail.com, sjg@chromium.org, marex@denx.de -Cc: mbrugger@suse.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, - swarren@wwwdotorg.org, peng.fan@nxp.com, +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, Nicolas Saenz Julienne -Subject: [PATCH 8/8] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() -Date: Thu, 19 Nov 2020 18:48:22 +0100 -Message-Id: <20201119174820.7820-9-nsaenzjulienne@suse.de> +Subject: [PATCH v3 11/12] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() +Date: Tue, 15 Dec 2020 18:23:22 +0100 +Message-Id: <20201215172323.13309-12-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201119174820.7820-1-nsaenzjulienne@suse.de> -References: <20201119174820.7820-1-nsaenzjulienne@suse.de> +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 @@ -1481,7 +2094,7 @@ index 0628934312..2086d7cdb1 100644 } } diff --git a/include/mmc.h b/include/mmc.h -index 1d377e0281..805a3b2215 100644 +index 1d377e0281..5fe1ef1dfc 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -15,6 +15,7 @@ @@ -1498,7 +2111,7 @@ index 1d377e0281..805a3b2215 100644 +static inline dma_addr_t mmc_phys_to_bus(struct mmc *mmc, phys_addr_t addr) +{ -+#if CONFIG_IS_ENABLED(DM_MMC) ++#if CONFIG_IS_ENABLED(DM_DMA) + return dev_phys_to_bus(mmc->dev, addr); +#else + return phys_to_bus(addr); @@ -1506,3 +2119,127 @@ index 1d377e0281..805a3b2215 100644 +} + #endif /* _MMC_H_ */ + +From patchwork Tue Dec 15 17:23:23 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1416609 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de 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version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 6979E829FE + for ; Tue, 15 Dec 2020 18:23:34 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.221.27]) + by mx2.suse.de (Postfix) with ESMTP id 2DF96AC7F; + Tue, 15 Dec 2020 17:23:34 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, + sjg@chromium.org, marex@denx.de +Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, + peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, + Nicolas Saenz Julienne +Subject: [PATCH v3 12/12] configs: rpi4: Enable DM_DMA across all RPi4 + configurations +Date: Tue, 15 Dec 2020 18:23:23 +0100 +Message-Id: <20201215172323.13309-13-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> +References: <20201215172323.13309-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +The DM_DMA option is needed in order to translate physical address into +bus addresses on a per-device basis. + +Signed-off-by: Nicolas Saenz Julienne +--- + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + + 3 files changed, 3 insertions(+) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 5ddd838fd5..0a5d3ff8cd 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DFU_MMC=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 2590d0a696..b61cdc05f1 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DFU_MMC=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 2639219a1a..4125a1feba 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -20,6 +20,7 @@ CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y + CONFIG_MMC_SDHCI=y diff --git a/aarch64-boards b/aarch64-boards index d849833..e5d4147 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -43,6 +43,9 @@ orangepi_win orangepi_zero_plus orangepi_zero_plus2 p212 +p2371-2180 +p2771-0000-500 +p3450-0000 pine64-lts pine64_plus pinebook @@ -51,6 +54,7 @@ pinephone pinetab pine_h64 poplar +puma-rk3399 rock64-rk3328 rock960-rk3399 rock-pi-4-rk3399 diff --git a/arm-boards b/arm-boards index f4a04d4..8a7798d 100644 --- a/arm-boards +++ b/arm-boards @@ -56,6 +56,7 @@ inet9f_rev03 inet_q972 Itead_Ibox_A20 jesurun_q5 +jetson-tk1 kc1 Lamobo_R1 libretech_all_h3_cc_h2_plus @@ -63,6 +64,7 @@ Linksprite_pcDuino Linksprite_pcDuino3 Linksprite_pcDuino3_Nano liteboard +marsboard Marsboard_A10 Mele_A1000 Mele_A1000G_quad @@ -99,6 +101,8 @@ orangepi_plus2e orangepi_r1 orangepi_zero origen +paz00 +pinecube polaroid_mid2809pxe04 pov_protab2_ips9 q8_a13_tablet @@ -107,8 +111,10 @@ q8_a33_tablet_1024x600 q8_a33_tablet_800x480 qemu_arm r7-tv-dongle +riotboard rock rock-pi-n8-rk3288 +rock2 rpi_2 rpi_3_32b rpi_4_32b @@ -121,6 +127,9 @@ sunxi_Gemei_G9 tbs_a711 tinker-rk3288 tinker-s-rk3288 +trimslice +udoo +udoo_neo usbarmory UTOO_P66 vexpress_ca15_tc2 diff --git a/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch b/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch deleted file mode 100644 index 2718f7b..0000000 --- a/rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 71f86c48580642a8d6a7d1049427bb72cb93b480 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 8 Nov 2020 19:57:50 +0000 -Subject: [PATCH] rockchip: Move Bob specific bits to it's specific u-boot.dtsi - -Move the bits that are device specific to the -u-boot.dtsi as the -bits may be different on other devices and hence breaks SPI on -those devices such as the Pinebook Pro. - -Signed-off-by: Peter Robinson -Fixes: c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob") -Cc: Simon Glass ---- - arch/arm/dts/rk3399-gru-u-boot.dtsi | 30 +++++++++++++++++++++++++++++ - arch/arm/dts/rk3399-u-boot.dtsi | 25 ------------------------ - 2 files changed, 30 insertions(+), 25 deletions(-) - -diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi -index 390ac2bb5a..5e95cacfea 100644 ---- a/arch/arm/dts/rk3399-gru-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi -@@ -5,6 +5,36 @@ - - #include "rk3399-u-boot.dtsi" - -+/ { -+ aliases { -+ spi1 = &spi1; -+ }; -+}; -+ -+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE -+&binman { -+ rom { -+ filename = "u-boot.rom"; -+ size = <0x400000>; -+ pad-byte = <0xff>; -+ -+ mkimage { -+ args = "-n rk3399 -T rkspi"; -+ u-boot-spl { -+ }; -+ }; -+ u-boot-img { -+ offset = <0x40000>; -+ }; -+ u-boot { -+ offset = <0x300000>; -+ }; -+ fdtmap { -+ }; -+ }; -+}; -+#endif -+ - &spi_flash { - u-boot,dm-pre-reloc; - }; -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index ecd230c720..26b0a34e64 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -11,7 +11,6 @@ - mmc0 = &sdhci; - mmc1 = &sdmmc; - pci0 = &pcie0; -- spi1 = &spi1; - }; - - cic: syscon@ff620000 { -@@ -60,30 +59,6 @@ - - }; - --#ifdef CONFIG_ROCKCHIP_SPI_IMAGE --&binman { -- rom { -- filename = "u-boot.rom"; -- size = <0x400000>; -- pad-byte = <0xff>; -- -- mkimage { -- args = "-n rk3399 -T rkspi"; -- u-boot-spl { -- }; -- }; -- u-boot-img { -- offset = <0x40000>; -- }; -- u-boot { -- offset = <0x300000>; -- }; -- fdtmap { -- }; -- }; --}; --#endif -- - &cru { - u-boot,dm-pre-reloc; - }; --- -2.28.0 - diff --git a/rockchip-Pinebook-Pro-Fix-USB.patch b/rockchip-Pinebook-Pro-Fix-USB.patch deleted file mode 100644 index 8f81454..0000000 --- a/rockchip-Pinebook-Pro-Fix-USB.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 12bc3e2c7c805f989629d1a546276491a7d28922 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 9 Nov 2020 23:01:19 +0000 -Subject: [PATCH] rockchip: Pinebook Pro: Fix USB - -Improve USB config so keyboard and USB-A ports work. - -Signed-off-by: Peter Robinson ---- - configs/pinebook-pro-rk3399_defconfig | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 1ed54ad0ed..8fbd7280ac 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -55,6 +55,8 @@ CONFIG_SPI_FLASH_WINBOND=y - CONFIG_DM_ETH=y - CONFIG_NVME=y - CONFIG_PCI=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_TYPEC=y - CONFIG_DM_PMIC_FAN53555=y - CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y -@@ -76,8 +78,9 @@ CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC3=y --CONFIG_ROCKCHIP_USB2_PHY=y -+CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_KEYBOARD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_RTL8152=y --- -2.28.0 - diff --git a/sources b/sources index 2551a01..69acae9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01-rc2.tar.bz2) = ac21ed6ce160de377a8ea5750cd617f1c6d6e2b9508c8999fafb641e210e3bd030dcd26cea38259639c45ae0d0b9fda6d1007c547fdee002d8d946d6fb1952bb +SHA512 (u-boot-2021.01-rc3.tar.bz2) = 4c88bbdeb1e39e52bb069c4bf65c9829290a51da9a21de8e60d50b62c74ae98a35d22a235fdc0a86467aedc34f85dff5d63b874af247323d0d5bdcb2e82cd4a3 diff --git a/uboot-tools.spec b/uboot-tools.spec index 31a75ec..98b93ed 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2021.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -23,22 +23,19 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch4: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch5: rpi-Add-identifier-for-the-new-RPi400.patch +Patch5: Raspberry-Pi-400-Compute-Module-4-support.patch # Tegra improvements Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # AllWinner improvements -Patch8: AllWinner-UpstreamSync.patch -Patch9: AllWinner-PinePhone.patch Patch10: AllWinner-PineTab.patch Patch11: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch +Patch12: sunxi-add-PineCube-board.patch # TI fixes -Patch12: 0001-Fix-BeagleAI-detection.patch +Patch13: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch14: rockchip-Move-Bob-specific-bits-to-it-s-specific-u-b.patch +#Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch15: rk3399-Pinebook-pro-EDP-support.patch -Patch16: rockchip-Pinebook-Pro-Fix-USB.patch BuildRequires: bc BuildRequires: dtc @@ -239,6 +236,11 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 15 2020 Peter Robinson - 2021.01-0.3.rc3 +- Update to 2021.01 RC3 +- Latest RPi-400/CM4 support patch +- Re-enable previously disabled device support + * Mon Dec 14 2020 Javier Martinez Canillas - 2021.01-0.2.rc2 - Fix a "scan_dev_for_efi" not defined error From 43dd5ec40fad39915fb6574db4101cc7a849fd87 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Dec 2020 18:31:27 +0000 Subject: [PATCH 120/351] add PineCube patch --- sunxi-add-PineCube-board.patch | 222 +++++++++++++++++++++++++++++++++ 1 file changed, 222 insertions(+) create mode 100644 sunxi-add-PineCube-board.patch diff --git a/sunxi-add-PineCube-board.patch b/sunxi-add-PineCube-board.patch new file mode 100644 index 0000000..dd8ec26 --- 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MIME_GOOD(-0.10)[text/plain]; DMARC_NA(0.00)[aosc.io]; + BROKEN_CONTENT_TYPE(1.50)[]; R_SPF_SOFTFAIL(0.00)[~all]; + RCPT_COUNT_FIVE(0.00)[6]; ML_SERVERS(-3.10)[213.133.102.83]; + DKIM_TRACE(0.00)[aosc.io:+]; MID_CONTAINS_FROM(1.00)[]; + RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + ASN(0.00)[asn:24940, ipnet:213.133.96.0/19, country:DE]; + RCVD_COUNT_TWO(0.00)[2]; + HFILTER_HELO_BAREIP(3.00)[213.133.102.83,1] +X-Rspamd-Server: mail20.mymailcheap.com +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +PineCube is an IP camera development kit released by Pine64. + +It comes with the following compoents: + +- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC, +a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps +Ethernet port and FPC connectors for camera and daughter board. +- An OV5640-based camera module which is connected to the parallel CSI +bus of the mainboard. +- A daughterboard with several buttons, a SD slot, some IR LEDs, a +microphone and a speaker connector. + +As the device tree is synchronized in a previous commit, just add it to +Makefile, create a new MAINTAINER item and provide a defconfig. + +Signed-off-by: Icenowy Zheng +Reviewed-by: Andre Przywara +--- +Changes since v2: +- Add Makefile reference to DT. +Changes since v1: +- Dropped LDO3 quirk. + + arch/arm/dts/Makefile | 1 + + board/sunxi/MAINTAINERS | 5 +++++ + configs/pinecube_defconfig | 15 +++++++++++++++ + 3 files changed, 21 insertions(+) + create mode 100644 configs/pinecube_defconfig + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 7d1a369845..e6993733b0 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -587,6 +587,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \ + sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-v40-bananapi-m2-berry.dtb + dtb-$(CONFIG_MACH_SUN8I_V3S) += \ ++ sun8i-s3-pinecube.dtb \ + sun8i-v3s-licheepi-zero.dtb + dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-bananapi-m2-plus.dtb \ +diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS +index d3755ae41a..735801ae1d 100644 +--- a/board/sunxi/MAINTAINERS ++++ b/board/sunxi/MAINTAINERS +@@ -440,6 +440,11 @@ M: Vasily Khoruzhick + S: Maintained + F: configs/pinebook_defconfig + ++PINECUBE BOARD: ++M: Icenowy Zheng ++S: Maintained ++F: configs/pinecube_defconfig ++ + PINE64 BOARDS + M: Andre Przywara + S: Maintained +diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig +new file mode 100644 +index 0000000000..a8c404f6b1 +--- /dev/null ++++ b/configs/pinecube_defconfig +@@ -0,0 +1,15 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN8I_V3S=y ++CONFIG_SUNXI_DRAM_DDR3_1333=y ++CONFIG_DRAM_CLK=504 ++CONFIG_DRAM_ODT_EN=y ++CONFIG_I2C0_ENABLE=y ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" ++CONFIG_SPL_I2C_SUPPORT=y ++# CONFIG_NETDEVICES is not set ++CONFIG_AXP209_POWER=y ++CONFIG_AXP_DCDC2_VOLT=1250 ++CONFIG_AXP_DCDC3_VOLT=3300 ++CONFIG_CONS_INDEX=3 From 459ca6d6b4053714db0286fd283785d07ffcc266 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 16 Dec 2020 15:57:14 +0000 Subject: [PATCH 121/351] update rk3399 rng patch --- ...nable-rng-on-rock960-and-firefly3399.patch | 188 ++++++++++-------- uboot-tools.spec | 2 +- 2 files changed, 106 insertions(+), 84 deletions(-) diff --git a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch index 89e38f5..3aef1a9 100644 --- a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +++ b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch @@ -1,102 +1,98 @@ -From c206a750c80dc4aaa8e7eade50199b3198a3e288 Mon Sep 17 00:00:00 2001 +From 5cb3ca7ebd46c1983d0929b5ba027a03c1f5e51e Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 19 Aug 2020 15:49:25 +0100 -Subject: [PATCH 1/3] rockchip: RockPro64: enable rng to provide an entropy - source +Date: Wed, 16 Dec 2020 15:22:34 +0000 +Subject: [PATCH 1/2] arm: dts: rockchip: rk3399: enable rng at the SoC level -Enable the rng so UEFI can provide entropy for KASLR +The rng is embedded in the SoC so enable it in the device tree +universally, the use of it can be controlled by enabling/disabling +at the device config level. Signed-off-by: Peter Robinson --- - configs/rockpro64-rk3399_defconfig | 2 ++ - 1 file changed, 2 insertions(+) + arch/arm/dts/rk3399-evb-u-boot.dtsi | 4 ---- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ---- + arch/arm/dts/rk3399-u-boot.dtsi | 2 +- + 4 files changed, 1 insertion(+), 13 deletions(-) -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index a6e2c3d71d..9b1ba04b9e 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -41,6 +41,8 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y --- -2.26.2 - -From 91db3a7baa4cfc8f1f8879b4bdafeb05902f2114 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 19 Aug 2020 15:52:15 +0100 -Subject: [PATCH 2/3] rockchip: Rock960: enable rng to provide an entropy - source - -Enable the rng so UEFI can provide entropy for KASLR - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++ - configs/rock960-rk3399_defconfig | 2 ++ - 2 files changed, 6 insertions(+) - -diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -index c190089e26..08292dbd39 100644 ---- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi -@@ -24,3 +24,7 @@ +diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi +index 8056dc843e..398b205ec2 100644 +--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi +@@ -13,10 +13,6 @@ + }; + }; + +-&rng { +- status = "okay"; +-}; +- + &i2c0 { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index ded7db0aef..c3e866a779 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -28,10 +28,6 @@ + u-boot,dm-pre-reloc; + }; + +-&rng { +- status = "okay"; +-}; +- + &sdhci { + max-frequency = <25000000>; + u-boot,dm-pre-reloc; +diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +index 6317b47e41..37dff04adf 100644 +--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +@@ -15,10 +15,6 @@ + }; + }; + +-&rng { +- status = "okay"; +-}; +- + &spi1 { + spi_flash: flash@0 { + u-boot,dm-pre-reloc; +diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi +index ecd230c720..73922c328a 100644 +--- a/arch/arm/dts/rk3399-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-u-boot.dtsi +@@ -32,7 +32,7 @@ + rng: rng@ff8b8000 { + compatible = "rockchip,cryptov1-rng"; + reg = <0x0 0xff8b8000 0x0 0x1000>; +- status = "disabled"; ++ status = "okay"; }; - }; -+ -+&rng { -+ status = "okay"; -+}; -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 1d997847c2..9c4d8871b7 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -38,6 +38,8 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_NVME=y - CONFIG_PCI=y + dmc: dmc { -- -2.26.2 +2.29.2 -From ac0793c7c4ee032da11bddbd0bdefee2322bb621 Mon Sep 17 00:00:00 2001 +From 62093137fcbe760d009cf2757feda7ccf328fbb7 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 19 Aug 2020 15:53:58 +0100 -Subject: [PATCH 3/3] rockchip: firefly-rk3399: enable rng to provide an - entropy source +Date: Wed, 16 Dec 2020 15:37:21 +0000 +Subject: [PATCH 2/2] configs: rk3399: enable rng on firefly/rock960/rockpro64 -Enable the rng so UEFI can provide entropy for KASLR +Enable the RNG on the Firefly, rock960 and RockPro64 devices +to enable KASLR on devices that support it. Signed-off-by: Peter Robinson --- - arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++ - configs/firefly-rk3399_defconfig | 2 ++ - 2 files changed, 6 insertions(+) + configs/firefly-rk3399_defconfig | 2 ++ + configs/rock960-rk3399_defconfig | 2 ++ + configs/rockpro64-rk3399_defconfig | 2 ++ + 3 files changed, 6 insertions(+) -diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi -index 38e0897db9..a6c7b913da 100644 ---- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi -@@ -11,3 +11,7 @@ - u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; - }; - }; -+ -+&rng { -+ status = "okay"; -+}; diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index ea4a30ebf3..e242ee5009 100644 +index c453b82dc5..cfbaae40aa 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -35,6 +35,8 @@ CONFIG_MMC_DW=y @@ -108,6 +104,32 @@ index ea4a30ebf3..e242ee5009 100644 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 65dce3cd73..aadbc55f57 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -39,6 +39,8 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_NVME=y + CONFIG_PCI=y +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index 575b7a20d5..f78dfcc8f7 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -42,6 +42,8 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_DM_ETH=y -- -2.26.2 +2.29.2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 98b93ed..76a39d2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -34,7 +34,7 @@ Patch12: sunxi-add-PineCube-board.patch # TI fixes Patch13: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -#Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch15: rk3399-Pinebook-pro-EDP-support.patch BuildRequires: bc From 9019d1f21bcedaf2d5db81d8169e01438f6ab069 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 28 Dec 2020 21:48:37 +0000 Subject: [PATCH 122/351] 2021.01 RC4, new rpi-400 patch Signed-off-by: Peter Robinson --- ...erry-Pi-400-Compute-Module-4-support.patch | 1282 ++++------------- ...SET_FDTFILE_FALLBACK-for-tegra186-be.patch | 55 - ...efine-fdtfile-option-for-distro-boot.patch | 113 -- sources | 2 +- uboot-tools.spec | 22 +- 5 files changed, 273 insertions(+), 1201 deletions(-) delete mode 100644 arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch delete mode 100644 arm-tegra-define-fdtfile-option-for-distro-boot.patch diff --git a/Raspberry-Pi-400-Compute-Module-4-support.patch b/Raspberry-Pi-400-Compute-Module-4-support.patch index 6d0a27c..14ffb29 100644 --- a/Raspberry-Pi-400-Compute-Module-4-support.patch +++ b/Raspberry-Pi-400-Compute-Module-4-support.patch @@ -1,90 +1,16 @@ -From patchwork Tue Dec 15 17:23:12 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416597 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQ8l3Yy3z9sPB - for ; Wed, 16 Dec 2020 04:23:41 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 9EE4A829F3; - Tue, 15 Dec 2020 18:23:32 +0100 (CET) -Authentication-Results: phobos.denx.de; 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- Tue, 15 Dec 2020 17:23:27 +0000 (UTC) +From 110229bb9a802385c73d8861de833feb1a7dadb8 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 01/12] rpi: Add identifier for the new RPi400 -Date: Tue, 15 Dec 2020 18:23:12 +0100 -Message-Id: <20201215172323.13309-2-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:27 +0100 +Subject: [PATCH 01/13] rpi: Add identifier for the new RPi400 The Raspberry Pi Foundation released the new RPi400 which we want to detect, so we can enable Ethernet on it and know the correct device tree file name. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson --- - -Changes since v1: - - The RPi Foundation introduced a RPi400 specific device tree, so use - that file name instead of the fallback (RPi4b). - board/raspberrypi/rpi/rpi.c | 5 +++++ 1 file changed, 5 insertions(+) @@ -104,83 +30,13 @@ index 6b1fa5fc14..b66698e4a9 100644 }; static const struct rpi_model rpi_models_old_scheme[] = { +-- +2.29.2 -From patchwork Tue Dec 15 17:23:13 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416599 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; 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Tue, 15 Dec 2020 18:23:28 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 6F5BBAF1A; - Tue, 15 Dec 2020 17:23:28 +0000 (UTC) +From 0b92c14019915aa7d81fa0b6746b800b037c7977 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 02/12] rpi: Add identifier for the new CM4 -Date: Tue, 15 Dec 2020 18:23:13 +0100 -Message-Id: <20201215172323.13309-3-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:28 +0100 +Subject: [PATCH 02/13] rpi: Add identifier for the new CM4 The Raspberry Pi Foundation released the new Compute Module 4 which we want to detect, so we can enable Ethernet on it and know the correct @@ -211,82 +67,13 @@ index b66698e4a9..abcf41a5a8 100644 }; static const struct rpi_model rpi_models_old_scheme[] = { +-- +2.29.2 -From patchwork Tue Dec 15 17:23:14 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416601 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQ9K2mz5z9sPB - for ; Wed, 16 Dec 2020 04:24:21 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id D4983829F1; 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- Tue, 15 Dec 2020 17:23:29 +0000 (UTC) +From 4fa949f51bad277d64a52c99dde0c90d3114d3b4 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 03/12] pci: pcie-brcmstb: Fix inbound window configurations -Date: Tue, 15 Dec 2020 18:23:14 +0100 -Message-Id: <20201215172323.13309-4-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:29 +0100 +Subject: [PATCH 03/13] pci: pcie-brcmstb: Fix inbound window configurations So far we've assumed a fixed configuration for inbound windows as we had a single user for this controller. But the controller's DMA constraints @@ -336,83 +123,13 @@ index dade79e9c8..f6e8ad0d0a 100644 tmp = lower_32_bits(rc_bar2_offset); u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), +-- +2.29.2 -From patchwork Tue Dec 15 17:23:15 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416603 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQ9n295dz9sPB - for ; Wed, 16 Dec 2020 04:24:45 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 67F0A82A0D; - Tue, 15 Dec 2020 18:23:49 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 01A3B829EF; Tue, 15 Dec 2020 18:23:37 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id CF965829F1 - for ; Tue, 15 Dec 2020 18:23:29 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 933CFAF8D; - Tue, 15 Dec 2020 17:23:29 +0000 (UTC) +From 68a67ccb7fc417ad321bd916c81e91ca6b0cc276 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 04/12] dm: Introduce xxx_get_dma_range() -Date: Tue, 15 Dec 2020 18:23:15 +0100 -Message-Id: <20201215172323.13309-5-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:30 +0100 +Subject: [PATCH 04/13] dm: Introduce xxx_get_dma_range() Add the following functions to get a specific device's DMA ranges: - dev_get_dma_range() @@ -424,17 +141,8 @@ space range into a bus's and to convert addresses from and to address spaces. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- -Changes since v2: - - Return ENOENT instead of ENODEV - - Refcount OF nodes - -Changes since v1: - - Fix wrong arguments in of_get_dma_range()'s call to of_translate_dma_address() - - Fix build in SPL/TPL and no LIBFDT supprt - - Add missing declaration in 'core/read.c' - - Address Matthias' comments - common/fdt_support.c | 73 +++++++++++++++++++++++++++++++++++++++ drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++++++++++++++ drivers/core/ofnode.c | 9 +++++ @@ -774,88 +482,19 @@ index dbbac0fb6a..46eb1dbbb2 100644 int fdt_node_offset_by_compat_reg(void *blob, const char *compat, phys_addr_t compat_off); int fdt_alloc_phandle(void *blob); +-- +2.29.2 -From patchwork Tue Dec 15 17:23:16 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416600 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQ965n7dz9sPB - for ; Wed, 16 Dec 2020 04:24:10 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 3E93F82A06; - Tue, 15 Dec 2020 18:23:42 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id C092C829FB; Tue, 15 Dec 2020 18:23:34 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 78A6C829F4 - for ; Tue, 15 Dec 2020 18:23:30 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 299DBB27A; - Tue, 15 Dec 2020 17:23:30 +0000 (UTC) +From ab6897014ee799d5858911aa85d97ded1620f746 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 05/12] dm: test: Add test case for dev_get_dma_ranges() -Date: Tue, 15 Dec 2020 18:23:16 +0100 -Message-Id: <20201215172323.13309-6-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:31 +0100 +Subject: [PATCH 05/13] dm: test: Add test case for dev_get_dma_ranges() Introduce some new nodes in sandbox's test device-tree and dm tests in order to validate dev_get_dma_range(). Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 17 ++++++++++++++ test/dm/Makefile | 1 + @@ -905,7 +544,7 @@ index 46e076ed09..5c52d8b6ea 100644 obj-$(CONFIG_ACPIGEN) += acpigen.o diff --git a/test/dm/read.c b/test/dm/read.c new file mode 100644 -index 0000000000..090eee0544 +index 0000000000..7768aa2968 --- /dev/null +++ b/test/dm/read.c @@ -0,0 +1,49 @@ @@ -934,8 +573,8 @@ index 0000000000..090eee0544 + /* dma-ranges are on the device's node */ + node = ofnode_path("/mmio-bus@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_assert(!dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); + ut_asserteq_64(0x40000, size); + ut_asserteq_64(0x0, cpu); + ut_asserteq_64(0x10000000, bus); @@ -943,8 +582,8 @@ index 0000000000..090eee0544 + /* dma-ranges are on the bus' node */ + node = ofnode_path("/mmio-bus@0/subnode@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_assert(!dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); + ut_asserteq_64(0x40000, size); + ut_asserteq_64(0x0, cpu); + ut_asserteq_64(0x10000000, bus); @@ -952,89 +591,20 @@ index 0000000000..090eee0544 + /* No dma-ranges available */ + node = ofnode_path("/mmio-bus@1"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); + ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); + + return 0; +} +DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +-- +2.29.2 -From patchwork Tue Dec 15 17:23:17 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416602 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQ9Y1YbZz9sPB - for ; Wed, 16 Dec 2020 04:24:33 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 5A5D482A08; - Tue, 15 Dec 2020 18:23:47 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 5D82E829F0; Tue, 15 Dec 2020 18:23:36 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id AF637829EE - for ; Tue, 15 Dec 2020 18:23:31 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id CE05EAFBE; - Tue, 15 Dec 2020 17:23:30 +0000 (UTC) +From 1ec61488a9757fbe6a92af3a7595a3f3b63fa298 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 06/12] dm: Introduce DMA constraints into the core device +Date: Wed, 23 Dec 2020 19:55:32 +0100 +Subject: [PATCH 06/13] dm: Introduce DMA constraints into the core device model -Date: Tue, 15 Dec 2020 18:23:17 +0100 -Message-Id: <20201215172323.13309-7-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean Calculating the DMA offset between a bus address space and CPU's every time we call phys_to_bus() and bus_to_phys() isn't ideal performance @@ -1045,23 +615,15 @@ DMA offset in 'struct udevice' for the address translation code to use it. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- -Changes since v2: - - Return/Fail on error - - Add config option - - use ulong instead for u64 for dev->dma_offset - -Changes since v1: - - Update commit message so as to explain better the reasoning behind - this - drivers/core/Kconfig | 10 ++++++++++ - drivers/core/device.c | 35 +++++++++++++++++++++++++++++++++++ - include/dm/device.h | 3 +++ - 3 files changed, 48 insertions(+) + drivers/core/device.c | 41 +++++++++++++++++++++++++++++++++++++++++ + include/dm/device.h | 13 +++++++++++++ + 3 files changed, 64 insertions(+) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig -index ffae6f9795..153be25351 100644 +index ffae6f9795..295cf2dd00 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -113,6 +113,16 @@ config SPL_DM_SEQ_ALIAS @@ -1069,7 +631,7 @@ index ffae6f9795..153be25351 100644 disabled if it is not required, to save code space in SPL. +config DM_DMA -+ bool "Support per device DMA constraints" ++ bool "Support per-device DMA constraints" + depends on DM + default n + help @@ -1082,14 +644,23 @@ index ffae6f9795..153be25351 100644 bool "Support register maps" depends on DM diff --git a/drivers/core/device.c b/drivers/core/device.c -index 4b3dcb3b37..21285432d8 100644 +index 4b3dcb3b37..047032a1dd 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c -@@ -421,6 +421,37 @@ fail: +@@ -421,6 +421,43 @@ fail: return ret; } -+#if CONFIG_IS_ENABLED(DM_DMA) ++/** ++ * device_get_dma_constraints() - Populate device's DMA constraints ++ * ++ * Gets a device's DMA constraints from firmware. This information is later ++ * used by drivers to translate physcal addresses to the device's bus address ++ * space. For now only device-tree is supported. ++ * ++ * @dev: Pointer to target device ++ * Return: 0 if OK or if no DMA constraints were found, error otherwise ++ */ +static int device_get_dma_constraints(struct udevice *dev) +{ + struct udevice *parent = dev->parent; @@ -1098,7 +669,7 @@ index 4b3dcb3b37..21285432d8 100644 + u64 size = 0; + int ret; + -+ if (!parent || !dev_of_valid(parent)) ++ if (!CONFIG_IS_ENABLED(DM_DMA) || !parent || !dev_of_valid(parent)) + return 0; + + /* @@ -1112,18 +683,15 @@ index 4b3dcb3b37..21285432d8 100644 + return ret; + } + -+ dev->dma_offset = cpu - bus; ++ dev_set_dma_offset(dev, cpu - bus); + + return 0; +} -+#else -+static int device_get_dma_constraints(struct udevice *dev) { return 0; } -+#endif + int device_probe(struct udevice *dev) { const struct driver *drv; -@@ -482,6 +513,10 @@ int device_probe(struct udevice *dev) +@@ -482,6 +519,10 @@ int device_probe(struct udevice *dev) goto fail; } @@ -1135,99 +703,55 @@ index 4b3dcb3b37..21285432d8 100644 if (ret) goto fail; diff --git a/include/dm/device.h b/include/dm/device.h -index 5bef484247..9126dc00fe 100644 +index 5bef484247..b27889af01 100644 --- a/include/dm/device.h +++ b/include/dm/device.h -@@ -161,6 +161,9 @@ struct udevice { +@@ -138,6 +138,8 @@ enum { + * When CONFIG_DEVRES is enabled, devm_kmalloc() and friends will + * add to this list. Memory so-allocated will be freed + * automatically when the device is removed / unbound ++ * @dma_offset: Offset between the physical address space (CPU's) and the ++ * device's bus address space + */ + struct udevice { + const struct driver *driver; +@@ -161,6 +163,9 @@ struct udevice { #ifdef CONFIG_DEVRES struct list_head devres_head; #endif -+#ifdef CONFIG_DM_DMA ++#if CONFIG_IS_ENABLED(DM_DMA) + ulong dma_offset; +#endif }; /* Maximum sequence number supported */ +@@ -172,6 +177,14 @@ struct udevice { + /* Returns non-zero if the device is active (probed and not removed) */ + #define device_active(dev) ((dev)->flags & DM_FLAG_ACTIVATED) + ++#if CONFIG_IS_ENABLED(DM_DMA) ++#define dev_set_dma_offset(_dev, _offset) _dev->dma_offset = _offset ++#define dev_get_dma_offset(_dev) _dev->dma_offset ++#else ++#define dev_set_dma_offset(_dev, _offset) ++#define dev_get_dma_offset(_dev) 0 ++#endif ++ + static inline int dev_of_offset(const struct udevice *dev) + { + return ofnode_to_offset(dev->node); +-- +2.29.2 -From patchwork Tue Dec 15 17:23:18 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416604 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQB14gCvz9sPB - for ; Wed, 16 Dec 2020 04:24:57 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id DF70A82A16; - Tue, 15 Dec 2020 18:23:51 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 8DEB6829FF; Tue, 15 Dec 2020 18:23:38 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 65B40829ED - for ; Tue, 15 Dec 2020 18:23:32 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 54CF4B1C2; - Tue, 15 Dec 2020 17:23:31 +0000 (UTC) +From 78faf21e47d29666ff36d853bbf3bb20508fafce Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 07/12] dm: test: Add test case for dev->dma_offset -Date: Tue, 15 Dec 2020 18:23:18 +0100 -Message-Id: <20201215172323.13309-8-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:33 +0100 +Subject: [PATCH 07/13] dm: test: Add test case for dev->dma_offset Add test to validate dev->dma_offset is properly set on devices. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 4 ++++ configs/sandbox64_defconfig | 1 + @@ -1301,7 +825,7 @@ index 479f0226e3..0a4815770c 100644 CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y diff --git a/test/dm/core.c b/test/dm/core.c -index 6f380a574c..998874ffee 100644 +index 6f380a574c..8ca49d09ee 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -1066,3 +1066,33 @@ static int dm_test_inactive_child(struct unit_test_state *uts) @@ -1317,104 +841,34 @@ index 6f380a574c..998874ffee 100644 + /* Make sure the bus's dma-ranges aren't taken into account here */ + node = ofnode_path("/mmio-bus@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); + ut_asserteq_64(0, dev->dma_offset); + + /* Device behind a bus with dma-ranges */ + node = ofnode_path("/mmio-bus@0/subnode@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); + ut_asserteq_64(-0x10000000ULL, dev->dma_offset); + + /* This one has no dma-ranges */ + node = ofnode_path("/mmio-bus@1"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); + node = ofnode_path("/mmio-bus@1/subnode@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); + ut_asserteq_64(0, dev->dma_offset); + + return 0; +} +DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +-- +2.29.2 -From patchwork Tue Dec 15 17:23:19 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416605 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Signed-off-by: Nicolas Saenz Julienne Reviewed-by: Simon Glass +Reviewed-by: Stefan Roese --- -Changes since v2: - - Use CONFIG_DM_DMA - - include/phys2bus.h | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) + include/phys2bus.h | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) diff --git a/include/phys2bus.h b/include/phys2bus.h -index dc9b8e5a25..516d630aea 100644 +index dc9b8e5a25..866b8b51a8 100644 --- a/include/phys2bus.h +++ b/include/phys2bus.h -@@ -21,4 +21,20 @@ static inline unsigned long bus_to_phys(unsigned long bus) +@@ -21,4 +21,21 @@ static inline unsigned long bus_to_phys(unsigned long bus) } #endif -+#if CONFIG_IS_ENABLED(DM_DMA) ++#if CONFIG_IS_ENABLED(DM) +#include + -+static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, -+ phys_addr_t phys) ++static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, phys_addr_t phys) +{ -+ return phys - dev->dma_offset; ++ return phys - dev_get_dma_offset(dev); +} + -+static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, -+ dma_addr_t bus) ++static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, dma_addr_t bus) +{ -+ return bus + dev->dma_offset; ++ return bus + dev_get_dma_offset(dev); +} ++#else ++#define dev_phys_to_bus(_, _addr) _addr ++#define dev_bus_to_phys(_, _addr) _addr +#endif + #endif +-- +2.29.2 -From patchwork Tue Dec 15 17:23:20 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416606 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQBN59dSz9sPB - for ; Wed, 16 Dec 2020 04:25:16 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 29A0082A13; - Tue, 15 Dec 2020 18:23:56 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 672DA82A04; Tue, 15 Dec 2020 18:23:40 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 02380829F8 - for ; Tue, 15 Dec 2020 18:23:33 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 8760FAFD7; - Tue, 15 Dec 2020 17:23:32 +0000 (UTC) +From bf9d354942113252ef74c0a6394d71fb52d4325b Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 09/12] dm: test: Add test case for +Date: Wed, 23 Dec 2020 19:55:35 +0100 +Subject: [PATCH 09/13] dm: test: Add test case for dev_phys_to_bus()/dev_bus_to_phys() -Date: Tue, 15 Dec 2020 18:23:20 +0100 -Message-Id: <20201215172323.13309-10-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean By reusing DT nodes already available in sandbox's test DT introduce a test to validate dev_phys_to_bus()/dev_bus_to_phys(). Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- test/dm/Makefile | 1 + - test/dm/phys2bus.c | 36 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 37 insertions(+) + test/dm/phys2bus.c | 37 +++++++++++++++++++++++++++++++++++++ + 2 files changed, 38 insertions(+) create mode 100644 test/dm/phys2bus.c diff --git a/test/dm/Makefile b/test/dm/Makefile @@ -1560,10 +945,10 @@ index 5c52d8b6ea..ac86abaa88 100644 obj-$(CONFIG_ACPIGEN) += acpigen.o diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c new file mode 100644 -index 0000000000..06a045c168 +index 0000000000..342f2fa8eb --- /dev/null +++ b/test/dm/phys2bus.c -@@ -0,0 +1,36 @@ +@@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2020 Nicolas Saenz Julienne @@ -1571,6 +956,7 @@ index 0000000000..06a045c168 + +#include +#include ++#include +#include +#include +#include @@ -1586,98 +972,28 @@ index 0000000000..06a045c168 + + node = ofnode_path("/mmio-bus@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); + /* In this case it should be transparent, no dma-ranges in parent bus */ -+ ut_asserteq_ptr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_ptr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); ++ ut_asserteq_addr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); + + node = ofnode_path("/mmio-bus@0/subnode@0"); + ut_assert(ofnode_valid(node)); -+ ut_assert(!uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_ptr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_ptr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_addr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); + + return 0; +} +DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +-- +2.29.2 -From patchwork Tue Dec 15 17:23:21 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416608 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQBm5kcqz9sPB - for ; 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- dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 0AEEDB1C9; - Tue, 15 Dec 2020 17:23:33 +0000 (UTC) -From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 10/12] xhci: translate virtual addresses into the bus's +From 8abe749ff354a369f748c06aa70711bcdea9e61c Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 28 Dec 2020 21:38:37 +0000 +Subject: [PATCH 10/13] xhci: translate virtual addresses into the bus's address space -Date: Tue, 15 Dec 2020 18:23:21 +0100 -Message-Id: <20201215172323.13309-11-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean So far we've been content with passing physical addresses when configuring memory addresses into XHCI controllers, but not all @@ -1689,12 +1005,15 @@ Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these limitations, and make sure we don't break non DM users. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass +Reviewed-by: Stefan Roese +Signed-off-by: Peter Robinson --- drivers/usb/host/xhci-mem.c | 45 +++++++++++++++++++----------------- - drivers/usb/host/xhci-ring.c | 11 +++++---- + drivers/usb/host/xhci-ring.c | 13 +++++++---- drivers/usb/host/xhci.c | 4 ++-- - include/usb/xhci.h | 22 +++++++++++++++++- - 4 files changed, 54 insertions(+), 28 deletions(-) + include/usb/xhci.h | 20 +++++++++++++++- + 4 files changed, 53 insertions(+), 29 deletions(-) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index b002d6f166..83147d51b5 100644 @@ -1863,7 +1182,7 @@ index b002d6f166..83147d51b5 100644 /* diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c -index 13065d7ca9..5a6ad383cd 100644 +index d708fc928b..6b31ad4398 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -275,10 +275,13 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id, @@ -1896,10 +1215,19 @@ index 13065d7ca9..5a6ad383cd 100644 u32 trb_fields[4]; - u64 val_64 = virt_to_phys(buffer); + u64 val_64 = xhci_virt_to_bus(ctrl, buffer); + void *last_transfer_trb_addr; + int available_length; - debug("dev=%p, pipe=%lx, buffer=%p, length=%d\n", - udev, pipe, buffer, length); -@@ -872,7 +875,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, +@@ -723,7 +726,7 @@ again: + return -ETIMEDOUT; + } + +- if ((uintptr_t)(le64_to_cpu(event->trans_event.buffer)) ++ if ((uintptr_t)(le64_to_cpu(xhci_bus_to_virt(ctrl, event->trans_event.buffer))) + != (uintptr_t)last_transfer_trb_addr) { + available_length -= + (int)EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)); +@@ -884,7 +887,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, if (length > 0) { if (req->requesttype & USB_DIR_IN) field |= TRB_DIR_IN; @@ -1931,7 +1259,7 @@ index 7080f8fabe..d27ac01c83 100644 virt_dev->eps[ep_index].ring->cycle_state); diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index e1d382369a..b87210b9ba 100644 +index e1d382369a..8d95e213b0 100644 --- a/include/usb/xhci.h +++ b/include/usb/xhci.h @@ -16,6 +16,7 @@ @@ -1942,7 +1270,20 @@ index e1d382369a..b87210b9ba 100644 #include #include #include -@@ -1250,7 +1251,8 @@ int xhci_check_maxpacket(struct usb_device *udev); +@@ -1221,6 +1222,12 @@ struct xhci_ctrl { + #define XHCI_MTK_HOST BIT(0) + }; + ++#if CONFIG_IS_ENABLED(DM_USB) ++#define xhci_to_dev(_ctrl) _ctrl->dev ++#else ++#define xhci_to_dev(_ctrl) NULL ++#endif ++ + unsigned long trb_addr(struct xhci_segment *seg, union xhci_trb *trb); + struct xhci_input_control_ctx + *xhci_get_input_control_ctx(struct xhci_container_ctx *ctx); +@@ -1250,7 +1257,8 @@ int xhci_check_maxpacket(struct usb_device *udev); void xhci_flush_cache(uintptr_t addr, u32 type_len); void xhci_inval_cache(uintptr_t addr, u32 type_len); void xhci_cleanup(struct xhci_ctrl *ctrl); @@ -1952,120 +1293,50 @@ index e1d382369a..b87210b9ba 100644 int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id); int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, struct xhci_hcor *hcor); -@@ -1278,4 +1280,22 @@ extern struct dm_usb_ops xhci_usb_ops; +@@ -1278,4 +1286,14 @@ extern struct dm_usb_ops xhci_usb_ops; struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); +static inline dma_addr_t xhci_virt_to_bus(struct xhci_ctrl *ctrl, void *addr) +{ -+#if CONFIG_IS_ENABLED(DM_DMA) -+ return dev_phys_to_bus(ctrl->dev, virt_to_phys(addr)); -+#else -+ return phys_to_bus(virt_to_phys(addr)); -+#endif ++ return dev_phys_to_bus(xhci_to_dev(ctrl), virt_to_phys(addr)); +} + +static inline void *xhci_bus_to_virt(struct xhci_ctrl *ctrl, dma_addr_t addr) +{ -+#if CONFIG_IS_ENABLED(DM_DMA) -+ return phys_to_virt(dev_bus_to_phys(ctrl->dev, addr)); -+#else -+ return phys_to_virt(bus_to_phys(addr)); -+#endif ++ return phys_to_virt(dev_bus_to_phys(xhci_to_dev(ctrl), addr)); +} + #endif /* HOST_XHCI_H_ */ +-- +2.29.2 -From patchwork Tue Dec 15 17:23:22 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416607 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQBb0GLmz9sPB - for ; Wed, 16 Dec 2020 04:25:27 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id E7F9482A20; - Tue, 15 Dec 2020 18:23:57 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 05F0082A03; Tue, 15 Dec 2020 18:23:41 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id CA59E829FA - for ; Tue, 15 Dec 2020 18:23:33 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 92E15AF1A; - Tue, 15 Dec 2020 17:23:33 +0000 (UTC) +From aa7e82f97e2c74430a3a6979b307cda87fbb4624 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 11/12] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() -Date: Tue, 15 Dec 2020 18:23:22 +0100 -Message-Id: <20201215172323.13309-12-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +Date: Wed, 23 Dec 2020 19:55:37 +0100 +Subject: [PATCH 11/13] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() This will allow us to use DM variants of phys_to_bus()/bus_to_phys() when relevant. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- - drivers/mmc/sdhci.c | 7 ++++--- - include/mmc.h | 10 ++++++++++ - 2 files changed, 14 insertions(+), 3 deletions(-) + drivers/mmc/sdhci.c | 12 +++++++----- + include/mmc.h | 6 ++++++ + 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 0628934312..2086d7cdb1 100644 +index 0628934312..62e4f53b8b 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c -@@ -19,7 +19,6 @@ +@@ -14,12 +14,12 @@ + #include + #include + #include ++#include + #include + #include #include #include #include @@ -2073,134 +1344,68 @@ index 0628934312..2086d7cdb1 100644 static void sdhci_reset(struct sdhci_host *host, u8 mask) { -@@ -103,7 +102,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, +@@ -73,6 +73,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) + static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, + int *is_aligned, int trans_bytes) + { ++ dma_addr_t dma_addr; + unsigned char ctrl; + void *buf; + +@@ -103,8 +104,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, mmc_get_dma_dir(data)); if (host->flags & USE_SDMA) { - sdhci_writel(host, phys_to_bus((ulong)host->start_addr), -+ sdhci_writel(host, -+ mmc_phys_to_bus(host->mmc, (ulong)host->start_addr), - SDHCI_DMA_ADDRESS); +- SDHCI_DMA_ADDRESS); ++ dma_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), host->start_addr); ++ sdhci_writel(host, dma_addr, SDHCI_DMA_ADDRESS); } #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) -@@ -162,7 +162,8 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) + else if (host->flags & (USE_ADMA | USE_ADMA64)) { +@@ -162,8 +163,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; - sdhci_writel(host, phys_to_bus((ulong)start_addr), -+ sdhci_writel(host, -+ mmc_phys_to_bus(host->mmc, (ulong)start_addr), - SDHCI_DMA_ADDRESS); +- SDHCI_DMA_ADDRESS); ++ start_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), ++ start_addr); ++ sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); } } + if (timeout-- > 0) diff --git a/include/mmc.h b/include/mmc.h -index 1d377e0281..5fe1ef1dfc 100644 +index 1d377e0281..c12c7a0b5c 100644 --- a/include/mmc.h +++ b/include/mmc.h -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include +@@ -736,6 +736,12 @@ struct mmc { + u8 hs400_tuning; + }; - struct bd_info; - -@@ -977,4 +978,13 @@ static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) - return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; - } - -+static inline dma_addr_t mmc_phys_to_bus(struct mmc *mmc, phys_addr_t addr) -+{ -+#if CONFIG_IS_ENABLED(DM_DMA) -+ return dev_phys_to_bus(mmc->dev, addr); ++#if CONFIG_IS_ENABLED(DM_MMC) ++#define mmc_to_dev(_mmc) _mmc->dev +#else -+ return phys_to_bus(addr); ++#define mmc_to_dev(_mmc) NULL +#endif -+} + - #endif /* _MMC_H_ */ + struct mmc_hwpart_conf { + struct { + uint enh_start; /* in 512-byte sectors */ +-- +2.29.2 -From patchwork Tue Dec 15 17:23:23 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1416609 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwQBy4zZlz9sPB - for ; Wed, 16 Dec 2020 04:25:46 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 6DF6282A2E; - Tue, 15 Dec 2020 18:24:04 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 9CF0B82A09; Tue, 15 Dec 2020 18:23:42 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, - RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham - autolearn_force=no version=3.4.2 -Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) - (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 6979E829FE - for ; Tue, 15 Dec 2020 18:23:34 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=none (p=none dis=none) header.from=suse.de -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=nsaenzjulienne@suse.de -Received: from relay2.suse.de (unknown [195.135.221.27]) - by mx2.suse.de (Postfix) with ESMTP id 2DF96AC7F; - Tue, 15 Dec 2020 17:23:34 +0000 (UTC) +From 8b39240ca809ce7ebf34b2eb707ab5d2cc5f4a20 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne -To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, - sjg@chromium.org, marex@denx.de -Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com, swarren@wwwdotorg.org, - peng.fan@nxp.com, sr@denx.de, pbrobinson@gmail.com, - Nicolas Saenz Julienne -Subject: [PATCH v3 12/12] configs: rpi4: Enable DM_DMA across all RPi4 +Date: Wed, 23 Dec 2020 19:55:38 +0100 +Subject: [PATCH 12/13] configs: rpi4: Enable DM_DMA across all RPi4 configurations -Date: Tue, 15 Dec 2020 18:23:23 +0100 -Message-Id: <20201215172323.13309-13-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215172323.13309-1-nsaenzjulienne@suse.de> -References: <20201215172323.13309-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean The DM_DMA option is needed in order to translate physical address into bus addresses on a per-device basis. Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Simon Glass --- configs/rpi_4_32b_defconfig | 1 + configs/rpi_4_defconfig | 1 + @@ -2243,3 +1448,36 @@ index 2639219a1a..4125a1feba 100644 CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y +-- +2.29.2 + +From d3cde4c05b8da7ef50019b63ac9cc0ecc0630059 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 23 Dec 2020 19:55:39 +0100 +Subject: [PATCH 13/13] video: arm: rpi: Add brcm,bcm2711-hdmi0 compatible + +The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of +'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6 +instead of VC4). This has no functional change as far as u-boot driver +is concerned. So simply add the compatible string. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/video/bcm2835.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index 0888cb0019..51941c4f53 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -52,6 +52,7 @@ static int bcm2835_video_probe(struct udevice *dev) + + static const struct udevice_id bcm2835_video_ids[] = { + { .compatible = "brcm,bcm2835-hdmi" }, ++ { .compatible = "brcm,bcm2711-hdmi0" }, + { .compatible = "brcm,bcm2708-fb" }, + { } + }; +-- +2.29.2 + diff --git a/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch b/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch deleted file mode 100644 index df63c4e..0000000 --- a/arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch +++ /dev/null @@ -1,55 +0,0 @@ -From a63eb1bdcd25246b2c637c7846917dc6dc607725 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 18 Apr 2019 15:44:59 +0100 -Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2 - variants - -Signed-off-by: Peter Robinson ---- - include/config_distro_bootcmd.h | 2 ++ - include/configs/tegra186-common.h | 7 ++++++- - 2 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index fc0935fa21..fd1c5f5afa 100644 ---- a/include/config_distro_bootcmd.h -+++ b/include/config_distro_bootcmd.h -@@ -118,8 +118,10 @@ - "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ - "fi; " - #else -+#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK - #define BOOTENV_EFI_SET_FDTFILE_FALLBACK - #endif -+#endif - - - #define BOOTENV_SHARED_EFI \ -diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h -index 5c3ad35c76..d5f21e0907 100644 ---- a/include/configs/tegra186-common.h -+++ b/include/configs/tegra186-common.h -@@ -20,6 +20,12 @@ - /* Generic Interrupt Controller */ - #define CONFIG_GICV2 - -+#undef FDTFILE -+#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ -+ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ -+ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ -+ "fi; " -+ - /* - * Memory layout for where various images get loaded by boot scripts: - * -@@ -49,7 +55,6 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -- "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" - --- -2.26.0 - diff --git a/arm-tegra-define-fdtfile-option-for-distro-boot.patch b/arm-tegra-define-fdtfile-option-for-distro-boot.patch deleted file mode 100644 index 923ccb1..0000000 --- a/arm-tegra-define-fdtfile-option-for-distro-boot.patch +++ /dev/null @@ -1,113 +0,0 @@ -From c3332b102d2ddae01710ae8f4393a2a18a3a1bb3 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 12 May 2020 08:19:48 +0100 -Subject: [PATCH] arm: tegra: define fdtfile option for distro boot - -For booting via UEFI we need to define the fdtfile option so -bootefi has the option to load a fdtfile from disk. For arm64 -the kernel dtb is located in a vendor directory so we define -that as nvidia for that architecture. - -Signed-off-by: Peter Robinson ---- - include/configs/tegra-common.h | 6 ++++++ - include/configs/tegra114-common.h | 1 + - include/configs/tegra124-common.h | 1 + - include/configs/tegra186-common.h | 1 + - include/configs/tegra20-common.h | 1 + - include/configs/tegra210-common.h | 1 + - include/configs/tegra30-common.h | 1 + - 7 files changed, 12 insertions(+) - -diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h -index 175c55c613..8026f4b32e 100644 ---- a/include/configs/tegra-common.h -+++ b/include/configs/tegra-common.h -@@ -52,6 +52,12 @@ - /* Boot Argument Buffer Size */ - #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -+#ifdef CONFIG_ARM64 -+#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" -+#else -+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" -+#endif -+ - /*----------------------------------------------------------------------- - * Physical Memory Map - */ -diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h -index d3a7045697..9d751b6740 100644 ---- a/include/configs/tegra114-common.h -+++ b/include/configs/tegra114-common.h -@@ -50,6 +50,7 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x83000000\0" \ - "ramdisk_addr_r=0x83100000\0" - -diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h -index 522993b958..0eb8f92809 100644 ---- a/include/configs/tegra124-common.h -+++ b/include/configs/tegra124-common.h -@@ -52,6 +52,7 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x83000000\0" \ - "ramdisk_addr_r=0x83100000\0" - -diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h -index b4936cc731..5c3ad35c76 100644 ---- a/include/configs/tegra186-common.h -+++ b/include/configs/tegra186-common.h -@@ -49,6 +49,7 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" - -diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h -index 1e31d82574..fdd8996955 100644 ---- a/include/configs/tegra20-common.h -+++ b/include/configs/tegra20-common.h -@@ -51,6 +51,7 @@ - "scriptaddr=0x10000000\0" \ - "pxefile_addr_r=0x10100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x03000000\0" \ - "ramdisk_addr_r=0x03100000\0" - -diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h -index 1b8e94b60c..2226effe16 100644 ---- a/include/configs/tegra210-common.h -+++ b/include/configs/tegra210-common.h -@@ -46,6 +46,7 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x83000000\0" \ - "ramdisk_addr_r=0x83200000\0" - -diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h -index 54bc6756ab..6c5dc24b26 100644 ---- a/include/configs/tegra30-common.h -+++ b/include/configs/tegra30-common.h -@@ -47,6 +47,7 @@ - "scriptaddr=0x90000000\0" \ - "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ -+ "fdtfile=" FDTFILE "\0" \ - "fdt_addr_r=0x83000000\0" \ - "ramdisk_addr_r=0x83100000\0" - --- -2.26.2 - diff --git a/sources b/sources index 69acae9..bd7ffdd 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01-rc3.tar.bz2) = 4c88bbdeb1e39e52bb069c4bf65c9829290a51da9a21de8e60d50b62c74ae98a35d22a235fdc0a86467aedc34f85dff5d63b874af247323d0d5bdcb2e82cd4a3 +SHA512 (u-boot-2021.01-rc4.tar.bz2) = 6de2c60d02276f4eed31b5baf2d8239ad0af30c9d341339a4cd7fa0786068cb5faa1ab8bd0b4155e536962e1a4869906f60f1d2a1e50b0ed15e98c2e84d6a97b diff --git a/uboot-tools.spec b/uboot-tools.spec index 76a39d2..ddc1d43 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2021.01 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -18,19 +18,17 @@ Source4: aarch64-chromebooks Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Needed due to issues with shim Patch2: uefi-use-Fedora-specific-path-name.patch -#Patch3: rockchip-spl-u-boot-itb-offset.patch +# RPi - uses RPI firmware device tree for HAT support +Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +# Ajust the U-Boot offsets in SPL to take less space +#Patch4: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement -# RPi - uses RPI firmware device tree for HAT support -Patch4: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch5: Raspberry-Pi-400-Compute-Module-4-support.patch -# Tegra improvements -Patch6: arm-tegra-define-fdtfile-option-for-distro-boot.patch -Patch7: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch -Patch11: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch -Patch12: sunxi-add-PineCube-board.patch +Patch11: sunxi-add-PineCube-board.patch +Patch12: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch # TI fixes Patch13: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements @@ -236,6 +234,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Dec 27 2020 Peter Robinson - 2021.01-0.4.rc4 +- Update to 2021.01 RC4 +- Latest RPi-400/CM4 support patch + * Tue Dec 15 2020 Peter Robinson - 2021.01-0.3.rc3 - Update to 2021.01 RC3 - Latest RPi-400/CM4 support patch From 8e2560d8512eda32789c36ae34d509f3c751e6a6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 28 Dec 2020 22:14:17 +0000 Subject: [PATCH 123/351] add RNG driver for rpi4 --- rng-Add-iProc-RNG200-driver.patch | 450 ++++++++++++++++++++++++++++++ uboot-tools.spec | 1 + 2 files changed, 451 insertions(+) create mode 100644 rng-Add-iProc-RNG200-driver.patch diff --git a/rng-Add-iProc-RNG200-driver.patch b/rng-Add-iProc-RNG200-driver.patch new file mode 100644 index 0000000..d8dcfa1 --- /dev/null +++ b/rng-Add-iProc-RNG200-driver.patch @@ -0,0 +1,450 @@ +From patchwork Tue Dec 15 09:49:23 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: mbrugger +X-Patchwork-Id: 1416366 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=kernel.org +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CwD58649Dz9s0b + for ; Tue, 15 Dec 2020 20:49:53 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 4EC6082956; + Tue, 15 Dec 2020 10:49:42 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail 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+ dkim=permerror (bad message/signature format) +To: sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: u-boot@lists.denx.de, + Matthias Brugger +Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver +Date: Tue, 15 Dec 2020 10:49:23 +0100 +Message-Id: <20201215094924.30072-1-matthias.bgg@kernel.org> +X-Mailer: git-send-email 2.29.2 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +From: Matthias Brugger + +Add support for random number generator RNG200. +This is for example found on RPi4. + +Signed-off-by: Matthias Brugger +Tested-by: Heinrich Schuchardt +--- + +Changes in v2: None + + drivers/rng/Kconfig | 6 ++ + drivers/rng/Makefile | 1 + + drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 193 insertions(+) + create mode 100644 drivers/rng/iproc_rng200.c + +diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig +index 11001c8ae7..94915d45b3 100644 +--- a/drivers/rng/Kconfig ++++ b/drivers/rng/Kconfig +@@ -46,4 +46,10 @@ config RNG_ROCKCHIP + Enable random number generator for rockchip.This driver is + support rng module of crypto v1 and crypto v2. + ++config RNG_IPROC200 ++ bool "Broadcom iProc RNG200 random number generator" ++ depends on DM_RNG ++ default n ++ help ++ Enable random number generator for RPI4. + endif +diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile +index 8953406882..39f7ee3f03 100644 +--- a/drivers/rng/Makefile ++++ b/drivers/rng/Makefile +@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o + obj-$(CONFIG_RNG_MSM) += msm_rng.o + obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o + obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o ++obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o +diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c +new file mode 100644 +index 0000000000..1063f43953 +--- /dev/null ++++ b/drivers/rng/iproc_rng200.c +@@ -0,0 +1,186 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright 2020, Matthias Brugger ++ * ++ * Driver for Raspberry Pi hardware random number generator ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define usleep_range(a, b) udelay((b)) ++ ++#define RNG_CTRL_OFFSET 0x00 ++#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF ++#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 ++#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 ++ ++#define RNG_SOFT_RESET_OFFSET 0x04 ++#define RNG_SOFT_RESET 0x00000001 ++ ++#define RBG_SOFT_RESET_OFFSET 0x08 ++#define RBG_SOFT_RESET 0x00000001 ++ ++#define RNG_INT_STATUS_OFFSET 0x18 ++#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000 ++#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020 ++ ++#define RNG_FIFO_DATA_OFFSET 0x20 ++ ++#define RNG_FIFO_COUNT_OFFSET 0x24 ++#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF ++ ++struct iproc_rng200_platdata { ++ fdt_addr_t base; ++}; ++ ++static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable) ++{ ++ fdt_addr_t rng_base = pdata->base; ++ u32 val; ++ ++ val = readl(rng_base + RNG_CTRL_OFFSET); ++ val &= ~RNG_CTRL_RNG_RBGEN_MASK; ++ if (enable) ++ val |= RNG_CTRL_RNG_RBGEN_ENABLE; ++ else ++ val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; ++ ++ writel(val, rng_base + RNG_CTRL_OFFSET); ++ ++} ++ ++static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata) ++{ ++ fdt_addr_t rng_base = pdata->base; ++ u32 val; ++ ++ iproc_rng200_enable(pdata, false); ++ ++ /* Clear all interrupt status */ ++ writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET); ++ ++ /* Reset RNG and RBG */ ++ val = readl(rng_base + RBG_SOFT_RESET_OFFSET); ++ val |= RBG_SOFT_RESET; ++ writel(val, rng_base + RBG_SOFT_RESET_OFFSET); ++ ++ val = readl(rng_base + RNG_SOFT_RESET_OFFSET); ++ val |= RNG_SOFT_RESET; ++ writel(val, rng_base + RNG_SOFT_RESET_OFFSET); ++ ++ val = readl(rng_base + RNG_SOFT_RESET_OFFSET); ++ val &= ~RNG_SOFT_RESET; ++ writel(val, rng_base + RNG_SOFT_RESET_OFFSET); ++ ++ val = readl(rng_base + RBG_SOFT_RESET_OFFSET); ++ val &= ~RBG_SOFT_RESET; ++ writel(val, rng_base + RBG_SOFT_RESET_OFFSET); ++ ++ iproc_rng200_enable(pdata, true); ++} ++ ++static int iproc_rng200_read(struct udevice *dev, void *data, size_t len) ++{ ++ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ char *buf = (char *)data; ++ u32 num_remaining = len; ++ u32 status; ++ ++ #define MAX_RESETS_PER_READ 1 ++ u32 num_resets = 0; ++ ++ while (num_remaining > 0) { ++ ++ /* Is RNG sane? If not, reset it. */ ++ status = readl(priv->base + RNG_INT_STATUS_OFFSET); ++ if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK | ++ RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) { ++ ++ if (num_resets >= MAX_RESETS_PER_READ) ++ return len - num_remaining; ++ ++ iproc_rng200_restart(priv); ++ num_resets++; ++ } ++ ++ /* Are there any random numbers available? */ ++ if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) & ++ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) { ++ ++ if (num_remaining >= sizeof(u32)) { ++ /* Buffer has room to store entire word */ ++ *(u32 *)buf = readl(priv->base + ++ RNG_FIFO_DATA_OFFSET); ++ buf += sizeof(u32); ++ num_remaining -= sizeof(u32); ++ } else { ++ /* Buffer can only store partial word */ ++ u32 rnd_number = readl(priv->base + ++ RNG_FIFO_DATA_OFFSET); ++ memcpy(buf, &rnd_number, num_remaining); ++ buf += num_remaining; ++ num_remaining = 0; ++ } ++ ++ } else { ++ /* Can wait, give others chance to run */ ++ usleep_range(min(num_remaining * 10, 500U), 500); ++ } ++ } ++ ++ return 0; ++} ++ ++static int iproc_rng200_probe(struct udevice *dev) ++{ ++ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ ++ iproc_rng200_enable(priv, true); ++ ++ return 0; ++} ++ ++static int iproc_rng200_remove(struct udevice *dev) ++{ ++ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ ++ iproc_rng200_enable(priv, false); ++ ++ return 0; ++} ++ ++static int iproc_rng200_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct iproc_rng200_platdata *pdata = dev_get_platdata(dev); ++ ++ pdata->base = dev_read_addr(dev); ++ if (!pdata->base) ++ return -ENODEV; ++ ++ return 0; ++} ++ ++static const struct dm_rng_ops iproc_rng200_ops = { ++ .read = iproc_rng200_read, ++}; ++ ++static const struct udevice_id iproc_rng200_rng_match[] = { ++ { .compatible = "brcm,bcm2711-rng200", }, ++ { .compatible = "brcm,iproc-rng200", }, ++ {}, ++}; ++ ++U_BOOT_DRIVER(iproc_rng200_rng) = { ++ .name = "iproc_rng200-rng", ++ .id = UCLASS_RNG, ++ .of_match = iproc_rng200_rng_match, ++ .ops = &iproc_rng200_ops, ++ .probe = iproc_rng200_probe, ++ .remove = iproc_rng200_remove, ++ .platdata_auto_alloc_size = sizeof(struct iproc_rng200_platdata), ++ .ofdata_to_platdata = iproc_rng200_ofdata_to_platdata, ++}; + +From patchwork Tue Dec 15 09:49:24 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: mbrugger +X-Patchwork-Id: 1416367 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=fail (p=none dis=none) header.from=kernel.org +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4CwD5D4Gf2z9s0b + for ; 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+ dmarc=pass (p=none dis=none) header.from=kernel.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=matthias.bgg@kernel.org +From: matthias.bgg@kernel.org +Authentication-Results: mail.kernel.org; + dkim=permerror (bad message/signature format) +To: sughosh.ganu@linaro.org, + xypron.glpk@gmx.de +Cc: u-boot@lists.denx.de, + Matthias Brugger +Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs +Date: Tue, 15 Dec 2020 10:49:24 +0100 +Message-Id: <20201215094924.30072-2-matthias.bgg@kernel.org> +X-Mailer: git-send-email 2.29.2 +In-Reply-To: <20201215094924.30072-1-matthias.bgg@kernel.org> +References: <20201215094924.30072-1-matthias.bgg@kernel.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +From: Matthias Brugger + +We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's +config so that it can be used. + +Signed-off-by: Matthias Brugger +--- + +Changes in v2: +- fix defconfigs using savedefconfig (Heinrich) + + configs/rpi_4_32b_defconfig | 2 ++ + configs/rpi_4_defconfig | 2 ++ + configs/rpi_arm64_defconfig | 2 ++ + drivers/rng/iproc_rng200.c | 1 - + 4 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 5ddd838fd5..4039e46c81 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_IPROC200=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 2590d0a696..46b6cc3046 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_IPROC200=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 2639219a1a..b75144036d 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set + CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_IPROC200=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c +index 1063f43953..378f6cf48d 100644 +--- a/drivers/rng/iproc_rng200.c ++++ b/drivers/rng/iproc_rng200.c +@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; + + writel(val, rng_base + RNG_CTRL_OFFSET); +- + } + + static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata) diff --git a/uboot-tools.spec b/uboot-tools.spec index ddc1d43..768452c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -25,6 +25,7 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement Patch5: Raspberry-Pi-400-Compute-Module-4-support.patch +Patch6: rng-Add-iProc-RNG200-driver.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch Patch11: sunxi-add-PineCube-board.patch From f5f44b644659af24dcb06d1ab091ce2a3011a143 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 10 Jan 2021 17:49:00 +0000 Subject: [PATCH 124/351] 2021.01 RC5 --- ...-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch | 517 ++++++++++++++++++ sources | 2 +- uboot-tools.spec | 13 +- 3 files changed, 527 insertions(+), 5 deletions(-) create mode 100644 rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch diff --git a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch new file mode 100644 index 0000000..39f9bb5 --- /dev/null +++ b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch @@ -0,0 +1,517 @@ +From patchwork Sun Nov 22 13:03:44 2020 +Content-Type: text/plain; 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[82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.08 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:08 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , Simon Glass , + Kever Yang , + Peter Robinson , + Philipp Tomsich +Subject: [PATCH v2 1/3] rockchip: pinebook-pro: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:44 +0000 +Message-Id: <20201122130346.11621-2-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this machine is located on bus 1, default to using bus 1 +for SPI flash and stop aliasing it to bus 0. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Simon Glass +Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") +--- + +(no changes since v1) + + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- + configs/pinebook-pro-rk3399_defconfig | 2 ++ + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index ded7db0aeff..ee3b98698e6 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -7,10 +7,6 @@ + #include "rk3399-sdram-lpddr4-100.dtsi" + + / { +- aliases { +- spi0 = &spi1; +- }; +- + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; + }; +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 1ed54ad0eda..ef00ad92c45 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -37,6 +37,7 @@ CONFIG_SPL_OF_CONTROL=y + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" + CONFIG_ENV_IS_IN_SPI_FLASH=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEYBOARD=y +@@ -49,6 +50,7 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y + +From patchwork Sun Nov 22 13:03:45 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Hugh Cole-Baker +X-Patchwork-Id: 1404476 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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[82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.11 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:11 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , Simon Glass , + Jagan Teki , + Kever Yang , Levin Du , + Philipp Tomsich , + Suniel Mahesh +Subject: [PATCH v2 2/3] rockchip: rk3399-roc-pc: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:45 +0000 +Message-Id: <20201122130346.11621-3-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this board is located on bus 1, default to using bus 1 for +SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to +bus 0. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Simon Glass +Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") +--- + +(no changes since v1) + + arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 4 ---- + configs/roc-pc-mezzanine-rk3399_defconfig | 1 + + configs/roc-pc-rk3399_defconfig | 1 + + 3 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +index fc155e69036..e3c9364e359 100644 +--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +@@ -7,10 +7,6 @@ + #include "rk3399-sdram-lpddr4-100.dtsi" + + / { +- aliases { +- spi0 = &spi1; +- }; +- + chosen { + u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; + }; +diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig +index ae16f3558a3..8aa5a155180 100644 +--- a/configs/roc-pc-mezzanine-rk3399_defconfig ++++ b/configs/roc-pc-mezzanine-rk3399_defconfig +@@ -42,6 +42,7 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig +index 774707b115b..927b57685d9 100644 +--- a/configs/roc-pc-rk3399_defconfig ++++ b/configs/roc-pc-rk3399_defconfig +@@ -41,6 +41,7 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y + +From patchwork Sun Nov 22 13:03:46 2020 +Content-Type: text/plain; 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[82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.15 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:15 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , + Kever Yang , + Heiko Stuebner , + Jagan Teki , + Klaus Goger , + Peter Robinson , + Philipp Tomsich , + Simon Glass +Subject: [PATCH v2 3/3] rockchip: puma-haikou: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:46 +0000 +Message-Id: <20201122130346.11621-4-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this machine is located on bus 1, default to using bus 1 +for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1 +pointed to &spi5, use an alias spi5 for this instead. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Kever Yang +--- + +Changes in v2: +New patch. + + arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 3 +-- + configs/puma-rk3399_defconfig | 2 ++ + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +index 29846c4b001..e7a1aea3a56 100644 +--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +@@ -28,8 +28,7 @@ + }; + + aliases { +- spi0 = &spi1; +- spi1 = &spi5; ++ spi5 = &spi5; + }; + + /* +diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig +index 60178e3754c..0f15936c2d6 100644 +--- a/configs/puma-rk3399_defconfig ++++ b/configs/puma-rk3399_defconfig +@@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y + CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=1 ++CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y +@@ -53,6 +54,7 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y diff --git a/sources b/sources index bd7ffdd..7215d7b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01-rc4.tar.bz2) = 6de2c60d02276f4eed31b5baf2d8239ad0af30c9d341339a4cd7fa0786068cb5faa1ab8bd0b4155e536962e1a4869906f60f1d2a1e50b0ed15e98c2e84d6a97b +SHA512 (u-boot-2021.01-rc5.tar.bz2) = bfc9524860c9557777048350c4081d6068a4bddb354b1896240f415a17559df4dd403609b244adfe23316e8c68ae1ed1fce3412649413a2cccd9033f23b5390a diff --git a/uboot-tools.spec b/uboot-tools.spec index 768452c..6c5bdbd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2021.01 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,8 +24,6 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch #Patch4: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement -Patch5: Raspberry-Pi-400-Compute-Module-4-support.patch -Patch6: rng-Add-iProc-RNG200-driver.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch Patch11: sunxi-add-PineCube-board.patch @@ -35,6 +33,10 @@ Patch13: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch15: rk3399-Pinebook-pro-EDP-support.patch +Patch16: rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +# Raspberry Pi improvements +Patch17: Raspberry-Pi-400-Compute-Module-4-support.patch +Patch18: rng-Add-iProc-RNG200-driver.patch BuildRequires: bc BuildRequires: dtc @@ -235,6 +237,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jan 5 2021 Peter Robinson - 2021.01-0.5.rc5 +- Update to 2021.01 RC5 + * Sun Dec 27 2020 Peter Robinson - 2021.01-0.4.rc4 - Update to 2021.01 RC4 - Latest RPi-400/CM4 support patch From 74de6cf1a5a80591aa0c7d21df2bba28e18098a6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 18 Jan 2021 13:22:47 +0000 Subject: [PATCH 125/351] 2021.01, RPi4 series updates, minor sunxi fixes --- ...ne-MACPWR-and-SATAPWR-to-empty-strin.patch | 40 +++++ ...-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch | 169 ------------------ sources | 2 +- uboot-tools.spec | 22 ++- ...DT-from-any-partition-on-boot-device.patch | 2 +- uefi-use-Fedora-specific-path-name.patch | 2 +- 6 files changed, 57 insertions(+), 180 deletions(-) create mode 100644 0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch diff --git a/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch b/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch new file mode 100644 index 0000000..5c45308 --- /dev/null +++ b/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch @@ -0,0 +1,40 @@ +From 03f91f2db03bf1382608798cd58251ff920d58ef Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 18 Jan 2021 00:02:53 +0000 +Subject: [PATCH] sunxi: don't define MACPWR and SATAPWR to empty strings + +There's checks in board/sunxi/board.c if either MACPWR or SATAPWR are +defined and they are defined by default to a empty string which means +on vast majority of AllWinner boards when they're not required the +code is still run and with SATAPWR we even get an unnecessary 500ms +delay booting. So let's not define a default for these options so the +code is only run for boards that need it. + +Signed-off-by: Peter Robinson +--- + arch/arm/mach-sunxi/Kconfig | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index 49ef217f08..a566e10315 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -578,7 +578,6 @@ config OLD_SUNXI_KERNEL_COMPAT + + config MACPWR + string "MAC power pin" +- default "" + help + Set the pin used to power the MAC. This takes a string in the format + understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. +@@ -969,7 +968,6 @@ endchoice + + config SATAPWR + string "SATA power pin" +- default "" + help + Set the pins used to power the SATA. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of +-- +2.29.2 + diff --git a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch index 39f9bb5..94e43b7 100644 --- a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +++ b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch @@ -1,172 +1,3 @@ -From patchwork Sun Nov 22 13:03:44 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Hugh Cole-Baker -X-Patchwork-Id: 1404474 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20161025 header.b=P6CnMO7U; - dkim-atps=neutral -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Cf9VN30jjz9sT6 - for ; Mon, 23 Nov 2020 00:04:41 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id CE775825A1; - Sun, 22 Nov 2020 14:04:18 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Authentication-Results: phobos.denx.de; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.b="P6CnMO7U"; - dkim-atps=neutral -Received: by phobos.denx.de (Postfix, from userid 109) - id 74E088257F; Sun, 22 Nov 2020 14:04:13 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE,URIBL_BLOCKED - autolearn=ham autolearn_force=no version=3.4.2 -Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com - [IPv6:2a00:1450:4864:20::441]) - (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 898AE82564 - for ; Sun, 22 Nov 2020 14:04:09 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=sigmaris@gmail.com -Received: by mail-wr1-x441.google.com with SMTP id l1so15714256wrb.9 - for ; Sun, 22 Nov 2020 05:04:09 -0800 (PST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; - h=from:to:cc:subject:date:message-id:in-reply-to:references - :mime-version:content-transfer-encoding; - bh=6SYQmHVr0D0O3wWmxMfhj7ZKtMAcYMPC+fsr+GotKTs=; - b=P6CnMO7Up+Z5K5CbVzKd4H/2QN8yjMOXmyDou0LODbNDm9Bk5yNIT7IPUTNgCi7OHU - MCkWj1sA/Y0Vy7be+3ft1nvEIh1fY6E44ffw6tGcvGUf7rDXyQvyAZ6zSd8IHyqI44Xq - dzs/KERwAULCzSHt9OQNGYDnv3bKJAfGhh5t+nfR8z8/9ssONR3q18wKQEJ1X5eFO/IK - butM9Dq2sfJ0e15aYShs2Ku0k641pHX6ur5zSujD46MVhPApRhbHN9pbTAdmBmFb5cpk - taUyiQmhmHxj8oclIibEwDHS/0ygI7OmaEfDZRoYa5K8U6dp7hqDb9iZHasNsyBYRHs+ - Iuyg== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=6SYQmHVr0D0O3wWmxMfhj7ZKtMAcYMPC+fsr+GotKTs=; - b=mQwI4z7mnmNifc4yfgZj/vpgd1vQW9IOxjw2r3+sk+pRuJ6SjrjPsFmnfU8d1CfA5X - /IgzqDbWRhYtjMPiXe0VbrS8HfI5Fqps/BFq2BjN+zrER/ZUKC0MSkv7XsYQmM3UoFgo - ysyImd1T8hkM2fcsg0idMJ1AAY2Mtol2oKwHm+F5kW054bkSUo2mWpGRJE/RUTGMJYzP - oGu6T7V/CLjZCuWNJkpzwzCY7BoyLnirZ+EH4mMGkxJgZ4NdZIl+DVP0kcbSgNLTDMhy - JTF57D+dog/31smuIZ38Xtiee9OlTyoaTQzEN8+1zfHSevwQyUD48xyKcLFA2DVAYtYP - X4wQ== -X-Gm-Message-State: AOAM533BH77QNc2JvGEEMb3O1vShAryk75TxbZD57eNvHYZ5XNi0l3Nd - Hi9Vz0PAFdp4uFVQjchxkUeQHvOpOpzcpA== -X-Google-Smtp-Source: - ABdhPJzsTBCcXrYUm/5t74Gtg0n/vpUspyjdh6Ua796/vUxpSvKtaPDvdYxfFz+jaI/Ujmpb8WJFOw== -X-Received: by 2002:a5d:5183:: with SMTP id k3mr5107660wrv.62.1606050248908; - Sun, 22 Nov 2020 05:04:08 -0800 (PST) -Received: from apple.sigmaris.info (ebrouter.sigmaris.info. [82.69.107.165]) - by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.08 - (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); - Sun, 22 Nov 2020 05:04:08 -0800 (PST) -From: Hugh Cole-Baker -To: U-Boot Mailing List -Cc: Hugh Cole-Baker , Simon Glass , - Kever Yang , - Peter Robinson , - Philipp Tomsich -Subject: [PATCH v2 1/3] rockchip: pinebook-pro: default to SPI bus 1 for - SPI-flash -Date: Sun, 22 Nov 2020 13:03:44 +0000 -Message-Id: <20201122130346.11621-2-sigmaris@gmail.com> -X-Mailer: git-send-email 2.24.3 (Apple Git-128) -In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> -References: <20201122130346.11621-1-sigmaris@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -SPI flash on this machine is located on bus 1, default to using bus 1 -for SPI flash and stop aliasing it to bus 0. - -Signed-off-by: Hugh Cole-Baker -Suggested-by: Simon Glass -Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") ---- - -(no changes since v1) - - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- - configs/pinebook-pro-rk3399_defconfig | 2 ++ - 2 files changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index ded7db0aeff..ee3b98698e6 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -7,10 +7,6 @@ - #include "rk3399-sdram-lpddr4-100.dtsi" - - / { -- aliases { -- spi0 = &spi1; -- }; -- - chosen { - u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; - }; -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 1ed54ad0eda..ef00ad92c45 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -37,6 +37,7 @@ CONFIG_SPL_OF_CONTROL=y - CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" - CONFIG_ENV_IS_IN_SPI_FLASH=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SPL_DM_SEQ_ALIAS=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_DM_KEYBOARD=y -@@ -49,6 +50,7 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_SPI_FLASH_WINBOND=y - From patchwork Sun Nov 22 13:03:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 diff --git a/sources b/sources index 7215d7b..1e6a02f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01-rc5.tar.bz2) = bfc9524860c9557777048350c4081d6068a4bddb354b1896240f415a17559df4dd403609b244adfe23316e8c68ae1ed1fce3412649413a2cccd9033f23b5390a +SHA512 (u-boot-2021.01.tar.bz2) = 40dd4d9ef87a1829158658c433d46a047a39c0d8c314ad8d133f7240343ee3a75b060f009dd2efe598cfb8a766773f6cd773ea7f7745ee88e52a771c77eb1c6e diff --git a/uboot-tools.spec b/uboot-tools.spec index 6c5bdbd..40bf234 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc1 Name: uboot-tools Version: 2021.01 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,15 +28,17 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch10: AllWinner-PineTab.patch Patch11: sunxi-add-PineCube-board.patch Patch12: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch +Patch13: 0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch # TI fixes -Patch13: 0001-Fix-BeagleAI-detection.patch +Patch14: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch15: rk3399-Pinebook-pro-EDP-support.patch -Patch16: rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +Patch15: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +Patch16: rk3399-Pinebook-pro-EDP-support.patch +Patch17: rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch # Raspberry Pi improvements -Patch17: Raspberry-Pi-400-Compute-Module-4-support.patch -Patch18: rng-Add-iProc-RNG200-driver.patch +Patch18: Raspberry-Pi-400-Compute-Module-4-support.patch +Patch19: rng-Add-iProc-RNG200-driver.patch +Patch20: Raspberry-Pi-4-PCIe-handover.patch BuildRequires: bc BuildRequires: dtc @@ -237,6 +239,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jan 11 2021 Peter Robinson - 2021.01-1 +- Update to 2021.01 GA +- Updates for Raspberry Pi 4 Series of devices + * Tue Jan 5 2021 Peter Robinson - 2021.01-0.5.rc5 - Update to 2021.01 RC5 diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index cc2c4f8..39d6c20 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -66,7 +66,7 @@ index ff29ef5a905..769477cd80e 100644 + "fi;" \ + "done; " \ + "done; " \ -+ "run boot_efi_bootmgr\0" \ ++ "run boot_efi_binary\0" \ + "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ "efi/boot/"BOOTEFI_NAME"; then " \ diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index a7f6a16..68db8b9 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -34,7 +34,7 @@ index 769477cd80e..22ce3685758 100644 "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ @@ -169,9 +169,9 @@ - "run boot_efi_bootmgr\0" \ + "run boot_efi_binary\0" \ "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/boot/"BOOTEFI_NAME"; then " \ From 12eb6a489ac58d1770536c0b62e8f2e4785b3223 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 18 Jan 2021 13:27:20 +0000 Subject: [PATCH 126/351] Add RPi-4 pcie patch --- Raspberry-Pi-4-PCIe-handover.patch | 89 ++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Raspberry-Pi-4-PCIe-handover.patch diff --git a/Raspberry-Pi-4-PCIe-handover.patch b/Raspberry-Pi-4-PCIe-handover.patch new file mode 100644 index 0000000..1a52850 --- /dev/null +++ b/Raspberry-Pi-4-PCIe-handover.patch @@ -0,0 +1,89 @@ +From 5e2954fae6081daf8d65ba28dd0edef3527f5d31 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 14 Jan 2021 17:07:18 +0000 +Subject: [PATCH 1/2] usb: xhci-pci: Add DM_FLAG_OS_PREPARE flag + +The PCIe bus the controller is connected to might need to be removed +prior the handover. Make sure xhci-pci is also removed so as to avoid +unexpected timeouts or hangs. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Peter Robinson +--- + drivers/usb/host/xhci-pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index 9fb6d2f763..19f8fb4458 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -61,7 +61,7 @@ U_BOOT_DRIVER(xhci_pci) = { + .ops = &xhci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct xhci_ctrl), +- .flags = DM_FLAG_ALLOC_PRIV_DMA, ++ .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA, + }; + + static struct pci_device_id xhci_pci_supported[] = { +-- +2.29.2 + +From 162e817b0196c418bcf5d02cedf2d823f3497321 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 14 Jan 2021 17:09:47 +0000 +Subject: [PATCH 2/2] pci: brcmstb: Cleanup controller state before handover + +Make sure we handover the PCIe controller in a clean state. Some of the +devices hanging from the PCIe bus might need to be properly reset +through #PERST in order for Linux to be able to initialize them. + +This is specially important in order to properly initialize Raspberry Pi +4 B and 400's USB chip. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Peter Robinson +--- + drivers/pci/pcie_brcmstb.c | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +index f6e8ad0d0a..de824a4d9b 100644 +--- a/drivers/pci/pcie_brcmstb.c ++++ b/drivers/pci/pcie_brcmstb.c +@@ -577,6 +577,24 @@ static int brcm_pcie_probe(struct udevice *dev) + return 0; + } + ++static int brcm_pcie_remove(struct udevice *dev) ++{ ++ struct brcm_pcie *pcie = dev_get_priv(dev); ++ void __iomem *base = pcie->base; ++ ++ /* Assert fundamental reset */ ++ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK); ++ ++ /* Turn off SerDes */ ++ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, ++ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); ++ ++ /* Shutdown bridge */ ++ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); ++ ++ return 0; ++} ++ + static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) + { + struct brcm_pcie *pcie = dev_get_priv(dev); +@@ -616,6 +634,7 @@ U_BOOT_DRIVER(pcie_brcm_base) = { + .ops = &brcm_pcie_ops, + .of_match = brcm_pcie_ids, + .probe = brcm_pcie_probe, ++ .remove = brcm_pcie_remove, + .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct brcm_pcie), + }; +-- +2.29.2 + From 90614b00cef0c5149c70a15952b9faae0b0e12c6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 18 Jan 2021 14:54:46 +0000 Subject: [PATCH 127/351] Sort target list files --- aarch64-boards | 12 ++++++------ arm-boards | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index e5d4147..c568d46 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -12,8 +12,8 @@ firefly-rk3399 geekbox hikey khadas-edge-captain-rk3399 -khadas-edge-v-rk3399 khadas-edge-rk3399 +khadas-edge-v-rk3399 khadas-vim khadas-vim2 khadas-vim3 @@ -28,8 +28,8 @@ mvebu_mcbin-88f8040 nanopc-t4-rk3399 nanopi_a64 nanopi-k2 -nanopi-m4-rk3399 nanopi-m4-2gb-rk3399 +nanopi-m4-rk3399 nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 @@ -50,21 +50,21 @@ pine64-lts pine64_plus pinebook pinebook-pro-rk3399 +pine_h64 pinephone pinetab -pine_h64 poplar puma-rk3399 +roc-cc-rk3328 rock64-rk3328 rock960-rk3399 -rock-pi-4-rk3399 rock-pi-4c-rk3399 +rock-pi-4-rk3399 rock-pi-e-rk3328 rock-pi-n10-rk3399pro rockpro64-rk3399 -roc-cc-rk3328 -roc-pc-rk3399 roc-pc-mezzanine-rk3399 +roc-pc-rk3399 rpi_3 rpi_4 rpi_arm64 diff --git a/arm-boards b/arm-boards index 8a7798d..0cf367e 100644 --- a/arm-boards +++ b/arm-boards @@ -113,8 +113,8 @@ qemu_arm r7-tv-dongle riotboard rock -rock-pi-n8-rk3288 rock2 +rock-pi-n8-rk3288 rpi_2 rpi_3_32b rpi_4_32b @@ -139,5 +139,5 @@ warp warp7 Wexler_TAB7200 Wits_Pro_A20_DKT -Yones_Toptech_BS1078_V2 xilinx_zynq_virt +Yones_Toptech_BS1078_V2 From 6be7eb2066345d1fd52d8d9ddb847031f4bee9c7 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Wed, 27 Jan 2021 22:31:46 +0000 Subject: [PATCH 128/351] - Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 40bf234..4bdd596 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -239,6 +239,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Jan 27 2021 Fedora Release Engineering - 2021.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild + * Mon Jan 11 2021 Peter Robinson - 2021.01-1 - Update to 2021.01 GA - Updates for Raspberry Pi 4 Series of devices From 65ed4db407f641a44f7ade163634678aec7ce04f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 1 Feb 2021 22:31:25 +0000 Subject: [PATCH 129/351] 2021.04 RC1, new devices --- ...llWinner-ethernet-network-interfaces.patch | 518 ------ ...ne-MACPWR-and-SATAPWR-to-empty-strin.patch | 40 - Raspberry-Pi-4-PCIe-handover.patch | 71 +- ...erry-Pi-400-Compute-Module-4-support.patch | 1642 +++++++---------- aarch64-boards | 5 + ...nable-rng-on-rock960-and-firefly3399.patch | 135 -- rk3399-Pinebook-pro-EDP-support.patch | 1190 ++---------- ...-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch | 348 ---- sources | 2 +- sunxi-add-PineCube-board.patch | 222 --- uboot-tools.spec | 29 +- 11 files changed, 915 insertions(+), 3287 deletions(-) delete mode 100644 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch delete mode 100644 0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch delete mode 100644 arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch delete mode 100644 rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch delete mode 100644 sunxi-add-PineCube-board.patch diff --git a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch deleted file mode 100644 index 3dc423b..0000000 --- a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch +++ /dev/null @@ -1,518 +0,0 @@ -From 25ce28126444900b7b3efef36c6b9d15a6ab9af1 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 28 Oct 2020 10:08:44 +0000 -Subject: [PATCH] Fixes for AllWinner ethernet network interfaces - -The upstream kernel in fixing stuff has broken stuff. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/sun50i-a64-bananapi-m64.dts | 2 +- - arch/arm/dts/sun50i-a64-nanopi-a64.dts | 2 +- - arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +- - arch/arm/dts/sun50i-a64-olinuxino.dts | 2 +- - arch/arm/dts/sun50i-a64-orangepi-win.dts | 2 +- - arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- - arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 2 +- - arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- - arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- - arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 2 +- - arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 2 +- - arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- - arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 2 +- - arch/arm/dts/sun50i-h6-beelink-gs1.dts | 2 +- - arch/arm/dts/sun50i-h6-pine-h64.dts | 2 +- - arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +- - arch/arm/dts/sun7i-a20-bananapi.dts | 2 +- - arch/arm/dts/sun7i-a20-bananapro.dts | 2 +- - arch/arm/dts/sun7i-a20-cubietruck.dts | 2 +- - arch/arm/dts/sun7i-a20-hummingbird.dts | 2 +- - arch/arm/dts/sun7i-a20-lamobo-r1.dts | 2 +- - arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 2 +- - arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 2 +- - arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 2 +- - arch/arm/dts/sun7i-a20-orangepi-mini.dts | 2 +- - arch/arm/dts/sun7i-a20-orangepi.dts | 2 +- - arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 2 +- - arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +- - arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 2 +- - arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 2 +- - arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 2 +- - arch/arm/dts/sun8i-h3-orangepi-plus.dts | 2 +- - arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- - arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +- - arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +- - arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- - 36 files changed, 36 insertions(+), 36 deletions(-) - -diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -index ef1c90401b..e1c22aeb29 100644 ---- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -@@ -112,7 +112,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts -index 31884dbc88..03ebe3e44b 100644 ---- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts -+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts -@@ -102,7 +102,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dcdc1>; - status = "okay"; -diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts -index 6a2154525d..94caf110ab 100644 ---- a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts -+++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts -@@ -30,7 +30,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - allwinner,tx-delay-ps = <600>; -diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts -index f7a4bccaa5..2396d9b797 100644 ---- a/arch/arm/dts/sun50i-a64-olinuxino.dts -+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts -@@ -102,7 +102,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dcdc1>; - allwinner,tx-delay-ps = <600>; -diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts -index b0c64f7579..5b5d4f31b6 100644 ---- a/arch/arm/dts/sun50i-a64-orangepi-win.dts -+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts -@@ -127,7 +127,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_gmac_3v3>; - status = "okay"; -diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts -index 24f1aac366..b09b4276f1 100644 ---- a/arch/arm/dts/sun50i-a64-pine64-plus.dts -+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts -@@ -52,7 +52,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-txid"; - phy-handle = <&ext_rgmii_phy>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -index 53fcc9098d..4a50a18128 100644 ---- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -@@ -95,7 +95,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -index df1b9263ad..6e30a564c8 100644 ---- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -+++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -@@ -36,7 +36,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - /delete-property/ allwinner,leds-active-low; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -index 4f9ba53ffa..9d93fe1536 100644 ---- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -@@ -96,7 +96,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts -index b059e20813..e8ab8c2df5 100644 ---- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts -+++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts -@@ -75,7 +75,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -index 70b5f09984..6cc567ea99 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -@@ -118,7 +118,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -index cb44bfa598..33ab44072e 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -@@ -124,7 +124,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts -index ef5ca64442..de448ca51e 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts -@@ -69,7 +69,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts -index 0dc33c90dd..024035d36e 100644 ---- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts -@@ -64,7 +64,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_aldo2>; - status = "okay"; -diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts -index 1898345183..13fbf26817 100644 ---- a/arch/arm/dts/sun50i-h6-pine-h64.dts -+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts -@@ -66,7 +66,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_aldo2>; - allwinner,rx-delay-ps = <200>; -diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -index e2bfe00588..4dbcad1343 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -@@ -130,7 +130,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts -index 81bc85d398..33040c43bc 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi.dts -@@ -132,7 +132,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts -index 0176e9de01..8a75545e22 100644 ---- a/arch/arm/dts/sun7i-a20-bananapro.dts -+++ b/arch/arm/dts/sun7i-a20-bananapro.dts -@@ -110,7 +110,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts -index 99f531b8d2..46a9f4669e 100644 ---- a/arch/arm/dts/sun7i-a20-cubietruck.dts -+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts -@@ -151,7 +151,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - - phy1: ethernet-phy@1 { -diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts -index fd0153f656..5c3d107094 100644 ---- a/arch/arm/dts/sun7i-a20-hummingbird.dts -+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts -@@ -101,7 +101,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_vdd>; - /* phy reset config */ - snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ -diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -index f91e1bee44..8173d77c12 100644 ---- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts -+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -@@ -120,7 +120,7 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - /delete-property/#address-cells; -diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -index f0e6a96e57..f0c5160ff8 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -@@ -112,7 +112,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - - phy1: ethernet-phy@1 { -diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -index 823aabce04..ff42708137 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -@@ -106,7 +106,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy3>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_vcc3v3>; - - snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -index 4e1c590eb0..996201665b 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -@@ -112,7 +112,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - - phy1: ethernet-phy@1 { -diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -index 15881081ca..b80215c61c 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -@@ -121,7 +121,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts -index d64de2e73a..66efb7d1ab 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi.dts -@@ -97,7 +97,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -index 538ea15fa3..205eaae44a 100644 ---- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -@@ -115,7 +115,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - - phy1: ethernet-phy@1 { -diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -index c27e56091f..56cc5791c4 100644 ---- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -@@ -82,7 +82,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - - phy1: ethernet-phy@1 { -diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -index eaff6fa401..2beafe3a31 100644 ---- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -@@ -123,7 +123,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_sw>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - allwinner,rx-delay-ps = <700>; - allwinner,tx-delay-ps = <700>; - status = "okay"; -diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -index 5dba4fc310..ecd9ff38a8 100644 ---- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -@@ -160,7 +160,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_dldo4>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts -index 4ba533b034..bc370d4ea1 100644 ---- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts -+++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts -@@ -96,7 +96,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - - status = "okay"; - }; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts -index 97f497854e..d05fa679dc 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts -@@ -85,7 +85,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - - status = "okay"; - }; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -index 6dbf7b2e0c..b6ca45d18e 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -@@ -67,7 +67,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts -index c488aaacbd..9c20245eef 100644 ---- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts -+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts -@@ -129,7 +129,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy-handle = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_dc1sw>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -index 15c22b06fc..3ab6f47cea 100644 ---- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -@@ -120,7 +120,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy-handle = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_dc1sw>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -index 39263e74fb..8e5cb3b3fd 100644 ---- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -@@ -126,7 +126,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - - status = "okay"; - }; --- -2.28.0 - diff --git a/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch b/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch deleted file mode 100644 index 5c45308..0000000 --- a/0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 03f91f2db03bf1382608798cd58251ff920d58ef Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 18 Jan 2021 00:02:53 +0000 -Subject: [PATCH] sunxi: don't define MACPWR and SATAPWR to empty strings - -There's checks in board/sunxi/board.c if either MACPWR or SATAPWR are -defined and they are defined by default to a empty string which means -on vast majority of AllWinner boards when they're not required the -code is still run and with SATAPWR we even get an unnecessary 500ms -delay booting. So let's not define a default for these options so the -code is only run for boards that need it. - -Signed-off-by: Peter Robinson ---- - arch/arm/mach-sunxi/Kconfig | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 49ef217f08..a566e10315 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -578,7 +578,6 @@ config OLD_SUNXI_KERNEL_COMPAT - - config MACPWR - string "MAC power pin" -- default "" - help - Set the pin used to power the MAC. This takes a string in the format - understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. -@@ -969,7 +968,6 @@ endchoice - - config SATAPWR - string "SATA power pin" -- default "" - help - Set the pins used to power the SATA. This takes a string in the - format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of --- -2.29.2 - diff --git a/Raspberry-Pi-4-PCIe-handover.patch b/Raspberry-Pi-4-PCIe-handover.patch index 1a52850..308db67 100644 --- a/Raspberry-Pi-4-PCIe-handover.patch +++ b/Raspberry-Pi-4-PCIe-handover.patch @@ -1,54 +1,16 @@ -From 5e2954fae6081daf8d65ba28dd0edef3527f5d31 Mon Sep 17 00:00:00 2001 +From ced27461c009f208f880fa6bbc34c216e103eca6 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Thu, 14 Jan 2021 17:07:18 +0000 -Subject: [PATCH 1/2] usb: xhci-pci: Add DM_FLAG_OS_PREPARE flag +Date: Mon, 1 Feb 2021 21:39:36 +0000 +Subject: [PATCH] Raspberry Pi 4 PCIe handover -The PCIe bus the controller is connected to might need to be removed -prior the handover. Make sure xhci-pci is also removed so as to avoid -unexpected timeouts or hangs. - -Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Peter Robinson --- - drivers/usb/host/xhci-pci.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c -index 9fb6d2f763..19f8fb4458 100644 ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -61,7 +61,7 @@ U_BOOT_DRIVER(xhci_pci) = { - .ops = &xhci_usb_ops, - .platdata_auto_alloc_size = sizeof(struct usb_platdata), - .priv_auto_alloc_size = sizeof(struct xhci_ctrl), -- .flags = DM_FLAG_ALLOC_PRIV_DMA, -+ .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA, - }; - - static struct pci_device_id xhci_pci_supported[] = { --- -2.29.2 - -From 162e817b0196c418bcf5d02cedf2d823f3497321 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 14 Jan 2021 17:09:47 +0000 -Subject: [PATCH 2/2] pci: brcmstb: Cleanup controller state before handover - -Make sure we handover the PCIe controller in a clean state. Some of the -devices hanging from the PCIe bus might need to be properly reset -through #PERST in order for Linux to be able to initialize them. - -This is specially important in order to properly initialize Raspberry Pi -4 B and 400's USB chip. - -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Peter Robinson ---- - drivers/pci/pcie_brcmstb.c | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) + drivers/pci/pcie_brcmstb.c | 19 +++++++++++++++++++ + drivers/usb/host/xhci-pci.c | 2 +- + 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index f6e8ad0d0a..de824a4d9b 100644 +index bd645d7896..398d7e1849 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c @@ -577,6 +577,24 @@ static int brcm_pcie_probe(struct udevice *dev) @@ -73,7 +35,7 @@ index f6e8ad0d0a..de824a4d9b 100644 + return 0; +} + - static int brcm_pcie_ofdata_to_platdata(struct udevice *dev) + static int brcm_pcie_of_to_plat(struct udevice *dev) { struct brcm_pcie *pcie = dev_get_priv(dev); @@ -616,6 +634,7 @@ U_BOOT_DRIVER(pcie_brcm_base) = { @@ -81,9 +43,22 @@ index f6e8ad0d0a..de824a4d9b 100644 .of_match = brcm_pcie_ids, .probe = brcm_pcie_probe, + .remove = brcm_pcie_remove, - .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata, - .priv_auto_alloc_size = sizeof(struct brcm_pcie), + .of_to_plat = brcm_pcie_of_to_plat, + .priv_auto = sizeof(struct brcm_pcie), }; +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index 2b445f21b5..d626929953 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -61,7 +61,7 @@ U_BOOT_DRIVER(xhci_pci) = { + .ops = &xhci_usb_ops, + .plat_auto = sizeof(struct usb_plat), + .priv_auto = sizeof(struct xhci_ctrl), +- .flags = DM_FLAG_ALLOC_PRIV_DMA, ++ .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA, + }; + + static struct pci_device_id xhci_pci_supported[] = { -- 2.29.2 diff --git a/Raspberry-Pi-400-Compute-Module-4-support.patch b/Raspberry-Pi-400-Compute-Module-4-support.patch index 14ffb29..f68d498 100644 --- a/Raspberry-Pi-400-Compute-Module-4-support.patch +++ b/Raspberry-Pi-400-Compute-Module-4-support.patch @@ -1,24 +1,84 @@ -From 110229bb9a802385c73d8861de833feb1a7dadb8 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:27 +0100 -Subject: [PATCH 01/13] rpi: Add identifier for the new RPi400 +From 7e0e7e5a6f9cfe9ab36635f6867bbf25a27e70cd Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 1 Feb 2021 21:34:02 +0000 +Subject: [PATCH] Raspberry Pi 400 Compute Module 4 support -The Raspberry Pi Foundation released the new RPi400 which we want to -detect, so we can enable Ethernet on it and know the correct device tree -file name. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Peter Robinson -Tested-by: Peter Robinson +Signed-off-by: Peter Robinson --- - board/raspberrypi/rpi/rpi.c | 5 +++++ - 1 file changed, 5 insertions(+) + arch/sandbox/dts/test.dts | 21 ++++++++ + board/raspberrypi/rpi/rpi.c | 10 ++++ + common/fdt_support.c | 73 ++++++++++++++++++++++++++++ + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + + configs/sandbox64_defconfig | 1 + + configs/sandbox_defconfig | 1 + + configs/sandbox_flattree_defconfig | 1 + + configs/sandbox_spl_defconfig | 1 + + drivers/core/Kconfig | 10 ++++ + drivers/core/device.c | 41 ++++++++++++++++ + drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++ + drivers/core/ofnode.c | 9 ++++ + drivers/core/read.c | 6 +++ + drivers/mmc/sdhci.c | 12 +++-- + drivers/pci/pcie_brcmstb.c | 12 ++--- + drivers/usb/host/xhci-mem.c | 45 +++++++++-------- + drivers/usb/host/xhci-ring.c | 13 +++-- + drivers/usb/host/xhci.c | 4 +- + drivers/video/bcm2835.c | 1 + + include/dm/device.h | 13 +++++ + include/dm/of_addr.h | 17 +++++++ + include/dm/ofnode.h | 16 ++++++ + include/dm/read.h | 21 ++++++++ + include/fdt_support.h | 14 ++++++ + include/mmc.h | 6 +++ + include/phys2bus.h | 17 +++++++ + include/usb/xhci.h | 20 +++++++- + test/dm/Makefile | 2 + + test/dm/core.c | 30 ++++++++++++ + test/dm/phys2bus.c | 37 ++++++++++++++ + test/dm/read.c | 49 +++++++++++++++++++ + 33 files changed, 543 insertions(+), 41 deletions(-) + create mode 100644 test/dm/phys2bus.c + create mode 100644 test/dm/read.c +diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts +index e95f4631bf..d4195b45bb 100644 +--- a/arch/sandbox/dts/test.dts ++++ b/arch/sandbox/dts/test.dts +@@ -350,6 +350,27 @@ + test5-gpios = <&gpio_a 19>; + }; + ++ mmio-bus@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "denx,u-boot-test-bus"; ++ dma-ranges = <0x10000000 0x00000000 0x00040000>; ++ ++ subnode@0 { ++ compatible = "denx,u-boot-fdt-test"; ++ }; ++ }; ++ ++ mmio-bus@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "denx,u-boot-test-bus"; ++ ++ subnode@0 { ++ compatible = "denx,u-boot-fdt-test"; ++ }; ++ }; ++ + acpi_test1: acpi-test { + compatible = "denx,u-boot-acpi-test"; + acpi-ssdt-test-data = "ab"; diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6b1fa5fc14..b66698e4a9 100644 +index 6b1fa5fc14..abcf41a5a8 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c -@@ -157,6 +157,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { +@@ -157,6 +157,16 @@ static const struct rpi_model rpi_models_new_scheme[] = { DTB_DIR "bcm2711-rpi-4-b.dtb", true, }, @@ -27,38 +87,6 @@ index 6b1fa5fc14..b66698e4a9 100644 + DTB_DIR "bcm2711-rpi-400.dtb", + true, + }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { --- -2.29.2 - -From 0b92c14019915aa7d81fa0b6746b800b037c7977 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:28 +0100 -Subject: [PATCH 02/13] rpi: Add identifier for the new CM4 - -The Raspberry Pi Foundation released the new Compute Module 4 which we -want to detect, so we can enable Ethernet on it and know the correct -device tree file name. - -Note that this sets the Ethernet option to true since the official CM4 -IO board has an Ethernet port. But that might not be the case when using -custom ones. - -Signed-off-by: Nicolas Saenz Julienne ---- - board/raspberrypi/rpi/rpi.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index b66698e4a9..abcf41a5a8 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -162,6 +162,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2711-rpi-400.dtb", - true, - }, + [0x14] = { + "Compute Module 4", + DTB_DIR "bcm2711-rpi-cm4.dtb", @@ -67,97 +95,11 @@ index b66698e4a9..abcf41a5a8 100644 }; static const struct rpi_model rpi_models_old_scheme[] = { --- -2.29.2 - -From 4fa949f51bad277d64a52c99dde0c90d3114d3b4 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:29 +0100 -Subject: [PATCH 03/13] pci: pcie-brcmstb: Fix inbound window configurations - -So far we've assumed a fixed configuration for inbound windows as we had -a single user for this controller. But the controller's DMA constraints -were improved starting with BCM2711's B1 revision of the SoC, notably -available in CM4 and Pi400. They allow for wider inbound windows. We can -now cover the whole address space, whereas before we where limited to -the lower 3GB. - -This information is passed to us through DT's 'dma-ranges' property and -it's specially important for us to honor it since some interactions with -the board's co-processor assume we're doing so (specifically the XHCI -firmware load operation, which is handled by the co-processor after -u-boot has correctly configured the PCIe controller). - -Signed-off-by: Nicolas Saenz Julienne ---- - drivers/pci/pcie_brcmstb.c | 12 +++++------- - 1 file changed, 5 insertions(+), 7 deletions(-) - -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index dade79e9c8..f6e8ad0d0a 100644 ---- a/drivers/pci/pcie_brcmstb.c -+++ b/drivers/pci/pcie_brcmstb.c -@@ -432,6 +432,7 @@ static int brcm_pcie_probe(struct udevice *dev) - struct pci_controller *hose = dev_get_uclass_priv(ctlr); - struct brcm_pcie *pcie = dev_get_priv(dev); - void __iomem *base = pcie->base; -+ struct pci_region region; - bool ssc_good = false; - int num_out_wins = 0; - u64 rc_bar2_offset, rc_bar2_size; -@@ -468,13 +469,10 @@ static int brcm_pcie_probe(struct udevice *dev) - MISC_CTRL_SCB_ACCESS_EN_MASK | - MISC_CTRL_CFG_READ_UR_MODE_MASK | - MISC_CTRL_MAX_BURST_SIZE_128); -- /* -- * TODO: When support for other SoCs than BCM2711 is added we may -- * need to use the base address and size(s) provided in the dma-ranges -- * property. -- */ -- rc_bar2_offset = 0; -- rc_bar2_size = 0xc0000000; -+ -+ pci_get_dma_regions(dev, ®ion, 0); -+ rc_bar2_offset = region.bus_start - region.phys_start; -+ rc_bar2_size = 1ULL << fls64(region.size - 1); - - tmp = lower_32_bits(rc_bar2_offset); - u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), --- -2.29.2 - -From 68a67ccb7fc417ad321bd916c81e91ca6b0cc276 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:30 +0100 -Subject: [PATCH 04/13] dm: Introduce xxx_get_dma_range() - -Add the following functions to get a specific device's DMA ranges: - - dev_get_dma_range() - - ofnode_get_dma_range() - - of_get_dma_range() - - fdt_get_dma_range() -They are specially useful in oder to be able validate a physical address -space range into a bus's and to convert addresses from and to address -spaces. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - common/fdt_support.c | 73 +++++++++++++++++++++++++++++++++++++++ - drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++++++++++++++ - drivers/core/ofnode.c | 9 +++++ - drivers/core/read.c | 6 ++++ - include/dm/of_addr.h | 17 +++++++++ - include/dm/ofnode.h | 16 +++++++++ - include/dm/read.h | 21 ++++++++++++ - include/fdt_support.h | 14 ++++++++ - 8 files changed, 234 insertions(+) - diff --git a/common/fdt_support.c b/common/fdt_support.c -index 5ae75df3c6..bf855d26c8 100644 +index 638eca983e..1a1b408607 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c -@@ -1342,6 +1342,79 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, +@@ -1344,6 +1344,79 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, return __of_translate_address(blob, node_offset, in_addr, "dma-ranges"); } @@ -237,11 +179,175 @@ index 5ae75df3c6..bf855d26c8 100644 /** * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and * who's reg property matches a physical cpu address +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 5ddd838fd5..0a5d3ff8cd 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DFU_MMC=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 2590d0a696..b61cdc05f1 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DFU_MMC=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 2639219a1a..4125a1feba 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -20,6 +20,7 @@ CONFIG_CMD_FS_UUID=y + CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_DM_DMA=y + CONFIG_DM_KEYBOARD=y + CONFIG_DM_MMC=y + CONFIG_MMC_SDHCI=y +diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig +index 4e67819559..634c19502c 100644 +--- a/configs/sandbox64_defconfig ++++ b/configs/sandbox64_defconfig +@@ -94,6 +94,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index 0c7674efc9..fc1df3114c 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -108,6 +108,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig +index 96465c56cf..4401f33f0b 100644 +--- a/configs/sandbox_flattree_defconfig ++++ b/configs/sandbox_flattree_defconfig +@@ -75,6 +75,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_DEVRES=y +diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig +index 61dae34a6a..c0118702a8 100644 +--- a/configs/sandbox_spl_defconfig ++++ b/configs/sandbox_spl_defconfig +@@ -95,6 +95,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_NETCONSOLE=y + CONFIG_IP_DEFRAG=y + CONFIG_SPL_DM=y ++CONFIG_DM_DMA=y + CONFIG_REGMAP=y + CONFIG_SPL_REGMAP=y + CONFIG_SYSCON=y +diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig +index dbfe51c6e8..00554af499 100644 +--- a/drivers/core/Kconfig ++++ b/drivers/core/Kconfig +@@ -129,6 +129,16 @@ config TPL_DM_INLINE_OFNODE + This applies to several ofnode functions (see ofnode.h) which are + seldom used. Inlining them can help reduce code size. + ++config DM_DMA ++ bool "Support per-device DMA constraints" ++ depends on DM ++ default n ++ help ++ Enable this to extract per-device DMA constraints, only supported on ++ device-tree systems for now. This is needed in order translate ++ addresses on systems where different buses have different views of ++ the physical address space. ++ + config REGMAP + bool "Support register maps" + depends on DM +diff --git a/drivers/core/device.c b/drivers/core/device.c +index 8629df8def..2ce9cbbe11 100644 +--- a/drivers/core/device.c ++++ b/drivers/core/device.c +@@ -421,6 +421,43 @@ fail: + return ret; + } + ++/** ++ * device_get_dma_constraints() - Populate device's DMA constraints ++ * ++ * Gets a device's DMA constraints from firmware. This information is later ++ * used by drivers to translate physcal addresses to the device's bus address ++ * space. For now only device-tree is supported. ++ * ++ * @dev: Pointer to target device ++ * Return: 0 if OK or if no DMA constraints were found, error otherwise ++ */ ++static int device_get_dma_constraints(struct udevice *dev) ++{ ++ struct udevice *parent = dev->parent; ++ phys_addr_t cpu = 0; ++ dma_addr_t bus = 0; ++ u64 size = 0; ++ int ret; ++ ++ if (!CONFIG_IS_ENABLED(DM_DMA) || !parent || !dev_has_ofnode(parent)) ++ return 0; ++ ++ /* ++ * We start parsing for dma-ranges from the device's bus node. This is ++ * specially important on nested buses. ++ */ ++ ret = dev_get_dma_range(parent, &cpu, &bus, &size); ++ /* Don't return an error if no 'dma-ranges' were found */ ++ if (ret && ret != -ENOENT) { ++ dm_warn("%s: failed to get DMA range, %d\n", dev->name, ret); ++ return ret; ++ } ++ ++ dev_set_dma_offset(dev, cpu - bus); ++ ++ return 0; ++} ++ + int device_probe(struct udevice *dev) + { + const struct driver *drv; +@@ -483,6 +520,10 @@ int device_probe(struct udevice *dev) + goto fail; + } + ++ ret = device_get_dma_constraints(dev); ++ if (ret) ++ goto fail; ++ + ret = uclass_pre_probe_device(dev); + if (ret) + goto fail; diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c -index ca34d84922..703bc3e3f5 100644 +index bbe80136ba..5bc6ca1de0 100644 --- a/drivers/core/of_addr.c +++ b/drivers/core/of_addr.c -@@ -325,6 +325,84 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add +@@ -318,6 +318,84 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add return __of_translate_address(dev, in_addr, "dma-ranges"); } @@ -327,10 +433,10 @@ index ca34d84922..703bc3e3f5 100644 const __be32 *addrp, u64 size, unsigned int flags, const char *name, struct resource *r) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c -index a68076bf35..15470d4875 100644 +index 7a5f4c0a73..1463c41c6e 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c -@@ -911,6 +911,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) +@@ -926,6 +926,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) return fdt_translate_dma_address(gd->fdt_blob, ofnode_to_offset(node), in_addr); } @@ -347,10 +453,10 @@ index a68076bf35..15470d4875 100644 { if (ofnode_is_np(node)) diff --git a/drivers/core/read.c b/drivers/core/read.c -index 076125824c..0994fbd979 100644 +index 4d9b5dd038..665424b2ff 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c -@@ -338,6 +338,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) +@@ -340,6 +340,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); } @@ -363,658 +469,85 @@ index 076125824c..0994fbd979 100644 int dev_read_alias_highest_id(const char *stem) { if (of_live_active()) -diff --git a/include/dm/of_addr.h b/include/dm/of_addr.h -index 3fa1ffce81..ee21d5cf4f 100644 ---- a/include/dm/of_addr.h -+++ b/include/dm/of_addr.h -@@ -44,6 +44,23 @@ u64 of_translate_address(const struct device_node *no, const __be32 *in_addr); - */ - u64 of_translate_dma_address(const struct device_node *no, const __be32 *in_addr); - -+ -+/** -+ * of_get_dma_range() - get dma-ranges for a specific DT node -+ * -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - /** - * of_get_address() - obtain an address from a node - * -diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h -index ced7f6ffb2..dc3dd84d9f 100644 ---- a/include/dm/ofnode.h -+++ b/include/dm/ofnode.h -@@ -939,6 +939,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); - */ - u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr); - -+/** -+ * ofnode_get_dma_range() - get dma-ranges for a specific DT node -+ * -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, -+ u64 *size); -+ - /** - * ofnode_device_is_compatible() - check if the node is compatible with compat - * -diff --git a/include/dm/read.h b/include/dm/read.h -index 0585eb1228..46e902c57d 100644 ---- a/include/dm/read.h -+++ b/include/dm/read.h -@@ -664,6 +664,21 @@ u64 dev_translate_address(const struct udevice *dev, const fdt32_t *in_addr); - u64 dev_translate_dma_address(const struct udevice *dev, - const fdt32_t *in_addr); - -+/** -+ * dev_get_dma_range() - Get a device's DMA constraints -+ * -+ * Provide the address bases and size of the linear mapping between the CPU and -+ * a device's BUS address space. -+ * -+ * @dev: device giving the context in which to translate the DMA address -+ * @cpu: base address for CPU's view of memory -+ * @bus: base address for BUS's view of memory -+ * @size: size of the address space -+ * @return 0 if ok, negative on error -+ */ -+int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - /** - * dev_read_alias_highest_id - Get highest alias id for the given stem - * @stem: Alias stem to be examined -@@ -1004,6 +1019,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, - return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); - } - -+static inline int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size) -+{ -+ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); -+} -+ - static inline int dev_read_alias_highest_id(const char *stem) - { - if (!CONFIG_IS_ENABLED(OF_LIBFDT)) -diff --git a/include/fdt_support.h b/include/fdt_support.h -index dbbac0fb6a..46eb1dbbb2 100644 ---- a/include/fdt_support.h -+++ b/include/fdt_support.h -@@ -260,6 +260,20 @@ u64 fdt_translate_address(const void *blob, int node_offset, - u64 fdt_translate_dma_address(const void *blob, int node_offset, - const __be32 *in_addr); - -+/** -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - int fdt_node_offset_by_compat_reg(void *blob, const char *compat, - phys_addr_t compat_off); - int fdt_alloc_phandle(void *blob); --- -2.29.2 - -From ab6897014ee799d5858911aa85d97ded1620f746 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:31 +0100 -Subject: [PATCH 05/13] dm: test: Add test case for dev_get_dma_ranges() - -Introduce some new nodes in sandbox's test device-tree and dm tests in -order to validate dev_get_dma_range(). - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - arch/sandbox/dts/test.dts | 17 ++++++++++++++ - test/dm/Makefile | 1 + - test/dm/read.c | 49 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 67 insertions(+) - create mode 100644 test/dm/read.c - -diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts -index f3b766271d..3a3b51f83b 100644 ---- a/arch/sandbox/dts/test.dts -+++ b/arch/sandbox/dts/test.dts -@@ -292,6 +292,23 @@ - test5-gpios = <&gpio_a 19>; - }; - -+ mmio-bus@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "denx,u-boot-test-bus"; -+ dma-ranges = <0x10000000 0x00000000 0x00040000>; -+ -+ subnode@0 { -+ compatible = "denx,u-boot-fdt-test"; -+ }; -+ }; -+ -+ mmio-bus@1 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "denx,u-boot-test-bus"; -+ }; -+ - acpi_test1: acpi-test { - compatible = "denx,u-boot-acpi-test"; - acpi-ssdt-test-data = "ab"; -diff --git a/test/dm/Makefile b/test/dm/Makefile -index 46e076ed09..5c52d8b6ea 100644 ---- a/test/dm/Makefile -+++ b/test/dm/Makefile -@@ -15,6 +15,7 @@ obj-$(CONFIG_UT_DM) += test-fdt.o - obj-$(CONFIG_UT_DM) += test-uclass.o - - obj-$(CONFIG_UT_DM) += core.o -+obj-$(CONFIG_UT_DM) += read.o - ifneq ($(CONFIG_SANDBOX),) - obj-$(CONFIG_ACPIGEN) += acpi.o - obj-$(CONFIG_ACPIGEN) += acpigen.o -diff --git a/test/dm/read.c b/test/dm/read.c -new file mode 100644 -index 0000000000..7768aa2968 ---- /dev/null -+++ b/test/dm/read.c -@@ -0,0 +1,49 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2020 Nicolas Saenz Julienne -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int dm_test_dma_ranges(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ phys_addr_t cpu; -+ dma_addr_t bus; -+ ofnode node; -+ u64 size; -+ -+ /* dma-ranges are on the device's node */ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); -+ ut_asserteq_64(0x40000, size); -+ ut_asserteq_64(0x0, cpu); -+ ut_asserteq_64(0x10000000, bus); -+ -+ /* dma-ranges are on the bus' node */ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); -+ ut_asserteq_64(0x40000, size); -+ ut_asserteq_64(0x0, cpu); -+ ut_asserteq_64(0x10000000, bus); -+ -+ /* No dma-ranges available */ -+ node = ofnode_path("/mmio-bus@1"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); -+ -+ return 0; -+} -+DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); --- -2.29.2 - -From 1ec61488a9757fbe6a92af3a7595a3f3b63fa298 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:32 +0100 -Subject: [PATCH 06/13] dm: Introduce DMA constraints into the core device - model - -Calculating the DMA offset between a bus address space and CPU's every -time we call phys_to_bus() and bus_to_phys() isn't ideal performance -wise, as it implies traversing the device tree from the device's node up -to the root. Since this information is static and available before the -device's initialization, parse it before the probe call an provide the -DMA offset in 'struct udevice' for the address translation code to use -it. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - drivers/core/Kconfig | 10 ++++++++++ - drivers/core/device.c | 41 +++++++++++++++++++++++++++++++++++++++++ - include/dm/device.h | 13 +++++++++++++ - 3 files changed, 64 insertions(+) - -diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig -index ffae6f9795..295cf2dd00 100644 ---- a/drivers/core/Kconfig -+++ b/drivers/core/Kconfig -@@ -113,6 +113,16 @@ config SPL_DM_SEQ_ALIAS - numbered devices (e.g. serial0 = &serial0). This feature can be - disabled if it is not required, to save code space in SPL. - -+config DM_DMA -+ bool "Support per-device DMA constraints" -+ depends on DM -+ default n -+ help -+ Enable this to extract per-device DMA constraints, only supported on -+ device-tree systems for now. This is needed in order translate -+ addresses on systems where different buses have different views of -+ the physical address space. -+ - config REGMAP - bool "Support register maps" - depends on DM -diff --git a/drivers/core/device.c b/drivers/core/device.c -index 4b3dcb3b37..047032a1dd 100644 ---- a/drivers/core/device.c -+++ b/drivers/core/device.c -@@ -421,6 +421,43 @@ fail: - return ret; - } - -+/** -+ * device_get_dma_constraints() - Populate device's DMA constraints -+ * -+ * Gets a device's DMA constraints from firmware. This information is later -+ * used by drivers to translate physcal addresses to the device's bus address -+ * space. For now only device-tree is supported. -+ * -+ * @dev: Pointer to target device -+ * Return: 0 if OK or if no DMA constraints were found, error otherwise -+ */ -+static int device_get_dma_constraints(struct udevice *dev) -+{ -+ struct udevice *parent = dev->parent; -+ phys_addr_t cpu = 0; -+ dma_addr_t bus = 0; -+ u64 size = 0; -+ int ret; -+ -+ if (!CONFIG_IS_ENABLED(DM_DMA) || !parent || !dev_of_valid(parent)) -+ return 0; -+ -+ /* -+ * We start parsing for dma-ranges from the device's bus node. This is -+ * specially important on nested buses. -+ */ -+ ret = dev_get_dma_range(parent, &cpu, &bus, &size); -+ /* Don't return an error if no 'dma-ranges' were found */ -+ if (ret && ret != -ENOENT) { -+ dm_warn("%s: failed to get DMA range, %d\n", dev->name, ret); -+ return ret; -+ } -+ -+ dev_set_dma_offset(dev, cpu - bus); -+ -+ return 0; -+} -+ - int device_probe(struct udevice *dev) - { - const struct driver *drv; -@@ -482,6 +519,10 @@ int device_probe(struct udevice *dev) - goto fail; - } - -+ ret = device_get_dma_constraints(dev); -+ if (ret) -+ goto fail; -+ - ret = uclass_pre_probe_device(dev); - if (ret) - goto fail; -diff --git a/include/dm/device.h b/include/dm/device.h -index 5bef484247..b27889af01 100644 ---- a/include/dm/device.h -+++ b/include/dm/device.h -@@ -138,6 +138,8 @@ enum { - * When CONFIG_DEVRES is enabled, devm_kmalloc() and friends will - * add to this list. Memory so-allocated will be freed - * automatically when the device is removed / unbound -+ * @dma_offset: Offset between the physical address space (CPU's) and the -+ * device's bus address space - */ - struct udevice { - const struct driver *driver; -@@ -161,6 +163,9 @@ struct udevice { - #ifdef CONFIG_DEVRES - struct list_head devres_head; - #endif -+#if CONFIG_IS_ENABLED(DM_DMA) -+ ulong dma_offset; -+#endif - }; - - /* Maximum sequence number supported */ -@@ -172,6 +177,14 @@ struct udevice { - /* Returns non-zero if the device is active (probed and not removed) */ - #define device_active(dev) ((dev)->flags & DM_FLAG_ACTIVATED) - -+#if CONFIG_IS_ENABLED(DM_DMA) -+#define dev_set_dma_offset(_dev, _offset) _dev->dma_offset = _offset -+#define dev_get_dma_offset(_dev) _dev->dma_offset -+#else -+#define dev_set_dma_offset(_dev, _offset) -+#define dev_get_dma_offset(_dev) 0 -+#endif -+ - static inline int dev_of_offset(const struct udevice *dev) - { - return ofnode_to_offset(dev->node); --- -2.29.2 - -From 78faf21e47d29666ff36d853bbf3bb20508fafce Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:33 +0100 -Subject: [PATCH 07/13] dm: test: Add test case for dev->dma_offset - -Add test to validate dev->dma_offset is properly set on devices. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - arch/sandbox/dts/test.dts | 4 ++++ - configs/sandbox64_defconfig | 1 + - configs/sandbox_defconfig | 1 + - configs/sandbox_flattree_defconfig | 1 + - configs/sandbox_spl_defconfig | 1 + - test/dm/core.c | 30 ++++++++++++++++++++++++++++++ - 6 files changed, 38 insertions(+) - -diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts -index 3a3b51f83b..78f0100282 100644 ---- a/arch/sandbox/dts/test.dts -+++ b/arch/sandbox/dts/test.dts -@@ -307,6 +307,10 @@ - #address-cells = <1>; - #size-cells = <1>; - compatible = "denx,u-boot-test-bus"; -+ -+ subnode@0 { -+ compatible = "denx,u-boot-fdt-test"; -+ }; - }; - - acpi_test1: acpi-test { -diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index 5fbbfd7236..2c189a8a00 100644 ---- a/configs/sandbox64_defconfig -+++ b/configs/sandbox64_defconfig -@@ -94,6 +94,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index f1ec701a9f..ac97c16cef 100644 ---- a/configs/sandbox_defconfig -+++ b/configs/sandbox_defconfig -@@ -108,6 +108,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig -index edca7f1808..f5923bf713 100644 ---- a/configs/sandbox_flattree_defconfig -+++ b/configs/sandbox_flattree_defconfig -@@ -75,6 +75,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig -index 479f0226e3..0a4815770c 100644 ---- a/configs/sandbox_spl_defconfig -+++ b/configs/sandbox_spl_defconfig -@@ -94,6 +94,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y - CONFIG_SPL_DM=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SPL_REGMAP=y - CONFIG_SYSCON=y -diff --git a/test/dm/core.c b/test/dm/core.c -index 6f380a574c..8ca49d09ee 100644 ---- a/test/dm/core.c -+++ b/test/dm/core.c -@@ -1066,3 +1066,33 @@ static int dm_test_inactive_child(struct unit_test_state *uts) - return 0; - } - DM_TEST(dm_test_inactive_child, UT_TESTF_SCAN_PDATA); -+ -+static int dm_test_dma_offset(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ ofnode node; -+ -+ /* Make sure the bus's dma-ranges aren't taken into account here */ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_asserteq_64(0, dev->dma_offset); -+ -+ /* Device behind a bus with dma-ranges */ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_64(-0x10000000ULL, dev->dma_offset); -+ -+ /* This one has no dma-ranges */ -+ node = ofnode_path("/mmio-bus@1"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ node = ofnode_path("/mmio-bus@1/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_64(0, dev->dma_offset); -+ -+ return 0; -+} -+DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); --- -2.29.2 - -From f77b6417252d77112b63202f3b63b778bc8de117 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:34 +0100 -Subject: [PATCH 08/13] dm: Introduce dev_phys_to_bus()/dev_bus_to_phys() - -These functions, instead of relying on hard-coded platform-specific -address translations, make use of the DMA constraints provided by the DM -core. This allows for per-device translations. - -We can't yet get rid of the legacy phys_to_bus()/bus_to_phys() -implementations as some of its users are not integrated into the -device model. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass -Reviewed-by: Stefan Roese ---- - include/phys2bus.h | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/include/phys2bus.h b/include/phys2bus.h -index dc9b8e5a25..866b8b51a8 100644 ---- a/include/phys2bus.h -+++ b/include/phys2bus.h -@@ -21,4 +21,21 @@ static inline unsigned long bus_to_phys(unsigned long bus) - } - #endif - -+#if CONFIG_IS_ENABLED(DM) -+#include -+ -+static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, phys_addr_t phys) -+{ -+ return phys - dev_get_dma_offset(dev); -+} -+ -+static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, dma_addr_t bus) -+{ -+ return bus + dev_get_dma_offset(dev); -+} -+#else -+#define dev_phys_to_bus(_, _addr) _addr -+#define dev_bus_to_phys(_, _addr) _addr -+#endif -+ - #endif --- -2.29.2 - -From bf9d354942113252ef74c0a6394d71fb52d4325b Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:35 +0100 -Subject: [PATCH 09/13] dm: test: Add test case for - dev_phys_to_bus()/dev_bus_to_phys() - -By reusing DT nodes already available in sandbox's test DT introduce a -test to validate dev_phys_to_bus()/dev_bus_to_phys(). - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - test/dm/Makefile | 1 + - test/dm/phys2bus.c | 37 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - create mode 100644 test/dm/phys2bus.c - -diff --git a/test/dm/Makefile b/test/dm/Makefile -index 5c52d8b6ea..ac86abaa88 100644 ---- a/test/dm/Makefile -+++ b/test/dm/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_UT_DM) += test-uclass.o - - obj-$(CONFIG_UT_DM) += core.o - obj-$(CONFIG_UT_DM) += read.o -+obj-$(CONFIG_UT_DM) += phys2bus.o - ifneq ($(CONFIG_SANDBOX),) - obj-$(CONFIG_ACPIGEN) += acpi.o - obj-$(CONFIG_ACPIGEN) += acpigen.o -diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c -new file mode 100644 -index 0000000000..342f2fa8eb ---- /dev/null -+++ b/test/dm/phys2bus.c -@@ -0,0 +1,37 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2020 Nicolas Saenz Julienne -+ */ -+ -+#include -+#include -+#include +diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c +index 0628934312..62e4f53b8b 100644 +--- a/drivers/mmc/sdhci.c ++++ b/drivers/mmc/sdhci.c +@@ -14,12 +14,12 @@ + #include + #include + #include +#include -+#include -+#include -+#include -+#include -+#include -+#include + #include + #include + #include + #include + #include +-#include + + static void sdhci_reset(struct sdhci_host *host, u8 mask) + { +@@ -73,6 +73,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) + static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, + int *is_aligned, int trans_bytes) + { ++ dma_addr_t dma_addr; + unsigned char ctrl; + void *buf; + +@@ -103,8 +104,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, + mmc_get_dma_dir(data)); + + if (host->flags & USE_SDMA) { +- sdhci_writel(host, phys_to_bus((ulong)host->start_addr), +- SDHCI_DMA_ADDRESS); ++ dma_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), host->start_addr); ++ sdhci_writel(host, dma_addr, SDHCI_DMA_ADDRESS); + } + #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) + else if (host->flags & (USE_ADMA | USE_ADMA64)) { +@@ -162,8 +163,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) + start_addr &= + ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); + start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; +- sdhci_writel(host, phys_to_bus((ulong)start_addr), +- SDHCI_DMA_ADDRESS); ++ start_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), ++ start_addr); ++ sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); + } + } + if (timeout-- > 0) +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +index dd2a4ef629..bd645d7896 100644 +--- a/drivers/pci/pcie_brcmstb.c ++++ b/drivers/pci/pcie_brcmstb.c +@@ -432,6 +432,7 @@ static int brcm_pcie_probe(struct udevice *dev) + struct pci_controller *hose = dev_get_uclass_priv(ctlr); + struct brcm_pcie *pcie = dev_get_priv(dev); + void __iomem *base = pcie->base; ++ struct pci_region region; + bool ssc_good = false; + int num_out_wins = 0; + u64 rc_bar2_offset, rc_bar2_size; +@@ -468,13 +469,10 @@ static int brcm_pcie_probe(struct udevice *dev) + MISC_CTRL_SCB_ACCESS_EN_MASK | + MISC_CTRL_CFG_READ_UR_MODE_MASK | + MISC_CTRL_MAX_BURST_SIZE_128); +- /* +- * TODO: When support for other SoCs than BCM2711 is added we may +- * need to use the base address and size(s) provided in the dma-ranges +- * property. +- */ +- rc_bar2_offset = 0; +- rc_bar2_size = 0xc0000000; + -+static int dm_test_phys_to_bus(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ ofnode node; -+ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ /* In this case it should be transparent, no dma-ranges in parent bus */ -+ ut_asserteq_addr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); -+ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_addr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); -+ -+ return 0; -+} -+DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); --- -2.29.2 - -From 8abe749ff354a369f748c06aa70711bcdea9e61c Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 28 Dec 2020 21:38:37 +0000 -Subject: [PATCH 10/13] xhci: translate virtual addresses into the bus's - address space - -So far we've been content with passing physical addresses when -configuring memory addresses into XHCI controllers, but not all -platforms have buses with transparent mappings. Specifically the -Raspberry Pi 4 might introduce an offset to memory accesses incoming -from its PCIe port. - -Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these -limitations, and make sure we don't break non DM users. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass -Reviewed-by: Stefan Roese -Signed-off-by: Peter Robinson ---- - drivers/usb/host/xhci-mem.c | 45 +++++++++++++++++++----------------- - drivers/usb/host/xhci-ring.c | 13 +++++++---- - drivers/usb/host/xhci.c | 4 ++-- - include/usb/xhci.h | 20 +++++++++++++++- - 4 files changed, 53 insertions(+), 29 deletions(-) - ++ pci_get_dma_regions(dev, ®ion, 0); ++ rc_bar2_offset = region.bus_start - region.phys_start; ++ rc_bar2_size = 1ULL << fls64(region.size - 1); + + tmp = lower_32_bits(rc_bar2_offset); + u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index b002d6f166..83147d51b5 100644 --- a/drivers/usb/host/xhci-mem.c @@ -1258,6 +791,218 @@ index 7080f8fabe..d27ac01c83 100644 ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 | virt_dev->eps[ep_index].ring->cycle_state); +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index 9326999cd3..c2962932c9 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -52,6 +52,7 @@ static int bcm2835_video_probe(struct udevice *dev) + + static const struct udevice_id bcm2835_video_ids[] = { + { .compatible = "brcm,bcm2835-hdmi" }, ++ { .compatible = "brcm,bcm2711-hdmi0" }, + { .compatible = "brcm,bcm2708-fb" }, + { } + }; +diff --git a/include/dm/device.h b/include/dm/device.h +index e665558444..b614ff1a69 100644 +--- a/include/dm/device.h ++++ b/include/dm/device.h +@@ -148,6 +148,8 @@ enum { + * When CONFIG_DEVRES is enabled, devm_kmalloc() and friends will + * add to this list. Memory so-allocated will be freed + * automatically when the device is removed / unbound ++ * @dma_offset: Offset between the physical address space (CPU's) and the ++ * device's bus address space + */ + struct udevice { + const struct driver *driver; +@@ -172,6 +174,9 @@ struct udevice { + #ifdef CONFIG_DEVRES + struct list_head devres_head; + #endif ++#if CONFIG_IS_ENABLED(DM_DMA) ++ ulong dma_offset; ++#endif + }; + + /* Maximum sequence number supported */ +@@ -213,6 +218,14 @@ static inline ofnode dev_ofnode(const struct udevice *dev) + /* Returns non-zero if the device is active (probed and not removed) */ + #define device_active(dev) (dev_get_flags(dev) & DM_FLAG_ACTIVATED) + ++#if CONFIG_IS_ENABLED(DM_DMA) ++#define dev_set_dma_offset(_dev, _offset) _dev->dma_offset = _offset ++#define dev_get_dma_offset(_dev) _dev->dma_offset ++#else ++#define dev_set_dma_offset(_dev, _offset) ++#define dev_get_dma_offset(_dev) 0 ++#endif ++ + static inline int dev_of_offset(const struct udevice *dev) + { + #if !CONFIG_IS_ENABLED(OF_PLATDATA) +diff --git a/include/dm/of_addr.h b/include/dm/of_addr.h +index 3fa1ffce81..ee21d5cf4f 100644 +--- a/include/dm/of_addr.h ++++ b/include/dm/of_addr.h +@@ -44,6 +44,23 @@ u64 of_translate_address(const struct device_node *no, const __be32 *in_addr); + */ + u64 of_translate_dma_address(const struct device_node *no, const __be32 *in_addr); + ++ ++/** ++ * of_get_dma_range() - get dma-ranges for a specific DT node ++ * ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + /** + * of_get_address() - obtain an address from a node + * +diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h +index 5b088650d3..c4680fbbaa 100644 +--- a/include/dm/ofnode.h ++++ b/include/dm/ofnode.h +@@ -996,6 +996,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); + */ + u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr); + ++/** ++ * ofnode_get_dma_range() - get dma-ranges for a specific DT node ++ * ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, ++ u64 *size); ++ + /** + * ofnode_device_is_compatible() - check if the node is compatible with compat + * +diff --git a/include/dm/read.h b/include/dm/read.h +index 03ba98232a..da3763d245 100644 +--- a/include/dm/read.h ++++ b/include/dm/read.h +@@ -647,6 +647,21 @@ u64 dev_translate_address(const struct udevice *dev, const fdt32_t *in_addr); + u64 dev_translate_dma_address(const struct udevice *dev, + const fdt32_t *in_addr); + ++/** ++ * dev_get_dma_range() - Get a device's DMA constraints ++ * ++ * Provide the address bases and size of the linear mapping between the CPU and ++ * a device's BUS address space. ++ * ++ * @dev: device giving the context in which to translate the DMA address ++ * @cpu: base address for CPU's view of memory ++ * @bus: base address for BUS's view of memory ++ * @size: size of the address space ++ * @return 0 if ok, negative on error ++ */ ++int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + /** + * dev_read_alias_highest_id - Get highest alias id for the given stem + * @stem: Alias stem to be examined +@@ -1004,6 +1019,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, + return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); + } + ++static inline int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size) ++{ ++ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); ++} ++ + static inline int dev_read_alias_highest_id(const char *stem) + { + if (!CONFIG_IS_ENABLED(OF_LIBFDT) || !gd->fdt_blob) +diff --git a/include/fdt_support.h b/include/fdt_support.h +index dbbac0fb6a..46eb1dbbb2 100644 +--- a/include/fdt_support.h ++++ b/include/fdt_support.h +@@ -260,6 +260,20 @@ u64 fdt_translate_address(const void *blob, int node_offset, + u64 fdt_translate_dma_address(const void *blob, int node_offset, + const __be32 *in_addr); + ++/** ++ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and ++ * cpu->bus address translations ++ * ++ * @param blob Pointer to device tree blob ++ * @param node_offset Node DT offset ++ * @param cpu Pointer to variable storing the range's cpu address ++ * @param bus Pointer to variable storing the range's bus address ++ * @param size Pointer to variable storing the range's size ++ * @return translated DMA address or OF_BAD_ADDR on error ++ */ ++int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, ++ dma_addr_t *bus, u64 *size); ++ + int fdt_node_offset_by_compat_reg(void *blob, const char *compat, + phys_addr_t compat_off); + int fdt_alloc_phandle(void *blob); +diff --git a/include/mmc.h b/include/mmc.h +index 1d377e0281..c12c7a0b5c 100644 +--- a/include/mmc.h ++++ b/include/mmc.h +@@ -736,6 +736,12 @@ struct mmc { + u8 hs400_tuning; + }; + ++#if CONFIG_IS_ENABLED(DM_MMC) ++#define mmc_to_dev(_mmc) _mmc->dev ++#else ++#define mmc_to_dev(_mmc) NULL ++#endif ++ + struct mmc_hwpart_conf { + struct { + uint enh_start; /* in 512-byte sectors */ +diff --git a/include/phys2bus.h b/include/phys2bus.h +index dc9b8e5a25..866b8b51a8 100644 +--- a/include/phys2bus.h ++++ b/include/phys2bus.h +@@ -21,4 +21,21 @@ static inline unsigned long bus_to_phys(unsigned long bus) + } + #endif + ++#if CONFIG_IS_ENABLED(DM) ++#include ++ ++static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, phys_addr_t phys) ++{ ++ return phys - dev_get_dma_offset(dev); ++} ++ ++static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, dma_addr_t bus) ++{ ++ return bus + dev_get_dma_offset(dev); ++} ++#else ++#define dev_phys_to_bus(_, _addr) _addr ++#define dev_bus_to_phys(_, _addr) _addr ++#endif ++ + #endif diff --git a/include/usb/xhci.h b/include/usb/xhci.h index e1d382369a..8d95e213b0 100644 --- a/include/usb/xhci.h @@ -1308,176 +1053,155 @@ index e1d382369a..8d95e213b0 100644 +} + #endif /* HOST_XHCI_H_ */ --- -2.29.2 - -From aa7e82f97e2c74430a3a6979b307cda87fbb4624 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:37 +0100 -Subject: [PATCH 11/13] mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys() - -This will allow us to use DM variants of phys_to_bus()/bus_to_phys() -when relevant. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - drivers/mmc/sdhci.c | 12 +++++++----- - include/mmc.h | 6 ++++++ - 2 files changed, 13 insertions(+), 5 deletions(-) - -diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 0628934312..62e4f53b8b 100644 ---- a/drivers/mmc/sdhci.c -+++ b/drivers/mmc/sdhci.c -@@ -14,12 +14,12 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include --#include +diff --git a/test/dm/Makefile b/test/dm/Makefile +index e70e50f402..6275ec56ea 100644 +--- a/test/dm/Makefile ++++ b/test/dm/Makefile +@@ -15,6 +15,8 @@ obj-$(CONFIG_UT_DM) += test-fdt.o + obj-$(CONFIG_UT_DM) += test-uclass.o - static void sdhci_reset(struct sdhci_host *host, u8 mask) - { -@@ -73,6 +73,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) - static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, - int *is_aligned, int trans_bytes) - { -+ dma_addr_t dma_addr; - unsigned char ctrl; - void *buf; - -@@ -103,8 +104,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, - mmc_get_dma_dir(data)); - - if (host->flags & USE_SDMA) { -- sdhci_writel(host, phys_to_bus((ulong)host->start_addr), -- SDHCI_DMA_ADDRESS); -+ dma_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), host->start_addr); -+ sdhci_writel(host, dma_addr, SDHCI_DMA_ADDRESS); - } - #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) - else if (host->flags & (USE_ADMA | USE_ADMA64)) { -@@ -162,8 +163,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) - start_addr &= - ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); - start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; -- sdhci_writel(host, phys_to_bus((ulong)start_addr), -- SDHCI_DMA_ADDRESS); -+ start_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), -+ start_addr); -+ sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); - } - } - if (timeout-- > 0) -diff --git a/include/mmc.h b/include/mmc.h -index 1d377e0281..c12c7a0b5c 100644 ---- a/include/mmc.h -+++ b/include/mmc.h -@@ -736,6 +736,12 @@ struct mmc { - u8 hs400_tuning; - }; - -+#if CONFIG_IS_ENABLED(DM_MMC) -+#define mmc_to_dev(_mmc) _mmc->dev -+#else -+#define mmc_to_dev(_mmc) NULL -+#endif + obj-$(CONFIG_UT_DM) += core.o ++obj-$(CONFIG_UT_DM) += read.o ++obj-$(CONFIG_UT_DM) += phys2bus.o + ifneq ($(CONFIG_SANDBOX),) + obj-$(CONFIG_ACPIGEN) += acpi.o + obj-$(CONFIG_ACPIGEN) += acpigen.o +diff --git a/test/dm/core.c b/test/dm/core.c +index 1f5ca570dc..855449aac2 100644 +--- a/test/dm/core.c ++++ b/test/dm/core.c +@@ -1085,3 +1085,33 @@ static int dm_test_all_have_seq(struct unit_test_state *uts) + return 0; + } + DM_TEST(dm_test_all_have_seq, UT_TESTF_SCAN_PDATA); + - struct mmc_hwpart_conf { - struct { - uint enh_start; /* in 512-byte sectors */ --- -2.29.2 - -From 8b39240ca809ce7ebf34b2eb707ab5d2cc5f4a20 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:38 +0100 -Subject: [PATCH 12/13] configs: rpi4: Enable DM_DMA across all RPi4 - configurations - -The DM_DMA option is needed in order to translate physical address into -bus addresses on a per-device basis. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Simon Glass ---- - configs/rpi_4_32b_defconfig | 1 + - configs/rpi_4_defconfig | 1 + - configs/rpi_arm64_defconfig | 1 + - 3 files changed, 3 insertions(+) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 5ddd838fd5..0a5d3ff8cd 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DFU_MMC=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 2590d0a696..b61cdc05f1 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DFU_MMC=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 2639219a1a..4125a1feba 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -20,6 +20,7 @@ CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y - CONFIG_MMC_SDHCI=y --- -2.29.2 - -From d3cde4c05b8da7ef50019b63ac9cc0ecc0630059 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 23 Dec 2020 19:55:39 +0100 -Subject: [PATCH 13/13] video: arm: rpi: Add brcm,bcm2711-hdmi0 compatible - -The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of -'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6 -instead of VC4). This has no functional change as far as u-boot driver -is concerned. So simply add the compatible string. - -Signed-off-by: Nicolas Saenz Julienne ---- - drivers/video/bcm2835.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index 0888cb0019..51941c4f53 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -52,6 +52,7 @@ static int bcm2835_video_probe(struct udevice *dev) - - static const struct udevice_id bcm2835_video_ids[] = { - { .compatible = "brcm,bcm2835-hdmi" }, -+ { .compatible = "brcm,bcm2711-hdmi0" }, - { .compatible = "brcm,bcm2708-fb" }, - { } - }; ++static int dm_test_dma_offset(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ ofnode node; ++ ++ /* Make sure the bus's dma-ranges aren't taken into account here */ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_asserteq_64(0, dev->dma_offset); ++ ++ /* Device behind a bus with dma-ranges */ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_64(-0x10000000ULL, dev->dma_offset); ++ ++ /* This one has no dma-ranges */ ++ node = ofnode_path("/mmio-bus@1"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ node = ofnode_path("/mmio-bus@1/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_64(0, dev->dma_offset); ++ ++ return 0; ++} ++DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c +new file mode 100644 +index 0000000000..342f2fa8eb +--- /dev/null ++++ b/test/dm/phys2bus.c +@@ -0,0 +1,37 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int dm_test_phys_to_bus(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ ofnode node; ++ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ /* In this case it should be transparent, no dma-ranges in parent bus */ ++ ut_asserteq_addr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); ++ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_asserteq_addr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); ++ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); ++ ++ return 0; ++} ++DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +diff --git a/test/dm/read.c b/test/dm/read.c +new file mode 100644 +index 0000000000..7768aa2968 +--- /dev/null ++++ b/test/dm/read.c +@@ -0,0 +1,49 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int dm_test_dma_ranges(struct unit_test_state *uts) ++{ ++ struct udevice *dev; ++ phys_addr_t cpu; ++ dma_addr_t bus; ++ ofnode node; ++ u64 size; ++ ++ /* dma-ranges are on the device's node */ ++ node = ofnode_path("/mmio-bus@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_asserteq_64(0x40000, size); ++ ut_asserteq_64(0x0, cpu); ++ ut_asserteq_64(0x10000000, bus); ++ ++ /* dma-ranges are on the bus' node */ ++ node = ofnode_path("/mmio-bus@0/subnode@0"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); ++ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ut_asserteq_64(0x40000, size); ++ ut_asserteq_64(0x0, cpu); ++ ut_asserteq_64(0x10000000, bus); ++ ++ /* No dma-ranges available */ ++ node = ofnode_path("/mmio-bus@1"); ++ ut_assert(ofnode_valid(node)); ++ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); ++ ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); ++ ++ return 0; ++} ++DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- 2.29.2 diff --git a/aarch64-boards b/aarch64-boards index c568d46..1d81436 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -2,6 +2,7 @@ a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 +beelink_gs1 dragonboard410c dragonboard820c espresso7420 @@ -33,13 +34,16 @@ nanopi-m4-rk3399 nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 +nanopi-r2s-rk3328 odroid-c2 +orangepi_3 orangepi_lite2 orangepi_one_plus orangepi_pc2 orangepi_prime orangepi-rk3399 orangepi_win +orangepi_zero2 orangepi_zero_plus orangepi_zero_plus2 p212 @@ -69,6 +73,7 @@ rpi_3 rpi_4 rpi_arm64 sopine_baseboard +tanix_tx6 teres_i turris_mox vexpress_aemv8a_juno diff --git a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch deleted file mode 100644 index 3aef1a9..0000000 --- a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch +++ /dev/null @@ -1,135 +0,0 @@ -From 5cb3ca7ebd46c1983d0929b5ba027a03c1f5e51e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 16 Dec 2020 15:22:34 +0000 -Subject: [PATCH 1/2] arm: dts: rockchip: rk3399: enable rng at the SoC level - -The rng is embedded in the SoC so enable it in the device tree -universally, the use of it can be controlled by enabling/disabling -at the device config level. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-evb-u-boot.dtsi | 4 ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ---- - arch/arm/dts/rk3399-u-boot.dtsi | 2 +- - 4 files changed, 1 insertion(+), 13 deletions(-) - -diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi -index 8056dc843e..398b205ec2 100644 ---- a/arch/arm/dts/rk3399-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi -@@ -13,10 +13,6 @@ - }; - }; - --&rng { -- status = "okay"; --}; -- - &i2c0 { - u-boot,dm-pre-reloc; - }; -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index ded7db0aef..c3e866a779 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -28,10 +28,6 @@ - u-boot,dm-pre-reloc; - }; - --&rng { -- status = "okay"; --}; -- - &sdhci { - max-frequency = <25000000>; - u-boot,dm-pre-reloc; -diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index 6317b47e41..37dff04adf 100644 ---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -15,10 +15,6 @@ - }; - }; - --&rng { -- status = "okay"; --}; -- - &spi1 { - spi_flash: flash@0 { - u-boot,dm-pre-reloc; -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index ecd230c720..73922c328a 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -32,7 +32,7 @@ - rng: rng@ff8b8000 { - compatible = "rockchip,cryptov1-rng"; - reg = <0x0 0xff8b8000 0x0 0x1000>; -- status = "disabled"; -+ status = "okay"; - }; - - dmc: dmc { --- -2.29.2 - -From 62093137fcbe760d009cf2757feda7ccf328fbb7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 16 Dec 2020 15:37:21 +0000 -Subject: [PATCH 2/2] configs: rk3399: enable rng on firefly/rock960/rockpro64 - -Enable the RNG on the Firefly, rock960 and RockPro64 devices -to enable KASLR on devices that support it. - -Signed-off-by: Peter Robinson ---- - configs/firefly-rk3399_defconfig | 2 ++ - configs/rock960-rk3399_defconfig | 2 ++ - configs/rockpro64-rk3399_defconfig | 2 ++ - 3 files changed, 6 insertions(+) - -diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index c453b82dc5..cfbaae40aa 100644 ---- a/configs/firefly-rk3399_defconfig -+++ b/configs/firefly-rk3399_defconfig -@@ -35,6 +35,8 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 65dce3cd73..aadbc55f57 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -39,6 +39,8 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_NVME=y - CONFIG_PCI=y -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index 575b7a20d5..f78dfcc8f7 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -42,6 +42,8 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_DM_ETH=y --- -2.29.2 - diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch index 1851fcd..8a5835e 100644 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -1,97 +1,64 @@ -From patchwork Fri Nov 20 13:24:22 2020 -Content-Type: text/plain; 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Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132823.638207109@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:22 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 1/9] rockchip: video: vop: Use endpoint compatible string - to find VOP mode -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean +From b90e9d3eeded9b10be1076ccbf2a3fac55cf3e74 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 1 Feb 2021 21:14:44 +0000 +Subject: [PATCH] rk3399 Pinebook pro EDP support -The current code is using an hard coded enum and the of node reg value of -endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order -is different between rk3288, rk3399 vop little, rk3399 vop big. +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 + + .../include/asm/arch-rockchip/edp_rk3288.h | 9 +- + .../include/asm/arch-rockchip/vop_rk3288.h | 15 +-- + drivers/pwm/rk_pwm.c | 2 +- + drivers/video/rockchip/rk_edp.c | 103 +++++++++++++++--- + drivers/video/rockchip/rk_vop.c | 86 ++++++++++++++- + 6 files changed, 177 insertions(+), 42 deletions(-) -A possible solution would be to make sure that the rk3288.dtsi and -rk3399.dtsi files have "expected" reg value or an other solution is -to find the kind of endpoint by comparing the endpoint compatible value. - -This patch is implementing the more flexible second solution. - -Signed-off-by: Arnaud Patard - -Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index 1eafb40ce3..2d87bea933 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -16,6 +16,10 @@ + }; + }; + ++&edp { ++ rockchip,panel = <&edp_panel>; ++}; ++ + &i2c0 { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +index 94e5bb674f..9559813e52 100644 +--- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h ++++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); + #define PD_CH0 (0x1 << 0) + + /* pll_reg_1 */ +-#define REF_CLK_24M (0x1 << 1) +-#define REF_CLK_27M (0x0 << 1) ++#define REF_CLK_24M (0x1 << 0) ++#define REF_CLK_27M (0x0 << 0) ++#define REF_CLK_MASK (0x1 << 0) + + /* line_map */ + #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) +@@ -296,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); + + /* int_ctl */ + #define SOFT_INT_CTRL (0x1 << 2) +-#define INT_POL (0x1 << 0) ++#define INT_POL1 (0x1 << 1) ++#define INT_POL0 (0x1 << 0) ++#define INT_POL (INT_POL0 | INT_POL1) + + /* sys_ctl_1 */ + #define DET_STA (0x1 << 2) +diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +index 52446e97c6..49a7141437 100644 +--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h ++++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h @@ -85,26 +85,13 @@ enum { LB_RGB_1280X8 = 0x5 }; @@ -120,148 +87,35 @@ Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h /* VOP_VERSION_INFO */ #define M_FPGA_VERSION (0xffff << 16) -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -235,12 +235,11 @@ static int rk_display_init(struct udevic - struct clk clk; - enum video_log2_bpp l2bpp; - ofnode remote; -+ const char *compat; +diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c +index a64fc4a052..d4b9ebe528 100644 +--- a/drivers/pwm/rk_pwm.c ++++ b/drivers/pwm/rk_pwm.c +@@ -146,7 +146,7 @@ static int rk_pwm_probe(struct udevice *dev) + priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); - debug("%s(%s, %lu, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); + if (priv->data->supports_polarity) +- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; ++ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; -- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); -- debug("vop_id=%d\n", vop_id); - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - if (ret) - return ret; -@@ -282,6 +281,28 @@ static int rk_display_init(struct udevic - if (disp) - break; - }; -+ compat = ofnode_get_property(remote, "compatible", NULL); -+ if (!compat) { -+ debug("%s(%s): Failed to find compatible property\n", -+ __func__, dev_read_name(dev)); -+ return -EINVAL; -+ } -+ if (strstr(compat, "edp")) { -+ vop_id = VOP_MODE_EDP; -+ } else if (strstr(compat, "mipi")) { -+ vop_id = VOP_MODE_MIPI; -+ } else if (strstr(compat, "hdmi")) { -+ vop_id = VOP_MODE_HDMI; -+ } else if (strstr(compat, "cdn-dp")) { -+ vop_id = VOP_MODE_DP; -+ } else if (strstr(compat, "lvds")) { -+ vop_id = VOP_MODE_LVDS; -+ } else { -+ debug("%s(%s): Failed to find vop mode for %s\n", -+ __func__, dev_read_name(dev), compat); -+ return -EINVAL; -+ } -+ debug("vop_id=%d\n", vop_id); - - disp_uc_plat = dev_get_uclass_platdata(disp); - debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); - -From patchwork Fri Nov 20 13:24:23 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403700 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcyC43w72z9sTv - for ; Sat, 21 Nov 2020 00:32:16 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id F3481825F6; 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- spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 39BC31807FD; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132823.697547510@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:23 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 2/9] rockchip: video: edp: Add rk3399 support -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP -support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 -eDP IPs are nearly the same, the difference is in the grf register -(SOC_CON6 versus SOC_CON20). So, change the code to use the right -register on each IP. - -The clocks don't seem to be the same, the eDP clock is not at index 1 -on rk3399, so don't try changing the clock at index 1 to rate 0 on -rk3399. - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -17,11 +17,10 @@ + return 0; + } +diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c +index 0be60e169e..0ddf5e02d6 100644 +--- a/drivers/video/rockchip/rk_edp.c ++++ b/drivers/video/rockchip/rk_edp.c +@@ -8,20 +8,21 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #include #include #include #include @@ -275,7 +129,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c #define MAX_CR_LOOP 5 #define MAX_EQ_LOOP 5 -@@ -37,18 +36,42 @@ static const char * const pre_emph_names +@@ -37,18 +38,42 @@ static const char * const pre_emph_names[] = { #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 @@ -321,27 +175,49 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | V2L_CUR_SEL_1MA, ®s->pll_reg_2); -@@ -1029,6 +1052,8 @@ static int rk_edp_probe(struct udevice * - struct display_plat *uc_plat = dev_get_uclass_platdata(dev); +@@ -1029,6 +1054,9 @@ static int rk_edp_probe(struct udevice *dev) + struct display_plat *uc_plat = dev_get_uclass_plat(dev); struct rk_edp_priv *priv = dev_get_priv(dev); struct rk3288_edp *regs = priv->regs; + struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); ++ struct reset_ctl dp_rst; + struct clk clk; int ret; -@@ -1043,16 +1068,17 @@ static int rk_edp_probe(struct udevice * - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); +@@ -1040,19 +1068,39 @@ static int rk_edp_probe(struct udevice *dev) + return ret; + } + +- int vop_id = uc_plat->source_id; +- debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); ++ ret = reset_get_by_name(dev, "dp", &dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); ++ return ret; ++ } - ret = clk_get_by_index(dev, 1, &clk); - if (ret >= 0) { - ret = clk_set_rate(&clk, 0); - clk_free(&clk); -- } -- if (ret) { ++ ret = reset_assert(&dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); ++ return ret; + } ++ udelay(20); ++ ++ ret = reset_deassert(&dp_rst); + if (ret) { - debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -- return ret; ++ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); + return ret; + } + ++ int vop_id = uc_plat->source_id; ++ debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); ++ + if (edp_data->chip_type == RK3288_DP) { + ret = clk_get_by_index(dev, 1, &clk); + if (ret >= 0) { @@ -352,12 +228,11 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c + debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + return ret; + } - } -- ++ } ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); if (ret >= 0) { ret = clk_set_rate(&clk, 192000000); -@@ -1065,15 +1091,17 @@ static int rk_edp_probe(struct udevice * +@@ -1065,15 +1113,17 @@ static int rk_edp_probe(struct udevice *dev) } /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ @@ -379,7 +254,7 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c rk_edp_init_interrupt(regs); rk_edp_enable_sw_function(regs); ret = rk_edp_init_analog_func(regs); -@@ -1089,8 +1117,25 @@ static const struct dm_display_ops dp_ro +@@ -1089,8 +1139,25 @@ static const struct dm_display_ops dp_rockchip_ops = { .enable = rk_edp_enable, }; @@ -406,753 +281,10 @@ Index: u-boot/drivers/video/rockchip/rk_edp.c { } }; -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - #define PD_CH0 (0x1 << 0) - - /* pll_reg_1 */ --#define REF_CLK_24M (0x1 << 1) --#define REF_CLK_27M (0x0 << 1) -+#define REF_CLK_24M (0x1 << 0) -+#define REF_CLK_27M (0x0 << 0) -+#define REF_CLK_MASK (0x1 << 0) - - /* line_map */ - #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) - -From patchwork Fri Nov 20 13:24:24 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403694 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Change the configuration to match the -linux configuration - -Signed-off-by: Arnaud Patard - -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - - /* int_ctl */ - #define SOFT_INT_CTRL (0x1 << 2) --#define INT_POL (0x1 << 0) -+#define INT_POL1 (0x1 << 1) -+#define INT_POL0 (0x1 << 0) -+#define INT_POL (INT_POL0 | INT_POL1) - - /* sys_ctl_1 */ - #define DET_STA (0x1 << 2) - -From patchwork Fri Nov 20 13:24:25 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403697 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 20 Nov 2020 14:29:54 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, - URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org - [IPv6:2001:bc8:3430:1000::c0f:fee]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id BBD6B82591 - for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 6ED14180A47; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132823.799855386@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:25 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 4/9] ockchip: video: vop: Reserve efi fb memory -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -When booting with EFI and graphics, the memory used for framebuffer -has to be reserved, otherwise it may leads to kernel memory -overwrite. - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -20,6 +20,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -394,6 +396,13 @@ int rk_vop_probe(struct udevice *dev) - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - -+ plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; -+ -+#if defined(CONFIG_EFI_LOADER) -+ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); -+ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); -+#endif -+ - priv->regs = (struct rk3288_vop *)dev_read_addr(dev); - - /* - -From patchwork Fri Nov 20 13:24:26 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403695 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Ccy9V13SHz9sTL - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 7FA88180A70; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132823.849890740@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:26 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 5/9] rockchip: Pinebook Pro: Enable edp -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -- uboot rockchip edp code is looking for a rockchip,panel property - for the edp dts node, so add it. - -Signed-off-by: Arnaud Patard - -Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -=================================================================== ---- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -20,6 +20,10 @@ - }; - }; - -+&edp { -+ rockchip,panel = <&edp_panel>; -+}; -+ - &i2c0 { - u-boot,dm-pre-reloc; - }; - -From patchwork Fri Nov 20 13:24:27 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403696 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4Ccy9w51kSz9sT6 - for ; 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It's -only the hardware default. This leads to booting linux with -wrong polarity setting. - -Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE -by default instead. - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/pwm/rk_pwm.c -=================================================================== ---- u-boot.orig/drivers/pwm/rk_pwm.c -+++ u-boot/drivers/pwm/rk_pwm.c -@@ -146,7 +146,7 @@ static int rk_pwm_probe(struct udevice * - priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); - - if (priv->data->supports_polarity) -- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; -+ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; - - return 0; - } - -From patchwork Fri Nov 20 13:24:28 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403702 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 20 Nov 2020 14:30:06 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, - URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id F3045825AA - for ; Fri, 20 Nov 2020 14:29:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id B6F29180ACB; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132823.962072859@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:28 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 7/9] rockchip: video: vop: Fix format of fbbase in debug - string -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -The debug string printing the device name, framebuffer address and of node -is using %lu as format for the framebuffer address, which is not so nice. -Change it to %lx. - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -239,7 +239,7 @@ static int rk_display_init(struct udevic - ofnode remote; - const char *compat; - -- debug("%s(%s, %lu, %s)\n", __func__, -+ debug("%s(%s, %lx, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - -From patchwork Fri Nov 20 13:24:29 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403698 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CcyBb1882z9sT6 - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id E02FE180ACE; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132824.012845278@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:29 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 8/9] rockchip: video: edp: Add missing reset support -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the eDP registers are in correct state, -add missing support for the eDP reset lines found in the device-tree. - - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -8,11 +8,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -1053,6 +1055,7 @@ static int rk_edp_probe(struct udevice * - struct rk_edp_priv *priv = dev_get_priv(dev); - struct rk3288_edp *regs = priv->regs; - struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ struct reset_ctl dp_rst; - - struct clk clk; - int ret; -@@ -1065,6 +1068,25 @@ static int rk_edp_probe(struct udevice * - return ret; - } - -+ ret = reset_get_by_name(dev, "dp", &dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ ret = reset_assert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - - -From patchwork Fri Nov 20 13:24:30 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1403699 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 20 Nov 2020 14:29:58 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, - URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org - [IPv6:2001:bc8:3430:1000::c0f:fee]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 29B89825A4 - for ; Fri, 20 Nov 2020 14:29:45 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 0EC35180AF9; Fri, 20 Nov 2020 14:29:43 +0100 (CET) -Message-ID: <20201120132824.063180167@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 20 Nov 2020 14:24:30 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v3 9/9] rockchip: videp: vop: Add reset support -References: <20201120132421.500365403@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the VOP registers are in correct state, -add missing support for the VOP reset lines found in the device-tree - -Signed-off-by: Arnaud Patard - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c +diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c +index fcb393b906..0fabbf7e30 100644 +--- a/drivers/video/rockchip/rk_vop.c ++++ b/drivers/video/rockchip/rk_vop.c @@ -8,9 +8,11 @@ #include #include @@ -1165,7 +297,16 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c #include #include #include -@@ -36,14 +38,16 @@ enum vop_pol { +@@ -20,6 +22,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -34,14 +38,16 @@ enum vop_pol { DCLK_INVERT = 3 }; @@ -1184,7 +325,7 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), ®s->win0_act_info); -@@ -91,6 +95,18 @@ static void rkvop_enable(struct rk3288_v +@@ -89,6 +95,18 @@ static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, writel(fbbase, ®s->win0_yrgb_mst); writel(0x01, ®s->reg_cfg_done); /* enable reg config */ @@ -1203,15 +344,52 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c } static void rkvop_set_pin_polarity(struct udevice *dev, -@@ -238,6 +254,7 @@ static int rk_display_init(struct udevic +@@ -235,12 +253,12 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + struct clk clk; enum video_log2_bpp l2bpp; ofnode remote; - const char *compat; ++ const char *compat; + struct reset_ctl dclk_rst; - debug("%s(%s, %lx, %s)\n", __func__, +- debug("%s(%s, %lu, %s)\n", __func__, ++ debug("%s(%s, %lx, %s)\n", __func__, dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); -@@ -354,7 +371,14 @@ static int rk_display_init(struct udevic + +- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); +- debug("vop_id=%d\n", vop_id); + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); + if (ret) + return ret; +@@ -282,6 +300,28 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + if (disp) + break; + }; ++ compat = ofnode_get_property(remote, "compatible", NULL); ++ if (!compat) { ++ debug("%s(%s): Failed to find compatible property\n", ++ __func__, dev_read_name(dev)); ++ return -EINVAL; ++ } ++ if (strstr(compat, "edp")) { ++ vop_id = VOP_MODE_EDP; ++ } else if (strstr(compat, "mipi")) { ++ vop_id = VOP_MODE_MIPI; ++ } else if (strstr(compat, "hdmi")) { ++ vop_id = VOP_MODE_HDMI; ++ } else if (strstr(compat, "cdn-dp")) { ++ vop_id = VOP_MODE_DP; ++ } else if (strstr(compat, "lvds")) { ++ vop_id = VOP_MODE_LVDS; ++ } else { ++ debug("%s(%s): Failed to find vop mode for %s\n", ++ __func__, dev_read_name(dev), compat); ++ return -EINVAL; ++ } ++ debug("vop_id=%d\n", vop_id); + + disp_uc_plat = dev_get_uclass_plat(disp); + debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); +@@ -331,7 +371,14 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) } rkvop_mode_set(dev, &timing, vop_id); @@ -1227,7 +405,7 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c ret = display_enable(disp, 1 << l2bpp, &timing); if (ret) -@@ -391,11 +415,31 @@ int rk_vop_probe(struct udevice *dev) +@@ -368,11 +415,38 @@ int rk_vop_probe(struct udevice *dev) struct rk_vop_priv *priv = dev_get_priv(dev); int ret = 0; ofnode port, node; @@ -1256,6 +434,16 @@ Index: u-boot/drivers/video/rockchip/rk_vop.c + return ret; + } + - plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; ++ plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; ++ ++#if defined(CONFIG_EFI_LOADER) ++ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); ++ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); ++#endif ++ + priv->regs = (struct rk3288_vop *)dev_read_addr(dev); - #if defined(CONFIG_EFI_LOADER) + /* +-- +2.29.2 + diff --git a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch deleted file mode 100644 index 94e43b7..0000000 --- a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +++ /dev/null @@ -1,348 +0,0 @@ -From patchwork Sun Nov 22 13:03:45 2020 -Content-Type: text/plain; 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[82.69.107.165]) - by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.11 - (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); - Sun, 22 Nov 2020 05:04:11 -0800 (PST) -From: Hugh Cole-Baker -To: U-Boot Mailing List -Cc: Hugh Cole-Baker , Simon Glass , - Jagan Teki , - Kever Yang , Levin Du , - Philipp Tomsich , - Suniel Mahesh -Subject: [PATCH v2 2/3] rockchip: rk3399-roc-pc: default to SPI bus 1 for - SPI-flash -Date: Sun, 22 Nov 2020 13:03:45 +0000 -Message-Id: <20201122130346.11621-3-sigmaris@gmail.com> -X-Mailer: git-send-email 2.24.3 (Apple Git-128) -In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> -References: <20201122130346.11621-1-sigmaris@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -SPI flash on this board is located on bus 1, default to using bus 1 for -SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to -bus 0. - -Signed-off-by: Hugh Cole-Baker -Suggested-by: Simon Glass -Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") ---- - -(no changes since v1) - - arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 4 ---- - configs/roc-pc-mezzanine-rk3399_defconfig | 1 + - configs/roc-pc-rk3399_defconfig | 1 + - 3 files changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -index fc155e69036..e3c9364e359 100644 ---- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -@@ -7,10 +7,6 @@ - #include "rk3399-sdram-lpddr4-100.dtsi" - - / { -- aliases { -- spi0 = &spi1; -- }; -- - chosen { - u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; - }; -diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig -index ae16f3558a3..8aa5a155180 100644 ---- a/configs/roc-pc-mezzanine-rk3399_defconfig -+++ b/configs/roc-pc-mezzanine-rk3399_defconfig -@@ -42,6 +42,7 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SPI_FLASH_WINBOND=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig -index 774707b115b..927b57685d9 100644 ---- a/configs/roc-pc-rk3399_defconfig -+++ b/configs/roc-pc-rk3399_defconfig -@@ -41,6 +41,7 @@ CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SPI_FLASH_WINBOND=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y - -From patchwork Sun Nov 22 13:03:46 2020 -Content-Type: text/plain; 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[82.69.107.165]) - by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.15 - (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); - Sun, 22 Nov 2020 05:04:15 -0800 (PST) -From: Hugh Cole-Baker -To: U-Boot Mailing List -Cc: Hugh Cole-Baker , - Kever Yang , - Heiko Stuebner , - Jagan Teki , - Klaus Goger , - Peter Robinson , - Philipp Tomsich , - Simon Glass -Subject: [PATCH v2 3/3] rockchip: puma-haikou: default to SPI bus 1 for - SPI-flash -Date: Sun, 22 Nov 2020 13:03:46 +0000 -Message-Id: <20201122130346.11621-4-sigmaris@gmail.com> -X-Mailer: git-send-email 2.24.3 (Apple Git-128) -In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> -References: <20201122130346.11621-1-sigmaris@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -SPI flash on this machine is located on bus 1, default to using bus 1 -for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1 -pointed to &spi5, use an alias spi5 for this instead. - -Signed-off-by: Hugh Cole-Baker -Suggested-by: Kever Yang ---- - -Changes in v2: -New patch. - - arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 3 +-- - configs/puma-rk3399_defconfig | 2 ++ - 2 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -index 29846c4b001..e7a1aea3a56 100644 ---- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -@@ -28,8 +28,7 @@ - }; - - aliases { -- spi0 = &spi1; -- spi1 = &spi5; -+ spi5 = &spi5; - }; - - /* -diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig -index 60178e3754c..0f15936c2d6 100644 ---- a/configs/puma-rk3399_defconfig -+++ b/configs/puma-rk3399_defconfig -@@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y - CONFIG_ENV_IS_IN_MMC=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_SYS_MMC_ENV_DEV=1 -+CONFIG_SPL_DM_SEQ_ALIAS=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MISC=y -@@ -53,6 +54,7 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_SPI_FLASH_WINBOND=y diff --git a/sources b/sources index 1e6a02f..77f0525 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01.tar.bz2) = 40dd4d9ef87a1829158658c433d46a047a39c0d8c314ad8d133f7240343ee3a75b060f009dd2efe598cfb8a766773f6cd773ea7f7745ee88e52a771c77eb1c6e +SHA512 (u-boot-2021.04-rc1.tar.bz2) = ea3adadd7f41d6801487a5c5189b664fd3351c24a57fbf0885f2548f8aebb2fc89f95214e0f76d6623d5ef8ea518eaaef50f117ca040f8b723e5d620e8014e9f diff --git a/sunxi-add-PineCube-board.patch b/sunxi-add-PineCube-board.patch deleted file mode 100644 index dd8ec26..0000000 --- a/sunxi-add-PineCube-board.patch +++ /dev/null @@ -1,222 +0,0 @@ -From patchwork Wed Nov 18 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RCPT_COUNT_FIVE(0.00)[6]; ML_SERVERS(-3.10)[213.133.102.83]; - DKIM_TRACE(0.00)[aosc.io:+]; MID_CONTAINS_FROM(1.00)[]; - RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - ASN(0.00)[asn:24940, ipnet:213.133.96.0/19, country:DE]; - RCVD_COUNT_TWO(0.00)[2]; - HFILTER_HELO_BAREIP(3.00)[213.133.102.83,1] -X-Rspamd-Server: mail20.mymailcheap.com -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -PineCube is an IP camera development kit released by Pine64. - -It comes with the following compoents: - -- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC, -a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps -Ethernet port and FPC connectors for camera and daughter board. -- An OV5640-based camera module which is connected to the parallel CSI -bus of the mainboard. -- A daughterboard with several buttons, a SD slot, some IR LEDs, a -microphone and a speaker connector. - -As the device tree is synchronized in a previous commit, just add it to -Makefile, create a new MAINTAINER item and provide a defconfig. - -Signed-off-by: Icenowy Zheng -Reviewed-by: Andre Przywara ---- -Changes since v2: -- Add Makefile reference to DT. -Changes since v1: -- Dropped LDO3 quirk. - - arch/arm/dts/Makefile | 1 + - board/sunxi/MAINTAINERS | 5 +++++ - configs/pinecube_defconfig | 15 +++++++++++++++ - 3 files changed, 21 insertions(+) - create mode 100644 configs/pinecube_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 7d1a369845..e6993733b0 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -587,6 +587,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \ - sun8i-r40-bananapi-m2-ultra.dtb \ - sun8i-v40-bananapi-m2-berry.dtb - dtb-$(CONFIG_MACH_SUN8I_V3S) += \ -+ sun8i-s3-pinecube.dtb \ - sun8i-v3s-licheepi-zero.dtb - dtb-$(CONFIG_MACH_SUN50I_H5) += \ - sun50i-h5-bananapi-m2-plus.dtb \ -diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS -index d3755ae41a..735801ae1d 100644 ---- a/board/sunxi/MAINTAINERS -+++ b/board/sunxi/MAINTAINERS -@@ -440,6 +440,11 @@ M: Vasily Khoruzhick - S: Maintained - F: configs/pinebook_defconfig - -+PINECUBE BOARD: -+M: Icenowy Zheng -+S: Maintained -+F: configs/pinecube_defconfig -+ - PINE64 BOARDS - M: Andre Przywara - S: Maintained -diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig -new file mode 100644 -index 0000000000..a8c404f6b1 ---- /dev/null -+++ b/configs/pinecube_defconfig -@@ -0,0 +1,15 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN8I_V3S=y -+CONFIG_SUNXI_DRAM_DDR3_1333=y -+CONFIG_DRAM_CLK=504 -+CONFIG_DRAM_ODT_EN=y -+CONFIG_I2C0_ENABLE=y -+CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" -+CONFIG_SPL_I2C_SUPPORT=y -+# CONFIG_NETDEVICES is not set -+CONFIG_AXP209_POWER=y -+CONFIG_AXP_DCDC2_VOLT=1250 -+CONFIG_AXP_DCDC3_VOLT=3300 -+CONFIG_CONS_INDEX=3 diff --git a/uboot-tools.spec b/uboot-tools.spec index 4bdd596..d5d0f11 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc1 +%global candidate rc1 Name: uboot-tools -Version: 2021.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2021.04 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,19 +26,14 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement # AllWinner improvements Patch10: AllWinner-PineTab.patch -Patch11: sunxi-add-PineCube-board.patch -Patch12: 0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch -Patch13: 0001-sunxi-don-t-define-MACPWR-and-SATAPWR-to-empty-strin.patch # TI fixes -Patch14: 0001-Fix-BeagleAI-detection.patch +Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch15: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch -Patch16: rk3399-Pinebook-pro-EDP-support.patch -Patch17: rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +Patch12: rk3399-Pinebook-pro-EDP-support.patch # Raspberry Pi improvements -Patch18: Raspberry-Pi-400-Compute-Module-4-support.patch -Patch19: rng-Add-iProc-RNG200-driver.patch -Patch20: Raspberry-Pi-4-PCIe-handover.patch +Patch13: Raspberry-Pi-400-Compute-Module-4-support.patch +Patch14: Raspberry-Pi-4-PCIe-handover.patch +Patch15: rng-Add-iProc-RNG200-driver.patch BuildRequires: bc BuildRequires: dtc @@ -115,12 +110,12 @@ do echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ fi - sun50h6=(orangepi_lite2 orangepi_one_plus pine_h64) + sun50h6=(beelink_gs1 orangepi_3 orangepi_lite2 orangepi_one_plus orangepi_zero2 pine_h64 tanix_tx6) if [[ " ${sun50h6[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3328=(evb-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328) + rk3328=(evb-rk3328 nanopi-r2s-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ @@ -239,6 +234,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Feb 01 2021 Peter Robinson - 2021.04-0.1.rc1 +- Update to 2021.04 RC1 +- Add new upstream devices + * Wed Jan 27 2021 Fedora Release Engineering - 2021.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild From a05d9090bf32b71b04eed97b201686db818b24c2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 2 Feb 2021 09:42:30 +0000 Subject: [PATCH 130/351] fix iproc_rng200 driver for upstream changes --- rng-Add-iProc-RNG200-driver.patch | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/rng-Add-iProc-RNG200-driver.patch b/rng-Add-iProc-RNG200-driver.patch index d8dcfa1..b5e54c5 100644 --- a/rng-Add-iProc-RNG200-driver.patch +++ b/rng-Add-iProc-RNG200-driver.patch @@ -152,11 +152,11 @@ index 0000000000..1063f43953 +#define RNG_FIFO_COUNT_OFFSET 0x24 +#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF + -+struct iproc_rng200_platdata { ++struct iproc_rng200_plat { + fdt_addr_t base; +}; + -+static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable) ++static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable) +{ + fdt_addr_t rng_base = pdata->base; + u32 val; @@ -172,7 +172,7 @@ index 0000000000..1063f43953 + +} + -+static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata) ++static void iproc_rng200_restart(struct iproc_rng200_plat *pdata) +{ + fdt_addr_t rng_base = pdata->base; + u32 val; @@ -204,7 +204,7 @@ index 0000000000..1063f43953 + +static int iproc_rng200_read(struct udevice *dev, void *data, size_t len) +{ -+ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ struct iproc_rng200_plat *priv = dev_get_plat(dev); + char *buf = (char *)data; + u32 num_remaining = len; + u32 status; @@ -256,7 +256,7 @@ index 0000000000..1063f43953 + +static int iproc_rng200_probe(struct udevice *dev) +{ -+ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ struct iproc_rng200_plat *priv = dev_get_plat(dev); + + iproc_rng200_enable(priv, true); + @@ -265,16 +265,16 @@ index 0000000000..1063f43953 + +static int iproc_rng200_remove(struct udevice *dev) +{ -+ struct iproc_rng200_platdata *priv = dev_get_platdata(dev); ++ struct iproc_rng200_plat *priv = dev_get_plat(dev); + + iproc_rng200_enable(priv, false); + + return 0; +} + -+static int iproc_rng200_ofdata_to_platdata(struct udevice *dev) ++static int iproc_rng200_of_to_plat(struct udevice *dev) +{ -+ struct iproc_rng200_platdata *pdata = dev_get_platdata(dev); ++ struct iproc_rng200_plat *pdata = dev_get_plat(dev); + + pdata->base = dev_read_addr(dev); + if (!pdata->base) @@ -300,8 +300,8 @@ index 0000000000..1063f43953 + .ops = &iproc_rng200_ops, + .probe = iproc_rng200_probe, + .remove = iproc_rng200_remove, -+ .platdata_auto_alloc_size = sizeof(struct iproc_rng200_platdata), -+ .ofdata_to_platdata = iproc_rng200_ofdata_to_platdata, ++ .priv_auto = sizeof(struct iproc_rng200_plat), ++ .of_to_plat = iproc_rng200_of_to_plat, +}; From patchwork Tue Dec 15 09:49:24 2020 @@ -440,11 +440,11 @@ diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c index 1063f43953..378f6cf48d 100644 --- a/drivers/rng/iproc_rng200.c +++ b/drivers/rng/iproc_rng200.c -@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable +@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; writel(val, rng_base + RNG_CTRL_OFFSET); - } - static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata) + static void iproc_rng200_restart(struct iproc_rng200_plat *pdata) From 82aabc8bb2c5b8c5f0fdfed1726d34ac755e4040 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 10 Feb 2021 11:05:10 +0000 Subject: [PATCH 131/351] Allwinner network fixes --- ...r-sync-from-linux-for-RGMII-RX-TX-de.patch | 2668 +++++++++++++++++ uboot-tools.spec | 7 +- uefi-use-Fedora-specific-path-name.patch | 14 +- 3 files changed, 2681 insertions(+), 8 deletions(-) create mode 100644 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch diff --git a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch new file mode 100644 index 0000000..fe75a7a --- /dev/null +++ b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch @@ -0,0 +1,2668 @@ +From d6aa8909c2099371333c83546d26d46a3b71ba48 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 10 Feb 2021 11:01:01 +0000 +Subject: [PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay + fixes + +Sync over a subset of the AllWinner dts changes from Linux 5.11 +for the RGMII RX/TX delay network fixes. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 +- + arch/arm/dts/sun50i-a64-orangepi-win.dts | 10 +- + arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- + arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 10 +- + arch/arm/dts/sun50i-a64.dtsi | 34 ++- + .../dts/sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + + .../arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- + arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- + arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 23 +- + arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- + .../arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 38 +++ + arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 14 +- + arch/arm/dts/sun7i-a20-bananapi.dts | 24 +- + arch/arm/dts/sun7i-a20-bananapro.dts | 14 +- + arch/arm/dts/sun7i-a20-cubieboard2.dts | 24 +- + arch/arm/dts/sun7i-a20-cubietruck.dts | 14 +- + arch/arm/dts/sun7i-a20-hummingbird.dts | 21 +- + arch/arm/dts/sun7i-a20-i12-tvbox.dts | 12 +- + arch/arm/dts/sun7i-a20-icnova-swac.dts | 15 +- + arch/arm/dts/sun7i-a20-itead-ibox.dts | 4 +- + arch/arm/dts/sun7i-a20-lamobo-r1.dts | 14 +- + arch/arm/dts/sun7i-a20-m3.dts | 12 +- + arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 12 +- + arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 24 +- + arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +-- + arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 ++-- + arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +-- + arch/arm/dts/sun7i-a20-orangepi-mini.dts | 24 +- + arch/arm/dts/sun7i-a20-orangepi.dts | 24 +- + arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +-- + arch/arm/dts/sun7i-a20-pcduino3.dts | 24 +- + arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 12 +- + arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 24 +- + arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++++++++- + arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++++- + arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++++- + arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 5 - + arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- + arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ + arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- + arch/arm/dts/sun9i-a80-cubieboard4.dts | 61 +++-- + arch/arm/dts/sun9i-a80-optimus.dts | 50 +++- + arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- + 43 files changed, 752 insertions(+), 338 deletions(-) + +diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts +index 883f217efb..e5e840b9fb 100644 +--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts +@@ -105,7 +105,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + status = "okay"; +@@ -331,10 +331,10 @@ + "Microphone", "Microphone Jack", + "Microphone", "Onboard Microphone"; + simple-audio-card,routing = +- "Left DAC", "AIF1 Slot 0 Left", +- "Right DAC", "AIF1 Slot 0 Right", +- "AIF1 Slot 0 Left ADC", "Left ADC", +- "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Left DAC", "DACL", ++ "Right DAC", "DACR", ++ "ADCL", "Left ADC", ++ "ADCR", "Right ADC", + "Headphone Jack", "HP", + "MIC2", "Microphone Jack", + "Onboard Microphone", "MBIAS", +diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts +index fde9c7a99b..70e31743f0 100644 +--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts ++++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts +@@ -120,7 +120,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_gmac_3v3>; + status = "okay"; +@@ -330,10 +330,10 @@ + "Microphone", "Microphone Jack", + "Microphone", "Onboard Microphone"; + simple-audio-card,routing = +- "Left DAC", "AIF1 Slot 0 Left", +- "Right DAC", "AIF1 Slot 0 Right", +- "AIF1 Slot 0 Left ADC", "Left ADC", +- "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Left DAC", "DACL", ++ "Right DAC", "DACR", ++ "ADCL", "Left ADC", ++ "ADCR", "Right ADC", + "Headphone Jack", "HP", + "MIC2", "Microphone Jack", + "Onboard Microphone", "MBIAS", +diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts +index b26181cf90..b54099b654 100644 +--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts ++++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts +@@ -13,7 +13,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-txid"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +index 2f6ea9f3f6..d4069749d7 100644 +--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +@@ -79,7 +79,7 @@ + &emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + status = "okay"; +@@ -159,11 +159,11 @@ + simple-audio-card,widgets = "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = +- "Left DAC", "AIF1 Slot 0 Left", +- "Right DAC", "AIF1 Slot 0 Right", ++ "Left DAC", "DACL", ++ "Right DAC", "DACR", + "Headphone Jack", "HP", +- "AIF1 Slot 0 Left ADC", "Left ADC", +- "AIF1 Slot 0 Right ADC", "Right ADC", ++ "ADCL", "Left ADC", ++ "ADCR", "Right ADC", + "MIC2", "Microphone Jack"; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi +index 8dfbcd1440..51cc30e84e 100644 +--- a/arch/arm/dts/sun50i-a64.dtsi ++++ b/arch/arm/dts/sun50i-a64.dtsi +@@ -51,7 +51,7 @@ + reg = <0>; + enable-method = "psci"; + next-level-cache = <&L2>; +- clocks = <&ccu 21>; ++ clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + #cooling-cells = <2>; + }; +@@ -62,7 +62,7 @@ + reg = <1>; + enable-method = "psci"; + next-level-cache = <&L2>; +- clocks = <&ccu 21>; ++ clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + #cooling-cells = <2>; + }; +@@ -73,7 +73,7 @@ + reg = <2>; + enable-method = "psci"; + next-level-cache = <&L2>; +- clocks = <&ccu 21>; ++ clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + #cooling-cells = <2>; + }; +@@ -84,7 +84,7 @@ + reg = <3>; + enable-method = "psci"; + next-level-cache = <&L2>; +- clocks = <&ccu 21>; ++ clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + #cooling-cells = <2>; + }; +@@ -139,10 +139,10 @@ + simple-audio-card,mclk-fs = <128>; + simple-audio-card,aux-devs = <&codec_analog>; + simple-audio-card,routing = +- "Left DAC", "AIF1 Slot 0 Left", +- "Right DAC", "AIF1 Slot 0 Right", +- "AIF1 Slot 0 Left ADC", "Left ADC", +- "AIF1 Slot 0 Right ADC", "Right ADC"; ++ "Left DAC", "DACL", ++ "Right DAC", "DACR", ++ "ADCL", "Left ADC", ++ "ADCR", "Right ADC"; + status = "disabled"; + + cpudai: simple-audio-card,cpu { +@@ -157,6 +157,7 @@ + timer { + compatible = "arm,armv8-timer"; + allwinner,erratum-unknown1; ++ arm,no-tick-in-suspend; + interrupts = , + ; ++ compatible = "allwinner,sun50i-a64-i2s", ++ "allwinner,sun8i-h3-i2s"; ++ reg = <0x01c22800 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; ++ clock-names = "apb", "mod"; ++ resets = <&ccu RST_BUS_I2S2>; ++ dma-names = "rx", "tx"; ++ dmas = <&dma 27>, <&dma 27>; ++ status = "disabled"; ++ }; ++ + dai: dai@1c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-codec-i2s"; +@@ -860,7 +875,8 @@ + + codec: codec@1c22e00 { + #sound-dai-cells = <0>; +- compatible = "allwinner,sun8i-a33-codec"; ++ compatible = "allwinner,sun50i-a64-codec", ++ "allwinner,sun8i-a33-codec"; + reg = <0x01c22e00 0x600>; + interrupts = ; + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; +diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts +index 2e2b14c0ae..8857a37915 100644 +--- a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts ++++ b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts +@@ -3,6 +3,7 @@ + + /dts-v1/; + #include "sun50i-h5.dtsi" ++#include "sun50i-h5-cpu-opp.dtsi" + #include + + / { +diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +index df1b9263ad..6e30a564c8 100644 +--- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts ++++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +@@ -36,7 +36,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + /delete-property/ allwinner,leds-active-low; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +index 4f9ba53ffa..9d93fe1536 100644 +--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts ++++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +@@ -96,7 +96,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +index 70b5f09984..8bf2db9dcb 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +@@ -61,6 +61,7 @@ + label = "sw4"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ wakeup-source; + }; + }; + +@@ -93,6 +94,10 @@ + status = "okay"; + }; + ++&cpu0 { ++ cpu-supply = <®_vdd_cpux>; ++}; ++ + &de { + status = "okay"; + }; +@@ -118,7 +123,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +@@ -168,6 +173,22 @@ + status = "okay"; + }; + ++&r_i2c { ++ status = "okay"; ++ ++ reg_vdd_cpux: regulator@65 { ++ compatible = "silergy,sy8106a"; ++ reg = <0x65>; ++ regulator-name = "vdd-cpux"; ++ silergy,fixed-microvolt = <1100000>; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-ramp-delay = <200>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++}; ++ + &spi0 { + status = "okay"; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts +index cb44bfa598..33ab44072e 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts +@@ -124,7 +124,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts +index c95a685413..de19e68eb8 100644 +--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts ++++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts +@@ -30,6 +30,21 @@ + }; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "orangepi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "orangepi:red:status"; ++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; +@@ -48,6 +63,10 @@ + status = "okay"; + }; + ++&ehci0 { ++ status = "okay"; ++}; ++ + &hdmi { + status = "okay"; + }; +@@ -92,6 +111,10 @@ + status = "okay"; + }; + ++&ohci0 { ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pa_pins>; +@@ -103,3 +126,18 @@ + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "okay"; + }; ++ ++&usb_otg { ++ /* ++ * According to schematics CN1 MicroUSB port can be used to take ++ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB ++ * port cannot provide power externally even if the board is powered ++ * via GPIO pins. It thus makes sense to force peripheral mode. ++ */ ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +index e2bfe00588..8945dbb114 100644 +--- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts ++++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +@@ -129,14 +129,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -171,6 +167,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts +index 81bc85d398..0b3d9ae756 100644 +--- a/arch/arm/dts/sun7i-a20-bananapi.dts ++++ b/arch/arm/dts/sun7i-a20-bananapi.dts +@@ -131,14 +131,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -171,6 +167,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -246,12 +248,6 @@ + "SPI-MISO", "SPI-CE1", "", + "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "", + "", "", "", "", "", "", "", ""; +- +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; + }; + + #include "axp209.dtsi" +@@ -329,9 +325,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts +index 0176e9de01..5740f94427 100644 +--- a/arch/arm/dts/sun7i-a20-bananapro.dts ++++ b/arch/arm/dts/sun7i-a20-bananapro.dts +@@ -109,14 +109,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -143,6 +139,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts +index 200685b0b1..b8203e4ef2 100644 +--- a/arch/arm/dts/sun7i-a20-cubieboard2.dts ++++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts +@@ -115,13 +115,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -161,6 +157,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &ohci0 { + status = "okay"; + }; +@@ -173,14 +175,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_ahci_5v { + status = "okay"; + }; +@@ -236,9 +230,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts +index 99f531b8d2..9109ca0919 100644 +--- a/arch/arm/dts/sun7i-a20-cubietruck.dts ++++ b/arch/arm/dts/sun7i-a20-cubietruck.dts +@@ -150,13 +150,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -194,6 +190,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts +index fd0153f656..3def2a3305 100644 +--- a/arch/arm/dts/sun7i-a20-hummingbird.dts ++++ b/arch/arm/dts/sun7i-a20-hummingbird.dts +@@ -100,19 +100,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_vdd>; +- /* phy reset config */ +- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ +- snps,reset-active-low; +- /* wait 1s after reset, otherwise fail to read phy id */ +- snps,reset-delays-us = <0 10000 1000000>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -146,6 +137,16 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ ++ reset-assert-us = <10000>; ++ /* wait 1s after reset, otherwise fail to read phy id */ ++ reset-deassert-us = <1000000>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts +index 5f1c4f573d..358ed5f1b1 100644 +--- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts ++++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts +@@ -115,14 +115,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -145,6 +141,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts +index 949494730a..413505f45a 100644 +--- a/arch/arm/dts/sun7i-a20-icnova-swac.dts ++++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts +@@ -49,7 +49,8 @@ + + / { + model = "ICnova-A20 SWAC"; +- compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20"; ++ compatible = "incircuit,icnova-a20-swac", "incircuit,icnova-a20", ++ "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; +@@ -75,13 +76,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -98,6 +95,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts +index b90a7607d0..946c272783 100644 +--- a/arch/arm/dts/sun7i-a20-itead-ibox.dts ++++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts +@@ -97,10 +97,12 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; ++}; + ++&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts +index f91e1bee44..17fa8901fc 100644 +--- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts ++++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts +@@ -123,8 +123,6 @@ + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- /delete-property/#address-cells; +- /delete-property/#size-cells; + + fixed-link { + speed = <1000>; +@@ -229,14 +227,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + #include "axp209.dtsi" + + &ac_power_supply { +@@ -322,9 +312,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts +index b8a1aaaf39..6bff9e731f 100644 +--- a/arch/arm/dts/sun7i-a20-m3.dts ++++ b/arch/arm/dts/sun7i-a20-m3.dts +@@ -82,13 +82,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -111,6 +107,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +index f0e6a96e57..6f9c54b8e4 100644 +--- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts ++++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +@@ -111,13 +111,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -202,6 +198,12 @@ + }; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts +index 823aabce04..230d62a6b8 100644 +--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts ++++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts +@@ -105,18 +105,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy3>; ++ phy-handle = <&phy3>; + phy-mode = "rgmii"; + phy-supply = <®_vcc3v3>; +- +- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; +- snps,reset-active-low; +- snps,reset-delays-us = <0 10000 1000000>; + status = "okay"; +- +- phy3: ethernet-phy@3 { +- reg = <3>; +- }; + }; + + &hdmi { +@@ -161,6 +153,16 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy3: ethernet-phy@3 { ++ reg = <3>; ++ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ ++ reset-assert-us = <10000>; ++ /* wait 1s after reset, otherwise fail to read phy id */ ++ reset-deassert-us = <1000000>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -314,8 +316,8 @@ + }; + + &usbphy { +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ +- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ ++ usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts +index 5e411194bf..2adbac8601 100644 +--- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts ++++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts +@@ -106,13 +106,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -149,6 +145,12 @@ + }; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -174,18 +176,6 @@ + function = "gpio_out"; + drive-strength = <20>; + }; +- +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +- +- usb0_vbus_detect_pin: usb0-vbus-detect-pin { +- pins = "PH5"; +- function = "gpio_in"; +- bias-pull-down; +- }; + }; + + ®_ahci_5v { +@@ -217,10 +207,8 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ +- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ ++ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +index 4e1c590eb0..9ba62774e8 100644 +--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts ++++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +@@ -111,13 +111,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -154,6 +150,12 @@ + vref-supply = <®_vcc3v0>; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -174,23 +176,17 @@ + }; + + &pio { ++ vcc-pa-supply = <®_vcc3v3>; ++ vcc-pc-supply = <®_vcc3v3>; ++ vcc-pe-supply = <®_ldo3>; ++ vcc-pf-supply = <®_vcc3v3>; ++ vcc-pg-supply = <®_ldo4>; ++ + led_pins_olinuxinolime: led-pins { + pins = "PH2"; + function = "gpio_out"; + drive-strength = <20>; + }; +- +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +- +- usb0_vbus_detect_pin: usb0-vbus-detect-pin { +- pins = "PH5"; +- function = "gpio_in"; +- bias-pull-down; +- }; + }; + + ®_ahci_5v { +@@ -200,6 +196,14 @@ + + #include "axp209.dtsi" + ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ + ®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; +@@ -267,10 +271,8 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ +- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ ++ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts +index 840ae1194a..359bd0d5b3 100644 +--- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts ++++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts +@@ -118,13 +118,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -215,6 +211,12 @@ + }; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -252,18 +254,6 @@ + function = "gpio_out"; + drive-strength = <20>; + }; +- +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +- +- usb0_vbus_detect_pin: usb0-vbus-detect-pin { +- pins = "PH5"; +- function = "gpio_in"; +- bias-pull-down; +- }; + }; + + #include "axp209.dtsi" +@@ -355,10 +345,8 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ +- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ ++ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts +index 15881081ca..2e328d2cef 100644 +--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts ++++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts +@@ -120,14 +120,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -158,6 +154,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -176,14 +178,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; +@@ -239,9 +233,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts +index d64de2e73a..d75b2e2bab 100644 +--- a/arch/arm/dts/sun7i-a20-orangepi.dts ++++ b/arch/arm/dts/sun7i-a20-orangepi.dts +@@ -96,14 +96,10 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -124,6 +120,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -135,14 +137,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; +@@ -198,9 +192,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +index 538ea15fa3..bf38c66c18 100644 +--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts ++++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +@@ -1,5 +1,5 @@ + /* +- * Copyright 2015 Adam Sampson ++ * Copyright 2015-2020 Adam Sampson + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual +@@ -114,13 +114,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; +- phy-mode = "rgmii"; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &hdmi { +@@ -149,6 +145,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -168,14 +170,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_ahci_5v { + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ + status = "okay"; +@@ -226,9 +220,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb1_vbus>; + status = "okay"; +diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts +index a72ed4318d..cc8271d777 100644 +--- a/arch/arm/dts/sun7i-a20-pcduino3.dts ++++ b/arch/arm/dts/sun7i-a20-pcduino3.dts +@@ -122,13 +122,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -149,6 +145,12 @@ + status = "okay"; + }; + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -168,14 +170,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_ahci_5v { + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; + status = "okay"; +@@ -226,9 +220,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +index ffade253d1..6a66b0432d 100644 +--- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts ++++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +@@ -156,14 +156,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + &pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; +@@ -223,9 +215,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +index c27e56091f..3bfae98f3c 100644 +--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts ++++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +@@ -81,13 +81,9 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; +- phy = <&phy1>; ++ phy-handle = <&phy1>; + phy-mode = "rgmii"; + status = "okay"; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; + }; + + &i2c0 { +@@ -110,6 +106,12 @@ + + #include "axp209.dtsi" + ++&gmac_mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +@@ -145,14 +147,6 @@ + status = "okay"; + }; + +-&pio { +- usb0_id_detect_pin: usb0-id-detect-pin { +- pins = "PH4"; +- function = "gpio_in"; +- bias-pull-up; +- }; +-}; +- + ®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; +@@ -206,9 +200,7 @@ + }; + + &usbphy { +- pinctrl-names = "default"; +- pinctrl-0 = <&usb0_id_detect_pin>; +- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; +diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi +index 641a8fa6d4..6d6a37940d 100644 +--- a/arch/arm/dts/sun7i-a20.dtsi ++++ b/arch/arm/dts/sun7i-a20.dtsi +@@ -47,6 +47,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -180,7 +181,7 @@ + default-pool { + compatible = "shared-dma-pool"; + size = <0x6000000>; +- alloc-ranges = <0x4a000000 0x6000000>; ++ alloc-ranges = <0x40000000 0x10000000>; + reusable; + linux,cma-default; + }; +@@ -333,7 +334,7 @@ + #dma-cells = <2>; + }; + +- nfc: nand@1c03000 { ++ nfc: nand-controller@1c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = ; +@@ -376,6 +377,16 @@ + num-cs = <1>; + }; + ++ csi0: csi@1c09000 { ++ compatible = "allwinner,sun7i-a20-csi0"; ++ reg = <0x01c09000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; ++ clock-names = "bus", "isp", "ram"; ++ resets = <&ccu RST_CSI0>; ++ status = "disabled"; ++ }; ++ + emac: ethernet@1c0b000 { + compatible = "allwinner,sun4i-a10-emac"; + reg = <0x01c0b000 0x1000>; +@@ -394,11 +405,12 @@ + }; + + tcon0: lcd-controller@1c0c000 { +- compatible = "allwinner,sun7i-a20-tcon"; ++ compatible = "allwinner,sun7i-a20-tcon0", ++ "allwinner,sun7i-a20-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = ; +- resets = <&ccu RST_TCON0>; +- reset-names = "lcd"; ++ resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>; ++ reset-names = "lcd", "lvds"; + clocks = <&ccu CLK_AHB_LCD0>, + <&ccu CLK_TCON0_CH0>, + <&ccu CLK_TCON0_CH1>; +@@ -406,6 +418,7 @@ + "tcon-ch0", + "tcon-ch1"; + clock-output-names = "tcon0-pixel-clock"; ++ #clock-cells = <0>; + dmas = <&dma SUN4I_DMA_DEDICATED 14>; + + ports { +@@ -443,7 +456,8 @@ + }; + + tcon1: lcd-controller@1c0d000 { +- compatible = "allwinner,sun7i-a20-tcon"; ++ compatible = "allwinner,sun7i-a20-tcon1", ++ "allwinner,sun7i-a20-tcon"; + reg = <0x01c0d000 0x1000>; + interrupts = ; + resets = <&ccu RST_TCON1>; +@@ -455,6 +469,7 @@ + "tcon-ch0", + "tcon-ch1"; + clock-output-names = "tcon1-pixel-clock"; ++ #clock-cells = <0>; + dmas = <&dma SUN4I_DMA_DEDICATED 15>; + + ports { +@@ -586,13 +601,14 @@ + phy-names = "usb"; + extcon = <&usbphy 0>; + allwinner,sram = <&otg_sram 1>; ++ dr_mode = "otg"; + status = "disabled"; + }; + + usbphy: phy@1c13400 { + #phy-cells = <1>; + compatible = "allwinner,sun7i-a20-usb-phy"; +- reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; ++ reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; + reg-names = "phy_ctrl", "pmu1", "pmu2"; + clocks = <&ccu CLK_USB_PHY>; + clock-names = "usb_phy"; +@@ -716,6 +732,17 @@ + status = "disabled"; + }; + ++ csi1: csi@1c1d000 { ++ compatible = "allwinner,sun7i-a20-csi1", ++ "allwinner,sun4i-a10-csi1"; ++ reg = <0x01c1d000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>; ++ clock-names = "bus", "ram"; ++ resets = <&ccu RST_CSI1>; ++ status = "disabled"; ++ }; ++ + spi3: spi@1c1f000 { + compatible = "allwinner,sun4i-a10-spi"; + reg = <0x01c1f000 0x1000>; +@@ -751,21 +778,70 @@ + #interrupt-cells = <3>; + #gpio-cells = <3>; + ++ /omit-if-no-ref/ ++ can_pa_pins: can-pa-pins { ++ pins = "PA16", "PA17"; ++ function = "can"; ++ }; ++ ++ /omit-if-no-ref/ + can_ph_pins: can-ph-pins { + pins = "PH20", "PH21"; + function = "can"; + }; + ++ /omit-if-no-ref/ + clk_out_a_pin: clk-out-a-pin { + pins = "PI12"; + function = "clk_out_a"; + }; + ++ /omit-if-no-ref/ + clk_out_b_pin: clk-out-b-pin { + pins = "PI13"; + function = "clk_out_b"; + }; + ++ /omit-if-no-ref/ ++ csi0_8bits_pins: csi-8bits-pins { ++ pins = "PE0", "PE2", "PE3", "PE4", "PE5", ++ "PE6", "PE7", "PE8", "PE9", "PE10", ++ "PE11"; ++ function = "csi0"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi0_clk_pin: csi-clk-pin { ++ pins = "PE1"; ++ function = "csi0"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi1_8bits_pg_pins: csi1-8bits-pg-pins { ++ pins = "PG0", "PG2", "PG3", "PG4", "PG5", ++ "PG6", "PG7", "PG8", "PG9", "PG10", ++ "PG11"; ++ function = "csi1"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi1_24bits_ph_pins: csi1-24bits-ph-pins { ++ pins = "PH0", "PH1", "PH2", "PH3", "PH4", ++ "PH5", "PH6", "PH7", "PH8", "PH9", ++ "PH10", "PH11", "PH12", "PH13", "PH14", ++ "PH15", "PH16", "PH17", "PH18", "PH19", ++ "PH20", "PH21", "PH22", "PH23", "PH24", ++ "PH25", "PH26", "PH27"; ++ function = "csi1"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi1_clk_pg_pin: csi1-clk-pg-pin { ++ pins = "PG1"; ++ function = "csi1"; ++ }; ++ ++ /omit-if-no-ref/ + emac_pa_pins: emac-pa-pins { + pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", +@@ -775,6 +851,17 @@ + function = "emac"; + }; + ++ /omit-if-no-ref/ ++ emac_ph_pins: emac-ph-pins { ++ pins = "PH8", "PH9", "PH10", "PH11", ++ "PH14", "PH15", "PH16", "PH17", ++ "PH18", "PH19", "PH20", "PH21", ++ "PH22", "PH23", "PH24", "PH25", ++ "PH26"; ++ function = "emac"; ++ }; ++ ++ /omit-if-no-ref/ + gmac_mii_pins: gmac-mii-pins { + pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", +@@ -784,6 +871,7 @@ + function = "gmac"; + }; + ++ /omit-if-no-ref/ + gmac_rgmii_pins: gmac-rgmii-pins { + pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", +@@ -798,46 +886,69 @@ + drive-strength = <40>; + }; + ++ /omit-if-no-ref/ + i2c0_pins: i2c0-pins { + pins = "PB0", "PB1"; + function = "i2c0"; + }; + ++ /omit-if-no-ref/ + i2c1_pins: i2c1-pins { + pins = "PB18", "PB19"; + function = "i2c1"; + }; + ++ /omit-if-no-ref/ + i2c2_pins: i2c2-pins { + pins = "PB20", "PB21"; + function = "i2c2"; + }; + ++ /omit-if-no-ref/ + i2c3_pins: i2c3-pins { + pins = "PI0", "PI1"; + function = "i2c3"; + }; + ++ /omit-if-no-ref/ + ir0_rx_pin: ir0-rx-pin { + pins = "PB4"; + function = "ir0"; + }; + ++ /omit-if-no-ref/ + ir0_tx_pin: ir0-tx-pin { + pins = "PB3"; + function = "ir0"; + }; + ++ /omit-if-no-ref/ + ir1_rx_pin: ir1-rx-pin { + pins = "PB23"; + function = "ir1"; + }; + ++ /omit-if-no-ref/ + ir1_tx_pin: ir1-tx-pin { + pins = "PB22"; + function = "ir1"; + }; + ++ /omit-if-no-ref/ ++ lcd_lvds0_pins: lcd-lvds0-pins { ++ pins = "PD0", "PD1", "PD2", "PD3", "PD4", ++ "PD5", "PD6", "PD7", "PD8", "PD9"; ++ function = "lvds0"; ++ }; ++ ++ /omit-if-no-ref/ ++ lcd_lvds1_pins: lcd-lvds1-pins { ++ pins = "PD10", "PD11", "PD12", "PD13", "PD14", ++ "PD15", "PD16", "PD17", "PD18", "PD19"; ++ function = "lvds1"; ++ }; ++ ++ /omit-if-no-ref/ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; +@@ -846,6 +957,7 @@ + bias-pull-up; + }; + ++ /omit-if-no-ref/ + mmc2_pins: mmc2-pins { + pins = "PC6", "PC7", "PC8", + "PC9", "PC10", "PC11"; +@@ -854,6 +966,7 @@ + bias-pull-up; + }; + ++ /omit-if-no-ref/ + mmc3_pins: mmc3-pins { + pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; +@@ -862,127 +975,206 @@ + bias-pull-up; + }; + ++ /omit-if-no-ref/ + ps2_0_pins: ps2-0-pins { + pins = "PI20", "PI21"; + function = "ps2"; + }; + ++ /omit-if-no-ref/ + ps2_1_ph_pins: ps2-1-ph-pins { + pins = "PH12", "PH13"; + function = "ps2"; + }; + ++ /omit-if-no-ref/ + pwm0_pin: pwm0-pin { + pins = "PB2"; + function = "pwm"; + }; + ++ /omit-if-no-ref/ + pwm1_pin: pwm1-pin { + pins = "PI3"; + function = "pwm"; + }; + ++ /omit-if-no-ref/ + spdif_tx_pin: spdif-tx-pin { + pins = "PB13"; + function = "spdif"; + bias-pull-up; + }; + ++ /omit-if-no-ref/ + spi0_pi_pins: spi0-pi-pins { + pins = "PI11", "PI12", "PI13"; + function = "spi0"; + }; + ++ /omit-if-no-ref/ + spi0_cs0_pi_pin: spi0-cs0-pi-pin { + pins = "PI10"; + function = "spi0"; + }; + ++ /omit-if-no-ref/ + spi0_cs1_pi_pin: spi0-cs1-pi-pin { + pins = "PI14"; + function = "spi0"; + }; + ++ /omit-if-no-ref/ + spi1_pi_pins: spi1-pi-pins { + pins = "PI17", "PI18", "PI19"; + function = "spi1"; + }; + ++ /omit-if-no-ref/ + spi1_cs0_pi_pin: spi1-cs0-pi-pin { + pins = "PI16"; + function = "spi1"; + }; + ++ /omit-if-no-ref/ + spi2_pb_pins: spi2-pb-pins { + pins = "PB15", "PB16", "PB17"; + function = "spi2"; + }; + ++ /omit-if-no-ref/ + spi2_cs0_pb_pin: spi2-cs0-pb-pin { + pins = "PB14"; + function = "spi2"; + }; + ++ /omit-if-no-ref/ + spi2_pc_pins: spi2-pc-pins { + pins = "PC20", "PC21", "PC22"; + function = "spi2"; + }; + ++ /omit-if-no-ref/ + spi2_cs0_pc_pin: spi2-cs0-pc-pin { + pins = "PC19"; + function = "spi2"; + }; + ++ /omit-if-no-ref/ + uart0_pb_pins: uart0-pb-pins { + pins = "PB22", "PB23"; + function = "uart0"; + }; + ++ /omit-if-no-ref/ ++ uart0_pf_pins: uart0-pf-pins { ++ pins = "PF2", "PF4"; ++ function = "uart0"; ++ }; ++ ++ /omit-if-no-ref/ ++ uart1_pa_pins: uart1-pa-pins { ++ pins = "PA10", "PA11"; ++ function = "uart1"; ++ }; ++ ++ /omit-if-no-ref/ ++ uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins { ++ pins = "PA12", "PA13"; ++ function = "uart1"; ++ }; ++ ++ /omit-if-no-ref/ ++ uart2_pa_pins: uart2-pa-pins { ++ pins = "PA2", "PA3"; ++ function = "uart2"; ++ }; ++ ++ /omit-if-no-ref/ ++ uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins { ++ pins = "PA0", "PA1"; ++ function = "uart2"; ++ }; ++ ++ /omit-if-no-ref/ + uart2_pi_pins: uart2-pi-pins { + pins = "PI18", "PI19"; + function = "uart2"; + }; + ++ /omit-if-no-ref/ + uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins { + pins = "PI16", "PI17"; + function = "uart2"; + }; + ++ /omit-if-no-ref/ + uart3_pg_pins: uart3-pg-pins { + pins = "PG6", "PG7"; + function = "uart3"; + }; + ++ /omit-if-no-ref/ + uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { + pins = "PG8", "PG9"; + function = "uart3"; + }; + ++ /omit-if-no-ref/ + uart3_ph_pins: uart3-ph-pins { + pins = "PH0", "PH1"; + function = "uart3"; + }; + ++ /omit-if-no-ref/ ++ uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins { ++ pins = "PH2", "PH3"; ++ function = "uart3"; ++ }; ++ ++ /omit-if-no-ref/ + uart4_pg_pins: uart4-pg-pins { + pins = "PG10", "PG11"; + function = "uart4"; + }; + ++ /omit-if-no-ref/ + uart4_ph_pins: uart4-ph-pins { + pins = "PH4", "PH5"; + function = "uart4"; + }; + ++ /omit-if-no-ref/ ++ uart5_ph_pins: uart5-ph-pins { ++ pins = "PH6", "PH7"; ++ function = "uart5"; ++ }; ++ ++ /omit-if-no-ref/ + uart5_pi_pins: uart5-pi-pins { + pins = "PI10", "PI11"; + function = "uart5"; + }; + ++ /omit-if-no-ref/ ++ uart6_pa_pins: uart6-pa-pins { ++ pins = "PA12", "PA13"; ++ function = "uart6"; ++ }; ++ ++ /omit-if-no-ref/ + uart6_pi_pins: uart6-pi-pins { + pins = "PI12", "PI13"; + function = "uart6"; + }; + ++ /omit-if-no-ref/ ++ uart7_pa_pins: uart7-pa-pins { ++ pins = "PA14", "PA15"; ++ function = "uart7"; ++ }; ++ ++ /omit-if-no-ref/ + uart7_pi_pins: uart7-pi-pins { + pins = "PI20", "PI21"; + function = "uart7"; +@@ -1004,6 +1196,8 @@ + wdt: watchdog@1c20c90 { + compatible = "allwinner,sun4i-a10-wdt"; + reg = <0x01c20c90 0x10>; ++ interrupts = ; ++ clocks = <&osc24M>; + }; + + rtc: rtc@1c20d00 { +@@ -1326,8 +1520,12 @@ + snps,fixed-burst; + snps,force_sf_dma_mode; + status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; ++ ++ gmac_mdio: mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; + }; + + hstimer@1c60000 { +@@ -1341,7 +1539,7 @@ + }; + + gic: interrupt-controller@1c81000 { +- compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic"; ++ compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, +diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +index eaff6fa401..431f70234d 100644 +--- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts ++++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +@@ -107,6 +107,14 @@ + }; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu100 { ++ cpu-supply = <®_dcdc3>; ++}; ++ + &de { + status = "okay"; + }; +@@ -123,7 +131,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_sw>; + phy-handle = <&rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + allwinner,rx-delay-ps = <700>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +@@ -183,6 +191,11 @@ + status = "okay"; + }; + ++&r_cir { ++ clock-frequency = <3000000>; ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -224,6 +237,14 @@ + + #include "axp81x.dtsi" + ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ + ®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; +@@ -301,8 +322,8 @@ + + ®_dldo3 { + regulator-always-on; +- regulator-min-microvolt = <2500000>; +- regulator-max-microvolt = <2500000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pd"; + }; + +@@ -350,11 +371,37 @@ + status = "okay"; + }; + ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ clocks = <&ac100_rtc 1>; ++ clock-names = "lpo"; ++ vbat-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ ++ host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ ++ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ ++ }; ++}; ++ + &usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { + status = "okay"; + }; + + &usbphy { ++ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; + }; +diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts +index 5dba4fc310..d8326a5c68 100644 +--- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts ++++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts +@@ -60,6 +60,17 @@ + stdout-path = "serial0:115200n8"; + }; + ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -90,7 +101,7 @@ + initial-mode = <1>; /* initialize in HUB mode */ + disabled-ports = <1>; + intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ +- reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */ ++ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ + refclk-frequency = <19200000>; + }; +@@ -145,6 +156,18 @@ + }; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu100 { ++ cpu-supply = <®_dcdc3>; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ + &ehci0 { + /* GL830 USB-to-SATA bridge here */ + status = "okay"; +@@ -160,10 +183,20 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_dldo4>; + phy-handle = <&rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; ++ status = "okay"; ++}; ++ ++&hdmi { + status = "okay"; + }; + ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ + &mdio { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; +@@ -239,6 +272,14 @@ + + #include "axp81x.dtsi" + ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ + ®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; +@@ -386,11 +427,37 @@ + status = "okay"; + }; + ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4330-bt"; ++ clocks = <&ac100_rtc 1>; ++ clock-names = "lpo"; ++ vbat-supply = <®_dcdc1>; ++ vddio-supply = <®_sw>; ++ device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ ++ host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ ++ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ ++ }; ++}; ++ + &usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { + status = "okay"; + }; + + &usbphy { ++ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts +index 71fb732089..babf4cf1b2 100644 +--- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts +@@ -53,11 +53,6 @@ + }; + }; + +-&emac { +- /* LEDs changed to active high on the plus */ +- /delete-property/ allwinner,leds-active-low; +-}; +- + &mmc1 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; +diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +index 6dbf7b2e0c..b6ca45d18e 100644 +--- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +@@ -67,7 +67,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + status = "okay"; + }; + +diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts +index b8f46e2802..251bbab7d7 100644 +--- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts +@@ -70,6 +70,21 @@ + }; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "orangepi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "orangepi:red:status"; ++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; +@@ -88,6 +103,10 @@ + status = "okay"; + }; + ++&ehci0 { ++ status = "okay"; ++}; ++ + &hdmi { + status = "okay"; + }; +@@ -132,8 +151,27 @@ + status = "okay"; + }; + ++&ohci0 { ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pa_pins>; + status = "okay"; + }; ++ ++&usb_otg { ++ /* ++ * According to schematics CN1 MicroUSB port can be used to take ++ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB ++ * port cannot provide power externally even if the board is powered ++ * via GPIO pins. It thus makes sense to force peripheral mode. ++ */ ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +index 15c22b06fc..47954551f5 100644 +--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts ++++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +@@ -120,7 +120,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + phy-supply = <®_dc1sw>; + status = "okay"; + }; +@@ -198,16 +198,16 @@ + }; + + ®_dc1sw { +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3000000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + regulator-name = "vcc-gmac-phy"; + }; + + ®_dcdc1 { + regulator-always-on; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3000000>; +- regulator-name = "vcc-3v0"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; + }; + + ®_dcdc2 { +diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts b/arch/arm/dts/sun9i-a80-cubieboard4.dts +index 85da85faf8..484b93df20 100644 +--- a/arch/arm/dts/sun9i-a80-cubieboard4.dts ++++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts +@@ -89,31 +89,23 @@ + vga-dac { + compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac"; + vdd-supply = <®_dcdc1>; +- #address-cells = <1>; +- #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { +- #address-cells = <1>; +- #size-cells = <0>; + reg = <0>; + +- vga_dac_in: endpoint@0 { +- reg = <0>; ++ vga_dac_in: endpoint { + remote-endpoint = <&tcon0_out_vga>; + }; + }; + + port@1 { +- #address-cells = <1>; +- #size-cells = <0>; + reg = <1>; + +- vga_dac_out: endpoint@0 { +- reg = <0>; ++ vga_dac_out: endpoint { + remote-endpoint = <&vga_con_in>; + }; + }; +@@ -133,12 +125,27 @@ + status = "okay"; + }; + ++&gmac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac_rgmii_pins>; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <®_cldo1>; ++ status = "okay"; ++}; ++ + &i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + status = "okay"; + }; + ++&mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +@@ -183,10 +190,26 @@ + clocks = <&ac100_rtc 0>; + }; + ++&pio { ++ vcc-pa-supply = <®_ldo_io1>; ++ vcc-pb-supply = <®_aldo2>; ++ vcc-pc-supply = <®_dcdc1>; ++ vcc-pd-supply = <®_dc1sw>; ++ vcc-pe-supply = <®_eldo2>; ++ vcc-pf-supply = <®_dcdc1>; ++ vcc-pg-supply = <®_ldo_io0>; ++ vcc-ph-supply = <®_dcdc1>; ++}; ++ + &r_ir { + status = "okay"; + }; + ++&r_pio { ++ vcc-pl-supply = <®_dldo2>; ++ vcc-pm-supply = <®_eldo3>; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -217,6 +240,10 @@ + /* unused */ + }; + ++ reg_dc1sw: dc1sw { ++ regulator-name = "vcc-pd"; ++ }; ++ + reg_dc5ldo: dc5ldo { + regulator-always-on; + regulator-min-microvolt = <800000>; +@@ -271,7 +298,6 @@ + }; + + reg_dldo2: dldo2 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pl"; +@@ -290,14 +316,12 @@ + }; + + reg_eldo3: eldo3 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pm-codec-io1"; + }; + + reg_ldo_io0: ldo_io0 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pg"; +@@ -385,6 +409,14 @@ + */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; ++ /* ++ * The PHY requires 20ms after all voltages ++ * are applied until core logic is ready and ++ * 30ms after the reset pin is de-asserted. ++ * Set a 100ms delay to account for PMIC ++ * ramp time and board traces. ++ */ ++ regulator-enable-ramp-delay = <100000>; + regulator-name = "vcc-gmac-phy"; + }; + +@@ -464,8 +496,7 @@ + }; + + &tcon0_out { +- tcon0_out_vga: endpoint@0 { +- reg = <0>; ++ tcon0_out_vga: endpoint { + remote-endpoint = <&vga_dac_in>; + }; + }; +diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts +index 58a199b0e4..5c3580d712 100644 +--- a/arch/arm/dts/sun9i-a80-optimus.dts ++++ b/arch/arm/dts/sun9i-a80-optimus.dts +@@ -82,7 +82,7 @@ + + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; +- pinctrl-names = "default"; ++ regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; +@@ -91,7 +91,7 @@ + + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; +- pinctrl-names = "default"; ++ regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; +@@ -120,6 +120,21 @@ + status = "okay"; + }; + ++&gmac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac_rgmii_pins>; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <®_cldo1>; ++ status = "okay"; ++}; ++ ++&mdio { ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +@@ -172,10 +187,26 @@ + clocks = <&ac100_rtc 0>; + }; + ++&pio { ++ vcc-pa-supply = <®_ldo_io1>; ++ vcc-pb-supply = <®_aldo2>; ++ vcc-pc-supply = <®_dcdc1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_eldo2>; ++ vcc-pf-supply = <®_dcdc1>; ++ vcc-pg-supply = <®_ldo_io0>; ++ vcc-ph-supply = <®_dcdc1>; ++}; ++ + &r_ir { + status = "okay"; + }; + ++&r_pio { ++ vcc-pl-supply = <®_dldo2>; ++ vcc-pm-supply = <®_eldo3>; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -213,6 +244,10 @@ + regulator-name = "vdd-cpus-09-usbh"; + }; + ++ dc1sw { ++ /* unused */ ++ }; ++ + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; +@@ -260,7 +295,6 @@ + }; + + reg_dldo2: dldo2 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pl"; +@@ -279,14 +313,12 @@ + }; + + reg_eldo3: eldo3 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pm-codec-io1"; + }; + + reg_ldo_io0: ldo_io0 { +- regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pg"; +@@ -374,6 +406,14 @@ + */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; ++ /* ++ * The PHY requires 20ms after all voltages ++ * are applied until core logic is ready and ++ * 30ms after the reset pin is de-asserted. ++ * Set a 100ms delay to account for PMIC ++ * ramp time and board traces. ++ */ ++ regulator-enable-ramp-delay = <100000>; + regulator-name = "vcc-gmac-phy"; + }; + +diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +index 39263e74fb..8e5cb3b3fd 100644 +--- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi ++++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +@@ -126,7 +126,7 @@ + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; +- phy-mode = "rgmii"; ++ phy-mode = "rgmii-id"; + + status = "okay"; + }; +-- +2.29.2 + diff --git a/uboot-tools.spec b/uboot-tools.spec index d5d0f11..9cbcc22 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.04 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -34,6 +34,8 @@ Patch12: rk3399-Pinebook-pro-EDP-support.patch Patch13: Raspberry-Pi-400-Compute-Module-4-support.patch Patch14: Raspberry-Pi-4-PCIe-handover.patch Patch15: rng-Add-iProc-RNG200-driver.patch +# Fixes for Allwinner network issues +Patch16: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch BuildRequires: bc BuildRequires: dtc @@ -234,6 +236,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Feb 10 2021 Peter Robinson - 2021.04-0.2.rc1 +- Fixes for network issues on some Allwinner devices + * Mon Feb 01 2021 Peter Robinson - 2021.04-0.1.rc1 - Update to 2021.04 RC1 - Add new upstream devices diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch index 68db8b9..5417866 100644 --- a/uefi-use-Fedora-specific-path-name.patch +++ b/uefi-use-Fedora-specific-path-name.patch @@ -1,7 +1,7 @@ -From d8fcb72d566b0ebca1613555ac13c0798817487e Mon Sep 17 00:00:00 2001 +From 308c4ac71c439b483bd69ed9e387cc1a56566af9 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 24 Nov 2020 10:37:28 +0000 -Subject: [PATCH 2/2] use Fedora specific EFI path/name +Date: Mon, 8 Feb 2021 10:11:39 +0000 +Subject: [PATCH] use Fedora specific EFI path/name Signed-off-by: Peter Robinson --- @@ -9,7 +9,7 @@ Signed-off-by: Peter Robinson 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 769477cd80e..22ce3685758 100644 +index 3d186b6d20..eda57e1707 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -92,9 +92,9 @@ @@ -24,7 +24,7 @@ index 769477cd80e..22ce3685758 100644 #elif defined(CONFIG_X86_RUN_32BIT) #define BOOTEFI_NAME "bootia32.efi" #elif defined(CONFIG_X86_RUN_64BIT) -@@ -132,7 +132,7 @@ +@@ -140,7 +140,7 @@ \ "boot_efi_binary=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ @@ -33,8 +33,8 @@ index 769477cd80e..22ce3685758 100644 "if fdt addr ${fdt_addr_r}; then " \ "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ "else " \ -@@ -169,9 +169,9 @@ - "run boot_efi_binary\0" \ +@@ -177,9 +177,9 @@ + "run boot_efi_binary\0" \ "scan_dev_for_efi=" \ "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ - "efi/boot/"BOOTEFI_NAME"; then " \ From 53c3d27d796ea30d63926d3de9b339f32fe05051 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 10 Feb 2021 12:02:50 +0000 Subject: [PATCH 132/351] drop sun9i boards which never had eth support anyway --- ...r-sync-from-linux-for-RGMII-RX-TX-de.patch | 278 +----------------- arm-boards | 3 - 2 files changed, 2 insertions(+), 279 deletions(-) diff --git a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch index fe75a7a..48f87c1 100644 --- a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +++ b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch @@ -1,4 +1,4 @@ -From d6aa8909c2099371333c83546d26d46a3b71ba48 Mon Sep 17 00:00:00 2001 +From 5322208dbdf97b2d618364fced3420d209a8dba0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 10 Feb 2021 11:01:01 +0000 Subject: [PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay @@ -49,10 +49,8 @@ Signed-off-by: Peter Robinson arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- - arch/arm/dts/sun9i-a80-cubieboard4.dts | 61 +++-- - arch/arm/dts/sun9i-a80-optimus.dts | 50 +++- arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- - 43 files changed, 752 insertions(+), 338 deletions(-) + 41 files changed, 661 insertions(+), 318 deletions(-) diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 883f217efb..e5e840b9fb 100644 @@ -2378,278 +2376,6 @@ index 15c22b06fc..47954551f5 100644 }; ®_dcdc2 { -diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts b/arch/arm/dts/sun9i-a80-cubieboard4.dts -index 85da85faf8..484b93df20 100644 ---- a/arch/arm/dts/sun9i-a80-cubieboard4.dts -+++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts -@@ -89,31 +89,23 @@ - vga-dac { - compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac"; - vdd-supply = <®_dcdc1>; -- #address-cells = <1>; -- #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { -- #address-cells = <1>; -- #size-cells = <0>; - reg = <0>; - -- vga_dac_in: endpoint@0 { -- reg = <0>; -+ vga_dac_in: endpoint { - remote-endpoint = <&tcon0_out_vga>; - }; - }; - - port@1 { -- #address-cells = <1>; -- #size-cells = <0>; - reg = <1>; - -- vga_dac_out: endpoint@0 { -- reg = <0>; -+ vga_dac_out: endpoint { - remote-endpoint = <&vga_con_in>; - }; - }; -@@ -133,12 +125,27 @@ - status = "okay"; - }; - -+&gmac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_rgmii_pins>; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; -+ phy-supply = <®_cldo1>; -+ status = "okay"; -+}; -+ - &i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - status = "okay"; - }; - -+&mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; -@@ -183,10 +190,26 @@ - clocks = <&ac100_rtc 0>; - }; - -+&pio { -+ vcc-pa-supply = <®_ldo_io1>; -+ vcc-pb-supply = <®_aldo2>; -+ vcc-pc-supply = <®_dcdc1>; -+ vcc-pd-supply = <®_dc1sw>; -+ vcc-pe-supply = <®_eldo2>; -+ vcc-pf-supply = <®_dcdc1>; -+ vcc-pg-supply = <®_ldo_io0>; -+ vcc-ph-supply = <®_dcdc1>; -+}; -+ - &r_ir { - status = "okay"; - }; - -+&r_pio { -+ vcc-pl-supply = <®_dldo2>; -+ vcc-pm-supply = <®_eldo3>; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -217,6 +240,10 @@ - /* unused */ - }; - -+ reg_dc1sw: dc1sw { -+ regulator-name = "vcc-pd"; -+ }; -+ - reg_dc5ldo: dc5ldo { - regulator-always-on; - regulator-min-microvolt = <800000>; -@@ -271,7 +298,6 @@ - }; - - reg_dldo2: dldo2 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pl"; -@@ -290,14 +316,12 @@ - }; - - reg_eldo3: eldo3 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pm-codec-io1"; - }; - - reg_ldo_io0: ldo_io0 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pg"; -@@ -385,6 +409,14 @@ - */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -+ /* -+ * The PHY requires 20ms after all voltages -+ * are applied until core logic is ready and -+ * 30ms after the reset pin is de-asserted. -+ * Set a 100ms delay to account for PMIC -+ * ramp time and board traces. -+ */ -+ regulator-enable-ramp-delay = <100000>; - regulator-name = "vcc-gmac-phy"; - }; - -@@ -464,8 +496,7 @@ - }; - - &tcon0_out { -- tcon0_out_vga: endpoint@0 { -- reg = <0>; -+ tcon0_out_vga: endpoint { - remote-endpoint = <&vga_dac_in>; - }; - }; -diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts -index 58a199b0e4..5c3580d712 100644 ---- a/arch/arm/dts/sun9i-a80-optimus.dts -+++ b/arch/arm/dts/sun9i-a80-optimus.dts -@@ -82,7 +82,7 @@ - - reg_usb1_vbus: usb1-vbus { - compatible = "regulator-fixed"; -- pinctrl-names = "default"; -+ regulator-name = "usb1-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; -@@ -91,7 +91,7 @@ - - reg_usb3_vbus: usb3-vbus { - compatible = "regulator-fixed"; -- pinctrl-names = "default"; -+ regulator-name = "usb3-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; -@@ -120,6 +120,21 @@ - status = "okay"; - }; - -+&gmac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_rgmii_pins>; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; -+ phy-supply = <®_cldo1>; -+ status = "okay"; -+}; -+ -+&mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; -@@ -172,10 +187,26 @@ - clocks = <&ac100_rtc 0>; - }; - -+&pio { -+ vcc-pa-supply = <®_ldo_io1>; -+ vcc-pb-supply = <®_aldo2>; -+ vcc-pc-supply = <®_dcdc1>; -+ vcc-pd-supply = <®_dcdc1>; -+ vcc-pe-supply = <®_eldo2>; -+ vcc-pf-supply = <®_dcdc1>; -+ vcc-pg-supply = <®_ldo_io0>; -+ vcc-ph-supply = <®_dcdc1>; -+}; -+ - &r_ir { - status = "okay"; - }; - -+&r_pio { -+ vcc-pl-supply = <®_dldo2>; -+ vcc-pm-supply = <®_eldo3>; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -213,6 +244,10 @@ - regulator-name = "vdd-cpus-09-usbh"; - }; - -+ dc1sw { -+ /* unused */ -+ }; -+ - reg_dcdc1: dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; -@@ -260,7 +295,6 @@ - }; - - reg_dldo2: dldo2 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pl"; -@@ -279,14 +313,12 @@ - }; - - reg_eldo3: eldo3 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pm-codec-io1"; - }; - - reg_ldo_io0: ldo_io0 { -- regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-pg"; -@@ -374,6 +406,14 @@ - */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -+ /* -+ * The PHY requires 20ms after all voltages -+ * are applied until core logic is ready and -+ * 30ms after the reset pin is de-asserted. -+ * Set a 100ms delay to account for PMIC -+ * ramp time and board traces. -+ */ -+ regulator-enable-ramp-delay = <100000>; - regulator-name = "vcc-gmac-phy"; - }; - diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi index 39263e74fb..8e5cb3b3fd 100644 --- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi diff --git a/arm-boards b/arm-boards index 0cf367e..a2c8d89 100644 --- a/arm-boards +++ b/arm-boards @@ -132,10 +132,7 @@ udoo udoo_neo usbarmory UTOO_P66 -vexpress_ca15_tc2 -vexpress_ca9x4 wandboard -warp warp7 Wexler_TAB7200 Wits_Pro_A20_DKT From f9b692a09ec0d19067afba8cc3b51a144b6626cd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 10 Feb 2021 14:01:29 +0000 Subject: [PATCH 133/351] few more fixes, this time for a83t SoC devices --- ...r-sync-from-linux-for-RGMII-RX-TX-de.patch | 605 +++++++++++++++++- 1 file changed, 594 insertions(+), 11 deletions(-) diff --git a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch index 48f87c1..f0d3575 100644 --- a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +++ b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch @@ -1,19 +1,23 @@ -From 5322208dbdf97b2d618364fced3420d209a8dba0 Mon Sep 17 00:00:00 2001 +From 4f26cacd28d71fd7d051b560f550863679a5f04b Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 10 Feb 2021 11:01:01 +0000 +Date: Wed, 10 Feb 2021 13:58:20 +0000 Subject: [PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay fixes Sync over a subset of the AllWinner dts changes from Linux 5.11 for the RGMII RX/TX delay network fixes. +This pulls other bits in needed to sync the whole files, the bits +are other minor fixes, or pieces of DT that don't affect U-Boot. + Signed-off-by: Peter Robinson --- + arch/arm/dts/axp81x.dtsi | 9 + arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 +- arch/arm/dts/sun50i-a64-orangepi-win.dts | 10 +- arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 10 +- - arch/arm/dts/sun50i-a64.dtsi | 34 ++- + arch/arm/dts/sun50i-a64.dtsi | 34 +- .../dts/sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + .../arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- @@ -33,25 +37,51 @@ Signed-off-by: Peter Robinson arch/arm/dts/sun7i-a20-m3.dts | 12 +- arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 12 +- arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 24 +- - arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +-- - arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 ++-- - arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +-- + arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +- + arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 +-- + arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +- arch/arm/dts/sun7i-a20-orangepi-mini.dts | 24 +- arch/arm/dts/sun7i-a20-orangepi.dts | 24 +- - arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +-- + arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +- arch/arm/dts/sun7i-a20-pcduino3.dts | 24 +- arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 12 +- arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 24 +- - arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++++++++- - arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++++- - arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++++- + arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++- + arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++- + arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++- + arch/arm/dts/sun8i-a83t.dtsi | 310 ++++++++++++++++-- arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 5 - arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- - 41 files changed, 661 insertions(+), 318 deletions(-) + 43 files changed, 947 insertions(+), 351 deletions(-) +diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi +index 043c717dce..1dfeeceabf 100644 +--- a/arch/arm/dts/axp81x.dtsi ++++ b/arch/arm/dts/axp81x.dtsi +@@ -48,6 +48,11 @@ + interrupt-controller; + #interrupt-cells = <1>; + ++ ac_power_supply: ac-power-supply { ++ compatible = "x-powers,axp813-ac-power-supply"; ++ status = "disabled"; ++ }; ++ + axp_adc: adc { + compatible = "x-powers,axp813-adc"; + #io-channel-cells = <1>; +@@ -166,4 +171,8 @@ + status = "disabled"; + }; + }; ++ ++ usb_power_supply: usb-power-supply { ++ compatible = "x-powers,axp813-usb-power-supply"; ++ }; + }; diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 883f217efb..e5e840b9fb 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -2247,6 +2277,559 @@ index 5dba4fc310..d8326a5c68 100644 usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; +diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi +index 2be23d6009..c010b27fdb 100644 +--- a/arch/arm/dts/sun8i-a83t.dtsi ++++ b/arch/arm/dts/sun8i-a83t.dtsi +@@ -50,6 +50,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -61,79 +62,91 @@ + #size-cells = <0>; + + cpu0: cpu@0 { +- clocks = <&ccu CLK_C0CPUX>; +- clock-names = "cpu"; + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C0CPUX>; + operating-points-v2 = <&cpu0_opp_table>; + cci-control-port = <&cci_control0>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <0>; ++ #cooling-cells = <2>; + }; + +- cpu@1 { ++ cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C0CPUX>; + operating-points-v2 = <&cpu0_opp_table>; + cci-control-port = <&cci_control0>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <1>; ++ #cooling-cells = <2>; + }; + +- cpu@2 { ++ cpu2: cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C0CPUX>; + operating-points-v2 = <&cpu0_opp_table>; + cci-control-port = <&cci_control0>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <2>; ++ #cooling-cells = <2>; + }; + +- cpu@3 { ++ cpu3: cpu@3 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C0CPUX>; + operating-points-v2 = <&cpu0_opp_table>; + cci-control-port = <&cci_control0>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <3>; ++ #cooling-cells = <2>; + }; + + cpu100: cpu@100 { +- clocks = <&ccu CLK_C1CPUX>; +- clock-names = "cpu"; + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C1CPUX>; + operating-points-v2 = <&cpu1_opp_table>; + cci-control-port = <&cci_control1>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <0x100>; ++ #cooling-cells = <2>; + }; + +- cpu@101 { ++ cpu101: cpu@101 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C1CPUX>; + operating-points-v2 = <&cpu1_opp_table>; + cci-control-port = <&cci_control1>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <0x101>; ++ #cooling-cells = <2>; + }; + +- cpu@102 { ++ cpu102: cpu@102 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C1CPUX>; + operating-points-v2 = <&cpu1_opp_table>; + cci-control-port = <&cci_control1>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <0x102>; ++ #cooling-cells = <2>; + }; + +- cpu@103 { ++ cpu103: cpu@103 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; ++ clocks = <&ccu CLK_C1CPUX>; + operating-points-v2 = <&cpu1_opp_table>; + cci-control-port = <&cci_control1>; + enable-method = "allwinner,sun8i-a83t-smp"; + reg = <0x103>; ++ #cooling-cells = <2>; + }; + }; + +@@ -187,11 +200,6 @@ + status = "disabled"; + }; + +- memory { +- reg = <0x40000000 0x80000000>; +- device_type = "memory"; +- }; +- + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; +@@ -306,16 +314,27 @@ + + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-a83t-de2-clk"; +- reg = <0x01000000 0x100000>; +- clocks = <&ccu CLK_PLL_DE>, +- <&ccu CLK_BUS_DE>; +- clock-names = "mod", +- "bus"; ++ reg = <0x01000000 0x10000>; ++ clocks = <&ccu CLK_BUS_DE>, ++ <&ccu CLK_PLL_DE>; ++ clock-names = "bus", ++ "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ++ rotate: rotate@1020000 { ++ compatible = "allwinner,sun8i-a83t-de2-rotate"; ++ reg = <0x1020000 0x10000>; ++ interrupts = ; ++ clocks = <&display_clocks CLK_BUS_ROT>, ++ <&display_clocks CLK_ROT>; ++ clock-names = "bus", ++ "mod"; ++ resets = <&display_clocks RST_ROT>; ++ }; ++ + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-a83t-de2-mixer-0"; + reg = <0x01100000 0x100000>; +@@ -338,6 +357,11 @@ + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; ++ ++ mixer0_out_tcon1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&tcon1_in_mixer0>; ++ }; + }; + }; + }; +@@ -356,9 +380,17 @@ + #size-cells = <0>; + + mixer1_out: port@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <1>; + +- mixer1_out_tcon1: endpoint { ++ mixer1_out_tcon0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&tcon0_in_mixer1>; ++ }; ++ ++ mixer1_out_tcon1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&tcon1_in_mixer1>; + }; + }; +@@ -425,6 +457,7 @@ + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; ++ #clock-cells = <0>; + resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + +@@ -441,11 +474,14 @@ + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; ++ ++ tcon0_in_mixer1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&mixer1_out_tcon0>; ++ }; + }; + + tcon0_out: port@1 { +- #address-cells = <1>; +- #size-cells = <0>; + reg = <1>; + }; + }; +@@ -465,9 +501,17 @@ + #size-cells = <0>; + + tcon1_in: port@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0>; + +- tcon1_in_mixer1: endpoint { ++ tcon1_in_mixer0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&mixer0_out_tcon1>; ++ }; ++ ++ tcon1_in_mixer1: endpoint@1 { ++ reg = <1>; + remote-endpoint = <&mixer1_out_tcon1>; + }; + }; +@@ -549,6 +593,31 @@ + sid: eeprom@1c14000 { + compatible = "allwinner,sun8i-a83t-sid"; + reg = <0x1c14000 0x400>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ ths_calibration: thermal-sensor-calibration@34 { ++ reg = <0x34 8>; ++ }; ++ }; ++ ++ crypto: crypto@1c15000 { ++ compatible = "allwinner,sun8i-a83t-crypto"; ++ reg = <0x01c15000 0x1000>; ++ interrupts = ; ++ resets = <&ccu RST_BUS_SS>; ++ clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; ++ clock-names = "bus", "mod"; ++ }; ++ ++ msgbox: mailbox@1c17000 { ++ compatible = "allwinner,sun8i-a83t-msgbox", ++ "allwinner,sun6i-a31-msgbox"; ++ reg = <0x01c17000 0x1000>; ++ clocks = <&ccu CLK_BUS_MSGBOX>; ++ resets = <&ccu RST_BUS_MSGBOX>; ++ interrupts = ; ++ #mbox-cells = <1>; + }; + + usb_otg: usb@1c19000 { +@@ -562,6 +631,7 @@ + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; ++ dr_mode = "otg"; + status = "disabled"; + }; + +@@ -649,6 +719,20 @@ + #interrupt-cells = <3>; + #gpio-cells = <3>; + ++ /omit-if-no-ref/ ++ csi_8bit_parallel_pins: csi-8bit-parallel-pins { ++ pins = "PE0", "PE2", "PE3", "PE6", "PE7", ++ "PE8", "PE9", "PE10", "PE11", ++ "PE12", "PE13"; ++ function = "csi"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi_mclk_pin: csi-mclk-pin { ++ pins = "PE1"; ++ function = "csi"; ++ }; ++ + emac_rgmii_pins: emac-rgmii-pins { + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD11", "PD12", "PD13", "PD14", "PD18", +@@ -676,6 +760,12 @@ + function = "i2c1"; + }; + ++ /omit-if-no-ref/ ++ i2c2_pe_pins: i2c2-pe-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ + i2c2_ph_pins: i2c2-ph-pins { + pins = "PH4", "PH5"; + function = "i2c2"; +@@ -747,10 +837,16 @@ + pins = "PG8", "PG9"; + function = "uart1"; + }; ++ ++ /omit-if-no-ref/ ++ uart2_pb_pins: uart2-pb-pins { ++ pins = "PB0", "PB1"; ++ function = "uart2"; ++ }; + }; + + timer@1c20c00 { +- compatible = "allwinner,sun4i-a10-timer"; ++ compatible = "allwinner,sun8i-a23-timer"; + reg = <0x01c20c00 0xa0>; + interrupts = , + ; +@@ -852,6 +948,39 @@ + status = "disabled"; + }; + ++ uart2: serial@1c28800 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28800 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ccu CLK_BUS_UART2>; ++ resets = <&ccu RST_BUS_UART2>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@1c28c00 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28c00 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ccu CLK_BUS_UART3>; ++ resets = <&ccu RST_BUS_UART3>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@1c29000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c29000 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ccu CLK_BUS_UART4>; ++ resets = <&ccu RST_BUS_UART4>; ++ status = "disabled"; ++ }; ++ + i2c0: i2c@1c2ac00 { + compatible = "allwinner,sun8i-a83t-i2c", + "allwinner,sun6i-a31-i2c"; +@@ -898,12 +1027,10 @@ + reg = <0x01c30000 0x104>; + interrupts = ; + interrupt-names = "macirq"; +- resets = <&ccu 13>; +- reset-names = "stmmaceth"; +- clocks = <&ccu 27>; ++ clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; +- #address-cells = <1>; +- #size-cells = <0>; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; + status = "disabled"; + + mdio: mdio { +@@ -914,7 +1041,7 @@ + }; + + gic: interrupt-controller@1c81000 { +- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; ++ compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, +@@ -924,6 +1051,21 @@ + interrupts = ; + }; + ++ csi: camera@1cb0000 { ++ compatible = "allwinner,sun8i-a83t-csi"; ++ reg = <0x01cb0000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CSI>, ++ <&ccu CLK_CSI_SCLK>, ++ <&ccu CLK_DRAM_CSI>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_CSI>; ++ status = "disabled"; ++ ++ csi_in: port { ++ }; ++ }; ++ + hdmi: hdmi@1ee0000 { + compatible = "allwinner,sun8i-a83t-dw-hdmi"; + reg = <0x01ee0000 0x10000>; +@@ -935,7 +1077,7 @@ + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; +- phy-names = "hdmi-phy"; ++ phy-names = "phy"; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins>; + status = "disabled"; +@@ -981,7 +1123,7 @@ + compatible = "allwinner,sun8i-a83t-r-ccu"; + reg = <0x01f01400 0x400>; + clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, +- <&ccu 6>; ++ <&ccu CLK_PLL_PERIPH>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; + #clock-cells = <1>; + #reset-cells = <1>; +@@ -992,6 +1134,26 @@ + reg = <0x1f01c00 0x400>; + }; + ++ r_cir: ir@1f02000 { ++ compatible = "allwinner,sun8i-a83t-ir", ++ "allwinner,sun6i-a31-ir"; ++ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; ++ clock-names = "apb", "ir"; ++ resets = <&r_ccu RST_APB0_IR>; ++ interrupts = ; ++ reg = <0x01f02000 0x400>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_cir_pin>; ++ status = "disabled"; ++ }; ++ ++ r_lradc: lradc@1f03c00 { ++ compatible = "allwinner,sun8i-a83t-r-lradc"; ++ reg = <0x01f03c00 0x100>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ + r_pio: pinctrl@1f02c00 { + compatible = "allwinner,sun8i-a83t-r-pinctrl"; + reg = <0x01f02c00 0x400>; +@@ -1004,6 +1166,11 @@ + interrupt-controller; + #interrupt-cells = <3>; + ++ r_cir_pin: r-cir-pin { ++ pins = "PL12"; ++ function = "s_cir_rx"; ++ }; ++ + r_rsb_pins: r-rsb-pins { + pins = "PL0", "PL1"; + function = "s_rsb"; +@@ -1026,5 +1193,82 @@ + #address-cells = <1>; + #size-cells = <0>; + }; ++ ++ ths: thermal-sensor@1f04000 { ++ compatible = "allwinner,sun8i-a83t-ths"; ++ reg = <0x01f04000 0x100>; ++ interrupts = ; ++ nvmem-cells = <&ths_calibration>; ++ nvmem-cell-names = "calibration"; ++ #thermal-sensor-cells = <1>; ++ }; ++ }; ++ ++ thermal-zones { ++ cpu0_thermal: cpu0-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 0>; ++ ++ trips { ++ cpu0_hot: cpu-hot { ++ temperature = <80000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu0_very_hot: cpu-very-hot { ++ temperature = <100000>; ++ hysteresis = <0>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ cpu-hot-limit { ++ trip = <&cpu0_hot>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ cpu1_thermal: cpu1-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 1>; ++ ++ trips { ++ cpu1_hot: cpu-hot { ++ temperature = <80000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu1_very_hot: cpu-very-hot { ++ temperature = <100000>; ++ hysteresis = <0>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ cpu-hot-limit { ++ trip = <&cpu1_hot>; ++ cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ gpu_thermal: gpu-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 2>; ++ }; + }; + }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts index 71fb732089..babf4cf1b2 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts From eb1de640aafa88d95de1fc0f1d7fbf76ceb59991 Mon Sep 17 00:00:00 2001 From: Dennis Gilmore Date: Mon, 15 Feb 2021 18:53:17 -0600 Subject: [PATCH 134/351] build SPI and UART images for helios4 and clearfog Signed-off-by: Dennis Gilmore --- uboot-tools.spec | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 9cbcc22..20510b4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -130,6 +130,18 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ + # build spi, and uart images for mvebu boards + mvebu=(clearfog helios4) + if [[ " ${mvebu[*]} " == *" $board "* ]]; then + for target in spi uart + do + echo "Board: $board Target: $target" + sed -i -e '/CONFIG_MVEBU_SPL_BOOT_DEVICE_/d' configs/$(echo $board)_defconfig + echo CONFIG_MVEBU_SPL_BOOT_DEVICE_${target^^}=y >> configs/$(echo $board)_defconfig + make $(echo $board)_defconfig O=builds/$(echo $board-$target)/ + %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board-$target)/ + done + fi done %endif @@ -144,7 +156,7 @@ mkdir -p $RPM_BUILD_ROOT%{_mandir}/man1 mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ %ifarch aarch64 -for board in $(cat %{_arch}-boards) +for board in $(ls builds) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin @@ -157,7 +169,7 @@ done %endif %ifarch %{arm} -for board in $(cat %{_arch}-boards) +for board in $(ls builds) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin @@ -170,7 +182,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ done # Bit of a hack to remove binaries we don't use as they're large -for board in $(cat %{_arch}-boards) +for board in $(ls builds) do if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.* @@ -184,10 +196,14 @@ do if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin fi + if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-spl.kwb ]; then + rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.* + rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin + fi done %endif -for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes +for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes kwboot do install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir} done @@ -198,10 +214,9 @@ install -p -m 0755 builds/tools/env/fw_printenv $RPM_BUILD_ROOT%{_bindir} install -p -m 0644 tools/env/fw_env.config $RPM_BUILD_ROOT%{_sysconfdir} -# Copy sone useful docs over +# Copy some useful docs over mkdir -p builds/docs cp -p board/hisilicon/hikey/README builds/docs/README.hikey -cp -p board/hisilicon/hikey/README builds/docs/README.hikey cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820 cp -p board/rockchip/evb_rk3399/README builds/docs/README.evb_rk3399 cp -p board/solidrun/clearfog/README builds/docs/README.clearfog @@ -236,6 +251,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Dec 06 2020 Dennis Gilmore - 2021.04-0.3.rc1 +- build spi and uart images in addition to mmc for helios4 and clearfog + * Wed Feb 10 2021 Peter Robinson - 2021.04-0.2.rc1 - Fixes for network issues on some Allwinner devices From 422d33a8783ff05f712baee5ed42530316ae184a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 16 Feb 2021 09:40:03 +0000 Subject: [PATCH 135/351] spec file cleanups --- uboot-tools.spec | 50 ++++++++++++++++++++++-------------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 20510b4..493894b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -150,19 +150,18 @@ done %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ %install -mkdir -p $RPM_BUILD_ROOT%{_bindir} -mkdir -p $RPM_BUILD_ROOT%{_sysconfdir} -mkdir -p $RPM_BUILD_ROOT%{_mandir}/man1 -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ +mkdir -p %{buildroot}%{_bindir} +mkdir -p %{buildroot}%{_mandir}/man1 +mkdir -p %{buildroot}%{_datadir}/uboot/ %ifarch aarch64 for board in $(ls builds) do -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ + mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/ for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ + install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ fi done done @@ -171,11 +170,11 @@ done %ifarch %{arm} for board in $(ls builds) do -mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ + mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/ for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ + install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ fi done @@ -184,35 +183,33 @@ done # Bit of a hack to remove binaries we don't use as they're large for board in $(ls builds) do - if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.* + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.* fi - if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/MLO ]; then - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/MLO ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin fi - if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/SPL ]; then - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/SPL ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin fi - if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin fi - if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-spl.kwb ]; then - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.* - rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.kwb ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.* + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin fi done %endif for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes kwboot do -install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir} +install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done -install -p -m 0644 doc/mkimage.1 $RPM_BUILD_ROOT%{_mandir}/man1 +install -p -m 0644 doc/mkimage.1 %{buildroot}%{_mandir}/man1 -install -p -m 0755 builds/tools/env/fw_printenv $RPM_BUILD_ROOT%{_bindir} -( cd $RPM_BUILD_ROOT%{_bindir}; ln -sf fw_printenv fw_setenv ) - -install -p -m 0644 tools/env/fw_env.config $RPM_BUILD_ROOT%{_sysconfdir} +install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} +( cd %{buildroot}%{_bindir}; ln -sf fw_printenv fw_setenv ) # Copy some useful docs over mkdir -p builds/docs @@ -238,7 +235,6 @@ cp -p board/warp7/README builds/docs/README.warp7 %{_bindir}/* %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ -%config(noreplace) %{_sysconfdir}/fw_env.config %ifarch aarch64 %files -n uboot-images-armv8 @@ -251,7 +247,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Sun Dec 06 2020 Dennis Gilmore - 2021.04-0.3.rc1 +* Sun Dec 06 2020 Dennis Gilmore - build spi and uart images in addition to mmc for helios4 and clearfog * Wed Feb 10 2021 Peter Robinson - 2021.04-0.2.rc1 From 3fb46c33cddc58e84f2c902eb747957b91fe0ae8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 16 Feb 2021 09:53:49 +0000 Subject: [PATCH 136/351] 2021.04 RC2 --- ...erry-Pi-400-Compute-Module-4-support.patch | 74 ++++++++----------- sources | 2 +- uboot-tools.spec | 11 +-- 3 files changed, 38 insertions(+), 49 deletions(-) diff --git a/Raspberry-Pi-400-Compute-Module-4-support.patch b/Raspberry-Pi-400-Compute-Module-4-support.patch index f68d498..7f72d73 100644 --- a/Raspberry-Pi-400-Compute-Module-4-support.patch +++ b/Raspberry-Pi-400-Compute-Module-4-support.patch @@ -1,6 +1,6 @@ -From 7e0e7e5a6f9cfe9ab36635f6867bbf25a27e70cd Mon Sep 17 00:00:00 2001 +From 253ed902965d9618030f902eb7a66b73e4b99d55 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Mon, 1 Feb 2021 21:34:02 +0000 +Date: Tue, 16 Feb 2021 09:52:03 +0000 Subject: [PATCH] Raspberry Pi 400 Compute Module 4 support Signed-off-by: Peter Robinson @@ -20,10 +20,10 @@ Signed-off-by: Peter Robinson drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++ drivers/core/ofnode.c | 9 ++++ drivers/core/read.c | 6 +++ - drivers/mmc/sdhci.c | 12 +++-- + drivers/mmc/sdhci.c | 10 ++-- drivers/pci/pcie_brcmstb.c | 12 ++--- drivers/usb/host/xhci-mem.c | 45 +++++++++-------- - drivers/usb/host/xhci-ring.c | 13 +++-- + drivers/usb/host/xhci-ring.c | 15 +++--- drivers/usb/host/xhci.c | 4 +- drivers/video/bcm2835.c | 1 + include/dm/device.h | 13 +++++ @@ -285,10 +285,10 @@ index dbfe51c6e8..00554af499 100644 bool "Support register maps" depends on DM diff --git a/drivers/core/device.c b/drivers/core/device.c -index 8629df8def..2ce9cbbe11 100644 +index 82a0098960..625134921d 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c -@@ -421,6 +421,43 @@ fail: +@@ -422,6 +422,43 @@ fail: return ret; } @@ -332,7 +332,7 @@ index 8629df8def..2ce9cbbe11 100644 int device_probe(struct udevice *dev) { const struct driver *drv; -@@ -483,6 +520,10 @@ int device_probe(struct udevice *dev) +@@ -484,6 +521,10 @@ int device_probe(struct udevice *dev) goto fail; } @@ -433,10 +433,10 @@ index bbe80136ba..5bc6ca1de0 100644 const __be32 *addrp, u64 size, unsigned int flags, const char *name, struct resource *r) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c -index 7a5f4c0a73..1463c41c6e 100644 +index 26c9d04056..fa0bd2a9c4 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c -@@ -926,6 +926,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) +@@ -927,6 +927,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) return fdt_translate_dma_address(gd->fdt_blob, ofnode_to_offset(node), in_addr); } @@ -453,10 +453,10 @@ index 7a5f4c0a73..1463c41c6e 100644 { if (ofnode_is_np(node)) diff --git a/drivers/core/read.c b/drivers/core/read.c -index 4d9b5dd038..665424b2ff 100644 +index 14fd1214d6..4307ca4579 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c -@@ -340,6 +340,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) +@@ -341,6 +341,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); } @@ -470,24 +470,10 @@ index 4d9b5dd038..665424b2ff 100644 { if (of_live_active()) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 0628934312..62e4f53b8b 100644 +index ed0dc17325..5f18d472bd 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c -@@ -14,12 +14,12 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include --#include - - static void sdhci_reset(struct sdhci_host *host, u8 mask) - { -@@ -73,6 +73,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) +@@ -74,6 +74,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, int *is_aligned, int trans_bytes) { @@ -495,7 +481,7 @@ index 0628934312..62e4f53b8b 100644 unsigned char ctrl; void *buf; -@@ -103,8 +104,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, +@@ -104,8 +105,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, mmc_get_dma_dir(data)); if (host->flags & USE_SDMA) { @@ -506,7 +492,7 @@ index 0628934312..62e4f53b8b 100644 } #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) else if (host->flags & (USE_ADMA | USE_ADMA64)) { -@@ -162,8 +163,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) +@@ -163,8 +164,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; @@ -715,7 +701,7 @@ index b002d6f166..83147d51b5 100644 /* diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c -index d708fc928b..6b31ad4398 100644 +index d6c47d579b..bd69a19995 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -275,10 +275,13 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id, @@ -751,15 +737,17 @@ index d708fc928b..6b31ad4398 100644 void *last_transfer_trb_addr; int available_length; -@@ -723,7 +726,7 @@ again: +@@ -723,8 +726,8 @@ again: return -ETIMEDOUT; } -- if ((uintptr_t)(le64_to_cpu(event->trans_event.buffer)) +- if ((uintptr_t)(le64_to_cpu(event->trans_event.buffer)) != +- (uintptr_t)virt_to_phys(last_transfer_trb_addr)) { + if ((uintptr_t)(le64_to_cpu(xhci_bus_to_virt(ctrl, event->trans_event.buffer))) - != (uintptr_t)last_transfer_trb_addr) { ++ != (uintptr_t)virt_to_phys(last_transfer_trb_addr)) { available_length -= (int)EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)); + xhci_acknowledge_event(ctrl); @@ -884,7 +887,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, if (length > 0) { if (req->requesttype & USB_DIR_IN) @@ -804,10 +792,10 @@ index 9326999cd3..c2962932c9 100644 { } }; diff --git a/include/dm/device.h b/include/dm/device.h -index e665558444..b614ff1a69 100644 +index 28533ce0b6..bb9faa0ed9 100644 --- a/include/dm/device.h +++ b/include/dm/device.h -@@ -148,6 +148,8 @@ enum { +@@ -159,6 +159,8 @@ enum { * When CONFIG_DEVRES is enabled, devm_kmalloc() and friends will * add to this list. Memory so-allocated will be freed * automatically when the device is removed / unbound @@ -816,7 +804,7 @@ index e665558444..b614ff1a69 100644 */ struct udevice { const struct driver *driver; -@@ -172,6 +174,9 @@ struct udevice { +@@ -183,6 +185,9 @@ struct udevice { #ifdef CONFIG_DEVRES struct list_head devres_head; #endif @@ -826,7 +814,7 @@ index e665558444..b614ff1a69 100644 }; /* Maximum sequence number supported */ -@@ -213,6 +218,14 @@ static inline ofnode dev_ofnode(const struct udevice *dev) +@@ -224,6 +229,14 @@ static inline ofnode dev_ofnode(const struct udevice *dev) /* Returns non-zero if the device is active (probed and not removed) */ #define device_active(dev) (dev_get_flags(dev) & DM_FLAG_ACTIVATED) @@ -870,10 +858,10 @@ index 3fa1ffce81..ee21d5cf4f 100644 * of_get_address() - obtain an address from a node * diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h -index 5b088650d3..c4680fbbaa 100644 +index 5318d65035..2c0597c407 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h -@@ -996,6 +996,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); +@@ -998,6 +998,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); */ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr); @@ -897,7 +885,7 @@ index 5b088650d3..c4680fbbaa 100644 * ofnode_device_is_compatible() - check if the node is compatible with compat * diff --git a/include/dm/read.h b/include/dm/read.h -index 03ba98232a..da3763d245 100644 +index 97575bcad0..5bf3405614 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -647,6 +647,21 @@ u64 dev_translate_address(const struct udevice *dev, const fdt32_t *in_addr); @@ -922,7 +910,7 @@ index 03ba98232a..da3763d245 100644 /** * dev_read_alias_highest_id - Get highest alias id for the given stem * @stem: Alias stem to be examined -@@ -1004,6 +1019,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, +@@ -1005,6 +1020,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); } @@ -1067,10 +1055,10 @@ index e70e50f402..6275ec56ea 100644 obj-$(CONFIG_ACPIGEN) += acpi.o obj-$(CONFIG_ACPIGEN) += acpigen.o diff --git a/test/dm/core.c b/test/dm/core.c -index 1f5ca570dc..855449aac2 100644 +index ce31d86c7d..35ca689d64 100644 --- a/test/dm/core.c +++ b/test/dm/core.c -@@ -1085,3 +1085,33 @@ static int dm_test_all_have_seq(struct unit_test_state *uts) +@@ -1180,3 +1180,33 @@ static int dm_test_all_have_seq(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_all_have_seq, UT_TESTF_SCAN_PDATA); diff --git a/sources b/sources index 77f0525..6d65d26 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04-rc1.tar.bz2) = ea3adadd7f41d6801487a5c5189b664fd3351c24a57fbf0885f2548f8aebb2fc89f95214e0f76d6623d5ef8ea518eaaef50f117ca040f8b723e5d620e8014e9f +SHA512 (u-boot-2021.04-rc2.tar.bz2) = 7bf07f15e0c5f5e63ef8cb9568278ea7c209e484bbb599c47b22a8d2e5c007cc204eec365e5328dea3e7b016cd6ba0cb4c917330cc76163b1016f7c7762ad1bf diff --git a/uboot-tools.spec b/uboot-tools.spec index 493894b..55f2632 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2021.04 @@ -20,8 +20,6 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: uefi-use-Fedora-specific-path-name.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -# Ajust the U-Boot offsets in SPL to take less space -#Patch4: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement # AllWinner improvements @@ -29,7 +27,7 @@ Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch12: rk3399-Pinebook-pro-EDP-support.patch +#Patch12: rk3399-Pinebook-pro-EDP-support.patch # Raspberry Pi improvements Patch13: Raspberry-Pi-400-Compute-Module-4-support.patch Patch14: Raspberry-Pi-4-PCIe-handover.patch @@ -247,7 +245,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Sun Dec 06 2020 Dennis Gilmore +* Tue Feb 16 2021 Peter Robinson - 2021.04-0.3.rc2 +- Update to 2021.04 RC2 + +* Mon Feb 15 2021 Dennis Gilmore - build spi and uart images in addition to mmc for helios4 and clearfog * Wed Feb 10 2021 Peter Robinson - 2021.04-0.2.rc1 From f458c5418f543b8eeaafa59760d1119260f68b00 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 8 Mar 2021 14:59:13 +0000 Subject: [PATCH 137/351] 2021.04 RC3 --- Raspberry-Pi-4-PCIe-handover.patch | 64 - ...erry-Pi-400-Compute-Module-4-support.patch | 1195 ----------------- rk3399-Pinebook-pro-EDP-support.patch | 1188 +++++++++++++--- rng-Add-iProc-RNG200-driver.patch | 450 ------- sources | 2 +- uboot-tools.spec | 15 +- 6 files changed, 1006 insertions(+), 1908 deletions(-) delete mode 100644 Raspberry-Pi-4-PCIe-handover.patch delete mode 100644 Raspberry-Pi-400-Compute-Module-4-support.patch delete mode 100644 rng-Add-iProc-RNG200-driver.patch diff --git a/Raspberry-Pi-4-PCIe-handover.patch b/Raspberry-Pi-4-PCIe-handover.patch deleted file mode 100644 index 308db67..0000000 --- a/Raspberry-Pi-4-PCIe-handover.patch +++ /dev/null @@ -1,64 +0,0 @@ -From ced27461c009f208f880fa6bbc34c216e103eca6 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 1 Feb 2021 21:39:36 +0000 -Subject: [PATCH] Raspberry Pi 4 PCIe handover - -Signed-off-by: Peter Robinson ---- - drivers/pci/pcie_brcmstb.c | 19 +++++++++++++++++++ - drivers/usb/host/xhci-pci.c | 2 +- - 2 files changed, 20 insertions(+), 1 deletion(-) - -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index bd645d7896..398d7e1849 100644 ---- a/drivers/pci/pcie_brcmstb.c -+++ b/drivers/pci/pcie_brcmstb.c -@@ -577,6 +577,24 @@ static int brcm_pcie_probe(struct udevice *dev) - return 0; - } - -+static int brcm_pcie_remove(struct udevice *dev) -+{ -+ struct brcm_pcie *pcie = dev_get_priv(dev); -+ void __iomem *base = pcie->base; -+ -+ /* Assert fundamental reset */ -+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK); -+ -+ /* Turn off SerDes */ -+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); -+ -+ /* Shutdown bridge */ -+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); -+ -+ return 0; -+} -+ - static int brcm_pcie_of_to_plat(struct udevice *dev) - { - struct brcm_pcie *pcie = dev_get_priv(dev); -@@ -616,6 +634,7 @@ U_BOOT_DRIVER(pcie_brcm_base) = { - .ops = &brcm_pcie_ops, - .of_match = brcm_pcie_ids, - .probe = brcm_pcie_probe, -+ .remove = brcm_pcie_remove, - .of_to_plat = brcm_pcie_of_to_plat, - .priv_auto = sizeof(struct brcm_pcie), - }; -diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c -index 2b445f21b5..d626929953 100644 ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -61,7 +61,7 @@ U_BOOT_DRIVER(xhci_pci) = { - .ops = &xhci_usb_ops, - .plat_auto = sizeof(struct usb_plat), - .priv_auto = sizeof(struct xhci_ctrl), -- .flags = DM_FLAG_ALLOC_PRIV_DMA, -+ .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA, - }; - - static struct pci_device_id xhci_pci_supported[] = { --- -2.29.2 - diff --git a/Raspberry-Pi-400-Compute-Module-4-support.patch b/Raspberry-Pi-400-Compute-Module-4-support.patch deleted file mode 100644 index 7f72d73..0000000 --- a/Raspberry-Pi-400-Compute-Module-4-support.patch +++ /dev/null @@ -1,1195 +0,0 @@ -From 253ed902965d9618030f902eb7a66b73e4b99d55 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 16 Feb 2021 09:52:03 +0000 -Subject: [PATCH] Raspberry Pi 400 Compute Module 4 support - -Signed-off-by: Peter Robinson ---- - arch/sandbox/dts/test.dts | 21 ++++++++ - board/raspberrypi/rpi/rpi.c | 10 ++++ - common/fdt_support.c | 73 ++++++++++++++++++++++++++++ - configs/rpi_4_32b_defconfig | 1 + - configs/rpi_4_defconfig | 1 + - configs/rpi_arm64_defconfig | 1 + - configs/sandbox64_defconfig | 1 + - configs/sandbox_defconfig | 1 + - configs/sandbox_flattree_defconfig | 1 + - configs/sandbox_spl_defconfig | 1 + - drivers/core/Kconfig | 10 ++++ - drivers/core/device.c | 41 ++++++++++++++++ - drivers/core/of_addr.c | 78 ++++++++++++++++++++++++++++++ - drivers/core/ofnode.c | 9 ++++ - drivers/core/read.c | 6 +++ - drivers/mmc/sdhci.c | 10 ++-- - drivers/pci/pcie_brcmstb.c | 12 ++--- - drivers/usb/host/xhci-mem.c | 45 +++++++++-------- - drivers/usb/host/xhci-ring.c | 15 +++--- - drivers/usb/host/xhci.c | 4 +- - drivers/video/bcm2835.c | 1 + - include/dm/device.h | 13 +++++ - include/dm/of_addr.h | 17 +++++++ - include/dm/ofnode.h | 16 ++++++ - include/dm/read.h | 21 ++++++++ - include/fdt_support.h | 14 ++++++ - include/mmc.h | 6 +++ - include/phys2bus.h | 17 +++++++ - include/usb/xhci.h | 20 +++++++- - test/dm/Makefile | 2 + - test/dm/core.c | 30 ++++++++++++ - test/dm/phys2bus.c | 37 ++++++++++++++ - test/dm/read.c | 49 +++++++++++++++++++ - 33 files changed, 543 insertions(+), 41 deletions(-) - create mode 100644 test/dm/phys2bus.c - create mode 100644 test/dm/read.c - -diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts -index e95f4631bf..d4195b45bb 100644 ---- a/arch/sandbox/dts/test.dts -+++ b/arch/sandbox/dts/test.dts -@@ -350,6 +350,27 @@ - test5-gpios = <&gpio_a 19>; - }; - -+ mmio-bus@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "denx,u-boot-test-bus"; -+ dma-ranges = <0x10000000 0x00000000 0x00040000>; -+ -+ subnode@0 { -+ compatible = "denx,u-boot-fdt-test"; -+ }; -+ }; -+ -+ mmio-bus@1 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "denx,u-boot-test-bus"; -+ -+ subnode@0 { -+ compatible = "denx,u-boot-fdt-test"; -+ }; -+ }; -+ - acpi_test1: acpi-test { - compatible = "denx,u-boot-acpi-test"; - acpi-ssdt-test-data = "ab"; -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6b1fa5fc14..abcf41a5a8 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -157,6 +157,16 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2711-rpi-4-b.dtb", - true, - }, -+ [0x13] = { -+ "400", -+ DTB_DIR "bcm2711-rpi-400.dtb", -+ true, -+ }, -+ [0x14] = { -+ "Compute Module 4", -+ DTB_DIR "bcm2711-rpi-cm4.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { -diff --git a/common/fdt_support.c b/common/fdt_support.c -index 638eca983e..1a1b408607 100644 ---- a/common/fdt_support.c -+++ b/common/fdt_support.c -@@ -1344,6 +1344,79 @@ u64 fdt_translate_dma_address(const void *blob, int node_offset, - return __of_translate_address(blob, node_offset, in_addr, "dma-ranges"); - } - -+int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size) -+{ -+ bool found_dma_ranges = false; -+ struct of_bus *bus_node; -+ const fdt32_t *ranges; -+ int na, ns, pna, pns; -+ int parent = node; -+ int ret = 0; -+ int len; -+ -+ /* Find the closest dma-ranges property */ -+ while (parent >= 0) { -+ ranges = fdt_getprop(blob, parent, "dma-ranges", &len); -+ -+ /* Ignore empty ranges, they imply no translation required */ -+ if (ranges && len > 0) -+ break; -+ -+ /* Once we find 'dma-ranges', then a missing one is an error */ -+ if (found_dma_ranges && !ranges) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (ranges) -+ found_dma_ranges = true; -+ -+ parent = fdt_parent_offset(blob, parent); -+ } -+ -+ if (!ranges || parent < 0) { -+ debug("no dma-ranges found for node %s\n", -+ fdt_get_name(blob, node, NULL)); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ /* switch to that node */ -+ node = parent; -+ parent = fdt_parent_offset(blob, node); -+ if (parent < 0) { -+ printf("Found dma-ranges in root node, shoudln't happen\n"); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ /* Get the address sizes both for the bus and its parent */ -+ bus_node = of_match_bus(blob, node); -+ bus_node->count_cells(blob, node, &na, &ns); -+ if (!OF_CHECK_COUNTS(na, ns)) { -+ printf("%s: Bad cell count for %s\n", __FUNCTION__, -+ fdt_get_name(blob, node, NULL)); -+ return -EINVAL; -+ goto out; -+ } -+ -+ bus_node = of_match_bus(blob, parent); -+ bus_node->count_cells(blob, parent, &pna, &pns); -+ if (!OF_CHECK_COUNTS(pna, pns)) { -+ printf("%s: Bad cell count for %s\n", __FUNCTION__, -+ fdt_get_name(blob, parent, NULL)); -+ return -EINVAL; -+ goto out; -+ } -+ -+ *bus = fdt_read_number(ranges, na); -+ *cpu = fdt_translate_dma_address(blob, node, ranges + na); -+ *size = fdt_read_number(ranges + na + pna, ns); -+out: -+ return ret; -+} -+ - /** - * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and - * who's reg property matches a physical cpu address -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 5ddd838fd5..0a5d3ff8cd 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DFU_MMC=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 2590d0a696..b61cdc05f1 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -22,6 +22,7 @@ CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DFU_MMC=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 2639219a1a..4125a1feba 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -20,6 +20,7 @@ CONFIG_CMD_FS_UUID=y - CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_DMA=y - CONFIG_DM_KEYBOARD=y - CONFIG_DM_MMC=y - CONFIG_MMC_SDHCI=y -diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index 4e67819559..634c19502c 100644 ---- a/configs/sandbox64_defconfig -+++ b/configs/sandbox64_defconfig -@@ -94,6 +94,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 0c7674efc9..fc1df3114c 100644 ---- a/configs/sandbox_defconfig -+++ b/configs/sandbox_defconfig -@@ -108,6 +108,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig -index 96465c56cf..4401f33f0b 100644 ---- a/configs/sandbox_flattree_defconfig -+++ b/configs/sandbox_flattree_defconfig -@@ -75,6 +75,7 @@ CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" - CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_DEVRES=y -diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig -index 61dae34a6a..c0118702a8 100644 ---- a/configs/sandbox_spl_defconfig -+++ b/configs/sandbox_spl_defconfig -@@ -95,6 +95,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y - CONFIG_NETCONSOLE=y - CONFIG_IP_DEFRAG=y - CONFIG_SPL_DM=y -+CONFIG_DM_DMA=y - CONFIG_REGMAP=y - CONFIG_SPL_REGMAP=y - CONFIG_SYSCON=y -diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig -index dbfe51c6e8..00554af499 100644 ---- a/drivers/core/Kconfig -+++ b/drivers/core/Kconfig -@@ -129,6 +129,16 @@ config TPL_DM_INLINE_OFNODE - This applies to several ofnode functions (see ofnode.h) which are - seldom used. Inlining them can help reduce code size. - -+config DM_DMA -+ bool "Support per-device DMA constraints" -+ depends on DM -+ default n -+ help -+ Enable this to extract per-device DMA constraints, only supported on -+ device-tree systems for now. This is needed in order translate -+ addresses on systems where different buses have different views of -+ the physical address space. -+ - config REGMAP - bool "Support register maps" - depends on DM -diff --git a/drivers/core/device.c b/drivers/core/device.c -index 82a0098960..625134921d 100644 ---- a/drivers/core/device.c -+++ b/drivers/core/device.c -@@ -422,6 +422,43 @@ fail: - return ret; - } - -+/** -+ * device_get_dma_constraints() - Populate device's DMA constraints -+ * -+ * Gets a device's DMA constraints from firmware. This information is later -+ * used by drivers to translate physcal addresses to the device's bus address -+ * space. For now only device-tree is supported. -+ * -+ * @dev: Pointer to target device -+ * Return: 0 if OK or if no DMA constraints were found, error otherwise -+ */ -+static int device_get_dma_constraints(struct udevice *dev) -+{ -+ struct udevice *parent = dev->parent; -+ phys_addr_t cpu = 0; -+ dma_addr_t bus = 0; -+ u64 size = 0; -+ int ret; -+ -+ if (!CONFIG_IS_ENABLED(DM_DMA) || !parent || !dev_has_ofnode(parent)) -+ return 0; -+ -+ /* -+ * We start parsing for dma-ranges from the device's bus node. This is -+ * specially important on nested buses. -+ */ -+ ret = dev_get_dma_range(parent, &cpu, &bus, &size); -+ /* Don't return an error if no 'dma-ranges' were found */ -+ if (ret && ret != -ENOENT) { -+ dm_warn("%s: failed to get DMA range, %d\n", dev->name, ret); -+ return ret; -+ } -+ -+ dev_set_dma_offset(dev, cpu - bus); -+ -+ return 0; -+} -+ - int device_probe(struct udevice *dev) - { - const struct driver *drv; -@@ -484,6 +521,10 @@ int device_probe(struct udevice *dev) - goto fail; - } - -+ ret = device_get_dma_constraints(dev); -+ if (ret) -+ goto fail; -+ - ret = uclass_pre_probe_device(dev); - if (ret) - goto fail; -diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c -index bbe80136ba..5bc6ca1de0 100644 ---- a/drivers/core/of_addr.c -+++ b/drivers/core/of_addr.c -@@ -318,6 +318,84 @@ u64 of_translate_dma_address(const struct device_node *dev, const __be32 *in_add - return __of_translate_address(dev, in_addr, "dma-ranges"); - } - -+int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size) -+{ -+ bool found_dma_ranges = false; -+ struct device_node *parent; -+ struct of_bus *bus_node; -+ int na, ns, pna, pns; -+ const __be32 *ranges; -+ int ret = 0; -+ int len; -+ -+ /* Find the closest dma-ranges property */ -+ dev = of_node_get(dev); -+ while (dev) { -+ ranges = of_get_property(dev, "dma-ranges", &len); -+ -+ /* Ignore empty ranges, they imply no translation required */ -+ if (ranges && len > 0) -+ break; -+ -+ /* Once we find 'dma-ranges', then a missing one is an error */ -+ if (found_dma_ranges && !ranges) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (ranges) -+ found_dma_ranges = true; -+ -+ parent = of_get_parent(dev); -+ of_node_put(dev); -+ dev = parent; -+ } -+ -+ if (!dev || !ranges) { -+ debug("no dma-ranges found for node %s\n", -+ of_node_full_name(dev)); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ /* switch to that node */ -+ parent = of_get_parent(dev); -+ if (!parent) { -+ printf("Found dma-ranges in root node, shoudln't happen\n"); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ /* Get the address sizes both for the bus and its parent */ -+ bus_node = of_match_bus((struct device_node*)dev); -+ bus_node->count_cells(dev, &na, &ns); -+ if (!OF_CHECK_COUNTS(na, ns)) { -+ printf("Bad cell count for %s\n", of_node_full_name(dev)); -+ return -EINVAL; -+ goto out_parent; -+ } -+ -+ bus_node = of_match_bus(parent); -+ bus_node->count_cells(parent, &pna, &pns); -+ if (!OF_CHECK_COUNTS(pna, pns)) { -+ printf("Bad cell count for %s\n", of_node_full_name(parent)); -+ return -EINVAL; -+ goto out_parent; -+ } -+ -+ *bus = of_read_number(ranges, na); -+ *cpu = of_translate_dma_address(dev, ranges + na); -+ *size = of_read_number(ranges + na + pna, ns); -+ -+out_parent: -+ of_node_put(parent); -+out: -+ of_node_put(dev); -+ return ret; -+} -+ -+ - static int __of_address_to_resource(const struct device_node *dev, - const __be32 *addrp, u64 size, unsigned int flags, - const char *name, struct resource *r) -diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c -index 26c9d04056..fa0bd2a9c4 100644 ---- a/drivers/core/ofnode.c -+++ b/drivers/core/ofnode.c -@@ -927,6 +927,15 @@ u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr) - return fdt_translate_dma_address(gd->fdt_blob, ofnode_to_offset(node), in_addr); - } - -+int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, u64 *size) -+{ -+ if (ofnode_is_np(node)) -+ return of_get_dma_range(ofnode_to_np(node), cpu, bus, size); -+ else -+ return fdt_get_dma_range(gd->fdt_blob, ofnode_to_offset(node), -+ cpu, bus, size); -+} -+ - int ofnode_device_is_compatible(ofnode node, const char *compat) - { - if (ofnode_is_np(node)) -diff --git a/drivers/core/read.c b/drivers/core/read.c -index 14fd1214d6..4307ca4579 100644 ---- a/drivers/core/read.c -+++ b/drivers/core/read.c -@@ -341,6 +341,12 @@ u64 dev_translate_dma_address(const struct udevice *dev, const fdt32_t *in_addr) - return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); - } - -+int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size) -+{ -+ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); -+} -+ - int dev_read_alias_highest_id(const char *stem) - { - if (of_live_active()) -diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index ed0dc17325..5f18d472bd 100644 ---- a/drivers/mmc/sdhci.c -+++ b/drivers/mmc/sdhci.c -@@ -74,6 +74,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) - static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, - int *is_aligned, int trans_bytes) - { -+ dma_addr_t dma_addr; - unsigned char ctrl; - void *buf; - -@@ -104,8 +105,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, - mmc_get_dma_dir(data)); - - if (host->flags & USE_SDMA) { -- sdhci_writel(host, phys_to_bus((ulong)host->start_addr), -- SDHCI_DMA_ADDRESS); -+ dma_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), host->start_addr); -+ sdhci_writel(host, dma_addr, SDHCI_DMA_ADDRESS); - } - #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) - else if (host->flags & (USE_ADMA | USE_ADMA64)) { -@@ -163,8 +164,9 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data) - start_addr &= - ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); - start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; -- sdhci_writel(host, phys_to_bus((ulong)start_addr), -- SDHCI_DMA_ADDRESS); -+ start_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), -+ start_addr); -+ sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); - } - } - if (timeout-- > 0) -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index dd2a4ef629..bd645d7896 100644 ---- a/drivers/pci/pcie_brcmstb.c -+++ b/drivers/pci/pcie_brcmstb.c -@@ -432,6 +432,7 @@ static int brcm_pcie_probe(struct udevice *dev) - struct pci_controller *hose = dev_get_uclass_priv(ctlr); - struct brcm_pcie *pcie = dev_get_priv(dev); - void __iomem *base = pcie->base; -+ struct pci_region region; - bool ssc_good = false; - int num_out_wins = 0; - u64 rc_bar2_offset, rc_bar2_size; -@@ -468,13 +469,10 @@ static int brcm_pcie_probe(struct udevice *dev) - MISC_CTRL_SCB_ACCESS_EN_MASK | - MISC_CTRL_CFG_READ_UR_MODE_MASK | - MISC_CTRL_MAX_BURST_SIZE_128); -- /* -- * TODO: When support for other SoCs than BCM2711 is added we may -- * need to use the base address and size(s) provided in the dma-ranges -- * property. -- */ -- rc_bar2_offset = 0; -- rc_bar2_size = 0xc0000000; -+ -+ pci_get_dma_regions(dev, ®ion, 0); -+ rc_bar2_offset = region.bus_start - region.phys_start; -+ rc_bar2_size = 1ULL << fls64(region.size - 1); - - tmp = lower_32_bits(rc_bar2_offset); - u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), -diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c -index b002d6f166..83147d51b5 100644 ---- a/drivers/usb/host/xhci-mem.c -+++ b/drivers/usb/host/xhci-mem.c -@@ -110,7 +110,7 @@ static void xhci_scratchpad_free(struct xhci_ctrl *ctrl) - - ctrl->dcbaa->dev_context_ptrs[0] = 0; - -- free((void *)(uintptr_t)le64_to_cpu(ctrl->scratchpad->sp_array[0])); -+ free(xhci_bus_to_virt(ctrl, le64_to_cpu(ctrl->scratchpad->sp_array[0]))); - free(ctrl->scratchpad->sp_array); - free(ctrl->scratchpad); - ctrl->scratchpad = NULL; -@@ -216,8 +216,8 @@ static void *xhci_malloc(unsigned int size) - * @param link_trbs flag to indicate whether to link the trbs or NOT - * @return none - */ --static void xhci_link_segments(struct xhci_segment *prev, -- struct xhci_segment *next, bool link_trbs) -+static void xhci_link_segments(struct xhci_ctrl *ctrl, struct xhci_segment *prev, -+ struct xhci_segment *next, bool link_trbs) - { - u32 val; - u64 val_64 = 0; -@@ -226,7 +226,7 @@ static void xhci_link_segments(struct xhci_segment *prev, - return; - prev->next = next; - if (link_trbs) { -- val_64 = virt_to_phys(next->trbs); -+ val_64 = xhci_virt_to_bus(ctrl, next->trbs); - prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = - cpu_to_le64(val_64); - -@@ -304,7 +304,8 @@ static struct xhci_segment *xhci_segment_alloc(void) - * @param link_trbs flag to indicate whether to link the trbs or NOT - * @return pointer to the newly created RING - */ --struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs) -+struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs, -+ bool link_trbs) - { - struct xhci_ring *ring; - struct xhci_segment *prev; -@@ -327,12 +328,12 @@ struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs) - next = xhci_segment_alloc(); - BUG_ON(!next); - -- xhci_link_segments(prev, next, link_trbs); -+ xhci_link_segments(ctrl, prev, next, link_trbs); - - prev = next; - num_segs--; - } -- xhci_link_segments(prev, ring->first_seg, link_trbs); -+ xhci_link_segments(ctrl, prev, ring->first_seg, link_trbs); - if (link_trbs) { - /* See section 4.9.2.1 and 6.4.4.1 */ - prev->trbs[TRBS_PER_SEGMENT-1].link.control |= -@@ -354,6 +355,7 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - struct xhci_hccr *hccr = ctrl->hccr; - struct xhci_hcor *hcor = ctrl->hcor; - struct xhci_scratchpad *scratchpad; -+ uint64_t val_64; - int num_sp; - uint32_t page_size; - void *buf; -@@ -371,8 +373,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64)); - if (!scratchpad->sp_array) - goto fail_sp2; -- ctrl->dcbaa->dev_context_ptrs[0] = -- cpu_to_le64((uintptr_t)scratchpad->sp_array); -+ -+ val_64 = xhci_virt_to_bus(ctrl, scratchpad->sp_array); -+ ctrl->dcbaa->dev_context_ptrs[0] = cpu_to_le64(val_64); - - xhci_flush_cache((uintptr_t)&ctrl->dcbaa->dev_context_ptrs[0], - sizeof(ctrl->dcbaa->dev_context_ptrs[0])); -@@ -393,8 +396,8 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) - xhci_flush_cache((uintptr_t)buf, num_sp * page_size); - - for (i = 0; i < num_sp; i++) { -- uintptr_t ptr = (uintptr_t)buf + i * page_size; -- scratchpad->sp_array[i] = cpu_to_le64(ptr); -+ val_64 = xhci_virt_to_bus(ctrl, buf + i * page_size); -+ scratchpad->sp_array[i] = cpu_to_le64(val_64); - } - - xhci_flush_cache((uintptr_t)scratchpad->sp_array, -@@ -484,9 +487,9 @@ int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id) - } - - /* Allocate endpoint 0 ring */ -- virt_dev->eps[0].ring = xhci_ring_alloc(1, true); -+ virt_dev->eps[0].ring = xhci_ring_alloc(ctrl, 1, true); - -- byte_64 = virt_to_phys(virt_dev->out_ctx->bytes); -+ byte_64 = xhci_virt_to_bus(ctrl, virt_dev->out_ctx->bytes); - - /* Point to output device context in dcbaa. */ - ctrl->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(byte_64); -@@ -522,15 +525,15 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - return -ENOMEM; - } - -- val_64 = virt_to_phys(ctrl->dcbaa); -+ val_64 = xhci_virt_to_bus(ctrl, ctrl->dcbaa); - /* Set the pointer in DCBAA register */ - xhci_writeq(&hcor->or_dcbaap, val_64); - - /* Command ring control pointer register initialization */ -- ctrl->cmd_ring = xhci_ring_alloc(1, true); -+ ctrl->cmd_ring = xhci_ring_alloc(ctrl, 1, true); - - /* Set the address in the Command Ring Control register */ -- trb_64 = virt_to_phys(ctrl->cmd_ring->first_seg->trbs); -+ trb_64 = xhci_virt_to_bus(ctrl, ctrl->cmd_ring->first_seg->trbs); - val_64 = xhci_readq(&hcor->or_crcr); - val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | - (trb_64 & (u64) ~CMD_RING_RSVD_BITS) | -@@ -551,7 +554,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - ctrl->ir_set = &ctrl->run_regs->ir_set[0]; - - /* Event ring does not maintain link TRB */ -- ctrl->event_ring = xhci_ring_alloc(ERST_NUM_SEGS, false); -+ ctrl->event_ring = xhci_ring_alloc(ctrl, ERST_NUM_SEGS, false); - ctrl->erst.entries = xhci_malloc(sizeof(struct xhci_erst_entry) * - ERST_NUM_SEGS); - -@@ -560,8 +563,8 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - for (val = 0, seg = ctrl->event_ring->first_seg; - val < ERST_NUM_SEGS; - val++) { -- trb_64 = virt_to_phys(seg->trbs); - struct xhci_erst_entry *entry = &ctrl->erst.entries[val]; -+ trb_64 = xhci_virt_to_bus(ctrl, seg->trbs); - entry->seg_addr = cpu_to_le64(trb_64); - entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); - entry->rsvd = 0; -@@ -570,7 +573,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - xhci_flush_cache((uintptr_t)ctrl->erst.entries, - ERST_NUM_SEGS * sizeof(struct xhci_erst_entry)); - -- deq = virt_to_phys(ctrl->event_ring->dequeue); -+ deq = xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue); - - /* Update HC event ring dequeue pointer */ - xhci_writeq(&ctrl->ir_set->erst_dequeue, -@@ -585,7 +588,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - /* this is the event ring segment table pointer */ - val_64 = xhci_readq(&ctrl->ir_set->erst_base); - val_64 &= ERST_PTR_MASK; -- val_64 |= virt_to_phys(ctrl->erst.entries) & ~ERST_PTR_MASK; -+ val_64 |= xhci_virt_to_bus(ctrl, ctrl->erst.entries) & ~ERST_PTR_MASK; - - xhci_writeq(&ctrl->ir_set->erst_base, val_64); - -@@ -848,7 +851,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, - /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ - ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3)); - -- trb_64 = virt_to_phys(virt_dev->eps[0].ring->first_seg->trbs); -+ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[0].ring->first_seg->trbs); - ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state); - - /* -diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c -index d6c47d579b..bd69a19995 100644 ---- a/drivers/usb/host/xhci-ring.c -+++ b/drivers/usb/host/xhci-ring.c -@@ -275,10 +275,13 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id, - u32 ep_index, trb_type cmd) - { - u32 fields[4]; -- u64 val_64 = virt_to_phys(ptr); -+ u64 val_64 = 0; - - BUG_ON(prepare_ring(ctrl, ctrl->cmd_ring, EP_STATE_RUNNING)); - -+ if (ptr) -+ val_64 = xhci_virt_to_bus(ctrl, ptr); -+ - fields[0] = lower_32_bits(val_64); - fields[1] = upper_32_bits(val_64); - fields[2] = 0; -@@ -401,7 +404,7 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl) - - /* Inform the hardware */ - xhci_writeq(&ctrl->ir_set->erst_dequeue, -- virt_to_phys(ctrl->event_ring->dequeue) | ERST_EHB); -+ xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue) | ERST_EHB); - } - - /** -@@ -579,7 +582,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, - u64 addr; - int ret; - u32 trb_fields[4]; -- u64 val_64 = virt_to_phys(buffer); -+ u64 val_64 = xhci_virt_to_bus(ctrl, buffer); - void *last_transfer_trb_addr; - int available_length; - -@@ -723,8 +726,8 @@ again: - return -ETIMEDOUT; - } - -- if ((uintptr_t)(le64_to_cpu(event->trans_event.buffer)) != -- (uintptr_t)virt_to_phys(last_transfer_trb_addr)) { -+ if ((uintptr_t)(le64_to_cpu(xhci_bus_to_virt(ctrl, event->trans_event.buffer))) -+ != (uintptr_t)virt_to_phys(last_transfer_trb_addr)) { - available_length -= - (int)EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)); - xhci_acknowledge_event(ctrl); -@@ -884,7 +887,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, - if (length > 0) { - if (req->requesttype & USB_DIR_IN) - field |= TRB_DIR_IN; -- buf_64 = virt_to_phys(buffer); -+ buf_64 = xhci_virt_to_bus(ctrl, buffer); - - trb_fields[0] = lower_32_bits(buf_64); - trb_fields[1] = upper_32_bits(buf_64); -diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c -index 7080f8fabe..d27ac01c83 100644 ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -604,7 +604,7 @@ static int xhci_set_configuration(struct usb_device *udev) - ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index); - - /* Allocate the ep rings */ -- virt_dev->eps[ep_index].ring = xhci_ring_alloc(1, true); -+ virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true); - if (!virt_dev->eps[ep_index].ring) - return -ENOMEM; - -@@ -628,7 +628,7 @@ static int xhci_set_configuration(struct usb_device *udev) - cpu_to_le32(MAX_BURST(max_burst) | - ERROR_COUNT(err_count)); - -- trb_64 = virt_to_phys(virt_dev->eps[ep_index].ring->enqueue); -+ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[ep_index].ring->enqueue); - ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 | - virt_dev->eps[ep_index].ring->cycle_state); - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index 9326999cd3..c2962932c9 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -52,6 +52,7 @@ static int bcm2835_video_probe(struct udevice *dev) - - static const struct udevice_id bcm2835_video_ids[] = { - { .compatible = "brcm,bcm2835-hdmi" }, -+ { .compatible = "brcm,bcm2711-hdmi0" }, - { .compatible = "brcm,bcm2708-fb" }, - { } - }; -diff --git a/include/dm/device.h b/include/dm/device.h -index 28533ce0b6..bb9faa0ed9 100644 ---- a/include/dm/device.h -+++ b/include/dm/device.h -@@ -159,6 +159,8 @@ enum { - * When CONFIG_DEVRES is enabled, devm_kmalloc() and friends will - * add to this list. Memory so-allocated will be freed - * automatically when the device is removed / unbound -+ * @dma_offset: Offset between the physical address space (CPU's) and the -+ * device's bus address space - */ - struct udevice { - const struct driver *driver; -@@ -183,6 +185,9 @@ struct udevice { - #ifdef CONFIG_DEVRES - struct list_head devres_head; - #endif -+#if CONFIG_IS_ENABLED(DM_DMA) -+ ulong dma_offset; -+#endif - }; - - /* Maximum sequence number supported */ -@@ -224,6 +229,14 @@ static inline ofnode dev_ofnode(const struct udevice *dev) - /* Returns non-zero if the device is active (probed and not removed) */ - #define device_active(dev) (dev_get_flags(dev) & DM_FLAG_ACTIVATED) - -+#if CONFIG_IS_ENABLED(DM_DMA) -+#define dev_set_dma_offset(_dev, _offset) _dev->dma_offset = _offset -+#define dev_get_dma_offset(_dev) _dev->dma_offset -+#else -+#define dev_set_dma_offset(_dev, _offset) -+#define dev_get_dma_offset(_dev) 0 -+#endif -+ - static inline int dev_of_offset(const struct udevice *dev) - { - #if !CONFIG_IS_ENABLED(OF_PLATDATA) -diff --git a/include/dm/of_addr.h b/include/dm/of_addr.h -index 3fa1ffce81..ee21d5cf4f 100644 ---- a/include/dm/of_addr.h -+++ b/include/dm/of_addr.h -@@ -44,6 +44,23 @@ u64 of_translate_address(const struct device_node *no, const __be32 *in_addr); - */ - u64 of_translate_dma_address(const struct device_node *no, const __be32 *in_addr); - -+ -+/** -+ * of_get_dma_range() - get dma-ranges for a specific DT node -+ * -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - /** - * of_get_address() - obtain an address from a node - * -diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h -index 5318d65035..2c0597c407 100644 ---- a/include/dm/ofnode.h -+++ b/include/dm/ofnode.h -@@ -998,6 +998,22 @@ u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); - */ - u64 ofnode_translate_dma_address(ofnode node, const fdt32_t *in_addr); - -+/** -+ * ofnode_get_dma_range() - get dma-ranges for a specific DT node -+ * -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int ofnode_get_dma_range(ofnode node, phys_addr_t *cpu, dma_addr_t *bus, -+ u64 *size); -+ - /** - * ofnode_device_is_compatible() - check if the node is compatible with compat - * -diff --git a/include/dm/read.h b/include/dm/read.h -index 97575bcad0..5bf3405614 100644 ---- a/include/dm/read.h -+++ b/include/dm/read.h -@@ -647,6 +647,21 @@ u64 dev_translate_address(const struct udevice *dev, const fdt32_t *in_addr); - u64 dev_translate_dma_address(const struct udevice *dev, - const fdt32_t *in_addr); - -+/** -+ * dev_get_dma_range() - Get a device's DMA constraints -+ * -+ * Provide the address bases and size of the linear mapping between the CPU and -+ * a device's BUS address space. -+ * -+ * @dev: device giving the context in which to translate the DMA address -+ * @cpu: base address for CPU's view of memory -+ * @bus: base address for BUS's view of memory -+ * @size: size of the address space -+ * @return 0 if ok, negative on error -+ */ -+int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - /** - * dev_read_alias_highest_id - Get highest alias id for the given stem - * @stem: Alias stem to be examined -@@ -1005,6 +1020,12 @@ static inline u64 dev_translate_dma_address(const struct udevice *dev, - return ofnode_translate_dma_address(dev_ofnode(dev), in_addr); - } - -+static inline int dev_get_dma_range(const struct udevice *dev, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size) -+{ -+ return ofnode_get_dma_range(dev_ofnode(dev), cpu, bus, size); -+} -+ - static inline int dev_read_alias_highest_id(const char *stem) - { - if (!CONFIG_IS_ENABLED(OF_LIBFDT) || !gd->fdt_blob) -diff --git a/include/fdt_support.h b/include/fdt_support.h -index dbbac0fb6a..46eb1dbbb2 100644 ---- a/include/fdt_support.h -+++ b/include/fdt_support.h -@@ -260,6 +260,20 @@ u64 fdt_translate_address(const void *blob, int node_offset, - u64 fdt_translate_dma_address(const void *blob, int node_offset, - const __be32 *in_addr); - -+/** -+ * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and -+ * cpu->bus address translations -+ * -+ * @param blob Pointer to device tree blob -+ * @param node_offset Node DT offset -+ * @param cpu Pointer to variable storing the range's cpu address -+ * @param bus Pointer to variable storing the range's bus address -+ * @param size Pointer to variable storing the range's size -+ * @return translated DMA address or OF_BAD_ADDR on error -+ */ -+int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, -+ dma_addr_t *bus, u64 *size); -+ - int fdt_node_offset_by_compat_reg(void *blob, const char *compat, - phys_addr_t compat_off); - int fdt_alloc_phandle(void *blob); -diff --git a/include/mmc.h b/include/mmc.h -index 1d377e0281..c12c7a0b5c 100644 ---- a/include/mmc.h -+++ b/include/mmc.h -@@ -736,6 +736,12 @@ struct mmc { - u8 hs400_tuning; - }; - -+#if CONFIG_IS_ENABLED(DM_MMC) -+#define mmc_to_dev(_mmc) _mmc->dev -+#else -+#define mmc_to_dev(_mmc) NULL -+#endif -+ - struct mmc_hwpart_conf { - struct { - uint enh_start; /* in 512-byte sectors */ -diff --git a/include/phys2bus.h b/include/phys2bus.h -index dc9b8e5a25..866b8b51a8 100644 ---- a/include/phys2bus.h -+++ b/include/phys2bus.h -@@ -21,4 +21,21 @@ static inline unsigned long bus_to_phys(unsigned long bus) - } - #endif - -+#if CONFIG_IS_ENABLED(DM) -+#include -+ -+static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, phys_addr_t phys) -+{ -+ return phys - dev_get_dma_offset(dev); -+} -+ -+static inline phys_addr_t dev_bus_to_phys(struct udevice *dev, dma_addr_t bus) -+{ -+ return bus + dev_get_dma_offset(dev); -+} -+#else -+#define dev_phys_to_bus(_, _addr) _addr -+#define dev_bus_to_phys(_, _addr) _addr -+#endif -+ - #endif -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index e1d382369a..8d95e213b0 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -16,6 +16,7 @@ - #ifndef HOST_XHCI_H_ - #define HOST_XHCI_H_ - -+#include - #include - #include - #include -@@ -1221,6 +1222,12 @@ struct xhci_ctrl { - #define XHCI_MTK_HOST BIT(0) - }; - -+#if CONFIG_IS_ENABLED(DM_USB) -+#define xhci_to_dev(_ctrl) _ctrl->dev -+#else -+#define xhci_to_dev(_ctrl) NULL -+#endif -+ - unsigned long trb_addr(struct xhci_segment *seg, union xhci_trb *trb); - struct xhci_input_control_ctx - *xhci_get_input_control_ctx(struct xhci_container_ctx *ctx); -@@ -1250,7 +1257,8 @@ int xhci_check_maxpacket(struct usb_device *udev); - void xhci_flush_cache(uintptr_t addr, u32 type_len); - void xhci_inval_cache(uintptr_t addr, u32 type_len); - void xhci_cleanup(struct xhci_ctrl *ctrl); --struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs); -+struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs, -+ bool link_trbs); - int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id); - int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr, - struct xhci_hcor *hcor); -@@ -1278,4 +1286,14 @@ extern struct dm_usb_ops xhci_usb_ops; - - struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); - -+static inline dma_addr_t xhci_virt_to_bus(struct xhci_ctrl *ctrl, void *addr) -+{ -+ return dev_phys_to_bus(xhci_to_dev(ctrl), virt_to_phys(addr)); -+} -+ -+static inline void *xhci_bus_to_virt(struct xhci_ctrl *ctrl, dma_addr_t addr) -+{ -+ return phys_to_virt(dev_bus_to_phys(xhci_to_dev(ctrl), addr)); -+} -+ - #endif /* HOST_XHCI_H_ */ -diff --git a/test/dm/Makefile b/test/dm/Makefile -index e70e50f402..6275ec56ea 100644 ---- a/test/dm/Makefile -+++ b/test/dm/Makefile -@@ -15,6 +15,8 @@ obj-$(CONFIG_UT_DM) += test-fdt.o - obj-$(CONFIG_UT_DM) += test-uclass.o - - obj-$(CONFIG_UT_DM) += core.o -+obj-$(CONFIG_UT_DM) += read.o -+obj-$(CONFIG_UT_DM) += phys2bus.o - ifneq ($(CONFIG_SANDBOX),) - obj-$(CONFIG_ACPIGEN) += acpi.o - obj-$(CONFIG_ACPIGEN) += acpigen.o -diff --git a/test/dm/core.c b/test/dm/core.c -index ce31d86c7d..35ca689d64 100644 ---- a/test/dm/core.c -+++ b/test/dm/core.c -@@ -1180,3 +1180,33 @@ static int dm_test_all_have_seq(struct unit_test_state *uts) - return 0; - } - DM_TEST(dm_test_all_have_seq, UT_TESTF_SCAN_PDATA); -+ -+static int dm_test_dma_offset(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ ofnode node; -+ -+ /* Make sure the bus's dma-ranges aren't taken into account here */ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_asserteq_64(0, dev->dma_offset); -+ -+ /* Device behind a bus with dma-ranges */ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_64(-0x10000000ULL, dev->dma_offset); -+ -+ /* This one has no dma-ranges */ -+ node = ofnode_path("/mmio-bus@1"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ node = ofnode_path("/mmio-bus@1/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_64(0, dev->dma_offset); -+ -+ return 0; -+} -+DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c -new file mode 100644 -index 0000000000..342f2fa8eb ---- /dev/null -+++ b/test/dm/phys2bus.c -@@ -0,0 +1,37 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2020 Nicolas Saenz Julienne -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int dm_test_phys_to_bus(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ ofnode node; -+ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ /* In this case it should be transparent, no dma-ranges in parent bus */ -+ ut_asserteq_addr((void*)0xfffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0xfffff)); -+ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_asserteq_addr((void*)0x100fffffULL, (void*)dev_phys_to_bus(dev, 0xfffff)); -+ ut_asserteq_addr((void*)0xfffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x100fffff)); -+ -+ return 0; -+} -+DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -diff --git a/test/dm/read.c b/test/dm/read.c -new file mode 100644 -index 0000000000..7768aa2968 ---- /dev/null -+++ b/test/dm/read.c -@@ -0,0 +1,49 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2020 Nicolas Saenz Julienne -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int dm_test_dma_ranges(struct unit_test_state *uts) -+{ -+ struct udevice *dev; -+ phys_addr_t cpu; -+ dma_addr_t bus; -+ ofnode node; -+ u64 size; -+ -+ /* dma-ranges are on the device's node */ -+ node = ofnode_path("/mmio-bus@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); -+ ut_asserteq_64(0x40000, size); -+ ut_asserteq_64(0x0, cpu); -+ ut_asserteq_64(0x10000000, bus); -+ -+ /* dma-ranges are on the bus' node */ -+ node = ofnode_path("/mmio-bus@0/subnode@0"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev)); -+ ut_assertok(dev_get_dma_range(dev, &cpu, &bus, &size)); -+ ut_asserteq_64(0x40000, size); -+ ut_asserteq_64(0x0, cpu); -+ ut_asserteq_64(0x10000000, bus); -+ -+ /* No dma-ranges available */ -+ node = ofnode_path("/mmio-bus@1"); -+ ut_assert(ofnode_valid(node)); -+ ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &dev)); -+ ut_asserteq(-ENOENT, dev_get_dma_range(dev, &cpu, &bus, &size)); -+ -+ return 0; -+} -+DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); --- -2.29.2 - diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch index 8a5835e..43a52ad 100644 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ b/rk3399-Pinebook-pro-EDP-support.patch @@ -1,64 +1,97 @@ -From b90e9d3eeded9b10be1076ccbf2a3fac55cf3e74 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 1 Feb 2021 21:14:44 +0000 -Subject: [PATCH] rk3399 Pinebook pro EDP support +From patchwork Fri Mar 5 10:27:46 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447757 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPKq3YGqz9sRR + for ; Fri, 5 Mar 2021 21:36:31 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 18DC78269D; + Fri, 5 Mar 2021 11:35:59 +0100 (CET) +Authentication-Results: phobos.denx.de; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.004041703@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:46 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 1/9] rockchip: video: vop: Use endpoint compatible string + to find VOP mode +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 + - .../include/asm/arch-rockchip/edp_rk3288.h | 9 +- - .../include/asm/arch-rockchip/vop_rk3288.h | 15 +-- - drivers/pwm/rk_pwm.c | 2 +- - drivers/video/rockchip/rk_edp.c | 103 +++++++++++++++--- - drivers/video/rockchip/rk_vop.c | 86 ++++++++++++++- - 6 files changed, 177 insertions(+), 42 deletions(-) +The current code is using an hard coded enum and the of node reg value of +endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order +is different between rk3288, rk3399 vop little, rk3399 vop big. -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index 1eafb40ce3..2d87bea933 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -16,6 +16,10 @@ - }; - }; - -+&edp { -+ rockchip,panel = <&edp_panel>; -+}; -+ - &i2c0 { - u-boot,dm-pre-reloc; - }; -diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -index 94e5bb674f..9559813e52 100644 ---- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); - #define PD_CH0 (0x1 << 0) - - /* pll_reg_1 */ --#define REF_CLK_24M (0x1 << 1) --#define REF_CLK_27M (0x0 << 1) -+#define REF_CLK_24M (0x1 << 0) -+#define REF_CLK_27M (0x0 << 0) -+#define REF_CLK_MASK (0x1 << 0) - - /* line_map */ - #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) -@@ -296,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); - - /* int_ctl */ - #define SOFT_INT_CTRL (0x1 << 2) --#define INT_POL (0x1 << 0) -+#define INT_POL1 (0x1 << 1) -+#define INT_POL0 (0x1 << 0) -+#define INT_POL (INT_POL0 | INT_POL1) - - /* sys_ctl_1 */ - #define DET_STA (0x1 << 2) -diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -index 52446e97c6..49a7141437 100644 ---- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +A possible solution would be to make sure that the rk3288.dtsi and +rk3399.dtsi files have "expected" reg value or an other solution is +to find the kind of endpoint by comparing the endpoint compatible value. + +This patch is implementing the more flexible second solution. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +=================================================================== +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/vop_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h @@ -85,26 +85,13 @@ enum { LB_RGB_1280X8 = 0x5 }; @@ -87,35 +120,148 @@ index 52446e97c6..49a7141437 100644 /* VOP_VERSION_INFO */ #define M_FPGA_VERSION (0xffff << 16) -diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c -index a64fc4a052..d4b9ebe528 100644 ---- a/drivers/pwm/rk_pwm.c -+++ b/drivers/pwm/rk_pwm.c -@@ -146,7 +146,7 @@ static int rk_pwm_probe(struct udevice *dev) - priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -236,12 +236,11 @@ static int rk_display_init(struct udevic + struct clk clk; + enum video_log2_bpp l2bpp; + ofnode remote; ++ const char *compat; - if (priv->data->supports_polarity) -- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; -+ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; + debug("%s(%s, %lu, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - return 0; - } -diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c -index 0be60e169e..0ddf5e02d6 100644 ---- a/drivers/video/rockchip/rk_edp.c -+++ b/drivers/video/rockchip/rk_edp.c -@@ -8,20 +8,21 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include +- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); +- debug("vop_id=%d\n", vop_id); + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); + if (ret) + return ret; +@@ -283,6 +282,28 @@ static int rk_display_init(struct udevic + if (disp) + break; + }; ++ compat = ofnode_get_property(remote, "compatible", NULL); ++ if (!compat) { ++ debug("%s(%s): Failed to find compatible property\n", ++ __func__, dev_read_name(dev)); ++ return -EINVAL; ++ } ++ if (strstr(compat, "edp")) { ++ vop_id = VOP_MODE_EDP; ++ } else if (strstr(compat, "mipi")) { ++ vop_id = VOP_MODE_MIPI; ++ } else if (strstr(compat, "hdmi")) { ++ vop_id = VOP_MODE_HDMI; ++ } else if (strstr(compat, "cdn-dp")) { ++ vop_id = VOP_MODE_DP; ++ } else if (strstr(compat, "lvds")) { ++ vop_id = VOP_MODE_LVDS; ++ } else { ++ debug("%s(%s): Failed to find vop mode for %s\n", ++ __func__, dev_read_name(dev), compat); ++ return -EINVAL; ++ } ++ debug("vop_id=%d\n", vop_id); + + disp_uc_plat = dev_get_uclass_plat(disp); + debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); + +From patchwork Fri Mar 5 10:27:47 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447760 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPLV0lZ1z9sRR + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 2D11018084F; Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.057540339@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:47 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 2/9] rockchip: video: edp: Add rk3399 support +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP +support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 +eDP IPs are nearly the same, the difference is in the grf register +(SOC_CON6 versus SOC_CON20). So, change the code to use the right +register on each IP. + +The clocks don't seem to be the same, the eDP clock is not at index 1 +on rk3399, so don't try changing the clock at index 1 to rate 0 on +rk3399. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -17,11 +17,10 @@ #include #include #include @@ -129,7 +275,7 @@ index 0be60e169e..0ddf5e02d6 100644 #define MAX_CR_LOOP 5 #define MAX_EQ_LOOP 5 -@@ -37,18 +38,42 @@ static const char * const pre_emph_names[] = { +@@ -37,18 +36,42 @@ static const char * const pre_emph_names #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 @@ -175,49 +321,27 @@ index 0be60e169e..0ddf5e02d6 100644 writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | V2L_CUR_SEL_1MA, ®s->pll_reg_2); -@@ -1029,6 +1054,9 @@ static int rk_edp_probe(struct udevice *dev) +@@ -1029,6 +1052,8 @@ static int rk_edp_probe(struct udevice * struct display_plat *uc_plat = dev_get_uclass_plat(dev); struct rk_edp_priv *priv = dev_get_priv(dev); struct rk3288_edp *regs = priv->regs; + struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ struct reset_ctl dp_rst; + struct clk clk; int ret; -@@ -1040,19 +1068,39 @@ static int rk_edp_probe(struct udevice *dev) - return ret; - } - -- int vop_id = uc_plat->source_id; -- debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); -+ ret = reset_get_by_name(dev, "dp", &dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); -+ return ret; -+ } +@@ -1043,16 +1068,17 @@ static int rk_edp_probe(struct udevice * + int vop_id = uc_plat->source_id; + debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - ret = clk_get_by_index(dev, 1, &clk); - if (ret >= 0) { - ret = clk_set_rate(&clk, 0); - clk_free(&clk); -+ ret = reset_assert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); -+ return ret; - } -+ udelay(20); -+ -+ ret = reset_deassert(&dp_rst); - if (ret) { +- } +- if (ret) { - debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -+ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); - return ret; - } - -+ int vop_id = uc_plat->source_id; -+ debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); -+ +- return ret; + if (edp_data->chip_type == RK3288_DP) { + ret = clk_get_by_index(dev, 1, &clk); + if (ret >= 0) { @@ -228,11 +352,12 @@ index 0be60e169e..0ddf5e02d6 100644 + debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + return ret; + } -+ } + } +- ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); if (ret >= 0) { ret = clk_set_rate(&clk, 192000000); -@@ -1065,15 +1113,17 @@ static int rk_edp_probe(struct udevice *dev) +@@ -1065,15 +1091,17 @@ static int rk_edp_probe(struct udevice * } /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ @@ -254,7 +379,7 @@ index 0be60e169e..0ddf5e02d6 100644 rk_edp_init_interrupt(regs); rk_edp_enable_sw_function(regs); ret = rk_edp_init_analog_func(regs); -@@ -1089,8 +1139,25 @@ static const struct dm_display_ops dp_rockchip_ops = { +@@ -1089,8 +1117,25 @@ static const struct dm_display_ops dp_ro .enable = rk_edp_enable, }; @@ -281,10 +406,749 @@ index 0be60e169e..0ddf5e02d6 100644 { } }; -diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c -index fcb393b906..0fabbf7e30 100644 ---- a/drivers/video/rockchip/rk_vop.c -+++ b/drivers/video/rockchip/rk_vop.c +Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +=================================================================== +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 + #define PD_CH0 (0x1 << 0) + + /* pll_reg_1 */ +-#define REF_CLK_24M (0x1 << 1) +-#define REF_CLK_27M (0x0 << 1) ++#define REF_CLK_24M (0x1 << 0) ++#define REF_CLK_27M (0x0 << 0) ++#define REF_CLK_MASK (0x1 << 0) + + /* line_map */ + #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) + +From patchwork Fri Mar 5 10:27:48 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447758 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPL32w8Bz9sRR + for ; Fri, 5 Mar 2021 21:36:43 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 44C1D82082; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.112947687@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:48 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 3/9] Rockchip: video: edp: Change interrupt polarity + configuration +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +The linux code is setting polarity configuration to 3 but +uboot code is setting it to 1. Change the configuration to match the +linux configuration + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +=================================================================== +--- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h ++++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 + + /* int_ctl */ + #define SOFT_INT_CTRL (0x1 << 2) +-#define INT_POL (0x1 << 0) ++#define INT_POL1 (0x1 << 1) ++#define INT_POL0 (0x1 << 0) ++#define INT_POL (INT_POL0 | INT_POL1) + + /* sys_ctl_1 */ + #define DET_STA (0x1 << 2) + +From patchwork Fri Mar 5 10:27:49 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447759 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 61DE01808B6; Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.175518624@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:49 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 4/9] Rockchip: video: vop: Reserve efi fb memory +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +When booting with EFI and graphics, the memory used for framebuffer +has to be reserved, otherwise it may leads to kernel memory +overwrite. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -21,6 +21,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -395,6 +397,11 @@ int rk_vop_probe(struct udevice *dev) + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + ++#if defined(CONFIG_EFI_LOADER) ++ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); ++ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); ++#endif ++ + priv->regs = (struct rk3288_vop *)dev_read_addr(dev); + + /* + +From patchwork Fri Mar 5 10:27:50 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447756 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPKd3f7rz9sRR + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 71166180A1E; Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.228214963@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:50 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 5/9] rockchip: Pinebook Pro: Enable edp +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +- uboot rockchip edp code is looking for a rockchip,panel property + for the edp dts node, so add it. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +=================================================================== +--- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -16,6 +16,10 @@ + }; + }; + ++&edp { ++ rockchip,panel = <&edp_panel>; ++}; ++ + &i2c0 { + u-boot,dm-pre-reloc; + }; + +From patchwork Fri Mar 5 10:27:51 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447754 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPKR1d2Fz9sRR + for ; Fri, 5 Mar 2021 21:36:11 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 12B478204C; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.290295328@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:51 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 6/9] rockchip: pwm: Fix default polarity +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +In the code, the default polarity is set to positive/positive, +which is neither normal polarity or inverted polarity. It's +only the hardware default. This leads to booting linux with +wrong polarity setting. + +Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE +by default instead. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/pwm/rk_pwm.c +=================================================================== +--- u-boot.orig/drivers/pwm/rk_pwm.c ++++ u-boot/drivers/pwm/rk_pwm.c +@@ -147,7 +147,7 @@ static int rk_pwm_probe(struct udevice * + priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); + + if (priv->data->supports_polarity) +- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; ++ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; + + return 0; + } + +From patchwork Fri Mar 5 10:27:52 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447761 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPLk2Jx9z9sRR + for ; Fri, 5 Mar 2021 21:37:18 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 95200827A5; + Fri, 5 Mar 2021 11:36:13 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 948DB8204A; Fri, 5 Mar 2021 11:35:53 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE + autolearn=ham autolearn_force=no version=3.4.2 +Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) + (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 353198204D + for ; Fri, 5 Mar 2021 11:35:44 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id E7A2D180ACE; Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.342131644@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:52 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 7/9] rockchip: video: vop: Fix format of fbbase in debug + string +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +The debug string printing the device name, framebuffer address and of node +is using %lu as format for the framebuffer address, which is not so nice. +Change it to %lx. + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c +@@ -240,7 +240,7 @@ static int rk_display_init(struct udevic + ofnode remote; + const char *compat; + +- debug("%s(%s, %lu, %s)\n", __func__, ++ debug("%s(%s, 0x%lx, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); + + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); + +From patchwork Fri Mar 5 10:27:53 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447762 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4DsPLx35qQz9sRR + for ; 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+ dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id F37E5180A23; Fri, 5 Mar 2021 11:35:41 +0100 (CET) +Message-ID: <20210305103307.395781510@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:53 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 8/9] rockchip: video: edp: Add missing reset support +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +In order to ensure that the eDP registers are in correct state, +add missing support for the eDP reset lines found in the device-tree. + + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/video/rockchip/rk_edp.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_edp.c ++++ u-boot/drivers/video/rockchip/rk_edp.c +@@ -8,11 +8,13 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -1053,6 +1055,7 @@ static int rk_edp_probe(struct udevice * + struct rk_edp_priv *priv = dev_get_priv(dev); + struct rk3288_edp *regs = priv->regs; + struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); ++ struct reset_ctl dp_rst; + + struct clk clk; + int ret; +@@ -1065,6 +1068,25 @@ static int rk_edp_probe(struct udevice * + return ret; + } + ++ ret = reset_get_by_name(dev, "dp", &dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ ++ ret = reset_assert(&dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ udelay(20); ++ ++ ret = reset_deassert(&dp_rst); ++ if (ret) { ++ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); ++ return ret; ++ } ++ + int vop_id = uc_plat->source_id; + debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + + +From patchwork Fri Mar 5 10:27:54 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Arnaud Patard (Rtp)" +X-Patchwork-Id: 1447763 +X-Patchwork-Delegate: agust@denx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=rtp-net.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org +Received: by lechat.rtp-net.org (Postfix, from userid 1000) + id 329B7180B08; Fri, 5 Mar 2021 11:35:42 +0100 (CET) +Message-ID: <20210305103307.447309277@rtp-net.org> +User-Agent: quilt/0.66 +Date: Fri, 05 Mar 2021 11:27:54 +0100 +From: Arnaud Patard (Rtp) +To: u-boot@lists.denx.de +Cc: Kever Yang , + Anatolij Gustschin , + Philipp Tomsich , + Peter Robinson , + Samuel Dionne-Riel , + Alper Nebi Yasak , + Arnaud Patard +Subject: [patch v4 9/9] rockchip: video: vop: Add reset support +References: <20210305102745.078091129@rtp-net.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +In order to ensure that the VOP registers are in correct state, +add missing support for the VOP reset lines found in the device-tree + +Signed-off-by: Arnaud Patard +Tested-by: Peter Robinson + +Index: u-boot/drivers/video/rockchip/rk_vop.c +=================================================================== +--- u-boot.orig/drivers/video/rockchip/rk_vop.c ++++ u-boot/drivers/video/rockchip/rk_vop.c @@ -8,9 +8,11 @@ #include #include @@ -296,17 +1160,8 @@ index fcb393b906..0fabbf7e30 100644 +#include #include #include - #include -@@ -20,6 +22,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -34,14 +38,16 @@ enum vop_pol { + #include +@@ -37,14 +39,16 @@ enum vop_pol { DCLK_INVERT = 3 }; @@ -325,7 +1180,7 @@ index fcb393b906..0fabbf7e30 100644 writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), ®s->win0_act_info); -@@ -89,6 +95,18 @@ static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, +@@ -92,6 +96,18 @@ static void rkvop_enable(struct rk3288_v writel(fbbase, ®s->win0_yrgb_mst); writel(0x01, ®s->reg_cfg_done); /* enable reg config */ @@ -344,52 +1199,15 @@ index fcb393b906..0fabbf7e30 100644 } static void rkvop_set_pin_polarity(struct udevice *dev, -@@ -235,12 +253,12 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) - struct clk clk; +@@ -239,6 +255,7 @@ static int rk_display_init(struct udevic enum video_log2_bpp l2bpp; ofnode remote; -+ const char *compat; + const char *compat; + struct reset_ctl dclk_rst; -- debug("%s(%s, %lu, %s)\n", __func__, -+ debug("%s(%s, %lx, %s)\n", __func__, + debug("%s(%s, 0x%lx, %s)\n", __func__, dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - -- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); -- debug("vop_id=%d\n", vop_id); - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - if (ret) - return ret; -@@ -282,6 +300,28 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) - if (disp) - break; - }; -+ compat = ofnode_get_property(remote, "compatible", NULL); -+ if (!compat) { -+ debug("%s(%s): Failed to find compatible property\n", -+ __func__, dev_read_name(dev)); -+ return -EINVAL; -+ } -+ if (strstr(compat, "edp")) { -+ vop_id = VOP_MODE_EDP; -+ } else if (strstr(compat, "mipi")) { -+ vop_id = VOP_MODE_MIPI; -+ } else if (strstr(compat, "hdmi")) { -+ vop_id = VOP_MODE_HDMI; -+ } else if (strstr(compat, "cdn-dp")) { -+ vop_id = VOP_MODE_DP; -+ } else if (strstr(compat, "lvds")) { -+ vop_id = VOP_MODE_LVDS; -+ } else { -+ debug("%s(%s): Failed to find vop mode for %s\n", -+ __func__, dev_read_name(dev), compat); -+ return -EINVAL; -+ } -+ debug("vop_id=%d\n", vop_id); - - disp_uc_plat = dev_get_uclass_plat(disp); - debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); -@@ -331,7 +371,14 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) +@@ -355,7 +372,14 @@ static int rk_display_init(struct udevic } rkvop_mode_set(dev, &timing, vop_id); @@ -405,7 +1223,7 @@ index fcb393b906..0fabbf7e30 100644 ret = display_enable(disp, 1 << l2bpp, &timing); if (ret) -@@ -368,11 +415,38 @@ int rk_vop_probe(struct udevice *dev) +@@ -392,11 +416,31 @@ int rk_vop_probe(struct udevice *dev) struct rk_vop_priv *priv = dev_get_priv(dev); int ret = 0; ofnode port, node; @@ -434,16 +1252,6 @@ index fcb393b906..0fabbf7e30 100644 + return ret; + } + -+ plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size; -+ -+#if defined(CONFIG_EFI_LOADER) -+ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); -+ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); -+#endif -+ - priv->regs = (struct rk3288_vop *)dev_read_addr(dev); - - /* --- -2.29.2 - + #if defined(CONFIG_EFI_LOADER) + debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); + efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); diff --git a/rng-Add-iProc-RNG200-driver.patch b/rng-Add-iProc-RNG200-driver.patch deleted file mode 100644 index b5e54c5..0000000 --- a/rng-Add-iProc-RNG200-driver.patch +++ /dev/null @@ -1,450 +0,0 @@ -From patchwork Tue Dec 15 09:49:23 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: mbrugger -X-Patchwork-Id: 1416366 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dmarc=fail (p=none dis=none) header.from=kernel.org -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4CwD58649Dz9s0b - for ; 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- dmarc=pass (p=none dis=none) header.from=kernel.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=matthias.bgg@kernel.org -From: matthias.bgg@kernel.org -Authentication-Results: mail.kernel.org; - dkim=permerror (bad message/signature format) -To: sughosh.ganu@linaro.org, - xypron.glpk@gmx.de -Cc: u-boot@lists.denx.de, - Matthias Brugger -Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver -Date: Tue, 15 Dec 2020 10:49:23 +0100 -Message-Id: <20201215094924.30072-1-matthias.bgg@kernel.org> -X-Mailer: git-send-email 2.29.2 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -From: Matthias Brugger - -Add support for random number generator RNG200. -This is for example found on RPi4. - -Signed-off-by: Matthias Brugger -Tested-by: Heinrich Schuchardt ---- - -Changes in v2: None - - drivers/rng/Kconfig | 6 ++ - drivers/rng/Makefile | 1 + - drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 193 insertions(+) - create mode 100644 drivers/rng/iproc_rng200.c - -diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig -index 11001c8ae7..94915d45b3 100644 ---- a/drivers/rng/Kconfig -+++ b/drivers/rng/Kconfig -@@ -46,4 +46,10 @@ config RNG_ROCKCHIP - Enable random number generator for rockchip.This driver is - support rng module of crypto v1 and crypto v2. - -+config RNG_IPROC200 -+ bool "Broadcom iProc RNG200 random number generator" -+ depends on DM_RNG -+ default n -+ help -+ Enable random number generator for RPI4. - endif -diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile -index 8953406882..39f7ee3f03 100644 ---- a/drivers/rng/Makefile -+++ b/drivers/rng/Makefile -@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o - obj-$(CONFIG_RNG_MSM) += msm_rng.o - obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o - obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o -+obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o -diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c -new file mode 100644 -index 0000000000..1063f43953 ---- /dev/null -+++ b/drivers/rng/iproc_rng200.c -@@ -0,0 +1,186 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Copyright 2020, Matthias Brugger -+ * -+ * Driver for Raspberry Pi hardware random number generator -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define usleep_range(a, b) udelay((b)) -+ -+#define RNG_CTRL_OFFSET 0x00 -+#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF -+#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 -+#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 -+ -+#define RNG_SOFT_RESET_OFFSET 0x04 -+#define RNG_SOFT_RESET 0x00000001 -+ -+#define RBG_SOFT_RESET_OFFSET 0x08 -+#define RBG_SOFT_RESET 0x00000001 -+ -+#define RNG_INT_STATUS_OFFSET 0x18 -+#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000 -+#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020 -+ -+#define RNG_FIFO_DATA_OFFSET 0x20 -+ -+#define RNG_FIFO_COUNT_OFFSET 0x24 -+#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF -+ -+struct iproc_rng200_plat { -+ fdt_addr_t base; -+}; -+ -+static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable) -+{ -+ fdt_addr_t rng_base = pdata->base; -+ u32 val; -+ -+ val = readl(rng_base + RNG_CTRL_OFFSET); -+ val &= ~RNG_CTRL_RNG_RBGEN_MASK; -+ if (enable) -+ val |= RNG_CTRL_RNG_RBGEN_ENABLE; -+ else -+ val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; -+ -+ writel(val, rng_base + RNG_CTRL_OFFSET); -+ -+} -+ -+static void iproc_rng200_restart(struct iproc_rng200_plat *pdata) -+{ -+ fdt_addr_t rng_base = pdata->base; -+ u32 val; -+ -+ iproc_rng200_enable(pdata, false); -+ -+ /* Clear all interrupt status */ -+ writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET); -+ -+ /* Reset RNG and RBG */ -+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET); -+ val |= RBG_SOFT_RESET; -+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET); -+ -+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET); -+ val |= RNG_SOFT_RESET; -+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET); -+ -+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET); -+ val &= ~RNG_SOFT_RESET; -+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET); -+ -+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET); -+ val &= ~RBG_SOFT_RESET; -+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET); -+ -+ iproc_rng200_enable(pdata, true); -+} -+ -+static int iproc_rng200_read(struct udevice *dev, void *data, size_t len) -+{ -+ struct iproc_rng200_plat *priv = dev_get_plat(dev); -+ char *buf = (char *)data; -+ u32 num_remaining = len; -+ u32 status; -+ -+ #define MAX_RESETS_PER_READ 1 -+ u32 num_resets = 0; -+ -+ while (num_remaining > 0) { -+ -+ /* Is RNG sane? If not, reset it. */ -+ status = readl(priv->base + RNG_INT_STATUS_OFFSET); -+ if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK | -+ RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) { -+ -+ if (num_resets >= MAX_RESETS_PER_READ) -+ return len - num_remaining; -+ -+ iproc_rng200_restart(priv); -+ num_resets++; -+ } -+ -+ /* Are there any random numbers available? */ -+ if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) & -+ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) { -+ -+ if (num_remaining >= sizeof(u32)) { -+ /* Buffer has room to store entire word */ -+ *(u32 *)buf = readl(priv->base + -+ RNG_FIFO_DATA_OFFSET); -+ buf += sizeof(u32); -+ num_remaining -= sizeof(u32); -+ } else { -+ /* Buffer can only store partial word */ -+ u32 rnd_number = readl(priv->base + -+ RNG_FIFO_DATA_OFFSET); -+ memcpy(buf, &rnd_number, num_remaining); -+ buf += num_remaining; -+ num_remaining = 0; -+ } -+ -+ } else { -+ /* Can wait, give others chance to run */ -+ usleep_range(min(num_remaining * 10, 500U), 500); -+ } -+ } -+ -+ return 0; -+} -+ -+static int iproc_rng200_probe(struct udevice *dev) -+{ -+ struct iproc_rng200_plat *priv = dev_get_plat(dev); -+ -+ iproc_rng200_enable(priv, true); -+ -+ return 0; -+} -+ -+static int iproc_rng200_remove(struct udevice *dev) -+{ -+ struct iproc_rng200_plat *priv = dev_get_plat(dev); -+ -+ iproc_rng200_enable(priv, false); -+ -+ return 0; -+} -+ -+static int iproc_rng200_of_to_plat(struct udevice *dev) -+{ -+ struct iproc_rng200_plat *pdata = dev_get_plat(dev); -+ -+ pdata->base = dev_read_addr(dev); -+ if (!pdata->base) -+ return -ENODEV; -+ -+ return 0; -+} -+ -+static const struct dm_rng_ops iproc_rng200_ops = { -+ .read = iproc_rng200_read, -+}; -+ -+static const struct udevice_id iproc_rng200_rng_match[] = { -+ { .compatible = "brcm,bcm2711-rng200", }, -+ { .compatible = "brcm,iproc-rng200", }, -+ {}, -+}; -+ -+U_BOOT_DRIVER(iproc_rng200_rng) = { -+ .name = "iproc_rng200-rng", -+ .id = UCLASS_RNG, -+ .of_match = iproc_rng200_rng_match, -+ .ops = &iproc_rng200_ops, -+ .probe = iproc_rng200_probe, -+ .remove = iproc_rng200_remove, -+ .priv_auto = sizeof(struct iproc_rng200_plat), -+ .of_to_plat = iproc_rng200_of_to_plat, -+}; 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- dmarc=pass (p=none dis=none) header.from=kernel.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=matthias.bgg@kernel.org -From: matthias.bgg@kernel.org -Authentication-Results: mail.kernel.org; - dkim=permerror (bad message/signature format) -To: sughosh.ganu@linaro.org, - xypron.glpk@gmx.de -Cc: u-boot@lists.denx.de, - Matthias Brugger -Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs -Date: Tue, 15 Dec 2020 10:49:24 +0100 -Message-Id: <20201215094924.30072-2-matthias.bgg@kernel.org> -X-Mailer: git-send-email 2.29.2 -In-Reply-To: <20201215094924.30072-1-matthias.bgg@kernel.org> -References: <20201215094924.30072-1-matthias.bgg@kernel.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de -X-Virus-Status: Clean - -From: Matthias Brugger - -We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's -config so that it can be used. - -Signed-off-by: Matthias Brugger ---- - -Changes in v2: -- fix defconfigs using savedefconfig (Heinrich) - - configs/rpi_4_32b_defconfig | 2 ++ - configs/rpi_4_defconfig | 2 ++ - configs/rpi_arm64_defconfig | 2 ++ - drivers/rng/iproc_rng200.c | 1 - - 4 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 5ddd838fd5..4039e46c81 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - CONFIG_DM_RESET=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_IPROC200=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 2590d0a696..46b6cc3046 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - CONFIG_DM_RESET=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_IPROC200=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 2639219a1a..b75144036d 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - # CONFIG_PINCTRL_GENERIC is not set - CONFIG_DM_RESET=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_IPROC200=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y -diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c -index 1063f43953..378f6cf48d 100644 ---- a/drivers/rng/iproc_rng200.c -+++ b/drivers/rng/iproc_rng200.c -@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable - val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; - - writel(val, rng_base + RNG_CTRL_OFFSET); -- - } - - static void iproc_rng200_restart(struct iproc_rng200_plat *pdata) diff --git a/sources b/sources index 6d65d26..6a0feed 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04-rc2.tar.bz2) = 7bf07f15e0c5f5e63ef8cb9568278ea7c209e484bbb599c47b22a8d2e5c007cc204eec365e5328dea3e7b016cd6ba0cb4c917330cc76163b1016f7c7762ad1bf +SHA512 (u-boot-2021.04-rc3.tar.bz2) = 0d6b46b791475ce21320fbc2b361235d09588a5b912d40b32a11d937adc7c0e7b75b893ba4e8dc55156cfd99f684fc56839c17d0b9c021f5cfaaf5e5997f93ba diff --git a/uboot-tools.spec b/uboot-tools.spec index 55f2632..17539a5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2021.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,13 +27,9 @@ Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -#Patch12: rk3399-Pinebook-pro-EDP-support.patch -# Raspberry Pi improvements -Patch13: Raspberry-Pi-400-Compute-Module-4-support.patch -Patch14: Raspberry-Pi-4-PCIe-handover.patch -Patch15: rng-Add-iProc-RNG200-driver.patch +Patch12: rk3399-Pinebook-pro-EDP-support.patch # Fixes for Allwinner network issues -Patch16: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +Patch13: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch BuildRequires: bc BuildRequires: dtc @@ -245,6 +241,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Mar 08 2021 Peter Robinson - 2021.04-0.4.rc3 +- Update to 2021.04 RC3 + * Tue Feb 16 2021 Peter Robinson - 2021.04-0.3.rc2 - Update to 2021.04 RC2 From 2abadc51692f863049baca9568ddff2529fb5fed Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 13 Mar 2021 21:21:20 +0000 Subject: [PATCH 138/351] Fixes for SMP on RPi3, initial patch for pinepohone 3g --- ...r-consider-no-map-property-of-reserv.patch | 82 +++++ ...ort-asymmetric-dual-rank-DRAM-on-A64.patch | 337 ++++++++++++++++++ uboot-tools.spec | 8 +- 3 files changed, 426 insertions(+), 1 deletion(-) create mode 100644 0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch create mode 100644 sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch diff --git a/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch b/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch new file mode 100644 index 0000000..485f966 --- /dev/null +++ b/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch @@ -0,0 +1,82 @@ +From 62f3f85e50692b2685d1056a041d1dbb9e16f2a4 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 13 Mar 2021 14:42:29 +0000 +Subject: [PATCH] Revert: efi_loader: consider no-map property of reserved + memory + +This basically reverts 4cbb2930bd8c, but not directly as it's moved +about since. The patch breaks SMP on the Raspberry Pi 3 (original 3B +and 3B+) so on Linux only one CPU core comes online. I'm not exactly +sure why but a bisect idendified the patch and sure enough a revert +fixes the issue. + +Signed-off-by: Peter Robinson +--- + lib/efi_loader/efi_dt_fixup.c | 33 ++++++--------------------------- + 1 file changed, 6 insertions(+), 27 deletions(-) + +diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c +index a4529ee3ef..87630f7857 100644 +--- a/lib/efi_loader/efi_dt_fixup.c ++++ b/lib/efi_loader/efi_dt_fixup.c +@@ -13,29 +13,13 @@ + + const efi_guid_t efi_guid_dt_fixup_protocol = EFI_DT_FIXUP_PROTOCOL_GUID; + +-/** +- * efi_reserve_memory() - add reserved memory to memory map +- * +- * @addr: start address of the reserved memory range +- * @size: size of the reserved memory range +- * @nomap: indicates that the memory range shall not be accessed by the +- * UEFI payload +- */ +-static void efi_reserve_memory(u64 addr, u64 size, bool nomap) ++static void efi_reserve_memory(u64 addr, u64 size) + { +- int type; +- efi_uintn_t ret; +- + /* Convert from sandbox address space. */ + addr = (uintptr_t)map_sysmem(addr, 0); ++ if (efi_add_memory_map(addr, size, ++ EFI_RESERVED_MEMORY_TYPE) != EFI_SUCCESS) + +- if (nomap) +- type = EFI_RESERVED_MEMORY_TYPE; +- else +- type = EFI_BOOT_SERVICES_DATA; +- +- ret = efi_add_memory_map(addr, size, type); +- if (ret != EFI_SUCCESS) + log_err("Reserved memory mapping failed addr %llx size %llx\n", + addr, size); + } +@@ -61,7 +45,7 @@ void efi_carve_out_dt_rsv(void *fdt) + for (i = 0; i < nr_rsv; i++) { + if (fdt_get_mem_rsv(fdt, i, &addr, &size) != 0) + continue; +- efi_reserve_memory(addr, size, false); ++ efi_reserve_memory(addr, size); + } + + /* process reserved-memory */ +@@ -81,13 +65,8 @@ void efi_carve_out_dt_rsv(void *fdt) + * a size instead of a reg property. + */ + if (fdt_addr != FDT_ADDR_T_NONE && +- fdtdec_get_is_enabled(fdt, subnode)) { +- bool nomap; +- +- nomap = !!fdt_getprop(fdt, subnode, "no-map", +- NULL); +- efi_reserve_memory(fdt_addr, fdt_size, nomap); +- } ++ fdtdec_get_is_enabled(fdt, subnode)) ++ efi_reserve_memory(fdt_addr, fdt_size); + subnode = fdt_next_subnode(fdt, subnode); + } + } +-- +2.30.2 + diff --git a/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch b/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch new file mode 100644 index 0000000..c2b6946 --- /dev/null +++ b/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch @@ -0,0 +1,337 @@ +From patchwork Thu Feb 25 16:13:24 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Icenowy Zheng +X-Patchwork-Id: 1444507 +X-Patchwork-Delegate: andre.przywara@arm.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (1024-bit key; + unprotected) header.d=mymailcheap.com header.i=@mymailcheap.com + header.a=rsa-sha256 header.s=default header.b=cioDKJo2; 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Reverse +engineering of newest libdram of A64 from Allwinner shows that A64 has +this register too. It's bit 0 (which enables dual rank in rank 0 +configuration register) means a dedicated rank size setup is used for +rank 1. + +Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB +rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank +DRAM support necessary. + +Add this support. The code could support both A64 and R40, but because +dual rank detection is broken on R40 now, we cannot really use it on R40 +currently. + +Signed-off-by: Icenowy Zheng +--- + .../include/asm/arch-sunxi/dram_sunxi_dw.h | 11 ++- + arch/arm/mach-sunxi/dram_sunxi_dw.c | 94 +++++++++++++++---- + 2 files changed, 82 insertions(+), 23 deletions(-) + +diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h +index a5a7ebde44..e843c14202 100644 +--- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h ++++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h +@@ -215,12 +215,17 @@ struct sunxi_mctl_ctl_reg { + #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) + /* The eight data lines (DQn) plus DM, DQS and DQSN */ + #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) +-struct dram_para { ++ ++struct rank_para { + u16 page_size; +- u8 bus_full_width; +- u8 dual_rank; + u8 row_bits; + u8 bank_bits; ++}; ++ ++struct dram_para { ++ u8 dual_rank; ++ u8 bus_full_width; ++ struct rank_para ranks[2]; + const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; + const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; + const u8 ac_delays[31]; +diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c +index d0600011ff..2b9d631d49 100644 +--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c ++++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c +@@ -399,11 +399,19 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) + #else + #error Unsupported DRAM type! + #endif +- (para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | ++ (para->ranks[0].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | + MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | + (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) | +- MCTL_CR_PAGE_SIZE(para->page_size) | +- MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); ++ MCTL_CR_PAGE_SIZE(para->ranks[0].page_size) | ++ MCTL_CR_ROW_BITS(para->ranks[0].row_bits), &mctl_com->cr); ++ ++ if (para->dual_rank && (socid == SOCID_A64 || socid == SOCID_R40)) { ++ writel((para->ranks[1].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | ++ MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | ++ MCTL_CR_DUAL_RANK | ++ MCTL_CR_PAGE_SIZE(para->ranks[1].page_size) | ++ MCTL_CR_ROW_BITS(para->ranks[1].row_bits), &mctl_com->cr_r1); ++ } + + if (socid == SOCID_R40) { + if (para->dual_rank) +@@ -646,35 +654,63 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) + return 0; + } + +-static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) ++/* ++ * Test if memory at offset offset matches memory at a certain base ++ */ ++static bool mctl_mem_matches_base(u32 offset, ulong base) ++{ ++ /* Try to write different values to RAM at two addresses */ ++ writel(0, base); ++ writel(0xaa55aa55, base + offset); ++ dsb(); ++ /* Check if the same value is actually observed when reading back */ ++ return readl(base) == ++ readl(base + offset); ++} ++ ++static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) + { + /* detect row address bits */ +- para->page_size = 512; +- para->row_bits = 16; +- para->bank_bits = 2; ++ rank->page_size = 512; ++ rank->row_bits = 16; ++ rank->bank_bits = 2; + mctl_set_cr(socid, para); + +- for (para->row_bits = 11; para->row_bits < 16; para->row_bits++) +- if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size)) ++ for (rank->row_bits = 11; rank->row_bits < 16; rank->row_bits++) ++ if (mctl_mem_matches_base((1 << (rank->row_bits + rank->bank_bits)) * rank->page_size, base)) + break; + + /* detect bank address bits */ +- para->bank_bits = 3; ++ rank->bank_bits = 3; + mctl_set_cr(socid, para); + +- for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++) +- if (mctl_mem_matches((1 << para->bank_bits) * para->page_size)) ++ for (rank->bank_bits = 2; rank->bank_bits < 3; rank->bank_bits++) ++ if (mctl_mem_matches_base((1 << rank->bank_bits) * rank->page_size, base)) + break; + + /* detect page size */ +- para->page_size = 8192; ++ rank->page_size = 8192; + mctl_set_cr(socid, para); + +- for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2) +- if (mctl_mem_matches(para->page_size)) ++ for (rank->page_size = 512; rank->page_size < 8192; rank->page_size *= 2) ++ if (mctl_mem_matches_base(rank->page_size, base)) + break; + } + ++static unsigned long mctl_calc_rank_size(struct rank_para *rank) ++{ ++ return (1UL << (rank->row_bits + rank->bank_bits)) * rank->page_size; ++} ++ ++static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) ++{ ++ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE, ¶->ranks[0]); ++ ++ if ((socid == SOCID_A64 || socid == SOCID_R40) && para->dual_rank) { ++ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE + mctl_calc_rank_size(¶->ranks[0]), ¶->ranks[1]); ++ } ++} ++ + /* + * The actual values used here are taken from Allwinner provided boot0 + * binaries, though they are probably board specific, so would likely benefit +@@ -769,12 +805,23 @@ unsigned long sunxi_dram_init(void) + struct sunxi_mctl_ctl_reg * const mctl_ctl = + (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; + ++ unsigned long size; ++ + struct dram_para para = { + .dual_rank = 1, + .bus_full_width = 1, +- .row_bits = 15, +- .bank_bits = 3, +- .page_size = 4096, ++ .ranks = { ++ { ++ .row_bits = 15, ++ .bank_bits = 3, ++ .page_size = 4096, ++ }, ++ { ++ .row_bits = 15, ++ .bank_bits = 3, ++ .page_size = 4096, ++ } ++ }, + + #if defined(CONFIG_MACH_SUN8I_H3) + .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, +@@ -846,6 +893,13 @@ unsigned long sunxi_dram_init(void) + mctl_auto_detect_dram_size(socid, ¶); + mctl_set_cr(socid, ¶); + +- return (1UL << (para.row_bits + para.bank_bits)) * para.page_size * +- (para.dual_rank ? 2 : 1); ++ size = mctl_calc_rank_size(¶.ranks[0]); ++ if (socid == SOCID_A64 || socid == SOCID_R40) { ++ if (para.dual_rank) ++ size += mctl_calc_rank_size(¶.ranks[1]); ++ } else if (para.dual_rank) { ++ size *= 2; ++ } ++ ++ return size; + } diff --git a/uboot-tools.spec b/uboot-tools.spec index 17539a5..5660be2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,6 +22,7 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement +Patch9: 0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes @@ -30,6 +31,7 @@ Patch11: 0001-Fix-BeagleAI-detection.patch Patch12: rk3399-Pinebook-pro-EDP-support.patch # Fixes for Allwinner network issues Patch13: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +Patch14: sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch BuildRequires: bc BuildRequires: dtc @@ -241,6 +243,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Mar 13 2021 Peter Robinson - 2021.04-0.5.rc3 +- Fix for SMP on RPi3B and RPi3B+ +- Initial support for Pinephone 3Gb edition + * Mon Mar 08 2021 Peter Robinson - 2021.04-0.4.rc3 - Update to 2021.04 RC3 From 610279571ca60f430935dcd52c59e88fa8b3aa7d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 17 Mar 2021 09:10:48 +0000 Subject: [PATCH 139/351] 2021.04 RC4, upstream rpi3 smp fix --- ...r-consider-no-map-property-of-reserv.patch | 82 ------------------- ...emory-type-for-memory-reservation-bl.patch | 38 +++++++++ sources | 2 +- uboot-tools.spec | 10 ++- 4 files changed, 46 insertions(+), 86 deletions(-) delete mode 100644 0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch create mode 100644 0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch diff --git a/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch b/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch deleted file mode 100644 index 485f966..0000000 --- a/0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 62f3f85e50692b2685d1056a041d1dbb9e16f2a4 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 13 Mar 2021 14:42:29 +0000 -Subject: [PATCH] Revert: efi_loader: consider no-map property of reserved - memory - -This basically reverts 4cbb2930bd8c, but not directly as it's moved -about since. The patch breaks SMP on the Raspberry Pi 3 (original 3B -and 3B+) so on Linux only one CPU core comes online. I'm not exactly -sure why but a bisect idendified the patch and sure enough a revert -fixes the issue. - -Signed-off-by: Peter Robinson ---- - lib/efi_loader/efi_dt_fixup.c | 33 ++++++--------------------------- - 1 file changed, 6 insertions(+), 27 deletions(-) - -diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c -index a4529ee3ef..87630f7857 100644 ---- a/lib/efi_loader/efi_dt_fixup.c -+++ b/lib/efi_loader/efi_dt_fixup.c -@@ -13,29 +13,13 @@ - - const efi_guid_t efi_guid_dt_fixup_protocol = EFI_DT_FIXUP_PROTOCOL_GUID; - --/** -- * efi_reserve_memory() - add reserved memory to memory map -- * -- * @addr: start address of the reserved memory range -- * @size: size of the reserved memory range -- * @nomap: indicates that the memory range shall not be accessed by the -- * UEFI payload -- */ --static void efi_reserve_memory(u64 addr, u64 size, bool nomap) -+static void efi_reserve_memory(u64 addr, u64 size) - { -- int type; -- efi_uintn_t ret; -- - /* Convert from sandbox address space. */ - addr = (uintptr_t)map_sysmem(addr, 0); -+ if (efi_add_memory_map(addr, size, -+ EFI_RESERVED_MEMORY_TYPE) != EFI_SUCCESS) - -- if (nomap) -- type = EFI_RESERVED_MEMORY_TYPE; -- else -- type = EFI_BOOT_SERVICES_DATA; -- -- ret = efi_add_memory_map(addr, size, type); -- if (ret != EFI_SUCCESS) - log_err("Reserved memory mapping failed addr %llx size %llx\n", - addr, size); - } -@@ -61,7 +45,7 @@ void efi_carve_out_dt_rsv(void *fdt) - for (i = 0; i < nr_rsv; i++) { - if (fdt_get_mem_rsv(fdt, i, &addr, &size) != 0) - continue; -- efi_reserve_memory(addr, size, false); -+ efi_reserve_memory(addr, size); - } - - /* process reserved-memory */ -@@ -81,13 +65,8 @@ void efi_carve_out_dt_rsv(void *fdt) - * a size instead of a reg property. - */ - if (fdt_addr != FDT_ADDR_T_NONE && -- fdtdec_get_is_enabled(fdt, subnode)) { -- bool nomap; -- -- nomap = !!fdt_getprop(fdt, subnode, "no-map", -- NULL); -- efi_reserve_memory(fdt_addr, fdt_size, nomap); -- } -+ fdtdec_get_is_enabled(fdt, subnode)) -+ efi_reserve_memory(fdt_addr, fdt_size); - subnode = fdt_next_subnode(fdt, subnode); - } - } --- -2.30.2 - diff --git a/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch b/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch new file mode 100644 index 0000000..4ca9f5d --- /dev/null +++ b/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch @@ -0,0 +1,38 @@ +From ca1e8231dcf89b78c6860239281bbe36e7a63341 Mon Sep 17 00:00:00 2001 +From: Mark Kettenis +Date: Sun, 14 Mar 2021 20:04:24 +0100 +Subject: [PATCH] efi_loader: fix memory type for memory reservation block + +The devicetree specification clearly states that: + + As with the /reserved-memory node, when booting via UEFI + entries in the Memory Reservation Block must also be listed + in the system memory map obtained via the GetMemoryMap() toi + protect against allocations by UEFI applications. The memory + reservation block entries should be listed with type + EfiReservedMemoryType. + +This restores the behaviour that was changed by commit 4cbb2930bd8c +("efi_loader: consider no-map property of reserved memory"). + +Signed-off-by: Mark Kettenis +--- + lib/efi_loader/efi_dt_fixup.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c +index a4529ee3ef..b6fe5d2e5a 100644 +--- a/lib/efi_loader/efi_dt_fixup.c ++++ b/lib/efi_loader/efi_dt_fixup.c +@@ -61,7 +61,7 @@ void efi_carve_out_dt_rsv(void *fdt) + for (i = 0; i < nr_rsv; i++) { + if (fdt_get_mem_rsv(fdt, i, &addr, &size) != 0) + continue; +- efi_reserve_memory(addr, size, false); ++ efi_reserve_memory(addr, size, true); + } + + /* process reserved-memory */ +-- +2.30.2 + diff --git a/sources b/sources index 6a0feed..7d286d7 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04-rc3.tar.bz2) = 0d6b46b791475ce21320fbc2b361235d09588a5b912d40b32a11d937adc7c0e7b75b893ba4e8dc55156cfd99f684fc56839c17d0b9c021f5cfaaf5e5997f93ba +SHA512 (u-boot-2021.04-rc4.tar.bz2) = 522f9e7886a357ad573088fbbb4be17b91efedf5651808d7cbe53f4b3c4da236a96d5e781b8464d17bc6f961bd65cf3fb58d707bc7f10ce1df002800045cfd23 diff --git a/uboot-tools.spec b/uboot-tools.spec index 5660be2..28d5afb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2021.04 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,7 +22,7 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement -Patch9: 0001-Revert-efi_loader-consider-no-map-property-of-reserv.patch +Patch9: 0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes @@ -243,6 +243,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Mar 17 2021 Peter Robinson - 2021.04-0.6.rc4 +- Update to 2021.04 RC4 +- Move to upstream fix for SMP on RPi3B and RPi3B+ + * Sat Mar 13 2021 Peter Robinson - 2021.04-0.5.rc3 - Fix for SMP on RPi3B and RPi3B+ - Initial support for Pinephone 3Gb edition From 060f78f396f1608e21a4cc3b9ae192d96596b52a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 19 Apr 2021 14:07:58 +0100 Subject: [PATCH 140/351] 2021.04 GA, DTB load fix, add Turris Omnia, rockchip fixes --- ...emory-type-for-memory-reservation-bl.patch | 38 --- aarch64-boards | 1 - arm-boards | 2 +- ...-hang-when-multiple-controllers-exit.patch | 233 ++++++++++++++++++ rockchip-fix-mmc-numbering.patch | 57 +++++ rockchip-spl-u-boot-itb-offset.patch | 11 - sources | 2 +- uboot-tools.spec | 47 +++- ...DT-from-any-partition-on-boot-device.patch | 22 +- 9 files changed, 339 insertions(+), 74 deletions(-) delete mode 100644 0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch create mode 100644 phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch create mode 100644 rockchip-fix-mmc-numbering.patch delete mode 100644 rockchip-spl-u-boot-itb-offset.patch diff --git a/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch b/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch deleted file mode 100644 index 4ca9f5d..0000000 --- a/0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch +++ /dev/null @@ -1,38 +0,0 @@ -From ca1e8231dcf89b78c6860239281bbe36e7a63341 Mon Sep 17 00:00:00 2001 -From: Mark Kettenis -Date: Sun, 14 Mar 2021 20:04:24 +0100 -Subject: [PATCH] efi_loader: fix memory type for memory reservation block - -The devicetree specification clearly states that: - - As with the /reserved-memory node, when booting via UEFI - entries in the Memory Reservation Block must also be listed - in the system memory map obtained via the GetMemoryMap() toi - protect against allocations by UEFI applications. The memory - reservation block entries should be listed with type - EfiReservedMemoryType. - -This restores the behaviour that was changed by commit 4cbb2930bd8c -("efi_loader: consider no-map property of reserved memory"). - -Signed-off-by: Mark Kettenis ---- - lib/efi_loader/efi_dt_fixup.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c -index a4529ee3ef..b6fe5d2e5a 100644 ---- a/lib/efi_loader/efi_dt_fixup.c -+++ b/lib/efi_loader/efi_dt_fixup.c -@@ -61,7 +61,7 @@ void efi_carve_out_dt_rsv(void *fdt) - for (i = 0; i < nr_rsv; i++) { - if (fdt_get_mem_rsv(fdt, i, &addr, &size) != 0) - continue; -- efi_reserve_memory(addr, size, false); -+ efi_reserve_memory(addr, size, true); - } - - /* process reserved-memory */ --- -2.30.2 - diff --git a/aarch64-boards b/aarch64-boards index 1d81436..15abee1 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -5,7 +5,6 @@ bananapi_m64 beelink_gs1 dragonboard410c dragonboard820c -espresso7420 evb-rk3328 evb-rk3399 ficus-rk3399 diff --git a/arm-boards b/arm-boards index a2c8d89..63ab288 100644 --- a/arm-boards +++ b/arm-boards @@ -57,7 +57,6 @@ inet_q972 Itead_Ibox_A20 jesurun_q5 jetson-tk1 -kc1 Lamobo_R1 libretech_all_h3_cc_h2_plus Linksprite_pcDuino @@ -128,6 +127,7 @@ tbs_a711 tinker-rk3288 tinker-s-rk3288 trimslice +turris_omnia udoo udoo_neo usbarmory diff --git a/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch b/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch new file mode 100644 index 0000000..81f1cdb --- /dev/null +++ b/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch @@ -0,0 +1,233 @@ +From patchwork Tue Apr 6 15:10:59 2021 +Content-Type: text/plain; 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a=rsa-sha256; c=simple/simple; d=aosc.io; s=default; + t=1617721874; bh=qb5gt5o7M9qjdJd67A3WHGZp/76w4s4FS6+u1VuEh/o=; + h=From:To:Cc:Subject:Date:From; + b=mWwYCh9AM8eRWm9hiEqirytotj/G/C1p9r2fd0zUxPhS0UQH+kw6L3RWZnsfmXAYq + HmYFiM3ktIfwevqQw89tOi8c2ktb49iYOyHXkfi8hTZl1dNsJDS94uyzBiHYY+U7x5 + P0aTRRaL5C8ua2c1GedoPx06nrARO/KMEFy39rxI= +From: Icenowy Zheng +To: Simon Glass , Kever Yang , + Frank Wang , + Jagan Teki +Cc: u-boot@lists.denx.de, + Icenowy Zheng +Subject: [PATCH] phy: rockchip: inno-usb2: fix hang when multiple controllers + exit +Date: Tue, 6 Apr 2021 23:10:59 +0800 +Message-Id: <20210406151059.1187379-1-icenowy@aosc.io> +X-Mailer: git-send-email 2.30.2 +MIME-Version: 1.0 +X-Rspamd-Server: mail20.mymailcheap.com +X-Spamd-Result: default: False [4.90 / 20.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; + ARC_NA(0.00)[]; R_DKIM_ALLOW(0.00)[aosc.io:s=default]; + RECEIVED_SPAMHAUS_PBL(0.00)[59.41.163.135:received]; + FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; + R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; + MIME_GOOD(-0.10)[text/plain]; DMARC_NA(0.00)[aosc.io]; + BROKEN_CONTENT_TYPE(1.50)[]; R_SPF_SOFTFAIL(0.00)[~all]; + RCPT_COUNT_FIVE(0.00)[6]; ML_SERVERS(-3.10)[213.133.102.83]; + DKIM_TRACE(0.00)[aosc.io:+]; MID_CONTAINS_FROM(1.00)[]; + RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + ASN(0.00)[asn:24940, ipnet:213.133.96.0/19, country:DE]; + RCVD_COUNT_TWO(0.00)[2]; + HFILTER_HELO_BAREIP(3.00)[213.133.102.83,1] +X-Rspamd-Queue-Id: C9EA3400B6 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +The OHCI and EHCI controllers are both bound to the same PHY. They will +both do init and power_on operations when the controller is brought up +and both do power_off and exit when the controller is stopped. However, +the PHY uclass of U-Boot is not as sane as we thought -- they won't +maintain a status mark for PHYs, and thus the functions of the PHYs +could be called for multiple times. Calling init/power_on for multiple +times have no severe problems, however calling power_off/exit for +multiple times have a problem -- the first exit call will stop the PHY +clock, and power_off/exit calls after it still trying to write to PHY +registers. The write operation to PHY registers will fail because clock +is already stopped. + +Adapt the count mechanism from phy-sun4i-usb to both init/exit and +power_on/power_off functions to phy-rockchip-inno-usb2 to fix this +problem. With this stopping USB controllers (manually or before booting +a kernel) will work. + +Signed-off-by: Icenowy Zheng +Fixes: ac97a9ece14e ("phy: rockchip: Add Rockchip USB2PHY driver") +--- + drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +index 62b8ba3a4a..be9cc99d90 100644 +--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c ++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +@@ -62,6 +62,8 @@ struct rockchip_usb2phy { + void *reg_base; + struct clk phyclk; + const struct rockchip_usb2phy_cfg *phy_cfg; ++ int init_count; ++ int power_on_count; + }; + + static inline int property_enable(void *reg_base, +@@ -92,6 +94,10 @@ static int rockchip_usb2phy_power_on(struct phy *phy) + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + ++ priv->power_on_count++; ++ if (priv->power_on_count != 1) ++ return 0; ++ + property_enable(priv->reg_base, &port_cfg->phy_sus, false); + + /* waiting for the utmi_clk to become stable */ +@@ -106,6 +112,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy) + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + ++ priv->power_on_count--; ++ if (priv->power_on_count != 0) ++ return 0; ++ + property_enable(priv->reg_base, &port_cfg->phy_sus, true); + + return 0; +@@ -118,6 +128,10 @@ static int rockchip_usb2phy_init(struct phy *phy) + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + int ret; + ++ priv->init_count++; ++ if (priv->init_count != 1) ++ return 0; ++ + ret = clk_enable(&priv->phyclk); + if (ret) { + dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret); +@@ -140,6 +154,10 @@ static int rockchip_usb2phy_exit(struct phy *phy) + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + ++ priv->init_count--; ++ if (priv->init_count != 0) ++ return 0; ++ + clk_disable(&priv->phyclk); + + return 0; +@@ -212,6 +230,9 @@ static int rockchip_usb2phy_probe(struct udevice *dev) + return ret; + } + ++ priv->power_on_count = 0; ++ priv->init_count = 0; ++ + return 0; + } + diff --git a/rockchip-fix-mmc-numbering.patch b/rockchip-fix-mmc-numbering.patch new file mode 100644 index 0000000..b8569be --- /dev/null +++ b/rockchip-fix-mmc-numbering.patch @@ -0,0 +1,57 @@ +From 76162abd0252cc431abb19421436f34dd9703abe Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 19 Apr 2021 00:09:11 +0100 +Subject: [PATCH] arm: rockchip: fix mmc numbering + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3328.dtsi | 3 +++ + arch/arm/dts/rk3368.dtsi | 3 +++ + arch/arm/dts/rk3399.dtsi | 3 +++ + 3 files changed, 9 insertions(+) + +diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi +index 945387e579..77a556d06f 100644 +--- a/arch/arm/dts/rk3328.dtsi ++++ b/arch/arm/dts/rk3328.dtsi +@@ -27,6 +27,9 @@ + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; ++ mmc0 = &sdmmc; ++ mmc1 = &sdio; ++ mmc2 = &emmc; + ethernet0 = &gmac2io; + ethernet1 = &gmac2phy; + }; +diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi +index b4f4f6139d..55b5f6b2a7 100644 +--- a/arch/arm/dts/rk3368.dtsi ++++ b/arch/arm/dts/rk3368.dtsi +@@ -62,6 +62,9 @@ + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; ++ mmc0 = &sdmmc; ++ mmc1 = &sdio0; ++ mmc2 = &emmc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; +diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi +index 74f2c3d490..5997c29bc8 100644 +--- a/arch/arm/dts/rk3399.dtsi ++++ b/arch/arm/dts/rk3399.dtsi +@@ -29,6 +29,9 @@ + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; ++ mmc0 = &sdmmc; ++ mmc1 = &sdio0; ++ mmc2 = &sdhci; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; +-- +2.31.1 + diff --git a/rockchip-spl-u-boot-itb-offset.patch b/rockchip-spl-u-boot-itb-offset.patch deleted file mode 100644 index d78c2f2..0000000 --- a/rockchip-spl-u-boot-itb-offset.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- u-boot-2020.10/common/spl/Kconfig.orig 2020-10-07 12:08:54.972632715 +0100 -+++ u-boot-2020.10/common/spl/Kconfig 2020-10-07 12:08:59.100672506 +0100 -@@ -324,7 +324,7 @@ - default 0x200 if ARCH_SOCFPGA || ARCH_AT91 - default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \ - OMAP54XX || AM33XX || AM43XX || ARCH_K3 -- default 0x4000 if ARCH_ROCKCHIP -+ default 0x200 if ARCH_ROCKCHIP - default 0x822 if TARGET_SIFIVE_FU540 - help - Address on the MMC to load U-Boot from, when the MMC is being used diff --git a/sources b/sources index 7d286d7..0be2497 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04-rc4.tar.bz2) = 522f9e7886a357ad573088fbbb4be17b91efedf5651808d7cbe53f4b3c4da236a96d5e781b8464d17bc6f961bd65cf3fb58d707bc7f10ce1df002800045cfd23 +SHA512 (u-boot-2021.04.tar.bz2) = c24835a520bfd528032614576ca552e55e6de129372e72e22e80e0d45dc5c1c75aa4aad80e856d5bbd7146ec092cac52a6f352253cf3fdf9fe536f5e87782803 diff --git a/uboot-tools.spec b/uboot-tools.spec index 28d5afb..8369af9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc1 Name: uboot-tools Version: 2021.04 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,16 +22,17 @@ Patch2: uefi-use-Fedora-specific-path-name.patch Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement -Patch9: 0001-efi_loader-fix-memory-type-for-memory-reservation-bl.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: rk3399-Pinebook-pro-EDP-support.patch +Patch13: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +Patch14: rockchip-fix-mmc-numbering.patch # Fixes for Allwinner network issues -Patch13: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch -Patch14: sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch +Patch15: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +Patch16: sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch BuildRequires: bc BuildRequires: dtc @@ -97,11 +98,15 @@ mkdir builds %{?enable_devtoolset7:%{enable_devtoolset7}} %endif +%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ +%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ + %ifarch aarch64 %{arm} for board in $(cat %{_arch}-boards) do echo "Building board: $board" mkdir builds/$(echo $board)/ + # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i) if [[ " ${sun50i[*]} " == *" $board "* ]]; then @@ -124,10 +129,18 @@ do cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ fi # End ATF + make $(echo $board)_defconfig O=builds/$(echo $board)/ %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ + + # build spi images for rockchip boards with SPI flash + rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 rockpro64-rk3399) + if [[ " ${rkspi[*]} " == *" $board "* ]]; then + echo "Board: $board with SPI flash" + builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi + fi # build spi, and uart images for mvebu boards - mvebu=(clearfog helios4) + mvebu=(clearfog helios4 turris_omnia) if [[ " ${mvebu[*]} " == *" $board "* ]]; then for target in spi uart do @@ -142,9 +155,6 @@ done %endif -%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ -%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ - %install mkdir -p %{buildroot}%{_bindir} mkdir -p %{buildroot}%{_mandir}/man1 @@ -154,7 +164,7 @@ mkdir -p %{buildroot}%{_datadir}/uboot/ for board in $(ls builds) do mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/ - for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin + for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img idbloader.spi spl/boot.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ @@ -173,14 +183,16 @@ do install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ fi done - done +%endif # Bit of a hack to remove binaries we don't use as they're large +%ifarch aarch64 %{arm} for board in $(ls builds) do + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.dtb if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.* + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.* fi if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/MLO ]; then rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin @@ -195,6 +207,10 @@ do rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.* rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin fi + if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/idbloader.img ]; then + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.img + fi done %endif @@ -243,6 +259,13 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Apr 18 2021 Peter Robinson - 2021.04-1 +- Update to 2021.04 GA +- Fix DTB load check (rhbz 1946278) +- Build Rockchip SPI support as idbloader.spi +- Fixes for Rockchip devices +- Build Turris Omnia for MMC/SPI/UART + * Wed Mar 17 2021 Peter Robinson - 2021.04-0.6.rc4 - Update to 2021.04 RC4 - Move to upstream fix for SMP on RPi3B and RPi3B+ diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index 39d6c20..c28fdb0 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -1,7 +1,7 @@ -From cc3700b5c65494547308df395fe63166ff48a1e3 Mon Sep 17 00:00:00 2001 +From fd3434c754b3b8dddb345352a2434b6b8445343a Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 24 Nov 2020 10:35:48 +0000 -Subject: [PATCH 1/2] distro: load FDT from any partition on boot device +Date: Sun, 18 Apr 2021 14:05:45 +0100 +Subject: [PATCH] distro: load FDT from any partition on boot device In the EFI_LOADER boot path, we were only checking the FAT partition containing the EFI payload for dtb files. But this is somewhat of a @@ -22,17 +22,19 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know). Signed-off-by: Rob Clark Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 33 +++++++++++++++++++++++---------- - 1 file changed, 23 insertions(+), 10 deletions(-) + include/config_distro_bootcmd.h | 35 ++++++++++++++++++++++----------- + 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index ff29ef5a905..769477cd80e 100644 +index 2627c2a6a5..eadd1080b3 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h -@@ -142,24 +142,37 @@ +@@ -148,26 +148,37 @@ + "fi\0" \ + \ "load_efi_dtb=" \ - "load ${devtype} ${devnum}:${distro_bootpart} " \ - "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \ +- "load ${devtype} ${devnum}:${distro_bootpart} " \ +- "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \ + "load ${devtype} ${devnum}:${dtb_devp} " \ + "${fdt_addr_r} ${prefix}${efi_fdtfile} && " \ + "run boot_efi_binary\0" \ @@ -78,5 +80,5 @@ index ff29ef5a905..769477cd80e 100644 "fi; " \ "setenv efi_fdtfile\0" -- -2.29.2 +2.31.1 From d512ddd572fdcc0778af359374319369199ef547 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 21 Apr 2021 16:20:29 +0100 Subject: [PATCH 141/351] fix keyboard regression but reverting upstream commit (rhbz 1946278) --- uboot-tools.spec | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 8369af9..cf7658f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,6 +21,8 @@ Patch2: uefi-use-Fedora-specific-path-name.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +# Revert an upstream regression +Patch9: Revert-usb-kbd-destroy-device-after-console-is-stopp.patch # Board fixes and enablement # AllWinner improvements Patch10: AllWinner-PineTab.patch @@ -259,6 +261,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Apr 21 2021 Peter Robinson - 2021.04-2 +- Revert keyboard console regression change (rhbz 1946278) + * Sun Apr 18 2021 Peter Robinson - 2021.04-1 - Update to 2021.04 GA - Fix DTB load check (rhbz 1946278) From b6c02ba2caa2ec5e5d0122ea2ef8a4030e525981 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 21 Apr 2021 16:20:56 +0100 Subject: [PATCH 142/351] add revert patch --- ...estroy-device-after-console-is-stopp.patch | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Revert-usb-kbd-destroy-device-after-console-is-stopp.patch diff --git a/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch b/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch new file mode 100644 index 0000000..496b183 --- /dev/null +++ b/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch @@ -0,0 +1,55 @@ +From 5cb853e7f78391595a0e3b01ef5dd877e169463b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 21 Apr 2021 16:03:07 +0100 +Subject: [PATCH] Revert "usb: kbd: destroy device after console is stopped" + +This reverts commit eb5fd9e46c11ea41430d9c5bcc81d4583424216e. +--- + common/usb_kbd.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/common/usb_kbd.c b/common/usb_kbd.c +index afad260d3d..515f37136f 100644 +--- a/common/usb_kbd.c ++++ b/common/usb_kbd.c +@@ -622,12 +622,12 @@ int usb_kbd_deregister(int force) + if (dev) { + usb_kbd_dev = (struct usb_device *)dev->priv; + data = usb_kbd_dev->privptr; ++ if (stdio_deregister_dev(dev, force) != 0) ++ return 1; + #if CONFIG_IS_ENABLED(CONSOLE_MUX) +- if (iomux_replace_device(stdin, DEVNAME, force ? "nulldev" : "")) ++ if (iomux_doenv(stdin, env_get("stdin")) != 0) + return 1; + #endif +- if (stdio_deregister_dev(dev, force) != 0) +- return 1; + #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE + destroy_int_queue(usb_kbd_dev, data->intq); + #endif +@@ -665,16 +665,16 @@ static int usb_kbd_remove(struct udevice *dev) + goto err; + } + data = udev->privptr; ++ if (stdio_deregister_dev(sdev, true)) { ++ ret = -EPERM; ++ goto err; ++ } + #if CONFIG_IS_ENABLED(CONSOLE_MUX) +- if (iomux_replace_device(stdin, DEVNAME, "nulldev")) { ++ if (iomux_doenv(stdin, env_get("stdin"))) { + ret = -ENOLINK; + goto err; + } + #endif +- if (stdio_deregister_dev(sdev, true)) { +- ret = -EPERM; +- goto err; +- } + #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE + destroy_int_queue(udev, data->intq); + #endif +-- +2.31.1 + From 6209cab21ad85061b66d6be412c5f445b05b3995 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 28 Apr 2021 22:49:10 +0100 Subject: [PATCH 143/351] Upstream fix for console regression, Fix for fallback.efi crash --- ...fer-overflow-in-iomux_replace_device.patch | 152 +++++++++++++ ...estroy-device-after-console-is-stopp.patch | 55 ----- ...parameter-check-in-efi_file_read_int.patch | 211 ++++++++++++++++++ uboot-tools.spec | 12 +- uefi-use-Fedora-specific-path-name.patch | 50 ----- 5 files changed, 371 insertions(+), 109 deletions(-) create mode 100644 IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch delete mode 100644 Revert-usb-kbd-destroy-device-after-console-is-stopp.patch create mode 100644 efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch delete mode 100644 uefi-use-Fedora-specific-path-name.patch diff --git a/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch b/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch new file mode 100644 index 0000000..d2c55f6 --- /dev/null +++ b/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch @@ -0,0 +1,152 @@ +From patchwork Sun Apr 25 23:08:03 2021 +Content-Type: text/plain; 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+ Sun, 25 Apr 2021 16:08:58 -0700 (PDT) +From: Yuichiro Goto +To: u-boot@lists.denx.de +Cc: Yuichiro Goto , Peter Robinson , + Andy Shevchenko , + Nicolas Saenz Julienne +Subject: [PATCH v3] IOMUX: Fix buffer overflow in iomux_replace_device() +Date: Mon, 26 Apr 2021 08:08:03 +0900 +Message-Id: <20210425230803.3055-1-goto@k-tech.co.jp> +X-Mailer: git-send-email 2.17.1 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de +X-Virus-Status: Clean + +Use of strcat() against an uninitialized buffer would lead +to buffer overflow. This patch fixes it. + +Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()") +Signed-off-by: Yuichiro Goto +Cc: Peter Robinson +Cc: Andy Shevchenko +Cc: Nicolas Saenz Julienne +Reviewed-by: Andy Shevchenko +--- + +Changes for v3: +- Add a Fixes tag in commit message +- Refactor the patch per suggestion from Andy Shevchenko + +Changes for v2: +- Add "IOMUX" in title + + common/iomux.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/common/iomux.c b/common/iomux.c +index b9088aa3b5..c428f7110a 100644 +--- a/common/iomux.c ++++ b/common/iomux.c +@@ -158,8 +158,12 @@ int iomux_replace_device(const int console, const char *old, const char *new) + return -ENOMEM; + } + +- strcat(tmp, ","); +- strcat(tmp, name); ++ if (arg) { ++ strcat(tmp, ","); ++ strcat(tmp, name); ++ } ++ else ++ strcpy(tmp, name); + + arg = tmp; + size = strlen(tmp) + 1; diff --git a/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch b/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch deleted file mode 100644 index 496b183..0000000 --- a/Revert-usb-kbd-destroy-device-after-console-is-stopp.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 5cb853e7f78391595a0e3b01ef5dd877e169463b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 21 Apr 2021 16:03:07 +0100 -Subject: [PATCH] Revert "usb: kbd: destroy device after console is stopped" - -This reverts commit eb5fd9e46c11ea41430d9c5bcc81d4583424216e. ---- - common/usb_kbd.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/common/usb_kbd.c b/common/usb_kbd.c -index afad260d3d..515f37136f 100644 ---- a/common/usb_kbd.c -+++ b/common/usb_kbd.c -@@ -622,12 +622,12 @@ int usb_kbd_deregister(int force) - if (dev) { - usb_kbd_dev = (struct usb_device *)dev->priv; - data = usb_kbd_dev->privptr; -+ if (stdio_deregister_dev(dev, force) != 0) -+ return 1; - #if CONFIG_IS_ENABLED(CONSOLE_MUX) -- if (iomux_replace_device(stdin, DEVNAME, force ? "nulldev" : "")) -+ if (iomux_doenv(stdin, env_get("stdin")) != 0) - return 1; - #endif -- if (stdio_deregister_dev(dev, force) != 0) -- return 1; - #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE - destroy_int_queue(usb_kbd_dev, data->intq); - #endif -@@ -665,16 +665,16 @@ static int usb_kbd_remove(struct udevice *dev) - goto err; - } - data = udev->privptr; -+ if (stdio_deregister_dev(sdev, true)) { -+ ret = -EPERM; -+ goto err; -+ } - #if CONFIG_IS_ENABLED(CONSOLE_MUX) -- if (iomux_replace_device(stdin, DEVNAME, "nulldev")) { -+ if (iomux_doenv(stdin, env_get("stdin"))) { - ret = -ENOLINK; - goto err; - } - #endif -- if (stdio_deregister_dev(sdev, true)) { -- ret = -EPERM; -- goto err; -- } - #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE - destroy_int_queue(udev, data->intq); - #endif --- -2.31.1 - diff --git a/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch new file mode 100644 index 0000000..b221ddd --- /dev/null +++ b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch @@ -0,0 +1,211 @@ +From patchwork Wed Apr 28 13:54:01 2021 +Content-Type: text/plain; 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+ u64 bs; + +- if (!this || !buffer_size || !buffer) ++ if (!this || !buffer_size) + return EFI_INVALID_PARAMETER; + + bs = *buffer_size; diff --git a/uboot-tools.spec b/uboot-tools.spec index cf7658f..3176c3a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.04 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -16,13 +16,13 @@ Source4: aarch64-chromebooks # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -# Needed due to issues with shim -Patch2: uefi-use-Fedora-specific-path-name.patch +# https://lists.denx.de/pipermail/u-boot/2021-April/448260.html +Patch2: efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Revert an upstream regression -Patch9: Revert-usb-kbd-destroy-device-after-console-is-stopp.patch +Patch9: IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch # Board fixes and enablement # AllWinner improvements Patch10: AllWinner-PineTab.patch @@ -261,6 +261,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Apr 28 2021 Peter Robinson - 2021.04-3 +- Upstream fix for console regression (rhbz 1946278) +- Fix for fallback.efi crash (rhbz 1733817) + * Wed Apr 21 2021 Peter Robinson - 2021.04-2 - Revert keyboard console regression change (rhbz 1946278) diff --git a/uefi-use-Fedora-specific-path-name.patch b/uefi-use-Fedora-specific-path-name.patch deleted file mode 100644 index 5417866..0000000 --- a/uefi-use-Fedora-specific-path-name.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 308c4ac71c439b483bd69ed9e387cc1a56566af9 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 8 Feb 2021 10:11:39 +0000 -Subject: [PATCH] use Fedora specific EFI path/name - -Signed-off-by: Peter Robinson ---- - include/config_distro_bootcmd.h | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 3d186b6d20..eda57e1707 100644 ---- a/include/config_distro_bootcmd.h -+++ b/include/config_distro_bootcmd.h -@@ -92,9 +92,9 @@ - - #ifdef CONFIG_EFI_LOADER - #if defined(CONFIG_ARM64) --#define BOOTEFI_NAME "bootaa64.efi" -+#define BOOTEFI_NAME "grubaa64.efi" - #elif defined(CONFIG_ARM) --#define BOOTEFI_NAME "bootarm.efi" -+#define BOOTEFI_NAME "grubarm.efi" - #elif defined(CONFIG_X86_RUN_32BIT) - #define BOOTEFI_NAME "bootia32.efi" - #elif defined(CONFIG_X86_RUN_64BIT) -@@ -140,7 +140,7 @@ - \ - "boot_efi_binary=" \ - "load ${devtype} ${devnum}:${distro_bootpart} " \ -- "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ -+ "${kernel_addr_r} efi/fedora/"BOOTEFI_NAME"; " \ - "if fdt addr ${fdt_addr_r}; then " \ - "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ - "else " \ -@@ -177,9 +177,9 @@ - "run boot_efi_binary\0" \ - "scan_dev_for_efi=" \ - "if test -e ${devtype} ${devnum}:${distro_bootpart} " \ -- "efi/boot/"BOOTEFI_NAME"; then " \ -+ "efi/fedora/"BOOTEFI_NAME"; then " \ - "echo Found EFI removable media binary " \ -- "efi/boot/"BOOTEFI_NAME"; " \ -+ "efi/fedora/"BOOTEFI_NAME"; " \ - "run scan_dev_for_dtb; " \ - "echo EFI LOAD FAILED: continuing...; " \ - "fi; " \ --- -2.29.2 - From d6fc5ecb4bd897b99b99609fcfe708d369a96daf Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 10 May 2021 22:20:20 +0100 Subject: [PATCH 144/351] 2021.07 RC2 --- ...r-sync-from-linux-for-RGMII-RX-TX-de.patch | 2977 ----------------- ...fer-overflow-in-iomux_replace_device.patch | 152 - ...parameter-check-in-efi_file_read_int.patch | 3 + rk3399-Pinebook-pro-EDP-support.patch | 1257 ------- sources | 2 +- ...ort-asymmetric-dual-rank-DRAM-on-A64.patch | 337 -- uboot-tools.spec | 19 +- usb-kbd-fixes.patch | 115 - 8 files changed, 12 insertions(+), 4850 deletions(-) delete mode 100644 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch delete mode 100644 IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch delete mode 100644 rk3399-Pinebook-pro-EDP-support.patch delete mode 100644 sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch delete mode 100644 usb-kbd-fixes.patch diff --git a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch deleted file mode 100644 index f0d3575..0000000 --- a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +++ /dev/null @@ -1,2977 +0,0 @@ -From 4f26cacd28d71fd7d051b560f550863679a5f04b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 10 Feb 2021 13:58:20 +0000 -Subject: [PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay - fixes - -Sync over a subset of the AllWinner dts changes from Linux 5.11 -for the RGMII RX/TX delay network fixes. - -This pulls other bits in needed to sync the whole files, the bits -are other minor fixes, or pieces of DT that don't affect U-Boot. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/axp81x.dtsi | 9 + - arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 +- - arch/arm/dts/sun50i-a64-orangepi-win.dts | 10 +- - arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- - arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 10 +- - arch/arm/dts/sun50i-a64.dtsi | 34 +- - .../dts/sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + - .../arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- - arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- - arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 23 +- - arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- - .../arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 38 +++ - arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 14 +- - arch/arm/dts/sun7i-a20-bananapi.dts | 24 +- - arch/arm/dts/sun7i-a20-bananapro.dts | 14 +- - arch/arm/dts/sun7i-a20-cubieboard2.dts | 24 +- - arch/arm/dts/sun7i-a20-cubietruck.dts | 14 +- - arch/arm/dts/sun7i-a20-hummingbird.dts | 21 +- - arch/arm/dts/sun7i-a20-i12-tvbox.dts | 12 +- - arch/arm/dts/sun7i-a20-icnova-swac.dts | 15 +- - arch/arm/dts/sun7i-a20-itead-ibox.dts | 4 +- - arch/arm/dts/sun7i-a20-lamobo-r1.dts | 14 +- - arch/arm/dts/sun7i-a20-m3.dts | 12 +- - arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 12 +- - arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 24 +- - arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +- - arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 +-- - arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +- - arch/arm/dts/sun7i-a20-orangepi-mini.dts | 24 +- - arch/arm/dts/sun7i-a20-orangepi.dts | 24 +- - arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +- - arch/arm/dts/sun7i-a20-pcduino3.dts | 24 +- - arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 12 +- - arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 24 +- - arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++- - arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++- - arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++- - arch/arm/dts/sun8i-a83t.dtsi | 310 ++++++++++++++++-- - arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 5 - - arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- - arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ - arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- - arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- - 43 files changed, 947 insertions(+), 351 deletions(-) - -diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi -index 043c717dce..1dfeeceabf 100644 ---- a/arch/arm/dts/axp81x.dtsi -+++ b/arch/arm/dts/axp81x.dtsi -@@ -48,6 +48,11 @@ - interrupt-controller; - #interrupt-cells = <1>; - -+ ac_power_supply: ac-power-supply { -+ compatible = "x-powers,axp813-ac-power-supply"; -+ status = "disabled"; -+ }; -+ - axp_adc: adc { - compatible = "x-powers,axp813-adc"; - #io-channel-cells = <1>; -@@ -166,4 +171,8 @@ - status = "disabled"; - }; - }; -+ -+ usb_power_supply: usb-power-supply { -+ compatible = "x-powers,axp813-usb-power-supply"; -+ }; - }; -diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -index 883f217efb..e5e840b9fb 100644 ---- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -@@ -105,7 +105,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -@@ -331,10 +331,10 @@ - "Microphone", "Microphone Jack", - "Microphone", "Onboard Microphone"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "Headphone Jack", "HP", - "MIC2", "Microphone Jack", - "Onboard Microphone", "MBIAS", -diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts -index fde9c7a99b..70e31743f0 100644 ---- a/arch/arm/dts/sun50i-a64-orangepi-win.dts -+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts -@@ -120,7 +120,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_gmac_3v3>; - status = "okay"; -@@ -330,10 +330,10 @@ - "Microphone", "Microphone Jack", - "Microphone", "Onboard Microphone"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "Headphone Jack", "HP", - "MIC2", "Microphone Jack", - "Onboard Microphone", "MBIAS", -diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts -index b26181cf90..b54099b654 100644 ---- a/arch/arm/dts/sun50i-a64-pine64-plus.dts -+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts -@@ -13,7 +13,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-txid"; - phy-handle = <&ext_rgmii_phy>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -index 2f6ea9f3f6..d4069749d7 100644 ---- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -@@ -79,7 +79,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -@@ -159,11 +159,11 @@ - simple-audio-card,widgets = "Microphone", "Microphone Jack", - "Headphone", "Headphone Jack"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", - "Headphone Jack", "HP", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "MIC2", "Microphone Jack"; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index 8dfbcd1440..51cc30e84e 100644 ---- a/arch/arm/dts/sun50i-a64.dtsi -+++ b/arch/arm/dts/sun50i-a64.dtsi -@@ -51,7 +51,7 @@ - reg = <0>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -62,7 +62,7 @@ - reg = <1>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -73,7 +73,7 @@ - reg = <2>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -84,7 +84,7 @@ - reg = <3>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -139,10 +139,10 @@ - simple-audio-card,mclk-fs = <128>; - simple-audio-card,aux-devs = <&codec_analog>; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC"; -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC"; - status = "disabled"; - - cpudai: simple-audio-card,cpu { -@@ -157,6 +157,7 @@ - timer { - compatible = "arm,armv8-timer"; - allwinner,erratum-unknown1; -+ arm,no-tick-in-suspend; - interrupts = , - ; -+ compatible = "allwinner,sun50i-a64-i2s", -+ "allwinner,sun8i-h3-i2s"; -+ reg = <0x01c22800 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S2>; -+ dma-names = "rx", "tx"; -+ dmas = <&dma 27>, <&dma 27>; -+ status = "disabled"; -+ }; -+ - dai: dai@1c22c00 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-a64-codec-i2s"; -@@ -860,7 +875,8 @@ - - codec: codec@1c22e00 { - #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-a33-codec"; -+ compatible = "allwinner,sun50i-a64-codec", -+ "allwinner,sun8i-a33-codec"; - reg = <0x01c22e00 0x600>; - interrupts = ; - clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -index 2e2b14c0ae..8857a37915 100644 ---- a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -+++ b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -@@ -3,6 +3,7 @@ - - /dts-v1/; - #include "sun50i-h5.dtsi" -+#include "sun50i-h5-cpu-opp.dtsi" - #include - - / { -diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -index df1b9263ad..6e30a564c8 100644 ---- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -+++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -@@ -36,7 +36,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - /delete-property/ allwinner,leds-active-low; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -index 4f9ba53ffa..9d93fe1536 100644 ---- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -@@ -96,7 +96,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -index 70b5f09984..8bf2db9dcb 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -@@ -61,6 +61,7 @@ - label = "sw4"; - linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; -+ wakeup-source; - }; - }; - -@@ -93,6 +94,10 @@ - status = "okay"; - }; - -+&cpu0 { -+ cpu-supply = <®_vdd_cpux>; -+}; -+ - &de { - status = "okay"; - }; -@@ -118,7 +123,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -@@ -168,6 +173,22 @@ - status = "okay"; - }; - -+&r_i2c { -+ status = "okay"; -+ -+ reg_vdd_cpux: regulator@65 { -+ compatible = "silergy,sy8106a"; -+ reg = <0x65>; -+ regulator-name = "vdd-cpux"; -+ silergy,fixed-microvolt = <1100000>; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-ramp-delay = <200>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+}; -+ - &spi0 { - status = "okay"; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -index cb44bfa598..33ab44072e 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -@@ -124,7 +124,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -index c95a685413..de19e68eb8 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -@@ -30,6 +30,21 @@ - }; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr { -+ label = "orangepi:green:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ -+ status { -+ label = "orangepi:red:status"; -+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; -@@ -48,6 +63,10 @@ - status = "okay"; - }; - -+&ehci0 { -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -92,6 +111,10 @@ - status = "okay"; - }; - -+&ohci0 { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pa_pins>; -@@ -103,3 +126,18 @@ - pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; - status = "okay"; - }; -+ -+&usb_otg { -+ /* -+ * According to schematics CN1 MicroUSB port can be used to take -+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB -+ * port cannot provide power externally even if the board is powered -+ * via GPIO pins. It thus makes sense to force peripheral mode. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -index e2bfe00588..8945dbb114 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -@@ -129,14 +129,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -171,6 +167,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts -index 81bc85d398..0b3d9ae756 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi.dts -@@ -131,14 +131,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -171,6 +167,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -246,12 +248,6 @@ - "SPI-MISO", "SPI-CE1", "", - "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "", - "", "", "", "", "", "", "", ""; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; - }; - - #include "axp209.dtsi" -@@ -329,9 +325,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts -index 0176e9de01..5740f94427 100644 ---- a/arch/arm/dts/sun7i-a20-bananapro.dts -+++ b/arch/arm/dts/sun7i-a20-bananapro.dts -@@ -109,14 +109,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -143,6 +139,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts -index 200685b0b1..b8203e4ef2 100644 ---- a/arch/arm/dts/sun7i-a20-cubieboard2.dts -+++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts -@@ -115,13 +115,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -161,6 +157,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &ohci0 { - status = "okay"; - }; -@@ -173,14 +175,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - status = "okay"; - }; -@@ -236,9 +230,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts -index 99f531b8d2..9109ca0919 100644 ---- a/arch/arm/dts/sun7i-a20-cubietruck.dts -+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts -@@ -150,13 +150,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -194,6 +190,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts -index fd0153f656..3def2a3305 100644 ---- a/arch/arm/dts/sun7i-a20-hummingbird.dts -+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts -@@ -100,19 +100,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_vdd>; -- /* phy reset config */ -- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ -- snps,reset-active-low; -- /* wait 1s after reset, otherwise fail to read phy id */ -- snps,reset-delays-us = <0 10000 1000000>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -146,6 +137,16 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ -+ reset-assert-us = <10000>; -+ /* wait 1s after reset, otherwise fail to read phy id */ -+ reset-deassert-us = <1000000>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v0>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts -index 5f1c4f573d..358ed5f1b1 100644 ---- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts -+++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts -@@ -115,14 +115,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -145,6 +141,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts -index 949494730a..413505f45a 100644 ---- a/arch/arm/dts/sun7i-a20-icnova-swac.dts -+++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts -@@ -49,7 +49,8 @@ - - / { - model = "ICnova-A20 SWAC"; -- compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20"; -+ compatible = "incircuit,icnova-a20-swac", "incircuit,icnova-a20", -+ "allwinner,sun7i-a20"; - - aliases { - serial0 = &uart0; -@@ -75,13 +76,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -98,6 +95,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts -index b90a7607d0..946c272783 100644 ---- a/arch/arm/dts/sun7i-a20-itead-ibox.dts -+++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts -@@ -97,10 +97,12 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -+}; - -+&gmac_mdio { - phy1: ethernet-phy@1 { - reg = <1>; - }; -diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -index f91e1bee44..17fa8901fc 100644 ---- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts -+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -@@ -123,8 +123,6 @@ - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- /delete-property/#address-cells; -- /delete-property/#size-cells; - - fixed-link { - speed = <1000>; -@@ -229,14 +227,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - #include "axp209.dtsi" - - &ac_power_supply { -@@ -322,9 +312,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts -index b8a1aaaf39..6bff9e731f 100644 ---- a/arch/arm/dts/sun7i-a20-m3.dts -+++ b/arch/arm/dts/sun7i-a20-m3.dts -@@ -82,13 +82,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -111,6 +107,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -index f0e6a96e57..6f9c54b8e4 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -@@ -111,13 +111,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -202,6 +198,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -index 823aabce04..230d62a6b8 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -@@ -105,18 +105,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy3>; -+ phy-handle = <&phy3>; - phy-mode = "rgmii"; - phy-supply = <®_vcc3v3>; -- -- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; -- snps,reset-active-low; -- snps,reset-delays-us = <0 10000 1000000>; - status = "okay"; -- -- phy3: ethernet-phy@3 { -- reg = <3>; -- }; - }; - - &hdmi { -@@ -161,6 +153,16 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy3: ethernet-phy@3 { -+ reg = <3>; -+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ -+ reset-assert-us = <10000>; -+ /* wait 1s after reset, otherwise fail to read phy id */ -+ reset-deassert-us = <1000000>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -314,8 +316,8 @@ - }; - - &usbphy { -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -index 5e411194bf..2adbac8601 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -@@ -106,13 +106,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -149,6 +145,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -174,18 +176,6 @@ - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - ®_ahci_5v { -@@ -217,10 +207,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -index 4e1c590eb0..9ba62774e8 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -@@ -111,13 +111,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -154,6 +150,12 @@ - vref-supply = <®_vcc3v0>; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -174,23 +176,17 @@ - }; - - &pio { -+ vcc-pa-supply = <®_vcc3v3>; -+ vcc-pc-supply = <®_vcc3v3>; -+ vcc-pe-supply = <®_ldo3>; -+ vcc-pf-supply = <®_vcc3v3>; -+ vcc-pg-supply = <®_ldo4>; -+ - led_pins_olinuxinolime: led-pins { - pins = "PH2"; - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - ®_ahci_5v { -@@ -200,6 +196,14 @@ - - #include "axp209.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -267,10 +271,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -index 840ae1194a..359bd0d5b3 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -@@ -118,13 +118,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -215,6 +211,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -252,18 +254,6 @@ - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - #include "axp209.dtsi" -@@ -355,10 +345,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -index 15881081ca..2e328d2cef 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -@@ -120,14 +120,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -158,6 +154,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -176,14 +178,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -239,9 +233,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts -index d64de2e73a..d75b2e2bab 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi.dts -@@ -96,14 +96,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -124,6 +120,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -135,14 +137,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -198,9 +192,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -index 538ea15fa3..bf38c66c18 100644 ---- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -@@ -1,5 +1,5 @@ - /* -- * Copyright 2015 Adam Sampson -+ * Copyright 2015-2020 Adam Sampson - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual -@@ -114,13 +114,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -149,6 +145,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -168,14 +170,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - status = "okay"; -@@ -226,9 +220,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb1_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts -index a72ed4318d..cc8271d777 100644 ---- a/arch/arm/dts/sun7i-a20-pcduino3.dts -+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts -@@ -122,13 +122,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -149,6 +145,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -168,14 +170,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; - status = "okay"; -@@ -226,9 +220,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -index ffade253d1..6a66b0432d 100644 ---- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -+++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -@@ -156,14 +156,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; -@@ -223,9 +215,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -index c27e56091f..3bfae98f3c 100644 ---- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -@@ -81,13 +81,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -110,6 +106,12 @@ - - #include "axp209.dtsi" - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -145,14 +147,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -206,9 +200,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi -index 641a8fa6d4..6d6a37940d 100644 ---- a/arch/arm/dts/sun7i-a20.dtsi -+++ b/arch/arm/dts/sun7i-a20.dtsi -@@ -47,6 +47,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -180,7 +181,7 @@ - default-pool { - compatible = "shared-dma-pool"; - size = <0x6000000>; -- alloc-ranges = <0x4a000000 0x6000000>; -+ alloc-ranges = <0x40000000 0x10000000>; - reusable; - linux,cma-default; - }; -@@ -333,7 +334,7 @@ - #dma-cells = <2>; - }; - -- nfc: nand@1c03000 { -+ nfc: nand-controller@1c03000 { - compatible = "allwinner,sun4i-a10-nand"; - reg = <0x01c03000 0x1000>; - interrupts = ; -@@ -376,6 +377,16 @@ - num-cs = <1>; - }; - -+ csi0: csi@1c09000 { -+ compatible = "allwinner,sun7i-a20-csi0"; -+ reg = <0x01c09000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; -+ clock-names = "bus", "isp", "ram"; -+ resets = <&ccu RST_CSI0>; -+ status = "disabled"; -+ }; -+ - emac: ethernet@1c0b000 { - compatible = "allwinner,sun4i-a10-emac"; - reg = <0x01c0b000 0x1000>; -@@ -394,11 +405,12 @@ - }; - - tcon0: lcd-controller@1c0c000 { -- compatible = "allwinner,sun7i-a20-tcon"; -+ compatible = "allwinner,sun7i-a20-tcon0", -+ "allwinner,sun7i-a20-tcon"; - reg = <0x01c0c000 0x1000>; - interrupts = ; -- resets = <&ccu RST_TCON0>; -- reset-names = "lcd"; -+ resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>; -+ reset-names = "lcd", "lvds"; - clocks = <&ccu CLK_AHB_LCD0>, - <&ccu CLK_TCON0_CH0>, - <&ccu CLK_TCON0_CH1>; -@@ -406,6 +418,7 @@ - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon0-pixel-clock"; -+ #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 14>; - - ports { -@@ -443,7 +456,8 @@ - }; - - tcon1: lcd-controller@1c0d000 { -- compatible = "allwinner,sun7i-a20-tcon"; -+ compatible = "allwinner,sun7i-a20-tcon1", -+ "allwinner,sun7i-a20-tcon"; - reg = <0x01c0d000 0x1000>; - interrupts = ; - resets = <&ccu RST_TCON1>; -@@ -455,6 +469,7 @@ - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon1-pixel-clock"; -+ #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 15>; - - ports { -@@ -586,13 +601,14 @@ - phy-names = "usb"; - extcon = <&usbphy 0>; - allwinner,sram = <&otg_sram 1>; -+ dr_mode = "otg"; - status = "disabled"; - }; - - usbphy: phy@1c13400 { - #phy-cells = <1>; - compatible = "allwinner,sun7i-a20-usb-phy"; -- reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; -+ reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; - reg-names = "phy_ctrl", "pmu1", "pmu2"; - clocks = <&ccu CLK_USB_PHY>; - clock-names = "usb_phy"; -@@ -716,6 +732,17 @@ - status = "disabled"; - }; - -+ csi1: csi@1c1d000 { -+ compatible = "allwinner,sun7i-a20-csi1", -+ "allwinner,sun4i-a10-csi1"; -+ reg = <0x01c1d000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>; -+ clock-names = "bus", "ram"; -+ resets = <&ccu RST_CSI1>; -+ status = "disabled"; -+ }; -+ - spi3: spi@1c1f000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c1f000 0x1000>; -@@ -751,21 +778,70 @@ - #interrupt-cells = <3>; - #gpio-cells = <3>; - -+ /omit-if-no-ref/ -+ can_pa_pins: can-pa-pins { -+ pins = "PA16", "PA17"; -+ function = "can"; -+ }; -+ -+ /omit-if-no-ref/ - can_ph_pins: can-ph-pins { - pins = "PH20", "PH21"; - function = "can"; - }; - -+ /omit-if-no-ref/ - clk_out_a_pin: clk-out-a-pin { - pins = "PI12"; - function = "clk_out_a"; - }; - -+ /omit-if-no-ref/ - clk_out_b_pin: clk-out-b-pin { - pins = "PI13"; - function = "clk_out_b"; - }; - -+ /omit-if-no-ref/ -+ csi0_8bits_pins: csi-8bits-pins { -+ pins = "PE0", "PE2", "PE3", "PE4", "PE5", -+ "PE6", "PE7", "PE8", "PE9", "PE10", -+ "PE11"; -+ function = "csi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi0_clk_pin: csi-clk-pin { -+ pins = "PE1"; -+ function = "csi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_8bits_pg_pins: csi1-8bits-pg-pins { -+ pins = "PG0", "PG2", "PG3", "PG4", "PG5", -+ "PG6", "PG7", "PG8", "PG9", "PG10", -+ "PG11"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_24bits_ph_pins: csi1-24bits-ph-pins { -+ pins = "PH0", "PH1", "PH2", "PH3", "PH4", -+ "PH5", "PH6", "PH7", "PH8", "PH9", -+ "PH10", "PH11", "PH12", "PH13", "PH14", -+ "PH15", "PH16", "PH17", "PH18", "PH19", -+ "PH20", "PH21", "PH22", "PH23", "PH24", -+ "PH25", "PH26", "PH27"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_clk_pg_pin: csi1-clk-pg-pin { -+ pins = "PG1"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ - emac_pa_pins: emac-pa-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -775,6 +851,17 @@ - function = "emac"; - }; - -+ /omit-if-no-ref/ -+ emac_ph_pins: emac-ph-pins { -+ pins = "PH8", "PH9", "PH10", "PH11", -+ "PH14", "PH15", "PH16", "PH17", -+ "PH18", "PH19", "PH20", "PH21", -+ "PH22", "PH23", "PH24", "PH25", -+ "PH26"; -+ function = "emac"; -+ }; -+ -+ /omit-if-no-ref/ - gmac_mii_pins: gmac-mii-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -784,6 +871,7 @@ - function = "gmac"; - }; - -+ /omit-if-no-ref/ - gmac_rgmii_pins: gmac-rgmii-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -798,46 +886,69 @@ - drive-strength = <40>; - }; - -+ /omit-if-no-ref/ - i2c0_pins: i2c0-pins { - pins = "PB0", "PB1"; - function = "i2c0"; - }; - -+ /omit-if-no-ref/ - i2c1_pins: i2c1-pins { - pins = "PB18", "PB19"; - function = "i2c1"; - }; - -+ /omit-if-no-ref/ - i2c2_pins: i2c2-pins { - pins = "PB20", "PB21"; - function = "i2c2"; - }; - -+ /omit-if-no-ref/ - i2c3_pins: i2c3-pins { - pins = "PI0", "PI1"; - function = "i2c3"; - }; - -+ /omit-if-no-ref/ - ir0_rx_pin: ir0-rx-pin { - pins = "PB4"; - function = "ir0"; - }; - -+ /omit-if-no-ref/ - ir0_tx_pin: ir0-tx-pin { - pins = "PB3"; - function = "ir0"; - }; - -+ /omit-if-no-ref/ - ir1_rx_pin: ir1-rx-pin { - pins = "PB23"; - function = "ir1"; - }; - -+ /omit-if-no-ref/ - ir1_tx_pin: ir1-tx-pin { - pins = "PB22"; - function = "ir1"; - }; - -+ /omit-if-no-ref/ -+ lcd_lvds0_pins: lcd-lvds0-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD6", "PD7", "PD8", "PD9"; -+ function = "lvds0"; -+ }; -+ -+ /omit-if-no-ref/ -+ lcd_lvds1_pins: lcd-lvds1-pins { -+ pins = "PD10", "PD11", "PD12", "PD13", "PD14", -+ "PD15", "PD16", "PD17", "PD18", "PD19"; -+ function = "lvds1"; -+ }; -+ -+ /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; -@@ -846,6 +957,7 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC6", "PC7", "PC8", - "PC9", "PC10", "PC11"; -@@ -854,6 +966,7 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - mmc3_pins: mmc3-pins { - pins = "PI4", "PI5", "PI6", - "PI7", "PI8", "PI9"; -@@ -862,127 +975,206 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - ps2_0_pins: ps2-0-pins { - pins = "PI20", "PI21"; - function = "ps2"; - }; - -+ /omit-if-no-ref/ - ps2_1_ph_pins: ps2-1-ph-pins { - pins = "PH12", "PH13"; - function = "ps2"; - }; - -+ /omit-if-no-ref/ - pwm0_pin: pwm0-pin { - pins = "PB2"; - function = "pwm"; - }; - -+ /omit-if-no-ref/ - pwm1_pin: pwm1-pin { - pins = "PI3"; - function = "pwm"; - }; - -+ /omit-if-no-ref/ - spdif_tx_pin: spdif-tx-pin { - pins = "PB13"; - function = "spdif"; - bias-pull-up; - }; - -+ /omit-if-no-ref/ - spi0_pi_pins: spi0-pi-pins { - pins = "PI11", "PI12", "PI13"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi0_cs0_pi_pin: spi0-cs0-pi-pin { - pins = "PI10"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi0_cs1_pi_pin: spi0-cs1-pi-pin { - pins = "PI14"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi1_pi_pins: spi1-pi-pins { - pins = "PI17", "PI18", "PI19"; - function = "spi1"; - }; - -+ /omit-if-no-ref/ - spi1_cs0_pi_pin: spi1-cs0-pi-pin { - pins = "PI16"; - function = "spi1"; - }; - -+ /omit-if-no-ref/ - spi2_pb_pins: spi2-pb-pins { - pins = "PB15", "PB16", "PB17"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_cs0_pb_pin: spi2-cs0-pb-pin { - pins = "PB14"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_pc_pins: spi2-pc-pins { - pins = "PC20", "PC21", "PC22"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_cs0_pc_pin: spi2-cs0-pc-pin { - pins = "PC19"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - uart0_pb_pins: uart0-pb-pins { - pins = "PB22", "PB23"; - function = "uart0"; - }; - -+ /omit-if-no-ref/ -+ uart0_pf_pins: uart0-pf-pins { -+ pins = "PF2", "PF4"; -+ function = "uart0"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_pa_pins: uart1-pa-pins { -+ pins = "PA10", "PA11"; -+ function = "uart1"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins { -+ pins = "PA12", "PA13"; -+ function = "uart1"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart2_pa_pins: uart2-pa-pins { -+ pins = "PA2", "PA3"; -+ function = "uart2"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins { -+ pins = "PA0", "PA1"; -+ function = "uart2"; -+ }; -+ -+ /omit-if-no-ref/ - uart2_pi_pins: uart2-pi-pins { - pins = "PI18", "PI19"; - function = "uart2"; - }; - -+ /omit-if-no-ref/ - uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins { - pins = "PI16", "PI17"; - function = "uart2"; - }; - -+ /omit-if-no-ref/ - uart3_pg_pins: uart3-pg-pins { - pins = "PG6", "PG7"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ - uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { - pins = "PG8", "PG9"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ - uart3_ph_pins: uart3-ph-pins { - pins = "PH0", "PH1"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ -+ uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins { -+ pins = "PH2", "PH3"; -+ function = "uart3"; -+ }; -+ -+ /omit-if-no-ref/ - uart4_pg_pins: uart4-pg-pins { - pins = "PG10", "PG11"; - function = "uart4"; - }; - -+ /omit-if-no-ref/ - uart4_ph_pins: uart4-ph-pins { - pins = "PH4", "PH5"; - function = "uart4"; - }; - -+ /omit-if-no-ref/ -+ uart5_ph_pins: uart5-ph-pins { -+ pins = "PH6", "PH7"; -+ function = "uart5"; -+ }; -+ -+ /omit-if-no-ref/ - uart5_pi_pins: uart5-pi-pins { - pins = "PI10", "PI11"; - function = "uart5"; - }; - -+ /omit-if-no-ref/ -+ uart6_pa_pins: uart6-pa-pins { -+ pins = "PA12", "PA13"; -+ function = "uart6"; -+ }; -+ -+ /omit-if-no-ref/ - uart6_pi_pins: uart6-pi-pins { - pins = "PI12", "PI13"; - function = "uart6"; - }; - -+ /omit-if-no-ref/ -+ uart7_pa_pins: uart7-pa-pins { -+ pins = "PA14", "PA15"; -+ function = "uart7"; -+ }; -+ -+ /omit-if-no-ref/ - uart7_pi_pins: uart7-pi-pins { - pins = "PI20", "PI21"; - function = "uart7"; -@@ -1004,6 +1196,8 @@ - wdt: watchdog@1c20c90 { - compatible = "allwinner,sun4i-a10-wdt"; - reg = <0x01c20c90 0x10>; -+ interrupts = ; -+ clocks = <&osc24M>; - }; - - rtc: rtc@1c20d00 { -@@ -1326,8 +1520,12 @@ - snps,fixed-burst; - snps,force_sf_dma_mode; - status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -+ -+ gmac_mdio: mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; - }; - - hstimer@1c60000 { -@@ -1341,7 +1539,7 @@ - }; - - gic: interrupt-controller@1c81000 { -- compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -index eaff6fa401..431f70234d 100644 ---- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -@@ -107,6 +107,14 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu100 { -+ cpu-supply = <®_dcdc3>; -+}; -+ - &de { - status = "okay"; - }; -@@ -123,7 +131,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_sw>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - allwinner,rx-delay-ps = <700>; - allwinner,tx-delay-ps = <700>; - status = "okay"; -@@ -183,6 +191,11 @@ - status = "okay"; - }; - -+&r_cir { -+ clock-frequency = <3000000>; -+ status = "okay"; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -224,6 +237,14 @@ - - #include "axp81x.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <1800000>; -@@ -301,8 +322,8 @@ - - ®_dldo3 { - regulator-always-on; -- regulator-min-microvolt = <2500000>; -- regulator-max-microvolt = <2500000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pd"; - }; - -@@ -350,11 +371,37 @@ - status = "okay"; - }; - -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ clocks = <&ac100_rtc 1>; -+ clock-names = "lpo"; -+ vbat-supply = <®_dldo1>; -+ vddio-supply = <®_dldo1>; -+ device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ -+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -+ }; -+}; -+ - &usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { - status = "okay"; - }; - - &usbphy { -+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -index 5dba4fc310..d8326a5c68 100644 ---- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -@@ -60,6 +60,17 @@ - stdout-path = "serial0:115200n8"; - }; - -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -90,7 +101,7 @@ - initial-mode = <1>; /* initialize in HUB mode */ - disabled-ports = <1>; - intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -- reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */ -+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ - connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ - refclk-frequency = <19200000>; - }; -@@ -145,6 +156,18 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu100 { -+ cpu-supply = <®_dcdc3>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - /* GL830 USB-to-SATA bridge here */ - status = "okay"; -@@ -160,10 +183,20 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_dldo4>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&hdmi { - status = "okay"; - }; - -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &mdio { - rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -@@ -239,6 +272,14 @@ - - #include "axp81x.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <1800000>; -@@ -386,11 +427,37 @@ - status = "okay"; - }; - -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4330-bt"; -+ clocks = <&ac100_rtc 1>; -+ clock-names = "lpo"; -+ vbat-supply = <®_dcdc1>; -+ vddio-supply = <®_sw>; -+ device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ -+ host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -+ }; -+}; -+ - &usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { - status = "okay"; - }; - - &usbphy { -+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi -index 2be23d6009..c010b27fdb 100644 ---- a/arch/arm/dts/sun8i-a83t.dtsi -+++ b/arch/arm/dts/sun8i-a83t.dtsi -@@ -50,6 +50,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -61,79 +62,91 @@ - #size-cells = <0>; - - cpu0: cpu@0 { -- clocks = <&ccu CLK_C0CPUX>; -- clock-names = "cpu"; - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0>; -+ #cooling-cells = <2>; - }; - -- cpu@1 { -+ cpu1: cpu@1 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <1>; -+ #cooling-cells = <2>; - }; - -- cpu@2 { -+ cpu2: cpu@2 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <2>; -+ #cooling-cells = <2>; - }; - -- cpu@3 { -+ cpu3: cpu@3 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <3>; -+ #cooling-cells = <2>; - }; - - cpu100: cpu@100 { -- clocks = <&ccu CLK_C1CPUX>; -- clock-names = "cpu"; - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x100>; -+ #cooling-cells = <2>; - }; - -- cpu@101 { -+ cpu101: cpu@101 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x101>; -+ #cooling-cells = <2>; - }; - -- cpu@102 { -+ cpu102: cpu@102 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x102>; -+ #cooling-cells = <2>; - }; - -- cpu@103 { -+ cpu103: cpu@103 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x103>; -+ #cooling-cells = <2>; - }; - }; - -@@ -187,11 +200,6 @@ - status = "disabled"; - }; - -- memory { -- reg = <0x40000000 0x80000000>; -- device_type = "memory"; -- }; -- - cpu0_opp_table: opp_table0 { - compatible = "operating-points-v2"; - opp-shared; -@@ -306,16 +314,27 @@ - - display_clocks: clock@1000000 { - compatible = "allwinner,sun8i-a83t-de2-clk"; -- reg = <0x01000000 0x100000>; -- clocks = <&ccu CLK_PLL_DE>, -- <&ccu CLK_BUS_DE>; -- clock-names = "mod", -- "bus"; -+ reg = <0x01000000 0x10000>; -+ clocks = <&ccu CLK_BUS_DE>, -+ <&ccu CLK_PLL_DE>; -+ clock-names = "bus", -+ "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ rotate: rotate@1020000 { -+ compatible = "allwinner,sun8i-a83t-de2-rotate"; -+ reg = <0x1020000 0x10000>; -+ interrupts = ; -+ clocks = <&display_clocks CLK_BUS_ROT>, -+ <&display_clocks CLK_ROT>; -+ clock-names = "bus", -+ "mod"; -+ resets = <&display_clocks RST_ROT>; -+ }; -+ - mixer0: mixer@1100000 { - compatible = "allwinner,sun8i-a83t-de2-mixer-0"; - reg = <0x01100000 0x100000>; -@@ -338,6 +357,11 @@ - reg = <0>; - remote-endpoint = <&tcon0_in_mixer0>; - }; -+ -+ mixer0_out_tcon1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon1_in_mixer0>; -+ }; - }; - }; - }; -@@ -356,9 +380,17 @@ - #size-cells = <0>; - - mixer1_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; - -- mixer1_out_tcon1: endpoint { -+ mixer1_out_tcon0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon0_in_mixer1>; -+ }; -+ -+ mixer1_out_tcon1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&tcon1_in_mixer1>; - }; - }; -@@ -425,6 +457,7 @@ - clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; -+ #clock-cells = <0>; - resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; - reset-names = "lcd", "lvds"; - -@@ -441,11 +474,14 @@ - reg = <0>; - remote-endpoint = <&mixer0_out_tcon0>; - }; -+ -+ tcon0_in_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&mixer1_out_tcon0>; -+ }; - }; - - tcon0_out: port@1 { -- #address-cells = <1>; -- #size-cells = <0>; - reg = <1>; - }; - }; -@@ -465,9 +501,17 @@ - #size-cells = <0>; - - tcon1_in: port@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <0>; - -- tcon1_in_mixer1: endpoint { -+ tcon1_in_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mixer0_out_tcon1>; -+ }; -+ -+ tcon1_in_mixer1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&mixer1_out_tcon1>; - }; - }; -@@ -549,6 +593,31 @@ - sid: eeprom@1c14000 { - compatible = "allwinner,sun8i-a83t-sid"; - reg = <0x1c14000 0x400>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@34 { -+ reg = <0x34 8>; -+ }; -+ }; -+ -+ crypto: crypto@1c15000 { -+ compatible = "allwinner,sun8i-a83t-crypto"; -+ reg = <0x01c15000 0x1000>; -+ interrupts = ; -+ resets = <&ccu RST_BUS_SS>; -+ clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; -+ clock-names = "bus", "mod"; -+ }; -+ -+ msgbox: mailbox@1c17000 { -+ compatible = "allwinner,sun8i-a83t-msgbox", -+ "allwinner,sun6i-a31-msgbox"; -+ reg = <0x01c17000 0x1000>; -+ clocks = <&ccu CLK_BUS_MSGBOX>; -+ resets = <&ccu RST_BUS_MSGBOX>; -+ interrupts = ; -+ #mbox-cells = <1>; - }; - - usb_otg: usb@1c19000 { -@@ -562,6 +631,7 @@ - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; -+ dr_mode = "otg"; - status = "disabled"; - }; - -@@ -649,6 +719,20 @@ - #interrupt-cells = <3>; - #gpio-cells = <3>; - -+ /omit-if-no-ref/ -+ csi_8bit_parallel_pins: csi-8bit-parallel-pins { -+ pins = "PE0", "PE2", "PE3", "PE6", "PE7", -+ "PE8", "PE9", "PE10", "PE11", -+ "PE12", "PE13"; -+ function = "csi"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi_mclk_pin: csi-mclk-pin { -+ pins = "PE1"; -+ function = "csi"; -+ }; -+ - emac_rgmii_pins: emac-rgmii-pins { - pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD11", "PD12", "PD13", "PD14", "PD18", -@@ -676,6 +760,12 @@ - function = "i2c1"; - }; - -+ /omit-if-no-ref/ -+ i2c2_pe_pins: i2c2-pe-pins { -+ pins = "PE14", "PE15"; -+ function = "i2c2"; -+ }; -+ - i2c2_ph_pins: i2c2-ph-pins { - pins = "PH4", "PH5"; - function = "i2c2"; -@@ -747,10 +837,16 @@ - pins = "PG8", "PG9"; - function = "uart1"; - }; -+ -+ /omit-if-no-ref/ -+ uart2_pb_pins: uart2-pb-pins { -+ pins = "PB0", "PB1"; -+ function = "uart2"; -+ }; - }; - - timer@1c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -+ compatible = "allwinner,sun8i-a23-timer"; - reg = <0x01c20c00 0xa0>; - interrupts = , - ; -@@ -852,6 +948,39 @@ - status = "disabled"; - }; - -+ uart2: serial@1c28800 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28800 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART2>; -+ resets = <&ccu RST_BUS_UART2>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@1c28c00 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28c00 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART3>; -+ resets = <&ccu RST_BUS_UART3>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@1c29000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c29000 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART4>; -+ resets = <&ccu RST_BUS_UART4>; -+ status = "disabled"; -+ }; -+ - i2c0: i2c@1c2ac00 { - compatible = "allwinner,sun8i-a83t-i2c", - "allwinner,sun6i-a31-i2c"; -@@ -898,12 +1027,10 @@ - reg = <0x01c30000 0x104>; - interrupts = ; - interrupt-names = "macirq"; -- resets = <&ccu 13>; -- reset-names = "stmmaceth"; -- clocks = <&ccu 27>; -+ clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; -- #address-cells = <1>; -- #size-cells = <0>; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; - status = "disabled"; - - mdio: mdio { -@@ -914,7 +1041,7 @@ - }; - - gic: interrupt-controller@1c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -@@ -924,6 +1051,21 @@ - interrupts = ; - }; - -+ csi: camera@1cb0000 { -+ compatible = "allwinner,sun8i-a83t-csi"; -+ reg = <0x01cb0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CSI>, -+ <&ccu CLK_CSI_SCLK>, -+ <&ccu CLK_DRAM_CSI>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_CSI>; -+ status = "disabled"; -+ -+ csi_in: port { -+ }; -+ }; -+ - hdmi: hdmi@1ee0000 { - compatible = "allwinner,sun8i-a83t-dw-hdmi"; - reg = <0x01ee0000 0x10000>; -@@ -935,7 +1077,7 @@ - resets = <&ccu RST_BUS_HDMI1>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; -- phy-names = "hdmi-phy"; -+ phy-names = "phy"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_pins>; - status = "disabled"; -@@ -981,7 +1123,7 @@ - compatible = "allwinner,sun8i-a83t-r-ccu"; - reg = <0x01f01400 0x400>; - clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, -- <&ccu 6>; -+ <&ccu CLK_PLL_PERIPH>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; -@@ -992,6 +1134,26 @@ - reg = <0x1f01c00 0x400>; - }; - -+ r_cir: ir@1f02000 { -+ compatible = "allwinner,sun8i-a83t-ir", -+ "allwinner,sun6i-a31-ir"; -+ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_APB0_IR>; -+ interrupts = ; -+ reg = <0x01f02000 0x400>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_cir_pin>; -+ status = "disabled"; -+ }; -+ -+ r_lradc: lradc@1f03c00 { -+ compatible = "allwinner,sun8i-a83t-r-lradc"; -+ reg = <0x01f03c00 0x100>; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun8i-a83t-r-pinctrl"; - reg = <0x01f02c00 0x400>; -@@ -1004,6 +1166,11 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ r_cir_pin: r-cir-pin { -+ pins = "PL12"; -+ function = "s_cir_rx"; -+ }; -+ - r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; -@@ -1026,5 +1193,82 @@ - #address-cells = <1>; - #size-cells = <0>; - }; -+ -+ ths: thermal-sensor@1f04000 { -+ compatible = "allwinner,sun8i-a83t-ths"; -+ reg = <0x01f04000 0x100>; -+ interrupts = ; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <1>; -+ }; -+ }; -+ -+ thermal-zones { -+ cpu0_thermal: cpu0-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 0>; -+ -+ trips { -+ cpu0_hot: cpu-hot { -+ temperature = <80000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu0_very_hot: cpu-very-hot { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ cpu-hot-limit { -+ trip = <&cpu0_hot>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ -+ cpu1_thermal: cpu1-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ -+ trips { -+ cpu1_hot: cpu-hot { -+ temperature = <80000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu1_very_hot: cpu-very-hot { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ cpu-hot-limit { -+ trip = <&cpu1_hot>; -+ cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ -+ gpu_thermal: gpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 2>; -+ }; - }; - }; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -index 71fb732089..babf4cf1b2 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -53,11 +53,6 @@ - }; - }; - --&emac { -- /* LEDs changed to active high on the plus */ -- /delete-property/ allwinner,leds-active-low; --}; -- - &mmc1 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -index 6dbf7b2e0c..b6ca45d18e 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -@@ -67,7 +67,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -index b8f46e2802..251bbab7d7 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -@@ -70,6 +70,21 @@ - }; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr { -+ label = "orangepi:green:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ -+ status { -+ label = "orangepi:red:status"; -+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; -@@ -88,6 +103,10 @@ - status = "okay"; - }; - -+&ehci0 { -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -132,8 +151,27 @@ - status = "okay"; - }; - -+&ohci0 { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pa_pins>; - status = "okay"; - }; -+ -+&usb_otg { -+ /* -+ * According to schematics CN1 MicroUSB port can be used to take -+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB -+ * port cannot provide power externally even if the board is powered -+ * via GPIO pins. It thus makes sense to force peripheral mode. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -index 15c22b06fc..47954551f5 100644 ---- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -@@ -120,7 +120,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy-handle = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_dc1sw>; - status = "okay"; - }; -@@ -198,16 +198,16 @@ - }; - - ®_dc1sw { -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-gmac-phy"; - }; - - ®_dcdc1 { - regulator-always-on; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -- regulator-name = "vcc-3v0"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; - }; - - ®_dcdc2 { -diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -index 39263e74fb..8e5cb3b3fd 100644 ---- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -@@ -126,7 +126,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - - status = "okay"; - }; --- -2.29.2 - diff --git a/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch b/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch deleted file mode 100644 index d2c55f6..0000000 --- a/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch +++ /dev/null @@ -1,152 +0,0 @@ -From patchwork Sun Apr 25 23:08:03 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Yuichiro Goto -X-Patchwork-Id: 1470141 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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This patch fixes it. - -Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()") -Signed-off-by: Yuichiro Goto -Cc: Peter Robinson -Cc: Andy Shevchenko -Cc: Nicolas Saenz Julienne -Reviewed-by: Andy Shevchenko ---- - -Changes for v3: -- Add a Fixes tag in commit message -- Refactor the patch per suggestion from Andy Shevchenko - -Changes for v2: -- Add "IOMUX" in title - - common/iomux.c | 8 ++++++-- - 1 file changed, 6 insertions(+), 2 deletions(-) - -diff --git a/common/iomux.c b/common/iomux.c -index b9088aa3b5..c428f7110a 100644 ---- a/common/iomux.c -+++ b/common/iomux.c -@@ -158,8 +158,12 @@ int iomux_replace_device(const int console, const char *old, const char *new) - return -ENOMEM; - } - -- strcat(tmp, ","); -- strcat(tmp, name); -+ if (arg) { -+ strcat(tmp, ","); -+ strcat(tmp, name); -+ } -+ else -+ strcpy(tmp, name); - - arg = tmp; - size = strlen(tmp) + 1; diff --git a/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch index b221ddd..8bbf9d9 100644 --- a/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch +++ b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch @@ -4,6 +4,7 @@ MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 1471143 +X-Patchwork-Delegate: xypron.glpk@gmx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -187,6 +188,8 @@ Cc: Heinrich Schuchardt Cc: Stefan Sørensen Tested-by: Peter Robinson Signed-off-by: Peng Fan +Reviewed-by: Heinrich Schuchardt +Tested-by: Michal Simek --- V2: diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch deleted file mode 100644 index 43a52ad..0000000 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ /dev/null @@ -1,1257 +0,0 @@ -From patchwork Fri Mar 5 10:27:46 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447757 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKq3YGqz9sRR - for ; Fri, 5 Mar 2021 21:36:31 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 18DC78269D; - Fri, 5 Mar 2021 11:35:59 +0100 (CET) -Authentication-Results: phobos.denx.de; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.004041703@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:46 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 1/9] rockchip: video: vop: Use endpoint compatible string - to find VOP mode -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The current code is using an hard coded enum and the of node reg value of -endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order -is different between rk3288, rk3399 vop little, rk3399 vop big. - -A possible solution would be to make sure that the rk3288.dtsi and -rk3399.dtsi files have "expected" reg value or an other solution is -to find the kind of endpoint by comparing the endpoint compatible value. - -This patch is implementing the more flexible second solution. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -@@ -85,26 +85,13 @@ enum { - LB_RGB_1280X8 = 0x5 - }; - --#if defined(CONFIG_ROCKCHIP_RK3399) - enum vop_modes { - VOP_MODE_EDP = 0, - VOP_MODE_MIPI, - VOP_MODE_HDMI, -- VOP_MODE_MIPI1, -- VOP_MODE_DP, -- VOP_MODE_NONE, --}; --#else --enum vop_modes { -- VOP_MODE_EDP = 0, -- VOP_MODE_HDMI, - VOP_MODE_LVDS, -- VOP_MODE_MIPI, -- VOP_MODE_NONE, -- VOP_MODE_AUTO_DETECT, -- VOP_MODE_UNKNOWN, -+ VOP_MODE_DP, - }; --#endif - - /* VOP_VERSION_INFO */ - #define M_FPGA_VERSION (0xffff << 16) -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -236,12 +236,11 @@ static int rk_display_init(struct udevic - struct clk clk; - enum video_log2_bpp l2bpp; - ofnode remote; -+ const char *compat; - - debug("%s(%s, %lu, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - -- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); -- debug("vop_id=%d\n", vop_id); - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - if (ret) - return ret; -@@ -283,6 +282,28 @@ static int rk_display_init(struct udevic - if (disp) - break; - }; -+ compat = ofnode_get_property(remote, "compatible", NULL); -+ if (!compat) { -+ debug("%s(%s): Failed to find compatible property\n", -+ __func__, dev_read_name(dev)); -+ return -EINVAL; -+ } -+ if (strstr(compat, "edp")) { -+ vop_id = VOP_MODE_EDP; -+ } else if (strstr(compat, "mipi")) { -+ vop_id = VOP_MODE_MIPI; -+ } else if (strstr(compat, "hdmi")) { -+ vop_id = VOP_MODE_HDMI; -+ } else if (strstr(compat, "cdn-dp")) { -+ vop_id = VOP_MODE_DP; -+ } else if (strstr(compat, "lvds")) { -+ vop_id = VOP_MODE_LVDS; -+ } else { -+ debug("%s(%s): Failed to find vop mode for %s\n", -+ __func__, dev_read_name(dev), compat); -+ return -EINVAL; -+ } -+ debug("vop_id=%d\n", vop_id); - - disp_uc_plat = dev_get_uclass_plat(disp); - debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); - -From patchwork Fri Mar 5 10:27:47 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447760 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; 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Fri, 5 Mar 2021 11:35:43 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 2D11018084F; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.057540339@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:47 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 2/9] rockchip: video: edp: Add rk3399 support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP -support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 -eDP IPs are nearly the same, the difference is in the grf register -(SOC_CON6 versus SOC_CON20). So, change the code to use the right -register on each IP. - -The clocks don't seem to be the same, the eDP clock is not at index 1 -on rk3399, so don't try changing the clock at index 1 to rate 0 on -rk3399. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -17,11 +17,10 @@ - #include - #include - #include -+#include - #include - #include --#include --#include --#include -+#include - - #define MAX_CR_LOOP 5 - #define MAX_EQ_LOOP 5 -@@ -37,18 +36,42 @@ static const char * const pre_emph_names - #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 - #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 - -+#define RK3288_GRF_SOC_CON6 0x025c -+#define RK3288_GRF_SOC_CON12 0x0274 -+#define RK3399_GRF_SOC_CON20 0x6250 -+#define RK3399_GRF_SOC_CON25 0x6264 -+ -+enum rockchip_dp_types { -+ RK3288_DP = 0, -+ RK3399_EDP -+}; -+ -+struct rockchip_dp_data { -+ unsigned long reg_vop_big_little; -+ unsigned long reg_vop_big_little_sel; -+ unsigned long reg_ref_clk_sel; -+ unsigned long ref_clk_sel_bit; -+ enum rockchip_dp_types chip_type; -+}; -+ - struct rk_edp_priv { - struct rk3288_edp *regs; -- struct rk3288_grf *grf; -+ void *grf; - struct udevice *panel; - struct link_train link_train; - u8 train_set[4]; - }; - --static void rk_edp_init_refclk(struct rk3288_edp *regs) -+static void rk_edp_init_refclk(struct rk3288_edp *regs, enum rockchip_dp_types chip_type) - { - writel(SEL_24M, ®s->analog_ctl_2); -- writel(REF_CLK_24M, ®s->pll_reg_1); -+ u32 reg; -+ -+ reg = REF_CLK_24M; -+ if (chip_type == RK3288_DP) -+ reg ^= REF_CLK_MASK; -+ writel(reg, ®s->pll_reg_1); -+ - - writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | - V2L_CUR_SEL_1MA, ®s->pll_reg_2); -@@ -1029,6 +1052,8 @@ static int rk_edp_probe(struct udevice * - struct display_plat *uc_plat = dev_get_uclass_plat(dev); - struct rk_edp_priv *priv = dev_get_priv(dev); - struct rk3288_edp *regs = priv->regs; -+ struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ - struct clk clk; - int ret; - -@@ -1043,16 +1068,17 @@ static int rk_edp_probe(struct udevice * - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - -- ret = clk_get_by_index(dev, 1, &clk); -- if (ret >= 0) { -- ret = clk_set_rate(&clk, 0); -- clk_free(&clk); -- } -- if (ret) { -- debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -- return ret; -+ if (edp_data->chip_type == RK3288_DP) { -+ ret = clk_get_by_index(dev, 1, &clk); -+ if (ret >= 0) { -+ ret = clk_set_rate(&clk, 0); -+ clk_free(&clk); -+ } -+ if (ret) { -+ debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -+ return ret; -+ } - } -- - ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); - if (ret >= 0) { - ret = clk_set_rate(&clk, 192000000); -@@ -1065,15 +1091,17 @@ static int rk_edp_probe(struct udevice * - } - - /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ -- rk_setreg(&priv->grf->soc_con12, 1 << 4); -+ rk_setreg(priv->grf + edp_data->reg_ref_clk_sel, -+ edp_data->ref_clk_sel_bit); - - /* select epd signal from vop0 or vop1 */ -- rk_clrsetreg(&priv->grf->soc_con6, (1 << 5), -- (vop_id == 1) ? (1 << 5) : (0 << 5)); -+ rk_clrsetreg(priv->grf + edp_data->reg_vop_big_little, -+ edp_data->reg_vop_big_little_sel, -+ (vop_id == 1) ? edp_data->reg_vop_big_little_sel : 0); - - rockchip_edp_wait_hpd(priv); - -- rk_edp_init_refclk(regs); -+ rk_edp_init_refclk(regs, edp_data->chip_type); - rk_edp_init_interrupt(regs); - rk_edp_enable_sw_function(regs); - ret = rk_edp_init_analog_func(regs); -@@ -1089,8 +1117,25 @@ static const struct dm_display_ops dp_ro - .enable = rk_edp_enable, - }; - -+static const struct rockchip_dp_data rk3399_edp = { -+ .reg_vop_big_little = RK3399_GRF_SOC_CON20, -+ .reg_vop_big_little_sel = BIT(5), -+ .reg_ref_clk_sel = RK3399_GRF_SOC_CON25, -+ .ref_clk_sel_bit = BIT(11), -+ .chip_type = RK3399_EDP, -+}; -+ -+static const struct rockchip_dp_data rk3288_dp = { -+ .reg_vop_big_little = RK3288_GRF_SOC_CON6, -+ .reg_vop_big_little_sel = BIT(5), -+ .reg_ref_clk_sel = RK3288_GRF_SOC_CON12, -+ .ref_clk_sel_bit = BIT(4), -+ .chip_type = RK3288_DP, -+}; -+ - static const struct udevice_id rockchip_dp_ids[] = { -- { .compatible = "rockchip,rk3288-edp" }, -+ { .compatible = "rockchip,rk3288-edp", .data = (ulong)&rk3288_dp }, -+ { .compatible = "rockchip,rk3399-edp", .data = (ulong)&rk3399_edp }, - { } - }; - -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - #define PD_CH0 (0x1 << 0) - - /* pll_reg_1 */ --#define REF_CLK_24M (0x1 << 1) --#define REF_CLK_27M (0x0 << 1) -+#define REF_CLK_24M (0x1 << 0) -+#define REF_CLK_27M (0x0 << 0) -+#define REF_CLK_MASK (0x1 << 0) - - /* line_map */ - #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) - -From patchwork Fri Mar 5 10:27:48 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447758 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPL32w8Bz9sRR - for ; Fri, 5 Mar 2021 21:36:43 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 44C1D82082; - Fri, 5 Mar 2021 11:36:04 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 5F86A8204C; Fri, 5 Mar 2021 11:35:51 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE - autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org - [IPv6:2001:bc8:3430:1000::c0f:fee]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 1AEBD825C6 - for ; Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 3E0CC180475; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.112947687@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:48 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 3/9] Rockchip: video: edp: Change interrupt polarity - configuration -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The linux code is setting polarity configuration to 3 but -uboot code is setting it to 1. Change the configuration to match the -linux configuration - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - - /* int_ctl */ - #define SOFT_INT_CTRL (0x1 << 2) --#define INT_POL (0x1 << 0) -+#define INT_POL1 (0x1 << 1) -+#define INT_POL0 (0x1 << 0) -+#define INT_POL (INT_POL0 | INT_POL1) - - /* sys_ctl_1 */ - #define DET_STA (0x1 << 2) - -From patchwork Fri Mar 5 10:27:49 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447759 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 61DE01808B6; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.175518624@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:49 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 4/9] Rockchip: video: vop: Reserve efi fb memory -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -When booting with EFI and graphics, the memory used for framebuffer -has to be reserved, otherwise it may leads to kernel memory -overwrite. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -21,6 +21,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -395,6 +397,11 @@ int rk_vop_probe(struct udevice *dev) - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - -+#if defined(CONFIG_EFI_LOADER) -+ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); -+ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); -+#endif -+ - priv->regs = (struct rk3288_vop *)dev_read_addr(dev); - - /* - -From patchwork Fri Mar 5 10:27:50 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447756 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKd3f7rz9sRR - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 71166180A1E; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.228214963@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:50 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 5/9] rockchip: Pinebook Pro: Enable edp -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -- uboot rockchip edp code is looking for a rockchip,panel property - for the edp dts node, so add it. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -=================================================================== ---- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -16,6 +16,10 @@ - }; - }; - -+&edp { -+ rockchip,panel = <&edp_panel>; -+}; -+ - &i2c0 { - u-boot,dm-pre-reloc; - }; - -From patchwork Fri Mar 5 10:27:51 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447754 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKR1d2Fz9sRR - for ; Fri, 5 Mar 2021 21:36:11 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 12B478204C; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.290295328@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:51 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 6/9] rockchip: pwm: Fix default polarity -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In the code, the default polarity is set to positive/positive, -which is neither normal polarity or inverted polarity. It's -only the hardware default. This leads to booting linux with -wrong polarity setting. - -Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE -by default instead. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/pwm/rk_pwm.c -=================================================================== ---- u-boot.orig/drivers/pwm/rk_pwm.c -+++ u-boot/drivers/pwm/rk_pwm.c -@@ -147,7 +147,7 @@ static int rk_pwm_probe(struct udevice * - priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); - - if (priv->data->supports_polarity) -- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; -+ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; - - return 0; - } - -From patchwork Fri Mar 5 10:27:52 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447761 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id E7A2D180ACE; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.342131644@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:52 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 7/9] rockchip: video: vop: Fix format of fbbase in debug - string -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The debug string printing the device name, framebuffer address and of node -is using %lu as format for the framebuffer address, which is not so nice. -Change it to %lx. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -240,7 +240,7 @@ static int rk_display_init(struct udevic - ofnode remote; - const char *compat; - -- debug("%s(%s, %lu, %s)\n", __func__, -+ debug("%s(%s, 0x%lx, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - -From patchwork Fri Mar 5 10:27:53 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447762 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPLx35qQz9sRR - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id F37E5180A23; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.395781510@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:53 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 8/9] rockchip: video: edp: Add missing reset support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the eDP registers are in correct state, -add missing support for the eDP reset lines found in the device-tree. - - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -8,11 +8,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -1053,6 +1055,7 @@ static int rk_edp_probe(struct udevice * - struct rk_edp_priv *priv = dev_get_priv(dev); - struct rk3288_edp *regs = priv->regs; - struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ struct reset_ctl dp_rst; - - struct clk clk; - int ret; -@@ -1065,6 +1068,25 @@ static int rk_edp_probe(struct udevice * - return ret; - } - -+ ret = reset_get_by_name(dev, "dp", &dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ ret = reset_assert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - - -From patchwork Fri Mar 5 10:27:54 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447763 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPM76BCrz9sRR - for ; Fri, 5 Mar 2021 21:37:39 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 67BC2827B1; - Fri, 5 Mar 2021 11:36:20 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id DF2998206F; Fri, 5 Mar 2021 11:35:55 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE - autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org [51.15.165.164]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 4C91882070 - for ; Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 329B7180B08; Fri, 5 Mar 2021 11:35:42 +0100 (CET) -Message-ID: <20210305103307.447309277@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:54 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 9/9] rockchip: video: vop: Add reset support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the VOP registers are in correct state, -add missing support for the VOP reset lines found in the device-tree - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -8,9 +8,11 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -37,14 +39,16 @@ enum vop_pol { - DCLK_INVERT = 3 - }; - --static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, -+static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, - int fb_bits_per_pixel, -- const struct display_timing *edid) -+ const struct display_timing *edid, -+ struct reset_ctl *dclk_rst) - { - u32 lb_mode; - u32 rgb_mode; - u32 hactive = edid->hactive.typ; - u32 vactive = edid->vactive.typ; -+ int ret; - - writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), - ®s->win0_act_info); -@@ -92,6 +96,18 @@ static void rkvop_enable(struct rk3288_v - - writel(fbbase, ®s->win0_yrgb_mst); - writel(0x01, ®s->reg_cfg_done); /* enable reg config */ -+ -+ ret = reset_assert(dclk_rst); -+ if (ret) { -+ dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret); -+ return; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(dclk_rst); -+ if (ret) -+ dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret); -+ - } - - static void rkvop_set_pin_polarity(struct udevice *dev, -@@ -239,6 +255,7 @@ static int rk_display_init(struct udevic - enum video_log2_bpp l2bpp; - ofnode remote; - const char *compat; -+ struct reset_ctl dclk_rst; - - debug("%s(%s, 0x%lx, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); -@@ -355,7 +372,14 @@ static int rk_display_init(struct udevic - } - - rkvop_mode_set(dev, &timing, vop_id); -- rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); -+ -+ ret = reset_get_by_name(dev, "dclk", &dclk_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); - - ret = display_enable(disp, 1 << l2bpp, &timing); - if (ret) -@@ -392,11 +416,31 @@ int rk_vop_probe(struct udevice *dev) - struct rk_vop_priv *priv = dev_get_priv(dev); - int ret = 0; - ofnode port, node; -+ struct reset_ctl ahb_rst; - - /* Before relocation we don't need to do anything */ - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - -+ ret = reset_get_by_name(dev, "ahb", &ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ ret = reset_assert(&ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(&ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ - #if defined(CONFIG_EFI_LOADER) - debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); - efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); diff --git a/sources b/sources index 0be2497..d89c8d2 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04.tar.bz2) = c24835a520bfd528032614576ca552e55e6de129372e72e22e80e0d45dc5c1c75aa4aad80e856d5bbd7146ec092cac52a6f352253cf3fdf9fe536f5e87782803 +SHA512 (u-boot-2021.07-rc2.tar.bz2) = 3d753a7e85894fd0ecbe9ffcf6da6cc8f5e5d26cb1ec2505035c2183729d1b3ae5e4ece6ecdd93125f50627cd3e358cd911570c366e7e9dafac2c1369ca49697 diff --git a/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch b/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch deleted file mode 100644 index c2b6946..0000000 --- a/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch +++ /dev/null @@ -1,337 +0,0 @@ -From patchwork Thu Feb 25 16:13:24 2021 -Content-Type: text/plain; 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a=rsa-sha256; c=simple/simple; d=aosc.io; s=default; - t=1614269631; bh=p5Qg+eI0X+uHI/vb/v+Q5hqIyhUcxanqxa0s3F6kzsk=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=HIUK4Nk2y/BejXaMIQECyQ7r0JiiRWWbURK29vtVJOxbvSa5uDI5eMKRpJPD1FM0C - FcHWJD/H2cXjFNbCk9Ogmfwhcw2wgyXx0AranW4WXH8qg4g8uzYrAqN9nKGhbmDZ3n - ds22TcdBpaiuxNCOmVjRPJvWBZhWtTxLREQv27fw= -From: Icenowy Zheng -To: Jagan Teki , - Andre Przywara -Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, - Icenowy Zheng -Subject: [PATCH 1/2] sunxi: support asymmetric dual rank DRAM on A64/R40 -Date: Fri, 26 Feb 2021 00:13:24 +0800 -Message-Id: <20210225161325.94019-2-icenowy@aosc.io> -X-Mailer: git-send-email 2.30.0 -In-Reply-To: <20210225161325.94019-1-icenowy@aosc.io> -References: <20210225161325.94019-1-icenowy@aosc.io> -MIME-Version: 1.0 -X-Rspamd-Server: mail20.mymailcheap.com -X-Spamd-Result: default: False [4.90 / 20.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; - R_DKIM_ALLOW(0.00)[aosc.io:s=default]; - RECEIVED_SPAMHAUS_PBL(0.00)[59.41.161.221:received]; - FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; - R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; - MIME_GOOD(-0.10)[text/plain]; DMARC_NA(0.00)[aosc.io]; - BROKEN_CONTENT_TYPE(1.50)[]; R_SPF_SOFTFAIL(0.00)[~all:c]; - RCPT_COUNT_FIVE(0.00)[5]; ML_SERVERS(-3.10)[148.251.23.173]; - DKIM_TRACE(0.00)[aosc.io:+]; MID_CONTAINS_FROM(1.00)[]; - RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - ASN(0.00)[asn:24940, ipnet:148.251.0.0/16, country:DE]; - RCVD_COUNT_TWO(0.00)[2]; - HFILTER_HELO_BAREIP(3.00)[148.251.23.173,1] -X-Rspamd-Queue-Id: 623DD41AAC -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -Previously we have known that R40 has a configuration register for its -rank 1, which allows different configuration than rank 0. Reverse -engineering of newest libdram of A64 from Allwinner shows that A64 has -this register too. It's bit 0 (which enables dual rank in rank 0 -configuration register) means a dedicated rank size setup is used for -rank 1. - -Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB -rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank -DRAM support necessary. - -Add this support. The code could support both A64 and R40, but because -dual rank detection is broken on R40 now, we cannot really use it on R40 -currently. - -Signed-off-by: Icenowy Zheng ---- - .../include/asm/arch-sunxi/dram_sunxi_dw.h | 11 ++- - arch/arm/mach-sunxi/dram_sunxi_dw.c | 94 +++++++++++++++---- - 2 files changed, 82 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -index a5a7ebde44..e843c14202 100644 ---- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -@@ -215,12 +215,17 @@ struct sunxi_mctl_ctl_reg { - #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) - /* The eight data lines (DQn) plus DM, DQS and DQSN */ - #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) --struct dram_para { -+ -+struct rank_para { - u16 page_size; -- u8 bus_full_width; -- u8 dual_rank; - u8 row_bits; - u8 bank_bits; -+}; -+ -+struct dram_para { -+ u8 dual_rank; -+ u8 bus_full_width; -+ struct rank_para ranks[2]; - const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; - const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; - const u8 ac_delays[31]; -diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c -index d0600011ff..2b9d631d49 100644 ---- a/arch/arm/mach-sunxi/dram_sunxi_dw.c -+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c -@@ -399,11 +399,19 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) - #else - #error Unsupported DRAM type! - #endif -- (para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | -+ (para->ranks[0].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | - MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | - (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) | -- MCTL_CR_PAGE_SIZE(para->page_size) | -- MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); -+ MCTL_CR_PAGE_SIZE(para->ranks[0].page_size) | -+ MCTL_CR_ROW_BITS(para->ranks[0].row_bits), &mctl_com->cr); -+ -+ if (para->dual_rank && (socid == SOCID_A64 || socid == SOCID_R40)) { -+ writel((para->ranks[1].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | -+ MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | -+ MCTL_CR_DUAL_RANK | -+ MCTL_CR_PAGE_SIZE(para->ranks[1].page_size) | -+ MCTL_CR_ROW_BITS(para->ranks[1].row_bits), &mctl_com->cr_r1); -+ } - - if (socid == SOCID_R40) { - if (para->dual_rank) -@@ -646,35 +654,63 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) - return 0; - } - --static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) -+/* -+ * Test if memory at offset offset matches memory at a certain base -+ */ -+static bool mctl_mem_matches_base(u32 offset, ulong base) -+{ -+ /* Try to write different values to RAM at two addresses */ -+ writel(0, base); -+ writel(0xaa55aa55, base + offset); -+ dsb(); -+ /* Check if the same value is actually observed when reading back */ -+ return readl(base) == -+ readl(base + offset); -+} -+ -+static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) - { - /* detect row address bits */ -- para->page_size = 512; -- para->row_bits = 16; -- para->bank_bits = 2; -+ rank->page_size = 512; -+ rank->row_bits = 16; -+ rank->bank_bits = 2; - mctl_set_cr(socid, para); - -- for (para->row_bits = 11; para->row_bits < 16; para->row_bits++) -- if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size)) -+ for (rank->row_bits = 11; rank->row_bits < 16; rank->row_bits++) -+ if (mctl_mem_matches_base((1 << (rank->row_bits + rank->bank_bits)) * rank->page_size, base)) - break; - - /* detect bank address bits */ -- para->bank_bits = 3; -+ rank->bank_bits = 3; - mctl_set_cr(socid, para); - -- for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++) -- if (mctl_mem_matches((1 << para->bank_bits) * para->page_size)) -+ for (rank->bank_bits = 2; rank->bank_bits < 3; rank->bank_bits++) -+ if (mctl_mem_matches_base((1 << rank->bank_bits) * rank->page_size, base)) - break; - - /* detect page size */ -- para->page_size = 8192; -+ rank->page_size = 8192; - mctl_set_cr(socid, para); - -- for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2) -- if (mctl_mem_matches(para->page_size)) -+ for (rank->page_size = 512; rank->page_size < 8192; rank->page_size *= 2) -+ if (mctl_mem_matches_base(rank->page_size, base)) - break; - } - -+static unsigned long mctl_calc_rank_size(struct rank_para *rank) -+{ -+ return (1UL << (rank->row_bits + rank->bank_bits)) * rank->page_size; -+} -+ -+static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) -+{ -+ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE, ¶->ranks[0]); -+ -+ if ((socid == SOCID_A64 || socid == SOCID_R40) && para->dual_rank) { -+ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE + mctl_calc_rank_size(¶->ranks[0]), ¶->ranks[1]); -+ } -+} -+ - /* - * The actual values used here are taken from Allwinner provided boot0 - * binaries, though they are probably board specific, so would likely benefit -@@ -769,12 +805,23 @@ unsigned long sunxi_dram_init(void) - struct sunxi_mctl_ctl_reg * const mctl_ctl = - (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; - -+ unsigned long size; -+ - struct dram_para para = { - .dual_rank = 1, - .bus_full_width = 1, -- .row_bits = 15, -- .bank_bits = 3, -- .page_size = 4096, -+ .ranks = { -+ { -+ .row_bits = 15, -+ .bank_bits = 3, -+ .page_size = 4096, -+ }, -+ { -+ .row_bits = 15, -+ .bank_bits = 3, -+ .page_size = 4096, -+ } -+ }, - - #if defined(CONFIG_MACH_SUN8I_H3) - .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, -@@ -846,6 +893,13 @@ unsigned long sunxi_dram_init(void) - mctl_auto_detect_dram_size(socid, ¶); - mctl_set_cr(socid, ¶); - -- return (1UL << (para.row_bits + para.bank_bits)) * para.page_size * -- (para.dual_rank ? 2 : 1); -+ size = mctl_calc_rank_size(¶.ranks[0]); -+ if (socid == SOCID_A64 || socid == SOCID_R40) { -+ if (para.dual_rank) -+ size += mctl_calc_rank_size(¶.ranks[1]); -+ } else if (para.dual_rank) { -+ size *= 2; -+ } -+ -+ return size; - } diff --git a/uboot-tools.spec b/uboot-tools.spec index 3176c3a..4d7c27d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc1 +%global candidate rc2 Name: uboot-tools -Version: 2021.04 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2021.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,20 +21,14 @@ Patch2: efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -# Revert an upstream regression -Patch9: IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch # Board fixes and enablement # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch12: rk3399-Pinebook-pro-EDP-support.patch -Patch13: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch -Patch14: rockchip-fix-mmc-numbering.patch -# Fixes for Allwinner network issues -Patch15: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch -Patch16: sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch +Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +Patch13: rockchip-fix-mmc-numbering.patch BuildRequires: bc BuildRequires: dtc @@ -261,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon May 10 2021 Peter Robinson - 2021.07-0.1.rc2 +- Update to 2021.07 RC2 + * Wed Apr 28 2021 Peter Robinson - 2021.04-3 - Upstream fix for console regression (rhbz 1946278) - Fix for fallback.efi crash (rhbz 1733817) diff --git a/usb-kbd-fixes.patch b/usb-kbd-fixes.patch deleted file mode 100644 index fb6a0e0..0000000 --- a/usb-kbd-fixes.patch +++ /dev/null @@ -1,115 +0,0 @@ -From a49845f198af088c4e5e0019edbf519344d78c97 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 4 Dec 2018 15:29:14 +0000 -Subject: [PATCH] usb kbd fixes - -Signed-off-by: Peter Robinson ---- - common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++------------ - include/console.h | 2 -- - 2 files changed, 50 insertions(+), 18 deletions(-) - -diff --git a/common/usb_kbd.c b/common/usb_kbd.c -index 020f0d4117f..47674ce4458 100644 ---- a/common/usb_kbd.c -+++ b/common/usb_kbd.c -@@ -518,25 +518,59 @@ static int probe_usb_keyboard(struct usb_device *dev) - return error; - - stdinname = env_get("stdin"); --#if CONFIG_IS_ENABLED(CONSOLE_MUX) -- error = iomux_doenv(stdin, stdinname); -- if (error) -- return error; --#else -- /* Check if this is the standard input device. */ -- if (strcmp(stdinname, DEVNAME)) -- return 1; -+ if (CONFIG_IS_ENABLED(CONSOLE_MUX)) { -+ char *devname = DEVNAME; -+ char *newstdin = NULL; -+ /* -+ * stdin might not be set yet.. either way, with console- -+ * mux the sensible thing to do is add ourselves to the -+ * list of stdio devices: -+ */ -+ if (stdinname && !strstr(stdinname, DEVNAME)) { -+ newstdin = malloc(strlen(stdinname) + -+ strlen(","DEVNAME) + 1); -+ sprintf(newstdin, "%s,"DEVNAME, stdinname); -+ stdinname = newstdin; -+ } else if (!stdinname) { -+ stdinname = devname; -+ } -+ error = iomux_doenv(stdin, stdinname); -+ free(newstdin); -+ if (error) -+ goto unregister_stdio; -+ } else { -+ /* Check if this is the standard input device. */ -+ if (strcmp(stdinname, DEVNAME)) { -+ error = -1; -+ goto unregister_stdio; -+ } - -- /* Reassign the console */ -- if (overwrite_console()) -- return 1; -+ /* Reassign the console */ -+ if (overwrite_console()) { -+ error = -1; -+ goto unregister_stdio; -+ } - -- error = console_assign(stdin, DEVNAME); -- if (error) -- return error; --#endif -+ error = console_assign(stdin, DEVNAME); -+ if (error) -+ goto unregister_stdio; -+ } -+ -+ return 0; - -+unregister_stdio: -+ /* -+ * If probe fails, the device will be removed.. leaving dangling -+ * pointers if the stdio device is not unregistered. If u-boot -+ * is built without stdio_deregister(), just pretend to succeed -+ * in order to avoid dangling pointers. -+ */ -+#if CONFIG_IS_ENABLED(SYS_STDIO_DEREGISTER) -+ stdio_deregister(DEVNAME, 1); -+ return error; -+#else - return 0; -+#endif - } - - #if !CONFIG_IS_ENABLED(DM_USB) -@@ -642,7 +676,7 @@ static int usb_kbd_remove(struct udevice *dev) - - return 0; - err: -- printf("%s: warning, ret=%d", __func__, ret); -+ printf("%s: warning, ret=%d\n", __func__, ret); - return ret; - } - -diff --git a/include/console.h b/include/console.h -index e935c601f12..6382ec8e0d6 100644 ---- a/include/console.h -+++ b/include/console.h -@@ -56,8 +56,6 @@ int console_announce_r(void); - /* - * CONSOLE multiplexing. - */ --#ifdef CONFIG_CONSOLE_MUX - #include --#endif - - #endif --- -2.19.2 - From bff9338fe9e72cd6502512ac17fe71264b557fa1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 10 May 2021 23:13:33 +0100 Subject: [PATCH 145/351] Update docs locations --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 4d7c27d..2e73b08 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -237,8 +237,8 @@ cp -p board/warp7/README builds/docs/README.warp7 %files %doc README doc/README.kwbimage doc/README.distro doc/README.gpt -%doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst -%doc doc/README.chromium builds/docs/* +%doc doc/README.odroid doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst +%doc doc/chromium builds/docs/* %doc doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* From c74ab1fc05f11bf859492332841796deecf8dc41 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 13 May 2021 12:50:05 +0100 Subject: [PATCH 146/351] Build against new ATF 2.5-rc1 --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 2e73b08..fa0cc28 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -255,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu May 13 2021 Peter Robinson - 2021.07-0.2.rc2 +- Build against new ATF 2.5-rc1 + * Mon May 10 2021 Peter Robinson - 2021.07-0.1.rc2 - Update to 2021.07 RC2 From 896c46870f7db8ec1313f8b457c3a49eb22960b1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 25 May 2021 10:01:27 +0100 Subject: [PATCH 147/351] 2021.07 RC3 --- ...parameter-check-in-efi_file_read_int.patch | 214 ------------------ sources | 2 +- uboot-tools.spec | 12 +- 3 files changed, 8 insertions(+), 220 deletions(-) delete mode 100644 efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch diff --git 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-Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -From: Peng Fan - -This is same issue as https://bugzilla.redhat.com/show_bug.cgi?id=1733817, -but that fix was wrongly partial reverted. - -When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when -the supplied buffer is too small, so a use-case is to call -EFI_FILE_PROTOCOL.Read() with *buffer_size=0 and buffer=NULL to -obtain the needed size before doing the actual read. - -So remove the check only for directory reading, file reading already -do the check by itself. - -Fixes: db12f518edb0("efi_loader: implement non-blocking file services") -Cc: Heinrich Schuchardt -Cc: Stefan Sørensen -Tested-by: Peter Robinson -Signed-off-by: Peng Fan -Reviewed-by: Heinrich Schuchardt -Tested-by: Michal Simek ---- - -V2: - Update commit log Per Heinrich's comments. - Add T-b tag - - lib/efi_loader/efi_file.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c -index 204105e25a..6b3f5962be 100644 ---- a/lib/efi_loader/efi_file.c -+++ b/lib/efi_loader/efi_file.c -@@ -554,7 +554,7 @@ static efi_status_t efi_file_read_int(struct efi_file_handle *this, - efi_status_t ret = EFI_SUCCESS; - u64 bs; - -- if (!this || !buffer_size || !buffer) -+ if (!this || !buffer_size) - return EFI_INVALID_PARAMETER; - - bs = *buffer_size; diff --git a/sources b/sources index d89c8d2..8a66efd 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.07-rc2.tar.bz2) = 3d753a7e85894fd0ecbe9ffcf6da6cc8f5e5d26cb1ec2505035c2183729d1b3ae5e4ece6ecdd93125f50627cd3e358cd911570c366e7e9dafac2c1369ca49697 +SHA512 (u-boot-2021.07-rc3.tar.bz2) = 11d4f7ab96ac4a430ed39a0d13788c32f4a8b1657cd71f00d27ea1c87047f48ed85055e4ceca940912301d15f3f1448af442b3011c290eddf8c72ee8d4a7d437 diff --git a/uboot-tools.spec b/uboot-tools.spec index fa0cc28..c4b5d82 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2021.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -16,10 +16,8 @@ Source4: aarch64-chromebooks # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -# https://lists.denx.de/pipermail/u-boot/2021-April/448260.html -Patch2: efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch # RPi - uses RPI firmware device tree for HAT support -Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Board fixes and enablement # AllWinner improvements @@ -255,6 +253,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue May 25 2021 Peter Robinson - 2021.07-0.3.rc3 +- Update to 2021.07 RC3 +- Build against ATF 2.5 GA + * Thu May 13 2021 Peter Robinson - 2021.07-0.2.rc2 - Build against new ATF 2.5-rc1 From 6c925bc3153c9ec6aec3b059de3c14c45e6c3f9b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 5 Jun 2021 21:23:11 +0100 Subject: [PATCH 148/351] AllWinner devices booting from mSD/MMC --- sunxi-fix-mmc0.patch | 41 +++++++++++++++++++++++++++++++++++++++++ uboot-tools.spec | 7 ++++++- 2 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 sunxi-fix-mmc0.patch diff --git a/sunxi-fix-mmc0.patch b/sunxi-fix-mmc0.patch new file mode 100644 index 0000000..e741ac1 --- /dev/null +++ b/sunxi-fix-mmc0.patch @@ -0,0 +1,41 @@ +From 6785434709b74b9a821a21e7228a4c9eb4843095 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 16 Apr 2021 11:52:27 +0100 +Subject: [PATCH] sunxi: Bring back SD card as MMC device 0 + +Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases +node's index") now actually enforces U-Boot's device enumeration policy, +where explicitly named devices come first, then any other non-named +devices follow, without filling gaps. + +For quite a while we have had an "mmc1 = &mmc2;" alias in our +sunxi-u-boot.dtsi, which now leads to the problem that the SD card +(which was always mmc device 0) now gets to be number 2. +This breaks quite some boot scripts, including our own distro boot +commands, and some other features looking at $mmc_bootdev, also +fastboot. + +Just add an explicit mmc0 alias in the very same file to fix this and +restore the old behaviour. + +Signed-off-by: Andre Przywara +Reported-by: Samuel Holland +Tested-by: Simon Baatz +--- + arch/arm/dts/sunxi-u-boot.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi +index a4227a3c22..06da009fa2 100644 +--- a/arch/arm/dts/sunxi-u-boot.dtsi ++++ b/arch/arm/dts/sunxi-u-boot.dtsi +@@ -12,6 +12,7 @@ + + / { + aliases { ++ mmc0 = &mmc0; + mmc1 = &mmc2; + }; + +-- +GitLab diff --git a/uboot-tools.spec b/uboot-tools.spec index c4b5d82..15ad550 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,11 +2,12 @@ Name: uboot-tools Version: 2021.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot +ExcludeArch: s390x Source0: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: arm-boards Source2: arm-chromebooks @@ -27,6 +28,7 @@ Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: rockchip-fix-mmc-numbering.patch +Patch14: sunxi-fix-mmc0.patch BuildRequires: bc BuildRequires: dtc @@ -253,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Jun 05 2021 Peter Robinson - 2021.07-0.4.rc3 +- Fix AllWinner devices booting from mSD/MMC + * Tue May 25 2021 Peter Robinson - 2021.07-0.3.rc3 - Update to 2021.07 RC3 - Build against ATF 2.5 GA From 52be77ca6b5d7bdcdc512842beb8749171a375c7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 7 Jun 2021 16:44:07 +0100 Subject: [PATCH 149/351] 2021.07 RC4 --- sources | 2 +- sunxi-fix-mmc0.patch | 41 ----------------------------------------- uboot-tools.spec | 8 +++++--- 3 files changed, 6 insertions(+), 45 deletions(-) delete mode 100644 sunxi-fix-mmc0.patch diff --git a/sources b/sources index 8a66efd..23a8296 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.07-rc3.tar.bz2) = 11d4f7ab96ac4a430ed39a0d13788c32f4a8b1657cd71f00d27ea1c87047f48ed85055e4ceca940912301d15f3f1448af442b3011c290eddf8c72ee8d4a7d437 +SHA512 (u-boot-2021.07-rc4.tar.bz2) = 43d6b6106aa075f9834f425710215eac2285108a845a80e29582a0425e006478594744806c3892b2d27fbeaba34d324d2cfdc149ce059cbf22ee76746ff66151 diff --git a/sunxi-fix-mmc0.patch b/sunxi-fix-mmc0.patch deleted file mode 100644 index e741ac1..0000000 --- a/sunxi-fix-mmc0.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 6785434709b74b9a821a21e7228a4c9eb4843095 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Fri, 16 Apr 2021 11:52:27 +0100 -Subject: [PATCH] sunxi: Bring back SD card as MMC device 0 - -Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases -node's index") now actually enforces U-Boot's device enumeration policy, -where explicitly named devices come first, then any other non-named -devices follow, without filling gaps. - -For quite a while we have had an "mmc1 = &mmc2;" alias in our -sunxi-u-boot.dtsi, which now leads to the problem that the SD card -(which was always mmc device 0) now gets to be number 2. -This breaks quite some boot scripts, including our own distro boot -commands, and some other features looking at $mmc_bootdev, also -fastboot. - -Just add an explicit mmc0 alias in the very same file to fix this and -restore the old behaviour. - -Signed-off-by: Andre Przywara -Reported-by: Samuel Holland -Tested-by: Simon Baatz ---- - arch/arm/dts/sunxi-u-boot.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi -index a4227a3c22..06da009fa2 100644 ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -12,6 +12,7 @@ - - / { - aliases { -+ mmc0 = &mmc0; - mmc1 = &mmc2; - }; - --- -GitLab diff --git a/uboot-tools.spec b/uboot-tools.spec index 15ad550..0233f49 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2021.07 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,7 +28,6 @@ Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: rockchip-fix-mmc-numbering.patch -Patch14: sunxi-fix-mmc0.patch BuildRequires: bc BuildRequires: dtc @@ -255,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jun 07 2021 Peter Robinson - 2021.07-0.5.rc4 +- Update to 2021.07 RC4 + * Sat Jun 05 2021 Peter Robinson - 2021.07-0.4.rc3 - Fix AllWinner devices booting from mSD/MMC From 8cca32551309dd3f5870d50f3e2814a70132ea58 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 28 Jun 2021 20:52:12 +0100 Subject: [PATCH 150/351] 2021.07 RC5 --- sources | 2 +- uboot-tools.spec | 10 +++++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/sources b/sources index 23a8296..db1745f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.07-rc4.tar.bz2) = 43d6b6106aa075f9834f425710215eac2285108a845a80e29582a0425e006478594744806c3892b2d27fbeaba34d324d2cfdc149ce059cbf22ee76746ff66151 +SHA512 (u-boot-2021.07-rc5.tar.bz2) = ecac447e6df0ad0cc73c27dc821dd663efa239004f5b5947cdedf5593a32a1931555bfc9359e1863b01c35fdbbd21784f66ed704c82edf82409159dcf06400c1 diff --git a/uboot-tools.spec b/uboot-tools.spec index 0233f49..1b468aa 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2021.07 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -129,7 +129,7 @@ do %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ # build spi images for rockchip boards with SPI flash - rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 rockpro64-rk3399) + rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rkspi[*]} " == *" $board "* ]]; then echo "Board: $board with SPI flash" builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi @@ -254,6 +254,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jun 28 2021 Peter Robinson - 2021.07-0.6.rc5 +- Update to 2021.07 RC5 +- Build SPI fash images for ROC-PC-RK3399 + * Mon Jun 07 2021 Peter Robinson - 2021.07-0.5.rc4 - Update to 2021.07 RC4 From dd361c8ed3282d53ca7f115b6f6104e39cb4eab7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 5 Jul 2021 20:09:30 +0100 Subject: [PATCH 151/351] 2021.07 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index db1745f..723afda 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.07-rc5.tar.bz2) = ecac447e6df0ad0cc73c27dc821dd663efa239004f5b5947cdedf5593a32a1931555bfc9359e1863b01c35fdbbd21784f66ed704c82edf82409159dcf06400c1 +SHA512 (u-boot-2021.07.tar.bz2) = 210b206a4626feb0985580d9448a97b499b09bf9b9313ca847a66624785e9e9b0fae8f2e329acd344f5f75cb722d2093dd0ee394311ddd1fde05e400ee71a24d diff --git a/uboot-tools.spec b/uboot-tools.spec index 1b468aa..9bb615d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc0 Name: uboot-tools Version: 2021.07 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -254,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jul 05 2021 Peter Robinson - 2021.07-1 +- Update to 2021.07 GA + * Mon Jun 28 2021 Peter Robinson - 2021.07-0.6.rc5 - Update to 2021.07 RC5 - Build SPI fash images for ROC-PC-RK3399 From e3985d3d2e54af6d9bced51928731c05a7a73dd1 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 22 Jul 2021 16:44:12 +0100 Subject: [PATCH 152/351] Fix regression for Rockchip devices running firmware from SPI flash --- ...class-Add-support-to-manually-reloca.patch | 53 +++++++++++++++++++ uboot-tools.spec | 6 ++- 2 files changed, 58 insertions(+), 1 deletion(-) create mode 100644 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch diff --git a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch new file mode 100644 index 0000000..5dd7695 --- /dev/null +++ b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch @@ -0,0 +1,53 @@ +From 1c56fc2835e10cdc039a4c1d049c1a6978e036f3 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 22 Jul 2021 16:22:48 +0100 +Subject: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi + memory ops" + +This reverts commit 346df7d4fa62afc578d820b3a18815eec765074f. + +This patch broke booting Rockchip systems from U-Boot residing on SPI +flash, for at least the Pinebook Pro and Rockpro64, and also confirmed +with the not yet upstream Helios64. + +Signed-off-by: Peter Robinson +Cc: T Karthik Reddy +Cc: Ashok Reddy Soma +Cc: Michal Simek +Cc: Pratyush Yadav +--- + drivers/spi/spi-uclass.c | 11 ----------- + 1 file changed, 11 deletions(-) + +diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c +index d867b27806..ec7f4652b3 100644 +--- a/drivers/spi/spi-uclass.c ++++ b/drivers/spi/spi-uclass.c +@@ -11,7 +11,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -200,16 +199,6 @@ static int spi_post_probe(struct udevice *bus) + ops->set_mode += gd->reloc_off; + if (ops->cs_info) + ops->cs_info += gd->reloc_off; +- if (ops->mem_ops) { +- struct spi_controller_mem_ops *mem_ops = +- (struct spi_controller_mem_ops *)ops->mem_ops; +- if (mem_ops->adjust_op_size) +- mem_ops->adjust_op_size += gd->reloc_off; +- if (mem_ops->supports_op) +- mem_ops->supports_op += gd->reloc_off; +- if (mem_ops->exec_op) +- mem_ops->exec_op += gd->reloc_off; +- } + reloc_done++; + } + #endif +-- +2.31.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 9bb615d..6afb82e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,6 +28,7 @@ Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: rockchip-fix-mmc-numbering.patch +Patch14: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc @@ -254,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Jul 22 2021 Peter Robinson - 2021.07-2 +- Fix regression for Rockchip devices running firmware from SPI flash + * Mon Jul 05 2021 Peter Robinson - 2021.07-1 - Update to 2021.07 GA From 70da6a07574b8b3d010d75254fdd4d9908623f9f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 14 Aug 2021 10:04:14 +0100 Subject: [PATCH 153/351] 2021.10 RC1 --- arm-boards | 1 + sources | 2 +- uboot-tools.spec | 12 ++++++++---- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arm-boards b/arm-boards index 63ab288..a6b85e5 100644 --- a/arm-boards +++ b/arm-boards @@ -138,3 +138,4 @@ Wexler_TAB7200 Wits_Pro_A20_DKT xilinx_zynq_virt Yones_Toptech_BS1078_V2 +zeropi diff --git a/sources b/sources index 723afda..b1c060f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.07.tar.bz2) = 210b206a4626feb0985580d9448a97b499b09bf9b9313ca847a66624785e9e9b0fae8f2e329acd344f5f75cb722d2093dd0ee394311ddd1fde05e400ee71a24d +SHA512 (u-boot-2021.10-rc1.tar.bz2) = 1481cb95501432b8cf5a06793e0e9dd3164911b8844bd328dccf88deabeb6fe18c865003f170b5d46a0b2b301a0960478582f922381e3e9b36962a97fe6cb5bc diff --git a/uboot-tools.spec b/uboot-tools.spec index 6afb82e..fd0a2bc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc0 +%global candidate rc1 Name: uboot-tools -Version: 2021.07 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2021.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -33,6 +33,7 @@ Patch14: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc BuildRequires: make +BuildRequires: perl-interpreter # Requirements for building on el7 %if 0%{?rhel} == 7 BuildRequires: devtoolset-7-build @@ -136,7 +137,7 @@ do builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi fi # build spi, and uart images for mvebu boards - mvebu=(clearfog helios4 turris_omnia) + # mvebu=(clearfog helios4 turris_omnia) if [[ " ${mvebu[*]} " == *" $board "* ]]; then for target in spi uart do @@ -255,6 +256,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Aug 08 2021 Peter Robinson - 2021.10-0.1.rc1 +- Update to 2021.10 RC1 + * Thu Jul 22 2021 Peter Robinson - 2021.07-2 - Fix regression for Rockchip devices running firmware from SPI flash From e006fd503572c5ceb996723d77af92f898a09c09 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 16 Aug 2021 20:03:59 +0100 Subject: [PATCH 154/351] 2021.10 RC2 --- ...class-Add-support-to-manually-reloca.patch | 53 ----------------- rockchip-fix-mmc-numbering.patch | 57 ------------------- sources | 2 +- uboot-tools.spec | 9 +-- 4 files changed, 6 insertions(+), 115 deletions(-) delete mode 100644 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch delete mode 100644 rockchip-fix-mmc-numbering.patch diff --git a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch deleted file mode 100644 index 5dd7695..0000000 --- a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 1c56fc2835e10cdc039a4c1d049c1a6978e036f3 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 22 Jul 2021 16:22:48 +0100 -Subject: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi - memory ops" - -This reverts commit 346df7d4fa62afc578d820b3a18815eec765074f. - -This patch broke booting Rockchip systems from U-Boot residing on SPI -flash, for at least the Pinebook Pro and Rockpro64, and also confirmed -with the not yet upstream Helios64. - -Signed-off-by: Peter Robinson -Cc: T Karthik Reddy -Cc: Ashok Reddy Soma -Cc: Michal Simek -Cc: Pratyush Yadav ---- - drivers/spi/spi-uclass.c | 11 ----------- - 1 file changed, 11 deletions(-) - -diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c -index d867b27806..ec7f4652b3 100644 ---- a/drivers/spi/spi-uclass.c -+++ b/drivers/spi/spi-uclass.c -@@ -11,7 +11,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -200,16 +199,6 @@ static int spi_post_probe(struct udevice *bus) - ops->set_mode += gd->reloc_off; - if (ops->cs_info) - ops->cs_info += gd->reloc_off; -- if (ops->mem_ops) { -- struct spi_controller_mem_ops *mem_ops = -- (struct spi_controller_mem_ops *)ops->mem_ops; -- if (mem_ops->adjust_op_size) -- mem_ops->adjust_op_size += gd->reloc_off; -- if (mem_ops->supports_op) -- mem_ops->supports_op += gd->reloc_off; -- if (mem_ops->exec_op) -- mem_ops->exec_op += gd->reloc_off; -- } - reloc_done++; - } - #endif --- -2.31.1 - diff --git a/rockchip-fix-mmc-numbering.patch b/rockchip-fix-mmc-numbering.patch deleted file mode 100644 index b8569be..0000000 --- a/rockchip-fix-mmc-numbering.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 76162abd0252cc431abb19421436f34dd9703abe Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 19 Apr 2021 00:09:11 +0100 -Subject: [PATCH] arm: rockchip: fix mmc numbering - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3328.dtsi | 3 +++ - arch/arm/dts/rk3368.dtsi | 3 +++ - arch/arm/dts/rk3399.dtsi | 3 +++ - 3 files changed, 9 insertions(+) - -diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi -index 945387e579..77a556d06f 100644 ---- a/arch/arm/dts/rk3328.dtsi -+++ b/arch/arm/dts/rk3328.dtsi -@@ -27,6 +27,9 @@ - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; -+ mmc0 = &sdmmc; -+ mmc1 = &sdio; -+ mmc2 = &emmc; - ethernet0 = &gmac2io; - ethernet1 = &gmac2phy; - }; -diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi -index b4f4f6139d..55b5f6b2a7 100644 ---- a/arch/arm/dts/rk3368.dtsi -+++ b/arch/arm/dts/rk3368.dtsi -@@ -62,6 +62,9 @@ - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; -+ mmc0 = &sdmmc; -+ mmc1 = &sdio0; -+ mmc2 = &emmc; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; -diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi -index 74f2c3d490..5997c29bc8 100644 ---- a/arch/arm/dts/rk3399.dtsi -+++ b/arch/arm/dts/rk3399.dtsi -@@ -29,6 +29,9 @@ - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; -+ mmc0 = &sdmmc; -+ mmc1 = &sdio0; -+ mmc2 = &sdhci; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; --- -2.31.1 - diff --git a/sources b/sources index b1c060f..f55c53a 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc1.tar.bz2) = 1481cb95501432b8cf5a06793e0e9dd3164911b8844bd328dccf88deabeb6fe18c865003f170b5d46a0b2b301a0960478582f922381e3e9b36962a97fe6cb5bc +SHA512 (u-boot-2021.10-rc2.tar.bz2) = 311e83e982b4fcbb54e67a87302eb49f10e15291956bae08b0edb2065cfefb1b8e7b8a60514fdbc6d86d4129774ddf2fb37620b87917af74bfe31e432b265f9e diff --git a/uboot-tools.spec b/uboot-tools.spec index fd0a2bc..1673200 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2021.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,8 +27,6 @@ Patch10: AllWinner-PineTab.patch Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch -Patch13: rockchip-fix-mmc-numbering.patch -Patch14: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc @@ -256,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Aug 16 2021 Peter Robinson - 2021.10-0.2.rc2 +- Update to 2021.10 RC2 + * Sun Aug 08 2021 Peter Robinson - 2021.10-0.1.rc1 - Update to 2021.10 RC1 From 2bd8d4cdb406c3a72163b61a121f37a9be3e18fa Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 23 Aug 2021 21:33:21 +0100 Subject: [PATCH 155/351] Fix for rockchip SPI --- uboot-tools.spec | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 1673200..5f772c8 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,6 +27,7 @@ Patch10: AllWinner-PineTab.patch Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +Patch13: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc @@ -254,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Aug 23 2021 Peter Robinson - 2021.10-0.3.rc2 +- Fix for rockchip SPI + * Mon Aug 16 2021 Peter Robinson - 2021.10-0.2.rc2 - Update to 2021.10 RC2 From e63667d6b3998d5109982022c0f88470ee7a395c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 23 Aug 2021 21:34:51 +0100 Subject: [PATCH 156/351] add patch --- ...class-Add-support-to-manually-reloca.patch | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch diff --git a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch new file mode 100644 index 0000000..5dd7695 --- /dev/null +++ b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch @@ -0,0 +1,53 @@ +From 1c56fc2835e10cdc039a4c1d049c1a6978e036f3 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 22 Jul 2021 16:22:48 +0100 +Subject: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi + memory ops" + +This reverts commit 346df7d4fa62afc578d820b3a18815eec765074f. + +This patch broke booting Rockchip systems from U-Boot residing on SPI +flash, for at least the Pinebook Pro and Rockpro64, and also confirmed +with the not yet upstream Helios64. + +Signed-off-by: Peter Robinson +Cc: T Karthik Reddy +Cc: Ashok Reddy Soma +Cc: Michal Simek +Cc: Pratyush Yadav +--- + drivers/spi/spi-uclass.c | 11 ----------- + 1 file changed, 11 deletions(-) + +diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c +index d867b27806..ec7f4652b3 100644 +--- a/drivers/spi/spi-uclass.c ++++ b/drivers/spi/spi-uclass.c +@@ -11,7 +11,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -200,16 +199,6 @@ static int spi_post_probe(struct udevice *bus) + ops->set_mode += gd->reloc_off; + if (ops->cs_info) + ops->cs_info += gd->reloc_off; +- if (ops->mem_ops) { +- struct spi_controller_mem_ops *mem_ops = +- (struct spi_controller_mem_ops *)ops->mem_ops; +- if (mem_ops->adjust_op_size) +- mem_ops->adjust_op_size += gd->reloc_off; +- if (mem_ops->supports_op) +- mem_ops->supports_op += gd->reloc_off; +- if (mem_ops->exec_op) +- mem_ops->exec_op += gd->reloc_off; +- } + reloc_done++; + } + #endif +-- +2.31.1 + From 319f8123df247d528b4edb1ff7f055427b89ce69 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 24 Aug 2021 14:08:33 +0100 Subject: [PATCH 157/351] Fix for Raspberry Pi firmware properties --- ...-from-firmware-dtb-to-the-loaded-dtb.patch | 161 ++++++++++++++++++ uboot-tools.spec | 6 +- 2 files changed, 166 insertions(+), 1 deletion(-) create mode 100644 rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch diff --git a/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch b/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch new file mode 100644 index 0000000..e274435 --- /dev/null +++ b/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch 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+0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de +X-Virus-Status: Clean + +The RPI firmware adjusts several property values in the dtb it passes +to u-boot depending on the board/SoC revision. Inherit some of these +when u-boot loads a dtb itself. Specificaly copy: + +* /model: The firmware provides a more specific string +* /memreserve: The firmware defines a reserved range, better keep it +* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as + present on rpi 400 and some rpi 4B boards) has different values for + these then the B0T revision. So these need to be adjusted to boot on + these boards +* blconfig: The firmware defines the memory area where the blconfig + stored. Copy those over so it can be enabled. +* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage + of that. + +Signed-off-by: Sjoerd Simons +--- + + board/raspberrypi/rpi/rpi.c | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index df52a4689f..d9467f4bda 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -495,8 +495,55 @@ void *board_fdt_blob_setup(void) + return (void *)fw_dtb_pointer; + } + ++int copy_property(void *dst, void *src, char *path, char *property) ++{ ++ int dst_offset, src_offset; ++ const fdt32_t *prop; ++ int len; ++ ++ src_offset = fdt_path_offset(src, path); ++ dst_offset = fdt_path_offset(dst, path); ++ ++ if (src_offset < 0 || dst_offset < 0) ++ return -1; ++ ++ prop = fdt_getprop(src, src_offset, property, &len); ++ if (!prop) ++ return -1; ++ ++ return fdt_setprop(dst, dst_offset, property, prop, len); ++} ++ ++/* Copy tweaks from the firmware dtb to the loaded dtb */ ++void update_fdt_from_fw(void *fdt, void *fw_fdt) ++{ ++ /* Using dtb from firmware directly; leave it alone */ ++ if (fdt == fw_fdt) ++ return; ++ ++ /* The firmware provides a more precie model; so copy that */ ++ copy_property(fdt, fw_fdt, "/", "model"); ++ ++ /* memory reserve as suggested by the firmware */ ++ copy_property(fdt, fw_fdt, "/", "memreserve"); ++ ++ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on ++ * the SoC revision ++ */ ++ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges"); ++ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges"); ++ ++ /* Bootloader configuration template exposes as nvmem */ ++ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0) ++ copy_property(fdt, fw_fdt, "blconfig", "status"); ++ ++ /* kernel address randomisation seed as provided by the firmware */ ++ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); ++} ++ + int ft_board_setup(void *blob, struct bd_info *bd) + { ++ update_fdt_from_fw(blob, (void *)fw_dtb_pointer); + /* + * For now, we simply always add the simplefb DT node. Later, we + * should be more intelligent, and e.g. only do this if no enabled DT diff --git a/uboot-tools.spec b/uboot-tools.spec index 5f772c8..70240ce 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -19,6 +19,7 @@ Source4: aarch64-chromebooks Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # RPi - uses RPI firmware device tree for HAT support Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch3: rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch # Board fixes and enablement # AllWinner improvements @@ -255,6 +256,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Aug 24 2021 Peter Robinson - 2021.10-0.4.rc2 +- Fix for Raspberry Pi firmware properties + * Mon Aug 23 2021 Peter Robinson - 2021.10-0.3.rc2 - Fix for rockchip SPI From c455dea8f25d50a5e27e4e7f56a0a260f41f0a28 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 30 Aug 2021 18:09:53 +0100 Subject: [PATCH 158/351] 2021.10 RC3 --- sources | 2 +- uboot-tools.spec | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/sources b/sources index f55c53a..f1a966e 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc2.tar.bz2) = 311e83e982b4fcbb54e67a87302eb49f10e15291956bae08b0edb2065cfefb1b8e7b8a60514fdbc6d86d4129774ddf2fb37620b87917af74bfe31e432b265f9e +SHA512 (u-boot-2021.10-rc3.tar.bz2) = 8ea85c1d466d7b85e1405bd3c78aefe2b171e5bf443518e0ed78c1fb080a83fd4afda97dd5a0367d4cb2ddb6614f4f41a2c7be7181c99b959c7c0abcdaa3ae18 diff --git a/uboot-tools.spec b/uboot-tools.spec index 70240ce..68de4bc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,14 +1,14 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2021.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot ExcludeArch: s390x -Source0: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 +Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: arm-boards Source2: arm-chromebooks Source3: aarch64-boards @@ -256,6 +256,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Aug 30 2021 Peter Robinson - 2021.10-0.5.rc3 +- Update to 2021.10 RC3 + * Tue Aug 24 2021 Peter Robinson - 2021.10-0.4.rc2 - Fix for Raspberry Pi firmware properties From a320cf868cbc433ade303d8268bf4515a2204ab8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 30 Aug 2021 18:28:42 +0100 Subject: [PATCH 159/351] rockchip rk3399: enable hs400 and sdma support --- 0001-enable-hs400-and-sdma-support.patch | 158 +++++++++++++++++++++++ uboot-tools.spec | 1 + 2 files changed, 159 insertions(+) create mode 100644 0001-enable-hs400-and-sdma-support.patch diff --git a/0001-enable-hs400-and-sdma-support.patch b/0001-enable-hs400-and-sdma-support.patch new file mode 100644 index 0000000..782366f --- /dev/null +++ b/0001-enable-hs400-and-sdma-support.patch @@ -0,0 +1,158 @@ +From 42aa88db46fa88db52bbb5a96fc0eaebe695110e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 30 Aug 2021 18:20:39 +0100 +Subject: [PATCH] enable hs400 and sdma support + +Signed-off-by: Peter Robinson +--- + configs/firefly-rk3399_defconfig | 2 ++ + configs/nanopc-t4-rk3399_defconfig | 2 ++ + configs/nanopi-m4-2gb-rk3399_defconfig | 2 ++ + configs/nanopi-m4-rk3399_defconfig | 2 ++ + configs/nanopi-m4b-rk3399_defconfig | 2 ++ + configs/nanopi-neo4-rk3399_defconfig | 2 ++ + configs/nanopi-r4s-rk3399_defconfig | 2 ++ + configs/pinebook-pro-rk3399_defconfig | 1 + + configs/rock960-rk3399_defconfig | 1 + + configs/rockpro64-rk3399_defconfig | 2 ++ + 10 files changed, 18 insertions(+) + +diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig +index 2ca2ac35e4..84ee690a2d 100644 +--- a/configs/firefly-rk3399_defconfig ++++ b/configs/firefly-rk3399_defconfig +@@ -33,7 +33,9 @@ CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_DM_ETH=y +diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig +index a94f428def..722377803e 100644 +--- a/configs/nanopc-t4-rk3399_defconfig ++++ b/configs/nanopc-t4-rk3399_defconfig +@@ -30,7 +30,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig +index c9833fdb85..384d7da80c 100644 +--- a/configs/nanopi-m4-2gb-rk3399_defconfig ++++ b/configs/nanopi-m4-2gb-rk3399_defconfig +@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig +index 2b2fcac366..b6b8ca8d3a 100644 +--- a/configs/nanopi-m4-rk3399_defconfig ++++ b/configs/nanopi-m4-rk3399_defconfig +@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig +index 6d3afe1b63..3f83877e0a 100644 +--- a/configs/nanopi-m4b-rk3399_defconfig ++++ b/configs/nanopi-m4b-rk3399_defconfig +@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig +index 1bf5d1d095..6412cb2d7e 100644 +--- a/configs/nanopi-neo4-rk3399_defconfig ++++ b/configs/nanopi-neo4-rk3399_defconfig +@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig +index 351d2eb553..7b527d47fa 100644 +--- a/configs/nanopi-r4s-rk3399_defconfig ++++ b/configs/nanopi-r4s-rk3399_defconfig +@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index f97d5e872b..b0e68c9591 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -46,6 +46,7 @@ CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index 0233e0ea52..624d718f9f 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -36,6 +36,7 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index ae11a8f5eb..b4e7e9700a 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -39,7 +39,9 @@ CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y + CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_GIGADEVICE=y +-- +2.31.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 68de4bc..0435ff9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -29,6 +29,7 @@ Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +Patch14: 0001-enable-hs400-and-sdma-support.patch BuildRequires: bc BuildRequires: dtc From ae47304273e766105ae3fce64047e0431feb62c1 Mon Sep 17 00:00:00 2001 From: Sahana Prasad Date: Tue, 14 Sep 2021 19:17:15 +0200 Subject: [PATCH 160/351] Rebuilt with OpenSSL 3.0.0 --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 0435ff9..3db95bc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -257,6 +257,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Sep 14 2021 Sahana Prasad - 2021.10-0.6.rc3 +- Rebuilt with OpenSSL 3.0.0 + * Mon Aug 30 2021 Peter Robinson - 2021.10-0.5.rc3 - Update to 2021.10 RC3 From b73fa7b98013a1790d32320bb9dc3090cb40efea Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 16 Sep 2021 12:40:49 +0100 Subject: [PATCH 161/351] 2021.10 RC4, Proposed fix for RPi MMC clock issue --- ...-address-of-the-XHCI-PCI-device-base.patch | 203 ++++++++++++++++ ...cm2835_sdhost-firmware-managed-clock.patch | 228 ++++++++++++++++++ rpi-fallback-to-max-clock-for-mmc.patch | 77 ++++++ uboot-tools.spec | 15 +- 4 files changed, 520 insertions(+), 3 deletions(-) create mode 100644 ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch create mode 100644 rpi-bcm2835_sdhost-firmware-managed-clock.patch create mode 100644 rpi-fallback-to-max-clock-for-mmc.patch diff --git a/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch b/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch new file mode 100644 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Brugger + , Sylwester Nawrocki , Nicolas + Saenz Julienne , Jaehoon Chung + , Bartlomiej Zolnierkiewicz + +Subject: [PATCH] ARM: bcm283x: change the virtual address of the XHCI PCI + device base +Date: Thu, 17 Jun 2021 11:22:03 +0200 +Message-Id: <20210617092203.19825-1-m.szyprowski@samsung.com> +X-Mailer: git-send-email 2.17.1 +X-Brightmail-Tracker: + H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsWy7djPc7r2IqcTDB40GFtsnLGe1eLGrzZW + i7VH7rJbLJj8hNVi26zlbBaH37SzWrzd28nuwO5x9s4ORo++LasYPdZvucrisfl0dQBLFJdN + SmpOZllqkb5dAlfG+eermQqO8lT09y5naWC8xtXFyMkhIWAi0X/mMEsXIxeHkMAKRol9356w + dzFyADlfGCVuhkHEPzNKNNycywLT8G/nNkaIxHJGiaWdm1ghHKCGffe+sYNUsQkYSnS97WID + sUUEJCR+9V8F62AWmMkk0dw5kRUkISwQLvH7/2xGEJtFQFWib/cHsAZeAVuJl+e62SDWyUus + 3nCAGaRZQuAnu8Si7/sYIRIuEo+6V0LZwhKvjm9hh7BlJE5P7mGBaGhmlHh4bi07hNPDKHG5 + aQZUh7XEnXO/2EA+ZRbQlFi/Sx/ElBBwlJg7gR/C5JO48VYQpJgZyJy0bTozRJhXoqNNCGKG + msSs4+vgth68cIkZwvaQuPd4Pdj5QgKxEkcOfWScwCg3C2HVAkbGVYziqaXFuempxcZ5qeV6 + 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discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de +X-Virus-Status: Clean + +Move the XHCI PCI device base up in the virtual address space. This fixes +initialization failure observed with newer Raspberry Pi firmware, later +than 63b1922311 ("firmware: arm_loader: Update armstubs with those from +PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base +conflicts with the updated ARM/VideoCore firmware. + +This also requires to reduce the size of the mapped PCI device region +from 8MiB to 4MiB to fit into 32bit address space. This is still enough +for the XHCI PCI device. + +Signed-off-by: Marek Szyprowski +Reviewed-by: Jaehoon Chung +Reviewed-by: Nicolas Saenz Julienne +Tested-by: Stefan Agner +--- +This fixes the issue observed on ARM 32bit after upgrading the RPi4 +firmware files, described some time ago here: +https://lists.denx.de/pipermail/u-boot/2021-February/442317.html +--- + arch/arm/mach-bcm283x/init.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 49027ce0a2..9803499985 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -14,7 +14,7 @@ + #include + + #define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL +-#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x400000UL + + #ifdef CONFIG_ARM64 + #include +@@ -148,7 +148,7 @@ int mach_cpu_init(void) + + #ifdef CONFIG_ARMV7_LPAE + #ifdef CONFIG_TARGET_RPI_4_32B +-#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xffc00000UL + #include + #include + diff --git a/rpi-bcm2835_sdhost-firmware-managed-clock.patch b/rpi-bcm2835_sdhost-firmware-managed-clock.patch new file mode 100644 index 0000000..d1c60e8 --- /dev/null +++ b/rpi-bcm2835_sdhost-firmware-managed-clock.patch @@ -0,0 +1,228 @@ +From f3a870bfa075fb880f5e018a0a5ae6f27ca8be49 Mon Sep 17 00:00:00 2001 +From: Vincent Fazio +Date: Mon, 13 Sep 2021 13:34:45 -0500 +Subject: [PATCH] mmc: bcm2835-host: let firmware manage the clock + +Newer firmware supports managing the sdhost clock divisor, so leverage +this feature if it is available. + +SET_SDHOST_CLOCK is largely undocumented except for its usage within the +Linux kernel, which this change is based on. + +https://github.com/raspberrypi/linux/commit/3cd16c39c718e2dda7885c4ed7a20118aed12524 + +Signed-off-by: Vincent Fazio +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 18 ++++++++ + arch/arm/mach-bcm283x/include/mach/msg.h | 10 +++++ + arch/arm/mach-bcm283x/msg.c | 30 +++++++++++++ + drivers/mmc/bcm2835_sdhost.c | 53 ++++++++++++++--------- + 4 files changed, 90 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 7dcac583cc4..9b1943fcfc4 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -252,6 +252,24 @@ struct bcm2835_mbox_tag_get_clock_rate { + } body; + }; + ++#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK 0x00038042 ++ ++struct bcm2835_mbox_tag_set_sdhost_clock { ++ struct bcm2835_mbox_tag_hdr tag_hdr; ++ union { ++ struct { ++ u32 rate_hz; ++ u32 rate_1; ++ u32 rate_2; ++ } req; ++ struct { ++ u32 rate_hz; ++ u32 rate_1; ++ u32 rate_2; ++ } resp; ++ } body; ++}; ++ + #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 + + struct bcm2835_mbox_tag_allocate_buffer { +diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h +index e45c1bf010f..ab37abdb6c6 100644 +--- a/arch/arm/mach-bcm283x/include/mach/msg.h ++++ b/arch/arm/mach-bcm283x/include/mach/msg.h +@@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module); + */ + int bcm2835_get_mmc_clock(u32 clock_id); + ++/** ++ * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv ++ * ++ * @rate_hz: Input clock frequency ++ * @rate_1: Returns a clock frequency ++ * @rate_2: Returns a clock frequency ++ * @return 0 of OK, -EIO on error ++ */ ++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2); ++ + /** + * bcm2835_get_video_size() - get the current display size + * +diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c +index e2badfecb09..8c1c36a5f15 100644 +--- a/arch/arm/mach-bcm283x/msg.c ++++ b/arch/arm/mach-bcm283x/msg.c +@@ -21,6 +21,12 @@ struct msg_get_clock_rate { + u32 end_tag; + }; + ++struct msg_set_sdhost_clock { ++ struct bcm2835_mbox_hdr hdr; ++ struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock; ++ u32 end_tag; ++}; ++ + struct msg_query { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_physical_w_h physical_w_h; +@@ -111,6 +117,30 @@ int bcm2835_get_mmc_clock(u32 clock_id) + return clock_rate; + } + ++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2) ++{ ++ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1); ++ int ret; ++ ++ BCM2835_MBOX_INIT_HDR(msg_sdhost_clk); ++ BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK); ++ ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz; ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_1 = *rate_1; ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_2 = *rate_2; ++ ++ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr); ++ if (ret) { ++ printf("bcm2835: Could not query sdhost clock rate\n"); ++ return -EIO; ++ } ++ ++ *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1; ++ *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2; ++ ++ return 0; ++} ++ + int bcm2835_get_video_size(int *widthp, int *heightp) + { + ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1); +diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c +index 894dbdd6861..3a9cd6f1eb2 100644 +--- a/drivers/mmc/bcm2835_sdhost.c ++++ b/drivers/mmc/bcm2835_sdhost.c +@@ -181,6 +181,7 @@ struct bcm2835_host { + struct udevice *dev; + struct mmc *mmc; + struct bcm2835_plat *plat; ++ unsigned int firmware_sets_cdiv:1; + }; + + static void bcm2835_dumpregs(struct bcm2835_host *host) +@@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host) + msleep(20); + host->clock = 0; + writel(host->hcfg, host->ioaddr + SDHCFG); +- writel(host->cdiv, host->ioaddr + SDCDIV); ++ writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV); + } + + static int bcm2835_wait_transfer_complete(struct bcm2835_host *host) +@@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host) + static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + { + int div; ++ u32 clock_rate[2] = { 0 }; + + /* The SDCDIV register has 11 bits, and holds (div - 2). But + * in data mode the max is 50MHz wihout a minimum, and only +@@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + * clock divisor at all times. + */ + +- if (clock < 100000) { +- /* Can't stop the clock, but make it as slow as possible +- * to show willing +- */ +- host->cdiv = SDCDIV_MAX_CDIV; +- writel(host->cdiv, host->ioaddr + SDCDIV); +- return; +- } ++ if (host->firmware_sets_cdiv) { ++ bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]); ++ clock = max(clock_rate[0], clock_rate[1]); ++ } else { ++ if (clock < 100000) { ++ /* Can't stop the clock, but make it as slow as possible ++ * to show willing ++ */ ++ host->cdiv = SDCDIV_MAX_CDIV; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ return; ++ } + +- div = host->max_clk / clock; +- if (div < 2) +- div = 2; +- if ((host->max_clk / div) > clock) +- div++; +- div -= 2; ++ div = host->max_clk / clock; ++ if (div < 2) ++ div = 2; ++ if ((host->max_clk / div) > clock) ++ div++; ++ div -= 2; + +- if (div > SDCDIV_MAX_CDIV) +- div = SDCDIV_MAX_CDIV; ++ if (div > SDCDIV_MAX_CDIV) ++ div = SDCDIV_MAX_CDIV; ++ ++ clock = host->max_clk / (div + 2); ++ host->cdiv = div; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ } + +- clock = host->max_clk / (div + 2); + host->mmc->clock = clock; + + /* Calibrate some delays */ +@@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + host->ns_per_fifo_word = (1000000000 / clock) * + ((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32); + +- host->cdiv = div; +- writel(host->cdiv, host->ioaddr + SDCDIV); +- + /* Set the timeout to 500ms */ + writel(host->mmc->clock / 2, host->ioaddr + SDTOUT); + } +@@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev) + struct bcm2835_host *host = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); ++ u32 clock_rate[2] = { ~0 }; + + host->dev = dev; + host->mmc = mmc; +@@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev) + + host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE); + ++ bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]); ++ host->firmware_sets_cdiv = (clock_rate[0] != ~0); ++ + bcm2835_add_host(host); + + dev_dbg(dev, "%s -> OK\n", __func__); diff --git a/rpi-fallback-to-max-clock-for-mmc.patch b/rpi-fallback-to-max-clock-for-mmc.patch new file mode 100644 index 0000000..81ee372 --- /dev/null +++ b/rpi-fallback-to-max-clock-for-mmc.patch @@ -0,0 +1,77 @@ +From 71ba043e5c5575f3d86536acade70dab6599489b Mon Sep 17 00:00:00 2001 +From: Vincent Fazio +Date: Mon, 13 Sep 2021 11:22:30 -0500 +Subject: [PATCH] arm: rpi: fallback to max clock rate for MMC clock + +In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1 and later, +the GET_CLOCK_RATE mailbox property was changed to return the last +value set by SET_CLOCK_RATE. + +https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502 + +U-Boot does not call SET_CLOCK_RATE so bcm2835_get_mmc_clock will +return zero and can cause degraded MMC performance. + +Calling SET_CLOCK_RATE fixes the frequency of the clock to a specific +value and disables the firmware's clock scaling so is not an option. + +Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if +GET_CLOCK_RATE returns zero. + +Signed-off-by: Vincent Fazio +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 2 ++ + arch/arm/mach-bcm283x/msg.c | 20 +++++++++++++++++++- + 2 files changed, 21 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 2ae2d3d97c3..7dcac583cc4 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -224,6 +224,8 @@ struct bcm2835_mbox_tag_set_power_state { + }; + + #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 ++#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004 ++#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007 + + #define BCM2835_MBOX_CLOCK_ID_EMMC 1 + #define BCM2835_MBOX_CLOCK_ID_UART 2 +diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c +index 347aece3cd8..e2badfecb09 100644 +--- a/arch/arm/mach-bcm283x/msg.c ++++ b/arch/arm/mach-bcm283x/msg.c +@@ -75,6 +75,7 @@ int bcm2835_get_mmc_clock(u32 clock_id) + { + ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1); + int ret; ++ u32 clock_rate = 0; + + ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI); + if (ret) +@@ -90,7 +91,24 @@ int bcm2835_get_mmc_clock(u32 clock_id) + return -EIO; + } + +- return msg_clk->get_clock_rate.body.resp.rate_hz; ++ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; ++ ++ if (clock_rate == 0) ++ { ++ BCM2835_MBOX_INIT_HDR(msg_clk); ++ BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE); ++ msg_clk->get_clock_rate.body.req.clock_id = clock_id; ++ ++ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr); ++ if (ret) { ++ printf("bcm2835: Could not query max eMMC clock rate\n"); ++ return -EIO; ++ } ++ ++ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; ++ } ++ ++ return clock_rate; + } + + int bcm2835_get_video_size(int *widthp, int *heightp) diff --git a/uboot-tools.spec b/uboot-tools.spec index 3db95bc..f1d701b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2021.10 @@ -17,11 +17,13 @@ Source4: aarch64-chromebooks # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +# Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch3: rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch - -# Board fixes and enablement +Patch4: rpi-fallback-to-max-clock-for-mmc.patch +Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch +Patch6: ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes @@ -99,6 +101,9 @@ mkdir builds %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ +# U-Boot device firmwares don't currently support LTO +%define _lto_cflags %{nil} + %ifarch aarch64 %{arm} for board in $(cat %{_arch}-boards) do @@ -257,6 +262,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Sep 15 2021 Peter Robinson - 2021.10-0.6.rc4 +- Update to 2021.10 RC4 +- Proposed fix for RPi MMC clock issue + * Tue Sep 14 2021 Sahana Prasad - 2021.10-0.6.rc3 - Rebuilt with OpenSSL 3.0.0 From 82d32758b4c5a050931a2fa89e31618498dd4745 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 16 Sep 2021 12:44:57 +0100 Subject: [PATCH 162/351] Update sources --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index f1a966e..384045b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc3.tar.bz2) = 8ea85c1d466d7b85e1405bd3c78aefe2b171e5bf443518e0ed78c1fb080a83fd4afda97dd5a0367d4cb2ddb6614f4f41a2c7be7181c99b959c7c0abcdaa3ae18 +SHA512 (u-boot-2021.10-rc4.tar.bz2) = c7b64d3da6407615226820bc217f0d8db6392629c22c966817a6d292f6741ebc5da3e3550e24420e16018931da6b8ab926daf180e94ff3827543285f354b1ea6 From 33afbf3788c96d58ed74610b2f7d2be30dff639f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 4 Oct 2021 08:07:19 +0100 Subject: [PATCH 163/351] 2021.10 RC5 --- ...-address-of-the-XHCI-PCI-device-base.patch | 203 ------------------ ...-from-firmware-dtb-to-the-loaded-dtb.patch | 161 -------------- sources | 2 +- uboot-tools.spec | 13 +- 4 files changed, 8 insertions(+), 371 deletions(-) delete mode 100644 ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch delete mode 100644 rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch diff --git a/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch b/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch deleted file mode 100644 index f4d7d54..0000000 --- a/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch +++ /dev/null @@ -1,203 +0,0 @@ -From patchwork Thu Jun 17 09:22:03 2021 -Content-Type: text/plain; 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- Thu, 17 Jun 2021 09:22:06 +0000 (GMT) -From: Marek Szyprowski -To: u-boot@lists.denx.de -Cc: Marek Szyprowski , Matthias Brugger - , Sylwester Nawrocki , Nicolas - Saenz Julienne , Jaehoon Chung - , Bartlomiej Zolnierkiewicz - -Subject: [PATCH] ARM: bcm283x: change the virtual address of the XHCI PCI - device base -Date: Thu, 17 Jun 2021 11:22:03 +0200 -Message-Id: <20210617092203.19825-1-m.szyprowski@samsung.com> -X-Mailer: git-send-email 2.17.1 -X-Brightmail-Tracker: - H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsWy7djPc7r2IqcTDB40GFtsnLGe1eLGrzZW - i7VH7rJbLJj8hNVi26zlbBaH37SzWrzd28nuwO5x9s4ORo++LasYPdZvucrisfl0dQBLFJdN - SmpOZllqkb5dAlfG+eermQqO8lT09y5naWC8xtXFyMkhIWAi0X/mMEsXIxeHkMAKRol9356w - dzFyADlfGCVuhkHEPzNKNNycywLT8G/nNkaIxHJGiaWdm1ghHKCGffe+sYNUsQkYSnS97WID - sUUEJCR+9V8F62AWmMkk0dw5kRUkISwQLvH7/2xGEJtFQFWib/cHsAZeAVuJl+e62SDWyUus - 3nCAGaRZQuAnu8Si7/sYIRIuEo+6V0LZwhKvjm9hh7BlJE5P7mGBaGhmlHh4bi07hNPDKHG5 - aQZUh7XEnXO/2EA+ZRbQlFi/Sx/ElBBwlJg7gR/C5JO48VYQpJgZyJy0bTozRJhXoqNNCGKG - msSs4+vgth68cIkZwvaQuPd4Pdj5QgKxEkcOfWScwCg3C2HVAkbGVYziqaXFuempxcZ5qeV6 - xYm5xaV56XrJ+bmbGIEJ4PS/4193MK549VHvECMTB+MhRgkOZiURXt3iEwlCvCmJlVWpRfnx - RaU5qcWHGKU5WJTEeXdtXRMvJJCeWJKanZpakFoEk2Xi4JRqYBJge2bX53WWz1Lf4MPq4pKd - L2Z7TUp3VDv2fwfHf6Y2rg5e979vjNICyxdMeW+qc0OHOVT8Q+3kj7qOC66fOsy4xb61uH4h - 951lnRF8exoM9TeGJ715tqduV6XnjaXVPyYtMn03k3MLb92nXs2vNxpuFebsiS62yarPnZ9d - ZPBOU0yvpoR307TFV/niSsVfeYrt4A/k1bB+WKXxd382MxdrGIvDrJUsCSsW7NglYTjXcVbO - 1bzaJ8lfWv7511UuqNvpJJ+093bvgWOlqbeVfjW2v3j+fP79PKeNgUle3dO622YUq2S4Cyh/ - DZbd7mC8SedY8eZZfxdGrozhnGFmGj9nwTKzJQWb562Rl/9prMRSnJFoqMVcVJwIAFvDw65v - AwAA -X-Brightmail-Tracker: - H4sIAAAAAAAAA+NgFtrCLMWRmVeSWpSXmKPExsVy+t/xe7r2IqcTDNb0CFlsnLGe1eLGrzZW - i7VH7rJbLJj8hNVi26zlbBaH37SzWrzd28nuwO5x9s4ORo++LasYPdZvucrisfl0dQBLlJ5N - UX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5dgl7G+eermQqO - 8lT09y5naWC8xtXFyMkhIWAi8W/nNsYuRi4OIYGljBJP/q5gh0jISJyc1sAKYQtL/LnWxQZR - 9IlRYs/8y2AJNgFDia63IAlODhEBCYlf/VfBJjELzGaSeL7iLhNIQlggVOL5jHVgDSwCqhJ9 - uz+ANfAK2Eq8PNfNBrFBXmL1hgPMExh5FjAyrGIUSS0tzk3PLTbUK07MLS7NS9dLzs/dxAgM - vm3Hfm7ewTjv1Ue9Q4xMHIyHGCU4mJVEeHWLTyQI8aYkVlalFuXHF5XmpBYfYjQF2jeRWUo0 - OR8Y/nkl8YZmBqaGJmaWBqaWZsZK4rxb566JFxJITyxJzU5NLUgtgulj4uCUamAyvS18MHIp - 7+EpilHuXy7d3MPzPnfRlSWnFr5+m5lzNSx03owzNw51LmK5Hv4vJ6nPlaHi3Ma1ZubH/23N - uHX0nlWi8bL9jxzLqptsE0+y961tVtRKuvD/QGJR1+3NeoUWKW7rH9pz89YdcnimPGWf7Jb/ - fVnJZ6tdbPuu3nv29sWhteIKixdUX1rlHzUtVfyN0ILXawqfTJU7/SR/jtrSjMpvufKfZKb+ - 3b1sW2hkU2aN9VuDk+52mbFrb3P/1LzhsN309FfG24tY3TjtzFaLf35WI6rUZiAa8lNEtFJE - 1a9l8zLRs3wbm574XwmsP111UPfxm4q0yHKuE6GbZm1T/LfpzOkcP6Yg1r+3Vmy8osRSnJFo - qMVcVJwIAKDUsMjHAgAA -X-CMS-MailID: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 -X-Msg-Generator: CA -X-RootMTR: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 -X-EPHeader: CA -CMS-TYPE: 201P -X-CMS-RootMailID: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 -References: - -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de -X-Virus-Status: Clean - -Move the XHCI PCI device base up in the virtual address space. This fixes -initialization failure observed with newer Raspberry Pi firmware, later -than 63b1922311 ("firmware: arm_loader: Update armstubs with those from -PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base -conflicts with the updated ARM/VideoCore firmware. - -This also requires to reduce the size of the mapped PCI device region -from 8MiB to 4MiB to fit into 32bit address space. This is still enough -for the XHCI PCI device. - -Signed-off-by: Marek Szyprowski -Reviewed-by: Jaehoon Chung -Reviewed-by: Nicolas Saenz Julienne -Tested-by: Stefan Agner ---- -This fixes the issue observed on ARM 32bit after upgrading the RPi4 -firmware files, described some time ago here: -https://lists.denx.de/pipermail/u-boot/2021-February/442317.html ---- - arch/arm/mach-bcm283x/init.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 49027ce0a2..9803499985 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -14,7 +14,7 @@ - #include - - #define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL --#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x400000UL - - #ifdef CONFIG_ARM64 - #include -@@ -148,7 +148,7 @@ int mach_cpu_init(void) - - #ifdef CONFIG_ARMV7_LPAE - #ifdef CONFIG_TARGET_RPI_4_32B --#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL -+#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xffc00000UL - #include - #include - diff --git a/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch b/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch deleted file mode 100644 index e274435..0000000 --- a/rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch +++ /dev/null @@ -1,161 +0,0 @@ -From patchwork Sun Aug 22 14:36:55 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sjoerd Simons -X-Patchwork-Id: 1519427 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4GsydW6ksJz9sW8 - for ; Mon, 23 Aug 2021 00:37:35 +1000 (AEST) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id E456680C87; - Sun, 22 Aug 2021 16:37:28 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=collabora.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 2DF9A80612; Sun, 22 Aug 2021 16:37:03 +0200 (CEST) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, - SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 -Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk - [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id E18A480612 - for ; Sun, 22 Aug 2021 16:36:58 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=collabora.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=sjoerd@collabora.com -Received: from beast.luon.net (unknown - [IPv6:2a00:bba0:114f:8c00:40e2:7ff:fef4:3122]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) (Authenticated sender: sjoerd) - by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 7EB361F42806; - Sun, 22 Aug 2021 15:36:58 +0100 (BST) -Received: by beast.luon.net (Postfix, from userid 1000) - id 3CAF1819617; Sun, 22 Aug 2021 16:36:56 +0200 (CEST) -From: Sjoerd Simons -To: u-boot@lists.denx.de -Cc: Ariel D'Alessandro , - Marek Szyprowski , - Matthias Brugger , - Nicolas Saenz Julienne , - Peter Robinson -Subject: [PATCH] rpi: Copy properties from firmware dtb to the loaded dtb -Date: Sun, 22 Aug 2021 16:36:55 +0200 -Message-Id: <20210822143656.289891-1-sjoerd@collabora.com> -X-Mailer: git-send-email 2.33.0 -MIME-Version: 1.0 -X-Mailman-Approved-At: Sun, 22 Aug 2021 16:37:27 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de -X-Virus-Status: Clean - -The RPI firmware adjusts several property values in the dtb it passes -to u-boot depending on the board/SoC revision. Inherit some of these -when u-boot loads a dtb itself. Specificaly copy: - -* /model: The firmware provides a more specific string -* /memreserve: The firmware defines a reserved range, better keep it -* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as - present on rpi 400 and some rpi 4B boards) has different values for - these then the B0T revision. So these need to be adjusted to boot on - these boards -* blconfig: The firmware defines the memory area where the blconfig - stored. Copy those over so it can be enabled. -* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage - of that. - -Signed-off-by: Sjoerd Simons ---- - - board/raspberrypi/rpi/rpi.c | 47 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 47 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index df52a4689f..d9467f4bda 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -495,8 +495,55 @@ void *board_fdt_blob_setup(void) - return (void *)fw_dtb_pointer; - } - -+int copy_property(void *dst, void *src, char *path, char *property) -+{ -+ int dst_offset, src_offset; -+ const fdt32_t *prop; -+ int len; -+ -+ src_offset = fdt_path_offset(src, path); -+ dst_offset = fdt_path_offset(dst, path); -+ -+ if (src_offset < 0 || dst_offset < 0) -+ return -1; -+ -+ prop = fdt_getprop(src, src_offset, property, &len); -+ if (!prop) -+ return -1; -+ -+ return fdt_setprop(dst, dst_offset, property, prop, len); -+} -+ -+/* Copy tweaks from the firmware dtb to the loaded dtb */ -+void update_fdt_from_fw(void *fdt, void *fw_fdt) -+{ -+ /* Using dtb from firmware directly; leave it alone */ -+ if (fdt == fw_fdt) -+ return; -+ -+ /* The firmware provides a more precie model; so copy that */ -+ copy_property(fdt, fw_fdt, "/", "model"); -+ -+ /* memory reserve as suggested by the firmware */ -+ copy_property(fdt, fw_fdt, "/", "memreserve"); -+ -+ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on -+ * the SoC revision -+ */ -+ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges"); -+ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges"); -+ -+ /* Bootloader configuration template exposes as nvmem */ -+ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0) -+ copy_property(fdt, fw_fdt, "blconfig", "status"); -+ -+ /* kernel address randomisation seed as provided by the firmware */ -+ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); -+} -+ - int ft_board_setup(void *blob, struct bd_info *bd) - { -+ update_fdt_from_fw(blob, (void *)fw_dtb_pointer); - /* - * For now, we simply always add the simplefb DT node. Later, we - * should be more intelligent, and e.g. only do this if no enabled DT diff --git a/sources b/sources index 384045b..a0b423c 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc4.tar.bz2) = c7b64d3da6407615226820bc217f0d8db6392629c22c966817a6d292f6741ebc5da3e3550e24420e16018931da6b8ab926daf180e94ff3827543285f354b1ea6 +SHA512 (u-boot-2021.10-rc5.tar.bz2) = d88193597ff9251f56624b2002a455beb0c51d661f6e5d94d5b0ab28ec1580c7b002e4f6ba6e01535d8531c5ba23ba6bc4eade7ffcabbc5786d20032dc7889ac diff --git a/uboot-tools.spec b/uboot-tools.spec index f1d701b..c0b35c4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2021.10 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,10 +20,8 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch3: rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch -Patch4: rpi-fallback-to-max-clock-for-mmc.patch -Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch -Patch6: ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch +Patch3: rpi-fallback-to-max-clock-for-mmc.patch +Patch4: rpi-bcm2835_sdhost-firmware-managed-clock.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes @@ -262,6 +260,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Sep 27 2021 Peter Robinson - 2021.10-0.7.rc5 +- Update to 2021.10 RC5 + * Wed Sep 15 2021 Peter Robinson - 2021.10-0.6.rc4 - Update to 2021.10 RC4 - Proposed fix for RPi MMC clock issue From 6487c37f16d9a986b98460ab2c7feb3ff41468b7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 4 Oct 2021 18:52:08 +0100 Subject: [PATCH 164/351] 2021.10 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index a0b423c..f64b4ca 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc5.tar.bz2) = d88193597ff9251f56624b2002a455beb0c51d661f6e5d94d5b0ab28ec1580c7b002e4f6ba6e01535d8531c5ba23ba6bc4eade7ffcabbc5786d20032dc7889ac +SHA512 (u-boot-2021.10.tar.bz2) = be5be1c9a54b270307a04177d5577a21c57a02b307bf8b63d0fa2655d1f025c7ce010dca6a1f7f60d4e639c2e6fb6f0a292a2e5d190f1fad478eb12dd786c9da diff --git a/uboot-tools.spec b/uboot-tools.spec index c0b35c4..4a9c8f9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc5 +#global candidate rc5 Name: uboot-tools Version: 2021.10 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -260,6 +260,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Oct 04 2021 Peter Robinson - 2021.10-1 +- Update to 2021.10 + * Mon Sep 27 2021 Peter Robinson - 2021.10-0.7.rc5 - Update to 2021.10 RC5 From 37df227bc0961f9f0dc4dafa9e983290dbdb2bc3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 17 Oct 2021 15:57:39 +0100 Subject: [PATCH 165/351] Fixes for Rockchip devices Fix booting from MMC for Rockchip 3399 (rhbz #2014182) Enable new rk3399 devices (Leez, NanoPi-M4B, NanoPi-4S, NanoPi-T4) (rhbz #2009126) --- ...ockchip_sdhci-Add-support-for-RK3568.patch | 152 +++++++ ...hip_sdhci-add-phy-and-clock-config-f.patch | 406 ++++++++++++++++++ aarch64-boards | 3 + uboot-tools.spec | 10 +- 4 files changed, 569 insertions(+), 2 deletions(-) create mode 100644 0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch create mode 100644 0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch diff --git a/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch b/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch new file mode 100644 index 0000000..33dbf61 --- /dev/null +++ b/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch @@ -0,0 +1,152 @@ +From e3e6018d0b67fbab3d05053688e53f5baac63bc3 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 14 Oct 2021 16:01:56 +0100 +Subject: [PATCH 1/2] Revert "mmc: rockchip_sdhci: Add support for RK3568" + +This reverts commit a63a57e59d864a1ca2b0acb5fadc5c3579c3e79c. +--- + drivers/mmc/rockchip_sdhci.c | 109 ----------------------------------- + 1 file changed, 109 deletions(-) + +diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c +index 1ac00587d4..eff134c8f5 100644 +--- a/drivers/mmc/rockchip_sdhci.c ++++ b/drivers/mmc/rockchip_sdhci.c +@@ -42,34 +42,6 @@ + ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ + PHYCTRL_DLLRDY_DONE) + +-/* Rockchip specific Registers */ +-#define DWCMSHC_EMMC_DLL_CTRL 0x800 +-#define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) +-#define DWCMSHC_EMMC_DLL_RXCLK 0x804 +-#define DWCMSHC_EMMC_DLL_TXCLK 0x808 +-#define DWCMSHC_EMMC_DLL_STRBIN 0x80c +-#define DWCMSHC_EMMC_DLL_STATUS0 0x840 +-#define DWCMSHC_EMMC_DLL_STATUS1 0x844 +-#define DWCMSHC_EMMC_DLL_START BIT(0) +-#define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL 29 +-#define DWCMSHC_EMMC_DLL_START_POINT 16 +-#define DWCMSHC_EMMC_DLL_START_DEFAULT 5 +-#define DWCMSHC_EMMC_DLL_INC_VALUE 2 +-#define DWCMSHC_EMMC_DLL_INC 8 +-#define DWCMSHC_EMMC_DLL_DLYENA BIT(27) +-#define DLL_TXCLK_TAPNUM_DEFAULT 0x10 +-#define DLL_STRBIN_TAPNUM_DEFAULT 0x3 +-#define DLL_TXCLK_TAPNUM_FROM_SW BIT(24) +-#define DWCMSHC_EMMC_DLL_LOCKED BIT(8) +-#define DWCMSHC_EMMC_DLL_TIMEOUT BIT(9) +-#define DLL_RXCLK_NO_INVERTER 1 +-#define DLL_RXCLK_INVERTER 0 +-#define DWCMSHC_ENHANCED_STROBE BIT(8) +-#define DLL_LOCK_WO_TMOUT(x) \ +- ((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \ +- (((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0)) +-#define ROCKCHIP_MAX_CLKS 3 +- + struct rockchip_sdhc_plat { + struct mmc_config cfg; + struct mmc mmc; +@@ -195,77 +167,6 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo + return 0; + } + +-static int rk3568_emmc_phy_init(struct udevice *dev) +-{ +- struct rockchip_sdhc *prv = dev_get_priv(dev); +- struct sdhci_host *host = &prv->host; +- u32 extra; +- +- extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); +- +- return 0; +-} +- +-static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); +- int val, ret; +- u32 extra; +- +- if (clock > host->max_clk) +- clock = host->max_clk; +- if (clock) +- clk_set_rate(&priv->emmc_clk, clock); +- +- sdhci_set_clock(host->mmc, clock); +- +- if (clock >= 100 * MHz) { +- /* reset DLL */ +- sdhci_writel(host, DWCMSHC_EMMC_DLL_CTRL_RESET, DWCMSHC_EMMC_DLL_CTRL); +- udelay(1); +- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); +- +- /* Init DLL settings */ +- extra = DWCMSHC_EMMC_DLL_START_DEFAULT << DWCMSHC_EMMC_DLL_START_POINT | +- DWCMSHC_EMMC_DLL_INC_VALUE << DWCMSHC_EMMC_DLL_INC | +- DWCMSHC_EMMC_DLL_START; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); +- +- ret = read_poll_timeout(readl, host->ioaddr + DWCMSHC_EMMC_DLL_STATUS0, +- val, DLL_LOCK_WO_TMOUT(val), 1, 500); +- if (ret) +- return ret; +- +- extra = DWCMSHC_EMMC_DLL_DLYENA | +- DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); +- +- extra = DWCMSHC_EMMC_DLL_DLYENA | +- DLL_TXCLK_TAPNUM_DEFAULT | +- DLL_TXCLK_TAPNUM_FROM_SW; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); +- +- extra = DWCMSHC_EMMC_DLL_DLYENA | +- DLL_STRBIN_TAPNUM_DEFAULT; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); +- } else { +- /* reset the clock phase when the frequency is lower than 100MHz */ +- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); +- extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; +- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); +- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); +- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN); +- } +- +- return 0; +-} +- +-static int rk3568_emmc_get_phy(struct udevice *dev) +-{ +- return 0; +-} +- + static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) + { + struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); +@@ -438,21 +339,11 @@ static const struct sdhci_data rk3399_data = { + .emmc_phy_init = rk3399_emmc_phy_init, + }; + +-static const struct sdhci_data rk3568_data = { +- .emmc_set_clock = rk3568_sdhci_emmc_set_clock, +- .get_phy = rk3568_emmc_get_phy, +- .emmc_phy_init = rk3568_emmc_phy_init, +-}; +- + static const struct udevice_id sdhci_ids[] = { + { + .compatible = "arasan,sdhci-5.1", + .data = (ulong)&rk3399_data, + }, +- { +- .compatible = "rockchip,rk3568-dwcmshc", +- .data = (ulong)&rk3568_data, +- }, + { } + }; + +-- +2.33.0 + diff --git a/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch b/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch new file mode 100644 index 0000000..20a827c --- /dev/null +++ b/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch @@ -0,0 +1,406 @@ +From bb7b9097efc67ff6051f206e3ac9602dabbfc33e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 14 Oct 2021 16:02:03 +0100 +Subject: [PATCH 2/2] Revert "mmc: rockchip_sdhci: add phy and clock config for + rk3399" + +This reverts commit ac804143cfd128d144403ef2434344988c3fde9f. +--- + drivers/mmc/rockchip_sdhci.c | 313 ++++------------------------------- + 1 file changed, 36 insertions(+), 277 deletions(-) + +diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c +index eff134c8f5..d95f8b2a15 100644 +--- a/drivers/mmc/rockchip_sdhci.c ++++ b/drivers/mmc/rockchip_sdhci.c +@@ -6,322 +6,90 @@ + */ + + #include +-#include + #include +-#include + #include +-#include + #include + #include +-#include + #include + #include +-#include "mmc_private.h" + #include +-#include +-#include +-#include ++#include + + /* 400KHz is max freq for card ID etc. Use that as min */ + #define EMMC_MIN_FREQ 400000 +-#define KHz (1000) +-#define MHz (1000 * KHz) +-#define SDHCI_TUNING_LOOP_COUNT 40 +- +-#define PHYCTRL_CALDONE_MASK 0x1 +-#define PHYCTRL_CALDONE_SHIFT 0x6 +-#define PHYCTRL_CALDONE_DONE 0x1 +-#define PHYCTRL_DLLRDY_MASK 0x1 +-#define PHYCTRL_DLLRDY_SHIFT 0x5 +-#define PHYCTRL_DLLRDY_DONE 0x1 +-#define PHYCTRL_FREQSEL_200M 0x0 +-#define PHYCTRL_FREQSEL_50M 0x1 +-#define PHYCTRL_FREQSEL_100M 0x2 +-#define PHYCTRL_FREQSEL_150M 0x3 +-#define PHYCTRL_DLL_LOCK_WO_TMOUT(x) \ +- ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ +- PHYCTRL_DLLRDY_DONE) + + struct rockchip_sdhc_plat { ++#if CONFIG_IS_ENABLED(OF_PLATDATA) ++ struct dtd_rockchip_rk3399_sdhci_5_1 dtplat; ++#endif + struct mmc_config cfg; + struct mmc mmc; + }; + +-struct rockchip_emmc_phy { +- u32 emmcphy_con[7]; +- u32 reserved; +- u32 emmcphy_status; +-}; +- + struct rockchip_sdhc { + struct sdhci_host host; +- struct udevice *dev; + void *base; +- struct rockchip_emmc_phy *phy; +- struct clk emmc_clk; +-}; +- +-struct sdhci_data { +- int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock); +- int (*emmc_phy_init)(struct udevice *dev); +- int (*get_phy)(struct udevice *dev); +-}; +- +-static int rk3399_emmc_phy_init(struct udevice *dev) +-{ +- return 0; +-} +- +-static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock) +-{ +- u32 caldone, dllrdy, freqsel; +- +- writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]); +- writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]); +- writel(RK_CLRSETBITS(0xf << 7, 6 << 7), &phy->emmcphy_con[0]); +- +- /* +- * According to the user manual, calpad calibration +- * cycle takes more than 2us without the minimal recommended +- * value, so we may need a little margin here +- */ +- udelay(3); +- writel(RK_CLRSETBITS(1, 1), &phy->emmcphy_con[6]); +- +- /* +- * According to the user manual, it asks driver to +- * wait 5us for calpad busy trimming. But it seems that +- * 5us of caldone isn't enough for all cases. +- */ +- udelay(500); +- caldone = readl(&phy->emmcphy_status); +- caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK; +- if (caldone != PHYCTRL_CALDONE_DONE) { +- printf("%s: caldone timeout.\n", __func__); +- return; +- } +- +- /* Set the frequency of the DLL operation */ +- if (clock < 75 * MHz) +- freqsel = PHYCTRL_FREQSEL_50M; +- else if (clock < 125 * MHz) +- freqsel = PHYCTRL_FREQSEL_100M; +- else if (clock < 175 * MHz) +- freqsel = PHYCTRL_FREQSEL_150M; +- else +- freqsel = PHYCTRL_FREQSEL_200M; +- +- /* Set the frequency of the DLL operation */ +- writel(RK_CLRSETBITS(3 << 12, freqsel << 12), &phy->emmcphy_con[0]); +- writel(RK_CLRSETBITS(1 << 1, 1 << 1), &phy->emmcphy_con[6]); +- +- read_poll_timeout(readl, &phy->emmcphy_status, dllrdy, +- PHYCTRL_DLL_LOCK_WO_TMOUT(dllrdy), 1, 5000); +-} +- +-static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy) +-{ +- writel(RK_CLRSETBITS(1, 0), &phy->emmcphy_con[6]); +- writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]); +-} +- +-static int rk3399_emmc_get_phy(struct udevice *dev) +-{ +- struct rockchip_sdhc *priv = dev_get_priv(dev); +- ofnode phy_node; +- void *grf_base; +- u32 grf_phy_offset, phandle; +- +- phandle = dev_read_u32_default(dev, "phys", 0); +- phy_node = ofnode_get_by_phandle(phandle); +- if (!ofnode_valid(phy_node)) { +- debug("Not found emmc phy device\n"); +- return -ENODEV; +- } +- +- grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); +- if (grf_base < 0) { +- printf("%s Get syscon grf failed", __func__); +- return -ENODEV; +- } +- grf_phy_offset = ofnode_read_u32_default(phy_node, "reg", 0); +- +- priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset); +- +- return 0; +-} +- +-static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); +- int cycle_phy = host->clock != clock && clock > EMMC_MIN_FREQ; +- +- if (cycle_phy) +- rk3399_emmc_phy_power_off(priv->phy); +- +- sdhci_set_clock(host->mmc, clock); +- +- if (cycle_phy) +- rk3399_emmc_phy_power_on(priv->phy, clock); +- +- return 0; +-} +- +-static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) +-{ +- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); +- struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev); +- struct mmc *mmc = host->mmc; +- uint clock = mmc->tran_speed; +- u32 reg; +- +- if (!clock) +- clock = mmc->clock; +- +- if (data->emmc_set_clock) +- data->emmc_set_clock(host, clock); +- +- if (mmc->selected_mode == MMC_HS_400 || mmc->selected_mode == MMC_HS_400_ES) { +- reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); +- reg &= ~SDHCI_CTRL_UHS_MASK; +- reg |= SDHCI_CTRL_HS400; +- sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); +- } else { +- sdhci_set_uhs_timing(host); +- } +- +- return 0; +-} +- +-static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) +-{ +- struct sdhci_host *host = dev_get_priv(mmc->dev); +- char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; +- struct mmc_cmd cmd; +- u32 ctrl, blk_size; +- int ret = 0; +- +- ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); +- ctrl |= SDHCI_CTRL_EXEC_TUNING; +- sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); +- +- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); +- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); +- +- blk_size = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64); +- if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && host->mmc->bus_width == 8) +- blk_size = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128); +- sdhci_writew(host, blk_size, SDHCI_BLOCK_SIZE); +- sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); +- +- cmd.cmdidx = opcode; +- cmd.resp_type = MMC_RSP_R1; +- cmd.cmdarg = 0; +- +- do { +- if (tuning_loop_counter-- == 0) +- break; +- +- mmc_send_cmd(mmc, &cmd, NULL); +- +- if (opcode == MMC_CMD_SEND_TUNING_BLOCK) +- /* +- * For tuning command, do not do busy loop. As tuning +- * is happening (CLK-DATA latching for setup/hold time +- * requirements), give time to complete +- */ +- udelay(1); +- +- ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); +- } while (ctrl & SDHCI_CTRL_EXEC_TUNING); +- +- if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { +- printf("%s:Tuning failed\n", __func__); +- ret = -EIO; +- } +- +- if (tuning_loop_counter < 0) { +- ctrl &= ~SDHCI_CTRL_TUNED_CLK; +- sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2); +- } +- +- /* Enable only interrupts served by the SD controller */ +- sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, SDHCI_INT_ENABLE); +- /* Mask all sdhci interrupt sources */ +- sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE); +- +- return ret; +-} +- +-static struct sdhci_ops rockchip_sdhci_ops = { +- .set_ios_post = rockchip_sdhci_set_ios_post, +- .platform_execute_tuning = &rockchip_sdhci_execute_tuning, + }; + +-static int rockchip_sdhci_probe(struct udevice *dev) ++static int arasan_sdhci_probe(struct udevice *dev) + { +- struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct rockchip_sdhc_plat *plat = dev_get_plat(dev); + struct rockchip_sdhc *prv = dev_get_priv(dev); +- struct mmc_config *cfg = &plat->cfg; + struct sdhci_host *host = &prv->host; ++ int max_frequency, ret; + struct clk clk; +- int ret; + +- host->max_clk = cfg->f_max; ++#if CONFIG_IS_ENABLED(OF_PLATDATA) ++ struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat; ++ ++ host->name = dev->name; ++ host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); ++ max_frequency = dtplat->max_frequency; ++ ret = clk_get_by_driver_info(dev, dtplat->clocks, &clk); ++#else ++ max_frequency = dev_read_u32_default(dev, "max-frequency", 0); + ret = clk_get_by_index(dev, 0, &clk); ++#endif + if (!ret) { +- ret = clk_set_rate(&clk, host->max_clk); ++ ret = clk_set_rate(&clk, max_frequency); + if (IS_ERR_VALUE(ret)) + printf("%s clk set rate fail!\n", __func__); + } else { + printf("%s fail to get clk\n", __func__); + } + +- prv->emmc_clk = clk; +- prv->dev = dev; +- +- if (data->get_phy) { +- ret = data->get_phy(dev); +- if (ret) +- return ret; +- } +- +- if (data->emmc_phy_init) { +- ret = data->emmc_phy_init(dev); +- if (ret) +- return ret; +- } +- +- host->ops = &rockchip_sdhci_ops; + host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; ++ host->max_clk = max_frequency; ++ /* ++ * The sdhci-driver only supports 4bit and 8bit, as sdhci_setup_cfg ++ * doesn't allow us to clear MMC_MODE_4BIT. Consequently, we don't ++ * check for other bus-width values. ++ */ ++ if (host->bus_width == 8) ++ host->host_caps |= MMC_MODE_8BIT; + + host->mmc = &plat->mmc; + host->mmc->priv = &prv->host; + host->mmc->dev = dev; + upriv->mmc = host->mmc; + +- ret = sdhci_setup_cfg(cfg, host, cfg->f_max, EMMC_MIN_FREQ); ++ ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ); + if (ret) + return ret; + + return sdhci_probe(dev); + } + +-static int rockchip_sdhci_of_to_plat(struct udevice *dev) ++static int arasan_sdhci_of_to_plat(struct udevice *dev) + { +- struct rockchip_sdhc_plat *plat = dev_get_plat(dev); ++#if !CONFIG_IS_ENABLED(OF_PLATDATA) + struct sdhci_host *host = dev_get_priv(dev); +- struct mmc_config *cfg = &plat->cfg; +- int ret; + + host->name = dev->name; + host->ioaddr = dev_read_addr_ptr(dev); +- +- ret = mmc_of_parse(dev, cfg); +- if (ret) +- return ret; ++ host->bus_width = dev_read_u32_default(dev, "bus-width", 4); ++#endif + + return 0; + } +@@ -333,28 +101,19 @@ static int rockchip_sdhci_bind(struct udevice *dev) + return sdhci_bind(dev, &plat->mmc, &plat->cfg); + } + +-static const struct sdhci_data rk3399_data = { +- .emmc_set_clock = rk3399_sdhci_emmc_set_clock, +- .get_phy = rk3399_emmc_get_phy, +- .emmc_phy_init = rk3399_emmc_phy_init, +-}; +- +-static const struct udevice_id sdhci_ids[] = { +- { +- .compatible = "arasan,sdhci-5.1", +- .data = (ulong)&rk3399_data, +- }, ++static const struct udevice_id arasan_sdhci_ids[] = { ++ { .compatible = "arasan,sdhci-5.1" }, + { } + }; + + U_BOOT_DRIVER(arasan_sdhci_drv) = { +- .name = "rockchip_sdhci_5_1", ++ .name = "rockchip_rk3399_sdhci_5_1", + .id = UCLASS_MMC, +- .of_match = sdhci_ids, +- .of_to_plat = rockchip_sdhci_of_to_plat, ++ .of_match = arasan_sdhci_ids, ++ .of_to_plat = arasan_sdhci_of_to_plat, + .ops = &sdhci_ops, + .bind = rockchip_sdhci_bind, +- .probe = rockchip_sdhci_probe, ++ .probe = arasan_sdhci_probe, + .priv_auto = sizeof(struct rockchip_sdhc), + .plat_auto = sizeof(struct rockchip_sdhc_plat), + }; +-- +2.33.0 + diff --git a/aarch64-boards b/aarch64-boards index 15abee1..9e2fafa 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -18,6 +18,7 @@ khadas-vim khadas-vim2 khadas-vim3 khadas-vim3l +leez-rk3399 libretech-ac libretech_all_h3_cc_h5 libretech_all_h3_it_h5 @@ -29,11 +30,13 @@ nanopc-t4-rk3399 nanopi_a64 nanopi-k2 nanopi-m4-2gb-rk3399 +nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 nanopi-r2s-rk3328 +nanopi-r4s-rk3399 odroid-c2 orangepi_3 orangepi_lite2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 4a9c8f9..d3c5b0c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.10 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -30,6 +30,8 @@ Patch11: 0001-Fix-BeagleAI-detection.patch Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch Patch14: 0001-enable-hs400-and-sdma-support.patch +Patch15: 0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch +Patch16: 0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch BuildRequires: bc BuildRequires: dtc @@ -124,7 +126,7 @@ do echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -260,6 +262,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Oct 14 2021 Peter Robinson - 2021.10-2 +- Fix booting from MMC for Rockchip 3399 (rhbz #2014182) +- Enable new rk3399 devices (Leez, NanoPi-M4B, NanoPi-4S, NanoPi-T4) (rhbz #2009126) + * Mon Oct 04 2021 Peter Robinson - 2021.10-1 - Update to 2021.10 From e708510df15ea218dc931bf71d0a1ca7bdf78b2c Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 27 Oct 2021 13:29:32 +0200 Subject: [PATCH 166/351] Drop vboot-utils build dependency The package contains tools to build and sign FIT (Flat Image Tree) images that are used in u-boot based Chromebooks. But it isn't really needded to build u-boot, since FIT images are not shipped in uboot-images-armv{7,8}. Also, the vboot-utils package has as build dependency the trousers-devel package and this gets pulled as a dependency to build u-boot as well. But the trousers package is really deprecated since TPM 1.2 chips aren't used anymore nowadays. Let's just drop that unneeded build dependency. --- uboot-tools.spec | 3 --- 1 file changed, 3 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index d3c5b0c..11083e7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -55,9 +55,6 @@ BuildRequires: flex bison BuildRequires: openssl-devel BuildRequires: SDL-devel BuildRequires: swig -%ifarch %{arm} aarch64 -BuildRequires: vboot-utils -%endif %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 %endif From 684d5792496141406e93b7cb7f0b8d0dced4131a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Oct 2021 13:43:20 +0100 Subject: [PATCH 167/351] Drop any vestigate of an idea we build U-Boot for Chromebooks, if someone gets the time it can be added back --- aarch64-chromebooks | 0 arm-chromebooks | 8 -------- uboot-tools.spec | 9 +++------ 3 files changed, 3 insertions(+), 14 deletions(-) delete mode 100644 aarch64-chromebooks delete mode 100644 arm-chromebooks diff --git a/aarch64-chromebooks b/aarch64-chromebooks deleted file mode 100644 index e69de29..0000000 diff --git a/arm-chromebooks b/arm-chromebooks deleted file mode 100644 index 899c823..0000000 --- a/arm-chromebooks +++ /dev/null @@ -1,8 +0,0 @@ -chromebit_mickey_defconfig -chromebook_jerry_defconfig -chromebook_minnie_defconfig -nyan-big_defconfig -peach-pi_defconfig -peach-pit_defconfig -snow_defconfig -spring_defconfig diff --git a/uboot-tools.spec b/uboot-tools.spec index 11083e7..bff1088 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -10,9 +10,7 @@ URL: http://www.denx.de/wiki/U-Boot ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: arm-boards -Source2: arm-chromebooks -Source3: aarch64-boards -Source4: aarch64-chromebooks +Source2: aarch64-boards # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition @@ -85,7 +83,7 @@ U-Boot firmware binaries for armv7 boards %prep %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}} -cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 . +cp %SOURCE1 %SOURCE2 . %build mkdir builds @@ -242,8 +240,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %files %doc README doc/README.kwbimage doc/README.distro doc/README.gpt %doc doc/README.odroid doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst -%doc doc/chromium builds/docs/* -%doc doc/board/amlogic/ doc/board/rockchip/ +%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ From 9eb973e7d2ab74341c0eb7312576b6f016ec03d4 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 15 Nov 2021 18:24:46 +0000 Subject: [PATCH 168/351] upstream rk3399 MMC fix, build against new ATF for rk3399 suspend fix --- ...ockchip_sdhci-Add-support-for-RK3568.patch | 152 ------- ...hip_sdhci-add-phy-and-clock-config-f.patch | 406 ------------------ ...kchip-rk3399-enable-emmc-phy-for-spl.patch | 115 +++++ uboot-tools.spec | 8 +- 4 files changed, 120 insertions(+), 561 deletions(-) delete mode 100644 0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch delete mode 100644 0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch create mode 100644 dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch diff --git a/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch b/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch deleted file mode 100644 index 33dbf61..0000000 --- a/0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch +++ /dev/null @@ -1,152 +0,0 @@ -From e3e6018d0b67fbab3d05053688e53f5baac63bc3 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 14 Oct 2021 16:01:56 +0100 -Subject: [PATCH 1/2] Revert "mmc: rockchip_sdhci: Add support for RK3568" - -This reverts commit a63a57e59d864a1ca2b0acb5fadc5c3579c3e79c. ---- - drivers/mmc/rockchip_sdhci.c | 109 ----------------------------------- - 1 file changed, 109 deletions(-) - -diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c -index 1ac00587d4..eff134c8f5 100644 ---- a/drivers/mmc/rockchip_sdhci.c -+++ b/drivers/mmc/rockchip_sdhci.c -@@ -42,34 +42,6 @@ - ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ - PHYCTRL_DLLRDY_DONE) - --/* Rockchip specific Registers */ --#define DWCMSHC_EMMC_DLL_CTRL 0x800 --#define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) --#define DWCMSHC_EMMC_DLL_RXCLK 0x804 --#define DWCMSHC_EMMC_DLL_TXCLK 0x808 --#define DWCMSHC_EMMC_DLL_STRBIN 0x80c --#define DWCMSHC_EMMC_DLL_STATUS0 0x840 --#define DWCMSHC_EMMC_DLL_STATUS1 0x844 --#define DWCMSHC_EMMC_DLL_START BIT(0) --#define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL 29 --#define DWCMSHC_EMMC_DLL_START_POINT 16 --#define DWCMSHC_EMMC_DLL_START_DEFAULT 5 --#define DWCMSHC_EMMC_DLL_INC_VALUE 2 --#define DWCMSHC_EMMC_DLL_INC 8 --#define DWCMSHC_EMMC_DLL_DLYENA BIT(27) --#define DLL_TXCLK_TAPNUM_DEFAULT 0x10 --#define DLL_STRBIN_TAPNUM_DEFAULT 0x3 --#define DLL_TXCLK_TAPNUM_FROM_SW BIT(24) --#define DWCMSHC_EMMC_DLL_LOCKED BIT(8) --#define DWCMSHC_EMMC_DLL_TIMEOUT BIT(9) --#define DLL_RXCLK_NO_INVERTER 1 --#define DLL_RXCLK_INVERTER 0 --#define DWCMSHC_ENHANCED_STROBE BIT(8) --#define DLL_LOCK_WO_TMOUT(x) \ -- ((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \ -- (((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0)) --#define ROCKCHIP_MAX_CLKS 3 -- - struct rockchip_sdhc_plat { - struct mmc_config cfg; - struct mmc mmc; -@@ -195,77 +167,6 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo - return 0; - } - --static int rk3568_emmc_phy_init(struct udevice *dev) --{ -- struct rockchip_sdhc *prv = dev_get_priv(dev); -- struct sdhci_host *host = &prv->host; -- u32 extra; -- -- extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); -- -- return 0; --} -- --static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) --{ -- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); -- int val, ret; -- u32 extra; -- -- if (clock > host->max_clk) -- clock = host->max_clk; -- if (clock) -- clk_set_rate(&priv->emmc_clk, clock); -- -- sdhci_set_clock(host->mmc, clock); -- -- if (clock >= 100 * MHz) { -- /* reset DLL */ -- sdhci_writel(host, DWCMSHC_EMMC_DLL_CTRL_RESET, DWCMSHC_EMMC_DLL_CTRL); -- udelay(1); -- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); -- -- /* Init DLL settings */ -- extra = DWCMSHC_EMMC_DLL_START_DEFAULT << DWCMSHC_EMMC_DLL_START_POINT | -- DWCMSHC_EMMC_DLL_INC_VALUE << DWCMSHC_EMMC_DLL_INC | -- DWCMSHC_EMMC_DLL_START; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); -- -- ret = read_poll_timeout(readl, host->ioaddr + DWCMSHC_EMMC_DLL_STATUS0, -- val, DLL_LOCK_WO_TMOUT(val), 1, 500); -- if (ret) -- return ret; -- -- extra = DWCMSHC_EMMC_DLL_DLYENA | -- DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); -- -- extra = DWCMSHC_EMMC_DLL_DLYENA | -- DLL_TXCLK_TAPNUM_DEFAULT | -- DLL_TXCLK_TAPNUM_FROM_SW; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); -- -- extra = DWCMSHC_EMMC_DLL_DLYENA | -- DLL_STRBIN_TAPNUM_DEFAULT; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); -- } else { -- /* reset the clock phase when the frequency is lower than 100MHz */ -- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); -- extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; -- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); -- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); -- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN); -- } -- -- return 0; --} -- --static int rk3568_emmc_get_phy(struct udevice *dev) --{ -- return 0; --} -- - static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) - { - struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); -@@ -438,21 +339,11 @@ static const struct sdhci_data rk3399_data = { - .emmc_phy_init = rk3399_emmc_phy_init, - }; - --static const struct sdhci_data rk3568_data = { -- .emmc_set_clock = rk3568_sdhci_emmc_set_clock, -- .get_phy = rk3568_emmc_get_phy, -- .emmc_phy_init = rk3568_emmc_phy_init, --}; -- - static const struct udevice_id sdhci_ids[] = { - { - .compatible = "arasan,sdhci-5.1", - .data = (ulong)&rk3399_data, - }, -- { -- .compatible = "rockchip,rk3568-dwcmshc", -- .data = (ulong)&rk3568_data, -- }, - { } - }; - --- -2.33.0 - diff --git a/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch b/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch deleted file mode 100644 index 20a827c..0000000 --- a/0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch +++ /dev/null @@ -1,406 +0,0 @@ -From bb7b9097efc67ff6051f206e3ac9602dabbfc33e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 14 Oct 2021 16:02:03 +0100 -Subject: [PATCH 2/2] Revert "mmc: rockchip_sdhci: add phy and clock config for - rk3399" - -This reverts commit ac804143cfd128d144403ef2434344988c3fde9f. ---- - drivers/mmc/rockchip_sdhci.c | 313 ++++------------------------------- - 1 file changed, 36 insertions(+), 277 deletions(-) - -diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c -index eff134c8f5..d95f8b2a15 100644 ---- a/drivers/mmc/rockchip_sdhci.c -+++ b/drivers/mmc/rockchip_sdhci.c -@@ -6,322 +6,90 @@ - */ - - #include --#include - #include --#include - #include --#include - #include - #include --#include - #include - #include --#include "mmc_private.h" - #include --#include --#include --#include -+#include - - /* 400KHz is max freq for card ID etc. Use that as min */ - #define EMMC_MIN_FREQ 400000 --#define KHz (1000) --#define MHz (1000 * KHz) --#define SDHCI_TUNING_LOOP_COUNT 40 -- --#define PHYCTRL_CALDONE_MASK 0x1 --#define PHYCTRL_CALDONE_SHIFT 0x6 --#define PHYCTRL_CALDONE_DONE 0x1 --#define PHYCTRL_DLLRDY_MASK 0x1 --#define PHYCTRL_DLLRDY_SHIFT 0x5 --#define PHYCTRL_DLLRDY_DONE 0x1 --#define PHYCTRL_FREQSEL_200M 0x0 --#define PHYCTRL_FREQSEL_50M 0x1 --#define PHYCTRL_FREQSEL_100M 0x2 --#define PHYCTRL_FREQSEL_150M 0x3 --#define PHYCTRL_DLL_LOCK_WO_TMOUT(x) \ -- ((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\ -- PHYCTRL_DLLRDY_DONE) - - struct rockchip_sdhc_plat { -+#if CONFIG_IS_ENABLED(OF_PLATDATA) -+ struct dtd_rockchip_rk3399_sdhci_5_1 dtplat; -+#endif - struct mmc_config cfg; - struct mmc mmc; - }; - --struct rockchip_emmc_phy { -- u32 emmcphy_con[7]; -- u32 reserved; -- u32 emmcphy_status; --}; -- - struct rockchip_sdhc { - struct sdhci_host host; -- struct udevice *dev; - void *base; -- struct rockchip_emmc_phy *phy; -- struct clk emmc_clk; --}; -- --struct sdhci_data { -- int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock); -- int (*emmc_phy_init)(struct udevice *dev); -- int (*get_phy)(struct udevice *dev); --}; -- --static int rk3399_emmc_phy_init(struct udevice *dev) --{ -- return 0; --} -- --static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock) --{ -- u32 caldone, dllrdy, freqsel; -- -- writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]); -- writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]); -- writel(RK_CLRSETBITS(0xf << 7, 6 << 7), &phy->emmcphy_con[0]); -- -- /* -- * According to the user manual, calpad calibration -- * cycle takes more than 2us without the minimal recommended -- * value, so we may need a little margin here -- */ -- udelay(3); -- writel(RK_CLRSETBITS(1, 1), &phy->emmcphy_con[6]); -- -- /* -- * According to the user manual, it asks driver to -- * wait 5us for calpad busy trimming. But it seems that -- * 5us of caldone isn't enough for all cases. -- */ -- udelay(500); -- caldone = readl(&phy->emmcphy_status); -- caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK; -- if (caldone != PHYCTRL_CALDONE_DONE) { -- printf("%s: caldone timeout.\n", __func__); -- return; -- } -- -- /* Set the frequency of the DLL operation */ -- if (clock < 75 * MHz) -- freqsel = PHYCTRL_FREQSEL_50M; -- else if (clock < 125 * MHz) -- freqsel = PHYCTRL_FREQSEL_100M; -- else if (clock < 175 * MHz) -- freqsel = PHYCTRL_FREQSEL_150M; -- else -- freqsel = PHYCTRL_FREQSEL_200M; -- -- /* Set the frequency of the DLL operation */ -- writel(RK_CLRSETBITS(3 << 12, freqsel << 12), &phy->emmcphy_con[0]); -- writel(RK_CLRSETBITS(1 << 1, 1 << 1), &phy->emmcphy_con[6]); -- -- read_poll_timeout(readl, &phy->emmcphy_status, dllrdy, -- PHYCTRL_DLL_LOCK_WO_TMOUT(dllrdy), 1, 5000); --} -- --static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy) --{ -- writel(RK_CLRSETBITS(1, 0), &phy->emmcphy_con[6]); -- writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]); --} -- --static int rk3399_emmc_get_phy(struct udevice *dev) --{ -- struct rockchip_sdhc *priv = dev_get_priv(dev); -- ofnode phy_node; -- void *grf_base; -- u32 grf_phy_offset, phandle; -- -- phandle = dev_read_u32_default(dev, "phys", 0); -- phy_node = ofnode_get_by_phandle(phandle); -- if (!ofnode_valid(phy_node)) { -- debug("Not found emmc phy device\n"); -- return -ENODEV; -- } -- -- grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); -- if (grf_base < 0) { -- printf("%s Get syscon grf failed", __func__); -- return -ENODEV; -- } -- grf_phy_offset = ofnode_read_u32_default(phy_node, "reg", 0); -- -- priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset); -- -- return 0; --} -- --static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) --{ -- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); -- int cycle_phy = host->clock != clock && clock > EMMC_MIN_FREQ; -- -- if (cycle_phy) -- rk3399_emmc_phy_power_off(priv->phy); -- -- sdhci_set_clock(host->mmc, clock); -- -- if (cycle_phy) -- rk3399_emmc_phy_power_on(priv->phy, clock); -- -- return 0; --} -- --static int rockchip_sdhci_set_ios_post(struct sdhci_host *host) --{ -- struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host); -- struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev); -- struct mmc *mmc = host->mmc; -- uint clock = mmc->tran_speed; -- u32 reg; -- -- if (!clock) -- clock = mmc->clock; -- -- if (data->emmc_set_clock) -- data->emmc_set_clock(host, clock); -- -- if (mmc->selected_mode == MMC_HS_400 || mmc->selected_mode == MMC_HS_400_ES) { -- reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); -- reg &= ~SDHCI_CTRL_UHS_MASK; -- reg |= SDHCI_CTRL_HS400; -- sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); -- } else { -- sdhci_set_uhs_timing(host); -- } -- -- return 0; --} -- --static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) --{ -- struct sdhci_host *host = dev_get_priv(mmc->dev); -- char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; -- struct mmc_cmd cmd; -- u32 ctrl, blk_size; -- int ret = 0; -- -- ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); -- ctrl |= SDHCI_CTRL_EXEC_TUNING; -- sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); -- -- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); -- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); -- -- blk_size = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64); -- if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && host->mmc->bus_width == 8) -- blk_size = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128); -- sdhci_writew(host, blk_size, SDHCI_BLOCK_SIZE); -- sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); -- -- cmd.cmdidx = opcode; -- cmd.resp_type = MMC_RSP_R1; -- cmd.cmdarg = 0; -- -- do { -- if (tuning_loop_counter-- == 0) -- break; -- -- mmc_send_cmd(mmc, &cmd, NULL); -- -- if (opcode == MMC_CMD_SEND_TUNING_BLOCK) -- /* -- * For tuning command, do not do busy loop. As tuning -- * is happening (CLK-DATA latching for setup/hold time -- * requirements), give time to complete -- */ -- udelay(1); -- -- ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); -- } while (ctrl & SDHCI_CTRL_EXEC_TUNING); -- -- if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { -- printf("%s:Tuning failed\n", __func__); -- ret = -EIO; -- } -- -- if (tuning_loop_counter < 0) { -- ctrl &= ~SDHCI_CTRL_TUNED_CLK; -- sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2); -- } -- -- /* Enable only interrupts served by the SD controller */ -- sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, SDHCI_INT_ENABLE); -- /* Mask all sdhci interrupt sources */ -- sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE); -- -- return ret; --} -- --static struct sdhci_ops rockchip_sdhci_ops = { -- .set_ios_post = rockchip_sdhci_set_ios_post, -- .platform_execute_tuning = &rockchip_sdhci_execute_tuning, - }; - --static int rockchip_sdhci_probe(struct udevice *dev) -+static int arasan_sdhci_probe(struct udevice *dev) - { -- struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(dev); - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct rockchip_sdhc_plat *plat = dev_get_plat(dev); - struct rockchip_sdhc *prv = dev_get_priv(dev); -- struct mmc_config *cfg = &plat->cfg; - struct sdhci_host *host = &prv->host; -+ int max_frequency, ret; - struct clk clk; -- int ret; - -- host->max_clk = cfg->f_max; -+#if CONFIG_IS_ENABLED(OF_PLATDATA) -+ struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat; -+ -+ host->name = dev->name; -+ host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); -+ max_frequency = dtplat->max_frequency; -+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &clk); -+#else -+ max_frequency = dev_read_u32_default(dev, "max-frequency", 0); - ret = clk_get_by_index(dev, 0, &clk); -+#endif - if (!ret) { -- ret = clk_set_rate(&clk, host->max_clk); -+ ret = clk_set_rate(&clk, max_frequency); - if (IS_ERR_VALUE(ret)) - printf("%s clk set rate fail!\n", __func__); - } else { - printf("%s fail to get clk\n", __func__); - } - -- prv->emmc_clk = clk; -- prv->dev = dev; -- -- if (data->get_phy) { -- ret = data->get_phy(dev); -- if (ret) -- return ret; -- } -- -- if (data->emmc_phy_init) { -- ret = data->emmc_phy_init(dev); -- if (ret) -- return ret; -- } -- -- host->ops = &rockchip_sdhci_ops; - host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; -+ host->max_clk = max_frequency; -+ /* -+ * The sdhci-driver only supports 4bit and 8bit, as sdhci_setup_cfg -+ * doesn't allow us to clear MMC_MODE_4BIT. Consequently, we don't -+ * check for other bus-width values. -+ */ -+ if (host->bus_width == 8) -+ host->host_caps |= MMC_MODE_8BIT; - - host->mmc = &plat->mmc; - host->mmc->priv = &prv->host; - host->mmc->dev = dev; - upriv->mmc = host->mmc; - -- ret = sdhci_setup_cfg(cfg, host, cfg->f_max, EMMC_MIN_FREQ); -+ ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ); - if (ret) - return ret; - - return sdhci_probe(dev); - } - --static int rockchip_sdhci_of_to_plat(struct udevice *dev) -+static int arasan_sdhci_of_to_plat(struct udevice *dev) - { -- struct rockchip_sdhc_plat *plat = dev_get_plat(dev); -+#if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct sdhci_host *host = dev_get_priv(dev); -- struct mmc_config *cfg = &plat->cfg; -- int ret; - - host->name = dev->name; - host->ioaddr = dev_read_addr_ptr(dev); -- -- ret = mmc_of_parse(dev, cfg); -- if (ret) -- return ret; -+ host->bus_width = dev_read_u32_default(dev, "bus-width", 4); -+#endif - - return 0; - } -@@ -333,28 +101,19 @@ static int rockchip_sdhci_bind(struct udevice *dev) - return sdhci_bind(dev, &plat->mmc, &plat->cfg); - } - --static const struct sdhci_data rk3399_data = { -- .emmc_set_clock = rk3399_sdhci_emmc_set_clock, -- .get_phy = rk3399_emmc_get_phy, -- .emmc_phy_init = rk3399_emmc_phy_init, --}; -- --static const struct udevice_id sdhci_ids[] = { -- { -- .compatible = "arasan,sdhci-5.1", -- .data = (ulong)&rk3399_data, -- }, -+static const struct udevice_id arasan_sdhci_ids[] = { -+ { .compatible = "arasan,sdhci-5.1" }, - { } - }; - - U_BOOT_DRIVER(arasan_sdhci_drv) = { -- .name = "rockchip_sdhci_5_1", -+ .name = "rockchip_rk3399_sdhci_5_1", - .id = UCLASS_MMC, -- .of_match = sdhci_ids, -- .of_to_plat = rockchip_sdhci_of_to_plat, -+ .of_match = arasan_sdhci_ids, -+ .of_to_plat = arasan_sdhci_of_to_plat, - .ops = &sdhci_ops, - .bind = rockchip_sdhci_bind, -- .probe = rockchip_sdhci_probe, -+ .probe = arasan_sdhci_probe, - .priv_auto = sizeof(struct rockchip_sdhc), - .plat_auto = sizeof(struct rockchip_sdhc_plat), - }; --- -2.33.0 - diff --git a/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch b/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch new file mode 100644 index 0000000..3ef5b53 --- /dev/null +++ b/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch @@ -0,0 +1,115 @@ +From patchwork Mon Nov 1 04:43:47 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Yifeng Zhao +X-Patchwork-Id: 1548950 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No 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+X-ATTACHMENT-NUM: 0 +X-UNIQUE-TAG: <8beb59827f65d556787d36e0068aa9cb> +X-System-Flag: 0 +From: Yifeng Zhao +To: Kever Yang +Cc: sjg , Peter Robinson , + Philipp Tomsich , + u-boot@lists.denx.de, Jack Mitchell , + Yifeng Zhao +Subject: [PATCH] dts: rockchip: rk3399: enable emmc phy for spl +Date: Mon, 1 Nov 2021 12:43:47 +0800 +Message-Id: <20211101044347.17822-1-yifeng.zhao@rock-chips.com> +X-Mailer: git-send-email 2.17.1 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de +X-Virus-Status: Clean + +adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock +config for rk3399") to fix the issue "Not found emmc phy device". + +Signed-off-by: Yifeng Zhao +--- + + arch/arm/dts/rk3399-u-boot.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi +index 73922c328a..716b9a433a 100644 +--- a/arch/arm/dts/rk3399-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-u-boot.dtsi +@@ -88,6 +88,10 @@ + u-boot,dm-pre-reloc; + }; + ++&emmc_phy { ++ u-boot,dm-pre-reloc; ++}; ++ + &grf { + u-boot,dm-pre-reloc; + }; diff --git a/uboot-tools.spec b/uboot-tools.spec index bff1088..d77e112 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2021.10 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -28,8 +28,7 @@ Patch11: 0001-Fix-BeagleAI-detection.patch Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch Patch13: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch Patch14: 0001-enable-hs400-and-sdma-support.patch -Patch15: 0001-Revert-mmc-rockchip_sdhci-Add-support-for-RK3568.patch -Patch16: 0002-Revert-mmc-rockchip_sdhci-add-phy-and-clock-config-f.patch +Patch15: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch BuildRequires: bc BuildRequires: dtc @@ -256,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Nov 15 2021 Peter Robinson - 2021.10-3 +- Fixes for rk3399 devices + * Thu Oct 14 2021 Peter Robinson - 2021.10-2 - Fix booting from MMC for Rockchip 3399 (rhbz #2014182) - Enable new rk3399 devices (Leez, NanoPi-M4B, NanoPi-4S, NanoPi-T4) (rhbz #2009126) From 89bd41507ecefd2f18fdfc7cc8d2993a7c24b772 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 15 Nov 2021 21:11:49 +0000 Subject: [PATCH 169/351] 2022.01 RC2 --- AllWinner-PineTab.patch | 45 ----------------------------------------- sources | 2 +- uboot-tools.spec | 11 +++++----- 3 files changed, 7 insertions(+), 51 deletions(-) delete mode 100644 AllWinner-PineTab.patch diff --git a/AllWinner-PineTab.patch b/AllWinner-PineTab.patch deleted file mode 100644 index 04b6896..0000000 --- a/AllWinner-PineTab.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Apr 2020 09:53:07 +0100 -Subject: [PATCH 9/9] initial pinetab support - -Signed-off-by: Peter Robinson ---- - configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - create mode 100644 configs/pinetab_defconfig - -diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig -new file mode 100644 -index 0000000000..5b9620f3e5 ---- /dev/null -+++ b/configs/pinetab_defconfig -@@ -0,0 +1,26 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN50I=y -+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y -+CONFIG_DRAM_CLK=552 -+CONFIG_DRAM_ZQ=3881949 -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_R_I2C_ENABLE=y -+CONFIG_SPL_SPI_SUNXI=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_USE_PREBOOT=y -+# CONFIG_SPL_DOS_PARTITION is not set -+# CONFIG_SPL_EFI_PARTITION is not set -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab" -+CONFIG_OF_LIST="sun50i-a64-pinetab" -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_PWM=y -+CONFIG_PWM_SUNXI=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y --- -2.26.0 diff --git a/sources b/sources index f64b4ca..24f086d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10.tar.bz2) = be5be1c9a54b270307a04177d5577a21c57a02b307bf8b63d0fa2655d1f025c7ce010dca6a1f7f60d4e639c2e6fb6f0a292a2e5d190f1fad478eb12dd786c9da +SHA512 (u-boot-2022.01-rc2.tar.bz2) = 1caaff097270ee205cf63cca0d66c6161ff03d927275dc7f757b39d59a52a21e7d81d5391570e649a196d9ba114536539cef688cdc43690a2e53d321f22fec43 diff --git a/uboot-tools.spec b/uboot-tools.spec index d77e112..b2cb2a9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc5 +%global candidate rc2 Name: uboot-tools -Version: 2021.10 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2022.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,8 +20,6 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch3: rpi-fallback-to-max-clock-for-mmc.patch Patch4: rpi-bcm2835_sdhost-firmware-managed-clock.patch -# AllWinner improvements -Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements @@ -255,6 +253,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Nov 15 2021 Peter Robinson - 2022.01-0.1.rc2 +- Update to 2022.01 RC2 + * Mon Nov 15 2021 Peter Robinson - 2021.10-3 - Fixes for rk3399 devices From c08df485fa1f3244af7c43a53c6c8cc457c84426 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 15 Nov 2021 22:12:48 +0000 Subject: [PATCH 170/351] Update names of shipped docs --- uboot-tools.spec | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index b2cb2a9..80cf5fe 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -227,7 +227,6 @@ cp -p board/solidrun/clearfog/README builds/docs/README.clearfog cp -p board/solidrun/mx6cuboxi/README builds/docs/README.mx6cuboxi cp -p board/sunxi/README.sunxi64 builds/docs/README.sunxi64 cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand -cp -p board/ti/am335x/README builds/docs/README.am335x cp -p board/ti/omap5_uevm/README builds/docs/README.omap5_uevm cp -p board/udoo/README builds/docs/README.udoo cp -p board/wandboard/README builds/docs/README.wandboard @@ -235,9 +234,9 @@ cp -p board/warp/README builds/docs/README.warp cp -p board/warp7/README builds/docs/README.warp7 %files -%doc README doc/README.kwbimage doc/README.distro doc/README.gpt +%doc README doc/README.kwbimage doc/develop/distro.rst doc/README.gpt %doc doc/README.odroid doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst -%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ +%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ doc/board/ti/am335x_evm.rst %{_bindir}/* %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ From d98cfa77d6c02521b70378e27f2baff27bcfad6c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Dec 2021 19:55:40 +0000 Subject: [PATCH 171/351] 2022.01 RC4 --- 0001-Fix-BeagleAI-detection.patch | 29 ----- 0001-enable-hs400-and-sdma-support.patch | 158 ----------------------- sources | 2 +- uboot-tools.spec | 17 +-- 4 files changed, 10 insertions(+), 196 deletions(-) delete mode 100644 0001-Fix-BeagleAI-detection.patch delete mode 100644 0001-enable-hs400-and-sdma-support.patch diff --git a/0001-Fix-BeagleAI-detection.patch b/0001-Fix-BeagleAI-detection.patch deleted file mode 100644 index dfd96cc..0000000 --- a/0001-Fix-BeagleAI-detection.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 1849ef423238aeb1732eb3b8e67eb46bc21401c7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 10 Sep 2020 14:24:12 +0100 -Subject: [PATCH] Fix BeagleAI detection - -Signed-off-by: Peter Robinson ---- - board/ti/am57xx/board.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c -index 7809875510..3232812a97 100644 ---- a/board/ti/am57xx/board.c -+++ b/board/ti/am57xx/board.c -@@ -527,8 +527,10 @@ void do_board_detect(void) - - rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, - CONFIG_EEPROM_CHIP_ADDRESS); -- if (rc) -+ if (rc) { - printf("ti_i2c_eeprom_init failed %d\n", rc); -+ ti_i2c_eeprom_am_set("BBONE-AI", "A"); -+ } - - #ifdef CONFIG_SUPPORT_EMMC_BOOT - rc = board_bootmode_has_emmc(); --- -2.26.2 - diff --git a/0001-enable-hs400-and-sdma-support.patch b/0001-enable-hs400-and-sdma-support.patch deleted file mode 100644 index 782366f..0000000 --- a/0001-enable-hs400-and-sdma-support.patch +++ /dev/null @@ -1,158 +0,0 @@ -From 42aa88db46fa88db52bbb5a96fc0eaebe695110e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 30 Aug 2021 18:20:39 +0100 -Subject: [PATCH] enable hs400 and sdma support - -Signed-off-by: Peter Robinson ---- - configs/firefly-rk3399_defconfig | 2 ++ - configs/nanopc-t4-rk3399_defconfig | 2 ++ - configs/nanopi-m4-2gb-rk3399_defconfig | 2 ++ - configs/nanopi-m4-rk3399_defconfig | 2 ++ - configs/nanopi-m4b-rk3399_defconfig | 2 ++ - configs/nanopi-neo4-rk3399_defconfig | 2 ++ - configs/nanopi-r4s-rk3399_defconfig | 2 ++ - configs/pinebook-pro-rk3399_defconfig | 1 + - configs/rock960-rk3399_defconfig | 1 + - configs/rockpro64-rk3399_defconfig | 2 ++ - 10 files changed, 18 insertions(+) - -diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index 2ca2ac35e4..84ee690a2d 100644 ---- a/configs/firefly-rk3399_defconfig -+++ b/configs/firefly-rk3399_defconfig -@@ -33,7 +33,9 @@ CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_DM_ETH=y -diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig -index a94f428def..722377803e 100644 ---- a/configs/nanopc-t4-rk3399_defconfig -+++ b/configs/nanopc-t4-rk3399_defconfig -@@ -30,7 +30,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig -index c9833fdb85..384d7da80c 100644 ---- a/configs/nanopi-m4-2gb-rk3399_defconfig -+++ b/configs/nanopi-m4-2gb-rk3399_defconfig -@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig -index 2b2fcac366..b6b8ca8d3a 100644 ---- a/configs/nanopi-m4-rk3399_defconfig -+++ b/configs/nanopi-m4-rk3399_defconfig -@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig -index 6d3afe1b63..3f83877e0a 100644 ---- a/configs/nanopi-m4b-rk3399_defconfig -+++ b/configs/nanopi-m4b-rk3399_defconfig -@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig -index 1bf5d1d095..6412cb2d7e 100644 ---- a/configs/nanopi-neo4-rk3399_defconfig -+++ b/configs/nanopi-neo4-rk3399_defconfig -@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig -index 351d2eb553..7b527d47fa 100644 ---- a/configs/nanopi-r4s-rk3399_defconfig -+++ b/configs/nanopi-r4s-rk3399_defconfig -@@ -29,7 +29,9 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_DM_ETH=y - CONFIG_ETH_DESIGNWARE=y -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index f97d5e872b..b0e68c9591 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -46,6 +46,7 @@ CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 0233e0ea52..624d718f9f 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -36,6 +36,7 @@ CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index ae11a8f5eb..b4e7e9700a 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -39,7 +39,9 @@ CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_HS400_SUPPORT=y - CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SPI_FLASH_GIGADEVICE=y --- -2.31.1 - diff --git a/sources b/sources index 24f086d..b98988f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.01-rc2.tar.bz2) = 1caaff097270ee205cf63cca0d66c6161ff03d927275dc7f757b39d59a52a21e7d81d5391570e649a196d9ba114536539cef688cdc43690a2e53d321f22fec43 +SHA512 (u-boot-2022.01-rc4.tar.bz2) = 2b07f52794056926125ca0327999c06939c19c9bbcfa2b3ea6809a2298adee1323f22f142aed57297be07541662f1d909af23393f78d7718ff6963d0552119b7 diff --git a/uboot-tools.spec b/uboot-tools.spec index 80cf5fe..f06fbe0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc4 Name: uboot-tools Version: 2022.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -15,18 +15,16 @@ Source2: aarch64-boards # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch + # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch3: rpi-fallback-to-max-clock-for-mmc.patch Patch4: rpi-bcm2835_sdhost-firmware-managed-clock.patch -# TI fixes -Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch -Patch13: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch -Patch14: 0001-enable-hs400-and-sdma-support.patch -Patch15: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch +Patch5: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +Patch6: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch +Patch7: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc @@ -252,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Dec 20 2021 Peter Robinson - 2022.01-0.2.rc4 +- Update to 2022.01 RC4 + * Mon Nov 15 2021 Peter Robinson - 2022.01-0.1.rc2 - Update to 2022.01 RC2 From 1457c7c78ebb2d23e20d86501c3afb0505019e19 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 5 Jan 2022 15:01:52 +0000 Subject: [PATCH 172/351] fixes for UEFI and improved upstream fix for PHY shutdown lockups --- aarch64-boards | 2 + ...-hang-when-multiple-controllers-exit.patch | 233 -------- uboot-tools.spec | 18 +- ...oll-frequency-to-improve-performance.patch | 178 ++++++ ...k-power-on-and-init-counts-in-uclass.patch | 556 ++++++++++++++++++ 5 files changed, 747 insertions(+), 240 deletions(-) delete mode 100644 phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch create mode 100644 v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch create mode 100644 v3-phy-Track-power-on-and-init-counts-in-uclass.patch diff --git a/aarch64-boards b/aarch64-boards index 9e2fafa..50427ad 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,5 +1,6 @@ a64-olinuxino amarula_a64_relic +apple_m1 bananapi_m2_plus_h5 bananapi_m64 beelink_gs1 @@ -35,6 +36,7 @@ nanopi-m4-rk3399 nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 +nanopi_r1s_h5 nanopi-r2s-rk3328 nanopi-r4s-rk3399 odroid-c2 diff --git a/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch b/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch deleted file mode 100644 index 81f1cdb..0000000 --- a/phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +++ /dev/null @@ -1,233 +0,0 @@ -From patchwork Tue Apr 6 15:10:59 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Icenowy Zheng -X-Patchwork-Id: 1462876 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dkim=fail reason="signature verification failed" (1024-bit key; - unprotected) header.d=mymailcheap.com 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mail20.mymailcheap.com (Postfix) with ESMTPSA id 251F840C16; - Tue, 6 Apr 2021 15:11:10 +0000 (UTC) -DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=aosc.io; s=default; - t=1617721874; bh=qb5gt5o7M9qjdJd67A3WHGZp/76w4s4FS6+u1VuEh/o=; - h=From:To:Cc:Subject:Date:From; - b=mWwYCh9AM8eRWm9hiEqirytotj/G/C1p9r2fd0zUxPhS0UQH+kw6L3RWZnsfmXAYq - HmYFiM3ktIfwevqQw89tOi8c2ktb49iYOyHXkfi8hTZl1dNsJDS94uyzBiHYY+U7x5 - P0aTRRaL5C8ua2c1GedoPx06nrARO/KMEFy39rxI= -From: Icenowy Zheng -To: Simon Glass , Kever Yang , - Frank Wang , - Jagan Teki -Cc: u-boot@lists.denx.de, - Icenowy Zheng -Subject: [PATCH] phy: rockchip: inno-usb2: fix hang when multiple controllers - exit -Date: Tue, 6 Apr 2021 23:10:59 +0800 -Message-Id: <20210406151059.1187379-1-icenowy@aosc.io> -X-Mailer: git-send-email 2.30.2 -MIME-Version: 1.0 -X-Rspamd-Server: mail20.mymailcheap.com -X-Spamd-Result: default: False [4.90 / 20.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; - ARC_NA(0.00)[]; R_DKIM_ALLOW(0.00)[aosc.io:s=default]; - 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both bound to the same PHY. They will -both do init and power_on operations when the controller is brought up -and both do power_off and exit when the controller is stopped. However, -the PHY uclass of U-Boot is not as sane as we thought -- they won't -maintain a status mark for PHYs, and thus the functions of the PHYs -could be called for multiple times. Calling init/power_on for multiple -times have no severe problems, however calling power_off/exit for -multiple times have a problem -- the first exit call will stop the PHY -clock, and power_off/exit calls after it still trying to write to PHY -registers. The write operation to PHY registers will fail because clock -is already stopped. - -Adapt the count mechanism from phy-sun4i-usb to both init/exit and -power_on/power_off functions to phy-rockchip-inno-usb2 to fix this -problem. With this stopping USB controllers (manually or before booting -a kernel) will work. - -Signed-off-by: Icenowy Zheng -Fixes: ac97a9ece14e ("phy: rockchip: Add Rockchip USB2PHY driver") ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 62b8ba3a4a..be9cc99d90 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -62,6 +62,8 @@ struct rockchip_usb2phy { - void *reg_base; - struct clk phyclk; - const struct rockchip_usb2phy_cfg *phy_cfg; -+ int init_count; -+ int power_on_count; - }; - - static inline int property_enable(void *reg_base, -@@ -92,6 +94,10 @@ static int rockchip_usb2phy_power_on(struct phy *phy) - struct rockchip_usb2phy *priv = dev_get_priv(parent); - const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); - -+ priv->power_on_count++; -+ if (priv->power_on_count != 1) -+ return 0; -+ - property_enable(priv->reg_base, &port_cfg->phy_sus, false); - - /* waiting for the utmi_clk to become stable */ -@@ -106,6 +112,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy) - struct rockchip_usb2phy *priv = dev_get_priv(parent); - const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); - -+ priv->power_on_count--; -+ if (priv->power_on_count != 0) -+ return 0; -+ - property_enable(priv->reg_base, &port_cfg->phy_sus, true); - - return 0; -@@ -118,6 +128,10 @@ static int rockchip_usb2phy_init(struct phy *phy) - const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); - int ret; - -+ priv->init_count++; -+ if (priv->init_count != 1) -+ return 0; -+ - ret = clk_enable(&priv->phyclk); - if (ret) { - dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret); -@@ -140,6 +154,10 @@ static int rockchip_usb2phy_exit(struct phy *phy) - struct udevice *parent = dev_get_parent(phy->dev); - struct rockchip_usb2phy *priv = dev_get_priv(parent); - -+ priv->init_count--; -+ if (priv->init_count != 0) -+ return 0; -+ - clk_disable(&priv->phyclk); - - return 0; -@@ -212,6 +230,9 @@ static int rockchip_usb2phy_probe(struct udevice *dev) - return ret; - } - -+ priv->power_on_count = 0; -+ priv->init_count = 0; -+ - return 0; - } - diff --git a/uboot-tools.spec b/uboot-tools.spec index f06fbe0..92d15ee 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2022.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -17,14 +17,15 @@ Source2: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Board fixes and enablement +Patch2: v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch # RPi - uses RPI firmware device tree for HAT support -Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch3: rpi-fallback-to-max-clock-for-mmc.patch -Patch4: rpi-bcm2835_sdhost-firmware-managed-clock.patch +Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch4: rpi-fallback-to-max-clock-for-mmc.patch +Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements -Patch5: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch -Patch6: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch -Patch7: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +Patch6: v3-phy-Track-power-on-and-init-counts-in-uclass.patch +Patch7: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch +Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch BuildRequires: bc BuildRequires: dtc @@ -250,6 +251,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Jan 05 2022 Peter Robinson - 2022.01-0.3.rc4 +- Upstream fixes for PHY and UEFI + * Mon Dec 20 2021 Peter Robinson - 2022.01-0.2.rc4 - Update to 2022.01 RC4 diff --git a/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch b/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch new file mode 100644 index 0000000..5eb366c --- /dev/null +++ b/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch @@ -0,0 +1,178 @@ +From patchwork Wed Dec 22 22:51:26 2021 +Content-Type: text/plain; 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The exact time is dependent on the polling interval the +keyboard requests in its descriptor, and likely cannot be significantly +reduced without major rework to the XHCI driver. + +The U-Boot EFI console service sets a timer to poll the keyboard every 5 +microseconds, and this timer is checked every time a block is read off +disk. The net effect is that, on my system, loading a ~40MiB kernel and +initrd takes about 62 seconds with a slower keyboard and 53 seconds +with a faster one, with the vast majority of the time spent polling the +keyboard. + +To solve this problem, this patch adds a 20ms delay between consecutive +calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the +total loading time to under half a second for both keyboards, and does +not impact the perceived keystroke latency. + +Signed-off-by: Thomas Watson +--- +This revision wraps the comment at 80 characters and also should not +have been corrupted by my e-mail client. + + common/usb_kbd.c | 20 +++++++++++++++----- + 1 file changed, 15 insertions(+), 5 deletions(-) + +diff --git a/common/usb_kbd.c b/common/usb_kbd.c +index afad260d3d..5408c821b4 100644 +--- a/common/usb_kbd.c ++++ b/common/usb_kbd.c +@@ -118,7 +118,7 @@ struct usb_kbd_pdata { + extern int __maybe_unused net_busy_flag; + + /* The period of time between two calls of usb_kbd_testc(). */ +-static unsigned long __maybe_unused kbd_testc_tms; ++static unsigned long kbd_testc_tms; + + /* Puts character in the queue and sets up the in and out pointer. */ + static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c) +@@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev) + struct usb_device *usb_kbd_dev; + struct usb_kbd_pdata *data; + ++ /* ++ * Polling the keyboard for an event can take dozens of milliseconds. ++ * Add a delay between polls to avoid blocking activity which polls ++ * rapidly, like the UEFI console timer. ++ */ ++ unsigned long poll_delay = CONFIG_SYS_HZ / 50; ++ + #ifdef CONFIG_CMD_NET + /* + * If net_busy_flag is 1, NET transfer is running, + * then we check key-pressed every second (first check may be + * less than 1 second) to improve TFTP booting performance. + */ +- if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ)) +- return 0; +- kbd_testc_tms = get_timer(0); ++ if (net_busy_flag) ++ poll_delay = CONFIG_SYS_HZ; + #endif ++ + dev = stdio_get_by_name(sdev->name); + usb_kbd_dev = (struct usb_device *)dev->priv; + data = usb_kbd_dev->privptr; + +- usb_kbd_poll_for_event(usb_kbd_dev); ++ if (get_timer(kbd_testc_tms) >= poll_delay) { ++ usb_kbd_poll_for_event(usb_kbd_dev); ++ kbd_testc_tms = get_timer(0); ++ } + + return !(data->usb_in_pointer == data->usb_out_pointer); + } diff --git a/v3-phy-Track-power-on-and-init-counts-in-uclass.patch b/v3-phy-Track-power-on-and-init-counts-in-uclass.patch new file mode 100644 index 0000000..d6cc31d --- /dev/null +++ b/v3-phy-Track-power-on-and-init-counts-in-uclass.patch @@ -0,0 +1,556 @@ +From patchwork Thu Dec 30 19:36:51 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1574229 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: bilbo.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20210112 header.b=cK81Bg2I; + dkim-atps=neutral +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) + (No client certificate requested) + by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JPz7X0bFyz9s0r + for ; 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+ Thu, 30 Dec 2021 11:37:11 -0800 (PST) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Frank Wang , + Andre Przywara , Tom Rini , + Simon Glass , Neil Armstrong , + Grant Likely , + Joe Hershberger , + Peter Robinson , + Jagan Teki , + Patrick Delaunay , + Grant Likely , Icenowy Zheng , + Alper Nebi Yasak +Subject: [PATCH v3] phy: Track power-on and init counts in uclass +Date: Thu, 30 Dec 2021 22:36:51 +0300 +Message-Id: <20211230193652.33514-1-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.34.1 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.38 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de +X-Virus-Status: Clean + +On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share +the same PHY device instance. While these controllers are being stopped +they both attempt to power-off and deinitialize it, but trying to +power-off the deinitialized PHY device results in a hang. This usually +happens just before booting an OS, and can be explicitly triggered by +running "usb start; usb stop" in the U-Boot shell. + +Implement a uclass-wide counting mechanism for PHY initialization and +power state change requests, so that we don't power-off/deinitialize a +PHY instance until all of its users want it done. The Allwinner A10 USB +PHY driver does this counting in-driver, remove those parts in favour of +this in-uclass implementation. + +The sandbox PHY operations test needs some changes since the uclass will +no longer call into the drivers for actions matching its tracked state +(e.g. powering-off a powered-off PHY). Update that test, and add a new +one which simulates multiple users of a single PHY. + +The major complication here is that PHY handles aren't deduplicated per +instance, so the obvious idea of putting the counts in the PHY handles +don't immediately work. It seems possible to bind a child udevice per +PHY instance to the PHY provider and deduplicate the handles in each +child's uclass-private areas, like in the CLK framework. An alternative +approach could be to use those bound child udevices themselves as the +PHY handles. Instead, to avoid the architectural changes those would +require, this patch solves things by dynamically allocating a list of +structs (one per instance) in the provider's uclass-private area. + +Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass +--- + +Changes in v3: +- Add tag: "Reviewed-by: Simon Glass " +- Add comment for phy_counts struct + +v2: https://patchwork.ozlabs.org/project/uboot/patch/20211224130549.20276-1-alpernebiyasak@gmail.com/ + +Changes in v2: +- Rename {phy_,}id_priv -> {phy_,}counts +- Split phy_get_uclass_priv -> phy_{alloc,get}_counts +- Allocate counts (or return error) in generic_phy_get_by_*() +- Remove now-unnecessary null checks for counts of valid phy handles + +v1: https://patchwork.ozlabs.org/project/uboot/patch/20211210200124.19226-1-alpernebiyasak@gmail.com/ + + drivers/phy/allwinner/phy-sun4i-usb.c | 9 -- + drivers/phy/phy-uclass.c | 137 ++++++++++++++++++++++++++ + test/dm/phy.c | 83 +++++++++++++++- + 3 files changed, 215 insertions(+), 14 deletions(-) + +diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c +index ab2a5d17fcff..86c589a65fd3 100644 +--- a/drivers/phy/allwinner/phy-sun4i-usb.c ++++ b/drivers/phy/allwinner/phy-sun4i-usb.c +@@ -125,7 +125,6 @@ struct sun4i_usb_phy_info { + + struct sun4i_usb_phy_plat { + void __iomem *pmu; +- int power_on_count; + int gpio_vbus; + int gpio_vbus_det; + int gpio_id_det; +@@ -225,10 +224,6 @@ static int sun4i_usb_phy_power_on(struct phy *phy) + initial_usb_scan_delay = 0; + } + +- usb_phy->power_on_count++; +- if (usb_phy->power_on_count != 1) +- return 0; +- + if (usb_phy->gpio_vbus >= 0) + gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_UP); + +@@ -240,10 +235,6 @@ static int sun4i_usb_phy_power_off(struct phy *phy) + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + +- usb_phy->power_on_count--; +- if (usb_phy->power_on_count != 0) +- return 0; +- + if (usb_phy->gpio_vbus >= 0) + gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_DISABLE); + +diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c +index 59683a080cd7..cec46c2c4103 100644 +--- a/drivers/phy/phy-uclass.c ++++ b/drivers/phy/phy-uclass.c +@@ -11,12 +11,96 @@ + #include + #include + #include ++#include ++ ++/** ++ * struct phy_counts - Init and power-on counts of a single PHY port ++ * ++ * This structure is used to keep track of PHY initialization and power ++ * state change requests, so that we don't power off and deinitialize a ++ * PHY instance until all of its users want it done. Otherwise, multiple ++ * consumers using the same PHY port can cause problems (e.g. one might ++ * call power_off() after another's exit() and hang indefinitely). ++ * ++ * @id: The PHY ID within a PHY provider ++ * @power_on_count: Times generic_phy_power_on() was called for this ID ++ * without a matching generic_phy_power_off() afterwards ++ * @init_count: Times generic_phy_init() was called for this ID ++ * without a matching generic_phy_exit() afterwards ++ * @list: Handle for a linked list of these structures corresponding to ++ * ports of the same PHY provider ++ */ ++struct phy_counts { ++ unsigned long id; ++ int power_on_count; ++ int init_count; ++ struct list_head list; ++}; + + static inline struct phy_ops *phy_dev_ops(struct udevice *dev) + { + return (struct phy_ops *)dev->driver->ops; + } + ++static struct phy_counts *phy_get_counts(struct phy *phy) ++{ ++ struct list_head *uc_priv; ++ struct phy_counts *counts; ++ ++ if (!generic_phy_valid(phy)) ++ return NULL; ++ ++ uc_priv = dev_get_uclass_priv(phy->dev); ++ list_for_each_entry(counts, uc_priv, list) ++ if (counts->id == phy->id) ++ return counts; ++ ++ return NULL; ++} ++ ++static int phy_alloc_counts(struct phy *phy) ++{ ++ struct list_head *uc_priv; ++ struct phy_counts *counts; ++ ++ if (!generic_phy_valid(phy)) ++ return 0; ++ if (phy_get_counts(phy)) ++ return 0; ++ ++ uc_priv = dev_get_uclass_priv(phy->dev); ++ counts = kzalloc(sizeof(*counts), GFP_KERNEL); ++ if (!counts) ++ return -ENOMEM; ++ ++ counts->id = phy->id; ++ counts->power_on_count = 0; ++ counts->init_count = 0; ++ list_add(&counts->list, uc_priv); ++ ++ return 0; ++} ++ ++static int phy_uclass_pre_probe(struct udevice *dev) ++{ ++ struct list_head *uc_priv = dev_get_uclass_priv(dev); ++ ++ INIT_LIST_HEAD(uc_priv); ++ ++ return 0; ++} ++ ++static int phy_uclass_pre_remove(struct udevice *dev) ++{ ++ struct list_head *uc_priv = dev_get_uclass_priv(dev); ++ struct phy_counts *counts, *next; ++ ++ list_for_each_entry_safe(counts, next, uc_priv, list) ++ kfree(counts); ++ ++ return 0; ++} ++ + static int generic_phy_xlate_offs_flags(struct phy *phy, + struct ofnode_phandle_args *args) + { +@@ -88,6 +172,12 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) + goto err; + } + ++ ret = phy_alloc_counts(phy); ++ if (ret) { ++ debug("phy_alloc_counts() failed: %d\n", ret); ++ goto err; ++ } ++ + return 0; + + err: +@@ -118,6 +208,7 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name, + + int generic_phy_init(struct phy *phy) + { ++ struct phy_counts *counts; + struct phy_ops const *ops; + int ret; + +@@ -126,10 +217,19 @@ int generic_phy_init(struct phy *phy) + ops = phy_dev_ops(phy->dev); + if (!ops->init) + return 0; ++ ++ counts = phy_get_counts(phy); ++ if (counts->init_count > 0) { ++ counts->init_count++; ++ return 0; ++ } ++ + ret = ops->init(phy); + if (ret) + dev_err(phy->dev, "PHY: Failed to init %s: %d.\n", + phy->dev->name, ret); ++ else ++ counts->init_count = 1; + + return ret; + } +@@ -154,6 +254,7 @@ int generic_phy_reset(struct phy *phy) + + int generic_phy_exit(struct phy *phy) + { ++ struct phy_counts *counts; + struct phy_ops const *ops; + int ret; + +@@ -162,16 +263,28 @@ int generic_phy_exit(struct phy *phy) + ops = phy_dev_ops(phy->dev); + if (!ops->exit) + return 0; ++ ++ counts = phy_get_counts(phy); ++ if (counts->init_count == 0) ++ return 0; ++ if (counts->init_count > 1) { ++ counts->init_count--; ++ return 0; ++ } ++ + ret = ops->exit(phy); + if (ret) + dev_err(phy->dev, "PHY: Failed to exit %s: %d.\n", + phy->dev->name, ret); ++ else ++ counts->init_count = 0; + + return ret; + } + + int generic_phy_power_on(struct phy *phy) + { ++ struct phy_counts *counts; + struct phy_ops const *ops; + int ret; + +@@ -180,16 +293,26 @@ int generic_phy_power_on(struct phy *phy) + ops = phy_dev_ops(phy->dev); + if (!ops->power_on) + return 0; ++ ++ counts = phy_get_counts(phy); ++ if (counts->power_on_count > 0) { ++ counts->power_on_count++; ++ return 0; ++ } ++ + ret = ops->power_on(phy); + if (ret) + dev_err(phy->dev, "PHY: Failed to power on %s: %d.\n", + phy->dev->name, ret); ++ else ++ counts->power_on_count = 1; + + return ret; + } + + int generic_phy_power_off(struct phy *phy) + { ++ struct phy_counts *counts; + struct phy_ops const *ops; + int ret; + +@@ -198,10 +321,21 @@ int generic_phy_power_off(struct phy *phy) + ops = phy_dev_ops(phy->dev); + if (!ops->power_off) + return 0; ++ ++ counts = phy_get_counts(phy); ++ if (counts->power_on_count == 0) ++ return 0; ++ if (counts->power_on_count > 1) { ++ counts->power_on_count--; ++ return 0; ++ } ++ + ret = ops->power_off(phy); + if (ret) + dev_err(phy->dev, "PHY: Failed to power off %s: %d.\n", + phy->dev->name, ret); ++ else ++ counts->power_on_count = 0; + + return ret; + } +@@ -316,4 +450,7 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk) + UCLASS_DRIVER(phy) = { + .id = UCLASS_PHY, + .name = "phy", ++ .pre_probe = phy_uclass_pre_probe, ++ .pre_remove = phy_uclass_pre_remove, ++ .per_device_auto = sizeof(struct list_head), + }; +diff --git a/test/dm/phy.c b/test/dm/phy.c +index ecbd47bf12fd..df4c73fc701f 100644 +--- a/test/dm/phy.c ++++ b/test/dm/phy.c +@@ -79,12 +79,15 @@ static int dm_test_phy_ops(struct unit_test_state *uts) + ut_assertok(generic_phy_power_off(&phy1)); + + /* +- * test operations after exit(). +- * The sandbox phy driver does not allow it. ++ * Test power_on() failure after exit(). ++ * The sandbox phy driver does not allow power-on/off after ++ * exit, but the uclass counts power-on/init calls and skips ++ * calling the driver's ops when e.g. powering off an already ++ * powered-off phy. + */ + ut_assertok(generic_phy_exit(&phy1)); + ut_assert(generic_phy_power_on(&phy1) != 0); +- ut_assert(generic_phy_power_off(&phy1) != 0); ++ ut_assertok(generic_phy_power_off(&phy1)); + + /* + * test normal operations again (after re-init) +@@ -99,6 +102,17 @@ static int dm_test_phy_ops(struct unit_test_state *uts) + */ + ut_assertok(generic_phy_reset(&phy1)); + ++ /* ++ * Test power_off() failure after exit(). ++ * For this we need to call exit() while the phy is powered-on, ++ * so that the uclass actually calls the driver's power-off() ++ * and reports the resulting failure. ++ */ ++ ut_assertok(generic_phy_power_on(&phy1)); ++ ut_assertok(generic_phy_exit(&phy1)); ++ ut_assert(generic_phy_power_off(&phy1) != 0); ++ ut_assertok(generic_phy_power_on(&phy1)); ++ + /* PHY2 has a known problem with power off */ + ut_assertok(generic_phy_init(&phy2)); + ut_assertok(generic_phy_power_on(&phy2)); +@@ -106,8 +120,8 @@ static int dm_test_phy_ops(struct unit_test_state *uts) + + /* PHY3 has a known problem with power off and power on */ + ut_assertok(generic_phy_init(&phy3)); +- ut_asserteq(-EIO, generic_phy_power_off(&phy3)); +- ut_asserteq(-EIO, generic_phy_power_off(&phy3)); ++ ut_asserteq(-EIO, generic_phy_power_on(&phy3)); ++ ut_assertok(generic_phy_power_off(&phy3)); + + return 0; + } +@@ -145,3 +159,62 @@ static int dm_test_phy_bulk(struct unit_test_state *uts) + return 0; + } + DM_TEST(dm_test_phy_bulk, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); ++ ++static int dm_test_phy_multi_exit(struct unit_test_state *uts) ++{ ++ struct phy phy1_method1; ++ struct phy phy1_method2; ++ struct phy phy1_method3; ++ struct udevice *parent; ++ ++ /* Get the same phy instance in 3 different ways. */ ++ ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, ++ "gen_phy_user", &parent)); ++ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method1)); ++ ut_asserteq(0, phy1_method1.id); ++ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method2)); ++ ut_asserteq(0, phy1_method2.id); ++ ut_asserteq_ptr(phy1_method1.dev, phy1_method1.dev); ++ ++ ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, ++ "gen_phy_user1", &parent)); ++ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method3)); ++ ut_asserteq(0, phy1_method3.id); ++ ut_asserteq_ptr(phy1_method1.dev, phy1_method3.dev); ++ ++ /* ++ * Test using the same PHY from different handles. ++ * In non-test code these could be in different drivers. ++ */ ++ ++ /* ++ * These must only call the driver's ops at the first init() ++ * and power_on(). ++ */ ++ ut_assertok(generic_phy_init(&phy1_method1)); ++ ut_assertok(generic_phy_init(&phy1_method2)); ++ ut_assertok(generic_phy_power_on(&phy1_method1)); ++ ut_assertok(generic_phy_power_on(&phy1_method2)); ++ ut_assertok(generic_phy_init(&phy1_method3)); ++ ut_assertok(generic_phy_power_on(&phy1_method3)); ++ ++ /* ++ * These must not call the driver's ops as other handles still ++ * want the PHY powered-on and initialized. ++ */ ++ ut_assertok(generic_phy_power_off(&phy1_method3)); ++ ut_assertok(generic_phy_exit(&phy1_method3)); ++ ++ /* ++ * We would get an error here if the generic_phy_exit() above ++ * actually called the driver's exit(), as the sandbox driver ++ * doesn't allow power-off() after exit(). ++ */ ++ ut_assertok(generic_phy_power_off(&phy1_method1)); ++ ut_assertok(generic_phy_power_off(&phy1_method2)); ++ ut_assertok(generic_phy_exit(&phy1_method1)); ++ ut_assertok(generic_phy_exit(&phy1_method2)); ++ ++ return 0; ++} ++DM_TEST(dm_test_phy_multi_exit, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); From cc4e21b64cc58ab75818fba7cb84051d7122e084 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 11 Jan 2022 10:04:15 +0000 Subject: [PATCH 173/351] 2022.01 --- ...to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch | 244 ++++++++++++++++++ uboot-tools.spec | 8 +- 2 files changed, 250 insertions(+), 2 deletions(-) create mode 100644 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch diff --git a/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch b/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch new file mode 100644 index 0000000..0f762d9 --- /dev/null +++ b/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch @@ -0,0 +1,244 @@ +From 53f3d6e9219a36f375e27150b8ec1088624f1aa0 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 21 Dec 2021 17:25:35 +0000 +Subject: [PATCH] udoo_neo: Move to DM for REGUALTOR/PMIC/I2C drivers + +This moves over the PMIC power init to DM and the associated i2c and +regulator bits. + +Signed-off-by: Peter Robinson +--- + board/udoo/neo/neo.c | 139 +++---------------------------------- + configs/udoo_neo_defconfig | 10 +-- + include/configs/udoo_neo.h | 5 -- + 3 files changed, 15 insertions(+), 139 deletions(-) + +diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c +index 5e40583ab4..9e2a66996c 100644 +--- a/board/udoo/neo/neo.c ++++ b/board/udoo/neo/neo.c +@@ -51,11 +51,6 @@ enum { + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ +- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ +- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ +- PAD_CTL_ODE) +- + #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) +@@ -83,135 +78,25 @@ int dram_init(void) + return 0; + } + +-#ifdef CONFIG_SYS_I2C_MXC +-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +-/* I2C1 for PMIC */ +-static struct i2c_pads_info i2c_pad_info1 = { +- .scl = { +- .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC, +- .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC, +- .gp = IMX_GPIO_NR(1, 0), +- }, +- .sda = { +- .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC, +- .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC, +- .gp = IMX_GPIO_NR(1, 1), +- }, +-}; +-#endif +- +-#if CONFIG_IS_ENABLED(POWER_LEGACY) + int power_init_board(void) + { +- struct pmic *p; +- int ret; +- unsigned int reg, rev_id; +- +- ret = power_pfuze3000_init(PFUZE3000_I2C_BUS); +- if (ret) +- return ret; +- +- p = pmic_get("PFUZE3000"); +- ret = pmic_probe(p); +- if (ret) +- return ret; ++ struct udevice *dev; ++ int ret, dev_id, rev_id; + +- pmic_reg_read(p, PFUZE3000_DEVICEID, ®); +- pmic_reg_read(p, PFUZE3000_REVID, &rev_id); +- printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); +- +- /* disable Low Power Mode during standby mode */ +- pmic_reg_read(p, PFUZE3000_LDOGCTL, ®); +- reg |= 0x1; +- ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg); +- if (ret) ++ ret = pmic_get("pfuze3000@8", &dev); ++ if (ret == -ENODEV) ++ return 0; ++ if (ret != 0) + return ret; + +- ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc); +- if (ret) +- return ret; ++ dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID); ++ rev_id = pmic_reg_read(dev, PFUZE3000_REVID); ++ printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id); + +- ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc); +- if (ret) +- return ret; +- +- ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc); +- if (ret) +- return ret; +- +- ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc); +- if (ret) +- return ret; +- +- /* set SW1A standby voltage 0.975V */ +- pmic_reg_read(p, PFUZE3000_SW1ASTBY, ®); +- reg &= ~0x3f; +- reg |= PFUZE3000_SW1AB_SETP(9750); +- ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg); +- if (ret) +- return ret; +- +- /* set SW1B standby voltage 0.975V */ +- pmic_reg_read(p, PFUZE3000_SW1BSTBY, ®); +- reg &= ~0x3f; +- reg |= PFUZE3000_SW1AB_SETP(9750); +- ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg); +- if (ret) +- return ret; +- +- /* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */ +- pmic_reg_read(p, PFUZE3000_SW1ACONF, ®); +- reg &= ~0xc0; +- reg |= 0x40; +- ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg); +- if (ret) +- return ret; +- +- /* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */ +- pmic_reg_read(p, PFUZE3000_SW1BCONF, ®); +- reg &= ~0xc0; +- reg |= 0x40; +- ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg); +- if (ret) +- return ret; +- +- /* set VDD_ARM_IN to 1.350V */ +- pmic_reg_read(p, PFUZE3000_SW1AVOLT, ®); +- reg &= ~0x3f; +- reg |= PFUZE3000_SW1AB_SETP(13500); +- ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg); +- if (ret) +- return ret; +- +- /* set VDD_SOC_IN to 1.350V */ +- pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®); +- reg &= ~0x3f; +- reg |= PFUZE3000_SW1AB_SETP(13500); +- ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg); +- if (ret) +- return ret; +- +- /* set DDR_1_5V to 1.350V */ +- pmic_reg_read(p, PFUZE3000_SW3VOLT, ®); +- reg &= ~0x0f; +- reg |= PFUZE3000_SW3_SETP(13500); +- ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg); +- if (ret) +- return ret; +- +- /* set VGEN2_1V5 to 1.5V */ +- pmic_reg_read(p, PFUZE3000_VLDO2CTL, ®); +- reg &= ~0x0f; +- reg |= PFUZE3000_VLDO_SETP(15000); +- /* enable */ +- reg |= 0x10; +- ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg); +- if (ret) +- return ret; ++ pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1); + + return 0; + } +-#endif + + static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +@@ -294,10 +179,6 @@ int board_init(void) + gpio_request(IMX_GPIO_NR(4, 16), "ncp692"); + gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); + +-#ifdef CONFIG_SYS_I2C_MXC +- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +-#endif +- + setup_fec(); + + return 0; +diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig +index ca08de1bd4..9177bdba65 100644 +--- a/configs/udoo_neo_defconfig ++++ b/configs/udoo_neo_defconfig +@@ -10,8 +10,9 @@ CONFIG_ENV_SIZE=0x2000 + CONFIG_ENV_OFFSET=0x80000 + CONFIG_MX6SX=y + CONFIG_TARGET_UDOO_NEO=y +-CONFIG_SYS_I2C_MXC_I2C1=y ++CONFIG_DM_I2C=y + CONFIG_DM_GPIO=y ++CONFIG_DM_MMC=y + CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" + CONFIG_SPL_TEXT_BASE=0x00908000 + CONFIG_SPL_MMC=y +@@ -39,8 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=1 + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y + CONFIG_BOUNCE_BUFFER=y +-CONFIG_SYS_I2C_LEGACY=y +-CONFIG_SPL_SYS_I2C_LEGACY=y + CONFIG_SYS_I2C_MXC=y + CONFIG_FSL_USDHC=y + CONFIG_PHYLIB=y +@@ -52,11 +51,12 @@ CONFIG_FEC_MXC=y + CONFIG_MII=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_IMX6=y +-CONFIG_POWER_LEGACY=y +-CONFIG_POWER_I2C=y ++CONFIG_DM_PMIC=y ++CONFIG_DM_PMIC_PFUZE100=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_ANATOP=y + CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_PFUZE100=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_STORAGE=y +diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h +index 3a7cb050b1..ac13c3e57f 100644 +--- a/include/configs/udoo_neo.h ++++ b/include/configs/udoo_neo.h +@@ -68,9 +68,4 @@ + #define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +-/* PMIC */ +-#define CONFIG_POWER_PFUZE3000 +-#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +-#define PFUZE3000_I2C_BUS 0 +- + #endif /* __CONFIG_H */ +-- +2.34.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 92d15ee..9bf773b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc4 Name: uboot-tools Version: 2022.01 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,6 +26,7 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch Patch6: v3-phy-Track-power-on-and-init-counts-in-uclass.patch Patch7: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch BuildRequires: bc BuildRequires: dtc @@ -251,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Jan 10 2022 Peter Robinson - 2022.01-1 +- Update to 2022.01 + * Wed Jan 05 2022 Peter Robinson - 2022.01-0.3.rc4 - Upstream fixes for PHY and UEFI From c1b0bbe3612ec6e8fd38b805ec0eb9c1e5cbefad Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 11 Jan 2022 10:11:22 +0000 Subject: [PATCH 174/351] Upload source --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index b98988f..d632a51 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.01-rc4.tar.bz2) = 2b07f52794056926125ca0327999c06939c19c9bbcfa2b3ea6809a2298adee1323f22f142aed57297be07541662f1d909af23393f78d7718ff6963d0552119b7 +SHA512 (u-boot-2022.01.tar.bz2) = d83c62bd8f0f51664d2aca329a3ce1379cfd1dfff439dccd6cfc2cb33cfef89a2b01855c97716f591b5550bfdf99e2f3aef7efa33f2e7834c820648f9eef3825 From b27a96095d4528e556dc251c7a196d9936f48123 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 22 Jan 2022 03:22:08 +0000 Subject: [PATCH 175/351] - Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 9bf773b..fffbf72 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2022.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -252,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat Jan 22 2022 Fedora Release Engineering - 2022.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild + * Mon Jan 10 2022 Peter Robinson - 2022.01-1 - Update to 2022.01 From 18e07ba9f6f80abd4ed2fe126836bcda8171371f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 2 Feb 2022 23:04:35 +0000 Subject: [PATCH 176/351] 2022.04 RC1 --- ...kchip-rk3399-enable-emmc-phy-for-spl.patch | 115 ---- sources | 2 +- uboot-tools.spec | 13 +- ...k-power-on-and-init-counts-in-uclass.patch | 556 ------------------ 4 files changed, 8 insertions(+), 678 deletions(-) delete mode 100644 dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch delete mode 100644 v3-phy-Track-power-on-and-init-counts-in-uclass.patch diff --git a/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch b/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch deleted file mode 100644 index 3ef5b53..0000000 --- a/dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch +++ /dev/null @@ -1,115 +0,0 @@ -From patchwork Mon Nov 1 04:43:47 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Yifeng Zhao -X-Patchwork-Id: 1548950 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 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(256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 04D7B83383 - for ; Mon, 1 Nov 2021 05:43:59 +0100 (CET) -Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) - header.from=rock-chips.com -Authentication-Results: phobos.denx.de; - spf=fail smtp.mailfrom=yifeng.zhao@rock-chips.com -Received: from localhost (unknown [192.168.167.16]) - by lucky1.263xmail.com (Postfix) with ESMTP id 1B96CD124A; - Mon, 1 Nov 2021 12:43:55 +0800 (CST) -X-MAIL-GRAY: 0 -X-MAIL-DELIVERY: 1 -X-ADDR-CHECKED4: 1 -X-SKE-CHECKED: 1 -X-ANTISPAM-LEVEL: 2 -Received: from localhost.localdomain (unknown [58.22.7.114]) - by smtp.263.net (postfix) whith ESMTP id - P5172T139932542678784S1635741828952225_; - Mon, 01 Nov 2021 12:43:55 +0800 (CST) -X-IP-DOMAINF: 1 -X-RL-SENDER: yifeng.zhao@rock-chips.com -X-SENDER: zyf@rock-chips.com -X-LOGIN-NAME: yifeng.zhao@rock-chips.com -X-FST-TO: kever.yang@rock-chips.com -X-RCPT-COUNT: 7 -X-LOCAL-RCPT-COUNT: 2 -X-SENDER-IP: 58.22.7.114 -X-ATTACHMENT-NUM: 0 -X-UNIQUE-TAG: <8beb59827f65d556787d36e0068aa9cb> -X-System-Flag: 0 -From: Yifeng Zhao -To: Kever Yang -Cc: sjg , Peter Robinson , - Philipp Tomsich , - u-boot@lists.denx.de, Jack Mitchell , - Yifeng Zhao -Subject: [PATCH] dts: rockchip: rk3399: enable emmc phy for spl -Date: Mon, 1 Nov 2021 12:43:47 +0800 -Message-Id: <20211101044347.17822-1-yifeng.zhao@rock-chips.com> -X-Mailer: git-send-email 2.17.1 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de -X-Virus-Status: Clean - -adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock -config for rk3399") to fix the issue "Not found emmc phy device". - -Signed-off-by: Yifeng Zhao ---- - - arch/arm/dts/rk3399-u-boot.dtsi | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index 73922c328a..716b9a433a 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -88,6 +88,10 @@ - u-boot,dm-pre-reloc; - }; - -+&emmc_phy { -+ u-boot,dm-pre-reloc; -+}; -+ - &grf { - u-boot,dm-pre-reloc; - }; diff --git a/sources b/sources index d632a51..870dc09 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.01.tar.bz2) = d83c62bd8f0f51664d2aca329a3ce1379cfd1dfff439dccd6cfc2cb33cfef89a2b01855c97716f591b5550bfdf99e2f3aef7efa33f2e7834c820648f9eef3825 +SHA512 (u-boot-2022.04-rc1.tar.bz2) = 95421d9ed69f46b727e9bbe53f8ecbd66a6779512c97342b02eb440adac175e6abeebbf5664f256397518e39602b9eee70a2b66ca21c2f13a3331bab755b9735 diff --git a/uboot-tools.spec b/uboot-tools.spec index fffbf72..0185254 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc4 +%global candidate rc1 Name: uboot-tools -Version: 2022.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2022.04 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -23,10 +23,8 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements -Patch6: v3-phy-Track-power-on-and-init-counts-in-uclass.patch -Patch7: dts-rockchip-rk3399-enable-emmc-phy-for-spl.patch Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch -Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch +# Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch BuildRequires: bc BuildRequires: dtc @@ -252,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Feb 02 2022 Peter Robinson - 2022.04-0.1.rc1 +- Update to 2022.04 RC1 + * Sat Jan 22 2022 Fedora Release Engineering - 2022.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild diff --git a/v3-phy-Track-power-on-and-init-counts-in-uclass.patch b/v3-phy-Track-power-on-and-init-counts-in-uclass.patch deleted file mode 100644 index d6cc31d..0000000 --- a/v3-phy-Track-power-on-and-init-counts-in-uclass.patch +++ /dev/null @@ -1,556 +0,0 @@ -From patchwork Thu Dec 30 19:36:51 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1574229 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: bilbo.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20210112 header.b=cK81Bg2I; - dkim-atps=neutral -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) 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Patrick Delaunay , - Grant Likely , Icenowy Zheng , - Alper Nebi Yasak -Subject: [PATCH v3] phy: Track power-on and init counts in uclass -Date: Thu, 30 Dec 2021 22:36:51 +0300 -Message-Id: <20211230193652.33514-1-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.34.1 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.38 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de -X-Virus-Status: Clean - -On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share -the same PHY device instance. While these controllers are being stopped -they both attempt to power-off and deinitialize it, but trying to -power-off the deinitialized PHY device results in a hang. This usually -happens just before booting an OS, and can be explicitly triggered by -running "usb start; usb stop" in the U-Boot shell. - -Implement a uclass-wide counting mechanism for PHY initialization and -power state change requests, so that we don't power-off/deinitialize a -PHY instance until all of its users want it done. The Allwinner A10 USB -PHY driver does this counting in-driver, remove those parts in favour of -this in-uclass implementation. - -The sandbox PHY operations test needs some changes since the uclass will -no longer call into the drivers for actions matching its tracked state -(e.g. powering-off a powered-off PHY). Update that test, and add a new -one which simulates multiple users of a single PHY. - -The major complication here is that PHY handles aren't deduplicated per -instance, so the obvious idea of putting the counts in the PHY handles -don't immediately work. It seems possible to bind a child udevice per -PHY instance to the PHY provider and deduplicate the handles in each -child's uclass-private areas, like in the CLK framework. An alternative -approach could be to use those bound child udevices themselves as the -PHY handles. Instead, to avoid the architectural changes those would -require, this patch solves things by dynamically allocating a list of -structs (one per instance) in the provider's uclass-private area. - -Signed-off-by: Alper Nebi Yasak -Reviewed-by: Simon Glass ---- - -Changes in v3: -- Add tag: "Reviewed-by: Simon Glass " -- Add comment for phy_counts struct - -v2: https://patchwork.ozlabs.org/project/uboot/patch/20211224130549.20276-1-alpernebiyasak@gmail.com/ - -Changes in v2: -- Rename {phy_,}id_priv -> {phy_,}counts -- Split phy_get_uclass_priv -> phy_{alloc,get}_counts -- Allocate counts (or return error) in generic_phy_get_by_*() -- Remove now-unnecessary null checks for counts of valid phy handles - -v1: https://patchwork.ozlabs.org/project/uboot/patch/20211210200124.19226-1-alpernebiyasak@gmail.com/ - - drivers/phy/allwinner/phy-sun4i-usb.c | 9 -- - drivers/phy/phy-uclass.c | 137 ++++++++++++++++++++++++++ - test/dm/phy.c | 83 +++++++++++++++- - 3 files changed, 215 insertions(+), 14 deletions(-) - -diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c -index ab2a5d17fcff..86c589a65fd3 100644 ---- a/drivers/phy/allwinner/phy-sun4i-usb.c -+++ b/drivers/phy/allwinner/phy-sun4i-usb.c -@@ -125,7 +125,6 @@ struct sun4i_usb_phy_info { - - struct sun4i_usb_phy_plat { - void __iomem *pmu; -- int power_on_count; - int gpio_vbus; - int gpio_vbus_det; - int gpio_id_det; -@@ -225,10 +224,6 @@ static int sun4i_usb_phy_power_on(struct phy *phy) - initial_usb_scan_delay = 0; - } - -- usb_phy->power_on_count++; -- if (usb_phy->power_on_count != 1) -- return 0; -- - if (usb_phy->gpio_vbus >= 0) - gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_UP); - -@@ -240,10 +235,6 @@ static int sun4i_usb_phy_power_off(struct phy *phy) - struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); - struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; - -- usb_phy->power_on_count--; -- if (usb_phy->power_on_count != 0) -- return 0; -- - if (usb_phy->gpio_vbus >= 0) - gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_DISABLE); - -diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c -index 59683a080cd7..cec46c2c4103 100644 ---- a/drivers/phy/phy-uclass.c -+++ b/drivers/phy/phy-uclass.c -@@ -11,12 +11,96 @@ - #include - #include - #include -+#include -+ -+/** -+ * struct phy_counts - Init and power-on counts of a single PHY port -+ * -+ * This structure is used to keep track of PHY initialization and power -+ * state change requests, so that we don't power off and deinitialize a -+ * PHY instance until all of its users want it done. Otherwise, multiple -+ * consumers using the same PHY port can cause problems (e.g. one might -+ * call power_off() after another's exit() and hang indefinitely). -+ * -+ * @id: The PHY ID within a PHY provider -+ * @power_on_count: Times generic_phy_power_on() was called for this ID -+ * without a matching generic_phy_power_off() afterwards -+ * @init_count: Times generic_phy_init() was called for this ID -+ * without a matching generic_phy_exit() afterwards -+ * @list: Handle for a linked list of these structures corresponding to -+ * ports of the same PHY provider -+ */ -+struct phy_counts { -+ unsigned long id; -+ int power_on_count; -+ int init_count; -+ struct list_head list; -+}; - - static inline struct phy_ops *phy_dev_ops(struct udevice *dev) - { - return (struct phy_ops *)dev->driver->ops; - } - -+static struct phy_counts *phy_get_counts(struct phy *phy) -+{ -+ struct list_head *uc_priv; -+ struct phy_counts *counts; -+ -+ if (!generic_phy_valid(phy)) -+ return NULL; -+ -+ uc_priv = dev_get_uclass_priv(phy->dev); -+ list_for_each_entry(counts, uc_priv, list) -+ if (counts->id == phy->id) -+ return counts; -+ -+ return NULL; -+} -+ -+static int phy_alloc_counts(struct phy *phy) -+{ -+ struct list_head *uc_priv; -+ struct phy_counts *counts; -+ -+ if (!generic_phy_valid(phy)) -+ return 0; -+ if (phy_get_counts(phy)) -+ return 0; -+ -+ uc_priv = dev_get_uclass_priv(phy->dev); -+ counts = kzalloc(sizeof(*counts), GFP_KERNEL); -+ if (!counts) -+ return -ENOMEM; -+ -+ counts->id = phy->id; -+ counts->power_on_count = 0; -+ counts->init_count = 0; -+ list_add(&counts->list, uc_priv); -+ -+ return 0; -+} -+ -+static int phy_uclass_pre_probe(struct udevice *dev) -+{ -+ struct list_head *uc_priv = dev_get_uclass_priv(dev); -+ -+ INIT_LIST_HEAD(uc_priv); -+ -+ return 0; -+} -+ -+static int phy_uclass_pre_remove(struct udevice *dev) -+{ -+ struct list_head *uc_priv = dev_get_uclass_priv(dev); -+ struct phy_counts *counts, *next; -+ -+ list_for_each_entry_safe(counts, next, uc_priv, list) -+ kfree(counts); -+ -+ return 0; -+} -+ - static int generic_phy_xlate_offs_flags(struct phy *phy, - struct ofnode_phandle_args *args) - { -@@ -88,6 +172,12 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) - goto err; - } - -+ ret = phy_alloc_counts(phy); -+ if (ret) { -+ debug("phy_alloc_counts() failed: %d\n", ret); -+ goto err; -+ } -+ - return 0; - - err: -@@ -118,6 +208,7 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name, - - int generic_phy_init(struct phy *phy) - { -+ struct phy_counts *counts; - struct phy_ops const *ops; - int ret; - -@@ -126,10 +217,19 @@ int generic_phy_init(struct phy *phy) - ops = phy_dev_ops(phy->dev); - if (!ops->init) - return 0; -+ -+ counts = phy_get_counts(phy); -+ if (counts->init_count > 0) { -+ counts->init_count++; -+ return 0; -+ } -+ - ret = ops->init(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to init %s: %d.\n", - phy->dev->name, ret); -+ else -+ counts->init_count = 1; - - return ret; - } -@@ -154,6 +254,7 @@ int generic_phy_reset(struct phy *phy) - - int generic_phy_exit(struct phy *phy) - { -+ struct phy_counts *counts; - struct phy_ops const *ops; - int ret; - -@@ -162,16 +263,28 @@ int generic_phy_exit(struct phy *phy) - ops = phy_dev_ops(phy->dev); - if (!ops->exit) - return 0; -+ -+ counts = phy_get_counts(phy); -+ if (counts->init_count == 0) -+ return 0; -+ if (counts->init_count > 1) { -+ counts->init_count--; -+ return 0; -+ } -+ - ret = ops->exit(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to exit %s: %d.\n", - phy->dev->name, ret); -+ else -+ counts->init_count = 0; - - return ret; - } - - int generic_phy_power_on(struct phy *phy) - { -+ struct phy_counts *counts; - struct phy_ops const *ops; - int ret; - -@@ -180,16 +293,26 @@ int generic_phy_power_on(struct phy *phy) - ops = phy_dev_ops(phy->dev); - if (!ops->power_on) - return 0; -+ -+ counts = phy_get_counts(phy); -+ if (counts->power_on_count > 0) { -+ counts->power_on_count++; -+ return 0; -+ } -+ - ret = ops->power_on(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to power on %s: %d.\n", - phy->dev->name, ret); -+ else -+ counts->power_on_count = 1; - - return ret; - } - - int generic_phy_power_off(struct phy *phy) - { -+ struct phy_counts *counts; - struct phy_ops const *ops; - int ret; - -@@ -198,10 +321,21 @@ int generic_phy_power_off(struct phy *phy) - ops = phy_dev_ops(phy->dev); - if (!ops->power_off) - return 0; -+ -+ counts = phy_get_counts(phy); -+ if (counts->power_on_count == 0) -+ return 0; -+ if (counts->power_on_count > 1) { -+ counts->power_on_count--; -+ return 0; -+ } -+ - ret = ops->power_off(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to power off %s: %d.\n", - phy->dev->name, ret); -+ else -+ counts->power_on_count = 0; - - return ret; - } -@@ -316,4 +450,7 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk) - UCLASS_DRIVER(phy) = { - .id = UCLASS_PHY, - .name = "phy", -+ .pre_probe = phy_uclass_pre_probe, -+ .pre_remove = phy_uclass_pre_remove, -+ .per_device_auto = sizeof(struct list_head), - }; -diff --git a/test/dm/phy.c b/test/dm/phy.c -index ecbd47bf12fd..df4c73fc701f 100644 ---- a/test/dm/phy.c -+++ b/test/dm/phy.c -@@ -79,12 +79,15 @@ static int dm_test_phy_ops(struct unit_test_state *uts) - ut_assertok(generic_phy_power_off(&phy1)); - - /* -- * test operations after exit(). -- * The sandbox phy driver does not allow it. -+ * Test power_on() failure after exit(). -+ * The sandbox phy driver does not allow power-on/off after -+ * exit, but the uclass counts power-on/init calls and skips -+ * calling the driver's ops when e.g. powering off an already -+ * powered-off phy. - */ - ut_assertok(generic_phy_exit(&phy1)); - ut_assert(generic_phy_power_on(&phy1) != 0); -- ut_assert(generic_phy_power_off(&phy1) != 0); -+ ut_assertok(generic_phy_power_off(&phy1)); - - /* - * test normal operations again (after re-init) -@@ -99,6 +102,17 @@ static int dm_test_phy_ops(struct unit_test_state *uts) - */ - ut_assertok(generic_phy_reset(&phy1)); - -+ /* -+ * Test power_off() failure after exit(). -+ * For this we need to call exit() while the phy is powered-on, -+ * so that the uclass actually calls the driver's power-off() -+ * and reports the resulting failure. -+ */ -+ ut_assertok(generic_phy_power_on(&phy1)); -+ ut_assertok(generic_phy_exit(&phy1)); -+ ut_assert(generic_phy_power_off(&phy1) != 0); -+ ut_assertok(generic_phy_power_on(&phy1)); -+ - /* PHY2 has a known problem with power off */ - ut_assertok(generic_phy_init(&phy2)); - ut_assertok(generic_phy_power_on(&phy2)); -@@ -106,8 +120,8 @@ static int dm_test_phy_ops(struct unit_test_state *uts) - - /* PHY3 has a known problem with power off and power on */ - ut_assertok(generic_phy_init(&phy3)); -- ut_asserteq(-EIO, generic_phy_power_off(&phy3)); -- ut_asserteq(-EIO, generic_phy_power_off(&phy3)); -+ ut_asserteq(-EIO, generic_phy_power_on(&phy3)); -+ ut_assertok(generic_phy_power_off(&phy3)); - - return 0; - } -@@ -145,3 +159,62 @@ static int dm_test_phy_bulk(struct unit_test_state *uts) - return 0; - } - DM_TEST(dm_test_phy_bulk, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -+ -+static int dm_test_phy_multi_exit(struct unit_test_state *uts) -+{ -+ struct phy phy1_method1; -+ struct phy phy1_method2; -+ struct phy phy1_method3; -+ struct udevice *parent; -+ -+ /* Get the same phy instance in 3 different ways. */ -+ ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, -+ "gen_phy_user", &parent)); -+ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method1)); -+ ut_asserteq(0, phy1_method1.id); -+ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method2)); -+ ut_asserteq(0, phy1_method2.id); -+ ut_asserteq_ptr(phy1_method1.dev, phy1_method1.dev); -+ -+ ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, -+ "gen_phy_user1", &parent)); -+ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method3)); -+ ut_asserteq(0, phy1_method3.id); -+ ut_asserteq_ptr(phy1_method1.dev, phy1_method3.dev); -+ -+ /* -+ * Test using the same PHY from different handles. -+ * In non-test code these could be in different drivers. -+ */ -+ -+ /* -+ * These must only call the driver's ops at the first init() -+ * and power_on(). -+ */ -+ ut_assertok(generic_phy_init(&phy1_method1)); -+ ut_assertok(generic_phy_init(&phy1_method2)); -+ ut_assertok(generic_phy_power_on(&phy1_method1)); -+ ut_assertok(generic_phy_power_on(&phy1_method2)); -+ ut_assertok(generic_phy_init(&phy1_method3)); -+ ut_assertok(generic_phy_power_on(&phy1_method3)); -+ -+ /* -+ * These must not call the driver's ops as other handles still -+ * want the PHY powered-on and initialized. -+ */ -+ ut_assertok(generic_phy_power_off(&phy1_method3)); -+ ut_assertok(generic_phy_exit(&phy1_method3)); -+ -+ /* -+ * We would get an error here if the generic_phy_exit() above -+ * actually called the driver's exit(), as the sandbox driver -+ * doesn't allow power-off() after exit(). -+ */ -+ ut_assertok(generic_phy_power_off(&phy1_method1)); -+ ut_assertok(generic_phy_power_off(&phy1_method2)); -+ ut_assertok(generic_phy_exit(&phy1_method1)); -+ ut_assertok(generic_phy_exit(&phy1_method2)); -+ -+ return 0; -+} -+DM_TEST(dm_test_phy_multi_exit, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); From 93f0ff8c4feb17229dc4e47f61a3aa4224bb3ec0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Feb 2022 16:48:19 +0000 Subject: [PATCH 177/351] 2022.04 RC2 --- aarch64-boards | 1 + sources | 2 +- uboot-tools.spec | 8 +- ...oll-frequency-to-improve-performance.patch | 178 ------------------ 4 files changed, 7 insertions(+), 182 deletions(-) delete mode 100644 v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch diff --git a/aarch64-boards b/aarch64-boards index 50427ad..de5f479 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -76,6 +76,7 @@ roc-pc-rk3399 rpi_3 rpi_4 rpi_arm64 +starqltechn sopine_baseboard tanix_tx6 teres_i diff --git a/sources b/sources index 870dc09..6267dad 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04-rc1.tar.bz2) = 95421d9ed69f46b727e9bbe53f8ecbd66a6779512c97342b02eb440adac175e6abeebbf5664f256397518e39602b9eee70a2b66ca21c2f13a3331bab755b9735 +SHA512 (u-boot-2022.04-rc2.tar.bz2) = 34af2d91a86e6864615ab09a2da7ec752beb56808d9eea652d425476cd1bbdf84d4e5f98740254f7cd91a04f11712d073450e74f4e07ae4180d845cb38620ee3 diff --git a/uboot-tools.spec b/uboot-tools.spec index 0185254..e04730a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc1 +%global candidate rc2 Name: uboot-tools Version: 2022.04 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -17,7 +17,6 @@ Source2: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Board fixes and enablement -Patch2: v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch @@ -250,6 +249,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Feb 15 2022 Peter Robinson - 2022.04-0.2.rc2 +- Update to 2022.04 RC2 + * Wed Feb 02 2022 Peter Robinson - 2022.04-0.1.rc1 - Update to 2022.04 RC1 diff --git a/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch b/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch deleted file mode 100644 index 5eb366c..0000000 --- a/v2-console-usb-kbd-Limit-poll-frequency-to-improve-performance.patch +++ /dev/null @@ -1,178 +0,0 @@ -From patchwork Wed Dec 22 22:51:26 2021 -Content-Type: text/plain; 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Wed, 22 Dec 2021 23:52:23 +0100 (CET) -Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) - header.from=icloud.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=twatson52@icloud.com -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=icloud.com; - s=1a1hai; t=1640213541; - bh=9Gu/RsbBH8Lwy0caxjtXwguQwc3tOXLqzye8cafMd78=; - h=From:To:Subject:Date:Message-Id:MIME-Version; - b=SkTQ1vLjDZUB4S3pQ+QOuMAQs7y78hvdCVG59JmuiBtL/pLL9IskzfDYEEVxmBQ8j - QIbZXSdaHlAH3tL3ajaqL0+IJp7J/yQ5/wpmmTsRMBdk0xcgSGilBCve35DMoKYFu1 - YSaXYI8GDtaBL5R9EGZAW6SekyeIWfyy03PQpawqJpTlqUNZuLdrr9mGRF/q2fbSHd - Fr4qzePCKzk3GsUhdfkh8hEDS4lOGVAPa3K2mGEpK6K/+Gv3rCckgYrV5IAJQ8YpdP - SCmRL3N03P5wkt5WiYasawJW4pcx92J2RXtyikC9fc6p67bGXkUJA+8dOtxlOyBY8E - 8TrKBWY9cvKTw== -Received: from jacobs-p52.memphis.edu - (99-122-90-201.lightspeed.mmphtn.sbcglobal.net [99.122.90.201]) - by st43p00im-ztbu10073601.me.com (Postfix) with ESMTPSA id 283205A0974; - Wed, 22 Dec 2021 22:52:21 +0000 (UTC) -From: Thomas Watson -To: u-boot@lists.denx.de -Cc: Thomas Watson , - Marek Vasut -Subject: [PATCH v2] console: usb: kbd: Limit poll frequency to improve - performance -Date: Wed, 22 Dec 2021 16:51:26 -0600 -Message-Id: <20211222225124.7154-1-twatson52@icloud.com> -X-Mailer: git-send-email 2.31.1 -MIME-Version: 1.0 -X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.425, 18.0.790 - definitions=2021-12-22_02:2021-12-22, - 2021-12-22 signatures=0 -X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 - malwarescore=0 - phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 mlxscore=0 - mlxlogscore=934 adultscore=0 classifier=spam adjust=0 reason=mlx - scancount=1 engine=8.0.1-2009150000 definitions=main-2112220119 -X-Mailman-Approved-At: Thu, 23 Dec 2021 00:15:58 +0100 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.38 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de -X-Virus-Status: Clean - -Using the XHCI driver, the function `usb_kbd_poll_for_event` takes -30-40ms to run. The exact time is dependent on the polling interval the -keyboard requests in its descriptor, and likely cannot be significantly -reduced without major rework to the XHCI driver. - -The U-Boot EFI console service sets a timer to poll the keyboard every 5 -microseconds, and this timer is checked every time a block is read off -disk. The net effect is that, on my system, loading a ~40MiB kernel and -initrd takes about 62 seconds with a slower keyboard and 53 seconds -with a faster one, with the vast majority of the time spent polling the -keyboard. - -To solve this problem, this patch adds a 20ms delay between consecutive -calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the -total loading time to under half a second for both keyboards, and does -not impact the perceived keystroke latency. - -Signed-off-by: Thomas Watson ---- -This revision wraps the comment at 80 characters and also should not -have been corrupted by my e-mail client. - - common/usb_kbd.c | 20 +++++++++++++++----- - 1 file changed, 15 insertions(+), 5 deletions(-) - -diff --git a/common/usb_kbd.c b/common/usb_kbd.c -index afad260d3d..5408c821b4 100644 ---- a/common/usb_kbd.c -+++ b/common/usb_kbd.c -@@ -118,7 +118,7 @@ struct usb_kbd_pdata { - extern int __maybe_unused net_busy_flag; - - /* The period of time between two calls of usb_kbd_testc(). */ --static unsigned long __maybe_unused kbd_testc_tms; -+static unsigned long kbd_testc_tms; - - /* Puts character in the queue and sets up the in and out pointer. */ - static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c) -@@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev) - struct usb_device *usb_kbd_dev; - struct usb_kbd_pdata *data; - -+ /* -+ * Polling the keyboard for an event can take dozens of milliseconds. -+ * Add a delay between polls to avoid blocking activity which polls -+ * rapidly, like the UEFI console timer. -+ */ -+ unsigned long poll_delay = CONFIG_SYS_HZ / 50; -+ - #ifdef CONFIG_CMD_NET - /* - * If net_busy_flag is 1, NET transfer is running, - * then we check key-pressed every second (first check may be - * less than 1 second) to improve TFTP booting performance. - */ -- if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ)) -- return 0; -- kbd_testc_tms = get_timer(0); -+ if (net_busy_flag) -+ poll_delay = CONFIG_SYS_HZ; - #endif -+ - dev = stdio_get_by_name(sdev->name); - usb_kbd_dev = (struct usb_device *)dev->priv; - data = usb_kbd_dev->privptr; - -- usb_kbd_poll_for_event(usb_kbd_dev); -+ if (get_timer(kbd_testc_tms) >= poll_delay) { -+ usb_kbd_poll_for_event(usb_kbd_dev); -+ kbd_testc_tms = get_timer(0); -+ } - - return !(data->usb_in_pointer == data->usb_out_pointer); - } From e06a81622d476c077573e504e78c97f92d123778 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Feb 2022 17:06:52 +0000 Subject: [PATCH 178/351] BR: libuuid-devel --- uboot-tools.spec | 1 + 1 file changed, 1 insertion(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index e04730a..1a4127c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -46,6 +46,7 @@ BuildRequires: python3-libfdt BuildRequires: flex bison BuildRequires: openssl-devel BuildRequires: SDL-devel +BuildRequires: libuuid-devel BuildRequires: swig %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 From be009d93163e00efee372cde135e84a36921acc0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Feb 2022 18:51:20 +0000 Subject: [PATCH 179/351] add gnutls-devel --- uboot-tools.spec | 1 + 1 file changed, 1 insertion(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index 1a4127c..2125458 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -47,6 +47,7 @@ BuildRequires: flex bison BuildRequires: openssl-devel BuildRequires: SDL-devel BuildRequires: libuuid-devel +BuildRequires: gnutls-devel BuildRequires: swig %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 From 359979e25b7a54bdfb46b6162dca116fbea6325d Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Sat, 19 Feb 2022 11:11:28 +0100 Subject: [PATCH 180/351] Add support for another rk3399 device --- aarch64-boards | 1 + ...nitial-support-for-the-PinePhone-Pro.patch | 886 ++++++++++++++++++ uboot-tools.spec | 5 +- 3 files changed, 890 insertions(+), 2 deletions(-) create mode 100644 rockchip-Add-initial-support-for-the-PinePhone-Pro.patch diff --git a/aarch64-boards b/aarch64-boards index de5f479..a38107c 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -58,6 +58,7 @@ pine64-lts pine64_plus pinebook pinebook-pro-rk3399 +pinephone-pro-rk3399 pine_h64 pinephone pinetab diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch new file mode 100644 index 0000000..3dc7614 --- /dev/null +++ b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -0,0 +1,886 @@ +From: Martijn Braam +Subject: [PATCH] rockchip: Add initial support for the PinePhone Pro +Date: Thu, 21 Oct 2021 19:18:43 +0200 + +This is a new device by PINE64 that's very similar to the Pinebook Pro +that's already supported. + +Specification: +- Rockchip RK3399 +- 4GB Dual-Channel LPDDR4 +- 128GB eMMC +- mSD card slot +- AP6255 for 802.11ac WiFi and Bluetooth +- 6 inch 720*1440 DSI display +- Quectel EG25g usb modem +- Type-C port with alt-mode display (DP 1.2) and PD charging. + +Signed-off-by: Martijn Braam +--- + + arch/arm/dts/Makefile | 1 + + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 44 ++ + arch/arm/dts/rk3399-pinephone-pro.dts | 520 ++++++++++++++++++ + arch/arm/mach-rockchip/rk3399/Kconfig | 8 + + board/pine64/pinephone-pro-rk3399/Kconfig | 15 + + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 + + board/pine64/pinephone-pro-rk3399/Makefile | 1 + + .../pinephone-pro-rk3399.c | 57 ++ + configs/pinephone-pro-rk3399_defconfig | 92 ++++ + include/configs/pinephone-pro-rk3399.h | 23 + + 10 files changed, 769 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi + create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts + create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig + create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS + create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile + create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c + create mode 100644 configs/pinephone-pro-rk3399_defconfig + create mode 100644 include/configs/pinephone-pro-rk3399.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index ed3d360bb1..3206370226 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -137,6 +137,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ + rk3399-nanopi-r4s.dtb \ + rk3399-orangepi.dtb \ + rk3399-pinebook-pro.dtb \ ++ rk3399-pinephone-pro.dtb \ + rk3399-puma-haikou.dtb \ + rk3399-roc-pc.dtb \ + rk3399-roc-pc-mezzanine.dtb \ +diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +new file mode 100644 +index 0000000000..9d44db5978 +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +@@ -0,0 +1,44 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2019 Peter Robinson ++ * Copyright (C) 2021 Martijn Braam ++ */ ++ ++#include "rk3399-u-boot.dtsi" ++#include "rk3399-sdram-lpddr4-100.dtsi" ++ ++/ { ++ aliases { ++ spi0 = &spi1; ++ }; ++ ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ }; ++ ++ config { ++ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ ++ }; ++}; ++ ++&i2c0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rk818 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&sdhci { ++ max-frequency = <25000000>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&sdmmc { ++ max-frequency = <20000000>; ++ u-boot,dm-pre-reloc; ++}; +diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts +new file mode 100644 +index 0000000000..3fe1845ced +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinephone-pro.dts +@@ -0,0 +1,520 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 Martijn Braam ++ */ ++ ++/dts-v1/; ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Pro"; ++ compatible = "pine64,pinephone-pro", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ }; ++ ++ /* Power tree */ ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sysin"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ /* Main 3.3v supply */ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk818: pmic@1c { ++ compatible = "rockchip,rk818"; ++ reg = <0x1c>; ++ interrupt-parent = <&gpio1>; ++ interrupts = ; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc_sysin>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ regulators { ++ vdd_cpu_l: DCDC_REG1 { ++ regulator-name = "vdd_cpu_1"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_center: DCDC_REG2 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG1 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_touch: LDO_REG2 { ++ regulator-name = "vcc3v0_touch"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG3 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_power_on: LDO_REG4 { ++ regulator-name = "vcc_power_on"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG5 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG7 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s3: LDO_REG8 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG9 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ boost_otg: DCDC_BOOST { ++ regulator-name = "boost_otg"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <5000000>; ++ }; ++ }; ++ ++ otg_switch: OTG_SWITCH { ++ regulator-name = "otg_switch"; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_pin>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_pin>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++ ++ fusb0: typec-portc@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio1>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ status = "okay"; ++ }; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; ++ audio-supply = <&vcca1v8_codec>; ++ sdmmc-supply = <&vcc_sd>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ bt { ++ bt_enable_h: bt-enable-h { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_l: bt-host-wake-l { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ bt_wake_l: bt-wake-l { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ work_led_pin: work-led-pin { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ diy_led_pin: diy-led-pin { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ pcie_perst: pcie-perst { ++ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_pwr_en: pcie-pwr-en { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_pin: vsel1-pin { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_pin: vsel2-pin { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdcard { ++ sdmmc0_pwr_h: sdmmc0-pwr-h { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec_en: vcc5v0_typec_en { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ vmmc-supply = <&vcc3v3_s3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index 17628f9171..3ba603ca80 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -28,6 +28,13 @@ config TARGET_PINEBOOK_PRO_RK3399 + with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, + 1920*1080 screen and all the usual laptop features. + ++config TARGET_PINEPHONE_PRO_RK3399 ++ bool "PinePhone Pro" ++ help ++ PinePhone Pro is a phone based on the Rockchip rk3399 SoC ++ with 4Gb RAM, onboard eMMC, USB-C, a headphone jack, ++ 720x1440 screen and an external Quectel USB modem. ++ + config TARGET_PUMA_RK3399 + bool "Theobroma Systems RK3399-Q7 (Puma)" + help +@@ -154,6 +161,7 @@ endif # BOOTCOUNT_LIMIT + source "board/firefly/roc-pc-rk3399/Kconfig" + source "board/google/gru/Kconfig" + source "board/pine64/pinebook-pro-rk3399/Kconfig" ++source "board/pine64/pinephone-pro-rk3399/Kconfig" + source "board/pine64/rockpro64_rk3399/Kconfig" + source "board/rockchip/evb_rk3399/Kconfig" + source "board/theobroma-systems/puma_rk3399/Kconfig" +diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig +new file mode 100644 +index 0000000000..13d6465ae6 +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_PINEPHONE_PRO_RK3399 ++ ++config SYS_BOARD ++ default "pinephone-pro-rk3399" ++ ++config SYS_VENDOR ++ default "pine64" ++ ++config SYS_CONFIG_NAME ++ default "pinephone-pro-rk3399" ++ ++config BOARD_SPECIFIC_OPTIONS ++ def_bool y ++ ++endif +diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS +new file mode 100644 +index 0000000000..9ca4fc4cbe +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS +@@ -0,0 +1,8 @@ ++PINEPHONE_PRO ++M: Martijn Braam ++S: Maintained ++F: board/pine64/rk3399-pinephone-pro/ ++F: include/configs/rk3399-pinephone-pro.h ++F: arch/arm/dts/rk3399-pinephone-pro.dts ++F: arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi ++F: configs/pinephone-pro-rk3399_defconfig +diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile +new file mode 100644 +index 0000000000..8d9203053e +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/Makefile +@@ -0,0 +1 @@ ++obj-y += pinephone-pro-rk3399.o +diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +new file mode 100644 +index 0000000000..8efeb6ea3d +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +@@ -0,0 +1,57 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2019 Vasily Khoruzhick ++ * (C) Copyright 2021 Martijn Braam ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define GRF_IO_VSEL_BT565_SHIFT 0 ++#define PMUGRF_CON0_VSEL_SHIFT 8 ++ ++#ifdef CONFIG_MISC_INIT_R ++static void setup_iodomain(void) ++{ ++ struct rk3399_grf_regs *grf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); ++ struct rk3399_pmugrf_regs *pmugrf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); ++ ++ /* BT565 is in 1.8v domain */ ++ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); ++ ++ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ ++ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); ++} ++ ++int misc_init_r(void) ++{ ++ const u32 cpuid_offset = 0x7; ++ const u32 cpuid_length = 0x10; ++ u8 cpuid[cpuid_length]; ++ int ret; ++ ++ setup_iodomain(); ++ ++ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); ++ if (ret) ++ return ret; ++ ++ ret = rockchip_cpuid_set(cpuid, cpuid_length); ++ if (ret) ++ return ret; ++ ++ ret = rockchip_setup_macaddr(); ++ ++ return ret; ++} ++ ++#endif +diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig +new file mode 100644 +index 0000000000..2cf80f7d35 +--- /dev/null ++++ b/configs/pinephone-pro-rk3399_defconfig +@@ -0,0 +1,92 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x8000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_TARGET_PINEPHONE_PRO_RK3399=y ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0x800800 ++CONFIG_BOOTDELAY=3 ++CONFIG_USE_PREBOOT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_TPL=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_DM_ETH=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y ++CONFIG_DM_PMIC_FAN53555=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM_RK3399_LPDDR4=y ++CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SPI=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DISPLAY_ROCKCHIP_EDP=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y +diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h +new file mode 100644 +index 0000000000..fefa793fdd +--- /dev/null ++++ b/include/configs/pinephone-pro-rk3399.h +@@ -0,0 +1,23 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd ++ * Copyright (C) 2020 Peter Robinson ++ * Copyright (C) 2021 Martijn Braam ++ */ ++ ++#ifndef __PINEPHONE_PRO_RK3399_H ++#define __PINEPHONE_PRO_RK3399_H ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdin=serial,usbkbd\0" \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#include ++ ++#define SDRAM_BANK_SIZE (2UL << 30) ++ ++#define CONFIG_USB_OHCI_NEW ++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 ++ ++#endif diff --git a/uboot-tools.spec b/uboot-tools.spec index 2125458..7a267f5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -23,6 +23,7 @@ Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch # Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch BuildRequires: bc @@ -117,7 +118,7 @@ do echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -128,7 +129,7 @@ do %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ # build spi images for rockchip boards with SPI flash - rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) + rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rkspi[*]} " == *" $board "* ]]; then echo "Board: $board with SPI flash" builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi From 6706eb16a4eced58eb53b2f702c8196673a84f78 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 8 Mar 2022 09:53:45 +0000 Subject: [PATCH 181/351] 2022.04 RC3 --- sources | 2 +- uboot-tools.spec | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 6267dad..67d2217 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04-rc2.tar.bz2) = 34af2d91a86e6864615ab09a2da7ec752beb56808d9eea652d425476cd1bbdf84d4e5f98740254f7cd91a04f11712d073450e74f4e07ae4180d845cb38620ee3 +SHA512 (u-boot-2022.04-rc3.tar.bz2) = 0c6c2534709045461872a348b988863197743b58732b6ba6a25069dd31de96312b699c571f9af4bcf40d9cdbe920cf6378efde876669e5e421a405e4d15359ec diff --git a/uboot-tools.spec b/uboot-tools.spec index 7a267f5..65c0415 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc2 +%global candidate rc3 Name: uboot-tools Version: 2022.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -252,6 +252,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Mar 08 2022 Peter Robinson - 2022.04-0.3.rc3 +- Update to 2022.04 RC3 +- Enable new Rockchip devices + * Tue Feb 15 2022 Peter Robinson - 2022.04-0.2.rc2 - Update to 2022.04 RC2 From 1b64b89c2dd5779207d6721d1f98dfd21f2c7d4c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 11 Mar 2022 14:40:53 +0000 Subject: [PATCH 182/351] Add the ability to do a tools only build, drop old el7 support --- uboot-tools.spec | 37 ++++++++++++++++--------------------- 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 65c0415..bd1a217 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,5 @@ %global candidate rc3 +%bcond_without toolsonly Name: uboot-tools Version: 2022.04 @@ -27,28 +28,19 @@ Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch # Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch BuildRequires: bc +BuildRequires: bison BuildRequires: dtc -BuildRequires: make -BuildRequires: perl-interpreter -# Requirements for building on el7 -%if 0%{?rhel} == 7 -BuildRequires: devtoolset-7-build -BuildRequires: devtoolset-7-binutils -BuildRequires: devtoolset-7-gcc -BuildRequires: python2-devel -BuildRequires: python2-setuptools -BuildRequires: python2-libfdt -%else +BuildRequires: flex BuildRequires: gcc +BuildRequires: gnutls-devel +BuildRequires: libuuid-devel +BuildRequires: make +BuildRequires: openssl-devel +BuildRequires: perl-interpreter BuildRequires: python3-devel BuildRequires: python3-setuptools BuildRequires: python3-libfdt -%endif -BuildRequires: flex bison -BuildRequires: openssl-devel BuildRequires: SDL-devel -BuildRequires: libuuid-devel -BuildRequires: gnutls-devel BuildRequires: swig %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 @@ -59,6 +51,7 @@ Requires: dtc This package contains a few U-Boot utilities - mkimage for creating boot images and fw_printenv/fw_setenv for manipulating the boot environment variables. +%if %{with toolsonly} %ifarch aarch64 %package -n uboot-images-armv8 Summary: U-Boot firmware images for aarch64 boards @@ -76,6 +69,7 @@ BuildArch: noarch %description -n uboot-images-armv7 U-Boot firmware binaries for armv7 boards %endif +%endif %prep %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}} @@ -85,14 +79,10 @@ cp %SOURCE1 %SOURCE2 . %build mkdir builds -%if 0%{?rhel} == 7 -#Enabling DTS for .el7 -%{?enable_devtoolset7:%{enable_devtoolset7}} -%endif - %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ +%if %{with toolsonly} # U-Boot device firmwares don't currently support LTO %define _lto_cflags %{nil} @@ -148,6 +138,7 @@ do fi done +%endif %endif %install @@ -155,6 +146,7 @@ mkdir -p %{buildroot}%{_bindir} mkdir -p %{buildroot}%{_mandir}/man1 mkdir -p %{buildroot}%{_datadir}/uboot/ +%if %{with toolsonly} %ifarch aarch64 for board in $(ls builds) do @@ -208,6 +200,7 @@ do fi done %endif +%endif for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes kwboot do @@ -241,6 +234,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ +%if %{with toolsonly} %ifarch aarch64 %files -n uboot-images-armv8 %{_datadir}/uboot/* @@ -250,6 +244,7 @@ cp -p board/warp7/README builds/docs/README.warp7 %files -n uboot-images-armv7 %{_datadir}/uboot/* %endif +%endif %changelog * Tue Mar 08 2022 Peter Robinson - 2022.04-0.3.rc3 From 2a3a46103d3c40bd3214a62c6af6f831e1a552e4 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 28 Mar 2022 17:37:15 +0100 Subject: [PATCH 183/351] 2022.04 RC5 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 67d2217..20a29f2 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04-rc3.tar.bz2) = 0c6c2534709045461872a348b988863197743b58732b6ba6a25069dd31de96312b699c571f9af4bcf40d9cdbe920cf6378efde876669e5e421a405e4d15359ec +SHA512 (u-boot-2022.04-rc5.tar.bz2) = 9450786f7decedc9ccd6973c2d3a1554edc10dcc64285e3793341291d003bf7676e8a9f146191b1db7869d1855a1da5c8dcbd02a76c828ad9a95f78297bf0d5e diff --git a/uboot-tools.spec b/uboot-tools.spec index bd1a217..594f15f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc3 +%global candidate rc5 %bcond_without toolsonly Name: uboot-tools Version: 2022.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -247,6 +247,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Mar 28 2022 Peter Robinson - 2022.04-0.4.rc5 +- Update to 2022.04 RC5 + * Tue Mar 08 2022 Peter Robinson - 2022.04-0.3.rc3 - Update to 2022.04 RC3 - Enable new Rockchip devices From 7b988dd8fc35fbfb1de902e64573577726a6671d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 28 Mar 2022 17:48:50 +0100 Subject: [PATCH 184/351] Upload fixes source, add ncurses-devel --- sources | 2 +- uboot-tools.spec | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/sources b/sources index 20a29f2..ebcb769 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04-rc5.tar.bz2) = 9450786f7decedc9ccd6973c2d3a1554edc10dcc64285e3793341291d003bf7676e8a9f146191b1db7869d1855a1da5c8dcbd02a76c828ad9a95f78297bf0d5e +SHA512 (u-boot-2022.04-rc5.tar.bz2) = 6fbd2eeb0155ba3ab0460bc0a31ab5434f059b1f8eb7a182ee147583c8b827ef9979601fd147bfe9f617998433a2292cd2491f5a03cfc8bf90127fc45e585f1a diff --git a/uboot-tools.spec b/uboot-tools.spec index 594f15f..905a847 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -35,6 +35,7 @@ BuildRequires: gcc BuildRequires: gnutls-devel BuildRequires: libuuid-devel BuildRequires: make +BuildRequires: ncurses-devel BuildRequires: openssl-devel BuildRequires: perl-interpreter BuildRequires: python3-devel From b6626c87f42b02118991723ca64ef29a21e1f139 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 29 Mar 2022 21:36:14 +0100 Subject: [PATCH 185/351] cleanup some old patches --- ...to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch | 244 ------------------ dragonboard-fixes.patch | 115 --------- uboot-tools.spec | 1 - 3 files changed, 360 deletions(-) delete mode 100644 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch delete mode 100644 dragonboard-fixes.patch diff --git a/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch b/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch deleted file mode 100644 index 0f762d9..0000000 --- a/0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch +++ /dev/null @@ -1,244 +0,0 @@ -From 53f3d6e9219a36f375e27150b8ec1088624f1aa0 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 21 Dec 2021 17:25:35 +0000 -Subject: [PATCH] udoo_neo: Move to DM for REGUALTOR/PMIC/I2C drivers - -This moves over the PMIC power init to DM and the associated i2c and -regulator bits. - -Signed-off-by: Peter Robinson ---- - board/udoo/neo/neo.c | 139 +++---------------------------------- - configs/udoo_neo_defconfig | 10 +-- - include/configs/udoo_neo.h | 5 -- - 3 files changed, 15 insertions(+), 139 deletions(-) - -diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c -index 5e40583ab4..9e2a66996c 100644 ---- a/board/udoo/neo/neo.c -+++ b/board/udoo/neo/neo.c -@@ -51,11 +51,6 @@ enum { - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - --#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ -- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ -- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ -- PAD_CTL_ODE) -- - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ - PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) -@@ -83,135 +78,25 @@ int dram_init(void) - return 0; - } - --#ifdef CONFIG_SYS_I2C_MXC --#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) --/* I2C1 for PMIC */ --static struct i2c_pads_info i2c_pad_info1 = { -- .scl = { -- .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC, -- .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC, -- .gp = IMX_GPIO_NR(1, 0), -- }, -- .sda = { -- .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC, -- .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC, -- .gp = IMX_GPIO_NR(1, 1), -- }, --}; --#endif -- --#if CONFIG_IS_ENABLED(POWER_LEGACY) - int power_init_board(void) - { -- struct pmic *p; -- int ret; -- unsigned int reg, rev_id; -- -- ret = power_pfuze3000_init(PFUZE3000_I2C_BUS); -- if (ret) -- return ret; -- -- p = pmic_get("PFUZE3000"); -- ret = pmic_probe(p); -- if (ret) -- return ret; -+ struct udevice *dev; -+ int ret, dev_id, rev_id; - -- pmic_reg_read(p, PFUZE3000_DEVICEID, ®); -- pmic_reg_read(p, PFUZE3000_REVID, &rev_id); -- printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); -- -- /* disable Low Power Mode during standby mode */ -- pmic_reg_read(p, PFUZE3000_LDOGCTL, ®); -- reg |= 0x1; -- ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg); -- if (ret) -+ ret = pmic_get("pfuze3000@8", &dev); -+ if (ret == -ENODEV) -+ return 0; -+ if (ret != 0) - return ret; - -- ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc); -- if (ret) -- return ret; -+ dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID); -+ rev_id = pmic_reg_read(dev, PFUZE3000_REVID); -+ printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id); - -- ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc); -- if (ret) -- return ret; -- -- ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc); -- if (ret) -- return ret; -- -- ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc); -- if (ret) -- return ret; -- -- /* set SW1A standby voltage 0.975V */ -- pmic_reg_read(p, PFUZE3000_SW1ASTBY, ®); -- reg &= ~0x3f; -- reg |= PFUZE3000_SW1AB_SETP(9750); -- ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg); -- if (ret) -- return ret; -- -- /* set SW1B standby voltage 0.975V */ -- pmic_reg_read(p, PFUZE3000_SW1BSTBY, ®); -- reg &= ~0x3f; -- reg |= PFUZE3000_SW1AB_SETP(9750); -- ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg); -- if (ret) -- return ret; -- -- /* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */ -- pmic_reg_read(p, PFUZE3000_SW1ACONF, ®); -- reg &= ~0xc0; -- reg |= 0x40; -- ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg); -- if (ret) -- return ret; -- -- /* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */ -- pmic_reg_read(p, PFUZE3000_SW1BCONF, ®); -- reg &= ~0xc0; -- reg |= 0x40; -- ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg); -- if (ret) -- return ret; -- -- /* set VDD_ARM_IN to 1.350V */ -- pmic_reg_read(p, PFUZE3000_SW1AVOLT, ®); -- reg &= ~0x3f; -- reg |= PFUZE3000_SW1AB_SETP(13500); -- ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg); -- if (ret) -- return ret; -- -- /* set VDD_SOC_IN to 1.350V */ -- pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®); -- reg &= ~0x3f; -- reg |= PFUZE3000_SW1AB_SETP(13500); -- ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg); -- if (ret) -- return ret; -- -- /* set DDR_1_5V to 1.350V */ -- pmic_reg_read(p, PFUZE3000_SW3VOLT, ®); -- reg &= ~0x0f; -- reg |= PFUZE3000_SW3_SETP(13500); -- ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg); -- if (ret) -- return ret; -- -- /* set VGEN2_1V5 to 1.5V */ -- pmic_reg_read(p, PFUZE3000_VLDO2CTL, ®); -- reg &= ~0x0f; -- reg |= PFUZE3000_VLDO_SETP(15000); -- /* enable */ -- reg |= 0x10; -- ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg); -- if (ret) -- return ret; -+ pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1); - - return 0; - } --#endif - - static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -@@ -294,10 +179,6 @@ int board_init(void) - gpio_request(IMX_GPIO_NR(4, 16), "ncp692"); - gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); - --#ifdef CONFIG_SYS_I2C_MXC -- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); --#endif -- - setup_fec(); - - return 0; -diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig -index ca08de1bd4..9177bdba65 100644 ---- a/configs/udoo_neo_defconfig -+++ b/configs/udoo_neo_defconfig -@@ -10,8 +10,9 @@ CONFIG_ENV_SIZE=0x2000 - CONFIG_ENV_OFFSET=0x80000 - CONFIG_MX6SX=y - CONFIG_TARGET_UDOO_NEO=y --CONFIG_SYS_I2C_MXC_I2C1=y -+CONFIG_DM_I2C=y - CONFIG_DM_GPIO=y -+CONFIG_DM_MMC=y - CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" - CONFIG_SPL_TEXT_BASE=0x00908000 - CONFIG_SPL_MMC=y -@@ -39,8 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_SYS_MMC_ENV_DEV=1 - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y - CONFIG_BOUNCE_BUFFER=y --CONFIG_SYS_I2C_LEGACY=y --CONFIG_SPL_SYS_I2C_LEGACY=y - CONFIG_SYS_I2C_MXC=y - CONFIG_FSL_USDHC=y - CONFIG_PHYLIB=y -@@ -52,11 +51,12 @@ CONFIG_FEC_MXC=y - CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y --CONFIG_POWER_LEGACY=y --CONFIG_POWER_I2C=y -+CONFIG_DM_PMIC=y -+CONFIG_DM_PMIC_PFUZE100=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_ANATOP=y - CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_PFUZE100=y - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_USB_STORAGE=y -diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h -index 3a7cb050b1..ac13c3e57f 100644 ---- a/include/configs/udoo_neo.h -+++ b/include/configs/udoo_neo.h -@@ -68,9 +68,4 @@ - #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - --/* PMIC */ --#define CONFIG_POWER_PFUZE3000 --#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 --#define PFUZE3000_I2C_BUS 0 -- - #endif /* __CONFIG_H */ --- -2.34.1 - diff --git a/dragonboard-fixes.patch b/dragonboard-fixes.patch deleted file mode 100644 index c49ea50..0000000 --- a/dragonboard-fixes.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001 -From: Rob Clark -Date: Wed, 21 Jun 2017 14:21:15 -0400 -Subject: [PATCH 1/3] WIP: fix usb - ---- - common/usb_storage.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/common/usb_storage.c b/common/usb_storage.c -index d92ebb6eb19..9df3c3daaf4 100644 ---- a/common/usb_storage.c -+++ b/common/usb_storage.c -@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss) - - static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) - { -- int retries = 10; -+ int retries = 20; - - do { - memset(&srb->cmd[0], 0, 12); -@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) - if ((srb->sense_buf[2] == 0x02) && - (srb->sense_buf[12] == 0x3a)) - return -1; -- mdelay(100); -+ mdelay(250); - } while (retries--); - - return -1; --- -2.19.1 - -From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001 -From: Rob Clark -Date: Mon, 3 Jul 2017 08:34:37 -0400 -Subject: [PATCH 2/3] HACK: disable emmc - -Hitting some timeout which makes boot take much longer. And -uefi/boot/rootfs partitions will be on sd-card or usb disk, etc, -so we can just ignore emmc. ---- - arch/arm/dts/dragonboard410c.dts | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts -index fa348bc621e..bfe7f15d5ed 100644 ---- a/arch/arm/dts/dragonboard410c.dts -+++ b/arch/arm/dts/dragonboard410c.dts -@@ -106,6 +106,7 @@ - #phy-cells = <0>; - }; - -+/* - sdhci@07824000 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0x7824900 0x11c 0x7824000 0x800>; -@@ -115,6 +116,7 @@ - clock = <&clkc 0>; - clock-frequency = <100000000>; - }; -+*/ - - sdhci@07864000 { - compatible = "qcom,sdhci-msm-v4"; --- -2.19.1 - -From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 4 Sep 2018 12:21:59 +0100 -Subject: [PATCH 3/3] add options for dm410c config - ---- - configs/dragonboard410c_defconfig | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig -index a55abaf8df5..4ece0cafbe4 100644 ---- a/configs/dragonboard410c_defconfig -+++ b/configs/dragonboard410c_defconfig -@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1 - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_FIT=y - CONFIG_OF_BOARD_SETUP=y -+CONFIG_FAT_WRITE=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y - CONFIG_MISC_INIT_R=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y - CONFIG_PMIC_PM8916=y - CONFIG_MSM_SERIAL=y - CONFIG_SPMI_MSM=y -+CONFIG_DM_ETH=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_VIDEO=y -+# CONFG_VIDEO_BPP8 is not set -+CONFIG_NO_FB_CLEAR=y -+CONFIG_VIDEO_SIMPLE=y -+CONFIG_USB_KEYBOARD=y - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_USB_EHCI_HCD=y -@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_ASIX88179=y - CONFIG_USB_ETHER_MCS7830=y -+CONFIG_USB_ETHER_RTL8152=y - CONFIG_USB_ETHER_SMSC95XX=y - CONFIG_OF_LIBFDT_OVERLAY=y --- -2.19.1 - diff --git a/uboot-tools.spec b/uboot-tools.spec index 905a847..ef878b5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -25,7 +25,6 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -# Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch BuildRequires: bc BuildRequires: bison From ab63b190498296c2b1cf3d9dc612b9980fd353a7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 4 Apr 2022 15:37:35 +0100 Subject: [PATCH 186/351] 2022.04 GA --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index ebcb769..f3d74be 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04-rc5.tar.bz2) = 6fbd2eeb0155ba3ab0460bc0a31ab5434f059b1f8eb7a182ee147583c8b827ef9979601fd147bfe9f617998433a2292cd2491f5a03cfc8bf90127fc45e585f1a +SHA512 (u-boot-2022.04.tar.bz2) = 113056e542db049eea3b1d1ccbbe52c79539a2f9bb6129d284ec9200dcffec7bd5969821913a9899631575b80991c84ad01bc845b4bba614e42e54466d9f0d64 diff --git a/uboot-tools.spec b/uboot-tools.spec index ef878b5..e147faf 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc5 +#global candidate rc0 %bcond_without toolsonly Name: uboot-tools Version: 2022.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -247,6 +247,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon Apr 04 2022 Peter Robinson - 2022.04-1 +- Update to 2022.04 GA + * Mon Mar 28 2022 Peter Robinson - 2022.04-0.4.rc5 - Update to 2022.04 RC5 From 9cc572a2b0851d79b4457e7591564fb6797da32c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 26 Apr 2022 12:49:33 +0100 Subject: [PATCH 187/351] Drop ARMv7 builds --- arm-boards | 141 ----------------------------------------------- uboot-tools.spec | 62 +++------------------ 2 files changed, 7 insertions(+), 196 deletions(-) delete mode 100644 arm-boards diff --git a/arm-boards b/arm-boards deleted file mode 100644 index a6b85e5..0000000 --- a/arm-boards +++ /dev/null @@ -1,141 +0,0 @@ -A10-OLinuXino-Lime -A10s-OLinuXino-M -A13-OLinuXino -A13-OLinuXinoM -A20-Olimex-SOM-EVB -A20-OLinuXino-Lime -A20-OLinuXino-Lime2 -A20-OLinuXino_MICRO -am335x_evm -am57xx_evm -Ampe_A76 -apalis_imx6 -arndale -Auxtek-T003 -Auxtek-T004 -ba10_tv_box -Bananapi -bananapi_m1_plus -bananapi_m2_berry -Bananapi_m2m -bananapi_m2_plus_h3 -Bananapi_M2_Ultra -bananapi_m2_zero -Bananapro -chiliboard -CHIP -Chuwi_V7_CW0825 -clearfog -cm_fx6 -Colombus -colorfly_e708_q1 -CSQ_CS908 -Cubieboard -Cubieboard2 -Cubieboard4 -Cubietruck -Cubietruck_plus -db-mv784mp-gp -difrnce_dit4350 -dserve_dsrv9703c -evb-rk3229 -firefly-rk3288 -helios4 -Hummingbird_A31 -Hyundai_A7HD -i12-tvbox -icnova-a20-swac -inet1 -iNet_3F -iNet_3W -inet86dz -iNet_86VS -inet97fv2 -inet98v_rev2 -inet9f_rev03 -inet_q972 -Itead_Ibox_A20 -jesurun_q5 -jetson-tk1 -Lamobo_R1 -libretech_all_h3_cc_h2_plus -Linksprite_pcDuino -Linksprite_pcDuino3 -Linksprite_pcDuino3_Nano -liteboard -marsboard -Marsboard_A10 -Mele_A1000 -Mele_A1000G_quad -Mele_I7 -Mele_M3 -Mele_M5 -Mele_M9 -Mini-X -mk802 -mk802_a10s -mk802ii -MK808C -MSI_Primo73 -MSI_Primo81 -mx6cuboxi -nanopi_m1 -nanopi_m1_plus -nanopi_neo -novena -odroid -odroid-xu3 -omap3_beagle -omap4_panda -omap5_uevm -Orangepi -orangepi_2 -orangepi_lite -Orangepi_mini -orangepi_one -orangepi_pc -orangepi_pc_plus -orangepi_plus -orangepi_plus2e -orangepi_r1 -orangepi_zero -origen -paz00 -pinecube -polaroid_mid2809pxe04 -pov_protab2_ips9 -q8_a13_tablet -q8_a23_tablet_800x480 -q8_a33_tablet_1024x600 -q8_a33_tablet_800x480 -qemu_arm -r7-tv-dongle -riotboard -rock -rock2 -rock-pi-n8-rk3288 -rpi_2 -rpi_3_32b -rpi_4_32b -Sinlinx_SinA31s -Sinovoip_BPI_M2 -Sinovoip_BPI_M3 -stih410-b2260 -stm32mp15_basic -sunxi_Gemei_G9 -tbs_a711 -tinker-rk3288 -tinker-s-rk3288 -trimslice -turris_omnia -udoo -udoo_neo -usbarmory -UTOO_P66 -wandboard -warp7 -Wexler_TAB7200 -Wits_Pro_A20_DKT -xilinx_zynq_virt -Yones_Toptech_BS1078_V2 -zeropi diff --git a/uboot-tools.spec b/uboot-tools.spec index e147faf..c2904dd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -10,8 +10,7 @@ URL: http://www.denx.de/wiki/U-Boot ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 -Source1: arm-boards -Source2: aarch64-boards +Source1: aarch64-boards # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition @@ -60,21 +59,12 @@ BuildArch: noarch %description -n uboot-images-armv8 U-Boot firmware binaries for aarch64 boards %endif - -%ifarch %{arm} -%package -n uboot-images-armv7 -Summary: U-Boot firmware images for armv7 boards -BuildArch: noarch - -%description -n uboot-images-armv7 -U-Boot firmware binaries for armv7 boards -%endif %endif %prep %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}} -cp %SOURCE1 %SOURCE2 . +cp %SOURCE1 . %build mkdir builds @@ -86,7 +76,7 @@ mkdir builds # U-Boot device firmwares don't currently support LTO %define _lto_cflags %{nil} -%ifarch aarch64 %{arm} +%ifarch aarch64 for board in $(cat %{_arch}-boards) do echo "Building board: $board" @@ -124,18 +114,6 @@ do echo "Board: $board with SPI flash" builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi fi - # build spi, and uart images for mvebu boards - # mvebu=(clearfog helios4 turris_omnia) - if [[ " ${mvebu[*]} " == *" $board "* ]]; then - for target in spi uart - do - echo "Board: $board Target: $target" - sed -i -e '/CONFIG_MVEBU_SPL_BOOT_DEVICE_/d' configs/$(echo $board)_defconfig - echo CONFIG_MVEBU_SPL_BOOT_DEVICE_${target^^}=y >> configs/$(echo $board)_defconfig - make $(echo $board)_defconfig O=builds/$(echo $board-$target)/ - %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board-$target)/ - done - fi done %endif @@ -160,21 +138,8 @@ do done %endif -%ifarch %{arm} -for board in $(ls builds) -do - mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin - do - if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ - fi - done -done -%endif - # Bit of a hack to remove binaries we don't use as they're large -%ifarch aarch64 %{arm} +%ifarch aarch64 for board in $(ls builds) do rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.dtb @@ -214,22 +179,14 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} # Copy some useful docs over mkdir -p builds/docs cp -p board/hisilicon/hikey/README builds/docs/README.hikey -cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820 cp -p board/rockchip/evb_rk3399/README builds/docs/README.evb_rk3399 -cp -p board/solidrun/clearfog/README builds/docs/README.clearfog -cp -p board/solidrun/mx6cuboxi/README builds/docs/README.mx6cuboxi cp -p board/sunxi/README.sunxi64 builds/docs/README.sunxi64 cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand -cp -p board/ti/omap5_uevm/README builds/docs/README.omap5_uevm -cp -p board/udoo/README builds/docs/README.udoo -cp -p board/wandboard/README builds/docs/README.wandboard -cp -p board/warp/README builds/docs/README.warp -cp -p board/warp7/README builds/docs/README.warp7 %files -%doc README doc/README.kwbimage doc/develop/distro.rst doc/README.gpt -%doc doc/README.odroid doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst -%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ doc/board/ti/am335x_evm.rst +%doc README doc/develop/distro.rst doc/README.gpt +%doc doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst +%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ @@ -239,11 +196,6 @@ cp -p board/warp7/README builds/docs/README.warp7 %files -n uboot-images-armv8 %{_datadir}/uboot/* %endif - -%ifarch %{arm} -%files -n uboot-images-armv7 -%{_datadir}/uboot/* -%endif %endif %changelog From f02cd136917e1f13b8e1a9f44b7f1d1c6e0bfc81 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Apr 2022 01:39:32 +0100 Subject: [PATCH 188/351] 2022.07 RC1 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index f3d74be..20973a8 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.04.tar.bz2) = 113056e542db049eea3b1d1ccbbe52c79539a2f9bb6129d284ec9200dcffec7bd5969821913a9899631575b80991c84ad01bc845b4bba614e42e54466d9f0d64 +SHA512 (u-boot-2022.07-rc1.tar.bz2) = f3b3c2fbcf2542cd17feef8374f07bce9300f4491b5c1d7194a791d7b4279062de74b639b043f250ef416e1c345e40d7b72f51f3f1d8687670dda30ebb31a5f6 diff --git a/uboot-tools.spec b/uboot-tools.spec index c2904dd..6fedab7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -#global candidate rc0 +%global candidate rc1 %bcond_without toolsonly Name: uboot-tools Version: 2022.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -199,6 +199,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Apr 26 2022 Peter Robinson - 2022.04-0.1.rc1 +- Update to 2022.07 RC1 + * Mon Apr 04 2022 Peter Robinson - 2022.04-1 - Update to 2022.04 GA From 41e28cf922a394ef8d663a2182fd2c5075964fc3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Apr 2022 01:49:46 +0100 Subject: [PATCH 189/351] fix version --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 6fedab7..38940ec 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ %bcond_without toolsonly Name: uboot-tools -Version: 2022.04 +Version: 2022.07 Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -199,7 +199,7 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog -* Tue Apr 26 2022 Peter Robinson - 2022.04-0.1.rc1 +* Tue Apr 26 2022 Peter Robinson - 2022.07-0.1.rc1 - Update to 2022.07 RC1 * Mon Apr 04 2022 Peter Robinson - 2022.04-1 From f0b776d4d6e0fdd9c371767b0260ce7239848d46 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 13 May 2022 19:24:42 +0100 Subject: [PATCH 190/351] 2022.07 RC2 Signed-off-by: Peter Robinson --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index 20973a8..32f1aa8 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc1.tar.bz2) = f3b3c2fbcf2542cd17feef8374f07bce9300f4491b5c1d7194a791d7b4279062de74b639b043f250ef416e1c345e40d7b72f51f3f1d8687670dda30ebb31a5f6 +SHA512 (u-boot-2022.07-rc2.tar.bz2) = c3b0aab1e2de4ac48af1a5b5147f3afa4296dc3f264d15da43421ff58207bb5bb17b99d0a571361e76150804fc3f78bd16f2bc623cb8324c48e6834440b247c2 From 0e7b56408159f830f0ec13240a464153a6002c25 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 14 May 2022 10:17:26 +0100 Subject: [PATCH 191/351] 2022.07 RC2 --- uboot-tools.spec | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 38940ec..be83aa7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc1 +%global candidate rc2 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -199,6 +199,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat May 14 2022 Peter Robinson - 2022.07-0.2.rc2 +- Update to 2022.07 RC2 + * Tue Apr 26 2022 Peter Robinson - 2022.07-0.1.rc1 - Update to 2022.07 RC1 From fa86e10d711ab526e20279a2654491c0f37c383e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 25 May 2022 15:46:30 +0100 Subject: [PATCH 192/351] 2022.07 RC3 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 32f1aa8..7182c58 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc2.tar.bz2) = c3b0aab1e2de4ac48af1a5b5147f3afa4296dc3f264d15da43421ff58207bb5bb17b99d0a571361e76150804fc3f78bd16f2bc623cb8324c48e6834440b247c2 +SHA512 (u-boot-2022.07-rc3.tar.bz2) = 1ebc19ca9828f38e5568a3415281917a12d086f3e4e23749441faf77771612526d95a84af5433057f6caa09b424aff9d4709d2d223cbe98f7d6356049c3b0d3c diff --git a/uboot-tools.spec b/uboot-tools.spec index be83aa7..2fb5fee 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc2 +%global candidate rc3 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -199,6 +199,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Wed May 25 2022 Peter Robinson - 2022.07-0.3.rc3 +- Update to 2022.07 RC3 + * Sat May 14 2022 Peter Robinson - 2022.07-0.2.rc2 - Update to 2022.07 RC2 From cefa60ce7fdc19b38a750a4f3e33ae4338c8f721 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 12 Jun 2022 14:58:18 +0100 Subject: [PATCH 193/351] 2022.07 RC4, rk3328 spi builds, PBP/Rockpro64 fixes --- ...class-Add-support-to-manually-reloca.patch | 53 --------------- rockchip-general-fixes.patch | 65 +++++++++++++++++++ sources | 2 +- uboot-tools.spec | 17 +++-- 4 files changed, 79 insertions(+), 58 deletions(-) delete mode 100644 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch create mode 100644 rockchip-general-fixes.patch diff --git a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch b/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch deleted file mode 100644 index 5dd7695..0000000 --- a/0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 1c56fc2835e10cdc039a4c1d049c1a6978e036f3 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 22 Jul 2021 16:22:48 +0100 -Subject: [PATCH] Revert "spi: spi-uclass: Add support to manually relocate spi - memory ops" - -This reverts commit 346df7d4fa62afc578d820b3a18815eec765074f. - -This patch broke booting Rockchip systems from U-Boot residing on SPI -flash, for at least the Pinebook Pro and Rockpro64, and also confirmed -with the not yet upstream Helios64. - -Signed-off-by: Peter Robinson -Cc: T Karthik Reddy -Cc: Ashok Reddy Soma -Cc: Michal Simek -Cc: Pratyush Yadav ---- - drivers/spi/spi-uclass.c | 11 ----------- - 1 file changed, 11 deletions(-) - -diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c -index d867b27806..ec7f4652b3 100644 ---- a/drivers/spi/spi-uclass.c -+++ b/drivers/spi/spi-uclass.c -@@ -11,7 +11,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -200,16 +199,6 @@ static int spi_post_probe(struct udevice *bus) - ops->set_mode += gd->reloc_off; - if (ops->cs_info) - ops->cs_info += gd->reloc_off; -- if (ops->mem_ops) { -- struct spi_controller_mem_ops *mem_ops = -- (struct spi_controller_mem_ops *)ops->mem_ops; -- if (mem_ops->adjust_op_size) -- mem_ops->adjust_op_size += gd->reloc_off; -- if (mem_ops->supports_op) -- mem_ops->supports_op += gd->reloc_off; -- if (mem_ops->exec_op) -- mem_ops->exec_op += gd->reloc_off; -- } - reloc_done++; - } - #endif --- -2.31.1 - diff --git a/rockchip-general-fixes.patch b/rockchip-general-fixes.patch new file mode 100644 index 0000000..28d43db --- /dev/null +++ b/rockchip-general-fixes.patch @@ -0,0 +1,65 @@ +From 2d9350c50a9659cc2a247cdea07f0eacffa3cb32 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 12 Jun 2022 14:44:44 +0100 +Subject: [PATCH] rockchip: pinebook-pro: minor SPI flash fixes + +Set a default offset for environment so it doesn't write it to +unexpected locations, drop unneeded mtd config option. + +Signed-off-by: Peter Robinson +--- + configs/pinebook-pro-rk3399_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 8ca1d0708f9..aaa52c6ea70 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 + CONFIG_NR_DRAM_BANKS=1 + CONFIG_ENV_SIZE=0x8000 ++CONFIG_ENV_OFFSET=0x3F8000 + CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" + CONFIG_ROCKCHIP_RK3399=y + CONFIG_TARGET_PINEBOOK_PRO_RK3399=y +@@ -22,7 +23,6 @@ CONFIG_MISC_INIT_R=y + # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +-CONFIG_SPL_MTD_SUPPORT=y + CONFIG_SPL_SPI_LOAD=y + CONFIG_TPL=y + CONFIG_CMD_BOOTZ=y +-- +2.36.1 + +From 27ba8e2f904063aec5196f86dd0332bf58a60259 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 12 Jun 2022 14:50:42 +0100 +Subject: [PATCH] rockchip: rockpro64: enable leds + +The Rockpro64 has some GPIO leds so let's enable them so the +user gets some output in early boot. + +Signed-off-by: Peter Robinson +--- + configs/rockpro64-rk3399_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index e6f7a8469a3..b0c3527fab0 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -42,6 +42,8 @@ CONFIG_AHCI_PCI=y + CONFIG_SATA_SIL=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y + CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y +-- +2.36.1 + diff --git a/sources b/sources index 7182c58..826b328 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc3.tar.bz2) = 1ebc19ca9828f38e5568a3415281917a12d086f3e4e23749441faf77771612526d95a84af5433057f6caa09b424aff9d4709d2d223cbe98f7d6356049c3b0d3c +SHA512 (u-boot-2022.07-rc4.tar.bz2) = e54b9df6e4854fa8314e815409eb7b7b9d29af956aa021df8f7138f997bc683bc84bb1a80e71cb02821fe82e77ce12aa404d84841684f7b4e14f36756a6843f2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2fb5fee..728345c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc3 +%global candidate rc4 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,8 +22,8 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements -Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch -Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch8: rockchip-general-fixes.patch BuildRequires: bc BuildRequires: bison @@ -109,6 +109,11 @@ do %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ # build spi images for rockchip boards with SPI flash + rkspi=(rock64-rk3328) + if [[ " ${rkspi[*]} " == *" $board "* ]]; then + echo "Board: $board with SPI flash" + builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi + fi rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rkspi[*]} " == *" $board "* ]]; then echo "Board: $board with SPI flash" @@ -199,6 +204,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sun Jun 12 2022 Peter Robinson - 2022.07-0.4.rc4 +- Update to 2022.07 RC4 +- Some minor Rockchips device fixes + * Wed May 25 2022 Peter Robinson - 2022.07-0.3.rc3 - Update to 2022.07 RC3 From 832d64676bf25b0cc39dbfa03802ee933ac93324 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 12 Jun 2022 16:46:57 +0100 Subject: [PATCH 194/351] Fix for Pinebook Pro when booting with FW DT --- rockchip-general-fixes.patch | 71 ++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/rockchip-general-fixes.patch b/rockchip-general-fixes.patch index 28d43db..00e78f5 100644 --- a/rockchip-general-fixes.patch +++ b/rockchip-general-fixes.patch @@ -63,3 +63,74 @@ index e6f7a8469a3..b0c3527fab0 100644 -- 2.36.1 +From 8bca90472e0d71e5344711b6f5fe8dc95e19af5a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 12 Jun 2022 15:12:47 +0100 +Subject: [PATCH] rockchip: pinebook-pro: sync PBP dtb to 5.18 + +Sync the pinebook pro to upstream 5.18, in particular this brings +brings in a fix so the DP is disabled so Linux will actually boot. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinebook-pro.dts | 11 +++-------- + 1 file changed, 3 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts +index 2b5f001ff4a..d6b68d77d63 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro.dts ++++ b/arch/arm/dts/rk3399-pinebook-pro.dts +@@ -17,6 +17,7 @@ + / { + model = "Pine64 Pinebook Pro"; + compatible = "pine64,pinebook-pro", "rockchip,rk3399"; ++ chassis-type = "laptop"; + + aliases { + mmc0 = &sdio0; +@@ -242,12 +243,12 @@ + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; ++ pwm-supply = <&vcc_sysin>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; +- vin-supply = <&vcc_sysin>; + + regulator-state-mem { + regulator-on-in-suspend; +@@ -385,10 +386,6 @@ + }; + }; + +-&cdn_dp { +- status = "okay"; +-}; +- + &cpu_b0 { + cpu-supply = <&vdd_cpu_b>; + }; +@@ -475,8 +472,6 @@ + vcc10-supply = <&vcc_sysin>; + vcc11-supply = <&vcc_sysin>; + vcc12-supply = <&vcc3v3_sys>; +- vcc13-supply = <&vcc_sysin>; +- vcc14-supply = <&vcc_sysin>; + + regulators { + /* rk3399 center logic supply */ +@@ -711,7 +706,7 @@ + + connector { + compatible = "usb-c-connector"; +- data-role = "host"; ++ data-role = "dual"; + label = "USB-C"; + op-sink-microwatt = <1000000>; + power-role = "dual"; +-- +2.36.1 + From dc41daecba8ed9eb84c80c850f7317172d90c536 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 26 Jun 2022 17:40:50 +0100 Subject: [PATCH 195/351] 2022.07 RC5 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 826b328..5ac08e9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc4.tar.bz2) = e54b9df6e4854fa8314e815409eb7b7b9d29af956aa021df8f7138f997bc683bc84bb1a80e71cb02821fe82e77ce12aa404d84841684f7b4e14f36756a6843f2 +SHA512 (u-boot-2022.07-rc5.tar.bz2) = 0e72671b9126ccb813f8981ce10c8b7d736e0f8cc4b2a8cdc8233588d50882852873ad7e7576757fc2282eb8884dac04c86c6e3432d64d8ef66a514b7edb1b1c diff --git a/uboot-tools.spec b/uboot-tools.spec index 728345c..16a294b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc4 +%global candidate rc5 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -204,6 +204,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Jun 20 2022 Peter Robinson - 2022.07-0.5.rc5 +- Update to 2022.07 RC5 + * Sun Jun 12 2022 Peter Robinson - 2022.07-0.4.rc4 - Update to 2022.07 RC4 - Some minor Rockchips device fixes From 49a3b5d27cba51ba7111a79fbac76f622b717c4f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 4 Jul 2022 13:23:43 +0100 Subject: [PATCH 196/351] Update to 2022.07 RC6 --- sources | 2 +- uboot-tools.spec | 8 +++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/sources b/sources index 5ac08e9..49e8e65 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc5.tar.bz2) = 0e72671b9126ccb813f8981ce10c8b7d736e0f8cc4b2a8cdc8233588d50882852873ad7e7576757fc2282eb8884dac04c86c6e3432d64d8ef66a514b7edb1b1c +SHA512 (u-boot-2022.07-rc6.tar.bz2) = 9772c69b48e2d76f7c70e148d54cbb857c728c6cf131eb27e6baceeb9212d63220b7cfb7c43b6ef9620430bd754822691b3149b923ae57e2bf9805d36845b2b2 diff --git a/uboot-tools.spec b/uboot-tools.spec index 16a294b..7c1ec6d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc5 +%global candidate rc6 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -23,7 +23,6 @@ Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch8: rockchip-general-fixes.patch BuildRequires: bc BuildRequires: bison @@ -204,6 +203,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Jul 04 2022 Peter Robinson - 2022.07-0.6.rc6 +- Update to 2022.07 RC6 + * Mon Jun 20 2022 Peter Robinson - 2022.07-0.5.rc5 - Update to 2022.07 RC5 From 6c3ac9b2298bbe4d28e69634c13a78b9fa10d906 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 17 Jul 2022 11:16:46 +0100 Subject: [PATCH 197/351] 2022.07 GA --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 49e8e65..bba9d23 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07-rc6.tar.bz2) = 9772c69b48e2d76f7c70e148d54cbb857c728c6cf131eb27e6baceeb9212d63220b7cfb7c43b6ef9620430bd754822691b3149b923ae57e2bf9805d36845b2b2 +SHA512 (u-boot-2022.07.tar.bz2) = e1b3621dafac876c644ffb3d24b6e2380f5a78454c420a5b17d174e3f0b57731a95cfbff28ae7d0af4493f4bbf8d21e7f9236d61bb2414ed12295332b3d557b6 diff --git a/uboot-tools.spec b/uboot-tools.spec index 7c1ec6d..f800c18 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,9 @@ -%global candidate rc6 +#global candidate rc0 %bcond_without toolsonly Name: uboot-tools Version: 2022.07 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -203,6 +203,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sun Jul 17 2022 Peter Robinson - 2022.07-1 +- Update to 2022.07 GA + * Mon Jul 04 2022 Peter Robinson - 2022.07-0.6.rc6 - Update to 2022.07 RC6 From c7412f83bd8afdb497132f4c4fb06ad3d1634e6d Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 23 Jul 2022 11:13:36 +0000 Subject: [PATCH 198/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index f800c18..030c1e8 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -3,7 +3,7 @@ Name: uboot-tools Version: 2022.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -203,6 +203,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat Jul 23 2022 Fedora Release Engineering - 2022.07-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild + * Sun Jul 17 2022 Peter Robinson - 2022.07-1 - Update to 2022.07 GA From 8bfc149984318e2af148c095598a22f22fc59e6c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 28 Jul 2022 10:11:26 +0100 Subject: [PATCH 199/351] 2022.10 RC1 --- aarch64-boards | 2 +- sources | 2 +- uboot-tools.spec | 17 +++++++++++------ 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index a38107c..ab282d9 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -6,6 +6,7 @@ bananapi_m64 beelink_gs1 dragonboard410c dragonboard820c +dragonboard845c evb-rk3328 evb-rk3399 ficus-rk3399 @@ -58,7 +59,6 @@ pine64-lts pine64_plus pinebook pinebook-pro-rk3399 -pinephone-pro-rk3399 pine_h64 pinephone pinetab diff --git a/sources b/sources index bba9d23..bed7049 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.07.tar.bz2) = e1b3621dafac876c644ffb3d24b6e2380f5a78454c420a5b17d174e3f0b57731a95cfbff28ae7d0af4493f4bbf8d21e7f9236d61bb2414ed12295332b3d557b6 +SHA512 (u-boot-2022.10-rc1.tar.bz2) = 7db532ed286d8cc8a3e38d7eee6db6bfe11b9ecba62dc5a0e29b3a95c9c345d3be4f1c036bede2d0d069e291d1dcb4e496ffc3c799b17e483f17fb8a57d5d27f diff --git a/uboot-tools.spec b/uboot-tools.spec index 030c1e8..5af92da 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,9 +1,13 @@ -#global candidate rc0 +%global candidate rc1 +%if !0%{?rhel} %bcond_without toolsonly +%else +%bcond_with toolsonly +%endif Name: uboot-tools -Version: 2022.07 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2022.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -72,9 +76,6 @@ mkdir builds %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ %if %{with toolsonly} -# U-Boot device firmwares don't currently support LTO -%define _lto_cflags %{nil} - %ifarch aarch64 for board in $(cat %{_arch}-boards) do @@ -203,6 +204,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Thu Jul 28 2022 Peter Robinson - 2022.10-0.1.rc1 +- Update to 2022.10 RC1 +- Enable LTO for firmware builds + * Sat Jul 23 2022 Fedora Release Engineering - 2022.07-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild From 8522759e85ea39ef797336a505e3be9f483c6539 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 16 Aug 2022 20:10:33 +0100 Subject: [PATCH 200/351] Fix for DT property propogation via firmware --- ...erties-from-firmware-DT-to-loaded-DT.patch | 296 ++++++++++++++++++ uboot-tools.spec | 6 +- 2 files changed, 301 insertions(+), 1 deletion(-) create mode 100644 rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch diff --git a/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch b/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch new file mode 100644 index 0000000..7ef65bc --- /dev/null +++ b/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch @@ -0,0 +1,296 @@ +From patchwork Wed Aug 10 12:39:26 2022 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Antoine Mazeas +X-Patchwork-Id: 1665242 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: bilbo.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=karthanis.net header.i=@karthanis.net + header.a=rsa-sha256 header.s=20191114 header.b=mcrC/rnn; + dkim-atps=neutral +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de + 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[88.168.170.86]) + by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4M2qKk6qXKzlnSD1; + Wed, 10 Aug 2022 14:40:42 +0200 (CEST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=karthanis.net; + s=20191114; t=1660135243; + bh=YF4GTVv5pqqW0OMrNZFlf0WHnELr1KiKKA02ok/znf4=; + h=From:To:Cc:Subject:Date:In-Reply-To:References:From; + b=mcrC/rnnUv3FXlrllL2s9lLTjUEnTuLbiINuyrIQWr2HG3AmCcD11F7n0AypUdePp + 2XfG1PnZalJa2v3m6/DUWsz6B/cqmYo31h/6HpFeJ4g2i1pEZar7cC+9oScmbjJptV + w2oDsFHzyK2oWHUMGFJ4N6bboD8kq3z4WLaH2vrQ= +From: Antoine Mazeas +To: u-boot@lists.denx.de +Cc: Antoine Mazeas , + Sjoerd Simons +Subject: [PATCH 1/2] rpi: Copy properties from firmware dtb to the loaded dtb +Date: Wed, 10 Aug 2022 14:39:26 +0200 +Message-Id: <20220810123927.2567677-2-antoine@karthanis.net> +X-Mailer: git-send-email 2.37.1 +In-Reply-To: <20220810123927.2567677-1-antoine@karthanis.net> +References: <20220810123927.2567677-1-antoine@karthanis.net> +MIME-Version: 1.0 +X-Mailman-Approved-At: Wed, 10 Aug 2022 14:58:03 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de +X-Virus-Status: Clean + +The RPI firmware adjusts several property values in the dtb it passes +to u-boot depending on the board/SoC revision. Inherit some of these +when u-boot loads a dtb itself. Specificaly copy: + +* /model: The firmware provides a more specific string +* /memreserve: The firmware defines a reserved range, better keep it +* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as + present on rpi 400 and some rpi 4B boards) has different values for + these then the B0T revision. So these need to be adjusted to boot on + these boards +* blconfig: The firmware defines the memory area where the blconfig + stored. Copy those over so it can be enabled. +* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage + of that. + +Signed-off-by: Sjoerd Simons +--- + board/raspberrypi/rpi/rpi.c | 48 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 17b8108cc8..28b6f52506 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -504,10 +504,58 @@ void *board_fdt_blob_setup(int *err) + return (void *)fw_dtb_pointer; + } + ++int copy_property(void *dst, void *src, char *path, char *property) ++{ ++ int dst_offset, src_offset; ++ const fdt32_t *prop; ++ int len; ++ ++ src_offset = fdt_path_offset(src, path); ++ dst_offset = fdt_path_offset(dst, path); ++ ++ if (src_offset < 0 || dst_offset < 0) ++ return -1; ++ ++ prop = fdt_getprop(src, src_offset, property, &len); ++ if (!prop) ++ return -1; ++ ++ return fdt_setprop(dst, dst_offset, property, prop, len); ++} ++ ++/* Copy tweaks from the firmware dtb to the loaded dtb */ ++void update_fdt_from_fw(void *fdt, void *fw_fdt) ++{ ++ /* Using dtb from firmware directly; leave it alone */ ++ if (fdt == fw_fdt) ++ return; ++ ++ /* The firmware provides a more precie model; so copy that */ ++ copy_property(fdt, fw_fdt, "/", "model"); ++ ++ /* memory reserve as suggested by the firmware */ ++ copy_property(fdt, fw_fdt, "/", "memreserve"); ++ ++ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on ++ * the SoC revision ++ */ ++ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges"); ++ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges"); ++ ++ /* Bootloader configuration template exposes as nvmem */ ++ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0) ++ copy_property(fdt, fw_fdt, "blconfig", "status"); ++ ++ /* kernel address randomisation seed as provided by the firmware */ ++ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); ++} ++ + int ft_board_setup(void *blob, struct bd_info *bd) + { + int node; + ++ update_fdt_from_fw(blob, (void *)fw_dtb_pointer); ++ + node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer"); + if (node < 0) + fdt_simplefb_add_node(blob); + +From patchwork Wed Aug 10 12:39:27 2022 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Antoine Mazeas +X-Patchwork-Id: 1665243 +X-Patchwork-Delegate: matthias.bgg@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: bilbo.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=karthanis.net header.i=@karthanis.net + header.a=rsa-sha256 header.s=20191114 header.b=3Vltv92i; + dkim-atps=neutral +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (2048 bits)) + (No client certificate requested) + by bilbo.ozlabs.org (Postfix) with ESMTPS id 4M2qkb5v6sz9ryY + for ; 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Wed, 10 Aug 2022 14:40:45 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=karthanis.net +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=antoine@karthanis.net +Received: from smtp-3-0001.mail.infomaniak.ch (unknown [10.4.36.108]) + by smtp-2-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4M2qKn4VzjzMqnFS; + Wed, 10 Aug 2022 14:40:45 +0200 (CEST) +Received: from localhost.localdomain (unknown [88.168.170.86]) + by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4M2qKn1TBqzlnSCc; + Wed, 10 Aug 2022 14:40:45 +0200 (CEST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=karthanis.net; + s=20191114; t=1660135245; + bh=f61vvBG7E2UozLHxeE7zghMr3kXQzBW+5PpzEyEGYJU=; + h=From:To:Cc:Subject:Date:In-Reply-To:References:From; + b=3Vltv92i/KGKD06qHi+zyrqGwfJWUvdwHMojKKH7OqswhScJTxhUbGq6MnPrCqWsn + QgB117zr++vQSy1jxV2vZIFLxMC3j8AZb4l3ktmU7FiPp7AUB6AqAzv+tUrYeS3nz4 + LQ0mJS4s1jk1k0WWAK3/WGdOyUAo8ZWw5oiBHUvk= +From: Antoine Mazeas +To: u-boot@lists.denx.de +Cc: Antoine Mazeas +Subject: [PATCH 2/2] rpi: Copy eth PHY address from fw DT to loaded DT +Date: Wed, 10 Aug 2022 14:39:27 +0200 +Message-Id: <20220810123927.2567677-3-antoine@karthanis.net> +X-Mailer: git-send-email 2.37.1 +In-Reply-To: <20220810123927.2567677-1-antoine@karthanis.net> +References: <20220810123927.2567677-1-antoine@karthanis.net> +MIME-Version: 1.0 +X-Mailman-Approved-At: Wed, 10 Aug 2022 14:58:03 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de +X-Virus-Status: Clean + +Some Raspberry Pi 400 boards, specifically rev 1.1, have a different address for the ethernet PHY device than what is provided by the kernel DTB. The correct address is provided by the firmware, so we should carry it over into the loaded device tree so that ethernet works on such boards. + +Signed-off-by: Antoine Mazeas +--- + board/raspberrypi/rpi/rpi.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 28b6f52506..793fd1aa30 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -548,6 +548,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) + + /* kernel address randomisation seed as provided by the firmware */ + copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); ++ ++ /* address of the PHY device as provided by the firmware */ ++ copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg"); + } + + int ft_board_setup(void *blob, struct bd_info *bd) diff --git a/uboot-tools.spec b/uboot-tools.spec index 5af92da..c120a86 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -25,6 +25,7 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch +Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -204,6 +205,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Aug 16 2022 Peter Robinson - 2022.10-0.2.rc1 +- Fix for DT property propogation via firmware + * Thu Jul 28 2022 Peter Robinson - 2022.10-0.1.rc1 - Update to 2022.10 RC1 - Enable LTO for firmware builds From 48ddd14c80cc1b1f8029c285b36722bdbbc4a924 Mon Sep 17 00:00:00 2001 From: Davide Cavalca Date: Sat, 26 Mar 2022 13:53:43 -0700 Subject: [PATCH 201/351] Install nodtb variant for Apple M1 Fixes: rhbz#2068958 --- uboot-tools.spec | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index c120a86..d3c8f96 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -142,6 +142,9 @@ do fi done done + +# For Apple M1 we also need the nodtb variant +install -p -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin %endif # Bit of a hack to remove binaries we don't use as they're large @@ -205,6 +208,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Aug 22 2022 Davide Cavalca - 2022.10-0.3.rc1 +- Install nodtb variant for Apple M1 (rhbz#2068958) + * Tue Aug 16 2022 Peter Robinson - 2022.10-0.2.rc1 - Fix for DT property propogation via firmware From d2c989dc3292764bbb2fef25e5fea67d8fb37447 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 23 Aug 2022 15:29:38 +0100 Subject: [PATCH 202/351] 2022.10 RC3 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index bed7049..ba88a1e 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.10-rc1.tar.bz2) = 7db532ed286d8cc8a3e38d7eee6db6bfe11b9ecba62dc5a0e29b3a95c9c345d3be4f1c036bede2d0d069e291d1dcb4e496ffc3c799b17e483f17fb8a57d5d27f +SHA512 (u-boot-2022.10-rc3.tar.bz2) = 4e4c747525c22180ecf7ad18b6064def4542f08782aaadfd7f6a781a3b7fa1e9474f4d20036a9b62d8265eccc78c361c4b278699d7d81d2721d0a7d504a40d3a diff --git a/uboot-tools.spec b/uboot-tools.spec index d3c8f96..e243451 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc1 +%global candidate rc3 %if !0%{?rhel} %bcond_without toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -208,6 +208,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Aug 23 2022 Peter Robinson - 2022.10-0.4.rc3 +- Update to 2022.10 RC3 + * Mon Aug 22 2022 Davide Cavalca - 2022.10-0.3.rc1 - Install nodtb variant for Apple M1 (rhbz#2068958) From 6134477ebcdb4fdd607a0abd62aa5dde5852d058 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 6 Sep 2022 08:51:21 +0100 Subject: [PATCH 203/351] 2022.10 RC4, rockchip PMIC revert --- ...c-rk8xx-Support-sysreset-shutdown-me.patch | 92 +++++++++++++++++++ smbios-test-dmi.patch | 51 ++++++++++ sources | 2 +- uboot-tools.spec | 10 +- 4 files changed, 152 insertions(+), 3 deletions(-) create mode 100644 0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch create mode 100644 smbios-test-dmi.patch diff --git a/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch b/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch new file mode 100644 index 0000000..3c297e3 --- /dev/null +++ b/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch @@ -0,0 +1,92 @@ +From 17096f20920205200b88d6d8facdbef0d3d3d3e8 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 4 Sep 2022 22:22:50 +0100 +Subject: [PATCH] Revert "power: pmic: rk8xx: Support sysreset shutdown method" + +This reverts commit ad607512f5757f4485968efd5bcf2c0245a8a235. +--- + drivers/power/pmic/rk8xx.c | 50 +------------------------------------- + 1 file changed, 1 insertion(+), 49 deletions(-) + +diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c +index 25ef621f8df..8d703112c38 100644 +--- a/drivers/power/pmic/rk8xx.c ++++ b/drivers/power/pmic/rk8xx.c +@@ -6,50 +6,10 @@ + + #include + #include +-#include + #include + #include + #include + #include +-#include +- +-static int rk8xx_sysreset_request(struct udevice *dev, enum sysreset_t type) +-{ +- struct rk8xx_priv *priv = dev_get_priv(dev->parent); +- +- if (type != SYSRESET_POWER_OFF) +- return -EPROTONOSUPPORT; +- +- switch (priv->variant) { +- case RK805_ID: +- case RK808_ID: +- case RK816_ID: +- case RK818_ID: +- pmic_clrsetbits(dev->parent, REG_DEVCTRL, 0, BIT(0)); +- break; +- case RK809_ID: +- case RK817_ID: +- pmic_clrsetbits(dev->parent, RK817_REG_SYS_CFG3, 0, +- BIT(0)); +- break; +- default: +- printf("Unknown PMIC RK%x: Cannot shutdown\n", +- priv->variant); +- return -EPROTONOSUPPORT; +- }; +- +- return -EINPROGRESS; +-} +- +-static struct sysreset_ops rk8xx_sysreset_ops = { +- .request = rk8xx_sysreset_request, +-}; +- +-U_BOOT_DRIVER(rk8xx_sysreset) = { +- .name = "rk8xx_sysreset", +- .id = UCLASS_SYSRESET, +- .ops = &rk8xx_sysreset_ops, +-}; + + /* In the event of a plug-in and the appropriate option has been + * selected, we simply shutdown instead of continue the normal boot +@@ -133,7 +93,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + static int rk8xx_bind(struct udevice *dev) + { + ofnode regulators_node; +- int children, ret; ++ int children; + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +@@ -144,14 +104,6 @@ static int rk8xx_bind(struct udevice *dev) + + debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); + +- if (CONFIG_IS_ENABLED(SYSRESET)) { +- ret = device_bind_driver_to_node(dev, "rk8xx_sysreset", +- "rk8xx_sysreset", +- dev_ofnode(dev), NULL); +- if (ret) +- return ret; +- } +- + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) + debug("%s: %s - no child found\n", __func__, dev->name); +-- +2.37.3 + diff --git a/smbios-test-dmi.patch b/smbios-test-dmi.patch new file mode 100644 index 0000000..c47ac1a --- /dev/null +++ b/smbios-test-dmi.patch @@ -0,0 +1,51 @@ +diff --git a/lib/smbios.c b/lib/smbios.c +index d7f4999e8b..0ceb758cb1 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -281,9 +281,13 @@ static int smbios_write_type1(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); ++ if (!t->manufacturer) ++ t->manufacturer = smbios_add_prop(ctx, "compatible"); + if (!t->manufacturer) + t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); ++ if (!t->product_name) ++ t->product_name = smbios_add_prop(ctx, "model"); + if (!t->product_name) + t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", +@@ -315,9 +319,13 @@ static int smbios_write_type2(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); ++ if (!t->manufacturer) ++ t->manufacturer = smbios_add_prop(ctx, "compatible"); + if (!t->manufacturer) + t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); ++ if (!t->product_name) ++ t->product_name = smbios_add_prop(ctx, "model"); + if (!t->product_name) + t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", +@@ -344,6 +352,8 @@ static int smbios_write_type3(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); ++ if (!t->manufacturer) ++ t->manufacturer = smbios_add_prop(ctx, "compatible"); + if (!t->manufacturer) + t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; +@@ -503,6 +513,9 @@ ulong write_smbios_table(ulong addr) + if (IS_ENABLED(CONFIG_OF_CONTROL) && method->subnode_name) + ctx.node = ofnode_find_subnode(parent_node, + method->subnode_name); ++ /* If we can't find any smbios node fallback to the entire DT */ ++ if (!ofnode_valid(ctx.node)) ++ ctx.node = ofnode_root(); + tmp = method->write((ulong *)&addr, handle++, &ctx); + + max_struct_size = max(max_struct_size, tmp); diff --git a/sources b/sources index ba88a1e..1ac9bfe 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.10-rc3.tar.bz2) = 4e4c747525c22180ecf7ad18b6064def4542f08782aaadfd7f6a781a3b7fa1e9474f4d20036a9b62d8265eccc78c361c4b278699d7d81d2721d0a7d504a40d3a +SHA512 (u-boot-2022.10-rc4.tar.bz2) = 678b64480d794af987e462076575db9b3b44a458fca5e68f8f0df5701d40642c4e10e5f2d3daa50513c30d5573a57c0d1f4707178a385ca0509bc1d5412f81ea diff --git a/uboot-tools.spec b/uboot-tools.spec index e243451..63125e4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if !0%{?rhel} %bcond_without toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -19,6 +19,7 @@ Source1: aarch64-boards # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch2: smbios-test-dmi.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support @@ -28,6 +29,7 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch8: 0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch BuildRequires: bc BuildRequires: bison @@ -208,6 +210,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Sep 06 2022 Peter Robinson - 2022.10-0.5.rc4 +- Update to 2022.10 RC4 +- Fix for booting Rockchip devices from NVME + * Tue Aug 23 2022 Peter Robinson - 2022.10-0.4.rc3 - Update to 2022.10 RC3 From 3b11dffa4fec507c63605a81cda9ab88a5e3ac79 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 6 Sep 2022 17:31:51 +0100 Subject: [PATCH 204/351] Update SMBIOS patch --- ...Simplify-reporting-of-unknown-values.patch | 544 ++++++++++++++++++ smbios-test-dmi.patch | 51 -- uboot-tools.spec | 7 +- 3 files changed, 549 insertions(+), 53 deletions(-) create mode 100644 smbios-Simplify-reporting-of-unknown-values.patch delete mode 100644 smbios-test-dmi.patch diff --git a/smbios-Simplify-reporting-of-unknown-values.patch b/smbios-Simplify-reporting-of-unknown-values.patch new file mode 100644 index 0000000..0aef8e7 --- /dev/null +++ b/smbios-Simplify-reporting-of-unknown-values.patch @@ -0,0 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u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de +X-Virus-Status: Clean + +If a value is not valid during the DT or SYSINFO parsing, we explicitly +set that to "Unknown Product" and "Unknown" for the product and +manufacturer respectively. It's cleaner if we move the checks insisde +smbios_add_string() and always report "Unknown" regardless of the missing +field. + +pre-patch dmidecode + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown Product + Version: Not Specified + Serial Number: Not Specified + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Not Specified + Family: Not Specified + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: Unknown + Product Name: Unknown Product + Version: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + + +post-patch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Not Specified + Asset Tag: Unknown + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + +Signed-off-by: Ilias Apalodimas +--- + lib/smbios.c | 17 +++-------------- + 1 file changed, 3 insertions(+), 14 deletions(-) + +diff --git a/lib/smbios.c b/lib/smbios.c +index d7f4999e8b2a..fcc8686993ef 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -102,7 +102,7 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + int i = 1; + char *p = ctx->eos; + +- if (!*str) ++ if (!str || !*str) + str = "Unknown"; + + for (;;) { +@@ -151,8 +151,7 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + const char *str; + + str = ofnode_read_string(ctx->node, prop); +- if (str) +- return smbios_add_string(ctx, str); ++ return smbios_add_string(ctx, str); + } + + return 0; +@@ -231,7 +230,7 @@ static int smbios_write_type0(ulong *current, int handle, + t->vendor = smbios_add_string(ctx, "U-Boot"); + + t->bios_ver = smbios_add_prop(ctx, "version"); +- if (!t->bios_ver) ++ if (!strcmp(ctx->last_str, "Unknown")) + t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); + if (t->bios_ver) + gd->smbios_version = ctx->last_str; +@@ -281,11 +280,7 @@ static int smbios_write_type1(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", + SYSINFO_ID_SMBIOS_SYSTEM_VERSION); + if (serial_str) { +@@ -315,11 +310,7 @@ static int smbios_write_type2(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", + SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); + t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); +@@ -344,8 +335,6 @@ static int smbios_write_type3(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; + t->bootup_state = SMBIOS_STATE_SAFE; + t->power_supply_state = SMBIOS_STATE_SAFE; + +From patchwork Tue Sep 6 13:44:26 2022 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Ilias Apalodimas +X-Patchwork-Id: 1674858 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 + header.s=google header.b=wBCOiKYw; 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+ Tue, 06 Sep 2022 06:44:48 -0700 (PDT) +From: Ilias Apalodimas +To: u-boot@lists.denx.de +Cc: trini@konsulko.com, sjg@chromium.org, heinrich.schuchardt@canonical.com, + pbrobinson@gmail.com, Ilias Apalodimas +Subject: [PATCH 2/2] smbios: Fallback to the default DT if sysinfo nodes are + missing +Date: Tue, 6 Sep 2022 16:44:26 +0300 +Message-Id: <20220906134426.53748-2-ilias.apalodimas@linaro.org> +X-Mailer: git-send-email 2.37.2 +In-Reply-To: <20220906134426.53748-1-ilias.apalodimas@linaro.org> +References: <20220906134426.53748-1-ilias.apalodimas@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de +X-Virus-Status: Clean + +In order to fill in the SMBIOS tables U-Boot currently relies on a +"u-boot,sysinfo-smbios" compatible node. This is fine for the boards +that already include such nodes. However with some recent EFI changes, +the majority of boards can boot up distros, which usually rely on +things like dmidecode etc for their reporting. For boards that +lack this special node the SMBIOS output looks like: + +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +This looks problematic since most of the info are "Unknown". The DT spec +specifies standard properties containing relevant information like +'model' and 'compatible' for which the suggested format is +. So let's add a last resort to our current +smbios parsing. If none of the sysinfo properties are found, we can +scan the root node for 'model' and 'compatible'. + +pre-patch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Not Specified + Asset Tag: Unknown + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + +Handle 0x0003, DMI type 3, 21 bytes +Chassis Information + Manufacturer: Unknown + Type: Desktop + Lock: Not Present + Version: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Boot-up State: Safe + Power Supply State: Safe + Thermal State: Safe + Security Status: None + OEM Information: 0x00000000 + Height: Unspecified + Number Of Power Cords: Unspecified + Contained Elements: 0 + + +post-pastch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: socionext,developer-box + Product Name: Socionext Developer Box + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: socionext,developer-box + Product Name: Socionext Developer Box + Version: Unknown + Serial Number: Not Specified + Asset Tag: Unknown + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + +Handle 0x0003, DMI type 3, 21 bytes +Chassis Information + Manufacturer: socionext,developer-box + Type: Desktop + Lock: Not Present + Version: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Boot-up State: Safe + Power Supply State: Safe + Thermal State: Safe + Security Status: None + OEM Information: 0x00000000 + Height: Unspecified + Number Of Power Cords: Unspecified + Contained Elements: 0 + + +Signed-off-by: Ilias Apalodimas +--- + lib/smbios.c | 41 +++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 39 insertions(+), 2 deletions(-) + +diff --git a/lib/smbios.c b/lib/smbios.c +index fcc8686993ef..f2eb961f514b 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -43,6 +43,20 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++/** ++ * struct sysifno_to_dt - Mapping of sysinfo strings to DT ++ * ++ * @sysinfo_str: sysinfo string ++ * @dt_str: DT string ++ */ ++static const struct { ++ const char *sysinfo_str; ++ const char *dt_str; ++} sysifno_to_dt[] = { ++ { .sysinfo_str = "product", .dt_str = "model" }, ++ { .sysinfo_str = "manufacturer", .dt_str = "compatible" }, ++}; ++ + /** + * struct smbios_ctx - context for writing SMBIOS tables + * +@@ -87,6 +101,18 @@ struct smbios_write_method { + const char *subnode_name; + }; + ++static const char *convert_sysinfo_to_dt(const char *sysinfo_str) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(sysifno_to_dt); i++) { ++ if (!strcmp(sysinfo_str, sysifno_to_dt[i].sysinfo_str)) ++ return sysifno_to_dt[i].dt_str; ++ } ++ ++ return NULL; ++} ++ + /** + * smbios_add_string() - add a string to the string area + * +@@ -148,9 +174,20 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + return smbios_add_string(ctx, val); + } + if (IS_ENABLED(CONFIG_OF_CONTROL)) { +- const char *str; ++ const char *str = NULL; + +- str = ofnode_read_string(ctx->node, prop); ++ /* ++ * If the node is not valid fallback and try the entire DT ++ * so we can at least fill in maufacturer and board type ++ */ ++ if (!ofnode_valid(ctx->node)) { ++ const char *nprop = convert_sysinfo_to_dt(prop); ++ ++ if (nprop) ++ str = ofnode_read_string(ofnode_root(), nprop); ++ } else { ++ str = ofnode_read_string(ctx->node, prop); ++ } + return smbios_add_string(ctx, str); + } + diff --git a/smbios-test-dmi.patch b/smbios-test-dmi.patch deleted file mode 100644 index c47ac1a..0000000 --- a/smbios-test-dmi.patch +++ /dev/null @@ -1,51 +0,0 @@ -diff --git a/lib/smbios.c b/lib/smbios.c -index d7f4999e8b..0ceb758cb1 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -281,9 +281,13 @@ static int smbios_write_type1(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -+ if (!t->manufacturer) -+ t->manufacturer = smbios_add_prop(ctx, "compatible"); - if (!t->manufacturer) - t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -+ if (!t->product_name) -+ t->product_name = smbios_add_prop(ctx, "model"); - if (!t->product_name) - t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", -@@ -315,9 +319,13 @@ static int smbios_write_type2(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -+ if (!t->manufacturer) -+ t->manufacturer = smbios_add_prop(ctx, "compatible"); - if (!t->manufacturer) - t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -+ if (!t->product_name) -+ t->product_name = smbios_add_prop(ctx, "model"); - if (!t->product_name) - t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", -@@ -344,6 +352,8 @@ static int smbios_write_type3(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -+ if (!t->manufacturer) -+ t->manufacturer = smbios_add_prop(ctx, "compatible"); - if (!t->manufacturer) - t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; -@@ -503,6 +513,9 @@ ulong write_smbios_table(ulong addr) - if (IS_ENABLED(CONFIG_OF_CONTROL) && method->subnode_name) - ctx.node = ofnode_find_subnode(parent_node, - method->subnode_name); -+ /* If we can't find any smbios node fallback to the entire DT */ -+ if (!ofnode_valid(ctx.node)) -+ ctx.node = ofnode_root(); - tmp = method->write((ulong *)&addr, handle++, &ctx); - - max_struct_size = max(max_struct_size, tmp); diff --git a/uboot-tools.spec b/uboot-tools.spec index 63125e4..503380f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -19,7 +19,7 @@ Source1: aarch64-boards # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch2: smbios-test-dmi.patch +Patch2: smbios-Simplify-reporting-of-unknown-values.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support @@ -210,6 +210,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Sep 06 2022 Peter Robinson - 2022.10-0.6.rc4 +- Update SMBIOS patch + * Tue Sep 06 2022 Peter Robinson - 2022.10-0.5.rc4 - Update to 2022.10 RC4 - Fix for booting Rockchip devices from NVME From 716e4d578e74142b8c7b696eda62668120d59fa3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 10 Oct 2022 20:43:56 +0100 Subject: [PATCH 205/351] 2022.10 GA --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 1ac9bfe..ec76487 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.10-rc4.tar.bz2) = 678b64480d794af987e462076575db9b3b44a458fca5e68f8f0df5701d40642c4e10e5f2d3daa50513c30d5573a57c0d1f4707178a385ca0509bc1d5412f81ea +SHA512 (u-boot-2022.10.tar.bz2) = 95bc1f915a3349f6045e59f46d8514485ca0de1d62303f7026b8e59f3ac539b9545895e0dd736ed7b26f28239db31672ecad2accc3fd99356a55269697039147 diff --git a/uboot-tools.spec b/uboot-tools.spec index 503380f..1cf1c00 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +#global candidate rc1 %if !0%{?rhel} %bcond_without toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2022.10 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -210,6 +210,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Oct 10 2022 Peter Robinson - 2022.10-1 +- Update to 2022.10 GA + * Tue Sep 06 2022 Peter Robinson - 2022.10-0.6.rc4 - Update SMBIOS patch From 56a26f9cc480affc48ed3af8be923560170453d9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 24 Nov 2022 13:10:24 +0000 Subject: [PATCH 206/351] 2023.01 RC2 --- aarch64-boards | 1 + ...nitial-support-for-the-PinePhone-Pro.patch | 82 +++++++++++++++++++ sources | 2 +- uboot-tools.spec | 18 ++-- ...DT-from-any-partition-on-boot-device.patch | 17 ++-- 5 files changed, 106 insertions(+), 14 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index ab282d9..6cd34df 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -61,6 +61,7 @@ pinebook pinebook-pro-rk3399 pine_h64 pinephone +pinephone-pro-rk3399 pinetab poplar puma-rk3399 diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch index 3dc7614..f06c063 100644 --- a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +++ b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -884,3 +884,85 @@ index 0000000000..fefa793fdd +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 + +#endif +--- u-boot-2022.10/configs/pinephone-pro-rk3399_defconfig.orig 2022-10-12 16:14:17.050158119 +0100 ++++ u-boot-2022.10/configs/pinephone-pro-rk3399_defconfig 2022-10-12 16:14:28.525240728 +0100 +@@ -1,27 +1,37 @@ + CONFIG_ARM=y + CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 + CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 + CONFIG_NR_DRAM_BANKS=1 + CONFIG_ENV_SIZE=0x8000 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" + CONFIG_ROCKCHIP_RK3399=y + CONFIG_TARGET_PINEPHONE_PRO_RK3399=y + CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SPL_SPI_FLASH_SUPPORT=y +-CONFIG_SPL_SPI_SUPPORT=y +-CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" +-CONFIG_DEBUG_UART=y ++CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0x800800 ++CONFIG_DEBUG_UART=y ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 + CONFIG_BOOTDELAY=3 + CONFIG_USE_PREBOOT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_MISC_INIT_R=y ++CONFIG_SPL_MAX_SIZE=0x2e000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y ++CONFIG_SPL_BSS_START_ADDR=0x400000 ++CONFIG_SPL_BSS_MAX_SIZE=0x2000 + # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set ++CONFIG_SPL_STACK=0x400000 + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +-CONFIG_SPL_MTD_SUPPORT=y + CONFIG_SPL_SPI_LOAD=y + CONFIG_TPL=y + CONFIG_CMD_BOOTZ=y +@@ -39,6 +49,7 @@ + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" + CONFIG_ENV_IS_IN_SPI_FLASH=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEYBOARD=y +@@ -51,10 +62,10 @@ + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y +-CONFIG_DM_ETH=y + CONFIG_PHY_ROCKCHIP_INNO_USB2=y + CONFIG_PHY_ROCKCHIP_TYPEC=y + CONFIG_DM_PMIC_FAN53555=y +@@ -77,6 +88,7 @@ + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y ++CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 + CONFIG_USB_DWC3=y + CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_KEYBOARD=y +--- u-boot-2022.10/include/configs/pinephone-pro-rk3399.h.orig 2022-10-12 16:14:51.881408874 +0100 ++++ u-boot-2022.10/include/configs/pinephone-pro-rk3399.h 2022-10-12 16:14:58.693457915 +0100 +@@ -17,7 +17,4 @@ + + #define SDRAM_BANK_SIZE (2UL << 30) + +-#define CONFIG_USB_OHCI_NEW +-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +- + #endif diff --git a/sources b/sources index ec76487..68c900c 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2022.10.tar.bz2) = 95bc1f915a3349f6045e59f46d8514485ca0de1d62303f7026b8e59f3ac539b9545895e0dd736ed7b26f28239db31672ecad2accc3fd99356a55269697039147 +SHA512 (u-boot-2023.01-rc2.tar.bz2) = fd3c25db53c59ec2a101955582a5e240b178e7e3e29e9a0070687411ff5bbe0f2bb1bb398198572ba9724870482c947432bc5256da7f7761bed693e8c613b433 diff --git a/uboot-tools.spec b/uboot-tools.spec index 1cf1c00..3dbadd9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,13 +1,13 @@ -#global candidate rc1 -%if !0%{?rhel} -%bcond_without toolsonly -%else +%global candidate rc2 +%if 0%{?rhel} %bcond_with toolsonly +%else +%bcond_without toolsonly %endif Name: uboot-tools -Version: 2022.10 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2023.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -47,9 +47,11 @@ BuildRequires: python3-setuptools BuildRequires: python3-libfdt BuildRequires: SDL-devel BuildRequires: swig +%if %{with toolsonly} %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 %endif +%endif Requires: dtc %description @@ -210,6 +212,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Thu Nov 24 2022 Peter Robinson - 2023.01-0.1.rc2 +- Update to U-Boot 2023.01 RC2 +- Update Pinephone Pro patches + * Mon Oct 10 2022 Peter Robinson - 2022.10-1 - Update to 2022.10 GA diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index c28fdb0..112c79e 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -1,6 +1,6 @@ -From fd3434c754b3b8dddb345352a2434b6b8445343a Mon Sep 17 00:00:00 2001 +From 4306c538d4a00dd1aa46c55c3c4005c2b0bf7cd5 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Sun, 18 Apr 2021 14:05:45 +0100 +Date: Thu, 24 Nov 2022 12:57:55 +0000 Subject: [PATCH] distro: load FDT from any partition on boot device In the EFI_LOADER boot path, we were only checking the FAT partition @@ -22,14 +22,14 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know). Signed-off-by: Rob Clark Signed-off-by: Peter Robinson --- - include/config_distro_bootcmd.h | 35 ++++++++++++++++++++++----------- - 1 file changed, 23 insertions(+), 12 deletions(-) + include/config_distro_bootcmd.h | 37 +++++++++++++++++++++------------ + 1 file changed, 24 insertions(+), 13 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 2627c2a6a5..eadd1080b3 100644 +index fcb319a20ae..e71004fad9c 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h -@@ -148,26 +148,37 @@ +@@ -155,28 +155,39 @@ "fi\0" \ \ "load_efi_dtb=" \ @@ -44,11 +44,13 @@ index 2627c2a6a5..eadd1080b3 100644 + "scan_dev_for_dtb=" \ "setenv efi_fdtfile ${fdtfile}; " \ BOOTENV_EFI_SET_FDTFILE_FALLBACK \ + BOOTENV_RUN_EXTENSION_INIT \ - "for prefix in ${efi_dtb_prefixes}; do " \ - "if test -e ${devtype} " \ - "${devnum}:${distro_bootpart} " \ - "${prefix}${efi_fdtfile}; then " \ - "run load_efi_dtb; " \ +- BOOTENV_RUN_EXTENSION_APPLY \ - "fi;" \ - "done;" \ - "run boot_efi_bootmgr;" \ @@ -65,6 +67,7 @@ index 2627c2a6a5..eadd1080b3 100644 + "${devnum}:${dtb_devp} " \ + "${prefix}${efi_fdtfile};"\ + "run load_efi_dtb; " \ ++ BOOTENV_RUN_EXTENSION_APPLY + "fi;" \ + "done; " \ + "done; " \ @@ -80,5 +83,5 @@ index 2627c2a6a5..eadd1080b3 100644 "fi; " \ "setenv efi_fdtfile\0" -- -2.31.1 +2.38.1 From a56399745c9d127d365cffd7f3ca1284b8ac3e37 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 24 Nov 2022 14:02:10 +0000 Subject: [PATCH 207/351] Fix building utils --- ...LOGO-to-tools-only-to-build-bmp_logo.patch | 25 +++++++++++++++++++ uboot-tools.spec | 3 ++- 2 files changed, 27 insertions(+), 1 deletion(-) create mode 100644 0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch diff --git a/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch b/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch new file mode 100644 index 0000000..dcf5229 --- /dev/null +++ b/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch @@ -0,0 +1,25 @@ +From 11ff7f20123629bb4271db41a170e9ad69126dc2 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 24 Nov 2022 13:39:05 +0000 +Subject: [PATCH] add VIDEO_LOGO to tools-only to build bmp_logo + +Signed-off-by: Peter Robinson +--- + configs/tools-only_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig +index 86464d2f075..c3b3b387818 100644 +--- a/configs/tools-only_defconfig ++++ b/configs/tools-only_defconfig +@@ -27,6 +27,7 @@ CONFIG_DM_RTC=y + CONFIG_SOUND=y + CONFIG_SYSRESET=y + CONFIG_TIMER=y ++CONFIG_VIDEO=y + # CONFIG_VIRTIO_MMIO is not set + # CONFIG_VIRTIO_PCI is not set + # CONFIG_VIRTIO_SANDBOX is not set +-- +2.38.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 3dbadd9..29f2181 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -30,6 +30,7 @@ Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch Patch8: 0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch +Patch9: 0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch BuildRequires: bc BuildRequires: bison @@ -180,7 +181,7 @@ done %endif %endif -for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes kwboot +for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done From 47aa93aa340ecf3f365fbf336e51e8dbcac053ae Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 24 Nov 2022 14:16:33 +0000 Subject: [PATCH 208/351] fix uefi patch rebase --- uefi-distro-load-FDT-from-any-partition-on-boot-device.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch index 112c79e..5954848 100644 --- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -67,7 +67,7 @@ index fcb319a20ae..e71004fad9c 100644 + "${devnum}:${dtb_devp} " \ + "${prefix}${efi_fdtfile};"\ + "run load_efi_dtb; " \ -+ BOOTENV_RUN_EXTENSION_APPLY ++ BOOTENV_RUN_EXTENSION_APPLY \ + "fi;" \ + "done; " \ + "done; " \ From 8bcd936f72c750b30d2f52a06b2dcc2b204c508d Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 24 Nov 2022 16:25:37 +0000 Subject: [PATCH 209/351] disable PPP for the moment as it's seemingly locking up the builds --- aarch64-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index 6cd34df..ab282d9 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -61,7 +61,6 @@ pinebook pinebook-pro-rk3399 pine_h64 pinephone -pinephone-pro-rk3399 pinetab poplar puma-rk3399 From 70b0c177c313d49c1985840fe89723f2884dd885 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 5 Dec 2022 21:08:19 +0000 Subject: [PATCH 210/351] 2023.01 RC3 --- ...c-rk8xx-Support-sysreset-shutdown-me.patch | 92 ----------- ...LOGO-to-tools-only-to-build-bmp_logo.patch | 25 --- ...not-initialize-i2c-before-relocation.patch | 148 ++++++++++++++++++ sources | 2 +- uboot-tools.spec | 10 +- 5 files changed, 155 insertions(+), 122 deletions(-) delete mode 100644 0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch delete mode 100644 0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch create mode 100644 rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch diff --git a/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch b/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch deleted file mode 100644 index 3c297e3..0000000 --- a/0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 17096f20920205200b88d6d8facdbef0d3d3d3e8 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 4 Sep 2022 22:22:50 +0100 -Subject: [PATCH] Revert "power: pmic: rk8xx: Support sysreset shutdown method" - -This reverts commit ad607512f5757f4485968efd5bcf2c0245a8a235. ---- - drivers/power/pmic/rk8xx.c | 50 +------------------------------------- - 1 file changed, 1 insertion(+), 49 deletions(-) - -diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c -index 25ef621f8df..8d703112c38 100644 ---- a/drivers/power/pmic/rk8xx.c -+++ b/drivers/power/pmic/rk8xx.c -@@ -6,50 +6,10 @@ - - #include - #include --#include - #include - #include - #include - #include --#include -- --static int rk8xx_sysreset_request(struct udevice *dev, enum sysreset_t type) --{ -- struct rk8xx_priv *priv = dev_get_priv(dev->parent); -- -- if (type != SYSRESET_POWER_OFF) -- return -EPROTONOSUPPORT; -- -- switch (priv->variant) { -- case RK805_ID: -- case RK808_ID: -- case RK816_ID: -- case RK818_ID: -- pmic_clrsetbits(dev->parent, REG_DEVCTRL, 0, BIT(0)); -- break; -- case RK809_ID: -- case RK817_ID: -- pmic_clrsetbits(dev->parent, RK817_REG_SYS_CFG3, 0, -- BIT(0)); -- break; -- default: -- printf("Unknown PMIC RK%x: Cannot shutdown\n", -- priv->variant); -- return -EPROTONOSUPPORT; -- }; -- -- return -EINPROGRESS; --} -- --static struct sysreset_ops rk8xx_sysreset_ops = { -- .request = rk8xx_sysreset_request, --}; -- --U_BOOT_DRIVER(rk8xx_sysreset) = { -- .name = "rk8xx_sysreset", -- .id = UCLASS_SYSRESET, -- .ops = &rk8xx_sysreset_ops, --}; - - /* In the event of a plug-in and the appropriate option has been - * selected, we simply shutdown instead of continue the normal boot -@@ -133,7 +93,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) - static int rk8xx_bind(struct udevice *dev) - { - ofnode regulators_node; -- int children, ret; -+ int children; - - regulators_node = dev_read_subnode(dev, "regulators"); - if (!ofnode_valid(regulators_node)) { -@@ -144,14 +104,6 @@ static int rk8xx_bind(struct udevice *dev) - - debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); - -- if (CONFIG_IS_ENABLED(SYSRESET)) { -- ret = device_bind_driver_to_node(dev, "rk8xx_sysreset", -- "rk8xx_sysreset", -- dev_ofnode(dev), NULL); -- if (ret) -- return ret; -- } -- - children = pmic_bind_children(dev, regulators_node, pmic_children_info); - if (!children) - debug("%s: %s - no child found\n", __func__, dev->name); --- -2.37.3 - diff --git a/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch b/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch deleted file mode 100644 index dcf5229..0000000 --- a/0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 11ff7f20123629bb4271db41a170e9ad69126dc2 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 24 Nov 2022 13:39:05 +0000 -Subject: [PATCH] add VIDEO_LOGO to tools-only to build bmp_logo - -Signed-off-by: Peter Robinson ---- - configs/tools-only_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig -index 86464d2f075..c3b3b387818 100644 ---- a/configs/tools-only_defconfig -+++ b/configs/tools-only_defconfig -@@ -27,6 +27,7 @@ CONFIG_DM_RTC=y - CONFIG_SOUND=y - CONFIG_SYSRESET=y - CONFIG_TIMER=y -+CONFIG_VIDEO=y - # CONFIG_VIRTIO_MMIO is not set - # CONFIG_VIRTIO_PCI is not set - # CONFIG_VIRTIO_SANDBOX is not set --- -2.38.1 - diff --git a/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch b/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch new file mode 100644 index 0000000..c7a1992 --- /dev/null +++ b/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch @@ -0,0 +1,148 @@ +From patchwork Sat Dec 3 12:31:29 2022 +Content-Type: text/plain; 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+ bh=MxiYvt7AyD2raveb0nYOqctq9SwZhhFlUOQQnvLVaQg=; + b=ITqbCEv62X454NT22kzCNg+NOS6Iu0cxcF+xhUtLc6CDIy3Cv4GXp20Wi7qIeywhmkKMLT + bzobwsBrib9t1NDw== +Received: from naga.suse.cz (unknown [10.100.224.114]) + by relay2.suse.de (Postfix) with ESMTP id 719FC2C141; + Sat, 3 Dec 2022 12:31:34 +0000 (UTC) +From: Michal Suchanek +To: u-boot@lists.denx.de +Cc: Michal Suchanek , Simon Glass , + Philipp Tomsich , + Kever Yang , + Peter Robinson +Subject: [PATCH] rockchip: Pinebook Pro: Do not initialize i2c before + relocation +Date: Sat, 3 Dec 2022 13:31:29 +0100 +Message-Id: <20221203123129.27645-1-msuchanek@suse.de> +X-Mailer: git-send-email 2.38.1 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de +X-Virus-Status: Clean + +The i2c locks up when initialized before relocation, and it stays broken +in Linux as well breaking the ability to boot Linux. + +The i2c bus and pmic was not actually used in pre-reloc before +commit ad607512f575 ("power: pmic: rk8xx: Support sysreset shutdown method") + +The cause is not known. + +This is board-specific, other boards that do not add the option to +include the i2c bus in pre-reloc DT are not affected. + +Signed-off-by: Michal Suchanek +--- + +This is not tested, my board does not currentl;y boot at all, YMMV +--- + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 8 -------- + 1 file changed, 8 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index 2d87bea933..fd87102c0b 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -20,14 +20,6 @@ + rockchip,panel = <&edp_panel>; + }; + +-&i2c0 { +- u-boot,dm-pre-reloc; +-}; +- +-&rk808 { +- u-boot,dm-pre-reloc; +-}; +- + &sdhci { + max-frequency = <25000000>; + u-boot,dm-pre-reloc; diff --git a/sources b/sources index 68c900c..a4cdf37 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.01-rc2.tar.bz2) = fd3c25db53c59ec2a101955582a5e240b178e7e3e29e9a0070687411ff5bbe0f2bb1bb398198572ba9724870482c947432bc5256da7f7761bed693e8c613b433 +SHA512 (u-boot-2023.01-rc3.tar.bz2) = fe48fbe285003b44095f420355919cb0a69613bdf17483c6fcace387f079b590a4ae4258813d676d1a84476853b70096287516e618bffb4702ee7f160ec3f764 diff --git a/uboot-tools.spec b/uboot-tools.spec index 29f2181..17b3212 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -29,8 +29,7 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch8: 0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch -Patch9: 0001-add-VIDEO_LOGO-to-tools-only-to-build-bmp_logo.patch +Patch8: rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch BuildRequires: bc BuildRequires: bison @@ -213,6 +212,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Dec 05 2022 Peter Robinson - 2023.01-0.2.rc3 +- Update to 2023.01 RC3 + * Thu Nov 24 2022 Peter Robinson - 2023.01-0.1.rc2 - Update to U-Boot 2023.01 RC2 - Update Pinephone Pro patches From bc28006c894c084719bd3be2005eb4793a026755 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 20 Dec 2022 03:30:32 +0000 Subject: [PATCH 211/351] 2023.01 RC4 --- sources | 2 +- uboot-tools.spec | 11 +++++++---- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/sources b/sources index a4cdf37..e2935f1 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.01-rc3.tar.bz2) = fe48fbe285003b44095f420355919cb0a69613bdf17483c6fcace387f079b590a4ae4258813d676d1a84476853b70096287516e618bffb4702ee7f160ec3f764 +SHA512 (u-boot-2023.01-rc4.tar.bz2) = 42c5693e2dafb83af64e6958567a5cdf4452d6799fc12214fb60ebd6753bfe24b41dfdc7f1c373b35dfaada35a819e8a1a4958eff64f806c0610f764b73dbbcd diff --git a/uboot-tools.spec b/uboot-tools.spec index 17b3212..d0de0e0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -110,8 +110,8 @@ do fi # End ATF - make $(echo $board)_defconfig O=builds/$(echo $board)/ - %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ + BINMAN_ALLOW_MISSING=1 make $(echo $board)_defconfig O=builds/$(echo $board)/ + BINMAN_ALLOW_MISSING=1 %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ # build spi images for rockchip boards with SPI flash rkspi=(rock64-rk3328) @@ -212,6 +212,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Dec 20 2022 Peter Robinson - 2023.01-0.3.rc4 +- Update to 2023.01 RC4 + * Mon Dec 05 2022 Peter Robinson - 2023.01-0.2.rc3 - Update to 2023.01 RC3 From d245dbb379a8a206e1caf823b8229b91037b7469 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 20 Dec 2022 03:51:10 +0000 Subject: [PATCH 212/351] drop upstreamed PBP patch --- ...not-initialize-i2c-before-relocation.patch | 148 ------------------ uboot-tools.spec | 1 - 2 files changed, 149 deletions(-) delete mode 100644 rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch diff --git a/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch b/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch deleted file mode 100644 index c7a1992..0000000 --- a/rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch +++ /dev/null @@ -1,148 +0,0 @@ -From patchwork Sat Dec 3 12:31:29 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Michal Suchanek -X-Patchwork-Id: 1711682 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 - header.s=susede2_rsa header.b=wxtn4xc3; - dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=ITqbCEv6; - dkim-atps=neutral -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4NPThH74WSz23mf - for ; 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- bh=MxiYvt7AyD2raveb0nYOqctq9SwZhhFlUOQQnvLVaQg=; - b=ITqbCEv62X454NT22kzCNg+NOS6Iu0cxcF+xhUtLc6CDIy3Cv4GXp20Wi7qIeywhmkKMLT - bzobwsBrib9t1NDw== -Received: from naga.suse.cz (unknown [10.100.224.114]) - by relay2.suse.de (Postfix) with ESMTP id 719FC2C141; - Sat, 3 Dec 2022 12:31:34 +0000 (UTC) -From: Michal Suchanek -To: u-boot@lists.denx.de -Cc: Michal Suchanek , Simon Glass , - Philipp Tomsich , - Kever Yang , - Peter Robinson -Subject: [PATCH] rockchip: Pinebook Pro: Do not initialize i2c before - relocation -Date: Sat, 3 Dec 2022 13:31:29 +0100 -Message-Id: <20221203123129.27645-1-msuchanek@suse.de> -X-Mailer: git-send-email 2.38.1 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean - -The i2c locks up when initialized before relocation, and it stays broken -in Linux as well breaking the ability to boot Linux. - -The i2c bus and pmic was not actually used in pre-reloc before -commit ad607512f575 ("power: pmic: rk8xx: Support sysreset shutdown method") - -The cause is not known. - -This is board-specific, other boards that do not add the option to -include the i2c bus in pre-reloc DT are not affected. - -Signed-off-by: Michal Suchanek ---- - -This is not tested, my board does not currentl;y boot at all, YMMV ---- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 8 -------- - 1 file changed, 8 deletions(-) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index 2d87bea933..fd87102c0b 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -20,14 +20,6 @@ - rockchip,panel = <&edp_panel>; - }; - --&i2c0 { -- u-boot,dm-pre-reloc; --}; -- --&rk808 { -- u-boot,dm-pre-reloc; --}; -- - &sdhci { - max-frequency = <25000000>; - u-boot,dm-pre-reloc; diff --git a/uboot-tools.spec b/uboot-tools.spec index d0de0e0..409e35b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -29,7 +29,6 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch # Rockchips improvements Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch8: rockchip-Pinebook-Pro-Do-not-initialize-i2c-before-relocation.patch BuildRequires: bc BuildRequires: bison From c811eec4b727c701ccebdd327ddebe51522a6c1c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 20 Dec 2022 03:57:41 +0000 Subject: [PATCH 213/351] Use SDL2 --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 409e35b..09d8e3e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -44,7 +44,7 @@ BuildRequires: perl-interpreter BuildRequires: python3-devel BuildRequires: python3-setuptools BuildRequires: python3-libfdt -BuildRequires: SDL-devel +BuildRequires: SDL2-devel BuildRequires: swig %if %{with toolsonly} %ifarch aarch64 From eee75bb93405dab219d382f79435fd65ef4aa9df Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 31 Dec 2022 11:06:47 +0000 Subject: [PATCH 214/351] Update PinePhone Pro to latest rev --- aarch64-boards | 3 +- ...nitial-support-for-the-PinePhone-Pro.patch | 722 ++++++++---------- uboot-tools.spec | 5 +- 3 files changed, 343 insertions(+), 387 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index ab282d9..f8e2f3b 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -61,6 +61,7 @@ pinebook pinebook-pro-rk3399 pine_h64 pinephone +pinephone-pro-rk3399 pinetab poplar puma-rk3399 @@ -77,8 +78,8 @@ roc-pc-rk3399 rpi_3 rpi_4 rpi_arm64 -starqltechn sopine_baseboard +starqltechn tanix_tx6 teres_i turris_mox diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch index f06c063..30012ad 100644 --- a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +++ b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -1,34 +1,38 @@ -From: Martijn Braam -Subject: [PATCH] rockchip: Add initial support for the PinePhone Pro -Date: Thu, 21 Oct 2021 19:18:43 +0200 +From 004af623388022d258cbc29c0b71d8e22cd96c52 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 31 Dec 2022 09:20:34 +0000 +Subject: [PATCH v2 0/2] Initial support for Pinephone Pro -This is a new device by PINE64 that's very similar to the Pinebook Pro -that's already supported. +This adds initial support for the PINE64 Pinephone Pro. It's a rebase +to upstream core rk3399 DT pieces, and the addition of the upstream +PPP DT from 6.2-rc1 and the U-Boot pieces are based on my work on +the Pinebook Pro. -Specification: -- Rockchip RK3399 -- 4GB Dual-Channel LPDDR4 -- 128GB eMMC -- mSD card slot -- AP6255 for 802.11ac WiFi and Bluetooth -- 6 inch 720*1440 DSI display -- Quectel EG25g usb modem -- Type-C port with alt-mode display (DP 1.2) and PD charging. +Changes v2: +- Drop the rk3399.dtsi sync for time being, causing issues around + clock/dram +- Sync the Pinephone DT to 6.2-rc1 +- Update for the CONFIG_SYS_TEXT_BASE -> CONFIG_TEXT_BASE change +- usb: ohci: Use a flexible array member for portstatus +- Rename CONFIG_DM_VIDEO to CONFIG_VIDEO +- Enable DM_REGULATOR_FAN53555 +- Don't initialize i2c before relocation -Signed-off-by: Martijn Braam ---- +Peter Robinson (2): + arm64: dts: rk3399: Add upstream Pinephone Pro dts + rockchip: Add initial support for the PINE64 Pinephone Pro arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 44 ++ - arch/arm/dts/rk3399-pinephone-pro.dts | 520 ++++++++++++++++++ + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 31 ++ + arch/arm/dts/rk3399-pinephone-pro.dts | 474 ++++++++++++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 8 + board/pine64/pinephone-pro-rk3399/Kconfig | 15 + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 + board/pine64/pinephone-pro-rk3399/Makefile | 1 + - .../pinephone-pro-rk3399.c | 57 ++ - configs/pinephone-pro-rk3399_defconfig | 92 ++++ - include/configs/pinephone-pro-rk3399.h | 23 + - 10 files changed, 769 insertions(+) + .../pinephone-pro-rk3399.c | 76 +++ + configs/pinephone-pro-rk3399_defconfig | 104 ++++ + include/configs/pinephone-pro-rk3399.h | 19 + + 10 files changed, 737 insertions(+) create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig @@ -37,12 +41,30 @@ Signed-off-by: Martijn Braam create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c create mode 100644 configs/pinephone-pro-rk3399_defconfig create mode 100644 include/configs/pinephone-pro-rk3399.h - + +-- +2.39.0 + +From 9976caacb35316cbe047ded58855d2ca1a54243b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 31 Dec 2022 09:18:44 +0000 +Subject: [PATCH v2 1/2] arm64: dts: rk3399: Add upstream Pinephone Pro dts + +Initial support for the PinePhone Pro has now landed upstream in +Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/rk3399-pinephone-pro.dts | 474 ++++++++++++++++++++++++++ + 2 files changed, 475 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts + diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index ed3d360bb1..3206370226 100644 +index 43951a7731e..8c1eec1025f 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -137,6 +137,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ +@@ -153,6 +153,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-nanopi-r4s.dtb \ rk3399-orangepi.dtb \ rk3399-pinebook-pro.dtb \ @@ -50,106 +72,115 @@ index ed3d360bb1..3206370226 100644 rk3399-puma-haikou.dtb \ rk3399-roc-pc.dtb \ rk3399-roc-pc-mezzanine.dtb \ -diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -new file mode 100644 -index 0000000000..9d44db5978 ---- /dev/null -+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -@@ -0,0 +1,44 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2019 Peter Robinson -+ * Copyright (C) 2021 Martijn Braam -+ */ -+ -+#include "rk3399-u-boot.dtsi" -+#include "rk3399-sdram-lpddr4-100.dtsi" -+ -+/ { -+ aliases { -+ spi0 = &spi1; -+ }; -+ -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; -+ }; -+ -+ config { -+ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ -+ }; -+}; -+ -+&i2c0 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&rk818 { -+ u-boot,dm-pre-reloc; -+}; -+ -+&rng { -+ status = "okay"; -+}; -+ -+&sdhci { -+ max-frequency = <25000000>; -+ u-boot,dm-pre-reloc; -+}; -+ -+&sdmmc { -+ max-frequency = <20000000>; -+ u-boot,dm-pre-reloc; -+}; diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts new file mode 100644 -index 0000000000..3fe1845ced +index 00000000000..04403a76238 --- /dev/null +++ b/arch/arm/dts/rk3399-pinephone-pro.dts -@@ -0,0 +1,520 @@ +@@ -0,0 +1,474 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* -+ * Copyright (c) 2021 Martijn Braam ++ * Copyright (c) 2020 Martijn Braam ++ * Copyright (c) 2021 Kamil Trzciński ++ */ ++ ++/* ++ * PinePhone Pro datasheet: ++ * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf + */ + +/dts-v1/; ++#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { -+ model = "Pine64 PinePhone Pro"; ++ model = "Pine64 PinePhonePro"; + compatible = "pine64,pinephone-pro", "rockchip,rk3399"; ++ chassis-type = "handset"; ++ ++ aliases { ++ mmc0 = &sdio0; ++ mmc1 = &sdmmc; ++ mmc2 = &sdhci; ++ }; + + chosen { -+ stdout-path = "serial2:1500000n8"; ++ stdout-path = "serial2:115200n8"; + }; + -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; ++ gpio-keys { ++ compatible = "gpio-keys"; + pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn_pin>; ++ ++ key-power { ++ debounce-interval = <20>; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "Power"; ++ linux,code = ; ++ wakeup-source; ++ }; + }; + -+ /* Power tree */ -+ /* Root power source */ -+ vcc_sysin: vcc-sysin { ++ vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; -+ regulator-name = "vcc_sysin"; ++ regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + }; + -+ /* Main 3.3v supply */ -+ vcc3v3_sys: vcc3v3-sys { ++ vcc3v3_sys: vcc3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_sysin>; ++ vin-supply = <&vcc_sys>; ++ }; + -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; ++ vcca1v8_s3: vcc1v8-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcca1v8_s3"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc1v8_codec: vcc1v8-codec-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc1v8_codec_en>; ++ regulator-name = "vcc1v8_codec"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ wifi_pwrseq: sdio-wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk818 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h_pin>; ++ /* ++ * Wait between power-on and SDIO access for CYP43455 ++ * POR circuit. ++ */ ++ post-power-on-delay-ms = <110>; ++ /* ++ * Wait between consecutive toggles for CYP43455 CBUCK ++ * regulator discharge. ++ */ ++ power-off-delay-us = <10000>; ++ ++ /* WL_REG_ON on module */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; +}; + @@ -181,11 +212,6 @@ index 0000000000..3fe1845ced + status = "okay"; +}; + -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; @@ -204,22 +230,22 @@ index 0000000000..3fe1845ced + rockchip,system-power-controller; + wakeup-source; + -+ vcc1-supply = <&vcc_sysin>; -+ vcc2-supply = <&vcc_sysin>; -+ vcc3-supply = <&vcc_sysin>; -+ vcc4-supply = <&vcc_sysin>; -+ vcc6-supply = <&vcc_sysin>; ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc_sysin>; ++ vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc3v3_sys>; + + regulators { + vdd_cpu_l: DCDC_REG1 { -+ regulator-name = "vdd_cpu_1"; ++ regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; ++ regulator-min-microvolt = <875000>; ++ regulator-max-microvolt = <975000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; @@ -231,7 +257,7 @@ index 0000000000..3fe1845ced + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1350000>; ++ regulator-max-microvolt = <1000000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; @@ -255,52 +281,35 @@ index 0000000000..3fe1845ced + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca3v0_codec: LDO_REG1 { + regulator-name = "vcca3v0_codec"; -+ regulator-always-on; -+ regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; + }; + + vcc3v0_touch: LDO_REG2 { + regulator-name = "vcc3v0_touch"; -+ regulator-always-on; -+ regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; + }; + + vcca1v8_codec: LDO_REG3 { + regulator-name = "vcca1v8_codec"; -+ regulator-always-on; -+ regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; + }; + -+ vcc_power_on: LDO_REG4 { -+ regulator-name = "vcc_power_on"; ++ rk818_pwr_on: LDO_REG4 { ++ regulator-name = "rk818_pwr_on"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; + }; + }; + @@ -312,7 +321,6 @@ index 0000000000..3fe1845ced + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; + }; + }; + @@ -324,19 +332,13 @@ index 0000000000..3fe1845ced + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc1v8_dvp: LDO_REG7 { + regulator-name = "vcc1v8_dvp"; -+ regulator-always-on; -+ regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; + }; + + vcc3v3_s3: LDO_REG8 { @@ -350,14 +352,10 @@ index 0000000000..3fe1845ced + }; + }; + -+ vcc_sd: LDO_REG9 { -+ regulator-name = "vcc_sd"; ++ vccio_sd: LDO_REG9 { ++ regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; + }; + + vcc3v3_s0: SWITCH_REG { @@ -368,22 +366,6 @@ index 0000000000..3fe1845ced + regulator-on-in-suspend; + }; + }; -+ -+ boost_otg: DCDC_BOOST { -+ regulator-name = "boost_otg"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <5000000>; -+ }; -+ }; -+ -+ otg_switch: OTG_SWITCH { -+ regulator-name = "otg_switch"; -+ }; + }; + }; + @@ -394,8 +376,8 @@ index 0000000000..3fe1845ced + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; ++ regulator-min-microvolt = <875000>; ++ regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; @@ -412,8 +394,8 @@ index 0000000000..3fe1845ced + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; ++ regulator-min-microvolt = <875000>; ++ regulator-max-microvolt = <975000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; @@ -424,95 +406,47 @@ index 0000000000..3fe1845ced + }; +}; + -+&i2c1 { -+ i2c-scl-rising-time-ns = <300>; -+ i2c-scl-falling-time-ns = <15>; -+ status = "okay"; ++&cluster0_opp { ++ opp04 { ++ status = "disabled"; ++ }; ++ ++ opp05 { ++ status = "disabled"; ++ }; +}; + -+&i2c3 { -+ i2c-scl-rising-time-ns = <450>; -+ i2c-scl-falling-time-ns = <15>; -+ status = "okay"; -+}; ++&cluster1_opp { ++ opp06 { ++ opp-hz = /bits/ 64 <1500000000>; ++ opp-microvolt = <1100000 1100000 1150000>; ++ }; + -+&i2c4 { -+ i2c-scl-rising-time-ns = <600>; -+ i2c-scl-falling-time-ns = <20>; -+ status = "okay"; -+ -+ fusb0: typec-portc@22 { -+ compatible = "fcs,fusb302"; -+ reg = <0x22>; -+ interrupt-parent = <&gpio1>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fusb0_int>; -+ status = "okay"; ++ opp07 { ++ status = "disabled"; + }; +}; + +&io_domains { -+ status = "okay"; -+ + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; -+ sdmmc-supply = <&vcc_sd>; ++ sdmmc-supply = <&vccio_sd>; + gpio1830-supply = <&vcc_3v0>; ++ status = "okay"; +}; + +&pmu_io_domains { -+ pmu1830-supply = <&vcc_3v0>; ++ pmu1830-supply = <&vcc_1v8>; + status = "okay"; +}; + +&pinctrl { -+ bt { -+ bt_enable_h: bt-enable-h { -+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_host_wake_l: bt-host-wake-l { -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ bt_wake_l: bt-wake-l { -+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ + buttons { -+ pwrbtn: pwrbtn { ++ pwrbtn_pin: pwrbtn-pin { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + -+ fusb302x { -+ fusb0_int: fusb0-int { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ leds { -+ work_led_pin: work-led-pin { -+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ diy_led_pin: diy-led-pin { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pcie { -+ pcie_perst: pcie-perst { -+ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pcie_pwr_en: pcie-pwr-en { -+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; @@ -527,51 +461,40 @@ index 0000000000..3fe1845ced + }; + }; + -+ sdcard { -+ sdmmc0_pwr_h: sdmmc0-pwr-h { -+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ }; -+ + sdio-pwrseq { -+ wifi_enable_h: wifi-enable-h { ++ wifi_enable_h_pin: wifi-enable-h-pin { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + -+ usb-typec { -+ vcc5v0_typec_en: vcc5v0_typec_en { -+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ sound { ++ vcc1v8_codec_en: vcc1v8-codec-en { ++ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + -+ usb2 { -+ vcc5v0_host_en: vcc5v0-host-en { -+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ wireless-bluetooth { ++ bt_wake_pin: bt-wake-pin { ++ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_pin: bt-host-wake-pin { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_reset_pin: bt-reset-pin { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + -+&pwm0 { -+ status = "okay"; -+}; -+ -+&pwm1 { -+ status = "okay"; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; -+ mmc-pwrseq = <&sdio_pwrseq>; ++ mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; @@ -582,13 +505,13 @@ index 0000000000..3fe1845ced +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; -+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; -+ vmmc-supply = <&vcc3v3_s3>; -+ vqmmc-supply = <&vcc_1v8>; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ vmmc-supply = <&vcc3v3_sys>; ++ vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + @@ -600,51 +523,133 @@ index 0000000000..3fe1845ced +}; + +&tsadc { -+ /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; -+ /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rk818 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ vbat-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc_1v8>; ++ }; ++}; ++ +&uart2 { + status = "okay"; +}; +-- +2.39.0 + +From 004af623388022d258cbc29c0b71d8e22cd96c52 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 28 Dec 2022 03:52:27 +0000 +Subject: [PATCH v2 2/2] rockchip: Add initial support for the PINE64 Pinephone + Pro + +The Pinephone Pro is another device by PINE64. It's closely related +to the Pinebook Pro of which this initial support is derived from. + +Specification: +- A variant of the Rockchip RK3399 +- A 6 inch 720*1440 DSI display +- Front and rear cameras +- Type-C interface with alt mode display (DP 1.2) and PD charging +- 4GB LPDDR4 RAM +- 128GB eMMC +- mSD card slot +- An AP6255 module for 802.11ac WiFi and Bluetooth 5 +- Quectel EG25-G 4G/LTE modem + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 31 ++++++ + arch/arm/mach-rockchip/rk3399/Kconfig | 8 ++ + board/pine64/pinephone-pro-rk3399/Kconfig | 15 +++ + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 ++ + board/pine64/pinephone-pro-rk3399/Makefile | 1 + + .../pinephone-pro-rk3399.c | 76 +++++++++++++ + configs/pinephone-pro-rk3399_defconfig | 104 ++++++++++++++++++ + include/configs/pinephone-pro-rk3399.h | 19 ++++ + 8 files changed, 262 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi + create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig + create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS + create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile + create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c + create mode 100644 configs/pinephone-pro-rk3399_defconfig + create mode 100644 include/configs/pinephone-pro-rk3399.h + +diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +new file mode 100644 +index 00000000000..1dad283ad05 +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +@@ -0,0 +1,31 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2022 Peter Robinson ++ */ + -+&vopb { ++#include "rk3399-u-boot.dtsi" ++#include "rk3399-sdram-lpddr4-100.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ }; ++ ++ config { ++ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ ++ }; ++}; ++ ++&rng { + status = "okay"; +}; + -+&vopb_mmu { -+ status = "okay"; ++&sdhci { ++ max-frequency = <25000000>; ++ u-boot,dm-pre-reloc; +}; + -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; ++&sdmmc { ++ max-frequency = <20000000>; ++ u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig -index 17628f9171..3ba603ca80 100644 +index b48feeb3466..d01063ac98b 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig -@@ -28,6 +28,13 @@ config TARGET_PINEBOOK_PRO_RK3399 +@@ -39,6 +39,13 @@ config TARGET_PINEBOOK_PRO_RK3399 with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, 1920*1080 screen and all the usual laptop features. +config TARGET_PINEPHONE_PRO_RK3399 + bool "PinePhone Pro" + help -+ PinePhone Pro is a phone based on the Rockchip rk3399 SoC -+ with 4Gb RAM, onboard eMMC, USB-C, a headphone jack, -+ 720x1440 screen and an external Quectel USB modem. ++ PinePhone Pro is a phone based on a variant of the Rockchip ++ rk3399 SoC with 4Gb RAM, onboard eMMC, USB-C, headphone jack, ++ 720x1440 screen and a Quectel 4G/LTE modem. + config TARGET_PUMA_RK3399 bool "Theobroma Systems RK3399-Q7 (Puma)" help -@@ -154,6 +161,7 @@ endif # BOOTCOUNT_LIMIT +@@ -165,6 +172,7 @@ endif # BOOTCOUNT_LIMIT source "board/firefly/roc-pc-rk3399/Kconfig" source "board/google/gru/Kconfig" source "board/pine64/pinebook-pro-rk3399/Kconfig" @@ -654,7 +659,7 @@ index 17628f9171..3ba603ca80 100644 source "board/theobroma-systems/puma_rk3399/Kconfig" diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig new file mode 100644 -index 0000000000..13d6465ae6 +index 00000000000..13d6465ae6e --- /dev/null +++ b/board/pine64/pinephone-pro-rk3399/Kconfig @@ -0,0 +1,15 @@ @@ -675,12 +680,12 @@ index 0000000000..13d6465ae6 +endif diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS new file mode 100644 -index 0000000000..9ca4fc4cbe +index 00000000000..c923ff1be32 --- /dev/null +++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS @@ -0,0 +1,8 @@ +PINEPHONE_PRO -+M: Martijn Braam ++M: Peter Robinson +S: Maintained +F: board/pine64/rk3399-pinephone-pro/ +F: include/configs/rk3399-pinephone-pro.h @@ -689,21 +694,21 @@ index 0000000000..9ca4fc4cbe +F: configs/pinephone-pro-rk3399_defconfig diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile new file mode 100644 -index 0000000000..8d9203053e +index 00000000000..8d9203053e5 --- /dev/null +++ b/board/pine64/pinephone-pro-rk3399/Makefile @@ -0,0 +1 @@ +obj-y += pinephone-pro-rk3399.o diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c new file mode 100644 -index 0000000000..8efeb6ea3d +index 00000000000..eb639cd0d07 --- /dev/null +++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -@@ -0,0 +1,57 @@ +@@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* -+ * (C) Copyright 2019 Vasily Khoruzhick -+ * (C) Copyright 2021 Martijn Braam ++ * (C) Copyright 2016 Rockchip Electronics Co., Ltd ++ * (C) Copyright 2022 Peter Robinson + */ + +#include @@ -715,17 +720,39 @@ index 0000000000..8efeb6ea3d +#include +#include +#include ++#include + +#define GRF_IO_VSEL_BT565_SHIFT 0 +#define PMUGRF_CON0_VSEL_SHIFT 8 + ++#ifndef CONFIG_SPL_BUILD ++int board_early_init_f(void) ++{ ++ struct udevice *regulator; ++ int ret; ++ ++ ret = regulator_get_by_platname("vcc5v0_usb", ®ulator); ++ if (ret) { ++ pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = regulator_set_enable(regulator, true); ++ if (ret) ++ pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret); ++ ++out: ++ return 0; ++} ++#endif ++ +#ifdef CONFIG_MISC_INIT_R +static void setup_iodomain(void) +{ + struct rk3399_grf_regs *grf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); ++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + struct rk3399_pmugrf_regs *pmugrf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); ++ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); + + /* BT565 is in 1.8v domain */ + rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); @@ -751,42 +778,49 @@ index 0000000000..8efeb6ea3d + if (ret) + return ret; + -+ ret = rockchip_setup_macaddr(); -+ + return ret; +} -+ +#endif diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig new file mode 100644 -index 0000000000..2cf80f7d35 +index 00000000000..eb979f6c051 --- /dev/null +++ b/configs/pinephone-pro-rk3399_defconfig -@@ -0,0 +1,92 @@ +@@ -0,0 +1,104 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_TEXT_BASE=0x00200000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x8000 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" +CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_PINEPHONE_PRO_RK3399=y +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI_SUPPORT=y -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" -+CONFIG_DEBUG_UART=y ++CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0x800800 ++CONFIG_DEBUG_UART=y ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 +CONFIG_BOOTDELAY=3 +CONFIG_USE_PREBOOT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y ++CONFIG_SPL_MAX_SIZE=0x2e000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y ++CONFIG_SPL_BSS_START_ADDR=0x400000 ++CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set ++CONFIG_SPL_STACK=0x400000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -+CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_TPL=y +CONFIG_CMD_BOOTZ=y @@ -804,6 +838,7 @@ index 0000000000..2cf80f7d35 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_DM_KEYBOARD=y @@ -816,13 +851,14 @@ index 0000000000..2cf80f7d35 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_DM_ETH=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_DM_PMIC_FAN53555=y ++CONFIG_DM_REGULATOR_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y @@ -849,23 +885,22 @@ index 0000000000..2cf80f7d35 +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_RTL8152=y -+CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y ++CONFIG_VIDEO=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h new file mode 100644 -index 0000000000..fefa793fdd +index 00000000000..78017d6bcc3 --- /dev/null +++ b/include/configs/pinephone-pro-rk3399.h -@@ -0,0 +1,23 @@ +@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Rockchip Electronics Co., Ltd -+ * Copyright (C) 2020 Peter Robinson -+ * Copyright (C) 2021 Martijn Braam ++ * Copyright (C) 2022 Peter Robinson + */ + +#ifndef __PINEPHONE_PRO_RK3399_H @@ -880,89 +915,6 @@ index 0000000000..fefa793fdd + +#define SDRAM_BANK_SIZE (2UL << 30) + -+#define CONFIG_USB_OHCI_NEW -+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -+ +#endif ---- u-boot-2022.10/configs/pinephone-pro-rk3399_defconfig.orig 2022-10-12 16:14:17.050158119 +0100 -+++ u-boot-2022.10/configs/pinephone-pro-rk3399_defconfig 2022-10-12 16:14:28.525240728 +0100 -@@ -1,27 +1,37 @@ - CONFIG_ARM=y - CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 - CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 - CONFIG_NR_DRAM_BANKS=1 - CONFIG_ENV_SIZE=0x8000 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" - CONFIG_ROCKCHIP_RK3399=y - CONFIG_TARGET_PINEPHONE_PRO_RK3399=y - CONFIG_DEBUG_UART_BASE=0xFF1A0000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SPL_SPI_FLASH_SUPPORT=y --CONFIG_SPL_SPI_SUPPORT=y --CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" --CONFIG_DEBUG_UART=y -+CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 - CONFIG_BOOTDELAY=3 - CONFIG_USE_PREBOOT=y - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_MISC_INIT_R=y -+CONFIG_SPL_MAX_SIZE=0x2e000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x400000 -+CONFIG_SPL_BSS_MAX_SIZE=0x2000 - # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x400000 - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 --CONFIG_SPL_MTD_SUPPORT=y - CONFIG_SPL_SPI_LOAD=y - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y -@@ -39,6 +49,7 @@ - CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" - CONFIG_ENV_IS_IN_SPI_FLASH=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SPL_DM_SEQ_ALIAS=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_DM_KEYBOARD=y -@@ -51,10 +62,10 @@ - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 - CONFIG_SF_DEFAULT_SPEED=20000000 - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_SPI_FLASH_WINBOND=y --CONFIG_DM_ETH=y - CONFIG_PHY_ROCKCHIP_INNO_USB2=y - CONFIG_PHY_ROCKCHIP_TYPEC=y - CONFIG_DM_PMIC_FAN53555=y -@@ -77,6 +88,7 @@ - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y -+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 - CONFIG_USB_DWC3=y - CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_KEYBOARD=y ---- u-boot-2022.10/include/configs/pinephone-pro-rk3399.h.orig 2022-10-12 16:14:51.881408874 +0100 -+++ u-boot-2022.10/include/configs/pinephone-pro-rk3399.h 2022-10-12 16:14:58.693457915 +0100 -@@ -17,7 +17,4 @@ - - #define SDRAM_BANK_SIZE (2UL << 30) - --#define CONFIG_USB_OHCI_NEW --#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -- - #endif +-- +2.39.0 diff --git a/uboot-tools.spec b/uboot-tools.spec index 09d8e3e..095727c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -211,6 +211,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat Dec 31 2022 Peter Robinson - 2023.01-0.4.rc4 +- Update PinePhone Pro to latest rev + * Tue Dec 20 2022 Peter Robinson - 2023.01-0.3.rc4 - Update to 2023.01 RC4 From 5b281a96f025b29e29c6e9cf08b042ccd2c3c7a5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 18 Jan 2023 15:06:40 +0000 Subject: [PATCH 215/351] 2023.01 GA --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index e2935f1..b8bf2c3 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.01-rc4.tar.bz2) = 42c5693e2dafb83af64e6958567a5cdf4452d6799fc12214fb60ebd6753bfe24b41dfdc7f1c373b35dfaada35a819e8a1a4958eff64f806c0610f764b73dbbcd +SHA512 (u-boot-2023.01.tar.bz2) = 417a28267eb7875820d08fafc7316f164663609378637539e71648b0b9b7d28796b6c381717f31b0ab6472805fefd32628ef7d1b2e7b9f3c51c8ad122993f679 diff --git a/uboot-tools.spec b/uboot-tools.spec index 095727c..5cd807e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +#global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -211,6 +211,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Wed Jan 18 2023 Peter Robinson - 2023.01-0.5 +- Update to 2023.01 GA + * Sat Dec 31 2022 Peter Robinson - 2023.01-0.4.rc4 - Update PinePhone Pro to latest rev From 8376d2cf3ada06f8132c72a173c05f5a985eb58e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 18 Jan 2023 16:05:48 +0000 Subject: [PATCH 216/351] fix release --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 5cd807e..d9f8bf3 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -211,7 +211,7 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog -* Wed Jan 18 2023 Peter Robinson - 2023.01-0.5 +* Wed Jan 18 2023 Peter Robinson - 2023.01-1 - Update to 2023.01 GA * Sat Dec 31 2022 Peter Robinson - 2023.01-0.4.rc4 From 8798072f53dfbcb1b7001d6b2809cf52436f1322 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 21 Jan 2023 05:38:21 +0000 Subject: [PATCH 217/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index d9f8bf3..b2f73a8 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -211,6 +211,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat Jan 21 2023 Fedora Release Engineering - 2023.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild + * Wed Jan 18 2023 Peter Robinson - 2023.01-1 - Update to 2023.01 GA From 65896be74ab0b6d7db58b4ca067631fcd2c8d969 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 31 Jan 2023 10:29:14 +0000 Subject: [PATCH 218/351] Update to 2023.04 rc1 --- ...nitial-support-for-the-PinePhone-Pro.patch | 1076 +++-------------- uboot-tools.spec | 12 +- 2 files changed, 204 insertions(+), 884 deletions(-) diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch index 30012ad..d127522 100644 --- a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +++ b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -1,920 +1,236 @@ -From 004af623388022d258cbc29c0b71d8e22cd96c52 Mon Sep 17 00:00:00 2001 +From a23687b77c1e0b5be7f0443e5fba9d9bb7514b6b Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Sat, 31 Dec 2022 09:20:34 +0000 -Subject: [PATCH v2 0/2] Initial support for Pinephone Pro +Date: Sun, 1 Jan 2023 02:11:29 +0000 +Subject: [PATCH] rockchip: pinephone pro: add initial display support -This adds initial support for the PINE64 Pinephone Pro. It's a rebase -to upstream core rk3399 DT pieces, and the addition of the upstream -PPP DT from 6.2-rc1 and the U-Boot pieces are based on my work on -the Pinebook Pro. +Add proposed upstream DT patches for display, disable edp, +enable mipi and backlight, add required clocks. -Changes v2: -- Drop the rk3399.dtsi sync for time being, causing issues around - clock/dram -- Sync the Pinephone DT to 6.2-rc1 -- Update for the CONFIG_SYS_TEXT_BASE -> CONFIG_TEXT_BASE change -- usb: ohci: Use a flexible array member for portstatus -- Rename CONFIG_DM_VIDEO to CONFIG_VIDEO -- Enable DM_REGULATOR_FAN53555 -- Don't initialize i2c before relocation - -Peter Robinson (2): - arm64: dts: rk3399: Add upstream Pinephone Pro dts - rockchip: Add initial support for the PINE64 Pinephone Pro - - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 31 ++ - arch/arm/dts/rk3399-pinephone-pro.dts | 474 ++++++++++++++++++ - arch/arm/mach-rockchip/rk3399/Kconfig | 8 + - board/pine64/pinephone-pro-rk3399/Kconfig | 15 + - board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 + - board/pine64/pinephone-pro-rk3399/Makefile | 1 + - .../pinephone-pro-rk3399.c | 76 +++ - configs/pinephone-pro-rk3399_defconfig | 104 ++++ - include/configs/pinephone-pro-rk3399.h | 19 + - 10 files changed, 737 insertions(+) - create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi - create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts - create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig - create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS - create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile - create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c - create mode 100644 configs/pinephone-pro-rk3399_defconfig - create mode 100644 include/configs/pinephone-pro-rk3399.h - --- -2.39.0 - -From 9976caacb35316cbe047ded58855d2ca1a54243b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 31 Dec 2022 09:18:44 +0000 -Subject: [PATCH v2 1/2] arm64: dts: rk3399: Add upstream Pinephone Pro dts - -Initial support for the PinePhone Pro has now landed upstream in -Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support. +Clocks may not be required based on upstream review. Still +need to add panel pieces, the rk3288-evb has an example for +panel DT for u-boot, or may need to do a mipi addition to +simple-panel, or something else. Signed-off-by: Peter Robinson --- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3399-pinephone-pro.dts | 474 ++++++++++++++++++++++++++ - 2 files changed, 475 insertions(+) - create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts + arch/arm/dts/rk3399-pinephone-pro.dts | 123 +++++++++++++++++++++++++ + configs/pinephone-pro-rk3399_defconfig | 3 +- + include/dt-bindings/clock/rk3399-cru.h | 2 + + 3 files changed, 127 insertions(+), 1 deletion(-) -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 43951a7731e..8c1eec1025f 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -153,6 +153,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ - rk3399-nanopi-r4s.dtb \ - rk3399-orangepi.dtb \ - rk3399-pinebook-pro.dtb \ -+ rk3399-pinephone-pro.dtb \ - rk3399-puma-haikou.dtb \ - rk3399-roc-pc.dtb \ - rk3399-roc-pc-mezzanine.dtb \ diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts -new file mode 100644 -index 00000000000..04403a76238 ---- /dev/null +index 04403a76238..d0609d1b534 100644 +--- a/arch/arm/dts/rk3399-pinephone-pro.dts +++ b/arch/arm/dts/rk3399-pinephone-pro.dts -@@ -0,0 +1,474 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Martijn Braam -+ * Copyright (c) 2021 Kamil Trzciński -+ */ -+ -+/* -+ * PinePhone Pro datasheet: -+ * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf -+ */ -+ -+/dts-v1/; -+#include -+#include "rk3399.dtsi" -+#include "rk3399-opp.dtsi" -+ -+/ { -+ model = "Pine64 PinePhonePro"; -+ compatible = "pine64,pinephone-pro", "rockchip,rk3399"; -+ chassis-type = "handset"; -+ -+ aliases { -+ mmc0 = &sdio0; -+ mmc1 = &sdmmc; -+ mmc2 = &sdhci; +@@ -29,6 +29,12 @@ + stdout-path = "serial2:115200n8"; + }; + ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm0 0 1000000 0>; ++ pwm-delay-us = <10000>; + }; + -+ chosen { -+ stdout-path = "serial2:115200n8"; -+ }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +@@ -102,6 +108,32 @@ + /* WL_REG_ON on module */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn_pin>; -+ -+ key-power { -+ debounce-interval = <20>; -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "Power"; -+ linux,code = ; -+ wakeup-source; -+ }; -+ }; -+ -+ vcc_sys: vcc-sys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc3v3_sys: vcc3v3-sys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+ vcca1v8_s3: vcc1v8-s3-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcca1v8_s3"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc3v3_sys>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc1v8_codec: vcc1v8-codec-regulator { ++ /* MIPI DSI panel 1.8v supply */ ++ vcc1v8_lcd: vcc1v8-lcd-regulator { + compatible = "regulator-fixed"; + enable-active-high; -+ gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc1v8_codec_en>; -+ regulator-name = "vcc1v8_codec"; ++ regulator-name = "vcc1v8_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ wifi_pwrseq: sdio-wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rk818 1>; -+ clock-names = "ext_clock"; ++ gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h_pin>; -+ /* -+ * Wait between power-on and SDIO access for CYP43455 -+ * POR circuit. -+ */ -+ post-power-on-delay-ms = <110>; -+ /* -+ * Wait between consecutive toggles for CYP43455 CBUCK -+ * regulator discharge. -+ */ -+ power-off-delay-us = <10000>; -+ -+ /* WL_REG_ON on module */ -+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&display_pwren1>; + }; -+}; + -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-rising-time-ns = <168>; -+ i2c-scl-falling-time-ns = <4>; -+ status = "okay"; -+ -+ rk818: pmic@1c { -+ compatible = "rockchip,rk818"; -+ reg = <0x1c>; -+ interrupt-parent = <&gpio1>; -+ interrupts = ; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; ++ /* MIPI DSI panel 2.8v supply */ ++ vcc2v8_lcd: vcc2v8-lcd-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ regulator-name = "vcc2v8_lcd"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ vin-supply = <&vcc3v3_sys>; ++ gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc_sys>; -+ vcc9-supply = <&vcc3v3_sys>; -+ -+ regulators { -+ vdd_cpu_l: DCDC_REG1 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <875000>; -+ regulator-max-microvolt = <975000>; -+ regulator-ramp-delay = <6001>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_center: DCDC_REG2 { -+ regulator-name = "vdd_center"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-ramp-delay = <6001>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG1 { -+ regulator-name = "vcca3v0_codec"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ }; -+ -+ vcc3v0_touch: LDO_REG2 { -+ regulator-name = "vcc3v0_touch"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ }; -+ -+ vcca1v8_codec: LDO_REG3 { -+ regulator-name = "vcca1v8_codec"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ rk818_pwr_on: LDO_REG4 { -+ regulator-name = "rk818_pwr_on"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG5 { -+ regulator-name = "vcc_3v0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc1v8_dvp: LDO_REG7 { -+ regulator-name = "vcc1v8_dvp"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ vcc3v3_s3: LDO_REG8 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG9 { -+ regulator-name = "vccio_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; ++ pinctrl-0 = <&display_pwren>; + }; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel1_pin>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <875000>; -+ regulator-max-microvolt = <1150000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel2_pin>; -+ regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <875000>; -+ regulator-max-microvolt = <975000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&cluster0_opp { -+ opp04 { -+ status = "disabled"; -+ }; -+ -+ opp05 { -+ status = "disabled"; -+ }; -+}; -+ -+&cluster1_opp { -+ opp06 { -+ opp-hz = /bits/ 64 <1500000000>; -+ opp-microvolt = <1100000 1100000 1150000>; -+ }; -+ -+ opp07 { -+ status = "disabled"; -+ }; -+}; -+ -+&io_domains { -+ bt656-supply = <&vcc1v8_dvp>; -+ audio-supply = <&vcca1v8_codec>; -+ sdmmc-supply = <&vccio_sd>; -+ gpio1830-supply = <&vcc_3v0>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ pmu1830-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ buttons { -+ pwrbtn_pin: pwrbtn-pin { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ vsel1_pin: vsel1-pin { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_pin: vsel2-pin { -+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h_pin: wifi-enable-h-pin { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ sound { -+ vcc1v8_codec_en: vcc1v8-codec-en { -+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ wireless-bluetooth { -+ bt_wake_pin: bt-wake-pin { -+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_host_wake_pin: bt-host-wake-pin { -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_reset_pin: bt-reset-pin { -+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&sdio0 { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ disable-wp; -+ keep-power-in-suspend; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ max-frequency = <150000000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ vmmc-supply = <&vcc3v3_sys>; -+ vqmmc-supply = <&vccio_sd>; -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ mmc-hs200-1_8v; -+ non-removable; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; -+ rockchip,hw-tshut-polarity = <1>; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rk818 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; -+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; -+ max-speed = <1500000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; -+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; -+ vbat-supply = <&vcc3v3_sys>; -+ vddio-supply = <&vcc_1v8>; -+ }; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; --- -2.39.0 - -From 004af623388022d258cbc29c0b71d8e22cd96c52 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 28 Dec 2022 03:52:27 +0000 -Subject: [PATCH v2 2/2] rockchip: Add initial support for the PINE64 Pinephone - Pro - -The Pinephone Pro is another device by PINE64. It's closely related -to the Pinebook Pro of which this initial support is derived from. - -Specification: -- A variant of the Rockchip RK3399 -- A 6 inch 720*1440 DSI display -- Front and rear cameras -- Type-C interface with alt mode display (DP 1.2) and PD charging -- 4GB LPDDR4 RAM -- 128GB eMMC -- mSD card slot -- An AP6255 module for 802.11ac WiFi and Bluetooth 5 -- Quectel EG25-G 4G/LTE modem - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 31 ++++++ - arch/arm/mach-rockchip/rk3399/Kconfig | 8 ++ - board/pine64/pinephone-pro-rk3399/Kconfig | 15 +++ - board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 ++ - board/pine64/pinephone-pro-rk3399/Makefile | 1 + - .../pinephone-pro-rk3399.c | 76 +++++++++++++ - configs/pinephone-pro-rk3399_defconfig | 104 ++++++++++++++++++ - include/configs/pinephone-pro-rk3399.h | 19 ++++ - 8 files changed, 262 insertions(+) - create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi - create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig - create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS - create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile - create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c - create mode 100644 configs/pinephone-pro-rk3399_defconfig - create mode 100644 include/configs/pinephone-pro-rk3399.h - -diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -new file mode 100644 -index 00000000000..1dad283ad05 ---- /dev/null -+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -@@ -0,0 +1,31 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2022 Peter Robinson -+ */ -+ -+#include "rk3399-u-boot.dtsi" -+#include "rk3399-sdram-lpddr4-100.dtsi" -+ -+/ { -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; -+ }; -+ -+ config { -+ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ -+ }; -+}; -+ -+&rng { -+ status = "okay"; -+}; -+ -+&sdhci { -+ max-frequency = <25000000>; -+ u-boot,dm-pre-reloc; -+}; -+ -+&sdmmc { -+ max-frequency = <20000000>; -+ u-boot,dm-pre-reloc; -+}; -diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig -index b48feeb3466..d01063ac98b 100644 ---- a/arch/arm/mach-rockchip/rk3399/Kconfig -+++ b/arch/arm/mach-rockchip/rk3399/Kconfig -@@ -39,6 +39,13 @@ config TARGET_PINEBOOK_PRO_RK3399 - with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, - 1920*1080 screen and all the usual laptop features. + }; -+config TARGET_PINEPHONE_PRO_RK3399 -+ bool "PinePhone Pro" -+ help -+ PinePhone Pro is a phone based on a variant of the Rockchip -+ rk3399 SoC with 4Gb RAM, onboard eMMC, USB-C, headphone jack, -+ 720x1440 screen and a Quectel 4G/LTE modem. + &cpu_l0 { +@@ -132,6 +164,11 @@ + status = "okay"; + }; + ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; + - config TARGET_PUMA_RK3399 - bool "Theobroma Systems RK3399-Q7 (Puma)" - help -@@ -165,6 +172,7 @@ endif # BOOTCOUNT_LIMIT - source "board/firefly/roc-pc-rk3399/Kconfig" - source "board/google/gru/Kconfig" - source "board/pine64/pinebook-pro-rk3399/Kconfig" -+source "board/pine64/pinephone-pro-rk3399/Kconfig" - source "board/pine64/rockpro64_rk3399/Kconfig" - source "board/rockchip/evb_rk3399/Kconfig" - source "board/theobroma-systems/puma_rk3399/Kconfig" -diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig -new file mode 100644 -index 00000000000..13d6465ae6e ---- /dev/null -+++ b/board/pine64/pinephone-pro-rk3399/Kconfig -@@ -0,0 +1,15 @@ -+if TARGET_PINEPHONE_PRO_RK3399 + &i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; +@@ -214,6 +251,9 @@ + regulator-name = "vcc3v0_touch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + + vcca1v8_codec: LDO_REG3 { +@@ -347,6 +387,25 @@ + }; + }; + ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; + -+config SYS_BOARD -+ default "pinephone-pro-rk3399" ++ touchscreen@14 { ++ compatible = "goodix,gt917s"; ++ reg = <0x14>; ++ interrupt-parent = <&gpio3>; ++ interrupts = ; ++ irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; ++ AVDD28-supply = <&vcc3v0_touch>; ++ VDDIO-supply = <&vcc3v0_touch>; ++ touchscreen-size-x = <720>; ++ touchscreen-size-y = <1440>; ++ }; ++}; + -+config SYS_VENDOR -+ default "pine64" + &io_domains { + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; +@@ -355,6 +414,40 @@ + status = "okay"; + }; + ++&mipi_dsi { ++ status = "okay"; ++ clock-master; + -+config SYS_CONFIG_NAME -+ default "pinephone-pro-rk3399" ++ ports { ++ mipi_out: port@1 { ++ #address-cells = <0>; ++ #size-cells = <0>; ++ reg = <1>; + -+config BOARD_SPECIFIC_OPTIONS -+ def_bool y ++ mipi_out_panel: endpoint { ++ remote-endpoint = <&mipi_in_panel>; ++ }; ++ }; ++ }; + -+endif -diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS -new file mode 100644 -index 00000000000..c923ff1be32 ---- /dev/null -+++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS -@@ -0,0 +1,8 @@ -+PINEPHONE_PRO -+M: Peter Robinson -+S: Maintained -+F: board/pine64/rk3399-pinephone-pro/ -+F: include/configs/rk3399-pinephone-pro.h -+F: arch/arm/dts/rk3399-pinephone-pro.dts -+F: arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -+F: configs/pinephone-pro-rk3399_defconfig -diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile -new file mode 100644 -index 00000000000..8d9203053e5 ---- /dev/null -+++ b/board/pine64/pinephone-pro-rk3399/Makefile -@@ -0,0 +1 @@ -+obj-y += pinephone-pro-rk3399.o -diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -new file mode 100644 -index 00000000000..eb639cd0d07 ---- /dev/null -+++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -@@ -0,0 +1,76 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd -+ * (C) Copyright 2022 Peter Robinson -+ */ ++ panel@0 { ++ compatible = "hannstar,hsd060bhw4"; ++ reg = <0>; ++ backlight = <&backlight>; ++ reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vcc2v8_lcd>; ++ iovcc-supply = <&vcc1v8_lcd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&display_rst_l>; + -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include ++ port { ++ mipi_in_panel: endpoint { ++ remote-endpoint = <&mipi_out_panel>; ++ }; ++ }; ++ }; ++}; + -+#define GRF_IO_VSEL_BT565_SHIFT 0 -+#define PMUGRF_CON0_VSEL_SHIFT 8 + &pmu_io_domains { + pmu1830-supply = <&vcc_1v8>; + status = "okay"; +@@ -387,6 +480,20 @@ + }; + }; + ++ dsi { ++ display_rst_l: display-rst-l { ++ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; + -+#ifndef CONFIG_SPL_BUILD -+int board_early_init_f(void) -+{ -+ struct udevice *regulator; -+ int ret; ++ display_pwren: display-pwren { ++ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; + -+ ret = regulator_get_by_platname("vcc5v0_usb", ®ulator); -+ if (ret) { -+ pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret); -+ goto out; -+ } ++ display_pwren1: display-pwren1 { ++ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; + -+ ret = regulator_set_enable(regulator, true); -+ if (ret) -+ pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret); + sound { + vcc1v8_codec_en: vcc1v8-codec-en { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; +@@ -422,6 +529,10 @@ + status = "okay"; + }; + ++&pwm0 { ++ status = "okay"; ++}; + -+out: -+ return 0; -+} -+#endif + &sdmmc { + bus-width = <4>; + cap-sd-highspeed; +@@ -472,3 +583,15 @@ + &uart2 { + status = "okay"; + }; + -+#ifdef CONFIG_MISC_INIT_R -+static void setup_iodomain(void) -+{ -+ struct rk3399_grf_regs *grf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); -+ struct rk3399_pmugrf_regs *pmugrf = -+ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); ++&vopb { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, ++ <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; ++ assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; ++ assigned-clock-parents = <&cru PLL_CPLL>, <&cru DCLK_VOP0_FRAC>; ++}; + -+ /* BT565 is in 1.8v domain */ -+ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); -+ -+ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ -+ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); -+} -+ -+int misc_init_r(void) -+{ -+ const u32 cpuid_offset = 0x7; -+ const u32 cpuid_length = 0x10; -+ u8 cpuid[cpuid_length]; -+ int ret; -+ -+ setup_iodomain(); -+ -+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); -+ if (ret) -+ return ret; -+ -+ ret = rockchip_cpuid_set(cpuid, cpuid_length); -+ if (ret) -+ return ret; -+ -+ return ret; -+} -+#endif ++&vopb_mmu { ++ status = "okay"; ++}; diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig -new file mode 100644 -index 00000000000..eb979f6c051 ---- /dev/null +index eb979f6c051..25941abc93a 100644 +--- a/configs/pinephone-pro-rk3399_defconfig +++ b/configs/pinephone-pro-rk3399_defconfig -@@ -0,0 +1,104 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_TEXT_BASE=0x00200000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x8000 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" -+CONFIG_ROCKCHIP_RK3399=y -+CONFIG_TARGET_PINEPHONE_PRO_RK3399=y -+CONFIG_DEBUG_UART_BASE=0xFF1A0000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI=y -+CONFIG_SYS_LOAD_ADDR=0x800800 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -+CONFIG_BOOTDELAY=3 -+CONFIG_USE_PREBOOT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_MISC_INIT_R=y -+CONFIG_SPL_MAX_SIZE=0x2e000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x400000 -+CONFIG_SPL_BSS_MAX_SIZE=0x2000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x400000 -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -+CONFIG_SPL_SPI_LOAD=y -+CONFIG_TPL=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_CMD_PMIC=y -+CONFIG_CMD_REGULATOR=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SPL_DM_SEQ_ALIAS=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_MISC=y -+CONFIG_ROCKCHIP_EFUSE=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=1 -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_SPI_FLASH_GIGADEVICE=y -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_TYPEC=y -+CONFIG_DM_PMIC_FAN53555=y -+CONFIG_DM_REGULATOR_FAN53555=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM_RK3399_LPDDR4=y -+CONFIG_DM_RESET=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_ROCKCHIP_SPI=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_DISPLAY=y -+CONFIG_VIDEO=y -+CONFIG_VIDEO_ROCKCHIP=y -+CONFIG_DISPLAY_ROCKCHIP_EDP=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y -diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h -new file mode 100644 -index 00000000000..78017d6bcc3 ---- /dev/null -+++ b/include/configs/pinephone-pro-rk3399.h -@@ -0,0 +1,19 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd -+ * Copyright (C) 2022 Peter Robinson -+ */ -+ -+#ifndef __PINEPHONE_PRO_RK3399_H -+#define __PINEPHONE_PRO_RK3399_H -+ -+#define ROCKCHIP_DEVICE_SETTINGS \ -+ "stdin=serial,usbkbd\0" \ -+ "stdout=serial,vidconsole\0" \ -+ "stderr=serial,vidconsole\0" -+ -+#include -+ -+#define SDRAM_BANK_SIZE (2UL << 30) -+ -+#endif +@@ -99,6 +99,7 @@ CONFIG_USB_ETHER_RTL8152=y + CONFIG_DISPLAY=y + CONFIG_VIDEO=y + CONFIG_VIDEO_ROCKCHIP=y +-CONFIG_DISPLAY_ROCKCHIP_EDP=y ++CONFIG_DISPLAY_ROCKCHIP_MIPI=y ++CONFIG_BACKLIGHT_PWM=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h +index 211faf8fa89..7866e5266d2 100644 +--- a/include/dt-bindings/clock/rk3399-cru.h ++++ b/include/dt-bindings/clock/rk3399-cru.h +@@ -131,6 +131,8 @@ + #define DCLK_VOP0_DIV 182 + #define DCLK_VOP1_DIV 183 + #define DCLK_M0_PERILP 184 ++#define DCLK_VOP0_FRAC 185 ++#define DCLK_VOP1_FRAC 186 + + #define FCLK_CM0S 190 + -- -2.39.0 +2.39.1 + diff --git a/uboot-tools.spec b/uboot-tools.spec index b2f73a8..60a8786 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc4 +%global candidate rc1 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2023.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2023.04 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -179,7 +179,7 @@ done %endif %endif -for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes +for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done @@ -211,6 +211,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Jan 31 2023 Peter Robinson - 2023.04-0.1.rc1 +- Update to 2023.04 RC1 +- Drop bmp_logo tool + * Sat Jan 21 2023 Fedora Release Engineering - 2023.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild From de2eac07ba03fbc040213d507fe4f756acc8e847 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 31 Jan 2023 13:11:34 +0000 Subject: [PATCH 219/351] upadte source hash --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index b8bf2c3..d1e0a25 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.01.tar.bz2) = 417a28267eb7875820d08fafc7316f164663609378637539e71648b0b9b7d28796b6c381717f31b0ab6472805fefd32628ef7d1b2e7b9f3c51c8ad122993f679 +SHA512 (u-boot-2023.04-rc1.tar.bz2) = e08080aa4988321aaf8d402940ff2737f001102dcc4e575b8155d77fff140d1e5a2bd8a618dc885f4f1a82e0bf882cb0880a25514ab51a3bd8735437bc1190c6 From 7a9f14f8e748f48b8de702b6e8692ccc7ee7dd69 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 17 Feb 2023 16:03:02 +0000 Subject: [PATCH 220/351] 2023.04 RC2 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index d1e0a25..766a5a0 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.04-rc1.tar.bz2) = e08080aa4988321aaf8d402940ff2737f001102dcc4e575b8155d77fff140d1e5a2bd8a618dc885f4f1a82e0bf882cb0880a25514ab51a3bd8735437bc1190c6 +SHA512 (u-boot-2023.04-rc2.tar.bz2) = 7de3513fc07ce67c11144cadccfa7e21d2de7dbb22d051822a5890396caf2109f5ee12ebdc8bb1c3f77bec26fee032bae2c2e243e8f3a0cc390057f700d76cf0 diff --git a/uboot-tools.spec b/uboot-tools.spec index 60a8786..c4218f8 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc1 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.04 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -211,6 +211,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Fri Feb 17 2023 Peter Robinson - 2023.04-0.2.rc2 +- Update to 2023.04 RC2 + * Tue Jan 31 2023 Peter Robinson - 2023.04-0.1.rc1 - Update to 2023.04 RC1 - Drop bmp_logo tool From 4adcd6c9bf4a42424ad583d6eb45d53d6f745c9c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Feb 2023 10:19:35 +0000 Subject: [PATCH 221/351] drop ubsha1 --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index c4218f8..059fc2a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -179,7 +179,7 @@ done %endif %endif -for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes +for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder xway-swap-bytes do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done From 8a0d41132e6508368dbe6b70ce27cc40a2948daa Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Feb 2023 11:01:34 +0000 Subject: [PATCH 222/351] drop xway-swap-bytes --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 059fc2a..5c88e27 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -179,7 +179,7 @@ done %endif %endif -for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder xway-swap-bytes +for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done From 8e7afdbb87a4ed790b938dc52dc5f09e397784e6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 14 Mar 2023 17:19:11 +0000 Subject: [PATCH 223/351] 2023.04 RC4 --- ...nitial-support-for-the-PinePhone-Pro.patch | 12 +- ...erties-from-firmware-DT-to-loaded-DT.patch | 215 ++---------------- ...-the-DT-provided-by-the-Raspberry-Pi.patch | 79 +++++-- rpi-Update-the-RPi-Zero-2W-DT-filename.patch | 29 +++ sources | 2 +- uboot-tools.spec | 10 +- 6 files changed, 128 insertions(+), 219 deletions(-) create mode 100644 rpi-Update-the-RPi-Zero-2W-DT-filename.patch diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch index d127522..337ea8c 100644 --- a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +++ b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch @@ -1,6 +1,6 @@ -From a23687b77c1e0b5be7f0443e5fba9d9bb7514b6b Mon Sep 17 00:00:00 2001 +From 72400858605c085cf94a6cf5599269c8c39e3e72 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Sun, 1 Jan 2023 02:11:29 +0000 +Date: Tue, 14 Mar 2023 12:30:36 +0000 Subject: [PATCH] rockchip: pinephone pro: add initial display support Add proposed upstream DT patches for display, disable edp, @@ -206,12 +206,12 @@ index 04403a76238..d0609d1b534 100644 + status = "okay"; +}; diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig -index eb979f6c051..25941abc93a 100644 +index 54f9b90536c..1982131c805 100644 --- a/configs/pinephone-pro-rk3399_defconfig +++ b/configs/pinephone-pro-rk3399_defconfig -@@ -99,6 +99,7 @@ CONFIG_USB_ETHER_RTL8152=y - CONFIG_DISPLAY=y +@@ -96,6 +96,7 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_VIDEO=y + CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y -CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_MIPI=y @@ -232,5 +232,5 @@ index 211faf8fa89..7866e5266d2 100644 #define FCLK_CM0S 190 -- -2.39.1 +2.39.2 diff --git a/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch b/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch index 7ef65bc..2a78fe5 100644 --- a/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch +++ b/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch @@ -1,98 +1,7 @@ -From patchwork Wed Aug 10 12:39:26 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Antoine Mazeas -X-Patchwork-Id: 1665242 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: bilbo.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=karthanis.net header.i=@karthanis.net - header.a=rsa-sha256 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u-boot@lists.denx.de -Cc: Antoine Mazeas , - Sjoerd Simons -Subject: [PATCH 1/2] rpi: Copy properties from firmware dtb to the loaded dtb -Date: Wed, 10 Aug 2022 14:39:26 +0200 -Message-Id: <20220810123927.2567677-2-antoine@karthanis.net> -X-Mailer: git-send-email 2.37.1 -In-Reply-To: <20220810123927.2567677-1-antoine@karthanis.net> -References: <20220810123927.2567677-1-antoine@karthanis.net> -MIME-Version: 1.0 -X-Mailman-Approved-At: Wed, 10 Aug 2022 14:58:03 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean +Date: Fri, 19 Aug 2022 10:56:45 +0200 +Subject: [PATCH 1/3] rpi: Copy properties from firmware dtb to the loaded dtb The RPI firmware adjusts several property values in the dtb it passes to u-boot depending on the board/SoC revision. Inherit some of these @@ -110,15 +19,18 @@ when u-boot loads a dtb itself. Specificaly copy: of that. Signed-off-by: Sjoerd Simons +Signed-off-by: Antoine Mazeas +Reviewed-by: Simon Glass +Signed-off-by: Peter Robinson --- board/raspberrypi/rpi/rpi.c | 48 +++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 17b8108cc8..28b6f52506 100644 +index 8603c93de77..d4b059c6204 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c -@@ -504,10 +504,58 @@ void *board_fdt_blob_setup(int *err) +@@ -503,10 +503,58 @@ void *board_fdt_blob_setup(int *err) return (void *)fw_dtb_pointer; } @@ -177,114 +89,30 @@ index 17b8108cc8..28b6f52506 100644 node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer"); if (node < 0) fdt_simplefb_add_node(blob); +-- +2.39.2 -From patchwork Wed Aug 10 12:39:27 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Antoine Mazeas -X-Patchwork-Id: 1665243 -X-Patchwork-Delegate: matthias.bgg@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: bilbo.ozlabs.org; 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- spf=pass smtp.mailfrom=antoine@karthanis.net -Received: from smtp-3-0001.mail.infomaniak.ch (unknown [10.4.36.108]) - by smtp-2-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4M2qKn4VzjzMqnFS; - Wed, 10 Aug 2022 14:40:45 +0200 (CEST) -Received: from localhost.localdomain (unknown [88.168.170.86]) - by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4M2qKn1TBqzlnSCc; - Wed, 10 Aug 2022 14:40:45 +0200 (CEST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=karthanis.net; - s=20191114; t=1660135245; - bh=f61vvBG7E2UozLHxeE7zghMr3kXQzBW+5PpzEyEGYJU=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=3Vltv92i/KGKD06qHi+zyrqGwfJWUvdwHMojKKH7OqswhScJTxhUbGq6MnPrCqWsn - QgB117zr++vQSy1jxV2vZIFLxMC3j8AZb4l3ktmU7FiPp7AUB6AqAzv+tUrYeS3nz4 - LQ0mJS4s1jk1k0WWAK3/WGdOyUAo8ZWw5oiBHUvk= +From 4a45086c0ca874858d4064ee26d45199bcab494d Mon Sep 17 00:00:00 2001 From: Antoine Mazeas -To: u-boot@lists.denx.de -Cc: Antoine Mazeas -Subject: [PATCH 2/2] rpi: Copy eth PHY address from fw DT to loaded DT -Date: Wed, 10 Aug 2022 14:39:27 +0200 -Message-Id: <20220810123927.2567677-3-antoine@karthanis.net> -X-Mailer: git-send-email 2.37.1 -In-Reply-To: <20220810123927.2567677-1-antoine@karthanis.net> -References: <20220810123927.2567677-1-antoine@karthanis.net> -MIME-Version: 1.0 -X-Mailman-Approved-At: Wed, 10 Aug 2022 14:58:03 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean +Date: Fri, 19 Aug 2022 10:56:46 +0200 +Subject: [PATCH 2/3] rpi: Copy eth PHY address from fw DT to loaded DT -Some Raspberry Pi 400 boards, specifically rev 1.1, have a different address for the ethernet PHY device than what is provided by the kernel DTB. The correct address is provided by the firmware, so we should carry it over into the loaded device tree so that ethernet works on such boards. +Some Raspberry Pi 400 boards, specifically rev 1.1, have a different +address for the ethernet PHY device than what is provided by the kernel +DTB. The correct address is provided by the firmware, so we should carry +it over into the loaded device tree so that ethernet works on such boards. Signed-off-by: Antoine Mazeas +Signed-off-by: Peter Robinson --- board/raspberrypi/rpi/rpi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 28b6f52506..793fd1aa30 100644 +index d4b059c6204..fc1fffedfb7 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c -@@ -548,6 +548,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) +@@ -547,6 +547,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) /* kernel address randomisation seed as provided by the firmware */ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); @@ -294,3 +122,6 @@ index 28b6f52506..793fd1aa30 100644 } int ft_board_setup(void *blob, struct bd_info *bd) +-- +2.39.2 + diff --git a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch index c156e4d..fd032fe 100644 --- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +++ b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch @@ -1,7 +1,13 @@ -From f10f94831450671a77f61fe413b4a57459963860 Mon Sep 17 00:00:00 2001 +From 52b75976133683dc9fe66e8ad35127125f938bed Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Mon, 10 Aug 2020 22:20:29 +0100 -Subject: [PATCH] rpi: Use firmware provided device tree +Date: Tue, 28 Feb 2023 12:04:34 +0000 +Subject: [PATCH 2/2] rpi: Use OF_BOARD rather than OF_EMBED + +The use of OF_EMBED isn't recommended for standard use and the OF_BOARD +is actually a better fit for the Raspberry Pi as the prior firmware +provides a DT that can be used by U-Boot and the subsequent OS too, but +it still allows the loading of a DT from disk as well if users wish +to use the upstream kernel DT. Signed-off-by: Peter Robinson --- @@ -10,14 +16,17 @@ Signed-off-by: Peter Robinson configs/rpi_3_32b_defconfig | 2 +- configs/rpi_3_b_plus_defconfig | 2 +- configs/rpi_3_defconfig | 2 +- + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + configs/rpi_defconfig | 2 +- - 6 files changed, 6 insertions(+), 6 deletions(-) + 9 files changed, 9 insertions(+), 6 deletions(-) diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index bba5e12b12..0241f4c6d3 100644 +index 5249b29d76c..8c217848ca2 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig -@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y +@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -27,10 +36,10 @@ index bba5e12b12..0241f4c6d3 100644 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index 1c2bbb29ce..9573e475f4 100644 +index 154284765f4..bfc5679fb7e 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig -@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y +@@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -40,10 +49,10 @@ index 1c2bbb29ce..9573e475f4 100644 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index b8a3d17f43..252df994e6 100644 +index ef1f25d2ad7..54cdcee980a 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig -@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y +@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -53,10 +62,10 @@ index b8a3d17f43..252df994e6 100644 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig -index 4c361438fa..3b2996a2f9 100644 +index 154615d78a1..3008c7a1c18 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig -@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y +@@ -22,7 +22,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -66,10 +75,10 @@ index 4c361438fa..3b2996a2f9 100644 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index 9b281a4f15..1e9ee6122e 100644 +index f0cf7f8e236..f7b9108ba00 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig -@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y +@@ -22,7 +22,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -78,11 +87,47 @@ index 9b281a4f15..1e9ee6122e 100644 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 713b2ee231c..fa20ab767fe 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -24,6 +24,7 @@ CONFIG_CMD_MMC=y + CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y ++CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index 24f70b14fe8..741d4dbbbf4 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -24,6 +24,7 @@ CONFIG_CMD_MMC=y + CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y ++CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 1d1ff12a58c..5e1195dd786 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -23,6 +23,7 @@ CONFIG_CMD_MMC=y + CONFIG_CMD_PCI=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y ++CONFIG_OF_BOARD=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y + CONFIG_TFTP_TSIZE=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index b5ad53c37b..223fc03275 100644 +index 28b92b14456..1504093eddf 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig -@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y +@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y @@ -92,5 +137,5 @@ index b5ad53c37b..223fc03275 100644 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -- -2.26.2 +2.39.2 diff --git a/rpi-Update-the-RPi-Zero-2W-DT-filename.patch b/rpi-Update-the-RPi-Zero-2W-DT-filename.patch new file mode 100644 index 0000000..b53c050 --- /dev/null +++ b/rpi-Update-the-RPi-Zero-2W-DT-filename.patch @@ -0,0 +1,29 @@ +From 0e8c94054fd80535e868900deb978a9a1ebcab67 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 28 Feb 2023 10:17:26 +0000 +Subject: [PATCH 3/3] rpi: Update the RPi Zero 2W DT filename + +Update the Raspberry Pi Zero 2W device tree file +name to match what landed upstream. + +Signed-off-by: Peter Robinson +--- + board/raspberrypi/rpi/rpi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index fc1fffedfb7..1057ebb9948 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -158,7 +158,7 @@ static const struct rpi_model rpi_models_new_scheme[] = { + }, + [0x12] = { + "Zero 2 W", +- DTB_DIR "bcm2837-rpi-zero-2.dtb", ++ DTB_DIR "bcm2837-rpi-zero-2-w.dtb", + false, + }, + [0x13] = { +-- +2.39.2 + diff --git a/sources b/sources index 766a5a0..05b4824 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.04-rc2.tar.bz2) = 7de3513fc07ce67c11144cadccfa7e21d2de7dbb22d051822a5890396caf2109f5ee12ebdc8bb1c3f77bec26fee032bae2c2e243e8f3a0cc390057f700d76cf0 +SHA512 (u-boot-2023.04-rc4.tar.bz2) = b40349d03abcbc0eb9061046071ff29578bf83007e70a0a57518763c1ef4b8a60c9c691c9921ac4d76135910a8053a4271a6d92346649d11d01b6997c4b09254 diff --git a/uboot-tools.spec b/uboot-tools.spec index 5c88e27..4ca6fa6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,8 +27,9 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch +Patch7: rpi-Update-the-RPi-Zero-2W-DT-filename.patch # Rockchips improvements -Patch7: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch8: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch BuildRequires: bc BuildRequires: bison @@ -211,6 +212,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Mar 14 2023 Peter Robinson - 2023.04-0.3.rc4 +- Update to 2023.04 RC4 + * Fri Feb 17 2023 Peter Robinson - 2023.04-0.2.rc2 - Update to 2023.04 RC2 From 33708bf7f4c75a4c7aa353c0f06fab1d7852164b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 2 Apr 2023 22:33:04 +0100 Subject: [PATCH 224/351] 2023.04 RC5 --- ...rrect-constant-name-in-RAM-init-code.patch | 136 +++++++++++ ...erties-from-firmware-DT-to-loaded-DT.patch | 127 ---------- rpi-Update-the-RPi-Zero-2W-DT-filename.patch | 29 --- ...cm2835_sdhost-firmware-managed-clock.patch | 228 ------------------ rpi-fallback-to-max-clock-for-mmc.patch | 77 ------ sources | 2 +- uboot-tools.spec | 18 +- 7 files changed, 148 insertions(+), 469 deletions(-) create mode 100644 rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch delete mode 100644 rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch delete mode 100644 rpi-Update-the-RPi-Zero-2W-DT-filename.patch delete mode 100644 rpi-bcm2835_sdhost-firmware-managed-clock.patch delete mode 100644 rpi-fallback-to-max-clock-for-mmc.patch diff --git a/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch b/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch new file mode 100644 index 0000000..381105d --- /dev/null +++ b/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch @@ -0,0 +1,136 @@ +From patchwork Thu Mar 30 21:51:14 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: David Sebek +X-Patchwork-Id: 1763526 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: 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14:52:36 -0700 (PDT) +From: David Sebek +To: u-boot@lists.denx.de +Cc: jagan@amarulasolutions.com, kever.yang@rock-chips.com, + David Sebek +Subject: [PATCH 1/1] rockchip: Fix incorrect constant name in RAM init code +Date: Thu, 30 Mar 2023 17:51:14 -0400 +Message-Id: <20230330215114.248481-1-dasebek@gmail.com> +X-Mailer: git-send-email 2.40.0 +MIME-Version: 1.0 +X-Mailman-Approved-At: Thu, 30 Mar 2023 23:53:17 +0200 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +A condition in the rk3399 RAM initialization code used the old +CONFIG_RAM_RK3399_LPDDR4 constant name. This commit changes the +condition to use the correct CONFIG_RAM_ROCKCHIP_LPDDR4 constant. +Reviewed-by: Simon Glass +--- + drivers/ram/rockchip/sdram_rk3399.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c +index b1fea04e84..963a05c244 100644 +--- a/drivers/ram/rockchip/sdram_rk3399.c ++++ b/drivers/ram/rockchip/sdram_rk3399.c +@@ -2954,7 +2954,7 @@ static int sdram_init(struct dram_info *dram, + params->ch[ch].cap_info.rank = rank; + } + +-#if defined(CONFIG_RAM_RK3399_LPDDR4) ++#if defined(CONFIG_RAM_ROCKCHIP_LPDDR4) + /* LPDDR4 needs to be trained at 400MHz */ + lpddr4_set_rate(dram, params, 0); + params->base.ddr_freq = dfs_cfgs_lpddr4[0].base.ddr_freq / MHz; diff --git a/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch b/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch deleted file mode 100644 index 2a78fe5..0000000 --- a/rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch +++ /dev/null @@ -1,127 +0,0 @@ -From 6d0642494993f39440a4d6e95f88c0456ee6d689 Mon Sep 17 00:00:00 2001 -From: Antoine Mazeas -Date: Fri, 19 Aug 2022 10:56:45 +0200 -Subject: [PATCH 1/3] rpi: Copy properties from firmware dtb to the loaded dtb - -The RPI firmware adjusts several property values in the dtb it passes -to u-boot depending on the board/SoC revision. Inherit some of these -when u-boot loads a dtb itself. Specificaly copy: - -* /model: The firmware provides a more specific string -* /memreserve: The firmware defines a reserved range, better keep it -* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as - present on rpi 400 and some rpi 4B boards) has different values for - these then the B0T revision. So these need to be adjusted to boot on - these boards -* blconfig: The firmware defines the memory area where the blconfig - stored. Copy those over so it can be enabled. -* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage - of that. - -Signed-off-by: Sjoerd Simons -Signed-off-by: Antoine Mazeas -Reviewed-by: Simon Glass -Signed-off-by: Peter Robinson ---- - board/raspberrypi/rpi/rpi.c | 48 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 48 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 8603c93de77..d4b059c6204 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -503,10 +503,58 @@ void *board_fdt_blob_setup(int *err) - return (void *)fw_dtb_pointer; - } - -+int copy_property(void *dst, void *src, char *path, char *property) -+{ -+ int dst_offset, src_offset; -+ const fdt32_t *prop; -+ int len; -+ -+ src_offset = fdt_path_offset(src, path); -+ dst_offset = fdt_path_offset(dst, path); -+ -+ if (src_offset < 0 || dst_offset < 0) -+ return -1; -+ -+ prop = fdt_getprop(src, src_offset, property, &len); -+ if (!prop) -+ return -1; -+ -+ return fdt_setprop(dst, dst_offset, property, prop, len); -+} -+ -+/* Copy tweaks from the firmware dtb to the loaded dtb */ -+void update_fdt_from_fw(void *fdt, void *fw_fdt) -+{ -+ /* Using dtb from firmware directly; leave it alone */ -+ if (fdt == fw_fdt) -+ return; -+ -+ /* The firmware provides a more precie model; so copy that */ -+ copy_property(fdt, fw_fdt, "/", "model"); -+ -+ /* memory reserve as suggested by the firmware */ -+ copy_property(fdt, fw_fdt, "/", "memreserve"); -+ -+ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on -+ * the SoC revision -+ */ -+ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges"); -+ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges"); -+ -+ /* Bootloader configuration template exposes as nvmem */ -+ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0) -+ copy_property(fdt, fw_fdt, "blconfig", "status"); -+ -+ /* kernel address randomisation seed as provided by the firmware */ -+ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); -+} -+ - int ft_board_setup(void *blob, struct bd_info *bd) - { - int node; - -+ update_fdt_from_fw(blob, (void *)fw_dtb_pointer); -+ - node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer"); - if (node < 0) - fdt_simplefb_add_node(blob); --- -2.39.2 - -From 4a45086c0ca874858d4064ee26d45199bcab494d Mon Sep 17 00:00:00 2001 -From: Antoine Mazeas -Date: Fri, 19 Aug 2022 10:56:46 +0200 -Subject: [PATCH 2/3] rpi: Copy eth PHY address from fw DT to loaded DT - -Some Raspberry Pi 400 boards, specifically rev 1.1, have a different -address for the ethernet PHY device than what is provided by the kernel -DTB. The correct address is provided by the firmware, so we should carry -it over into the loaded device tree so that ethernet works on such boards. - -Signed-off-by: Antoine Mazeas -Signed-off-by: Peter Robinson ---- - board/raspberrypi/rpi/rpi.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index d4b059c6204..fc1fffedfb7 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -547,6 +547,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) - - /* kernel address randomisation seed as provided by the firmware */ - copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed"); -+ -+ /* address of the PHY device as provided by the firmware */ -+ copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg"); - } - - int ft_board_setup(void *blob, struct bd_info *bd) --- -2.39.2 - diff --git a/rpi-Update-the-RPi-Zero-2W-DT-filename.patch b/rpi-Update-the-RPi-Zero-2W-DT-filename.patch deleted file mode 100644 index b53c050..0000000 --- a/rpi-Update-the-RPi-Zero-2W-DT-filename.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 0e8c94054fd80535e868900deb978a9a1ebcab67 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 28 Feb 2023 10:17:26 +0000 -Subject: [PATCH 3/3] rpi: Update the RPi Zero 2W DT filename - -Update the Raspberry Pi Zero 2W device tree file -name to match what landed upstream. - -Signed-off-by: Peter Robinson ---- - board/raspberrypi/rpi/rpi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index fc1fffedfb7..1057ebb9948 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -158,7 +158,7 @@ static const struct rpi_model rpi_models_new_scheme[] = { - }, - [0x12] = { - "Zero 2 W", -- DTB_DIR "bcm2837-rpi-zero-2.dtb", -+ DTB_DIR "bcm2837-rpi-zero-2-w.dtb", - false, - }, - [0x13] = { --- -2.39.2 - diff --git a/rpi-bcm2835_sdhost-firmware-managed-clock.patch b/rpi-bcm2835_sdhost-firmware-managed-clock.patch deleted file mode 100644 index d1c60e8..0000000 --- a/rpi-bcm2835_sdhost-firmware-managed-clock.patch +++ /dev/null @@ -1,228 +0,0 @@ -From f3a870bfa075fb880f5e018a0a5ae6f27ca8be49 Mon Sep 17 00:00:00 2001 -From: Vincent Fazio -Date: Mon, 13 Sep 2021 13:34:45 -0500 -Subject: [PATCH] mmc: bcm2835-host: let firmware manage the clock - -Newer firmware supports managing the sdhost clock divisor, so leverage -this feature if it is available. - -SET_SDHOST_CLOCK is largely undocumented except for its usage within the -Linux kernel, which this change is based on. - -https://github.com/raspberrypi/linux/commit/3cd16c39c718e2dda7885c4ed7a20118aed12524 - -Signed-off-by: Vincent Fazio ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 18 ++++++++ - arch/arm/mach-bcm283x/include/mach/msg.h | 10 +++++ - arch/arm/mach-bcm283x/msg.c | 30 +++++++++++++ - drivers/mmc/bcm2835_sdhost.c | 53 ++++++++++++++--------- - 4 files changed, 90 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 7dcac583cc4..9b1943fcfc4 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -252,6 +252,24 @@ struct bcm2835_mbox_tag_get_clock_rate { - } body; - }; - -+#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK 0x00038042 -+ -+struct bcm2835_mbox_tag_set_sdhost_clock { -+ struct bcm2835_mbox_tag_hdr tag_hdr; -+ union { -+ struct { -+ u32 rate_hz; -+ u32 rate_1; -+ u32 rate_2; -+ } req; -+ struct { -+ u32 rate_hz; -+ u32 rate_1; -+ u32 rate_2; -+ } resp; -+ } body; -+}; -+ - #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 - - struct bcm2835_mbox_tag_allocate_buffer { -diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h -index e45c1bf010f..ab37abdb6c6 100644 ---- a/arch/arm/mach-bcm283x/include/mach/msg.h -+++ b/arch/arm/mach-bcm283x/include/mach/msg.h -@@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module); - */ - int bcm2835_get_mmc_clock(u32 clock_id); - -+/** -+ * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv -+ * -+ * @rate_hz: Input clock frequency -+ * @rate_1: Returns a clock frequency -+ * @rate_2: Returns a clock frequency -+ * @return 0 of OK, -EIO on error -+ */ -+int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2); -+ - /** - * bcm2835_get_video_size() - get the current display size - * -diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c -index e2badfecb09..8c1c36a5f15 100644 ---- a/arch/arm/mach-bcm283x/msg.c -+++ b/arch/arm/mach-bcm283x/msg.c -@@ -21,6 +21,12 @@ struct msg_get_clock_rate { - u32 end_tag; - }; - -+struct msg_set_sdhost_clock { -+ struct bcm2835_mbox_hdr hdr; -+ struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock; -+ u32 end_tag; -+}; -+ - struct msg_query { - struct bcm2835_mbox_hdr hdr; - struct bcm2835_mbox_tag_physical_w_h physical_w_h; -@@ -111,6 +117,30 @@ int bcm2835_get_mmc_clock(u32 clock_id) - return clock_rate; - } - -+int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2) -+{ -+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1); -+ int ret; -+ -+ BCM2835_MBOX_INIT_HDR(msg_sdhost_clk); -+ BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK); -+ -+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz; -+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_1 = *rate_1; -+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_2 = *rate_2; -+ -+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr); -+ if (ret) { -+ printf("bcm2835: Could not query sdhost clock rate\n"); -+ return -EIO; -+ } -+ -+ *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1; -+ *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2; -+ -+ return 0; -+} -+ - int bcm2835_get_video_size(int *widthp, int *heightp) - { - ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1); -diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c -index 894dbdd6861..3a9cd6f1eb2 100644 ---- a/drivers/mmc/bcm2835_sdhost.c -+++ b/drivers/mmc/bcm2835_sdhost.c -@@ -181,6 +181,7 @@ struct bcm2835_host { - struct udevice *dev; - struct mmc *mmc; - struct bcm2835_plat *plat; -+ unsigned int firmware_sets_cdiv:1; - }; - - static void bcm2835_dumpregs(struct bcm2835_host *host) -@@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host) - msleep(20); - host->clock = 0; - writel(host->hcfg, host->ioaddr + SDHCFG); -- writel(host->cdiv, host->ioaddr + SDCDIV); -+ writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV); - } - - static int bcm2835_wait_transfer_complete(struct bcm2835_host *host) -@@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host) - static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) - { - int div; -+ u32 clock_rate[2] = { 0 }; - - /* The SDCDIV register has 11 bits, and holds (div - 2). But - * in data mode the max is 50MHz wihout a minimum, and only -@@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) - * clock divisor at all times. - */ - -- if (clock < 100000) { -- /* Can't stop the clock, but make it as slow as possible -- * to show willing -- */ -- host->cdiv = SDCDIV_MAX_CDIV; -- writel(host->cdiv, host->ioaddr + SDCDIV); -- return; -- } -+ if (host->firmware_sets_cdiv) { -+ bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]); -+ clock = max(clock_rate[0], clock_rate[1]); -+ } else { -+ if (clock < 100000) { -+ /* Can't stop the clock, but make it as slow as possible -+ * to show willing -+ */ -+ host->cdiv = SDCDIV_MAX_CDIV; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ return; -+ } - -- div = host->max_clk / clock; -- if (div < 2) -- div = 2; -- if ((host->max_clk / div) > clock) -- div++; -- div -= 2; -+ div = host->max_clk / clock; -+ if (div < 2) -+ div = 2; -+ if ((host->max_clk / div) > clock) -+ div++; -+ div -= 2; - -- if (div > SDCDIV_MAX_CDIV) -- div = SDCDIV_MAX_CDIV; -+ if (div > SDCDIV_MAX_CDIV) -+ div = SDCDIV_MAX_CDIV; -+ -+ clock = host->max_clk / (div + 2); -+ host->cdiv = div; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ } - -- clock = host->max_clk / (div + 2); - host->mmc->clock = clock; - - /* Calibrate some delays */ -@@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) - host->ns_per_fifo_word = (1000000000 / clock) * - ((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32); - -- host->cdiv = div; -- writel(host->cdiv, host->ioaddr + SDCDIV); -- - /* Set the timeout to 500ms */ - writel(host->mmc->clock / 2, host->ioaddr + SDTOUT); - } -@@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev) - struct bcm2835_host *host = dev_get_priv(dev); - struct mmc *mmc = mmc_get_mmc_dev(dev); - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); -+ u32 clock_rate[2] = { ~0 }; - - host->dev = dev; - host->mmc = mmc; -@@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev) - - host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE); - -+ bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]); -+ host->firmware_sets_cdiv = (clock_rate[0] != ~0); -+ - bcm2835_add_host(host); - - dev_dbg(dev, "%s -> OK\n", __func__); diff --git a/rpi-fallback-to-max-clock-for-mmc.patch b/rpi-fallback-to-max-clock-for-mmc.patch deleted file mode 100644 index 81ee372..0000000 --- a/rpi-fallback-to-max-clock-for-mmc.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 71ba043e5c5575f3d86536acade70dab6599489b Mon Sep 17 00:00:00 2001 -From: Vincent Fazio -Date: Mon, 13 Sep 2021 11:22:30 -0500 -Subject: [PATCH] arm: rpi: fallback to max clock rate for MMC clock - -In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1 and later, -the GET_CLOCK_RATE mailbox property was changed to return the last -value set by SET_CLOCK_RATE. - -https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502 - -U-Boot does not call SET_CLOCK_RATE so bcm2835_get_mmc_clock will -return zero and can cause degraded MMC performance. - -Calling SET_CLOCK_RATE fixes the frequency of the clock to a specific -value and disables the firmware's clock scaling so is not an option. - -Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if -GET_CLOCK_RATE returns zero. - -Signed-off-by: Vincent Fazio ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 2 ++ - arch/arm/mach-bcm283x/msg.c | 20 +++++++++++++++++++- - 2 files changed, 21 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 2ae2d3d97c3..7dcac583cc4 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -224,6 +224,8 @@ struct bcm2835_mbox_tag_set_power_state { - }; - - #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 -+#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004 -+#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007 - - #define BCM2835_MBOX_CLOCK_ID_EMMC 1 - #define BCM2835_MBOX_CLOCK_ID_UART 2 -diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c -index 347aece3cd8..e2badfecb09 100644 ---- a/arch/arm/mach-bcm283x/msg.c -+++ b/arch/arm/mach-bcm283x/msg.c -@@ -75,6 +75,7 @@ int bcm2835_get_mmc_clock(u32 clock_id) - { - ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1); - int ret; -+ u32 clock_rate = 0; - - ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI); - if (ret) -@@ -90,7 +91,24 @@ int bcm2835_get_mmc_clock(u32 clock_id) - return -EIO; - } - -- return msg_clk->get_clock_rate.body.resp.rate_hz; -+ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; -+ -+ if (clock_rate == 0) -+ { -+ BCM2835_MBOX_INIT_HDR(msg_clk); -+ BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE); -+ msg_clk->get_clock_rate.body.req.clock_id = clock_id; -+ -+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr); -+ if (ret) { -+ printf("bcm2835: Could not query max eMMC clock rate\n"); -+ return -EIO; -+ } -+ -+ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; -+ } -+ -+ return clock_rate; - } - - int bcm2835_get_video_size(int *widthp, int *heightp) diff --git a/sources b/sources index 05b4824..154228d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.04-rc4.tar.bz2) = b40349d03abcbc0eb9061046071ff29578bf83007e70a0a57518763c1ef4b8a60c9c691c9921ac4d76135910a8053a4271a6d92346649d11d01b6997c4b09254 +SHA512 (u-boot-2023.04-rc5.tar.bz2) = e953585d3b59f53aec1e17179fe5c84cbc56d5a5150815aaf9b01a73dc6384a9cbe89e6848f8c4fd85c00bf61de4487018fa6df9411caff2f0c9a8a175a5dd28 diff --git a/uboot-tools.spec b/uboot-tools.spec index 4ca6fa6..42ac2eb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +%global candidate rc5 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,12 +24,9 @@ Patch2: smbios-Simplify-reporting-of-unknown-values.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -Patch4: rpi-fallback-to-max-clock-for-mmc.patch -Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch -Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch -Patch7: rpi-Update-the-RPi-Zero-2W-DT-filename.patch # Rockchips improvements -Patch8: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch5: rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch +Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch BuildRequires: bc BuildRequires: bison @@ -50,6 +47,7 @@ BuildRequires: swig %if %{with toolsonly} %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 +BuildRequires: python3-pyelftools %endif %endif Requires: dtc @@ -107,6 +105,7 @@ do if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ + cp builds/$(echo $board)/bl31.elf builds/$(echo $board)/atf-bl31 fi # End ATF @@ -212,6 +211,11 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Mar 28 2023 Peter Robinson - 2023.04-0.4.rc5 +- Update to 2023.04 RC5 +- Drop upstreamed patches +- Rockchip boot fixes + * Tue Mar 14 2023 Peter Robinson - 2023.04-0.3.rc4 - Update to 2023.04 RC4 From 2a1c71298b528b5b8d1f04f75f416392fe86fe87 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 5 Apr 2023 23:03:46 +0100 Subject: [PATCH 225/351] 2023.04 GA --- aarch64-boards | 1 + ...rrect-constant-name-in-RAM-init-code.patch | 136 ------------------ sources | 2 +- uboot-tools.spec | 12 +- 4 files changed, 9 insertions(+), 142 deletions(-) delete mode 100644 rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch diff --git a/aarch64-boards b/aarch64-boards index f8e2f3b..63adc19 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -7,6 +7,7 @@ beelink_gs1 dragonboard410c dragonboard820c dragonboard845c +eaidk-610-rk3399 evb-rk3328 evb-rk3399 ficus-rk3399 diff --git a/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch b/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch deleted file mode 100644 index 381105d..0000000 --- a/rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch +++ /dev/null @@ -1,136 +0,0 @@ -From patchwork Thu Mar 30 21:51:14 2023 -Content-Type: text/plain; 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- Thu, 30 Mar 2023 14:52:36 -0700 (PDT) -From: David Sebek -To: u-boot@lists.denx.de -Cc: jagan@amarulasolutions.com, kever.yang@rock-chips.com, - David Sebek -Subject: [PATCH 1/1] rockchip: Fix incorrect constant name in RAM init code -Date: Thu, 30 Mar 2023 17:51:14 -0400 -Message-Id: <20230330215114.248481-1-dasebek@gmail.com> -X-Mailer: git-send-email 2.40.0 -MIME-Version: 1.0 -X-Mailman-Approved-At: Thu, 30 Mar 2023 23:53:17 +0200 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -A condition in the rk3399 RAM initialization code used the old -CONFIG_RAM_RK3399_LPDDR4 constant name. This commit changes the -condition to use the correct CONFIG_RAM_ROCKCHIP_LPDDR4 constant. -Reviewed-by: Simon Glass ---- - drivers/ram/rockchip/sdram_rk3399.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c -index b1fea04e84..963a05c244 100644 ---- a/drivers/ram/rockchip/sdram_rk3399.c -+++ b/drivers/ram/rockchip/sdram_rk3399.c -@@ -2954,7 +2954,7 @@ static int sdram_init(struct dram_info *dram, - params->ch[ch].cap_info.rank = rank; - } - --#if defined(CONFIG_RAM_RK3399_LPDDR4) -+#if defined(CONFIG_RAM_ROCKCHIP_LPDDR4) - /* LPDDR4 needs to be trained at 400MHz */ - lpddr4_set_rate(dram, params, 0); - params->base.ddr_freq = dfs_cfgs_lpddr4[0].base.ddr_freq / MHz; diff --git a/sources b/sources index 154228d..6466983 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.04-rc5.tar.bz2) = e953585d3b59f53aec1e17179fe5c84cbc56d5a5150815aaf9b01a73dc6384a9cbe89e6848f8c4fd85c00bf61de4487018fa6df9411caff2f0c9a8a175a5dd28 +SHA512 (u-boot-2023.04.tar.bz2) = 31a44083af8084cd657c08233f485ff9503002bbaf95114c6135d483881fa14dc5a1b7ab42fd91f1fdd6b330556e76958d475280115018cb59c62b6ab4b508e6 diff --git a/uboot-tools.spec b/uboot-tools.spec index 42ac2eb..e754741 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc5 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -25,7 +25,6 @@ Patch2: smbios-Simplify-reporting-of-unknown-values.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements -Patch5: rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch BuildRequires: bc @@ -99,9 +98,9 @@ do rk3328=(evb-rk3328 nanopi-r2s-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" - cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ + cp /usr/share/arm-trusted-firmware/rk3328/bl31.elf builds/$(echo $board)/atf-bl31 fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399 eaidk-610-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -211,6 +210,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Apr 04 2023 Peter Robinson - 2023.04-1 +- Update to 2023.04 GA + * Tue Mar 28 2023 Peter Robinson - 2023.04-0.4.rc5 - Update to 2023.04 RC5 - Drop upstreamed patches From 4bf4670e83129691d4218dc9c68d922ab8c2e048 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 17 May 2023 23:06:15 +0100 Subject: [PATCH 226/351] 2023.07 RC2 --- sources | 2 +- uboot-tools.spec | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/sources b/sources index 6466983..882178d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.04.tar.bz2) = 31a44083af8084cd657c08233f485ff9503002bbaf95114c6135d483881fa14dc5a1b7ab42fd91f1fdd6b330556e76958d475280115018cb59c62b6ab4b508e6 +SHA512 (u-boot-2023.07-rc2.tar.bz2) = 88c17e7b835a78e93e39e2e455dcaa7bd1dc5abb7fbced36bc5ecdcacd3bd8633a36bdf4411cb3dbb59f8f6ae26d7dc4f9f3664290112e706ca0546033adba83 diff --git a/uboot-tools.spec b/uboot-tools.spec index e754741..bc8cfbf 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2023.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2023.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -210,6 +210,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Wed May 17 2023 Peter Robinson - 2023.07-0.1.rc2 +- Update to 2023.07 RC2 + * Tue Apr 04 2023 Peter Robinson - 2023.04-1 - Update to 2023.04 GA From 181c3671e7ce1141f3611610f1532b6133e5d8cd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 29 May 2023 22:02:20 +0100 Subject: [PATCH 227/351] 2023.07 RC3 --- sources | 2 +- uboot-tools.spec | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sources b/sources index 882178d..3ef372f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.07-rc2.tar.bz2) = 88c17e7b835a78e93e39e2e455dcaa7bd1dc5abb7fbced36bc5ecdcacd3bd8633a36bdf4411cb3dbb59f8f6ae26d7dc4f9f3664290112e706ca0546033adba83 +SHA512 (u-boot-2023.07-rc3.tar.bz2) = 2fc12ec0be56603931122063926e5edcb5464cc033f9bb79b07fdfa80a3045ccb5dd17703515f794406e109a5f2ad32e1a22909567d1d7ad2251bae2f70ed4a2 diff --git a/uboot-tools.spec b/uboot-tools.spec index bc8cfbf..6306df5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else From 0d5f023cd64a9872009673990bdb3c2bf9bfe609 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 11 Jun 2023 21:27:31 +0100 Subject: [PATCH 228/351] Fixes for the Pinephone Pro, RockPro64 --- ...rockpro64-Build-u-boot-rockchip-spi..patch | 41 ++++++ rockchip-PinePhone-Pro-fixes.patch | 127 ++++++++++++++++++ uboot-tools.spec | 8 +- 3 files changed, 175 insertions(+), 1 deletion(-) create mode 100644 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch create mode 100644 rockchip-PinePhone-Pro-fixes.patch diff --git a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch new file mode 100644 index 0000000..7ab4bbd --- /dev/null +++ b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch @@ -0,0 +1,41 @@ +From ed5ffb3b53690a47333b931301a3765b9588b5dc Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 11 Jun 2023 21:22:41 +0100 +Subject: [PATCH] Revert "rockchip: rockpro64: Build u-boot-rockchip-spi.bin" + +This reverts commit 5713135ecc75660684ff3eb6cfba7bc11eb6433c. +--- + configs/rockpro64-rk3399_defconfig | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index f41c0306790..0ca2cecade2 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -11,7 +11,6 @@ CONFIG_ENV_OFFSET=0x3F8000 + CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" + CONFIG_DM_RESET=y + CONFIG_ROCKCHIP_RK3399=y +-CONFIG_ROCKCHIP_SPI_IMAGE=y + CONFIG_TARGET_ROCKPRO64_RK3399=y + CONFIG_SPL_STACK=0x400000 + CONFIG_DEBUG_UART_BASE=0xFF1A0000 +@@ -21,7 +20,6 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y +-CONFIG_LTO=y + CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_BOOTSTAGE=y + CONFIG_BOOTSTAGE_REPORT=y +@@ -39,7 +37,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 + CONFIG_SPL_SPI_LOAD=y +-CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 + CONFIG_TPL=y + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y +-- +2.41.0 + diff --git a/rockchip-PinePhone-Pro-fixes.patch b/rockchip-PinePhone-Pro-fixes.patch new file mode 100644 index 0000000..74d0bab --- /dev/null +++ b/rockchip-PinePhone-Pro-fixes.patch @@ -0,0 +1,127 @@ +From 671b2e758900f4a733d6840b2f39bc24dd63cfdb Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 25 May 2023 14:18:17 +0200 +Subject: [PATCH] i2c: rockchip: De-initialize the bus after start bit failure + +Failure can happen when i2c is used without initializing pinctrl properly, +which U-Boot happily allows in SPL. Without this fix, further I2C access would +fail, even after proper pinctrl initialization. + +Signed-off-by: Ondrej Jirman +Cc: Heiko Schocher +Reviewed-by: Kever Yang +Reviewed-by: Heiko Schocher +--- + drivers/i2c/rk_i2c.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c +index f8fac45b6ca..9927af94a80 100644 +--- a/drivers/i2c/rk_i2c.c ++++ b/drivers/i2c/rk_i2c.c +@@ -342,7 +342,7 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + int nmsgs) + { + struct rk_i2c *i2c = dev_get_priv(bus); +- int ret; ++ int ret = 0; + + debug("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +@@ -356,14 +356,15 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + } + if (ret) { + debug("i2c_write: error sending\n"); +- return -EREMOTEIO; ++ ret = -EREMOTEIO; ++ break; + } + } + + rk_i2c_send_stop_bit(i2c); + rk_i2c_disable(i2c); + +- return 0; ++ return ret; + } + + int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) +-- +2.41.0 + +From 1af5e42f170d2c4b944beeb875b80ec7f061038a Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 25 May 2023 15:27:08 +0200 +Subject: [PATCH] pinephone-pro: Fix I/O port voltage (GPIO3D4A is 1.8V) + +This fixes access to camera sensor over I2C during probe time in +the kernel. (Kernel will fix I/0 port voltage by itself, but the +timing depends on probe order of the drivers, so the fix can +come after the camera sensor driver already failed to probe.) + +Signed-off-by: Ondrej Jirman +Cc: Kever Yang +Reviewed-by: Kever Yang +--- + board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +index eb639cd0d07..b6ccbb9c1c4 100644 +--- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c ++++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +@@ -15,7 +15,8 @@ + #include + #include + +-#define GRF_IO_VSEL_BT565_SHIFT 0 ++#define GRF_IO_VSEL_BT565_GPIO2AB 1 ++#define GRF_IO_VSEL_AUDIO_GPIO3D4A 2 + #define PMUGRF_CON0_VSEL_SHIFT 8 + + #ifndef CONFIG_SPL_BUILD +@@ -48,7 +49,8 @@ static void setup_iodomain(void) + syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); + + /* BT565 is in 1.8v domain */ +- rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); ++ rk_setreg(&grf->io_vsel, ++ GRF_IO_VSEL_BT565_GPIO2AB | GRF_IO_VSEL_AUDIO_GPIO3D4A); + + /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ + rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); +-- +2.41.0 + +From 6a7f8be74b44013513e51f5e7979dcc410ca2723 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 11 Jun 2023 18:13:19 +0100 +Subject: [PATCH] rockchip: Pinephone Pro: Add DDR RAM type config + +Add the RAM_ROCKCHIP_LPDDR4 to fix the Pinephone Pro booting. +When the configs were updated in 26f92be07e2 it somehow broke +the PPP boot process so let's fix it. + +Signed-off-by: Peter Robinson +CC: Jagan Teki +CC: Kever Yang + +--- + configs/pinephone-pro-rk3399_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig +index 4edea88665f..e4a8beeb1ab 100644 +--- a/configs/pinephone-pro-rk3399_defconfig ++++ b/configs/pinephone-pro-rk3399_defconfig +@@ -73,6 +73,7 @@ CONFIG_PMIC_RK8XX=y + CONFIG_REGULATOR_PWM=y + CONFIG_REGULATOR_RK8XX=y + CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM_ROCKCHIP_LPDDR4=y + CONFIG_DM_RNG=y + CONFIG_RNG_ROCKCHIP=y + CONFIG_BAUDRATE=1500000 +-- +2.41.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 6306df5..43fc748 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -26,6 +26,8 @@ Patch2: smbios-Simplify-reporting-of-unknown-values.patch Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch7: rockchip-PinePhone-Pro-fixes.patch +Patch8: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc BuildRequires: bison @@ -210,6 +212,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sun Jun 11 2023 Peter Robinson - 2023.07-0.2.rc3 +- Update to 2023.07 RC3 +- Fixes for the Pinephone Pro, RockPro64 + * Wed May 17 2023 Peter Robinson - 2023.07-0.1.rc2 - Update to 2023.07 RC2 From 9f5ba74ae09adf9c7c158cf68985a173260c27dc Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 12 Jun 2023 22:33:53 +0100 Subject: [PATCH 229/351] 2023.07 RC4 --- rockchip-PinePhone-Pro-fixes.patch | 51 ------------------------------ sources | 2 +- uboot-tools.spec | 7 ++-- 3 files changed, 6 insertions(+), 54 deletions(-) diff --git a/rockchip-PinePhone-Pro-fixes.patch b/rockchip-PinePhone-Pro-fixes.patch index 74d0bab..826ab23 100644 --- a/rockchip-PinePhone-Pro-fixes.patch +++ b/rockchip-PinePhone-Pro-fixes.patch @@ -1,54 +1,3 @@ -From 671b2e758900f4a733d6840b2f39bc24dd63cfdb Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Thu, 25 May 2023 14:18:17 +0200 -Subject: [PATCH] i2c: rockchip: De-initialize the bus after start bit failure - -Failure can happen when i2c is used without initializing pinctrl properly, -which U-Boot happily allows in SPL. Without this fix, further I2C access would -fail, even after proper pinctrl initialization. - -Signed-off-by: Ondrej Jirman -Cc: Heiko Schocher -Reviewed-by: Kever Yang -Reviewed-by: Heiko Schocher ---- - drivers/i2c/rk_i2c.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c -index f8fac45b6ca..9927af94a80 100644 ---- a/drivers/i2c/rk_i2c.c -+++ b/drivers/i2c/rk_i2c.c -@@ -342,7 +342,7 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, - int nmsgs) - { - struct rk_i2c *i2c = dev_get_priv(bus); -- int ret; -+ int ret = 0; - - debug("i2c_xfer: %d messages\n", nmsgs); - for (; nmsgs > 0; nmsgs--, msg++) { -@@ -356,14 +356,15 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, - } - if (ret) { - debug("i2c_write: error sending\n"); -- return -EREMOTEIO; -+ ret = -EREMOTEIO; -+ break; - } - } - - rk_i2c_send_stop_bit(i2c); - rk_i2c_disable(i2c); - -- return 0; -+ return ret; - } - - int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) --- -2.41.0 - From 1af5e42f170d2c4b944beeb875b80ec7f061038a Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Thu, 25 May 2023 15:27:08 +0200 diff --git a/sources b/sources index 3ef372f..eeeb20d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.07-rc3.tar.bz2) = 2fc12ec0be56603931122063926e5edcb5464cc033f9bb79b07fdfa80a3045ccb5dd17703515f794406e109a5f2ad32e1a22909567d1d7ad2251bae2f70ed4a2 +SHA512 (u-boot-2023.07-rc4.tar.bz2) = 523e0e63960921f3fa5a6cbb4d73b5326e4a95c81e7dc74dcca5e460d2a37209fbd2622db636358f6d7e4b0fdd715d4587f021a0d722b95808b65db2998b6fcf diff --git a/uboot-tools.spec b/uboot-tools.spec index 43fc748..0e2d64d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -212,6 +212,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Jun 12 2023 Peter Robinson - 2023.07-0.3.rc4 +- Update to 2023.07 RC4 + * Sun Jun 11 2023 Peter Robinson - 2023.07-0.2.rc3 - Update to 2023.07 RC3 - Fixes for the Pinephone Pro, RockPro64 From a66ab5dbb0f5d8bbba2f7064d42cab56751f645b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 16 Jun 2023 10:43:01 +0100 Subject: [PATCH 230/351] Disable NFS --- 0001-disable-NFS-support-by-default.patch | 35 +++++++++++++++++++++++ uboot-tools.spec | 8 ++++-- 2 files changed, 41 insertions(+), 2 deletions(-) create mode 100644 0001-disable-NFS-support-by-default.patch diff --git a/0001-disable-NFS-support-by-default.patch b/0001-disable-NFS-support-by-default.patch new file mode 100644 index 0000000..b520b15 --- /dev/null +++ b/0001-disable-NFS-support-by-default.patch @@ -0,0 +1,35 @@ +From 31dc49dee987500b0d5b5b536b6da2f3fbfd5b59 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 13 Jun 2023 09:36:50 +0100 +Subject: [v1] disable NFS support by default + +While NFS is widely used in data centres, and private +networks it's quite a nuanced usecase for device firmware. +A lot of devices already disable it. + +Various network protocols should really be opt in, not opt +out, because they add extra size and are potential attack +vectors from a security PoV. In the NFS case it doesn't +really make sense for a lot of devices like tables, SBCs etc. +It's also something we don't really want for SystemReady-IR +due to security concerns. + +Signed-off-by: Peter Robinson +--- + +v1: drop RFC tag + + cmd/Kconfig | 1 - + +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 365371fb511..a193929cec4 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -1848,7 +1848,6 @@ config CMD_RARP + + config CMD_NFS + bool "nfs" +- default y + help + Boot image via network using NFS protocol. + diff --git a/uboot-tools.spec b/uboot-tools.spec index 0e2d64d..f035f7d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,10 +20,11 @@ Source1: aarch64-boards # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch +Patch3: 0001-disable-NFS-support-by-default.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support -Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch Patch7: rockchip-PinePhone-Pro-fixes.patch @@ -212,6 +213,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Fri Jun 16 2023 Peter Robinson - 2023.07-0.4.rc4 +- Disable NFS by default + * Mon Jun 12 2023 Peter Robinson - 2023.07-0.3.rc4 - Update to 2023.07 RC4 From bb667eb6c94fd70a33386260d04b06269b0c4572 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 11 Jul 2023 15:37:44 +0100 Subject: [PATCH 231/351] 2023.07 GA --- ...rockpro64-Build-u-boot-rockchip-spi..patch | 8 ++--- fix-release-rev.patch | 11 +++++++ rockchip-PinePhone-Pro-fixes.patch | 33 ------------------- sources | 2 +- uboot-tools.spec | 13 +++++--- 5 files changed, 24 insertions(+), 43 deletions(-) create mode 100644 fix-release-rev.patch diff --git a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch index 7ab4bbd..30e4ad8 100644 --- a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +++ b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch @@ -12,7 +12,7 @@ diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defco index f41c0306790..0ca2cecade2 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig -@@ -11,7 +11,6 @@ CONFIG_ENV_OFFSET=0x3F8000 +@@ -11,7 +11,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y @@ -20,15 +20,15 @@ index f41c0306790..0ca2cecade2 100644 CONFIG_TARGET_ROCKPRO64_RK3399=y CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 -@@ -21,7 +20,6 @@ CONFIG_SPL_SPI=y +@@ -21,7 +20,6 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y -CONFIG_LTO=y CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTSTAGE=y - CONFIG_BOOTSTAGE_REPORT=y -@@ -39,7 +37,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 +@@ -40,7 +38,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y diff --git a/fix-release-rev.patch b/fix-release-rev.patch new file mode 100644 index 0000000..ad78eeb --- /dev/null +++ b/fix-release-rev.patch @@ -0,0 +1,11 @@ +--- u-boot-2023.07/Makefile.orig 2023-07-11 11:47:16.996315851 +0100 ++++ u-boot-2023.07/Makefile 2023-07-11 11:47:31.049391730 +0100 +@@ -3,7 +3,7 @@ + VERSION = 2023 + PATCHLEVEL = 07 + SUBLEVEL = +-EXTRAVERSION = -rc6 ++EXTRAVERSION = + NAME = + + # *DOCUMENTATION* diff --git a/rockchip-PinePhone-Pro-fixes.patch b/rockchip-PinePhone-Pro-fixes.patch index 826ab23..5e07490 100644 --- a/rockchip-PinePhone-Pro-fixes.patch +++ b/rockchip-PinePhone-Pro-fixes.patch @@ -41,36 +41,3 @@ index eb639cd0d07..b6ccbb9c1c4 100644 rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); -- 2.41.0 - -From 6a7f8be74b44013513e51f5e7979dcc410ca2723 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 11 Jun 2023 18:13:19 +0100 -Subject: [PATCH] rockchip: Pinephone Pro: Add DDR RAM type config - -Add the RAM_ROCKCHIP_LPDDR4 to fix the Pinephone Pro booting. -When the configs were updated in 26f92be07e2 it somehow broke -the PPP boot process so let's fix it. - -Signed-off-by: Peter Robinson -CC: Jagan Teki -CC: Kever Yang - ---- - configs/pinephone-pro-rk3399_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig -index 4edea88665f..e4a8beeb1ab 100644 ---- a/configs/pinephone-pro-rk3399_defconfig -+++ b/configs/pinephone-pro-rk3399_defconfig -@@ -73,6 +73,7 @@ CONFIG_PMIC_RK8XX=y - CONFIG_REGULATOR_PWM=y - CONFIG_REGULATOR_RK8XX=y - CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM_ROCKCHIP_LPDDR4=y - CONFIG_DM_RNG=y - CONFIG_RNG_ROCKCHIP=y - CONFIG_BAUDRATE=1500000 --- -2.41.0 - diff --git a/sources b/sources index eeeb20d..150374f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.07-rc4.tar.bz2) = 523e0e63960921f3fa5a6cbb4d73b5326e4a95c81e7dc74dcca5e460d2a37209fbd2622db636358f6d7e4b0fdd715d4587f021a0d722b95808b65db2998b6fcf +SHA512 (u-boot-2023.07.tar.bz2) = c11c2dd8e44babf7d5c15c28587139f0fa7e73833bf6d4902b46780a6ed2199d007db4fec579f10b041da478dfa8c6c21e6cee76cfd65ec6cc6860c116bbc0fb diff --git a/uboot-tools.spec b/uboot-tools.spec index f035f7d..34209a0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.07 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,14 +21,14 @@ Source1: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch Patch3: 0001-disable-NFS-support-by-default.patch +Patch4: fix-release-rev.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch7: rockchip-PinePhone-Pro-fixes.patch -Patch8: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +Patch7: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc BuildRequires: bison @@ -199,7 +199,7 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %files %doc README doc/develop/distro.rst doc/README.gpt -%doc doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst +%doc doc/README.rockchip doc/develop/uefi doc/usage doc/arch/arm64.rst %doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ %{_bindir}/* %{_mandir}/man1/mkimage.1* @@ -213,6 +213,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Jul 11 2023 Peter Robinson - 2023.07-1 +- Update to 2023.07 GA + * Fri Jun 16 2023 Peter Robinson - 2023.07-0.4.rc4 - Disable NFS by default From 1a686adf3732fa2fd9f348601518648c86009475 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 22 Jul 2023 16:57:06 +0000 Subject: [PATCH 232/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild Signed-off-by: Fedora Release Engineering --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 34209a0..dae5485 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -213,6 +213,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat Jul 22 2023 Fedora Release Engineering - 2023.07-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild + * Tue Jul 11 2023 Peter Robinson - 2023.07-1 - Update to 2023.07 GA From c7752f4a3223e10fa6ac66874e25d5dcfe23eb8f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 19 Aug 2023 12:52:49 +0100 Subject: [PATCH 233/351] 2023.10 RC2 --- 0001-disable-NFS-support-by-default.patch | 35 -- disable-VBE-by-default.patch | 28 ++ enable-bootmenu-by-default.patch | 49 +++ fix-release-rev.patch | 11 - rock64-small-fixes.patch | 476 ++++++++++++++++++++++ sources | 2 +- uboot-tools.spec | 16 +- 7 files changed, 564 insertions(+), 53 deletions(-) delete mode 100644 0001-disable-NFS-support-by-default.patch create mode 100644 disable-VBE-by-default.patch create mode 100644 enable-bootmenu-by-default.patch delete mode 100644 fix-release-rev.patch create mode 100644 rock64-small-fixes.patch diff --git a/0001-disable-NFS-support-by-default.patch b/0001-disable-NFS-support-by-default.patch deleted file mode 100644 index b520b15..0000000 --- a/0001-disable-NFS-support-by-default.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 31dc49dee987500b0d5b5b536b6da2f3fbfd5b59 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 13 Jun 2023 09:36:50 +0100 -Subject: [v1] disable NFS support by default - -While NFS is widely used in data centres, and private -networks it's quite a nuanced usecase for device firmware. -A lot of devices already disable it. - -Various network protocols should really be opt in, not opt -out, because they add extra size and are potential attack -vectors from a security PoV. In the NFS case it doesn't -really make sense for a lot of devices like tables, SBCs etc. -It's also something we don't really want for SystemReady-IR -due to security concerns. - -Signed-off-by: Peter Robinson ---- - -v1: drop RFC tag - - cmd/Kconfig | 1 - - -diff --git a/cmd/Kconfig b/cmd/Kconfig -index 365371fb511..a193929cec4 100644 ---- a/cmd/Kconfig -+++ b/cmd/Kconfig -@@ -1848,7 +1848,6 @@ config CMD_RARP - - config CMD_NFS - bool "nfs" -- default y - help - Boot image via network using NFS protocol. - diff --git a/disable-VBE-by-default.patch b/disable-VBE-by-default.patch new file mode 100644 index 0000000..dffa9fc --- /dev/null +++ b/disable-VBE-by-default.patch @@ -0,0 +1,28 @@ +From 02513d9ecc38d11ffc051ed59529e11f82164785 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 18 Aug 2023 13:28:05 +0100 +Subject: [PATCH] disable VBE by default + +Fedora doesn't support the VBE boot method, disable it +to reduce size and remove a possible boot attack vector. + +Signed-off-by: Peter Robinson +--- + boot/Kconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/boot/Kconfig b/boot/Kconfig +index e8fb03b8016..467b09e2350 100644 +--- a/boot/Kconfig ++++ b/boot/Kconfig +@@ -526,7 +526,6 @@ config BOOTMETH_EFILOADER + config BOOTMETH_VBE + bool "Bootdev support for Verified Boot for Embedded" + depends on FIT +- default y + select BOOTMETH_GLOBAL + select EVENT + help +-- +2.41.0 + diff --git a/enable-bootmenu-by-default.patch b/enable-bootmenu-by-default.patch new file mode 100644 index 0000000..1ecd514 --- /dev/null +++ b/enable-bootmenu-by-default.patch @@ -0,0 +1,49 @@ +From a956480a6d52ae90ef4a46275c2ee29a4074de36 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 18 Aug 2023 23:10:42 +0100 +Subject: [PATCH] enable bootmenu by default + +We want the boot menu on all Fedora devices as it makes +it a whole lot more user friendly. + +Signed-off-by: Peter Robinson +--- + boot/Kconfig | 2 ++ + cmd/Kconfig | 1 + + 2 files changed, 3 insertions(+) + +diff --git a/boot/Kconfig b/boot/Kconfig +index 467b09e2350..ad67b1f65a6 100644 +--- a/boot/Kconfig ++++ b/boot/Kconfig +@@ -1281,6 +1281,7 @@ config BOOTDELAY + + config AUTOBOOT_KEYED + bool "Stop autobooting via specific input key / string" ++ default y + help + This option enables stopping (aborting) of the automatic + boot feature only by issuing a specific input key or +@@ -1433,6 +1434,7 @@ config AUTOBOOT_MENUKEY + + config AUTOBOOT_MENU_SHOW + bool "Show a menu on boot" ++ default y + depends on CMD_BOOTMENU + help + This enables the boot menu, controlled by environment variables +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 43ca10f69cc..3d39f2914cc 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -413,6 +413,7 @@ source lib/efi_selftest/Kconfig + + config CMD_BOOTMENU + bool "bootmenu" ++ default y + select MENU + select CHARSET + help +-- +2.41.0 + diff --git a/fix-release-rev.patch b/fix-release-rev.patch deleted file mode 100644 index ad78eeb..0000000 --- a/fix-release-rev.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- u-boot-2023.07/Makefile.orig 2023-07-11 11:47:16.996315851 +0100 -+++ u-boot-2023.07/Makefile 2023-07-11 11:47:31.049391730 +0100 -@@ -3,7 +3,7 @@ - VERSION = 2023 - PATCHLEVEL = 07 - SUBLEVEL = --EXTRAVERSION = -rc6 -+EXTRAVERSION = - NAME = - - # *DOCUMENTATION* diff --git a/rock64-small-fixes.patch b/rock64-small-fixes.patch new file mode 100644 index 0000000..5ea77fb --- /dev/null +++ b/rock64-small-fixes.patch @@ -0,0 +1,476 @@ +From patchwork Wed Jun 14 12:43:12 2023 +Content-Type: text/plain; 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+ Wed, 14 Jun 2023 05:43:33 -0700 (PDT) +Received: from morpheus.home.roving-it.com + (3.e.2.0.0.0.0.0.0.0.0.0.0.0.0.0.1.8.6.2.1.1.b.f.0.b.8.0.1.0.0.2.ip6.arpa. + [2001:8b0:fb11:2681::2e3]) by smtp.googlemail.com with ESMTPSA id + g26-20020a7bc4da000000b003f60e143d38sm17329161wmk.11.2023.06.14.05.43.33 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 14 Jun 2023 05:43:33 -0700 (PDT) +From: Peter Robinson +To: "Matwey V. Kornilov" , + Simon Glass , Philipp Tomsich , + Kever Yang , u-boot@lists.denx.de +Cc: Peter Robinson +Subject: [PATCH 2/4] config: rock64: enable efuse for stable mac addr +Date: Wed, 14 Jun 2023 13:43:12 +0100 +Message-ID: <20230614124329.244462-2-pbrobinson@gmail.com> +X-Mailer: git-send-email 2.41.0 +In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> +References: <20230614124329.244462-1-pbrobinson@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Enable the rockchip efuse driver on the Rock64 to +provide a stable ethernet address on the device. + +Signed-off-by: Peter Robinson +Reviewed-by: Kever Yang +--- + +While the rockchip efuse driver currently has issues on rk3328 due to, I believe, it +not being properly initialised in ATF, enabling it at least provides a stable MAC +adress on the NIC which I think makes it worthwhile + + configs/rock64-rk3328_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig +index 1da9b0545a5..97ac8734d1b 100644 +--- a/configs/rock64-rk3328_defconfig ++++ b/configs/rock64-rk3328_defconfig +@@ -74,6 +74,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_SPI_FLASH_GIGADEVICE=y + +From patchwork Wed Jun 14 12:43:13 2023 +Content-Type: text/plain; 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+ Wed, 14 Jun 2023 05:43:34 -0700 (PDT) +Received: from morpheus.home.roving-it.com + (3.e.2.0.0.0.0.0.0.0.0.0.0.0.0.0.1.8.6.2.1.1.b.f.0.b.8.0.1.0.0.2.ip6.arpa. + [2001:8b0:fb11:2681::2e3]) by smtp.googlemail.com with ESMTPSA id + g26-20020a7bc4da000000b003f60e143d38sm17329161wmk.11.2023.06.14.05.43.33 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 14 Jun 2023 05:43:33 -0700 (PDT) +From: Peter Robinson +To: "Matwey V. Kornilov" , + Simon Glass , Philipp Tomsich , + Kever Yang , u-boot@lists.denx.de +Cc: Peter Robinson +Subject: [PATCH 3/4] rockchip: dts: rk3328: Add rng details to u-boot.dtsi +Date: Wed, 14 Jun 2023 13:43:13 +0100 +Message-ID: <20230614124329.244462-3-pbrobinson@gmail.com> +X-Mailer: git-send-email 2.41.0 +In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> +References: <20230614124329.244462-1-pbrobinson@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Add the rk3328 rng details to the u-boot.dtsi and +enable the RNG on the Rock64 to be able to provide +a rnadom seed via UEFI. + +Signed-off-by: Peter Robinson +--- + +The DT snippet will allow this to be enabled on other rk3328 devices but +I only have the Rock54 to test on. + + arch/arm/dts/rk3328-u-boot.dtsi | 6 ++++++ + configs/rock64-rk3328_defconfig | 2 ++ + 2 files changed, 8 insertions(+) + +diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi +index ce96ce40a73..a9f2536de2a 100644 +--- a/arch/arm/dts/rk3328-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-u-boot.dtsi +@@ -26,6 +26,12 @@ + 0x0 0xff720000 0x0 0x1000 + 0x0 0xff798000 0x0 0x1000>; + }; ++ ++ rng: rng@ff060000 { ++ compatible = "rockchip,cryptov1-rng"; ++ reg = <0x0 0xff060000 0x0 0x4000>; ++ status = "okay"; ++ }; + }; + + &cru { +diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig +index 97ac8734d1b..1820deee373 100644 +--- a/configs/rock64-rk3328_defconfig ++++ b/configs/rock64-rk3328_defconfig +@@ -77,6 +77,8 @@ CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_ETH_DESIGNWARE=y + CONFIG_GMAC_ROCKCHIP=y + +From patchwork Wed Jun 14 12:43:14 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Peter Robinson +X-Patchwork-Id: 1794952 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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+ Wed, 14 Jun 2023 05:43:34 -0700 (PDT) +From: Peter Robinson +To: "Matwey V. Kornilov" , + Simon Glass , Philipp Tomsich , + Kever Yang , u-boot@lists.denx.de +Cc: Peter Robinson +Subject: [PATCH 4/4] rockchip: dts: rk3328: rock64: Align spi flash entry +Date: Wed, 14 Jun 2023 13:43:14 +0100 +Message-ID: <20230614124329.244462-4-pbrobinson@gmail.com> +X-Mailer: git-send-email 2.41.0 +In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> +References: <20230614124329.244462-1-pbrobinson@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Align the SPI flash entry with upstream. There's no need +to diverge here. + +Signed-off-by: Peter Robinson +Reviewed-by: Kever Yang +--- + arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +- + arch/arm/dts/rk3328-rock64.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +index 849854302ee..6904515b969 100644 +--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +@@ -54,7 +54,7 @@ + }; + + &spi0 { +- spi_flash: spiflash@0 { ++ spi_flash: flash@0 { + bootph-all; + }; + }; +diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts +index 1b0f7e4551e..f69a38f42d2 100644 +--- a/arch/arm/dts/rk3328-rock64.dts ++++ b/arch/arm/dts/rk3328-rock64.dts +@@ -345,7 +345,7 @@ + &spi0 { + status = "okay"; + +- spiflash@0 { ++ flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + diff --git a/sources b/sources index 150374f..1504d9e 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.07.tar.bz2) = c11c2dd8e44babf7d5c15c28587139f0fa7e73833bf6d4902b46780a6ed2199d007db4fec579f10b041da478dfa8c6c21e6cee76cfd65ec6cc6860c116bbc0fb +SHA512 (u-boot-2023.10-rc2.tar.bz2) = cc3cd85c84e1d7d8e45244f330709ad5ecf918ee42aac4de565ca5e1e1cde25e89b1a8672aaac04c0bf830e36192a72caabfde3baf6633c68fa76103768be201 diff --git a/uboot-tools.spec b/uboot-tools.spec index dae5485..5774bc2 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2023.07 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2023.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,15 +20,16 @@ Source1: aarch64-boards # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch -Patch3: 0001-disable-NFS-support-by-default.patch -Patch4: fix-release-rev.patch +Patch3: disable-VBE-by-default.patch +Patch4: enable-bootmenu-by-default.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch7: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +Patch7: rock64-small-fixes.patch +#Patch7: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc BuildRequires: bison @@ -213,6 +214,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Fri Aug 18 2023 Peter Robinson - 2023.10-0.1.rc2 +- Update to 2023.10 RC2 + * Sat Jul 22 2023 Fedora Release Engineering - 2023.07-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild From 99f3204130b5d9f77717f67c1fa08e9e06f003e5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 19 Aug 2023 14:33:37 +0100 Subject: [PATCH 234/351] Raspberry Pi standard boot --- rpi-Convert-to-standard-boot.patch | 892 +++++++++++++++++++++++++++++ uboot-tools.spec | 6 +- 2 files changed, 897 insertions(+), 1 deletion(-) create mode 100644 rpi-Convert-to-standard-boot.patch diff --git a/rpi-Convert-to-standard-boot.patch b/rpi-Convert-to-standard-boot.patch new file mode 100644 index 0000000..de02728 --- /dev/null +++ b/rpi-Convert-to-standard-boot.patch @@ -0,0 +1,892 @@ +From patchwork Thu Jul 27 21:54:28 2023 +Content-Type: text/plain; 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+X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Drop use of the distro scripts and use standard boot instead. + +We don't need to specify the mmc devices individually, since they are +used in order from 0 to 2, and standard boot uses that order anyway. + +Signed-off-by: Simon Glass +--- + +Changes in v3: +- Rebase to -master + +Changes in v2: +- Rebase to -next + + configs/rpi_0_w_defconfig | 1 + + configs/rpi_2_defconfig | 1 + + configs/rpi_3_32b_defconfig | 1 + + configs/rpi_3_b_plus_defconfig | 1 + + configs/rpi_3_defconfig | 1 + + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + + configs/rpi_defconfig | 1 + + include/configs/rpi.h | 38 ++-------------------------------- + 10 files changed, 11 insertions(+), 36 deletions(-) + +diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig +index 5da334a8bcf9..7554e671e2ca 100644 +--- a/configs/rpi_0_w_defconfig ++++ b/configs/rpi_0_w_defconfig +@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig +index 990862160712..653f78bec1e8 100644 +--- a/configs/rpi_2_defconfig ++++ b/configs/rpi_2_defconfig +@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig +index 80885aa9488d..305f1dacfd46 100644 +--- a/configs/rpi_3_32b_defconfig ++++ b/configs/rpi_3_32b_defconfig +@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig +index 0acce8b883f8..f36f1258aa6d 100644 +--- a/configs/rpi_3_b_plus_defconfig ++++ b/configs/rpi_3_b_plus_defconfig +@@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig +index bb6fe128061b..a0d8be42537f 100644 +--- a/configs/rpi_3_defconfig ++++ b/configs/rpi_3_defconfig +@@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index f6213340971e..71f61c52e52d 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_DM_RESET=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index bbc0fd6c649a..fa2c05da21e8 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_DM_RESET=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 5d9a273cb920..3e64573b70b1 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_DM_RESET=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y +diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig +index 550b8dcb9587..4b8e402c89d4 100644 +--- a/configs/rpi_defconfig ++++ b/configs/rpi_defconfig +@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" + CONFIG_SYS_PROMPT="U-Boot> " + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 ++CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y +diff --git a/include/configs/rpi.h b/include/configs/rpi.h +index 4da982f73578..4160db2d8e14 100644 +--- a/include/configs/rpi.h ++++ b/include/configs/rpi.h +@@ -122,47 +122,13 @@ + "fdt_addr_r=0x02600000\0" \ + "ramdisk_addr_r=0x02700000\0" + +-#if IS_ENABLED(CONFIG_CMD_MMC) +- #define BOOT_TARGET_MMC(func) \ +- func(MMC, mmc, 0) \ +- func(MMC, mmc, 1) \ +- func(MMC, mmc, 2) +-#else +- #define BOOT_TARGET_MMC(func) +-#endif +- +-#if IS_ENABLED(CONFIG_CMD_USB) +- #define BOOT_TARGET_USB(func) func(USB, usb, 0) +-#else +- #define BOOT_TARGET_USB(func) +-#endif +- +-#if CONFIG_IS_ENABLED(CMD_PXE) +- #define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +-#else +- #define BOOT_TARGET_PXE(func) +-#endif +- +-#if CONFIG_IS_ENABLED(CMD_DHCP) +- #define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +-#else +- #define BOOT_TARGET_DHCP(func) +-#endif +- +-#define BOOT_TARGET_DEVICES(func) \ +- BOOT_TARGET_MMC(func) \ +- BOOT_TARGET_USB(func) \ +- BOOT_TARGET_PXE(func) \ +- BOOT_TARGET_DHCP(func) +- +-#include ++#define BOOT_TARGETS "mmc usb pxe dhcp" + + #define CFG_EXTRA_ENV_SETTINGS \ + "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ + ENV_DEVICE_SETTINGS \ + ENV_DFU_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ +- BOOTENV +- ++ "boot_targets=" BOOT_TARGETS "\0" + + #endif + +From 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[73.14.173.85]) + by smtp.gmail.com with ESMTPSA id + n28-20020a02cc1c000000b00430245071ddsm679215jap.176.2023.07.27.14.54.40 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 27 Jul 2023 14:54:40 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Cc: Tom Rini , Peter Robinson , + Simon Glass , Matthias Brugger , + Stephen Warren , Stephen Warren +Subject: [RESEND PATCH v3 2/3] rpi: Disable DISTRO_DEFAULTS +Date: Thu, 27 Jul 2023 15:54:29 -0600 +Message-ID: <20230727215433.578830-3-sjg@chromium.org> +X-Mailer: git-send-email 2.41.0.487.g6d72f3e995-goog +In-Reply-To: <20230727215433.578830-1-sjg@chromium.org> +References: <20230727215433.578830-1-sjg@chromium.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Disable this option to reclaim some space, since bootstd requires less +functionality to operate (e.g. hush parser). + +Signed-off-by: Simon Glass +--- + +(no changes since v2) + +Changes in v2: +- Add new patch to disable DISTRO_DEFAULTS + + configs/rpi_0_w_defconfig | 1 - + configs/rpi_2_defconfig | 1 - + configs/rpi_3_32b_defconfig | 1 - + configs/rpi_3_b_plus_defconfig | 1 - + configs/rpi_3_defconfig | 1 - + configs/rpi_4_32b_defconfig | 1 - + configs/rpi_4_defconfig | 1 - + configs/rpi_arm64_defconfig | 1 - + configs/rpi_defconfig | 1 - + 9 files changed, 9 deletions(-) + +diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig +index 7554e671e2ca..3167bfbe48f7 100644 +--- a/configs/rpi_0_w_defconfig ++++ b/configs/rpi_0_w_defconfig +@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig +index 653f78bec1e8..883dab161702 100644 +--- a/configs/rpi_2_defconfig ++++ b/configs/rpi_2_defconfig +@@ -15,7 +15,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig +index 305f1dacfd46..5ff7d987a431 100644 +--- a/configs/rpi_3_32b_defconfig ++++ b/configs/rpi_3_32b_defconfig +@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig +index f36f1258aa6d..31f2a6eb310c 100644 +--- a/configs/rpi_3_b_plus_defconfig ++++ b/configs/rpi_3_b_plus_defconfig +@@ -13,7 +13,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig +index a0d8be42537f..fa6e1507d640 100644 +--- a/configs/rpi_3_defconfig ++++ b/configs/rpi_3_defconfig +@@ -13,7 +13,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index 71f61c52e52d..55bf6c0770f0 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + CONFIG_PREBOOT="pci enum; usb start;" + # CONFIG_DISPLAY_CPUINFO is not set +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index fa2c05da21e8..6679cce9a165 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + CONFIG_PREBOOT="pci enum; usb start;" + # CONFIG_DISPLAY_CPUINFO is not set +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index 3e64573b70b1..26e29ffb5a1f 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_PCI=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + CONFIG_PREBOOT="pci enum; usb start;" + # CONFIG_DISPLAY_CPUINFO is not set +diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig +index 4b8e402c89d4..0ac5efec717b 100644 +--- a/configs/rpi_defconfig ++++ b/configs/rpi_defconfig +@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SYS_LOAD_ADDR=0x1000000 + CONFIG_BOOTSTD_DEFAULTS=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_DISTRO_DEFAULTS=y + CONFIG_USE_PREBOOT=y + # CONFIG_DISPLAY_CPUINFO is not set + # CONFIG_DISPLAY_BOARDINFO is not set + +From patchwork Thu Jul 27 21:54:30 2023 +Content-Type: text/plain; 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[73.14.173.85]) + by smtp.gmail.com with ESMTPSA id + n28-20020a02cc1c000000b00430245071ddsm679215jap.176.2023.07.27.14.54.41 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Thu, 27 Jul 2023 14:54:41 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Cc: Tom Rini , Peter Robinson , + Simon Glass , Albert Aribaud , + Matthias Brugger , Stephen Warren , + Stephen Warren +Subject: [RESEND PATCH v3 3/3] arm: rpi: Switch to a text environment +Date: Thu, 27 Jul 2023 15:54:30 -0600 +Message-ID: <20230727215433.578830-4-sjg@chromium.org> +X-Mailer: git-send-email 2.41.0.487.g6d72f3e995-goog +In-Reply-To: <20230727215433.578830-1-sjg@chromium.org> +References: <20230727215433.578830-1-sjg@chromium.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Use the new environment format so we can drop most of the config.h file. + +Signed-off-by: Simon Glass +--- + +(no changes since v1) + + board/raspberrypi/rpi/rpi.env | 77 ++++++++++++++++++++++++++ + include/configs/rpi.h | 100 ---------------------------------- + 2 files changed, 77 insertions(+), 100 deletions(-) + create mode 100644 board/raspberrypi/rpi/rpi.env + +diff --git a/board/raspberrypi/rpi/rpi.env b/board/raspberrypi/rpi/rpi.env +new file mode 100644 +index 000000000000..30228285edde +--- /dev/null ++++ b/board/raspberrypi/rpi/rpi.env +@@ -0,0 +1,77 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++ ++/* environment for Raspberry Pi boards */ ++ ++dhcpuboot=usb start; dhcp u-boot.uimg; bootm ++ ++/* Environment */ ++stdin=serial,usbkbd ++stdout=serial,vidconsole ++stderr=serial,vidconsole ++ ++/* DFU over USB/UDC */ ++#ifdef CONFIG_CMD_DFU ++dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1; ++ config.txt fat 0 1; ++#ifdef CONFIG_ARM64 ++dfu_alt_info+=Image fat 0 1 ++#else ++dfu_alt_info+=zImage fat 0 1 ++#endif ++#endif /* CONFIG_CMD_DFU */ ++ ++/* ++ * Memory layout for where various images get loaded by boot scripts: ++ * ++ * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. ++ * ++ * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, ++ * newer versions place it in high memory. So prevent U-Boot from doing its own ++ * DTB + initrd relocation so that we won't accidentally relocate the initrd ++ * over the firmware-loaded DTB and generally try to lay out things starting ++ * from the bottom of RAM. ++ * ++ * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, ++ * it must be within the first 128M of RAM in order for the kernel's ++ * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed ++ * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The ++ * decompressor also likes to relocate itself to right past the end of the ++ * decompressed kernel, so in total the sum of the compressed and ++ * decompressed kernel needs to be reserved. ++ * ++ * For Aarch64, the kernel image is uncompressed and must be loaded at ++ * text_offset bytes (specified in the header of the Image) into a 2MB ++ * boundary. The 'booti' command relocates the image if necessary. Linux uses ++ * a default text_offset of 0x80000. In summary, loading at 0x80000 ++ * satisfies all these constraints and reserving memory up to 0x02400000 ++ * permits fairly large (roughly 36M) kernels. ++ * ++ * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't ++ * conflict with something else. Reserving 1M for each of them at ++ * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. ++ * ++ * On ARM, both the DTB and any possible initrd must be loaded such that they ++ * fit inside the lowmem mapping in Linux. In practice, this usually means not ++ * more than ~700M away from the start of the kernel image but this number can ++ * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line ++ * parameter given to the kernel. So reserving memory from low to high ++ * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for ++ * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. ++ * Even with the smallest possible CPU-GPU memory split of the CPU getting ++ * only 64M, the remaining 25M starting at 0x02700000 should allow quite ++ * large initrds before they start colliding with U-Boot. ++ */ ++#ifdef CONFIG_ARM64 ++fdt_high=ffffffffffffffff ++initrd_high=ffffffffffffffff ++#else ++fdt_high=ffffffff ++initrd_high=ffffffff ++#endif ++kernel_addr_r=0x00080000 ++scriptaddr=0x02400000 ++pxefile_addr_r=0x02500000 ++fdt_addr_r=0x02600000 ++ramdisk_addr_r=0x02700000 ++ ++boot_targets=mmc usb pxe dhcp +diff --git a/include/configs/rpi.h b/include/configs/rpi.h +index 4160db2d8e14..8e56bdc84a89 100644 +--- a/include/configs/rpi.h ++++ b/include/configs/rpi.h +@@ -13,8 +13,6 @@ + #include + #endif + +-/* Architecture, CPU, etc.*/ +- + /* Use SoC timer for AArch32, but architected timer for AArch64 */ + #ifndef CONFIG_ARM64 + #define CFG_SYS_TIMER_RATE 1000000 +@@ -33,102 +31,4 @@ + */ + #define CFG_SYS_SDRAM_SIZE SZ_128M + +-/* Devices */ +-/* LCD */ +- +-/* DFU over USB/UDC */ +-#ifdef CONFIG_CMD_DFU +-#ifdef CONFIG_ARM64 +-#define KERNEL_FILENAME "Image" +-#else +-#define KERNEL_FILENAME "zImage" +-#endif +- +-#define ENV_DFU_SETTINGS \ +- "dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1;" \ +- "config.txt fat 0 1;" \ +- KERNEL_FILENAME " fat 0 1\0" +-#else +-#define ENV_DFU_SETTINGS "" +-#endif +- +-/* Console configuration */ +- +-/* Environment */ +- +-/* Shell */ +- +-/* Environment */ +-#define ENV_DEVICE_SETTINGS \ +- "stdin=serial,usbkbd\0" \ +- "stdout=serial,vidconsole\0" \ +- "stderr=serial,vidconsole\0" +- +-#ifdef CONFIG_ARM64 +-#define FDT_HIGH "ffffffffffffffff" +-#define INITRD_HIGH "ffffffffffffffff" +-#else +-#define FDT_HIGH "ffffffff" +-#define INITRD_HIGH "ffffffff" +-#endif +- +-/* +- * Memory layout for where various images get loaded by boot scripts: +- * +- * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. +- * +- * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, +- * newer versions place it in high memory. So prevent U-Boot from doing its own +- * DTB + initrd relocation so that we won't accidentally relocate the initrd +- * over the firmware-loaded DTB and generally try to lay out things starting +- * from the bottom of RAM. +- * +- * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, +- * it must be within the first 128M of RAM in order for the kernel's +- * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed +- * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The +- * decompressor also likes to relocate itself to right past the end of the +- * decompressed kernel, so in total the sum of the compressed and and +- * decompressed kernel needs to be reserved. +- * +- * For Aarch64, the kernel image is uncompressed and must be loaded at +- * text_offset bytes (specified in the header of the Image) into a 2MB +- * boundary. The 'booti' command relocates the image if necessary. Linux uses +- * a default text_offset of 0x80000. In summary, loading at 0x80000 +- * satisfies all these constraints and reserving memory up to 0x02400000 +- * permits fairly large (roughly 36M) kernels. +- * +- * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't +- * conflict with something else. Reserving 1M for each of them at +- * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. +- * +- * On ARM, both the DTB and any possible initrd must be loaded such that they +- * fit inside the lowmem mapping in Linux. In practice, this usually means not +- * more than ~700M away from the start of the kernel image but this number can +- * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line +- * parameter given to the kernel. So reserving memory from low to high +- * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for +- * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. +- * Even with the smallest possible CPU-GPU memory split of the CPU getting +- * only 64M, the remaining 25M starting at 0x02700000 should allow quite +- * large initrds before they start colliding with U-Boot. +- */ +-#define ENV_MEM_LAYOUT_SETTINGS \ +- "fdt_high=" FDT_HIGH "\0" \ +- "initrd_high=" INITRD_HIGH "\0" \ +- "kernel_addr_r=0x00080000\0" \ +- "scriptaddr=0x02400000\0" \ +- "pxefile_addr_r=0x02500000\0" \ +- "fdt_addr_r=0x02600000\0" \ +- "ramdisk_addr_r=0x02700000\0" +- +-#define BOOT_TARGETS "mmc usb pxe dhcp" +- +-#define CFG_EXTRA_ENV_SETTINGS \ +- "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ +- ENV_DEVICE_SETTINGS \ +- ENV_DFU_SETTINGS \ +- ENV_MEM_LAYOUT_SETTINGS \ +- "boot_targets=" BOOT_TARGETS "\0" +- + #endif diff --git a/uboot-tools.spec b/uboot-tools.spec index 5774bc2..bd19b50 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -30,6 +30,7 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch Patch7: rock64-small-fixes.patch #Patch7: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +Patch8: rpi-Convert-to-standard-boot.patch BuildRequires: bc BuildRequires: bison @@ -214,6 +215,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Sat Aug 19 2023 Peter Robinson - 2023.10-0.2.rc2 +- Add patch for Raspberry Pi boot + * Fri Aug 18 2023 Peter Robinson - 2023.10-0.1.rc2 - Update to 2023.10 RC2 From c151f709dedf15e1c47633d72d73cf0518814e93 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 21 Aug 2023 20:11:07 +0100 Subject: [PATCH 235/351] Add patch to speed up firmware UEFI video output --- Add-video-damage-tracking.patch | 4136 +++++++++++++++++++++++++++++++ uboot-tools.spec | 16 +- 2 files changed, 4146 insertions(+), 6 deletions(-) create mode 100644 Add-video-damage-tracking.patch diff --git a/Add-video-damage-tracking.patch b/Add-video-damage-tracking.patch new file mode 100644 index 0000000..3cfd387 --- /dev/null +++ b/Add-video-damage-tracking.patch @@ -0,0 +1,4136 @@ +From patchwork Mon Aug 21 13:50:58 2023 +Content-Type: text/plain; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.22 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:23 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 01/13] video: test: Split copy frame buffer check into a + function +Date: Mon, 21 Aug 2023 16:50:58 +0300 +Message-Id: <20230821135111.3558478-2-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +While checking frame buffer contents, the video tests also check if the +copy frame buffer contents match the main frame buffer. To test if only +the modified regions are updated after a sync, we will need to create +situations where the two are mismatched. Split this check into another +function that we can skip calling, since we won't want it to error on +those mismatched cases. + +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Add patch "video: test: Split copy frame buffer check into a function" + + test/dm/video.c | 69 +++++++++++++++++++++++++++++++++++++++++-------- + 1 file changed, 58 insertions(+), 11 deletions(-) + +diff --git a/test/dm/video.c b/test/dm/video.c +index d907f681600b..641a6250100a 100644 +--- a/test/dm/video.c ++++ b/test/dm/video.c +@@ -55,9 +55,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + * size of the compressed data. This provides a pretty good level of + * certainty and the resulting tests need only check a single value. + * +- * If the copy framebuffer is enabled, this compares it to the main framebuffer +- * too. +- * + * @uts: Test state + * @dev: Video device + * Return: compressed size of the frame buffer, or -ve on error +@@ -66,7 +63,6 @@ static int compress_frame_buffer(struct unit_test_state *uts, + struct udevice *dev) + { + struct video_priv *priv = dev_get_uclass_priv(dev); +- struct video_priv *uc_priv = dev_get_uclass_priv(dev); + uint destlen; + void *dest; + int ret; +@@ -82,16 +78,34 @@ static int compress_frame_buffer(struct unit_test_state *uts, + if (ret) + return ret; + +- /* Check here that the copy frame buffer is working correctly */ +- if (IS_ENABLED(CONFIG_VIDEO_COPY)) { +- ut_assertf(!memcmp(uc_priv->fb, uc_priv->copy_fb, +- uc_priv->fb_size), +- "Copy framebuffer does not match fb"); +- } +- + return destlen; + } + ++/** ++ * check_copy_frame_buffer() - Compare main frame buffer to copy ++ * ++ * If the copy frame buffer is enabled, this compares it to the main ++ * frame buffer. Normally they should have the same contents after a ++ * sync. ++ * ++ * @uts: Test state ++ * @dev: Video device ++ * Return: 0, or -ve on error ++ */ ++static int check_copy_frame_buffer(struct unit_test_state *uts, ++ struct udevice *dev) ++{ ++ struct video_priv *priv = dev_get_uclass_priv(dev); ++ ++ if (!IS_ENABLED(CONFIG_VIDEO_COPY)) ++ return 0; ++ ++ ut_assertf(!memcmp(priv->fb, priv->copy_fb, priv->fb_size), ++ "Copy framebuffer does not match fb"); ++ ++ return 0; ++} ++ + /* + * Call this function at any point to halt and show the current display. Be + * sure to run the test with the -l flag. +@@ -155,24 +169,30 @@ static int dm_test_video_text(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "8x16", 0)); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_putc_xy(con, 0, 0, 'a'); + ut_asserteq(79, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_putc_xy(con, 0, 0, ' '); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); + ut_asserteq(273, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_set_row(con, 0, WHITE); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); + ut_asserteq(273, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -191,24 +211,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "12x22", 0)); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_putc_xy(con, 0, 0, 'a'); + ut_asserteq(89, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_putc_xy(con, 0, 0, ' '); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); + ut_asserteq(363, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_set_row(con, 0, WHITE); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); + ut_asserteq(363, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -226,6 +252,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) + ut_assertok(vidconsole_select_font(con, "8x16", 0)); + vidconsole_put_string(con, test_string); + ut_asserteq(466, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -247,19 +274,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) + video_clear(con->parent); + video_sync(con->parent, false); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test clear escape sequence: [2J */ + vidconsole_put_string(con, "A\tB\tC"ANSI_ESC"[2J"); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test set-cursor: [%d;%df */ + vidconsole_put_string(con, "abc"ANSI_ESC"[2;2fab"ANSI_ESC"[4;4fcd"); + ut_asserteq(143, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test colors (30-37 fg color, 40-47 bg color) */ + vidconsole_put_string(con, ANSI_ESC"[30;41mfoo"); /* black on red */ + vidconsole_put_string(con, ANSI_ESC"[33;44mbar"); /* yellow on blue */ + ut_asserteq(272, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -292,11 +323,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "8x16", 0)); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* Check display wrap */ + for (i = 0; i < 120; i++) + vidconsole_put_char(con, 'A' + i % 50); + ut_asserteq(wrap_size, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* Check display scrolling */ + for (i = 0; i < SCROLL_LINES; i++) { +@@ -304,11 +337,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, + vidconsole_put_char(con, '\n'); + } + ut_asserteq(scroll_size, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* If we scroll enough, the screen becomes blank again */ + for (i = 0; i < SCROLL_LINES; i++) + vidconsole_put_char(con, '\n'); + ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -383,6 +418,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1368, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -402,6 +438,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1247, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -425,6 +462,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(3700, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -448,6 +486,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(3656, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -471,6 +510,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(6827, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -489,6 +529,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(2024, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -505,6 +546,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1368, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -524,6 +566,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(2024, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -543,6 +586,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1247, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -558,6 +602,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); + ut_asserteq(12174, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -579,6 +624,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); + ut_asserteq(34287, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } +@@ -600,6 +646,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); + ut_asserteq(29471, compress_frame_buffer(uts, dev)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + } + +From patchwork Mon Aug 21 13:50:59 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823644 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.24 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:26 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 02/13] video: test: Support checking copy frame buffer + contents +Date: Mon, 21 Aug 2023 16:50:59 +0300 +Message-Id: <20230821135111.3558478-3-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +The video tests have a helper function to generate a pseudo-digest of +frame buffer contents, but it only does so for the main one. There is +another check that the copy frame buffer is the same as that. But +neither is enough to test if only the modified regions are copied to the +copy frame buffer, since we will want the two to be different in very +specific ways. + +Add a boolean argument to the existing helper function to indicate which +frame buffer we want to inspect, and update the existing callers. + +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Add patch "video: test: Support checking copy frame buffer contents" + + test/dm/video.c | 76 ++++++++++++++++++++++++++----------------------- + 1 file changed, 41 insertions(+), 35 deletions(-) + +diff --git a/test/dm/video.c b/test/dm/video.c +index 641a6250100a..b9ff3da10c18 100644 +--- a/test/dm/video.c ++++ b/test/dm/video.c +@@ -57,22 +57,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + * + * @uts: Test state + * @dev: Video device ++ * @use_copy: Use copy frame buffer if available + * Return: compressed size of the frame buffer, or -ve on error + */ + static int compress_frame_buffer(struct unit_test_state *uts, +- struct udevice *dev) ++ struct udevice *dev, ++ bool use_copy) + { + struct video_priv *priv = dev_get_uclass_priv(dev); + uint destlen; + void *dest; + int ret; + ++ if (!IS_ENABLED(CONFIG_VIDEO_COPY)) ++ use_copy = false; ++ + destlen = priv->fb_size; + dest = malloc(priv->fb_size); + if (!dest) + return -ENOMEM; + ret = BZ2_bzBuffToBuffCompress(dest, &destlen, +- priv->fb, priv->fb_size, ++ use_copy ? priv->copy_fb : priv->fb, ++ priv->fb_size, + 3, 0, 0); + free(dest); + if (ret) +@@ -168,30 +174,30 @@ static int dm_test_video_text(struct unit_test_state *uts) + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "8x16", 0)); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_putc_xy(con, 0, 0, 'a'); +- ut_asserteq(79, compress_frame_buffer(uts, dev)); ++ ut_asserteq(79, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_putc_xy(con, 0, 0, ' '); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); +- ut_asserteq(273, compress_frame_buffer(uts, dev)); ++ ut_asserteq(273, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_set_row(con, 0, WHITE); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); +- ut_asserteq(273, compress_frame_buffer(uts, dev)); ++ ut_asserteq(273, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -210,30 +216,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "12x22", 0)); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_putc_xy(con, 0, 0, 'a'); +- ut_asserteq(89, compress_frame_buffer(uts, dev)); ++ ut_asserteq(89, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_putc_xy(con, 0, 0, ' '); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); +- ut_asserteq(363, compress_frame_buffer(uts, dev)); ++ ut_asserteq(363, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + vidconsole_set_row(con, 0, WHITE); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + for (i = 0; i < 20; i++) + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); +- ut_asserteq(363, compress_frame_buffer(uts, dev)); ++ ut_asserteq(363, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -251,7 +257,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "8x16", 0)); + vidconsole_put_string(con, test_string); +- ut_asserteq(466, compress_frame_buffer(uts, dev)); ++ ut_asserteq(466, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -273,23 +279,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) + /* reference clear: */ + video_clear(con->parent); + video_sync(con->parent, false); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test clear escape sequence: [2J */ + vidconsole_put_string(con, "A\tB\tC"ANSI_ESC"[2J"); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test set-cursor: [%d;%df */ + vidconsole_put_string(con, "abc"ANSI_ESC"[2;2fab"ANSI_ESC"[4;4fcd"); +- ut_asserteq(143, compress_frame_buffer(uts, dev)); ++ ut_asserteq(143, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* test colors (30-37 fg color, 40-47 bg color) */ + vidconsole_put_string(con, ANSI_ESC"[30;41mfoo"); /* black on red */ + vidconsole_put_string(con, ANSI_ESC"[33;44mbar"); /* yellow on blue */ +- ut_asserteq(272, compress_frame_buffer(uts, dev)); ++ ut_asserteq(272, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -322,13 +328,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + ut_assertok(vidconsole_select_font(con, "8x16", 0)); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* Check display wrap */ + for (i = 0; i < 120; i++) + vidconsole_put_char(con, 'A' + i % 50); +- ut_asserteq(wrap_size, compress_frame_buffer(uts, dev)); ++ ut_asserteq(wrap_size, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* Check display scrolling */ +@@ -336,13 +342,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, + vidconsole_put_char(con, 'A' + i % 50); + vidconsole_put_char(con, '\n'); + } +- ut_asserteq(scroll_size, compress_frame_buffer(uts, dev)); ++ ut_asserteq(scroll_size, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + /* If we scroll enough, the screen becomes blank again */ + for (i = 0; i < SCROLL_LINES; i++) + vidconsole_put_char(con, '\n'); +- ut_asserteq(46, compress_frame_buffer(uts, dev)); ++ ut_asserteq(46, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -417,7 +423,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(1368, compress_frame_buffer(uts, dev)); ++ ut_asserteq(1368, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -437,7 +443,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(1247, compress_frame_buffer(uts, dev)); ++ ut_asserteq(1247, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -461,7 +467,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); +- ut_asserteq(3700, compress_frame_buffer(uts, dev)); ++ ut_asserteq(3700, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -485,7 +491,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); +- ut_asserteq(3656, compress_frame_buffer(uts, dev)); ++ ut_asserteq(3656, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -509,7 +515,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); +- ut_asserteq(6827, compress_frame_buffer(uts, dev)); ++ ut_asserteq(6827, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -528,7 +534,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(2024, compress_frame_buffer(uts, dev)); ++ ut_asserteq(2024, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -545,7 +551,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx-comp.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(1368, compress_frame_buffer(uts, dev)); ++ ut_asserteq(1368, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -565,7 +571,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(2024, compress_frame_buffer(uts, dev)); ++ ut_asserteq(2024, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -585,7 +591,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); +- ut_asserteq(1247, compress_frame_buffer(uts, dev)); ++ ut_asserteq(1247, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -601,7 +607,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); +- ut_asserteq(12174, compress_frame_buffer(uts, dev)); ++ ut_asserteq(12174, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -623,7 +629,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); +- ut_asserteq(34287, compress_frame_buffer(uts, dev)); ++ ut_asserteq(34287, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; +@@ -645,7 +651,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) + ut_assertok(video_get_nologo(uts, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + vidconsole_put_string(con, test_string); +- ut_asserteq(29471, compress_frame_buffer(uts, dev)); ++ ut_asserteq(29471, compress_frame_buffer(uts, dev, false)); + ut_assertok(check_copy_frame_buffer(uts, dev)); + + return 0; + +From patchwork Mon Aug 21 13:51:00 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823645 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.27 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:28 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 03/13] video: test: Test partial updates of hardware frame + buffer +Date: Mon, 21 Aug 2023 16:51:00 +0300 +Message-Id: <20230821135111.3558478-4-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +With VIDEO_COPY enabled, only the modified parts of the frame buffer are +intended to be copied to the hardware. Add a test that checks this, by +overwriting contents we prepared without telling the video uclass and +then checking if the overwritten contents have been redrawn on the next +sync. + +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Add patch "video: test: Test partial updates of hardware frame buffer" + + test/dm/video.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 54 insertions(+) + +diff --git a/test/dm/video.c b/test/dm/video.c +index b9ff3da10c18..e4bd27a6b76f 100644 +--- a/test/dm/video.c ++++ b/test/dm/video.c +@@ -657,3 +657,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) + return 0; + } + DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); ++ ++/* Test partial rendering onto hardware frame buffer */ ++static int dm_test_video_copy(struct unit_test_state *uts) ++{ ++ struct sandbox_sdl_plat *plat; ++ struct video_uc_plat *uc_plat; ++ struct udevice *dev, *con; ++ struct video_priv *priv; ++ const char *test_string = "\n\tCriticism may not be agreeable, but it is necessary.\t"; ++ ulong addr; ++ ++ if (!IS_ENABLED(CONFIG_VIDEO_COPY)) ++ return -EAGAIN; ++ ++ ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); ++ ut_assertnonnull(dev); ++ uc_plat = dev_get_uclass_plat(dev); ++ uc_plat->hide_logo = true; ++ plat = dev_get_plat(dev); ++ plat->font_size = 32; ++ ut_assert(!device_active(dev)); ++ ut_assertok(uclass_first_device_err(UCLASS_VIDEO, &dev)); ++ ut_assertnonnull(dev); ++ priv = dev_get_uclass_priv(dev); ++ ++ ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ++ ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ++ ++ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ++ vidconsole_put_string(con, "\n\n\n\n\n"); ++ vidconsole_put_string(con, test_string); ++ vidconsole_put_string(con, test_string); ++ ++ ut_asserteq(6678, compress_frame_buffer(uts, dev, false)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); ++ ++ /* ++ * Secretly clear the hardware frame buffer, but in a different ++ * color (black) to see which parts will be overwritten. ++ */ ++ memset(priv->copy_fb, 0, priv->fb_size); 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.30 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:31 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 04/13] dm: video: Add damage tracking API +Date: Mon, 21 Aug 2023 16:51:01 +0300 +Message-Id: <20230821135111.3558478-5-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +We are going to introduce image damage tracking to fasten up screen +refresh on large displays. This patch adds damage tracking for up to +one rectangle of the screen which is typically enough to hold blt or +text print updates. Callers into this API and a reduced dcache flush +code path will follow in later patches. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +[Alper: Use xstart/yend, document new fields, return void from + video_damage(), declare priv, drop headers, use IS_ENABLED()] +Co-developed-by: Alper Nebi Yasak +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Use xstart, ystart, xend, yend as names for damage region +- Document damage struct and fields in struct video_priv comment +- Return void from video_damage() +- Fix undeclared priv error in video_sync() +- Drop unused headers from video-uclass.c +- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() + +Changes in v4: +- Move damage clear to patch "dm: video: Add damage tracking API" +- Simplify first damage logic +- Remove VIDEO_DAMAGE default for ARM + +Changes in v3: +- Adapt to always assume DM is used + +Changes in v2: +- Remove ifdefs + + drivers/video/Kconfig | 13 ++++++++++++ + drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++++--- + include/video.h | 32 ++++++++++++++++++++++++++-- + 3 files changed, 81 insertions(+), 5 deletions(-) + +diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig +index fe43fbd7004a..97f494a1340b 100644 +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -92,6 +92,19 @@ config VIDEO_COPY + To use this, your video driver must set @copy_base in + struct video_uc_plat. + ++config VIDEO_DAMAGE ++ bool "Enable damage tracking of frame buffer regions" ++ help ++ On some machines (most ARM), the display frame buffer resides in ++ RAM. To make the display controller pick up screen updates, we ++ have to flush frame buffer contents from CPU caches into RAM which ++ can be a slow operation. ++ ++ This feature adds damage tracking to collect information about regions ++ that received updates. When we want to sync, we then only flush ++ regions of the frame buffer that were modified before, speeding up ++ screen refreshes significantly. ++ + config BACKLIGHT_PWM + bool "Generic PWM based Backlight Driver" + depends on BACKLIGHT && DM_PWM +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index 8f268fc4063f..447689581668 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -351,9 +351,39 @@ void video_set_default_colors(struct udevice *dev, bool invert) + priv->colour_bg = video_index_to_colour(priv, back); + } + ++/* Notify about changes in the frame buffer */ ++void video_damage(struct udevice *vid, int x, int y, int width, int height) ++{ ++ struct video_priv *priv = dev_get_uclass_priv(vid); ++ int xend = x + width; ++ int yend = y + height; ++ ++ if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE)) ++ return; ++ ++ if (x > priv->xsize) ++ return; ++ ++ if (y > priv->ysize) ++ return; ++ ++ if (xend > priv->xsize) ++ xend = priv->xsize; ++ ++ if (yend > priv->ysize) ++ yend = priv->ysize; ++ ++ /* Span a rectangle across all old and new damage */ ++ priv->damage.xstart = min(x, priv->damage.xstart); ++ priv->damage.ystart = min(y, priv->damage.ystart); ++ priv->damage.xend = max(xend, priv->damage.xend); ++ priv->damage.yend = max(yend, priv->damage.yend); ++} ++ + /* Flush video activity to the caches */ + int video_sync(struct udevice *vid, bool force) + { ++ struct video_priv *priv = dev_get_uclass_priv(vid); + struct video_ops *ops = video_get_ops(vid); + int ret; + +@@ -369,15 +399,12 @@ int video_sync(struct udevice *vid, bool force) + * out whether it exists? For now, ARM is safe. + */ + #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +- struct video_priv *priv = dev_get_uclass_priv(vid); +- + if (priv->flush_dcache) { + flush_dcache_range((ulong)priv->fb, + ALIGN((ulong)priv->fb + priv->fb_size, + CONFIG_SYS_CACHELINE_SIZE)); + } + #elif defined(CONFIG_VIDEO_SANDBOX_SDL) +- struct video_priv *priv = dev_get_uclass_priv(vid); + static ulong last_sync; + + if (force || get_timer(last_sync) > 100) { +@@ -385,6 +412,14 @@ int video_sync(struct udevice *vid, bool force) + last_sync = get_timer(0); + } + #endif ++ ++ if (IS_ENABLED(CONFIG_VIDEO_DAMAGE)) { ++ priv->damage.xstart = priv->xsize; ++ priv->damage.ystart = priv->ysize; ++ priv->damage.xend = 0; ++ priv->damage.yend = 0; ++ } ++ + return 0; + } + +diff --git a/include/video.h b/include/video.h +index 66d109ca5da6..a522f33949e5 100644 +--- a/include/video.h ++++ b/include/video.h +@@ -85,6 +85,11 @@ enum video_format { + * @fb_size: Frame buffer size + * @copy_fb: Copy of the frame buffer to keep up to date; see struct + * video_uc_plat ++ * @damage: A bounding box of framebuffer regions updated since last sync ++ * @damage.xstart: X start position in pixels from the left ++ * @damage.ystart: Y start position in pixels from the top ++ * @damage.xend: X end position in pixels from the left ++ * @damage.xend: Y end position in pixels from the top + * @line_length: Length of each frame buffer line, in bytes. This can be + * set by the driver, but if not, the uclass will set it after + * probing +@@ -112,6 +117,12 @@ struct video_priv { + void *fb; + int fb_size; + void *copy_fb; ++ struct { ++ int xstart; ++ int ystart; ++ int xend; ++ int yend; ++ } damage; + int line_length; + u32 colour_fg; + u32 colour_bg; +@@ -254,8 +265,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, + * @return: 0 on success, error code otherwise + * + * Some frame buffers are cached or have a secondary frame buffer. This +- * function syncs these up so that the current contents of the U-Boot frame +- * buffer are displayed to the user. ++ * function syncs the damaged parts of them up so that the current contents ++ * of the U-Boot frame buffer are displayed to the user. It clears the damage ++ * buffer. + */ + int video_sync(struct udevice *vid, bool force); + +@@ -375,6 +387,22 @@ static inline int video_sync_copy_all(struct udevice *dev) + + #endif + ++/** ++ * video_damage() - Notify the video subsystem about screen updates. ++ * ++ * @vid: Device to sync ++ * @x: Upper left X coordinate of the damaged rectangle ++ * @y: Upper left Y coordinate of the damaged rectangle ++ * @width: Width of the damaged rectangle ++ * @height: Height of the damaged rectangle ++ * ++ * Some frame buffers are cached or have a secondary frame buffer. This ++ * function notifies the video subsystem about rectangles that were updated ++ * within the frame buffer. They may only get written to the screen on the ++ * next call to video_sync(). ++ */ ++void video_damage(struct udevice *vid, int x, int y, int width, int height); ++ + /** + * video_is_active() - Test if one video device it active + * + +From patchwork Mon Aug 21 13:51:02 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823648 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20221208 header.b=BdIntNrw; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4RTv6p6cj3z1yYZ + for ; Mon, 21 Aug 2023 23:52:18 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 8A59F87086; + Mon, 21 Aug 2023 15:51:40 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: phobos.denx.de; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.b="BdIntNrw"; + dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id 3C3FD867A0; Mon, 21 Aug 2023 15:51:39 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, + DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, + SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 +Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com + [IPv6:2a00:1450:4864:20::42c]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 546E686F0A + for ; Mon, 21 Aug 2023 15:51:35 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=alpernebiyasak@gmail.com +Received: by mail-wr1-x42c.google.com with SMTP id + ffacd0b85a97d-31c3df710bdso1066363f8f.1 + for ; Mon, 21 Aug 2023 06:51:35 -0700 (PDT) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=gmail.com; s=20221208; t=1692625895; x=1693230695; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:from:to:cc:subject:date + :message-id:reply-to; + bh=rfyiNp4RS7b8BQCxsUs1afKXNK4WMu1bUdXxDQXJn1U=; + b=BdIntNrw+JbVTri7AodJPuA4KoTwuid2ByavDMP+gEZwSfMkjrlWlFROWNdM4E2KeC + btsSXcPQO3jMnyoxVbS5g4DL2PkXPHNZO/Lw5Db4La4RGjoB4ks8w4G1nQ5kVo8NIXlQ + 7da1BVmm9tlV2cmt2LVuLp3WDWvgE5vJ9kVj8BH8fjD+gKc5wVOKtRIPJnqL8Eqj55A5 + y8xjVcW5ldxVps2jj0kE7Mq8LG2R6Bd37Zsw+Dq3Cj/1khMgLkYog8/Nf+k2uYXPQpjA + TS03XR6eJ7GQcRUf0iWft80hVZMVk6KF2AWuF04HcJ/goyNj4MGGFun0tanDYNImJzv0 + A/8A== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20221208; t=1692625895; x=1693230695; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc + :subject:date:message-id:reply-to; + bh=rfyiNp4RS7b8BQCxsUs1afKXNK4WMu1bUdXxDQXJn1U=; + b=N71LYmMnxX45xKNJxNk72goiD3Cf5e0f3znUaZ/B4Ue95/rqpwn6vLQvhNkxjyJjKz + QxOUGBKeP4pdGPJD2eVZgEA1+8cyBu3q0BssvtHzLuXCZtgGmVE+jhS1ZplzCePV5HDq + cpjabmm8tLydQpgXN42bXGeg5S7C2hbuWb9P1yFz0T2VRKDhKfnBacDMMyCM77q885Xq + scmyG9QS6JjzzhlNCx2LAvunQyb5Ub3Jeac6w62kdW5d82X5hQ7R5IuMhO6HB9cXSoIL + q4cciYJYPkkgJo7cJBCGs9hpoG7mAiYugMX3xvTX0AozIxV+I0RqRnIaeK4YPRctAqDa + B+ZQ== +X-Gm-Message-State: AOJu0Yzo17fP4SdOljTzWNaDUk2p0KMalzHe92zD3l/uyJxeFYnVtZ6Z + JKO6vwp7AEEfITHacMlSfDnu20sRQPA= +X-Google-Smtp-Source: + AGHT+IEaweUWG6MdegfaF+T8dg4D4mXuTL2UTLikuqRhtfAyLWNc6xApEfO0HHPUExbseBScRw20SA== +X-Received: by 2002:a5d:44d1:0:b0:313:f94f:3b15 with SMTP id + z17-20020a5d44d1000000b00313f94f3b15mr5140696wrr.2.1692625894567; + Mon, 21 Aug 2023 06:51:34 -0700 (PDT) +Received: from ALPER-PC.. ([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.32 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:34 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 05/13] dm: video: Add damage notification on display fills +Date: Mon, 21 Aug 2023 16:51:02 +0300 +Message-Id: <20230821135111.3558478-6-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Let's report the video damage when we fill parts of the screen. This +way we can later lazily flush only relevant regions to hardware. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +[Alper: Call video_damage() in video_fill_part(), edit commit message] +Signed-off-by: Alper Nebi Yasak +--- +Does video_fill_part() need a video_sync(dev, false) here? + +Changes in v5: +- Call video_damage() also in video_fill_part() + + drivers/video/video-uclass.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index 447689581668..ebf409d839f0 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -203,6 +203,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, + if (ret) + return ret; + ++ video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); ++ + return 0; + } + +@@ -249,6 +251,8 @@ int video_fill(struct udevice *dev, u32 colour) + if (ret) + return ret; + ++ video_damage(dev, 0, 0, priv->xsize, priv->ysize); ++ + return video_sync(dev, false); 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.35 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:36 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 06/13] vidconsole: Add damage notifications to all + vidconsole drivers +Date: Mon, 21 Aug 2023 16:51:03 +0300 +Message-Id: <20230821135111.3558478-7-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Now that we have a damage tracking API, let's populate damage done by +vidconsole drivers. We try to declare as little memory as damaged as +possible. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +[Alper: Rebase for met->baseline, fontdata->height/width, make rotated + console_putc_xy() damages pass tests, edit patch message] +Co-developed-by: Alper Nebi Yasak +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Use met->baseline instead of priv->baseline +- Use fontdata->height/width instead of VIDEO_FONT_HEIGHT/WIDTH +- Update console_rotate.c video_damage() calls to pass video tests +- Remove mention about not having minimal damage for console_rotate.c + +Changes in v2: +- Fix ranges in truetype target +- Limit rotate to necessary damage + + drivers/video/console_normal.c | 18 +++++++++++ + drivers/video/console_rotate.c | 54 ++++++++++++++++++++++++++++++++ + drivers/video/console_truetype.c | 21 +++++++++++++ + drivers/video/video-uclass.c | 1 + + 4 files changed, 94 insertions(+) + +diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c +index 413c7abee9e1..a19ce6a2bc11 100644 +--- a/drivers/video/console_normal.c ++++ b/drivers/video/console_normal.c +@@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ 0, ++ fontdata->height * row, ++ vid_priv->xsize, ++ fontdata->height); ++ + return 0; + } + +@@ -60,6 +66,12 @@ static int console_move_rows(struct udevice *dev, uint rowdst, + if (ret) + return ret; + ++ video_damage(dev->parent, ++ 0, ++ fontdata->height * rowdst, ++ vid_priv->xsize, ++ fontdata->height * count); ++ + return 0; + } + +@@ -90,6 +102,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ x, ++ y, ++ fontdata->width, ++ fontdata->height); ++ + ret = vidconsole_sync_copy(dev, start, line); + if (ret) + return ret; +diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c +index 65358a1c6e74..6c3e7c1bb8dc 100644 +--- a/drivers/video/console_rotate.c ++++ b/drivers/video/console_rotate.c +@@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ vid_priv->xsize - ((row + 1) * fontdata->height), ++ 0, ++ fontdata->height, ++ vid_priv->ysize); ++ + return 0; + } + +@@ -64,6 +70,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, + dst += vid_priv->line_length; + } + ++ video_damage(dev->parent, ++ vid_priv->xsize - ((rowdst + count) * fontdata->height), ++ 0, ++ count * fontdata->height, ++ vid_priv->ysize); ++ + return 0; + } + +@@ -96,6 +108,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ vid_priv->xsize - y - fontdata->height, ++ linenum - 1, ++ fontdata->height, ++ fontdata->width); ++ + return VID_TO_POS(fontdata->width); + } + +@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ 0, ++ vid_priv->ysize - (row + 1) * fontdata->height, ++ vid_priv->xsize, ++ fontdata->height); ++ + return 0; + } + +@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, + vidconsole_memmove(dev, dst, src, + fontdata->height * vid_priv->line_length * count); + ++ video_damage(dev->parent, ++ 0, ++ vid_priv->ysize - (rowdst + count) * fontdata->height, ++ vid_priv->xsize, ++ count * fontdata->height); ++ + return 0; + } + +@@ -174,6 +204,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ x - fontdata->width + 1, ++ linenum - fontdata->height + 1, ++ fontdata->width, ++ fontdata->height); ++ + return VID_TO_POS(fontdata->width); + } + +@@ -198,6 +234,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ row * fontdata->height, ++ 0, ++ fontdata->height, ++ vid_priv->ysize); ++ + return 0; + } + +@@ -224,6 +266,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, + dst += vid_priv->line_length; + } + ++ video_damage(dev->parent, ++ rowdst * fontdata->height, ++ 0, ++ count * fontdata->height, ++ vid_priv->ysize); ++ + return 0; + } + +@@ -255,6 +303,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ y, ++ linenum - fontdata->width + 1, ++ fontdata->height, ++ fontdata->width); ++ + return VID_TO_POS(fontdata->width); + } + +diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c +index 0f9bb49e44f7..0adbf9cc3d67 100644 +--- a/drivers/video/console_truetype.c ++++ b/drivers/video/console_truetype.c +@@ -178,6 +178,7 @@ struct console_tt_priv { + static int console_truetype_set_row(struct udevice *dev, uint row, int clr) + { + struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); ++ struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); + struct console_tt_priv *priv = dev_get_priv(dev); + struct console_tt_metrics *met = priv->cur_met; + void *end, *line; +@@ -221,6 +222,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) + if (ret) + return ret; + ++ video_damage(dev->parent, ++ 0, ++ vc_priv->y_charsize * row, ++ vid_priv->xsize, ++ vc_priv->y_charsize); ++ + return 0; + } + +@@ -228,6 +235,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, + uint rowsrc, uint count) + { + struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); ++ struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); + struct console_tt_priv *priv = dev_get_priv(dev); + struct console_tt_metrics *met = priv->cur_met; + void *dst; +@@ -246,6 +254,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, + for (i = 0; i < priv->pos_ptr; i++) + priv->pos[i].ypos -= diff; + ++ video_damage(dev->parent, ++ 0, ++ vc_priv->y_charsize * rowdst, ++ vid_priv->xsize, ++ vc_priv->y_charsize * count); ++ + return 0; + } + +@@ -403,6 +417,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, + + line += vid_priv->line_length; + } ++ ++ video_damage(dev->parent, ++ VID_TO_PIXEL(x) + xoff, ++ y + met->baseline + yoff, ++ width, ++ height); ++ + ret = vidconsole_sync_copy(dev, start, line); + if (ret) + return ret; +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index ebf409d839f0..8bfcbc88dda7 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -199,6 +199,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, + } + line += priv->line_length; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.37 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:39 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 07/13] video: test: Test video damage tracking via + vidconsole +Date: Mon, 21 Aug 2023 16:51:04 +0300 +Message-Id: <20230821135111.3558478-8-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +With VIDEO_DAMAGE, the video uclass tracks updated regions of the frame +buffer in order to avoid unnecessary work during a video sync. Enable +the config in sandbox and add a test for it, by printing strings at a +few locations and checking the tracked region. + +Signed-off-by: Alper Nebi Yasak +--- +This is hard to test because most things issue video syncs that process +and reset the damaged region. + +Changes in v5: +- Add patch "video: test: Test video damage tracking via vidconsole" + + configs/sandbox_defconfig | 1 + + test/dm/video.c | 56 +++++++++++++++++++++++++++++++++++++++ + 2 files changed, 57 insertions(+) + +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index 259f31f26cee..51b820f13121 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -307,6 +307,7 @@ CONFIG_USB_ETH_CDC=y + CONFIG_VIDEO=y + CONFIG_VIDEO_FONT_SUN12X22=y + CONFIG_VIDEO_COPY=y ++CONFIG_VIDEO_DAMAGE=y + CONFIG_CONSOLE_ROTATION=y + CONFIG_CONSOLE_TRUETYPE=y + CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y +diff --git a/test/dm/video.c b/test/dm/video.c +index e4bd27a6b76f..8c7d9800a42e 100644 +--- a/test/dm/video.c ++++ b/test/dm/video.c +@@ -711,3 +711,59 @@ static int dm_test_video_copy(struct unit_test_state *uts) + return 0; + } + DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); ++ ++/* Test video damage tracking */ ++static int dm_test_video_damage(struct unit_test_state *uts) ++{ ++ struct sandbox_sdl_plat *plat; ++ struct udevice *dev, *con; ++ struct video_priv *priv; ++ const char *test_string_1 = "Criticism may not be agreeable, "; ++ const char *test_string_2 = "but it is necessary."; ++ const char *test_string_3 = "It fulfils the same function as pain in the human body."; ++ ++ if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE)) ++ return -EAGAIN; ++ ++ ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev)); ++ ut_assert(!device_active(dev)); ++ plat = dev_get_plat(dev); ++ plat->font_size = 32; ++ ++ ut_assertok(video_get_nologo(uts, &dev)); ++ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ++ priv = dev_get_uclass_priv(dev); ++ ++ vidconsole_position_cursor(con, 14, 10); ++ vidconsole_put_string(con, test_string_2); ++ ut_asserteq(449, priv->damage.xstart); ++ ut_asserteq(325, priv->damage.ystart); ++ ut_asserteq(661, priv->damage.xend); ++ ut_asserteq(350, priv->damage.yend); ++ ++ vidconsole_position_cursor(con, 7, 5); ++ vidconsole_put_string(con, test_string_1); ++ ut_asserteq(225, priv->damage.xstart); ++ ut_asserteq(164, priv->damage.ystart); ++ ut_asserteq(661, priv->damage.xend); ++ ut_asserteq(350, priv->damage.yend); ++ ++ vidconsole_position_cursor(con, 21, 15); ++ vidconsole_put_string(con, test_string_3); ++ ut_asserteq(225, priv->damage.xstart); ++ ut_asserteq(164, priv->damage.ystart); ++ ut_asserteq(1280, priv->damage.xend); ++ ut_asserteq(510, priv->damage.yend); ++ ++ video_sync(dev, false); ++ ut_asserteq(priv->xsize, priv->damage.xstart); ++ ut_asserteq(priv->ysize, priv->damage.ystart); ++ ut_asserteq(0, priv->damage.xend); ++ ut_asserteq(0, priv->damage.yend); ++ ++ ut_asserteq(7339, compress_frame_buffer(uts, dev, false)); ++ ut_assertok(check_copy_frame_buffer(uts, dev)); ++ ++ return 0; ++} ++DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.40 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:41 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 08/13] video: Add damage notification on bmp display +Date: Mon, 21 Aug 2023 16:51:05 +0300 +Message-Id: <20230821135111.3558478-9-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Let's report the video damage when we draw a bitmap on the screen. This +way we can later lazily flush only relevant regions to hardware. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +Reviewed-by: Simon Glass +Signed-off-by: Alper Nebi Yasak +--- + +(no changes since v1) + + drivers/video/video_bmp.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c +index 45f003c8251a..10943b9ca19f 100644 +--- a/drivers/video/video_bmp.c ++++ b/drivers/video/video_bmp.c +@@ -460,6 +460,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + break; + }; + ++ video_damage(dev, x, y, width, height); ++ + /* Find the position of the top left of the image in the framebuffer */ + fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); + ret = video_sync_copy(dev, start, fb); + +From patchwork Mon Aug 21 13:51:06 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823652 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.42 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:44 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 09/13] efi_loader: GOP: Add damage notification on BLT +Date: Mon, 21 Aug 2023 16:51:06 +0300 +Message-Id: <20230821135111.3558478-10-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Now that we have a damage tracking API, let's populate damage done by +UEFI payloads when they BLT data onto the screen. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +Reviewed-by: Heinrich Schuchardt +[Alper: Add struct comment for new member] +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Document new vdev field in struct efi_gop_obj comment + +Changes in v4: +- Skip damage on EfiBltVideoToBltBuffer + +Changes in v3: +- Adapt to always assume DM is used + +Changes in v2: +- Remove ifdefs from gop + + lib/efi_loader/efi_gop.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c +index 778b693f983a..db6535e080c4 100644 +--- a/lib/efi_loader/efi_gop.c ++++ b/lib/efi_loader/efi_gop.c +@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; + * @ops: graphical output protocol interface + * @info: graphical output mode information + * @mode: graphical output mode ++ * @vdev: backing video device + * @bpix: bits per pixel + * @fb: frame buffer + */ +@@ -32,6 +33,7 @@ struct efi_gop_obj { + struct efi_gop ops; + struct efi_gop_mode_info info; + struct efi_gop_mode mode; ++ struct udevice *vdev; + /* Fields we only have access to during init */ + u32 bpix; + void *fb; +@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, + u32 *fb32 = gopobj->fb; + u16 *fb16 = gopobj->fb; + struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4); ++ bool blt_to_video = (operation != EFI_BLT_VIDEO_TO_BLT_BUFFER); + + if (delta) { + /* Check for 4 byte alignment */ +@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, + dlineoff += dwidth; + } + ++ if (blt_to_video) ++ video_damage(gopobj->vdev, dx, dy, width, height); ++ + return EFI_SUCCESS; + } + +@@ -548,6 +554,7 @@ efi_status_t efi_gop_register(void) + gopobj->info.pixels_per_scanline = col; + gopobj->bpix = bpix; + gopobj->fb = fb; ++ gopobj->vdev = vdev; + + return EFI_SUCCESS; + } + +From patchwork Mon Aug 21 13:51:07 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823653 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20221208 header.b=SJ3CoTwS; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4RTv7l6Gwbz1yYZ + for ; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.45 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:46 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 10/13] video: Only dcache flush damaged lines +Date: Mon, 21 Aug 2023 16:51:07 +0300 +Message-Id: <20230821135111.3558478-11-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Now that we have a damage area tells us which parts of the frame buffer +actually need updating, let's only dcache flush those on video_sync() +calls. With this optimization in place, frame buffer updates - especially +on large screen such as 4k displays - speed up significantly. + +Signed-off-by: Alexander Graf +Reported-by: Da Xue +[Alper: Use damage.xstart/yend, IS_ENABLED()] +Co-developed-by: Alper Nebi Yasak +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Use xstart, ystart, xend, yend as names for damage region +- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() + +Changes in v2: +- Fix dcache range; we were flushing too much before +- Remove ifdefs + + drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++----- + 1 file changed, 36 insertions(+), 5 deletions(-) + +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index 8bfcbc88dda7..a50220bcc684 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -385,6 +385,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) + priv->damage.yend = max(yend, priv->damage.yend); + } + ++#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) ++static void video_flush_dcache(struct udevice *vid) ++{ ++ struct video_priv *priv = dev_get_uclass_priv(vid); ++ ++ if (!priv->flush_dcache) ++ return; ++ ++ if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE)) { ++ flush_dcache_range((ulong)priv->fb, ++ ALIGN((ulong)priv->fb + priv->fb_size, ++ CONFIG_SYS_CACHELINE_SIZE)); ++ ++ return; ++ } ++ ++ if (priv->damage.xend && priv->damage.yend) { ++ int lstart = priv->damage.xstart * VNBYTES(priv->bpix); ++ int lend = priv->damage.xend * VNBYTES(priv->bpix); ++ int y; ++ ++ for (y = priv->damage.ystart; y < priv->damage.yend; y++) { ++ ulong fb = (ulong)priv->fb; ++ ulong start = fb + (y * priv->line_length) + lstart; ++ ulong end = start + lend - lstart; ++ ++ start = ALIGN_DOWN(start, CONFIG_SYS_CACHELINE_SIZE); ++ end = ALIGN(end, CONFIG_SYS_CACHELINE_SIZE); ++ ++ flush_dcache_range(start, end); ++ } ++ } ++} ++#endif ++ + /* Flush video activity to the caches */ + int video_sync(struct udevice *vid, bool force) + { +@@ -404,11 +439,7 @@ int video_sync(struct udevice *vid, bool force) + * out whether it exists? For now, ARM is safe. + */ + #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +- if (priv->flush_dcache) { +- flush_dcache_range((ulong)priv->fb, +- ALIGN((ulong)priv->fb + priv->fb_size, +- CONFIG_SYS_CACHELINE_SIZE)); +- } ++ video_flush_dcache(vid); + #elif defined(CONFIG_VIDEO_SANDBOX_SDL) + static ulong last_sync; + + +From patchwork Mon Aug 21 13:51:08 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823654 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20221208 header.b=JgtEabWc; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4RTv7w4Mskz1yYZ + for ; Mon, 21 Aug 2023 23:53:16 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 4790487096; + Mon, 21 Aug 2023 15:51:54 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: phobos.denx.de; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.b="JgtEabWc"; + dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id 102DC87096; Mon, 21 Aug 2023 15:51:54 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, + DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, + SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 +Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com + [IPv6:2a00:1450:4864:20::429]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 4AFE187098 + for ; Mon, 21 Aug 2023 15:51:50 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=alpernebiyasak@gmail.com +Received: by mail-wr1-x429.google.com with SMTP id + ffacd0b85a97d-31c3726cc45so1247414f8f.0 + for ; Mon, 21 Aug 2023 06:51:50 -0700 (PDT) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=gmail.com; s=20221208; t=1692625910; x=1693230710; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:from:to:cc:subject:date + :message-id:reply-to; + bh=NdoZCMaizC3Y759MOjDBPu1VoZ+fIm/Lqzoh+gR4stQ=; + b=JgtEabWcIca2ALjUCCqGgXmUf5MREa+Jm3Yt8fmf6mwr8MrhP5Iu7KssN+MMQbAxKO + cl+LarTpXoK8lh4x2WmdcUKViUJdCAMCFJCk6vdMhIFAjaBH1Sqhudg315eFGharTw6G + 7FFSDdE1ZAablttQmfgcm59Ilk5+2QRAFycWcOiue5yFfF8RSAAAF8UHkl7rKxgQKHCO + NWC3P4PdjYEtaQFoJ4R5txJ07Wdvoptc9JVL9WGf4wSL5X6fm+SbalQaW3YgFuKNy0fk + 0+lmUOMDOXmwx4iGWZd6+LRFXYEZGCZ95AvjoDF83ZlL9Nu1oUvB/qzH7PRJatx6j/mw + J8Zw== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20221208; t=1692625910; x=1693230710; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc + :subject:date:message-id:reply-to; + bh=NdoZCMaizC3Y759MOjDBPu1VoZ+fIm/Lqzoh+gR4stQ=; + b=ATA2PnRfDc2gQVzxEqGIcgBsTvJvkOPNl2NSZEoxqmZfEe/94an/QM50JhcxX0wNEA + 0HpCsEsyDLhFnjW4APp/TYwLoc0mbRD/T517DYROiuJLUSRxyO/NApA1qyRJpVQTqpRc + dRZ5hG5VoUH3oHfwZN1abRKxbIogLNiJhSSNDvjA01RYJwTZY6Fq8xUJCYp9gI28/OI0 + oZ0SA+qdXZ4UvNR/uqun2tysI+JnatTKlbwSfCF7q/sj5AfH/VNk3EqNROuXlIBRMWI8 + pgosvMd73/GvTMQvsWPgGNNc3fhZgcnLKIoQFKdoqCeSFAufSLREsoWPLMMH1xXuh1lG + JKFQ== +X-Gm-Message-State: AOJu0YyKi/tYIN4uVjau5AbbNkJPzybGF79aUx+ls+uiyxVTGeu0zy64 + aMCSasGPaxyg+ogYkqU0Dx/1q3mIbnM= +X-Google-Smtp-Source: + AGHT+IHsb00O74X0NrGSp+Znx7MktY8oHr2PL7yyjJMmEkZVU5lzx7Wg/Yr0hFddlw1zsptntp6etA== +X-Received: by 2002:a05:6000:1cce:b0:314:ca7:f30b with SMTP id + bf14-20020a0560001cce00b003140ca7f30bmr5251008wrb.54.1692625909678; + Mon, 21 Aug 2023 06:51:49 -0700 (PDT) +Received: from ALPER-PC.. ([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.47 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:49 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY +Date: Mon, 21 Aug 2023 16:51:08 +0300 +Message-Id: <20230821135111.3558478-12-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we +print a single character, it will always copy the full range of bytes +from the top left corner of the character to the lower right onto the +uncached frame buffer. This includes pretty much the full line contents +of the printed character. + +Since we now have proper damage tracking, let's make use of that to reduce +the amount of data we need to copy. With this patch applied, we will only +copy the tiny rectangle surrounding characters when we print them, +speeding up the video console. + +After this, changes to the main frame buffer are not immediately copied +to the copy frame buffer, but postponed until the next video device +sync. So issue an explicit sync before inspecting the copy frame buffer +contents for the video tests. + +Signed-off-by: Alexander Graf +[Alper: Rebase for fontdata->height/w, fill_part(), fix memmove(dev), + drop from defconfig, use damage.xstart/yend, use IS_ENABLED(), + call video_sync() before copy_fb check, update video_copy test] +Co-developed-by: Alper Nebi Yasak +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Remove video_sync_copy() also from video_fill(), video_fill_part() +- Fix memmove() calls by removing the extra dev argument +- Call video_sync() before checking copy_fb in video tests +- Use xstart, ystart, xend, yend as names for damage region +- Use met->baseline instead of priv->baseline +- Use fontdata->height/width instead of VIDEO_FONT_HEIGHT/WIDTH +- Use xstart, ystart, xend, yend as names for damage region +- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() +- Drop VIDEO_DAMAGE from sandbox defconfig added in a new patch +- Update dm_test_video_copy test added in a new patch + +Changes in v3: +- Make VIDEO_COPY always select VIDEO_DAMAGE + +Changes in v2: +- Add patch "video: Use VIDEO_DAMAGE for VIDEO_COPY" + + configs/sandbox_defconfig | 1 - + drivers/video/Kconfig | 5 ++ + drivers/video/console_normal.c | 13 +---- + drivers/video/console_rotate.c | 44 +++----------- + drivers/video/console_truetype.c | 16 +---- + drivers/video/vidconsole-uclass.c | 16 ----- + drivers/video/video-uclass.c | 97 ++++++++----------------------- + drivers/video/video_bmp.c | 7 --- + include/video.h | 37 ------------ + include/video_console.h | 52 ----------------- + test/dm/video.c | 3 +- + 11 files changed, 43 insertions(+), 248 deletions(-) + +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index 51b820f13121..259f31f26cee 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -307,7 +307,6 @@ CONFIG_USB_ETH_CDC=y + CONFIG_VIDEO=y + CONFIG_VIDEO_FONT_SUN12X22=y + CONFIG_VIDEO_COPY=y +-CONFIG_VIDEO_DAMAGE=y + CONFIG_CONSOLE_ROTATION=y + CONFIG_CONSOLE_TRUETYPE=y + CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y +diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig +index 97f494a1340b..b3fbd9d7d9ca 100644 +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE + + config VIDEO_COPY + bool "Enable copying the frame buffer to a hardware copy" ++ select VIDEO_DAMAGE + help + On some machines (e.g. x86), reading from the frame buffer is very + slow because it is uncached. To improve performance, this feature + allows the frame buffer to be kept in cached memory (allocated by + U-Boot) and then copied to the hardware frame-buffer as needed. ++ It uses the VIDEO_DAMAGE feature to keep track of regions to copy ++ and will only copy actually touched regions. + + To use this, your video driver must set @copy_base in + struct video_uc_plat. +@@ -105,6 +108,8 @@ config VIDEO_DAMAGE + regions of the frame buffer that were modified before, speeding up + screen refreshes significantly. + ++ It is also used by VIDEO_COPY to identify which regions changed. ++ + config BACKLIGHT_PWM + bool "Generic PWM based Backlight Driver" + depends on BACKLIGHT && DM_PWM +diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c +index a19ce6a2bc11..c44aa09473a3 100644 +--- a/drivers/video/console_normal.c ++++ b/drivers/video/console_normal.c +@@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) + fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); + end = dst; + +- ret = vidconsole_sync_copy(dev, line, end); +- if (ret) +- return ret; +- + video_damage(dev->parent, + 0, + fontdata->height * row, +@@ -57,14 +53,11 @@ static int console_move_rows(struct udevice *dev, uint rowdst, + void *dst; + void *src; + int size; +- int ret; + + dst = vid_priv->fb + rowdst * fontdata->height * vid_priv->line_length; + src = vid_priv->fb + rowsrc * fontdata->height * vid_priv->line_length; + size = fontdata->height * vid_priv->line_length * count; +- ret = vidconsole_memmove(dev, dst, src, size); +- if (ret) +- return ret; ++ memmove(dst, src, size); + + video_damage(dev->parent, + 0, +@@ -108,10 +101,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch) + fontdata->width, + fontdata->height); + +- ret = vidconsole_sync_copy(dev, start, line); +- if (ret) +- return ret; +- + return VID_TO_POS(fontdata->width); + } + +diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c +index 6c3e7c1bb8dc..6e9067d1c7fb 100644 +--- a/drivers/video/console_rotate.c ++++ b/drivers/video/console_rotate.c +@@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) + int pbytes = VNBYTES(vid_priv->bpix); + void *start, *dst, *line; + int i, j; +- int ret; + + start = vid_priv->fb + vid_priv->line_length - + (row + 1) * fontdata->height * pbytes; +@@ -32,9 +31,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) + fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); + line += vid_priv->line_length; + } +- ret = vidconsole_sync_copy(dev, start, line); +- if (ret) +- return ret; + + video_damage(dev->parent, + vid_priv->xsize - ((row + 1) * fontdata->height), +@@ -54,7 +50,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, + int pbytes = VNBYTES(vid_priv->bpix); + void *dst; + void *src; +- int j, ret; ++ int j; + + dst = vid_priv->fb + vid_priv->line_length - + (rowdst + count) * fontdata->height * pbytes; +@@ -62,10 +58,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, + (rowsrc + count) * fontdata->height * pbytes; + + for (j = 0; j < vid_priv->ysize; j++) { +- ret = vidconsole_memmove(dev, dst, src, +- fontdata->height * pbytes * count); +- if (ret) +- return ret; ++ memmove(dst, src, fontdata->height * pbytes * count); + src += vid_priv->line_length; + dst += vid_priv->line_length; + } +@@ -104,10 +97,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) + return ret; + + /* We draw backwards from 'start, so account for the first line */ +- ret = vidconsole_sync_copy(dev, start - vid_priv->line_length, line); +- if (ret) +- return ret; +- + video_damage(dev->parent, + vid_priv->xsize - y - fontdata->height, + linenum - 1, +@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) + struct video_fontdata *fontdata = priv->fontdata; + void *start, *line, *dst, *end; + int pixels = fontdata->height * vid_priv->xsize; +- int i, ret; ++ int i; + int pbytes = VNBYTES(vid_priv->bpix); + + start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length - +@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) + for (i = 0; i < pixels; i++) + fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); + end = dst; +- ret = vidconsole_sync_copy(dev, start, end); +- if (ret) +- return ret; + + video_damage(dev->parent, + 0, +@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, + vid_priv->line_length; + src = end - (rowsrc + count) * fontdata->height * + vid_priv->line_length; +- vidconsole_memmove(dev, dst, src, +- fontdata->height * vid_priv->line_length * count); ++ memmove(dst, src, fontdata->height * vid_priv->line_length * count); + + video_damage(dev->parent, + 0, +@@ -199,11 +184,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) + if (ret) + return ret; + +- /* Add 4 bytes to allow for the first pixel writen */ +- ret = vidconsole_sync_copy(dev, start + 4, line); +- if (ret) +- return ret; +- + video_damage(dev->parent, + x - fontdata->width + 1, + linenum - fontdata->height + 1, +@@ -220,7 +200,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) + struct video_fontdata *fontdata = priv->fontdata; + int pbytes = VNBYTES(vid_priv->bpix); + void *start, *dst, *line; +- int i, j, ret; ++ int i, j; + + start = vid_priv->fb + row * fontdata->height * pbytes; + line = start; +@@ -230,9 +210,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) + fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); + line += vid_priv->line_length; + } +- ret = vidconsole_sync_copy(dev, start, line); +- if (ret) +- return ret; + + video_damage(dev->parent, + row * fontdata->height, +@@ -252,16 +229,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, + int pbytes = VNBYTES(vid_priv->bpix); + void *dst; + void *src; +- int j, ret; ++ int j; + + dst = vid_priv->fb + rowdst * fontdata->height * pbytes; + src = vid_priv->fb + rowsrc * fontdata->height * pbytes; + + for (j = 0; j < vid_priv->ysize; j++) { +- ret = vidconsole_memmove(dev, dst, src, +- fontdata->height * pbytes * count); +- if (ret) +- return ret; ++ memmove(dst, src, fontdata->height * pbytes * count); + src += vid_priv->line_length; + dst += vid_priv->line_length; + } +@@ -296,10 +270,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch) + line = start; + + ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); +- if (ret) +- return ret; +- /* Add a line to allow for the first pixels writen */ +- ret = vidconsole_sync_copy(dev, start + vid_priv->line_length, line); + if (ret) + return ret; + +diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c +index 0adbf9cc3d67..07bb0af71311 100644 +--- a/drivers/video/console_truetype.c ++++ b/drivers/video/console_truetype.c +@@ -182,7 +182,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) + struct console_tt_priv *priv = dev_get_priv(dev); + struct console_tt_metrics *met = priv->cur_met; + void *end, *line; +- int ret; + + line = vid_priv->fb + row * met->font_size * vid_priv->line_length; + end = line + met->font_size * vid_priv->line_length; +@@ -218,9 +217,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) + default: + return -ENOSYS; + } +- ret = vidconsole_sync_copy(dev, line, end); +- if (ret) +- return ret; + + video_damage(dev->parent, + 0, +@@ -240,14 +236,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, + struct console_tt_metrics *met = priv->cur_met; + void *dst; + void *src; +- int i, diff, ret; ++ int i, diff; + + dst = vid_priv->fb + rowdst * met->font_size * vid_priv->line_length; + src = vid_priv->fb + rowsrc * met->font_size * vid_priv->line_length; +- ret = vidconsole_memmove(dev, dst, src, met->font_size * +- vid_priv->line_length * count); +- if (ret) +- return ret; ++ memmove(dst, src, met->font_size * vid_priv->line_length * count); + + /* Scroll up our position history */ + diff = (rowsrc - rowdst) * met->font_size; +@@ -280,7 +273,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, + u8 *bits, *data; + int advance; + void *start, *end, *line; +- int row, ret; ++ int row; + + /* First get some basic metrics about this character */ + stbtt_GetCodepointHMetrics(font, ch, &advance, &lsb); +@@ -424,9 +417,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, + width, + height); + +- ret = vidconsole_sync_copy(dev, start, line); +- if (ret) +- return ret; + free(data); + + return width_frac; +diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c +index 05f930478096..27a1e8ec3e49 100644 +--- a/drivers/video/vidconsole-uclass.c ++++ b/drivers/video/vidconsole-uclass.c +@@ -682,22 +682,6 @@ UCLASS_DRIVER(vidconsole) = { + .per_device_auto = sizeof(struct vidconsole_priv), + }; + +-#ifdef CONFIG_VIDEO_COPY +-int vidconsole_sync_copy(struct udevice *dev, void *from, void *to) +-{ +- struct udevice *vid = dev_get_parent(dev); +- +- return video_sync_copy(vid, from, to); +-} +- +-int vidconsole_memmove(struct udevice *dev, void *dst, const void *src, +- int size) +-{ +- memmove(dst, src, size); +- return vidconsole_sync_copy(dev, dst, dst + size); +-} +-#endif +- + int vidconsole_clear_and_reset(struct udevice *dev) + { + int ret; +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index a50220bcc684..c79499252a22 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -160,7 +160,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, + struct video_priv *priv = dev_get_uclass_priv(dev); + void *start, *line; + int pixels = xend - xstart; +- int row, i, ret; ++ int row, i; + + start = priv->fb + ystart * priv->line_length; + start += xstart * VNBYTES(priv->bpix); +@@ -200,10 +200,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, + line += priv->line_length; + } + +- ret = video_sync_copy(dev, start, line); +- if (ret) +- return ret; +- + video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); + + return 0; +@@ -223,7 +219,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) + int video_fill(struct udevice *dev, u32 colour) + { + struct video_priv *priv = dev_get_uclass_priv(dev); +- int ret; + + switch (priv->bpix) { + case VIDEO_BPP16: +@@ -248,9 +243,6 @@ int video_fill(struct udevice *dev, u32 colour) + memset(priv->fb, colour, priv->fb_size); + break; + } +- ret = video_sync_copy(dev, priv->fb, priv->fb + priv->fb_size); +- if (ret) +- return ret; + + video_damage(dev, 0, 0, priv->xsize, priv->ysize); + +@@ -420,6 +412,27 @@ static void video_flush_dcache(struct udevice *vid) + } + #endif + ++static void video_flush_copy(struct udevice *vid) ++{ ++ struct video_priv *priv = dev_get_uclass_priv(vid); ++ ++ if (!priv->copy_fb) ++ return; ++ ++ if (priv->damage.xend && priv->damage.yend) { ++ int lstart = priv->damage.xstart * VNBYTES(priv->bpix); ++ int lend = priv->damage.xend * VNBYTES(priv->bpix); ++ int y; ++ ++ for (y = priv->damage.ystart; y < priv->damage.yend; y++) { ++ ulong offset = (y * priv->line_length) + lstart; ++ ulong len = lend - lstart; ++ ++ memcpy(priv->copy_fb + offset, priv->fb + offset, len); ++ } ++ } ++} ++ + /* Flush video activity to the caches */ + int video_sync(struct udevice *vid, bool force) + { +@@ -427,6 +440,9 @@ int video_sync(struct udevice *vid, bool force) + struct video_ops *ops = video_get_ops(vid); + int ret; + ++ if (IS_ENABLED(CONFIG_VIDEO_COPY)) ++ video_flush_copy(vid); ++ + if (ops && ops->video_sync) { + ret = ops->video_sync(vid); + if (ret) +@@ -503,69 +519,6 @@ int video_get_ysize(struct udevice *dev) + return priv->ysize; + } + +-#ifdef CONFIG_VIDEO_COPY +-int video_sync_copy(struct udevice *dev, void *from, void *to) +-{ +- struct video_priv *priv = dev_get_uclass_priv(dev); +- +- if (priv->copy_fb) { +- long offset, size; +- +- /* Find the offset of the first byte to copy */ +- if ((ulong)to > (ulong)from) { +- size = to - from; +- offset = from - priv->fb; +- } else { +- size = from - to; +- offset = to - priv->fb; +- } +- +- /* +- * Allow a bit of leeway for valid requests somewhere near the +- * frame buffer +- */ +- if (offset < -priv->fb_size || offset > 2 * priv->fb_size) { +-#ifdef DEBUG +- char str[120]; +- +- snprintf(str, sizeof(str), +- "[** FAULT sync_copy fb=%p, from=%p, to=%p, offset=%lx]", +- priv->fb, from, to, offset); +- console_puts_select_stderr(true, str); +-#endif +- return -EFAULT; +- } +- +- /* +- * Silently crop the memcpy. This allows callers to avoid doing +- * this themselves. It is common for the end pointer to go a +- * few lines after the end of the frame buffer, since most of +- * the update algorithms terminate a line after their last write +- */ +- if (offset + size > priv->fb_size) { +- size = priv->fb_size - offset; +- } else if (offset < 0) { +- size += offset; +- offset = 0; +- } +- +- memcpy(priv->copy_fb + offset, priv->fb + offset, size); +- } +- +- return 0; +-} +- +-int video_sync_copy_all(struct udevice *dev) +-{ +- struct video_priv *priv = dev_get_uclass_priv(dev); +- +- video_sync_copy(dev, priv->fb, priv->fb + priv->fb_size); +- +- return 0; +-} +- +-#endif +- + #define SPLASH_DECL(_name) \ + extern u8 __splash_ ## _name ## _begin[]; \ + extern u8 __splash_ ## _name ## _end[] +diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c +index 10943b9ca19f..da2bbe864a03 100644 +--- a/drivers/video/video_bmp.c ++++ b/drivers/video/video_bmp.c +@@ -268,7 +268,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + enum video_format eformat; + struct bmp_color_table_entry *palette; + int hdr_size; +- int ret; + + if (!bmp || !(bmp->header.signature[0] == 'B' && + bmp->header.signature[1] == 'M')) { +@@ -462,11 +461,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + + video_damage(dev, x, y, width, height); + +- /* Find the position of the top left of the image in the framebuffer */ +- fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); +- ret = video_sync_copy(dev, start, fb); +- if (ret) +- return log_ret(ret); +- + return video_sync(dev, false); + } +diff --git a/include/video.h b/include/video.h +index a522f33949e5..42e57b44188d 100644 +--- a/include/video.h ++++ b/include/video.h +@@ -350,43 +350,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); + */ + int video_default_font_height(struct udevice *dev); + +-#ifdef CONFIG_VIDEO_COPY +-/** +- * vidconsole_sync_copy() - Sync back to the copy framebuffer +- * +- * This ensures that the copy framebuffer has the same data as the framebuffer +- * for a particular region. It should be called after the framebuffer is updated +- * +- * @from and @to can be in either order. The region between them is synced. +- * +- * @dev: Vidconsole device being updated +- * @from: Start/end address within the framebuffer (->fb) +- * @to: Other address within the frame buffer +- * Return: 0 if OK, -EFAULT if the start address is before the start of the +- * frame buffer start +- */ +-int video_sync_copy(struct udevice *dev, void *from, void *to); +- +-/** +- * video_sync_copy_all() - Sync the entire framebuffer to the copy +- * +- * @dev: Vidconsole device being updated +- * Return: 0 (always) +- */ +-int video_sync_copy_all(struct udevice *dev); +-#else +-static inline int video_sync_copy(struct udevice *dev, void *from, void *to) +-{ +- return 0; +-} +- +-static inline int video_sync_copy_all(struct udevice *dev) +-{ +- return 0; +-} +- +-#endif +- + /** + * video_damage() - Notify the video subsystem about screen updates. + * +diff --git a/include/video_console.h b/include/video_console.h +index 2694e44f6ecf..caadeb878989 100644 +--- a/include/video_console.h ++++ b/include/video_console.h +@@ -404,56 +404,4 @@ void vidconsole_list_fonts(struct udevice *dev); + */ + int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); + +-#ifdef CONFIG_VIDEO_COPY +-/** +- * vidconsole_sync_copy() - Sync back to the copy framebuffer +- * +- * This ensures that the copy framebuffer has the same data as the framebuffer +- * for a particular region. It should be called after the framebuffer is updated +- * +- * @from and @to can be in either order. The region between them is synced. +- * +- * @dev: Vidconsole device being updated +- * @from: Start/end address within the framebuffer (->fb) +- * @to: Other address within the frame buffer +- * Return: 0 if OK, -EFAULT if the start address is before the start of the +- * frame buffer start +- */ +-int vidconsole_sync_copy(struct udevice *dev, void *from, void *to); +- +-/** +- * vidconsole_memmove() - Perform a memmove() within the frame buffer +- * +- * This handles a memmove(), e.g. for scrolling. It also updates the copy +- * framebuffer. +- * +- * @dev: Vidconsole device being updated +- * @dst: Destination address within the framebuffer (->fb) +- * @src: Source address within the framebuffer (->fb) +- * @size: Number of bytes to transfer +- * Return: 0 if OK, -EFAULT if the start address is before the start of the +- * frame buffer start +- */ +-int vidconsole_memmove(struct udevice *dev, void *dst, const void *src, +- int size); +-#else +- +-#include +- +-static inline int vidconsole_sync_copy(struct udevice *dev, void *from, +- void *to) +-{ +- return 0; +-} +- +-static inline int vidconsole_memmove(struct udevice *dev, void *dst, +- const void *src, int size) +-{ +- memmove(dst, src, size); +- +- return 0; +-} +- +-#endif +- + #endif +diff --git a/test/dm/video.c b/test/dm/video.c +index 8c7d9800a42e..4c3bcd26e94f 100644 +--- a/test/dm/video.c ++++ b/test/dm/video.c +@@ -106,6 +106,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts, + if (!IS_ENABLED(CONFIG_VIDEO_COPY)) + return 0; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.50 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:51 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 12/13] video: Always compile cache flushing code +Date: Mon, 21 Aug 2023 16:51:09 +0300 +Message-Id: <20230821135111.3558478-13-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +The dcache flushing code path was conditional on ARM && !DCACHE config +options. However, dcaches exist on other platforms as well and may need +clearing if their driver requires it. + +Simplify the compile logic and always enable the dcache flush logic in +the video core. That way, drivers can always rely on it to call the arch +specific callbacks. + +This will increase code size for non-ARM platforms with CONFIG_VIDEO=y +slightly. + +Reported-by: Heinrich Schuchardt +Signed-off-by: Alexander Graf +Reviewed-by: Simon Glass +Signed-off-by: Alper Nebi Yasak +--- + +(no changes since v4) + +Changes in v4: +- Add patch "video: Always compile cache flushing code" + + drivers/video/video-uclass.c | 14 +++++--------- + 1 file changed, 5 insertions(+), 9 deletions(-) + +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index c79499252a22..3f9ddaadd15d 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) + priv->damage.yend = max(yend, priv->damage.yend); + } + +-#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + static void video_flush_dcache(struct udevice *vid) + { + struct video_priv *priv = dev_get_uclass_priv(vid); + ++ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) ++ return; ++ + if (!priv->flush_dcache) + return; + +@@ -410,7 +412,6 @@ static void video_flush_dcache(struct udevice *vid) + } + } + } +-#endif + + static void video_flush_copy(struct udevice *vid) + { +@@ -449,14 +450,9 @@ int video_sync(struct udevice *vid, bool force) + return ret; + } + +- /* +- * flush_dcache_range() is declared in common.h but it seems that some +- * architectures do not actually implement it. Is there a way to find +- * out whether it exists? For now, ARM is safe. +- */ +-#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + video_flush_dcache(vid); +-#elif defined(CONFIG_VIDEO_SANDBOX_SDL) ++ ++#if defined(CONFIG_VIDEO_SANDBOX_SDL) + static ulong last_sync; + + if (force || get_timer(last_sync) > 100) { + +From patchwork Mon Aug 21 13:51:10 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alper Nebi Yasak +X-Patchwork-Id: 1823656 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20221208 header.b=LXQ9F9oF; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4RTv8G1ylrz1yYZ + for ; Mon, 21 Aug 2023 23:53:34 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id D63BC87082; + Mon, 21 Aug 2023 15:51:59 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: phobos.denx.de; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.b="LXQ9F9oF"; + dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id 6DC358709F; Mon, 21 Aug 2023 15:51:58 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, + DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, + SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 +Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com + [IPv6:2a00:1450:4864:20::329]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id B9E5887094 + for ; Mon, 21 Aug 2023 15:51:55 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=alpernebiyasak@gmail.com +Received: by mail-wm1-x329.google.com with SMTP id + 5b1f17b1804b1-3fee5ddc23eso19328245e9.1 + for ; Mon, 21 Aug 2023 06:51:55 -0700 (PDT) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=gmail.com; s=20221208; t=1692625915; x=1693230715; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:from:to:cc:subject:date + :message-id:reply-to; + bh=q4KbQNgBgg/jRM/b8KJaE0YjvGZTzMRikT8MXE6mjwI=; + b=LXQ9F9oF17Es3W44Ien7NWJ7ymwABfjmSOFUn1nlvsBdcyw9b3O/o8ulQCpUwqhXho + Lsoff11Pmwlo87siidtGiRDX/BRiaZ8rBVWjS3jgK+U6RDPcwNCfR7otgNlLLaNyAd4w + BCXHT1+90WvAX/9alOvPUYlvUkP1t/S15/C+bUJWxok5Nf6l5iGthuNMWvZFFiUdQ8yR + 02AJastvoFpsYlAJI+JY69q6OhIhuxvdeDVc81dEOKzKkkEOdENJDmT6pJI4fiWlgwEE + iSJz97xC4lCSs+y5RPJTJfxE97zWwduKphPAN75dLRw0vnBYyqeXIo4ERx4uO7ku2jHf + 8feQ== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20221208; t=1692625915; x=1693230715; + h=content-transfer-encoding:mime-version:references:in-reply-to + :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc + :subject:date:message-id:reply-to; + bh=q4KbQNgBgg/jRM/b8KJaE0YjvGZTzMRikT8MXE6mjwI=; + b=VOZaSadRyfgFoQTc22AZ+r/0BSY4/MskC2GhVnMFg1gAc1bBAg7PJOyNu3x0V3ICuX + w68LWLVRLSaTmnF46xARtATTh8hJhyj7k3/oD4mNclUIyfmx/9vTSXJLn1MsG6m3TL8z + l5QNyUjNlgAK+YeuYH6zQl/yp5lmAF4EaOg5ITz+eLN2lf10QPYS18/bVbvNQ0Q2cwIN + FH+i7NhTRVoeExDFNVEFO11ZI3CJiAzpMC4WhI6OucHDWGIzEGcQKOYu9FfgwOfF5dVY + Yc6qjX3w9zhbwV3LA/grMncdSA9joMxVkWJwvFFD+6AlVLgin7DH8EDaIOtENT/RD/qq + Hjvw== +X-Gm-Message-State: AOJu0YyYX84n+767GB59OryFC5m/WbElRHO2Ix8D2HaL8Wnef45wnjme + 9nuXLuU5B1juuVwSn7QqTlnSVvjWNGQ= +X-Google-Smtp-Source: + AGHT+IER2mHBuKBsYnQ3qf+DOtUzSQystkj8v17bWgFVK+zSLUhwLW9BOExvB2cO0RXSrx1vnjzR/w== +X-Received: by 2002:adf:e711:0:b0:317:e542:80a8 with SMTP id + c17-20020adfe711000000b00317e54280a8mr4968619wrm.15.1692625915025; + Mon, 21 Aug 2023 06:51:55 -0700 (PDT) +Received: from ALPER-PC.. ([178.233.24.1]) by smtp.gmail.com with ESMTPSA id + r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.52 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 21 Aug 2023 06:51:54 -0700 (PDT) +From: Alper Nebi Yasak +To: u-boot@lists.denx.de +Cc: Kever Yang , + Jagan Teki , + Andre Przywara , + Svyatoslav Ryhel , Alexander Graf , + Philipp Tomsich , Andrew Davis , + Da Xue , Heinrich Schuchardt , + Patrice Chotard , + Patrick Delaunay , + Derald Woods , + Anatolij Gustschin , + uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , + Matthias Brugger , u-boot-amlogic@groups.io, + Ilias Apalodimas , + Neil Armstrong , + Alper Nebi Yasak +Subject: [PATCH v5 13/13] video: Enable VIDEO_DAMAGE for drivers that need it +Date: Mon, 21 Aug 2023 16:51:10 +0300 +Message-Id: <20230821135111.3558478-14-alpernebiyasak@gmail.com> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Alexander Graf + +Some drivers call video_set_flush_dcache() to indicate that they want to +have the dcache flushed for the frame buffer. These drivers benefit from +our new video damage control, because we can reduce the amount of memory +that gets flushed significantly. + +This patch enables video damage control for all device drivers that call +video_set_flush_dcache() to make sure they benefit from it. + +Signed-off-by: Alexander Graf +[Alper: Add to VIDEO_TIDSS, imply instead of select] +Co-developed-by: Alper Nebi Yasak +Signed-off-by: Alper Nebi Yasak +--- + +Changes in v5: +- Imply VIDEO_DAMAGE for video drivers instead of selecting it +- Imply VIDEO_DAMAGE also for VIDEO_TIDSS + +Changes in v4: +- Add patch "video: Enable VIDEO_DAMAGE for drivers that need it" + + arch/arm/mach-omap2/omap3/Kconfig | 1 + + arch/arm/mach-sunxi/Kconfig | 1 + + drivers/video/Kconfig | 8 ++++++++ + drivers/video/exynos/Kconfig | 1 + + drivers/video/imx/Kconfig | 1 + + drivers/video/meson/Kconfig | 1 + + drivers/video/rockchip/Kconfig | 1 + + drivers/video/stm32/Kconfig | 1 + + drivers/video/tegra20/Kconfig | 1 + + drivers/video/tidss/Kconfig | 1 + + 10 files changed, 17 insertions(+) + +diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig +index 671e4791c67f..fd858f7b50f2 100644 +--- a/arch/arm/mach-omap2/omap3/Kconfig ++++ b/arch/arm/mach-omap2/omap3/Kconfig +@@ -113,6 +113,7 @@ config TARGET_NOKIA_RX51 + select CMDLINE_TAG + select INITRD_TAG + select REVISION_TAG ++ imply VIDEO_DAMAGE + + config TARGET_TAO3530 + bool "TAO3530" +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index 9d5df2c10273..fb4478ea32e8 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -813,6 +813,7 @@ config VIDEO_SUNXI + depends on !SUN50I_GEN_H6 + select VIDEO + select DISPLAY ++ imply VIDEO_DAMAGE + imply VIDEO_DT_SIMPLEFB + default y + ---help--- +diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig +index b3fbd9d7d9ca..185dbb1f8390 100644 +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804 + + config ATMEL_LCD + bool "Atmel LCD panel support" ++ imply VIDEO_DAMAGE + depends on ARCH_AT91 + + config ATMEL_LCD_BGR555 +@@ -508,6 +509,7 @@ config ATMEL_LCD_BGR555 + + config VIDEO_BCM2835 + bool "Display support for BCM2835" ++ imply VIDEO_DAMAGE + help + The graphics processor already sets up the display so this driver + simply checks the resolution and then sets up the frame buffer with +@@ -654,6 +656,7 @@ source "drivers/video/meson/Kconfig" + + config VIDEO_MVEBU + bool "Armada XP LCD controller" ++ imply VIDEO_DAMAGE + ---help--- + Support for the LCD controller integrated in the Marvell + Armada XP SoC. +@@ -688,6 +691,7 @@ config NXP_TDA19988 + + config ATMEL_HLCD + bool "Enable ATMEL video support using HLCDC" ++ imply VIDEO_DAMAGE + help + HLCDC supports video output to an attached LCD panel. + +@@ -764,6 +768,7 @@ source "drivers/video/tidss/Kconfig" + + config VIDEO_TEGRA124 + bool "Enable video support on Tegra124" ++ imply VIDEO_DAMAGE + help + Tegra124 supports many video output options including eDP and + HDMI. At present only eDP is supported by U-Boot. This option +@@ -778,6 +783,7 @@ source "drivers/video/imx/Kconfig" + + config VIDEO_MXS + bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs" ++ imply VIDEO_DAMAGE + help + Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors + +@@ -840,6 +846,7 @@ config VIDEO_DW_MIPI_DSI + + config VIDEO_SIMPLE + bool "Simple display driver for preconfigured display" ++ imply VIDEO_DAMAGE + help + Enables a simple generic display driver which utilizes the + simple-framebuffer devicetree bindings. +@@ -858,6 +865,7 @@ config VIDEO_DT_SIMPLEFB + + config VIDEO_MCDE_SIMPLE + bool "Simple driver for ST-Ericsson MCDE with preconfigured display" ++ imply VIDEO_DAMAGE + help + Enables a simple display driver for ST-Ericsson MCDE + (Multichannel Display Engine), which reads the configuration from +diff --git a/drivers/video/exynos/Kconfig b/drivers/video/exynos/Kconfig +index 599d19d5ecc2..a2cf752aac03 100644 +--- a/drivers/video/exynos/Kconfig ++++ b/drivers/video/exynos/Kconfig +@@ -12,6 +12,7 @@ config EXYNOS_DP + + config EXYNOS_FB + bool "Exynos FIMD support" ++ imply VIDEO_DAMAGE + + config EXYNOS_MIPI_DSIM + bool "Exynos MIPI DSI support" +diff --git a/drivers/video/imx/Kconfig b/drivers/video/imx/Kconfig +index 34e8b640595b..5db3e5c0499e 100644 +--- a/drivers/video/imx/Kconfig ++++ b/drivers/video/imx/Kconfig +@@ -2,6 +2,7 @@ + config VIDEO_IPUV3 + bool "i.MX IPUv3 Core video support" + depends on VIDEO && (MX5 || MX6) ++ imply VIDEO_DAMAGE + help + This enables framebuffer driver for i.MX processors working + on the IPUv3(Image Processing Unit) internal graphic processor. +diff --git a/drivers/video/meson/Kconfig b/drivers/video/meson/Kconfig +index 3c2d72d019b8..fcf486ca0a3a 100644 +--- a/drivers/video/meson/Kconfig ++++ b/drivers/video/meson/Kconfig +@@ -8,5 +8,6 @@ config VIDEO_MESON + bool "Enable Amlogic Meson video support" + depends on VIDEO + select DISPLAY ++ imply VIDEO_DAMAGE + help + Enable Amlogic Meson Video Processing Unit video support. +diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig +index 01804dcb1cc8..0f4550a29e38 100644 +--- a/drivers/video/rockchip/Kconfig ++++ b/drivers/video/rockchip/Kconfig +@@ -11,6 +11,7 @@ + menuconfig VIDEO_ROCKCHIP + bool "Enable Rockchip Video Support" + depends on VIDEO ++ imply VIDEO_DAMAGE + help + Rockchip SoCs provide video output capabilities for High-Definition + Multimedia Interface (HDMI), Low-voltage Differential Signalling +diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig +index 48066063e4c5..c354c402c288 100644 +--- a/drivers/video/stm32/Kconfig ++++ b/drivers/video/stm32/Kconfig +@@ -8,6 +8,7 @@ + menuconfig VIDEO_STM32 + bool "Enable STM32 video support" + depends on VIDEO ++ imply VIDEO_DAMAGE + help + STM32 supports many video output options including RGB and + DSI. This option enables these supports which can be used on +diff --git a/drivers/video/tegra20/Kconfig b/drivers/video/tegra20/Kconfig +index f5c4843e1191..2232b0b3ff53 100644 +--- a/drivers/video/tegra20/Kconfig ++++ b/drivers/video/tegra20/Kconfig +@@ -1,6 +1,7 @@ + config VIDEO_TEGRA20 + bool "Enable Display Controller support on Tegra20 and Tegra 30" + depends on OF_CONTROL ++ imply VIDEO_DAMAGE + help + T20/T30 support video output to an attached LCD panel as well as + other options such as HDMI. Only the LCD is supported in U-Boot. +diff --git a/drivers/video/tidss/Kconfig b/drivers/video/tidss/Kconfig +index 95086f3a5d66..3291b3ceb8d5 100644 +--- a/drivers/video/tidss/Kconfig ++++ b/drivers/video/tidss/Kconfig +@@ -11,6 +11,7 @@ + menuconfig VIDEO_TIDSS + bool "Enable TIDSS video support" + depends on VIDEO ++ imply VIDEO_DAMAGE + help + TIDSS supports video output options LVDS and + DPI . This option enables these supports which can be used on diff --git a/uboot-tools.spec b/uboot-tools.spec index bd19b50..ede4905 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -22,15 +22,16 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch Patch3: disable-VBE-by-default.patch Patch4: enable-bootmenu-by-default.patch +Patch5: Add-video-damage-tracking.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support -Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements -Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch7: rock64-small-fixes.patch -#Patch7: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch -Patch8: rpi-Convert-to-standard-boot.patch +Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch12: rock64-small-fixes.patch +#Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +Patch13: rpi-Convert-to-standard-boot.patch BuildRequires: bc BuildRequires: bison @@ -215,6 +216,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Aug 21 2023 Peter Robinson - 2023.10-0.3.rc2 +- Add patch to speed up firmware UEFI video output + * Sat Aug 19 2023 Peter Robinson - 2023.10-0.2.rc2 - Add patch for Raspberry Pi boot From 4798befe9560325fc14d29a3a1d800404ea3c4ea Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 21 Aug 2023 22:05:15 +0100 Subject: [PATCH 236/351] 2023.10 RC3 --- rock64-small-fixes.patch | 476 --------------------------------------- sources | 2 +- uboot-tools.spec | 8 +- 3 files changed, 6 insertions(+), 480 deletions(-) delete mode 100644 rock64-small-fixes.patch diff --git a/rock64-small-fixes.patch b/rock64-small-fixes.patch deleted file mode 100644 index 5ea77fb..0000000 --- a/rock64-small-fixes.patch +++ /dev/null @@ -1,476 +0,0 @@ -From patchwork Wed Jun 14 12:43:12 2023 -Content-Type: text/plain; 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Kornilov" , - Simon Glass , Philipp Tomsich , - Kever Yang , u-boot@lists.denx.de -Cc: Peter Robinson -Subject: [PATCH 2/4] config: rock64: enable efuse for stable mac addr -Date: Wed, 14 Jun 2023 13:43:12 +0100 -Message-ID: <20230614124329.244462-2-pbrobinson@gmail.com> -X-Mailer: git-send-email 2.41.0 -In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> -References: <20230614124329.244462-1-pbrobinson@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Enable the rockchip efuse driver on the Rock64 to -provide a stable ethernet address on the device. - -Signed-off-by: Peter Robinson -Reviewed-by: Kever Yang ---- - -While the rockchip efuse driver currently has issues on rk3328 due to, I believe, it -not being properly initialised in ATF, enabling it at least provides a stable MAC -adress on the NIC which I think makes it worthwhile - - configs/rock64-rk3328_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig -index 1da9b0545a5..97ac8734d1b 100644 ---- a/configs/rock64-rk3328_defconfig -+++ b/configs/rock64-rk3328_defconfig -@@ -74,6 +74,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MISC=y -+CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_SPI_FLASH_GIGADEVICE=y - -From patchwork Wed Jun 14 12:43:13 2023 -Content-Type: text/plain; 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- Wed, 14 Jun 2023 05:43:34 -0700 (PDT) -Received: from morpheus.home.roving-it.com - (3.e.2.0.0.0.0.0.0.0.0.0.0.0.0.0.1.8.6.2.1.1.b.f.0.b.8.0.1.0.0.2.ip6.arpa. - [2001:8b0:fb11:2681::2e3]) by smtp.googlemail.com with ESMTPSA id - g26-20020a7bc4da000000b003f60e143d38sm17329161wmk.11.2023.06.14.05.43.33 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Wed, 14 Jun 2023 05:43:33 -0700 (PDT) -From: Peter Robinson -To: "Matwey V. Kornilov" , - Simon Glass , Philipp Tomsich , - Kever Yang , u-boot@lists.denx.de -Cc: Peter Robinson -Subject: [PATCH 3/4] rockchip: dts: rk3328: Add rng details to u-boot.dtsi -Date: Wed, 14 Jun 2023 13:43:13 +0100 -Message-ID: <20230614124329.244462-3-pbrobinson@gmail.com> -X-Mailer: git-send-email 2.41.0 -In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> -References: <20230614124329.244462-1-pbrobinson@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Add the rk3328 rng details to the u-boot.dtsi and -enable the RNG on the Rock64 to be able to provide -a rnadom seed via UEFI. - -Signed-off-by: Peter Robinson ---- - -The DT snippet will allow this to be enabled on other rk3328 devices but -I only have the Rock54 to test on. - - arch/arm/dts/rk3328-u-boot.dtsi | 6 ++++++ - configs/rock64-rk3328_defconfig | 2 ++ - 2 files changed, 8 insertions(+) - -diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi -index ce96ce40a73..a9f2536de2a 100644 ---- a/arch/arm/dts/rk3328-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-u-boot.dtsi -@@ -26,6 +26,12 @@ - 0x0 0xff720000 0x0 0x1000 - 0x0 0xff798000 0x0 0x1000>; - }; -+ -+ rng: rng@ff060000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff060000 0x0 0x4000>; -+ status = "okay"; -+ }; - }; - - &cru { -diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig -index 97ac8734d1b..1820deee373 100644 ---- a/configs/rock64-rk3328_defconfig -+++ b/configs/rock64-rk3328_defconfig -@@ -77,6 +77,8 @@ CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y - CONFIG_SPI_FLASH_GIGADEVICE=y - CONFIG_ETH_DESIGNWARE=y - CONFIG_GMAC_ROCKCHIP=y - -From patchwork Wed Jun 14 12:43:14 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Peter Robinson -X-Patchwork-Id: 1794952 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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- Wed, 14 Jun 2023 05:43:34 -0700 (PDT) -From: Peter Robinson -To: "Matwey V. Kornilov" , - Simon Glass , Philipp Tomsich , - Kever Yang , u-boot@lists.denx.de -Cc: Peter Robinson -Subject: [PATCH 4/4] rockchip: dts: rk3328: rock64: Align spi flash entry -Date: Wed, 14 Jun 2023 13:43:14 +0100 -Message-ID: <20230614124329.244462-4-pbrobinson@gmail.com> -X-Mailer: git-send-email 2.41.0 -In-Reply-To: <20230614124329.244462-1-pbrobinson@gmail.com> -References: <20230614124329.244462-1-pbrobinson@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Align the SPI flash entry with upstream. There's no need -to diverge here. - -Signed-off-by: Peter Robinson -Reviewed-by: Kever Yang ---- - arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +- - arch/arm/dts/rk3328-rock64.dts | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -index 849854302ee..6904515b969 100644 ---- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -@@ -54,7 +54,7 @@ - }; - - &spi0 { -- spi_flash: spiflash@0 { -+ spi_flash: flash@0 { - bootph-all; - }; - }; -diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts -index 1b0f7e4551e..f69a38f42d2 100644 ---- a/arch/arm/dts/rk3328-rock64.dts -+++ b/arch/arm/dts/rk3328-rock64.dts -@@ -345,7 +345,7 @@ - &spi0 { - status = "okay"; - -- spiflash@0 { -+ flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - diff --git a/sources b/sources index 1504d9e..0fa4df0 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.10-rc2.tar.bz2) = cc3cd85c84e1d7d8e45244f330709ad5ecf918ee42aac4de565ca5e1e1cde25e89b1a8672aaac04c0bf830e36192a72caabfde3baf6633c68fa76103768be201 +SHA512 (u-boot-2023.10-rc3.tar.bz2) = 920190c47faca085c44fbd747669379f47461e3a3de5041e6a0d28d073116f1b18b0711876fb3c49eacd130e6fd2aa9d5ec84cb5fe0b2f7617b2438804317e81 diff --git a/uboot-tools.spec b/uboot-tools.spec index ede4905..478b255 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -29,7 +29,6 @@ Patch5: Add-video-damage-tracking.patch Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch12: rock64-small-fixes.patch #Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch Patch13: rpi-Convert-to-standard-boot.patch @@ -216,6 +215,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Aug 21 2023 Peter Robinson - 2023.10-0.4.rc3 +- Update to 2023.10 RC3 + * Mon Aug 21 2023 Peter Robinson - 2023.10-0.3.rc2 - Add patch to speed up firmware UEFI video output From 6cd0d073d6dd336a82d1b646c7f80f6982c7a37e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 21 Oct 2023 10:16:31 +0100 Subject: [PATCH 237/351] 2023.10, initial pass at DT detection fix --- Add-video-damage-tracking.patch | 13 - aarch64-boards | 2 - ...all-bootdevs-in-a-boot_targets-entry.patch | 213 +++++ rpi-Convert-to-standard-boot.patch | 892 ------------------ sources | 2 +- uboot-tools.spec | 14 +- ...atic-management-for-removable-medias.patch | 550 +++++++++++ 7 files changed, 772 insertions(+), 914 deletions(-) create mode 100644 bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch delete mode 100644 rpi-Convert-to-standard-boot.patch create mode 100644 uefi-Boot-var-automatic-management-for-removable-medias.patch diff --git a/Add-video-damage-tracking.patch b/Add-video-damage-tracking.patch index 3cfd387..5e78df8 100644 --- a/Add-video-damage-tracking.patch +++ b/Add-video-damage-tracking.patch @@ -3947,7 +3947,6 @@ Changes in v5: Changes in v4: - Add patch "video: Enable VIDEO_DAMAGE for drivers that need it" - arch/arm/mach-omap2/omap3/Kconfig | 1 + arch/arm/mach-sunxi/Kconfig | 1 + drivers/video/Kconfig | 8 ++++++++ drivers/video/exynos/Kconfig | 1 + @@ -3959,18 +3958,6 @@ Changes in v4: drivers/video/tidss/Kconfig | 1 + 10 files changed, 17 insertions(+) -diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig -index 671e4791c67f..fd858f7b50f2 100644 ---- a/arch/arm/mach-omap2/omap3/Kconfig -+++ b/arch/arm/mach-omap2/omap3/Kconfig -@@ -113,6 +113,7 @@ config TARGET_NOKIA_RX51 - select CMDLINE_TAG - select INITRD_TAG - select REVISION_TAG -+ imply VIDEO_DAMAGE - - config TARGET_TAO3530 - bool "TAO3530" diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 9d5df2c10273..fb4478ea32e8 100644 --- a/arch/arm/mach-sunxi/Kconfig diff --git a/aarch64-boards b/aarch64-boards index 63adc19..ac90276 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -76,8 +76,6 @@ rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399 -rpi_3 -rpi_4 rpi_arm64 sopine_baseboard starqltechn diff --git a/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch b/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch new file mode 100644 index 0000000..8ab2759 --- /dev/null +++ b/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch @@ -0,0 +1,213 @@ +From patchwork Sat Sep 23 20:50:15 2023 +Content-Type: text/plain; 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+ Sat, 23 Sep 2023 13:50:19 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Cc: Date Huang , Tom Rini , + =?utf-8?q?Vincent_Stehl=C3=A9?= , + Simon Glass +Subject: [PATCH] bootstd: Scan all bootdevs in a boot_targets entry +Date: Sat, 23 Sep 2023 14:50:15 -0600 +Message-ID: <20230923205017.1754340-1-sjg@chromium.org> +X-Mailer: git-send-email 2.42.0.515.g380fc7ccd1-goog +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +When the boot_targets environment variable is used with the distro-boot +scripts, each device is included individually. For example, if there +are three mmc devices, then we will have something like: + + boot_targets="mmc0 mmc1 mmc2" + +In contrast, standard boot supports specifying just the uclass, i.e.: + + boot_targets="mmc" + +The intention is that this should scan all MMC devices, but in fact it +currently only scans the first. + +Update the logic to handle this case, without required BOOTSTD_FULL to +be enabled. + +I believe at least three people reported this, but I found two. + +Signed-off-by: Simon Glass +Reported-by: Date Huang +Reported-by: Vincent Stehlé +--- + + boot/bootdev-uclass.c | 3 ++- + boot/bootflow.c | 21 +++++++++++++++++++-- + test/boot/bootdev.c | 10 ++++++++++ + 3 files changed, 31 insertions(+), 3 deletions(-) + +diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c +index fa52bc3a9c4e..5a60cf223c79 100644 +--- a/boot/bootdev-uclass.c ++++ b/boot/bootdev-uclass.c +@@ -460,10 +460,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp, + * if no sequence number was provided, we must scan all + * bootdevs for this media uclass + */ +- if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1) ++ if (seq == -1) + method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS; + if (method_flagsp) + *method_flagsp = method_flags; ++ log_debug("method flags %x\n", method_flags); + return 0; + } + log_debug("- no device in %s\n", media->name); +diff --git a/boot/bootflow.c b/boot/bootflow.c +index 81b5829d5b37..74abf3e17d7e 100644 +--- a/boot/bootflow.c ++++ b/boot/bootflow.c +@@ -260,8 +260,25 @@ static int iter_incr(struct bootflow_iter *iter) + } else { + log_debug("labels %p\n", iter->labels); + if (iter->labels) { +- ret = bootdev_next_label(iter, &dev, +- &method_flags); ++ /* ++ * when the label is "mmc" we want to scan all ++ * mmc bootdevs, not just the first. See ++ * bootdev_find_by_label() where this flag is ++ * set up ++ */ ++ if (iter->method_flags & BOOTFLOW_METHF_SINGLE_UCLASS) { ++ uclass_next_device(&dev); ++ log_debug("looking for next device %s: %s\n", ++ iter->dev->name, ++ dev ? dev->name : ""); ++ } else { ++ dev = NULL; ++ } ++ if (!dev) { ++ log_debug("looking at next label\n"); ++ ret = bootdev_next_label(iter, &dev, ++ &method_flags); ++ } + } else { + ret = bootdev_next_prio(iter, &dev); + method_flags = 0; +diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c +index 6b29213416db..c5f14a7a1323 100644 +--- a/test/boot/bootdev.c ++++ b/test/boot/bootdev.c +@@ -221,6 +221,16 @@ static int bootdev_test_order(struct unit_test_state *uts) + ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); + bootflow_iter_uninit(&iter); + ++ /* Make sure it scans a bootdevs in each target */ ++ ut_assertok(env_set("boot_targets", "mmc spi")); ++ ut_asserteq(0, bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); ++ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); ++ ut_asserteq(3, iter.num_devs); ++ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); ++ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); ++ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); ++ bootflow_iter_uninit(&iter); ++ + return 0; + } + BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); diff --git a/rpi-Convert-to-standard-boot.patch b/rpi-Convert-to-standard-boot.patch deleted file mode 100644 index de02728..0000000 --- a/rpi-Convert-to-standard-boot.patch +++ /dev/null @@ -1,892 +0,0 @@ -From patchwork Thu Jul 27 21:54:28 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1813968 -X-Patchwork-Delegate: pbrobinson@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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[73.14.173.85]) - by smtp.gmail.com with ESMTPSA id - n28-20020a02cc1c000000b00430245071ddsm679215jap.176.2023.07.27.14.54.39 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 27 Jul 2023 14:54:40 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Tom Rini , Peter Robinson , - Simon Glass , Albert Aribaud , - Matthias Brugger , Stephen Warren , - Stephen Warren -Subject: [RESEND PATCH v3 1/3] arm: rpi: Switch to standard boot -Date: Thu, 27 Jul 2023 15:54:28 -0600 -Message-ID: <20230727215433.578830-2-sjg@chromium.org> -X-Mailer: git-send-email 2.41.0.487.g6d72f3e995-goog -In-Reply-To: <20230727215433.578830-1-sjg@chromium.org> -References: <20230727215433.578830-1-sjg@chromium.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Drop use of the distro scripts and use standard boot instead. - -We don't need to specify the mmc devices individually, since they are -used in order from 0 to 2, and standard boot uses that order anyway. - -Signed-off-by: Simon Glass ---- - -Changes in v3: -- Rebase to -master - -Changes in v2: -- Rebase to -next - - configs/rpi_0_w_defconfig | 1 + - configs/rpi_2_defconfig | 1 + - configs/rpi_3_32b_defconfig | 1 + - configs/rpi_3_b_plus_defconfig | 1 + - configs/rpi_3_defconfig | 1 + - configs/rpi_4_32b_defconfig | 1 + - configs/rpi_4_defconfig | 1 + - configs/rpi_arm64_defconfig | 1 + - configs/rpi_defconfig | 1 + - include/configs/rpi.h | 38 ++-------------------------------- - 10 files changed, 11 insertions(+), 36 deletions(-) - -diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index 5da334a8bcf9..7554e671e2ca 100644 ---- a/configs/rpi_0_w_defconfig -+++ b/configs/rpi_0_w_defconfig -@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index 990862160712..653f78bec1e8 100644 ---- a/configs/rpi_2_defconfig -+++ b/configs/rpi_2_defconfig -@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index 80885aa9488d..305f1dacfd46 100644 ---- a/configs/rpi_3_32b_defconfig -+++ b/configs/rpi_3_32b_defconfig -@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig -index 0acce8b883f8..f36f1258aa6d 100644 ---- a/configs/rpi_3_b_plus_defconfig -+++ b/configs/rpi_3_b_plus_defconfig -@@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index bb6fe128061b..a0d8be42537f 100644 ---- a/configs/rpi_3_defconfig -+++ b/configs/rpi_3_defconfig -@@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index f6213340971e..71f61c52e52d 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_DM_RESET=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index bbc0fd6c649a..fa2c05da21e8 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_DM_RESET=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 5d9a273cb920..3e64573b70b1 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_DM_RESET=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y -diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index 550b8dcb9587..4b8e402c89d4 100644 ---- a/configs/rpi_defconfig -+++ b/configs/rpi_defconfig -@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" - CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y -diff --git a/include/configs/rpi.h b/include/configs/rpi.h -index 4da982f73578..4160db2d8e14 100644 ---- a/include/configs/rpi.h -+++ b/include/configs/rpi.h -@@ -122,47 +122,13 @@ - "fdt_addr_r=0x02600000\0" \ - "ramdisk_addr_r=0x02700000\0" - --#if IS_ENABLED(CONFIG_CMD_MMC) -- #define BOOT_TARGET_MMC(func) \ -- func(MMC, mmc, 0) \ -- func(MMC, mmc, 1) \ -- func(MMC, mmc, 2) --#else -- #define BOOT_TARGET_MMC(func) --#endif -- --#if IS_ENABLED(CONFIG_CMD_USB) -- #define BOOT_TARGET_USB(func) func(USB, usb, 0) --#else -- #define BOOT_TARGET_USB(func) --#endif -- --#if CONFIG_IS_ENABLED(CMD_PXE) -- #define BOOT_TARGET_PXE(func) func(PXE, pxe, na) --#else -- #define BOOT_TARGET_PXE(func) --#endif -- --#if CONFIG_IS_ENABLED(CMD_DHCP) -- #define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) --#else -- #define BOOT_TARGET_DHCP(func) --#endif -- --#define BOOT_TARGET_DEVICES(func) \ -- BOOT_TARGET_MMC(func) \ -- BOOT_TARGET_USB(func) \ -- BOOT_TARGET_PXE(func) \ -- BOOT_TARGET_DHCP(func) -- --#include -+#define BOOT_TARGETS "mmc usb pxe dhcp" - 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[73.14.173.85]) - by smtp.gmail.com with ESMTPSA id - n28-20020a02cc1c000000b00430245071ddsm679215jap.176.2023.07.27.14.54.40 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 27 Jul 2023 14:54:40 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Tom Rini , Peter Robinson , - Simon Glass , Matthias Brugger , - Stephen Warren , Stephen Warren -Subject: [RESEND PATCH v3 2/3] rpi: Disable DISTRO_DEFAULTS -Date: Thu, 27 Jul 2023 15:54:29 -0600 -Message-ID: <20230727215433.578830-3-sjg@chromium.org> -X-Mailer: git-send-email 2.41.0.487.g6d72f3e995-goog -In-Reply-To: <20230727215433.578830-1-sjg@chromium.org> -References: <20230727215433.578830-1-sjg@chromium.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Disable this option to reclaim some space, since bootstd requires less -functionality to operate (e.g. hush parser). - -Signed-off-by: Simon Glass ---- - -(no changes since v2) - -Changes in v2: -- Add new patch to disable DISTRO_DEFAULTS - - configs/rpi_0_w_defconfig | 1 - - configs/rpi_2_defconfig | 1 - - configs/rpi_3_32b_defconfig | 1 - - configs/rpi_3_b_plus_defconfig | 1 - - configs/rpi_3_defconfig | 1 - - configs/rpi_4_32b_defconfig | 1 - - configs/rpi_4_defconfig | 1 - - configs/rpi_arm64_defconfig | 1 - - configs/rpi_defconfig | 1 - - 9 files changed, 9 deletions(-) - -diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index 7554e671e2ca..3167bfbe48f7 100644 ---- a/configs/rpi_0_w_defconfig -+++ b/configs/rpi_0_w_defconfig -@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index 653f78bec1e8..883dab161702 100644 ---- a/configs/rpi_2_defconfig -+++ b/configs/rpi_2_defconfig -@@ -15,7 +15,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index 305f1dacfd46..5ff7d987a431 100644 ---- a/configs/rpi_3_32b_defconfig -+++ b/configs/rpi_3_32b_defconfig -@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig -index f36f1258aa6d..31f2a6eb310c 100644 ---- a/configs/rpi_3_b_plus_defconfig -+++ b/configs/rpi_3_b_plus_defconfig -@@ -13,7 +13,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index a0d8be42537f..fa6e1507d640 100644 ---- a/configs/rpi_3_defconfig -+++ b/configs/rpi_3_defconfig -@@ -13,7 +13,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 71f61c52e52d..55bf6c0770f0 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - CONFIG_PREBOOT="pci enum; usb start;" - # CONFIG_DISPLAY_CPUINFO is not set -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index fa2c05da21e8..6679cce9a165 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - CONFIG_PREBOOT="pci enum; usb start;" - # CONFIG_DISPLAY_CPUINFO is not set -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 3e64573b70b1..26e29ffb5a1f 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_PCI=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - CONFIG_PREBOOT="pci enum; usb start;" - # CONFIG_DISPLAY_CPUINFO is not set -diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index 4b8e402c89d4..0ac5efec717b 100644 ---- a/configs/rpi_defconfig -+++ b/configs/rpi_defconfig -@@ -14,7 +14,6 @@ CONFIG_OF_LIBFDT_OVERLAY=y - CONFIG_SYS_LOAD_ADDR=0x1000000 - CONFIG_BOOTSTD_DEFAULTS=y - CONFIG_OF_BOARD_SETUP=y --CONFIG_DISTRO_DEFAULTS=y - CONFIG_USE_PREBOOT=y - # CONFIG_DISPLAY_CPUINFO is not set - # CONFIG_DISPLAY_BOARDINFO is not set - -From patchwork Thu Jul 27 21:54:30 2023 -Content-Type: text/plain; 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[73.14.173.85]) - by smtp.gmail.com with ESMTPSA id - n28-20020a02cc1c000000b00430245071ddsm679215jap.176.2023.07.27.14.54.41 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 27 Jul 2023 14:54:41 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Tom Rini , Peter Robinson , - Simon Glass , Albert Aribaud , - Matthias Brugger , Stephen Warren , - Stephen Warren -Subject: [RESEND PATCH v3 3/3] arm: rpi: Switch to a text environment -Date: Thu, 27 Jul 2023 15:54:30 -0600 -Message-ID: <20230727215433.578830-4-sjg@chromium.org> -X-Mailer: git-send-email 2.41.0.487.g6d72f3e995-goog -In-Reply-To: <20230727215433.578830-1-sjg@chromium.org> -References: <20230727215433.578830-1-sjg@chromium.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Use the new environment format so we can drop most of the config.h file. - -Signed-off-by: Simon Glass ---- - -(no changes since v1) - - board/raspberrypi/rpi/rpi.env | 77 ++++++++++++++++++++++++++ - include/configs/rpi.h | 100 ---------------------------------- - 2 files changed, 77 insertions(+), 100 deletions(-) - create mode 100644 board/raspberrypi/rpi/rpi.env - -diff --git a/board/raspberrypi/rpi/rpi.env b/board/raspberrypi/rpi/rpi.env -new file mode 100644 -index 000000000000..30228285edde ---- /dev/null -+++ b/board/raspberrypi/rpi/rpi.env -@@ -0,0 +1,77 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+ -+/* environment for Raspberry Pi boards */ -+ -+dhcpuboot=usb start; dhcp u-boot.uimg; bootm -+ -+/* Environment */ -+stdin=serial,usbkbd -+stdout=serial,vidconsole -+stderr=serial,vidconsole -+ -+/* DFU over USB/UDC */ -+#ifdef CONFIG_CMD_DFU -+dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1; -+ config.txt fat 0 1; -+#ifdef CONFIG_ARM64 -+dfu_alt_info+=Image fat 0 1 -+#else -+dfu_alt_info+=zImage fat 0 1 -+#endif -+#endif /* CONFIG_CMD_DFU */ -+ -+/* -+ * Memory layout for where various images get loaded by boot scripts: -+ * -+ * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. -+ * -+ * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, -+ * newer versions place it in high memory. So prevent U-Boot from doing its own -+ * DTB + initrd relocation so that we won't accidentally relocate the initrd -+ * over the firmware-loaded DTB and generally try to lay out things starting -+ * from the bottom of RAM. -+ * -+ * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, -+ * it must be within the first 128M of RAM in order for the kernel's -+ * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed -+ * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The -+ * decompressor also likes to relocate itself to right past the end of the -+ * decompressed kernel, so in total the sum of the compressed and -+ * decompressed kernel needs to be reserved. -+ * -+ * For Aarch64, the kernel image is uncompressed and must be loaded at -+ * text_offset bytes (specified in the header of the Image) into a 2MB -+ * boundary. The 'booti' command relocates the image if necessary. Linux uses -+ * a default text_offset of 0x80000. In summary, loading at 0x80000 -+ * satisfies all these constraints and reserving memory up to 0x02400000 -+ * permits fairly large (roughly 36M) kernels. -+ * -+ * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't -+ * conflict with something else. Reserving 1M for each of them at -+ * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. -+ * -+ * On ARM, both the DTB and any possible initrd must be loaded such that they -+ * fit inside the lowmem mapping in Linux. In practice, this usually means not -+ * more than ~700M away from the start of the kernel image but this number can -+ * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line -+ * parameter given to the kernel. So reserving memory from low to high -+ * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for -+ * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. -+ * Even with the smallest possible CPU-GPU memory split of the CPU getting -+ * only 64M, the remaining 25M starting at 0x02700000 should allow quite -+ * large initrds before they start colliding with U-Boot. -+ */ -+#ifdef CONFIG_ARM64 -+fdt_high=ffffffffffffffff -+initrd_high=ffffffffffffffff -+#else -+fdt_high=ffffffff -+initrd_high=ffffffff -+#endif -+kernel_addr_r=0x00080000 -+scriptaddr=0x02400000 -+pxefile_addr_r=0x02500000 -+fdt_addr_r=0x02600000 -+ramdisk_addr_r=0x02700000 -+ -+boot_targets=mmc usb pxe dhcp -diff --git a/include/configs/rpi.h b/include/configs/rpi.h -index 4160db2d8e14..8e56bdc84a89 100644 ---- a/include/configs/rpi.h -+++ b/include/configs/rpi.h -@@ -13,8 +13,6 @@ - #include - #endif - --/* Architecture, CPU, etc.*/ -- - /* Use SoC timer for AArch32, but architected timer for AArch64 */ - #ifndef CONFIG_ARM64 - #define CFG_SYS_TIMER_RATE 1000000 -@@ -33,102 +31,4 @@ - */ - #define CFG_SYS_SDRAM_SIZE SZ_128M - --/* Devices */ --/* LCD */ -- --/* DFU over USB/UDC */ --#ifdef CONFIG_CMD_DFU --#ifdef CONFIG_ARM64 --#define KERNEL_FILENAME "Image" --#else --#define KERNEL_FILENAME "zImage" --#endif -- --#define ENV_DFU_SETTINGS \ -- "dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1;" \ -- "config.txt fat 0 1;" \ -- KERNEL_FILENAME " fat 0 1\0" --#else --#define ENV_DFU_SETTINGS "" --#endif -- --/* Console configuration */ -- --/* Environment */ -- --/* Shell */ -- --/* Environment */ --#define ENV_DEVICE_SETTINGS \ -- "stdin=serial,usbkbd\0" \ -- "stdout=serial,vidconsole\0" \ -- "stderr=serial,vidconsole\0" -- --#ifdef CONFIG_ARM64 --#define FDT_HIGH "ffffffffffffffff" --#define INITRD_HIGH "ffffffffffffffff" --#else --#define FDT_HIGH "ffffffff" --#define INITRD_HIGH "ffffffff" --#endif -- --/* -- * Memory layout for where various images get loaded by boot scripts: -- * -- * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. -- * -- * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, -- * newer versions place it in high memory. So prevent U-Boot from doing its own -- * DTB + initrd relocation so that we won't accidentally relocate the initrd -- * over the firmware-loaded DTB and generally try to lay out things starting -- * from the bottom of RAM. -- * -- * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, -- * it must be within the first 128M of RAM in order for the kernel's -- * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed -- * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The -- * decompressor also likes to relocate itself to right past the end of the -- * decompressed kernel, so in total the sum of the compressed and and -- * decompressed kernel needs to be reserved. -- * -- * For Aarch64, the kernel image is uncompressed and must be loaded at -- * text_offset bytes (specified in the header of the Image) into a 2MB -- * boundary. The 'booti' command relocates the image if necessary. Linux uses -- * a default text_offset of 0x80000. In summary, loading at 0x80000 -- * satisfies all these constraints and reserving memory up to 0x02400000 -- * permits fairly large (roughly 36M) kernels. -- * -- * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't -- * conflict with something else. Reserving 1M for each of them at -- * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. -- * -- * On ARM, both the DTB and any possible initrd must be loaded such that they -- * fit inside the lowmem mapping in Linux. In practice, this usually means not -- * more than ~700M away from the start of the kernel image but this number can -- * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line -- * parameter given to the kernel. So reserving memory from low to high -- * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for -- * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. -- * Even with the smallest possible CPU-GPU memory split of the CPU getting -- * only 64M, the remaining 25M starting at 0x02700000 should allow quite -- * large initrds before they start colliding with U-Boot. -- */ --#define ENV_MEM_LAYOUT_SETTINGS \ -- "fdt_high=" FDT_HIGH "\0" \ -- "initrd_high=" INITRD_HIGH "\0" \ -- "kernel_addr_r=0x00080000\0" \ -- "scriptaddr=0x02400000\0" \ -- "pxefile_addr_r=0x02500000\0" \ -- "fdt_addr_r=0x02600000\0" \ -- "ramdisk_addr_r=0x02700000\0" -- --#define BOOT_TARGETS "mmc usb pxe dhcp" -- --#define CFG_EXTRA_ENV_SETTINGS \ -- "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ -- ENV_DEVICE_SETTINGS \ -- ENV_DFU_SETTINGS \ -- ENV_MEM_LAYOUT_SETTINGS \ -- "boot_targets=" BOOT_TARGETS "\0" -- - #endif diff --git a/sources b/sources index 0fa4df0..1ef8db1 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.10-rc3.tar.bz2) = 920190c47faca085c44fbd747669379f47461e3a3de5041e6a0d28d073116f1b18b0711876fb3c49eacd130e6fd2aa9d5ec84cb5fe0b2f7617b2438804317e81 +SHA512 (u-boot-2023.10.tar.bz2) = f238a69b9cc08ee0a69ea8ca2fa26975f2f2ede14e978b4db274b1e4095e43af0052307ac39034658a72ec9706951cd03c0f316d0591f391adecaf2cc9496fc4 diff --git a/uboot-tools.spec b/uboot-tools.spec index 478b255..d4ae06f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -16,13 +16,12 @@ ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards -# Fedoraisms patches -# Needed to find DT on boot partition that's not the first partition -Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch1: uefi-Boot-var-automatic-management-for-removable-medias.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch Patch3: disable-VBE-by-default.patch Patch4: enable-bootmenu-by-default.patch Patch5: Add-video-damage-tracking.patch +Patch6: bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support @@ -30,7 +29,6 @@ Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch #Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch -Patch13: rpi-Convert-to-standard-boot.patch BuildRequires: bc BuildRequires: bison @@ -215,6 +213,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Oct 02 2023 Peter Robinson - 2023.10-0.7 +- Update to 2023.10 GA +- Some upstream fixes + * Mon Aug 21 2023 Peter Robinson - 2023.10-0.4.rc3 - Update to 2023.10 RC3 diff --git a/uefi-Boot-var-automatic-management-for-removable-medias.patch b/uefi-Boot-var-automatic-management-for-removable-medias.patch new file mode 100644 index 0000000..aa8db6c --- /dev/null +++ b/uefi-Boot-var-automatic-management-for-removable-medias.patch @@ -0,0 +1,550 @@ +From patchwork Mon Oct 16 06:45:24 2023 +Content-Type: text/plain; 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+ Sun, 15 Oct 2023 23:47:07 -0700 (PDT) +Received: from localhost ([164.70.16.189]) by smtp.gmail.com with ESMTPSA id + fa13-20020a056a002d0d00b006b1c14a493fsm5242447pfb.71.2023.10.15.23.47.06 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Sun, 15 Oct 2023 23:47:06 -0700 (PDT) +From: Masahisa Kojima +To: u-boot@lists.denx.de +Cc: Heinrich Schuchardt , + Ilias Apalodimas , + Simon Glass , + Takahiro Akashi , + Michal Simek , Raymond Mao , + Masahisa Kojima , + Joao Marcos Costa , + Thomas Petazzoni , + Miquel Raynal +Subject: [PATCH v7 7/9] Boot var automatic management for removable medias +Date: Mon, 16 Oct 2023 15:45:24 +0900 +Message-Id: <20231016064526.2410856-8-masahisa.kojima@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20231016064526.2410856-1-masahisa.kojima@linaro.org> +References: <20231016064526.2410856-1-masahisa.kojima@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Raymond Mao + +Changes for complying to EFI spec §3.5.1.1 +'Removable Media Boot Behavior'. +Boot variables can be automatically generated during a removable +media is probed. At the same time, unused boot variables will be +detected and removed. + +Please note that currently the function 'efi_disk_remove' has no +ability to distinguish below two scenarios +a) Unplugging of a removable media under U-Boot +b) U-Boot exiting and booting an OS +Thus currently the boot variables management is not added into +'efi_disk_remove' to avoid boot options being added/erased +repeatedly under scenario b) during power cycles +See TODO comments under function 'efi_disk_remove' for more details + +The original efi_secboot tests expect that BootOrder EFI variable +is not defined. With this commit, the BootOrder EFI variable is +automatically added when the disk is detected. The original +efi_secboot tests end up with unexpected failure. +The efi_secboot tests need to be modified to explicitly set +the BootOrder EFI variable. + +squashfs ls test is also affected by this modification, need to +clear the previous state before squashfs ls test starts. + +Co-developed-by: Masahisa Kojima +Signed-off-by: Masahisa Kojima +Signed-off-by: Raymond Mao +Reviewed-by: Heinrich Schuchardt +Reviewed-by: Ilias Apalodimas +Signed-off-by: Joao Marcos Costa +Reviewed-by: Joao Marcos Costa +--- + lib/efi_loader/efi_disk.c | 18 ++++++++ + lib/efi_loader/efi_setup.c | 7 ++++ + test/py/tests/test_efi_secboot/test_signed.py | 42 +++++++++---------- + .../test_efi_secboot/test_signed_intca.py | 14 +++---- + .../tests/test_efi_secboot/test_unsigned.py | 14 +++---- + .../test_fs/test_squashfs/test_sqfs_ls.py | 6 +++ + 6 files changed, 66 insertions(+), 35 deletions(-) + +diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c +index f0d76113b0..b808a7fe62 100644 +--- a/lib/efi_loader/efi_disk.c ++++ b/lib/efi_loader/efi_disk.c +@@ -690,6 +690,13 @@ int efi_disk_probe(void *ctx, struct event *event) + return -1; + } + ++ /* only do the boot option management when UEFI sub-system is initialized */ ++ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && efi_obj_list_initialized == EFI_SUCCESS) { ++ ret = efi_bootmgr_update_media_device_boot_option(); ++ if (ret != EFI_SUCCESS) ++ return -1; ++ } ++ + return 0; + } + +@@ -742,6 +749,17 @@ int efi_disk_remove(void *ctx, struct event *event) + dev_tag_del(dev, DM_TAG_EFI); + + return 0; ++ ++ /* ++ * TODO A flag to distinguish below 2 different scenarios of this ++ * function call is needed: ++ * a) Unplugging of a removable media under U-Boot ++ * b) U-Boot exiting and booting an OS ++ * In case of scenario a), efi_bootmgr_update_media_device_boot_option() ++ * needs to be invoked here to update the boot options and remove the ++ * unnecessary ones. ++ */ ++ + } + + /** +diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c +index e6de685e87..37359a77bb 100644 +--- a/lib/efi_loader/efi_setup.c ++++ b/lib/efi_loader/efi_setup.c +@@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void) + if (ret != EFI_SUCCESS) + goto out; + ++ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) { ++ /* update boot option after variable service initialized */ ++ ret = efi_bootmgr_update_media_device_boot_option(); ++ if (ret != EFI_SUCCESS) ++ goto out; ++ } ++ + /* Define supported languages */ + ret = efi_init_platform_lang(); + if (ret != EFI_SUCCESS) +diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py +index ca52e853d8..2f862a259a 100644 +--- a/test/py/tests/test_efi_secboot/test_signed.py ++++ b/test/py/tests/test_efi_secboot/test_signed.py +@@ -29,7 +29,7 @@ class TestEfiSignedImage(object): + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % disk_img, + 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -37,7 +37,7 @@ class TestEfiSignedImage(object): + # Test Case 1b, run unsigned image if no PK + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 2', ++ 'efidebug boot order 2', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -59,13 +59,13 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert('\'HELLO1\' failed' in ''.join(output)) + assert('efi_start_image() returned: 26' in ''.join(output)) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 2', ++ 'efidebug boot order 2', + 'efidebug test bootmgr']) + assert '\'HELLO2\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -77,12 +77,12 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 2', ++ 'efidebug boot order 2', + 'efidebug test bootmgr']) + assert '\'HELLO2\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -105,7 +105,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -117,7 +117,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -143,7 +143,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -170,7 +170,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -181,7 +181,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -193,7 +193,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -205,7 +205,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize dbx']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -230,7 +230,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -254,7 +254,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -265,7 +265,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -279,7 +279,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -307,7 +307,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -330,7 +330,7 @@ class TestEfiSignedImage(object): + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -349,7 +349,7 @@ class TestEfiSignedImage(object): + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % disk_img, + 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld_forged.efi.signed -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert('hELLO, world!' in ''.join(output)) + +@@ -364,7 +364,7 @@ class TestEfiSignedImage(object): + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK']) + assert 'Failed to set EFI variable' not in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert(not 'hELLO, world!' in ''.join(output)) + assert('\'HELLO1\' failed' in ''.join(output)) +diff --git a/test/py/tests/test_efi_secboot/test_signed_intca.py b/test/py/tests/test_efi_secboot/test_signed_intca.py +index d8d599d22f..8d9a5f3e7f 100644 +--- a/test/py/tests/test_efi_secboot/test_signed_intca.py ++++ b/test/py/tests/test_efi_secboot/test_signed_intca.py +@@ -40,7 +40,7 @@ class TestEfiSignedImageIntca(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO_a host 0:1 /helloworld.efi.signed_a -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO_a\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -49,7 +49,7 @@ class TestEfiSignedImageIntca(object): + # Test Case 1b, signed and authenticated by root CA + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 2 HELLO_ab host 0:1 /helloworld.efi.signed_ab -s ""', +- 'efidebug boot next 2', ++ 'efidebug boot order 2', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -71,7 +71,7 @@ class TestEfiSignedImageIntca(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO_abc\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -81,7 +81,7 @@ class TestEfiSignedImageIntca(object): + output = u_boot_console.run_command_list([ + 'fatload host 0:1 4000000 db_b.auth', + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO_abc\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +@@ -91,7 +91,7 @@ class TestEfiSignedImageIntca(object): + output = u_boot_console.run_command_list([ + 'fatload host 0:1 4000000 db_c.auth', + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -117,7 +117,7 @@ class TestEfiSignedImageIntca(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'Hello, world!' in ''.join(output) + # Or, +@@ -129,7 +129,7 @@ class TestEfiSignedImageIntca(object): + output = u_boot_console.run_command_list([ + 'fatload host 0:1 4000000 dbx_c.auth', + 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert '\'HELLO_abc\' failed' in ''.join(output) + assert 'efi_start_image() returned: 26' in ''.join(output) +diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py +index df63f0df08..7c078f220d 100644 +--- a/test/py/tests/test_efi_secboot/test_unsigned.py ++++ b/test/py/tests/test_efi_secboot/test_unsigned.py +@@ -36,11 +36,11 @@ class TestEfiUnsignedImage(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'efi_start_image() returned: 26' in ''.join(output) + assert 'Hello, world!' not in ''.join(output) +@@ -65,7 +65,7 @@ class TestEfiUnsignedImage(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert 'Hello, world!' in ''.join(output) + +@@ -89,11 +89,11 @@ class TestEfiUnsignedImage(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'efi_start_image() returned: 26' in ''.join(output) + assert 'Hello, world!' not in ''.join(output) +@@ -107,11 +107,11 @@ class TestEfiUnsignedImage(object): + + output = u_boot_console.run_command_list([ + 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'bootefi bootmgr']) + assert '\'HELLO\' failed' in ''.join(output) + output = u_boot_console.run_command_list([ +- 'efidebug boot next 1', ++ 'efidebug boot order 1', + 'efidebug test bootmgr']) + assert 'efi_start_image() returned: 26' in ''.join(output) + assert 'Hello, world!' not in ''.join(output) +diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py +index 527a556ed8..3b8118104f 100644 +--- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py ++++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py +@@ -118,6 +118,12 @@ def test_sqfs_ls(u_boot_console): + """ + build_dir = u_boot_console.config.build_dir + ++ # If the EFI subsystem is enabled, default file(e.g. EFI/BOOT/BOOTAA64.EFI) ++ # is scanned when the new disk is detected. This ends up with the unexpected ++ # output at the first 'sqfsls' command. ++ # Clear the previous state. ++ u_boot_console.restart_uboot() ++ + # setup test environment + check_mksquashfs_version() + generate_sqfs_src_dir(build_dir) From d9dd20bdd05472ae2e3d0a81e6e5469d69341887 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 23 Oct 2023 15:42:39 +0100 Subject: [PATCH 238/351] Further potential upstream fixes --- ...all-bootdevs-in-a-boot_targets-entry.patch | 213 ------ ...d-Test-and-boot_targets-improvements.patch | 626 ++++++++++++++++++ uboot-tools.spec | 10 +- 3 files changed, 633 insertions(+), 216 deletions(-) delete mode 100644 bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch create mode 100644 bootstd-Test-and-boot_targets-improvements.patch diff --git a/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch b/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch deleted file mode 100644 index 8ab2759..0000000 --- a/bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch +++ /dev/null @@ -1,213 +0,0 @@ -From patchwork Sat Sep 23 20:50:15 2023 -Content-Type: text/plain; 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- Sat, 23 Sep 2023 13:50:19 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Date Huang , Tom Rini , - =?utf-8?q?Vincent_Stehl=C3=A9?= , - Simon Glass -Subject: [PATCH] bootstd: Scan all bootdevs in a boot_targets entry -Date: Sat, 23 Sep 2023 14:50:15 -0600 -Message-ID: <20230923205017.1754340-1-sjg@chromium.org> -X-Mailer: git-send-email 2.42.0.515.g380fc7ccd1-goog -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -When the boot_targets environment variable is used with the distro-boot -scripts, each device is included individually. For example, if there -are three mmc devices, then we will have something like: - - boot_targets="mmc0 mmc1 mmc2" - -In contrast, standard boot supports specifying just the uclass, i.e.: - - boot_targets="mmc" - -The intention is that this should scan all MMC devices, but in fact it -currently only scans the first. - -Update the logic to handle this case, without required BOOTSTD_FULL to -be enabled. - -I believe at least three people reported this, but I found two. - -Signed-off-by: Simon Glass -Reported-by: Date Huang -Reported-by: Vincent Stehlé ---- - - boot/bootdev-uclass.c | 3 ++- - boot/bootflow.c | 21 +++++++++++++++++++-- - test/boot/bootdev.c | 10 ++++++++++ - 3 files changed, 31 insertions(+), 3 deletions(-) - -diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c -index fa52bc3a9c4e..5a60cf223c79 100644 ---- a/boot/bootdev-uclass.c -+++ b/boot/bootdev-uclass.c -@@ -460,10 +460,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp, - * if no sequence number was provided, we must scan all - * bootdevs for this media uclass - */ -- if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1) -+ if (seq == -1) - method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS; - if (method_flagsp) - *method_flagsp = method_flags; -+ log_debug("method flags %x\n", method_flags); - return 0; - } - log_debug("- no device in %s\n", media->name); -diff --git a/boot/bootflow.c b/boot/bootflow.c -index 81b5829d5b37..74abf3e17d7e 100644 ---- a/boot/bootflow.c -+++ b/boot/bootflow.c -@@ -260,8 +260,25 @@ static int iter_incr(struct bootflow_iter *iter) - } else { - log_debug("labels %p\n", iter->labels); - if (iter->labels) { -- ret = bootdev_next_label(iter, &dev, -- &method_flags); -+ /* -+ * when the label is "mmc" we want to scan all -+ * mmc bootdevs, not just the first. See -+ * bootdev_find_by_label() where this flag is -+ * set up -+ */ -+ if (iter->method_flags & BOOTFLOW_METHF_SINGLE_UCLASS) { -+ uclass_next_device(&dev); -+ log_debug("looking for next device %s: %s\n", -+ iter->dev->name, -+ dev ? dev->name : ""); -+ } else { -+ dev = NULL; -+ } -+ if (!dev) { -+ log_debug("looking at next label\n"); -+ ret = bootdev_next_label(iter, &dev, -+ &method_flags); -+ } - } else { - ret = bootdev_next_prio(iter, &dev); - method_flags = 0; -diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c -index 6b29213416db..c5f14a7a1323 100644 ---- a/test/boot/bootdev.c -+++ b/test/boot/bootdev.c -@@ -221,6 +221,16 @@ static int bootdev_test_order(struct unit_test_state *uts) - ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); - bootflow_iter_uninit(&iter); - -+ /* Make sure it scans a bootdevs in each target */ -+ ut_assertok(env_set("boot_targets", "mmc spi")); -+ ut_asserteq(0, bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); -+ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -+ ut_asserteq(3, iter.num_devs); -+ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); -+ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); -+ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); -+ bootflow_iter_uninit(&iter); -+ - return 0; - } - BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); diff --git a/bootstd-Test-and-boot_targets-improvements.patch b/bootstd-Test-and-boot_targets-improvements.patch new file mode 100644 index 0000000..68f1223 --- /dev/null +++ b/bootstd-Test-and-boot_targets-improvements.patch @@ -0,0 +1,626 @@ +From patchwork Mon Oct 23 07:02:11 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1853514 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 + header.s=google header.b=ft1tNW5r; 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+ +-/* Check bootdev ordering with the bootdev-order property */ ++/* ++ * Check bootdev ordering with the bootdev-order property and boot_targets ++ * environment variable ++ */ + static int bootdev_test_order(struct unit_test_state *uts) + { + struct bootflow_iter iter; + struct bootflow bflow; + ++ test_set_skip_delays(true); ++ ++ /* Start up USB which gives us three additional bootdevs */ ++ usb_started = false; ++ ut_assertok(run_command("usb start", 0)); ++ + /* + * First try the order set by the bootdev-order property + * Like all sandbox unit tests this relies on the devicetree setting up +@@ -213,12 +222,14 @@ static int bootdev_test_order(struct unit_test_state *uts) + bootflow_iter_uninit(&iter); + + /* Use the environment variable to override it */ +- ut_assertok(env_set("boot_targets", "mmc1 mmc2")); ++ ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb")); + ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); + ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); +- ut_asserteq(2, iter.num_devs); ++ ut_asserteq(3, iter.num_devs); + ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name); + ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); ++ ut_asserteq_str("usb_mass_storage.lun0.bootdev", ++ iter.dev_used[2]->name); + bootflow_iter_uninit(&iter); + + return 0; + +From patchwork Mon Oct 23 07:02:12 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1853515 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 + header.s=google header.b=aYxxWBdy; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; 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+ Mon, 23 Oct 2023 00:03:54 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Cc: Heinrich Schuchardt , + Guillaume Gardet , Tom Rini , + Simon Glass +Subject: [PATCH 3/4] bootstd: Correct logic for single uclass +Date: Mon, 23 Oct 2023 00:02:12 -0700 +Message-ID: + <20231023000211.3.Icefe7db8f3c1ddc3624f95ca5dc89b81ef97eab4@changeid> +X-Mailer: git-send-email 2.42.0.655.g421f12c284-goog +In-Reply-To: <20231023070216.394709-1-sjg@chromium.org> +References: <20231023070216.394709-1-sjg@chromium.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +The current logic for "bootflow mmc" is flawed since it checks the +uclass of the bootdev instead of its parent, the media device. Correct +this and add a test that covers this scenario. + +Signed-off-by: Simon Glass +--- + + boot/bootflow.c | 24 ++++++++++++++++++++++-- + test/boot/bootdev.c | 13 +++++++++++++ + 2 files changed, 35 insertions(+), 2 deletions(-) + +diff --git a/boot/bootflow.c b/boot/bootflow.c +index 6ef62e1d1896..7f5b0e942078 100644 +--- a/boot/bootflow.c ++++ b/boot/bootflow.c +@@ -155,6 +155,27 @@ static void bootflow_iter_set_dev(struct bootflow_iter *iter, + } + } + ++/** ++ * scan_next_in_uclass() - Scan for the next bootdev in the same media uclass ++ * ++ * Move through the following bootdevs until we find another in this media ++ * uclass, or run out ++ * ++ * @devp: On entry, the device to check, on exit the new device, or NULL if ++ * there is none ++ */ ++static void scan_next_in_uclass(struct udevice **devp) ++{ ++ struct udevice *dev = *devp; ++ enum uclass_id cur_id = device_get_uclass_id(dev->parent); ++ ++ do { ++ uclass_find_next_device(&dev); ++ } while (dev && cur_id != device_get_uclass_id(dev->parent)); ++ ++ *devp = dev; ++} ++ + /** + * iter_incr() - Move to the next item (method, part, bootdev) + * +@@ -230,8 +251,7 @@ static int iter_incr(struct bootflow_iter *iter) + &method_flags); + } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && + (iter->flags & BOOTFLOWIF_SINGLE_UCLASS)) { +- /* Move to the next bootdev in this uclass */ +- uclass_find_next_device(&dev); ++ scan_next_in_uclass(&dev); + if (!dev) { + log_debug("finished uclass %s\n", + dev_get_uclass_name(dev)); +diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c +index 7228f545e9e6..637861748057 100644 +--- a/test/boot/bootdev.c ++++ b/test/boot/bootdev.c +@@ -232,6 +232,19 @@ static int bootdev_test_order(struct unit_test_state *uts) + iter.dev_used[2]->name); + bootflow_iter_uninit(&iter); + ++ /* Try a single uclass */ ++ ut_assertok(env_set("boot_targets", NULL)); ++ ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow)); ++ ut_asserteq(2, iter.num_devs); ++ ++ /* Now scan pass mmc1 and make sure that only mmc0 shows up */ ++ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); ++ ut_asserteq(3, iter.num_devs); ++ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); ++ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); ++ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); ++ bootflow_iter_uninit(&iter); ++ + return 0; + } + BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); + +From patchwork Mon Oct 23 07:02:13 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +X-Patchwork-Submitter: Simon Glass +X-Patchwork-Id: 1853516 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 + header.s=google header.b=g7MVFEGd; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; 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+ Mon, 23 Oct 2023 00:03:59 -0700 (PDT) +Received: from sjg1.roam.corp.google.com ([202.144.206.130]) + by smtp.gmail.com with ESMTPSA id + u187-20020a6279c4000000b006bde8e1f0adsm5910841pfc.98.2023.10.23.00.03.55 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Mon, 23 Oct 2023 00:03:59 -0700 (PDT) +From: Simon Glass +To: U-Boot Mailing List +Cc: Heinrich Schuchardt , + Guillaume Gardet , Tom Rini , + Simon Glass , Date Huang , + =?utf-8?q?Vincent_Stehl=C3=A9?= , + Ivan Ivanov +Subject: [PATCH 4/4] bootstd: Scan all bootdevs in a boot_targets entry (take + 2) +Date: Mon, 23 Oct 2023 00:02:13 -0700 +Message-ID: + <20231023000211.4.Ie4e7ba290d4957a88bebf306ca39f46618d9c363@changeid> +X-Mailer: git-send-email 2.42.0.655.g421f12c284-goog +In-Reply-To: <20231023070216.394709-1-sjg@chromium.org> +References: <20231023070216.394709-1-sjg@chromium.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +When the boot_targets environment variable is used with the distro-boot +scripts, each device is included individually. For example, if there +are three mmc devices, then we will have something like: + + boot_targets="mmc0 mmc1 mmc2" + +In contrast, standard boot supports specifying just the uclass, i.e.: + + boot_targets="mmc" + +The intention is that this should scan all MMC devices, but in fact it +currently only scans the first. + +Update the logic to handle this case, without required BOOTSTD_FULL to +be enabled. + +Signed-off-by: Simon Glass +Reported-by: Date Huang +Reported-by: Vincent Stehlé +Reported-by: Ivan Ivanov +--- + + boot/bootdev-uclass.c | 3 ++- + boot/bootflow.c | 22 ++++++++++++++++++++-- + test/boot/bootdev.c | 32 ++++++++++++++++++++++++++++++-- + 3 files changed, 52 insertions(+), 5 deletions(-) + +diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c +index 974ddee5d2fa..44ae98a9269c 100644 +--- a/boot/bootdev-uclass.c ++++ b/boot/bootdev-uclass.c +@@ -469,10 +469,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp, + * if no sequence number was provided, we must scan all + * bootdevs for this media uclass + */ +- if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1) ++ if (seq == -1) + method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS; + if (method_flagsp) + *method_flagsp = method_flags; ++ log_debug("method flags %x\n", method_flags); + return 0; + } + log_debug("- no device in %s\n", media->name); +diff --git a/boot/bootflow.c b/boot/bootflow.c +index 7f5b0e942078..be543c8588cc 100644 +--- a/boot/bootflow.c ++++ b/boot/bootflow.c +@@ -280,8 +280,26 @@ static int iter_incr(struct bootflow_iter *iter) + } else { + log_debug("labels %p\n", iter->labels); + if (iter->labels) { +- ret = bootdev_next_label(iter, &dev, +- &method_flags); ++ /* ++ * when the label is "mmc" we want to scan all ++ * mmc bootdevs, not just the first. See ++ * bootdev_find_by_label() where this flag is ++ * set up ++ */ ++ if (iter->method_flags & ++ BOOTFLOW_METHF_SINGLE_UCLASS) { ++ scan_next_in_uclass(&dev); ++ log_debug("looking for next device %s: %s\n", ++ iter->dev->name, ++ dev ? dev->name : ""); ++ } else { ++ dev = NULL; ++ } ++ if (!dev) { ++ log_debug("looking at next label\n"); ++ ret = bootdev_next_label(iter, &dev, ++ &method_flags); ++ } + } else { + ret = bootdev_next_prio(iter, &dev); + method_flags = 0; +diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c +index 637861748057..0702fccdae60 100644 +--- a/test/boot/bootdev.c ++++ b/test/boot/bootdev.c +@@ -225,7 +225,7 @@ static int bootdev_test_order(struct unit_test_state *uts) + ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb")); + ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); + ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); +- ut_asserteq(3, iter.num_devs); ++ ut_asserteq(5, iter.num_devs); + ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name); + ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); + ut_asserteq_str("usb_mass_storage.lun0.bootdev", +@@ -237,7 +237,20 @@ static int bootdev_test_order(struct unit_test_state *uts) + ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow)); + ut_asserteq(2, iter.num_devs); + +- /* Now scan pass mmc1 and make sure that only mmc0 shows up */ ++ /* Now scan past mmc1 and make sure that only mmc0 shows up */ ++ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); ++ ut_asserteq(3, iter.num_devs); ++ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); ++ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); ++ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); ++ bootflow_iter_uninit(&iter); ++ ++ /* Try a single uclass with boot_targets */ ++ ut_assertok(env_set("boot_targets", "mmc")); ++ ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); ++ ut_asserteq(2, iter.num_devs); ++ ++ /* Now scan past mmc1 and make sure that only mmc0 shows up */ + ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); + ut_asserteq(3, iter.num_devs); + ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); +@@ -245,6 +258,21 @@ static int bootdev_test_order(struct unit_test_state *uts) + ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); + bootflow_iter_uninit(&iter); + ++ /* Try a single uclass with boot_targets */ ++ ut_assertok(env_set("boot_targets", "mmc usb")); ++ ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); ++ ut_asserteq(2, iter.num_devs); ++ ++ /* Now scan past mmc1 and make sure that the 3 USB devices show up */ ++ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); ++ ut_asserteq(6, iter.num_devs); ++ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); ++ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); ++ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); ++ ut_asserteq_str("usb_mass_storage.lun0.bootdev", ++ iter.dev_used[3]->name); ++ bootflow_iter_uninit(&iter); ++ + return 0; + } + BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); diff --git a/uboot-tools.spec b/uboot-tools.spec index d4ae06f..931adf6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2023.10 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -16,12 +16,13 @@ ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards -Patch1: uefi-Boot-var-automatic-management-for-removable-medias.patch +Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: smbios-Simplify-reporting-of-unknown-values.patch Patch3: disable-VBE-by-default.patch Patch4: enable-bootmenu-by-default.patch Patch5: Add-video-damage-tracking.patch -Patch6: bootstd-Scan-all-bootdevs-in-a-boot_targets-entry.patch +Patch6: uefi-Boot-var-automatic-management-for-removable-medias.patch +Patch7: bootstd-Test-and-boot_targets-improvements.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support @@ -213,6 +214,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Mon Oct 23 2023 Peter Robinson - 2023.10-0.8 +- Further potential upstream fixes + * Mon Oct 02 2023 Peter Robinson - 2023.10-0.7 - Update to 2023.10 GA - Some upstream fixes From f1d098b8a047795f7e510498357361467f618fab Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 31 Oct 2023 11:41:30 +0000 Subject: [PATCH 239/351] Add epoch --- uboot-tools.spec | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 931adf6..4706710 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,8 @@ Name: uboot-tools Version: 2023.10 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 0.9%{?candidate:.%{candidate}}%{?dist} +Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -214,6 +215,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Tue Oct 31 2023 Peter Robinson - 1:2023.10-0.9 +- Rebuild + * Mon Oct 23 2023 Peter Robinson - 2023.10-0.8 - Further potential upstream fixes From 69521310e4200bb293a5a3cafa30926a9caa4885 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 24 Nov 2023 17:34:22 +0000 Subject: [PATCH 240/351] 2024.01 RC3 --- ...Simplify-reporting-of-unknown-values.patch | 115 ++++ ...to-the-default-DT-if-sysinfo-nodes-a.patch | 242 ++++++++ ...Simplify-reporting-of-unknown-values.patch | 544 ------------------ sources | 2 +- uboot-tools.spec | 20 +- 5 files changed, 370 insertions(+), 553 deletions(-) create mode 100644 0001-smbios-Simplify-reporting-of-unknown-values.patch create mode 100644 0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch delete mode 100644 smbios-Simplify-reporting-of-unknown-values.patch diff --git a/0001-smbios-Simplify-reporting-of-unknown-values.patch b/0001-smbios-Simplify-reporting-of-unknown-values.patch new file mode 100644 index 0000000..6fd5dde --- /dev/null +++ b/0001-smbios-Simplify-reporting-of-unknown-values.patch @@ -0,0 +1,115 @@ +From 6eb1fce7ca692b211ca467040cfe25a750ecc0fe Mon Sep 17 00:00:00 2001 +From: Ilias Apalodimas +Date: Tue, 6 Sep 2022 16:44:25 +0300 +Subject: [PATCH 1/2] smbios: Simplify reporting of unknown values + +If a value is not valid during the DT or SYSINFO parsing, we explicitly +set that to "Unknown Product" and "Unknown" for the product and +manufacturer respectively. It's cleaner if we move the checks insisde +smbios_add_string() and always report "Unknown" regardless of the missing +field. + +pre-patch dmidecode + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown Product + Version: Not Specified + Serial Number: Not Specified + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Not Specified + Family: Not Specified + +[...] + +post-patch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown +[...] + +Signed-off-by: Ilias Apalodimas +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson +--- + lib/smbios.c | 17 +++-------------- + 1 file changed, 3 insertions(+), 14 deletions(-) + +diff --git a/lib/smbios.c b/lib/smbios.c +index d7f4999e8b2a..fcc8686993ef 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -102,7 +102,7 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + int i = 1; + char *p = ctx->eos; + +- if (!*str) ++ if (!str || !*str) + str = "Unknown"; + + for (;;) { +@@ -151,8 +151,7 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + const char *str; + + str = ofnode_read_string(ctx->node, prop); +- if (str) +- return smbios_add_string(ctx, str); ++ return smbios_add_string(ctx, str); + } + + return 0; +@@ -231,7 +230,7 @@ static int smbios_write_type0(ulong *current, int handle, + t->vendor = smbios_add_string(ctx, "U-Boot"); + + t->bios_ver = smbios_add_prop(ctx, "version"); +- if (!t->bios_ver) ++ if (!strcmp(ctx->last_str, "Unknown")) + t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); + if (t->bios_ver) + gd->smbios_version = ctx->last_str; +@@ -281,11 +280,7 @@ static int smbios_write_type1(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", + SYSINFO_ID_SMBIOS_SYSTEM_VERSION); + if (serial_str) { +@@ -315,11 +310,7 @@ static int smbios_write_type2(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); + t->version = smbios_add_prop_si(ctx, "version", + SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); + t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); +@@ -344,8 +335,6 @@ static int smbios_write_type3(ulong *current, int handle, + fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); + smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); + t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; + t->bootup_state = SMBIOS_STATE_SAFE; + t->power_supply_state = SMBIOS_STATE_SAFE; +-- +2.40.1 + diff --git a/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch b/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch new file mode 100644 index 0000000..a256b9b --- /dev/null +++ b/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch @@ -0,0 +1,242 @@ +From ed67997890981fda4f859cb96e523a0ec5b58042 Mon Sep 17 00:00:00 2001 +From: Ilias Apalodimas +Date: Tue, 6 Sep 2022 16:44:26 +0300 +Subject: [PATCH 2/2] smbios: Fallback to the default DT if sysinfo nodes are + missing + +In order to fill in the SMBIOS tables U-Boot currently relies on a +"u-boot,sysinfo-smbios" compatible node. This is fine for the boards +that already include such nodes. However with some recent EFI changes, +the majority of boards can boot up distros, which usually rely on +things like dmidecode etc for their reporting. For boards that +lack this special node the SMBIOS output looks like: + +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +This looks problematic since most of the info are "Unknown". The DT spec +specifies standard properties containing relevant information like +'model' and 'compatible' for which the suggested format is +. So let's add a last resort to our current +smbios parsing. If none of the sysinfo properties are found, we can +scan the root node for 'model' and 'compatible'. + +pre-patch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Not Specified + Asset Tag: Unknown + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + +Handle 0x0003, DMI type 3, 21 bytes +Chassis Information + Manufacturer: Unknown + Type: Desktop + Lock: Not Present + Version: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Boot-up State: Safe + Power Supply State: Safe + Thermal State: Safe + Security Status: None + OEM Information: 0x00000000 + Height: Unspecified + Number Of Power Cords: Unspecified + Contained Elements: 0 + + +post-pastch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: socionext,developer-box + Product Name: Socionext Developer Box + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +Handle 0x0002, DMI type 2, 14 bytes +Base Board Information + Manufacturer: socionext,developer-box + Product Name: Socionext Developer Box + Version: Unknown + Serial Number: Not Specified + Asset Tag: Unknown + Features: + Board is a hosting board + Location In Chassis: Not Specified + Chassis Handle: 0x0000 + Type: Motherboard + +Handle 0x0003, DMI type 3, 21 bytes +Chassis Information + Manufacturer: socionext,developer-box + Type: Desktop + Lock: Not Present + Version: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Boot-up State: Safe + Power Supply State: Safe + Thermal State: Safe + Security Status: None + OEM Information: 0x00000000 + Height: Unspecified + Number Of Power Cords: Unspecified + Contained Elements: 0 + + +Signed-off-by: Ilias Apalodimas +Reviewed-by: Peter Robinson +Tested-by: Peter Robinson +--- + lib/smbios.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 64 insertions(+), 4 deletions(-) + +diff --git a/lib/smbios.c b/lib/smbios.c +index fcc8686993ef..9c8e34625e65 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -9,11 +9,13 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #ifdef CONFIG_CPU + #include + #include +@@ -43,6 +45,25 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++/** ++ * struct map_sysinfo - Mapping of sysinfo strings to DT ++ * ++ * @sysinfo_str: sysinfo string ++ * @dt_str: DT string ++ * @max: Max index of the tokenized string to pick. First element is 0 ++ * ++ */ ++struct map_sysinfo { ++ const char *sysinfo_str; ++ const char *dt_str; ++ int max; ++}; ++ ++static const struct map_sysinfo sysinfo_to_dt[] = { ++ { .sysinfo_str = "product", .dt_str = "model", 1 }, ++ { .sysinfo_str = "manufacturer", .dt_str = "compatible", 0 }, ++}; ++ + /** + * struct smbios_ctx - context for writing SMBIOS tables + * +@@ -87,6 +108,18 @@ struct smbios_write_method { + const char *subnode_name; + }; + ++static const struct map_sysinfo *convert_sysinfo_to_dt(const char *sysinfo_str) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(sysinfo_to_dt); i++) { ++ if (!strcmp(sysinfo_str, sysinfo_to_dt[i].sysinfo_str)) ++ return &sysinfo_to_dt[i]; ++ } ++ ++ return NULL; ++} ++ + /** + * smbios_add_string() - add a string to the string area + * +@@ -139,19 +172,46 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + int sysinfo_id) + { ++ int ret = 0; ++ + if (sysinfo_id && ctx->dev) { + char val[SMBIOS_STR_MAX]; +- int ret; + + ret = sysinfo_get_str(ctx->dev, sysinfo_id, sizeof(val), val); + if (!ret) + return smbios_add_string(ctx, val); + } ++ + if (IS_ENABLED(CONFIG_OF_CONTROL)) { +- const char *str; ++ const char *str = NULL; ++ char str_tmp[128]; ++ char *token; + +- str = ofnode_read_string(ctx->node, prop); +- return smbios_add_string(ctx, str); ++ /* ++ * If the node is not valid fallback and try the entire DT ++ * so we can at least fill in maufacturer and board type ++ */ ++ if (!ofnode_valid(ctx->node)) { ++ const struct map_sysinfo *nprop; ++ ++ nprop = convert_sysinfo_to_dt(prop); ++ if (nprop) { ++ int cnt = 0; ++ ++ str = ofnode_read_string(ofnode_root(), nprop->dt_str); ++ strncpy(str_tmp, str, sizeof(str_tmp)); ++ token = strtok(str_tmp, ","); ++ while (token != NULL && cnt <= nprop->max) { ++ str = token; ++ token = strtok(NULL, ","); ++ cnt++; ++ } ++ } ++ } else { ++ str = ofnode_read_string(ctx->node, prop); ++ } ++ ret = smbios_add_string(ctx, str); ++ return ret; + } + + return 0; +-- +2.40.1 + diff --git a/smbios-Simplify-reporting-of-unknown-values.patch b/smbios-Simplify-reporting-of-unknown-values.patch deleted file mode 100644 index 0aef8e7..0000000 --- a/smbios-Simplify-reporting-of-unknown-values.patch +++ /dev/null @@ -1,544 +0,0 @@ -From patchwork Tue Sep 6 13:44:25 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Ilias Apalodimas -X-Patchwork-Id: 1674857 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 - header.s=google header.b=wUY2RcfH; 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- Tue, 06 Sep 2022 06:44:34 -0700 (PDT) -From: Ilias Apalodimas -To: u-boot@lists.denx.de -Cc: trini@konsulko.com, sjg@chromium.org, heinrich.schuchardt@canonical.com, - pbrobinson@gmail.com, Ilias Apalodimas -Subject: [PATCH 1/2] smbios: Simplify reporting of unknown values -Date: Tue, 6 Sep 2022 16:44:25 +0300 -Message-Id: <20220906134426.53748-1-ilias.apalodimas@linaro.org> -X-Mailer: git-send-email 2.37.2 -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean - -If a value is not valid during the DT or SYSINFO parsing, we explicitly -set that to "Unknown Product" and "Unknown" for the product and -manufacturer respectively. It's cleaner if we move the checks insisde -smbios_add_string() and always report "Unknown" regardless of the missing -field. - -pre-patch dmidecode - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown Product - Version: Not Specified - Serial Number: Not Specified - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Not Specified - Family: Not Specified - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: Unknown - Product Name: Unknown Product - Version: Not Specified - Serial Number: Not Specified - Asset Tag: Not Specified - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - - -post-patch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Not Specified - Asset Tag: Unknown - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - -Signed-off-by: Ilias Apalodimas ---- - lib/smbios.c | 17 +++-------------- - 1 file changed, 3 insertions(+), 14 deletions(-) - -diff --git a/lib/smbios.c b/lib/smbios.c -index d7f4999e8b2a..fcc8686993ef 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -102,7 +102,7 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - int i = 1; - char *p = ctx->eos; - -- if (!*str) -+ if (!str || !*str) - str = "Unknown"; - - for (;;) { -@@ -151,8 +151,7 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - const char *str; - - str = ofnode_read_string(ctx->node, prop); -- if (str) -- return smbios_add_string(ctx, str); -+ return smbios_add_string(ctx, str); - } - - return 0; -@@ -231,7 +230,7 @@ static int smbios_write_type0(ulong *current, int handle, - t->vendor = smbios_add_string(ctx, "U-Boot"); - - t->bios_ver = smbios_add_prop(ctx, "version"); -- if (!t->bios_ver) -+ if (!strcmp(ctx->last_str, "Unknown")) - t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); - if (t->bios_ver) - gd->smbios_version = ctx->last_str; -@@ -281,11 +280,7 @@ static int smbios_write_type1(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", - SYSINFO_ID_SMBIOS_SYSTEM_VERSION); - if (serial_str) { -@@ -315,11 +310,7 @@ static int smbios_write_type2(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", - SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); - t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); -@@ -344,8 +335,6 @@ static int smbios_write_type3(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - smbios_set_eos(ctx, t->eos); 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- Tue, 06 Sep 2022 06:44:48 -0700 (PDT) -From: Ilias Apalodimas -To: u-boot@lists.denx.de -Cc: trini@konsulko.com, sjg@chromium.org, heinrich.schuchardt@canonical.com, - pbrobinson@gmail.com, Ilias Apalodimas -Subject: [PATCH 2/2] smbios: Fallback to the default DT if sysinfo nodes are - missing -Date: Tue, 6 Sep 2022 16:44:26 +0300 -Message-Id: <20220906134426.53748-2-ilias.apalodimas@linaro.org> -X-Mailer: git-send-email 2.37.2 -In-Reply-To: <20220906134426.53748-1-ilias.apalodimas@linaro.org> -References: <20220906134426.53748-1-ilias.apalodimas@linaro.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean - -In order to fill in the SMBIOS tables U-Boot currently relies on a -"u-boot,sysinfo-smbios" compatible node. This is fine for the boards -that already include such nodes. However with some recent EFI changes, -the majority of boards can boot up distros, which usually rely on -things like dmidecode etc for their reporting. For boards that -lack this special node the SMBIOS output looks like: - -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -This looks problematic since most of the info are "Unknown". The DT spec -specifies standard properties containing relevant information like -'model' and 'compatible' for which the suggested format is -. So let's add a last resort to our current -smbios parsing. If none of the sysinfo properties are found, we can -scan the root node for 'model' and 'compatible'. - -pre-patch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Not Specified - Asset Tag: Unknown - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - -Handle 0x0003, DMI type 3, 21 bytes -Chassis Information - Manufacturer: Unknown - Type: Desktop - Lock: Not Present - Version: Not Specified - Serial Number: Not Specified - Asset Tag: Not Specified - Boot-up State: Safe - Power Supply State: Safe - Thermal State: Safe - Security Status: None - OEM Information: 0x00000000 - Height: Unspecified - Number Of Power Cords: Unspecified - Contained Elements: 0 - - -post-pastch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: socionext,developer-box - Product Name: Socionext Developer Box - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: socionext,developer-box - Product Name: Socionext Developer Box - Version: Unknown - Serial Number: Not Specified - Asset Tag: Unknown - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - -Handle 0x0003, DMI type 3, 21 bytes -Chassis Information - Manufacturer: socionext,developer-box - Type: Desktop - Lock: Not Present - Version: Not Specified - Serial Number: Not Specified - Asset Tag: Not Specified - Boot-up State: Safe - Power Supply State: Safe - Thermal State: Safe - Security Status: None - OEM Information: 0x00000000 - Height: Unspecified - Number Of Power Cords: Unspecified - Contained Elements: 0 - - -Signed-off-by: Ilias Apalodimas ---- - lib/smbios.c | 41 +++++++++++++++++++++++++++++++++++++++-- - 1 file changed, 39 insertions(+), 2 deletions(-) - -diff --git a/lib/smbios.c b/lib/smbios.c -index fcc8686993ef..f2eb961f514b 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -43,6 +43,20 @@ - - DECLARE_GLOBAL_DATA_PTR; - -+/** -+ * struct sysifno_to_dt - Mapping of sysinfo strings to DT -+ * -+ * @sysinfo_str: sysinfo string -+ * @dt_str: DT string -+ */ -+static const struct { -+ const char *sysinfo_str; -+ const char *dt_str; -+} sysifno_to_dt[] = { -+ { .sysinfo_str = "product", .dt_str = "model" }, -+ { .sysinfo_str = "manufacturer", .dt_str = "compatible" }, -+}; -+ - /** - * struct smbios_ctx - context for writing SMBIOS tables - * -@@ -87,6 +101,18 @@ struct smbios_write_method { - const char *subnode_name; - }; - -+static const char *convert_sysinfo_to_dt(const char *sysinfo_str) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(sysifno_to_dt); i++) { -+ if (!strcmp(sysinfo_str, sysifno_to_dt[i].sysinfo_str)) -+ return sysifno_to_dt[i].dt_str; -+ } -+ -+ return NULL; -+} -+ - /** - * smbios_add_string() - add a string to the string area - * -@@ -148,9 +174,20 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - return smbios_add_string(ctx, val); - } - if (IS_ENABLED(CONFIG_OF_CONTROL)) { -- const char *str; -+ const char *str = NULL; - -- str = ofnode_read_string(ctx->node, prop); -+ /* -+ * If the node is not valid fallback and try the entire DT -+ * so we can at least fill in maufacturer and board type -+ */ -+ if (!ofnode_valid(ctx->node)) { -+ const char *nprop = convert_sysinfo_to_dt(prop); -+ -+ if (nprop) -+ str = ofnode_read_string(ofnode_root(), nprop); -+ } else { -+ str = ofnode_read_string(ctx->node, prop); -+ } - return smbios_add_string(ctx, str); - } - diff --git a/sources b/sources index 1ef8db1..a04670b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2023.10.tar.bz2) = f238a69b9cc08ee0a69ea8ca2fa26975f2f2ede14e978b4db274b1e4095e43af0052307ac39034658a72ec9706951cd03c0f316d0591f391adecaf2cc9496fc4 +SHA512 (u-boot-2024.01-rc3.tar.bz2) = 51a45e6a0008ef04570b6357518c85fd22604be0090ad5bf1dc7c821eb34ea33441314c49128dd0bd3084406b7138497044bb47f7e57d38a680768fb9f2f6577 diff --git a/uboot-tools.spec b/uboot-tools.spec index 4706710..798f97d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2023.10 -Release: 0.9%{?candidate:.%{candidate}}%{?dist} +Version: 2024.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -18,12 +18,13 @@ Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candid Source1: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch2: smbios-Simplify-reporting-of-unknown-values.patch -Patch3: disable-VBE-by-default.patch -Patch4: enable-bootmenu-by-default.patch -Patch5: Add-video-damage-tracking.patch +Patch2: disable-VBE-by-default.patch +Patch3: 0001-smbios-Simplify-reporting-of-unknown-values.patch +Patch4: 0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch +Patch5: enable-bootmenu-by-default.patch Patch6: uefi-Boot-var-automatic-management-for-removable-medias.patch -Patch7: bootstd-Test-and-boot_targets-improvements.patch +#Patch6: Add-video-damage-tracking.patch +#Patch7: bootstd-Test-and-boot_targets-improvements.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support @@ -215,6 +216,9 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Fri Nov 24 2023 Peter Robinson - 1:2024.01-0.1.rc3 +- Update to 2024.01 RC3 + * Tue Oct 31 2023 Peter Robinson - 1:2023.10-0.9 - Rebuild From 2989b728b025d157b42b6a9c5e6f9664df1a590e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 25 Nov 2023 09:18:23 +0000 Subject: [PATCH 241/351] Rebase patches for new release --- Add-video-damage-tracking.patch | 2026 ++--------------- ...d-Test-and-boot_targets-improvements.patch | 626 ----- uboot-tools.spec | 3 +- 3 files changed, 150 insertions(+), 2505 deletions(-) delete mode 100644 bootstd-Test-and-boot_targets-improvements.patch diff --git a/Add-video-damage-tracking.patch b/Add-video-damage-tracking.patch index 5e78df8..7ba10f6 100644 --- a/Add-video-damage-tracking.patch +++ b/Add-video-damage-tracking.patch @@ -1,133 +1,8 @@ -From patchwork Mon Aug 21 13:50:58 2023 -Content-Type: text/plain; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.22 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:23 -0700 (PDT) +From 79c2ed100ee9b901d676567e73ea4ebde84f15bc Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 01/13] video: test: Split copy frame buffer check into a - function Date: Mon, 21 Aug 2023 16:50:58 +0300 -Message-Id: <20230821135111.3558478-2-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean +Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a + function While checking frame buffer contents, the video tests also check if the copy frame buffer contents match the main frame buffer. To test if only @@ -137,16 +12,13 @@ function that we can skip calling, since we won't want it to error on those mismatched cases. Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Add patch "video: test: Split copy frame buffer check into a function" - test/dm/video.c | 69 +++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 58 insertions(+), 11 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index d907f681600b..641a6250100a 100644 +index d907f681600..641a6250100 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -55,9 +55,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); @@ -427,138 +299,14 @@ index d907f681600b..641a6250100a 100644 return 0; } +-- +2.43.0 -From patchwork Mon Aug 21 13:50:59 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823644 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.24 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:26 -0700 (PDT) +From eb6a5cd225f0818e5dec2253e0c676142c3835a1 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 02/13] video: test: Support checking copy frame buffer - contents Date: Mon, 21 Aug 2023 16:50:59 +0300 -Message-Id: <20230821135111.3558478-3-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean +Subject: [PATCH 02/13] video: test: Support checking copy frame buffer + contents The video tests have a helper function to generate a pseudo-digest of frame buffer contents, but it only does so for the main one. There is @@ -571,16 +319,13 @@ Add a boolean argument to the existing helper function to indicate which frame buffer we want to inspect, and update the existing callers. Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Add patch "video: test: Support checking copy frame buffer contents" - test/dm/video.c | 76 ++++++++++++++++++++++++++----------------------- 1 file changed, 41 insertions(+), 35 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index 641a6250100a..b9ff3da10c18 100644 +index 641a6250100..b9ff3da10c1 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -57,22 +57,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); @@ -865,137 +610,14 @@ index 641a6250100a..b9ff3da10c18 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; +-- +2.43.0 -From patchwork Mon Aug 21 13:51:00 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823645 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.27 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:28 -0700 (PDT) +From 4c80b655e5c82acd1573e80668747d8ef25deb83 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 03/13] video: test: Test partial updates of hardware frame - buffer Date: Mon, 21 Aug 2023 16:51:00 +0300 -Message-Id: <20230821135111.3558478-4-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean +Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame + buffer With VIDEO_COPY enabled, only the modified parts of the frame buffer are intended to be copied to the hardware. Add a test that checks this, by @@ -1004,16 +626,13 @@ then checking if the overwritten contents have been redrawn on the next sync. Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Add patch "video: test: Test partial updates of hardware frame buffer" - test/dm/video.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/test/dm/video.c b/test/dm/video.c -index b9ff3da10c18..e4bd27a6b76f 100644 +index b9ff3da10c1..e4bd27a6b76 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -657,3 +657,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) @@ -1074,138 +693,13 @@ index b9ff3da10c18..e4bd27a6b76f 100644 + return 0; +} +DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +-- +2.43.0 -From patchwork Mon Aug 21 13:51:01 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823647 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.30 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:31 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 04/13] dm: video: Add damage tracking API -Date: Mon, 21 Aug 2023 16:51:01 +0300 -Message-Id: <20230821135111.3558478-5-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 40f4addde7e05ce94fb74cd7d6795265ad282de6 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:01 +0300 +Subject: [PATCH 04/13] dm: video: Add damage tracking API We are going to introduce image damage tracking to fasten up screen refresh on large displays. This patch adds damage tracking for up to @@ -1219,34 +713,15 @@ Reported-by: Da Xue video_damage(), declare priv, drop headers, use IS_ENABLED()] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Use xstart, ystart, xend, yend as names for damage region -- Document damage struct and fields in struct video_priv comment -- Return void from video_damage() -- Fix undeclared priv error in video_sync() -- Drop unused headers from video-uclass.c -- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() - -Changes in v4: -- Move damage clear to patch "dm: video: Add damage tracking API" -- Simplify first damage logic -- Remove VIDEO_DAMAGE default for ARM - -Changes in v3: -- Adapt to always assume DM is used - -Changes in v2: -- Remove ifdefs - drivers/video/Kconfig | 13 ++++++++++++ drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++++--- include/video.h | 32 ++++++++++++++++++++++++++-- 3 files changed, 81 insertions(+), 5 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index fe43fbd7004a..97f494a1340b 100644 +index ab927641bb7..ac3edbfdb54 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -92,6 +92,19 @@ config VIDEO_COPY @@ -1270,7 +745,7 @@ index fe43fbd7004a..97f494a1340b 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 8f268fc4063f..447689581668 100644 +index f743ed74c81..9888a580bfd 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -351,9 +351,39 @@ void video_set_default_colors(struct udevice *dev, bool invert) @@ -1345,10 +820,10 @@ index 8f268fc4063f..447689581668 100644 } diff --git a/include/video.h b/include/video.h -index 66d109ca5da6..a522f33949e5 100644 +index 4d8df9baaad..1310195f307 100644 --- a/include/video.h +++ b/include/video.h -@@ -85,6 +85,11 @@ enum video_format { +@@ -88,6 +88,11 @@ enum video_format { * @fb_size: Frame buffer size * @copy_fb: Copy of the frame buffer to keep up to date; see struct * video_uc_plat @@ -1360,7 +835,7 @@ index 66d109ca5da6..a522f33949e5 100644 * @line_length: Length of each frame buffer line, in bytes. This can be * set by the driver, but if not, the uclass will set it after * probing -@@ -112,6 +117,12 @@ struct video_priv { +@@ -115,6 +120,12 @@ struct video_priv { void *fb; int fb_size; void *copy_fb; @@ -1373,7 +848,7 @@ index 66d109ca5da6..a522f33949e5 100644 int line_length; u32 colour_fg; u32 colour_bg; -@@ -254,8 +265,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, * @return: 0 on success, error code otherwise * * Some frame buffers are cached or have a secondary frame buffer. This @@ -1385,7 +860,7 @@ index 66d109ca5da6..a522f33949e5 100644 */ int video_sync(struct udevice *vid, bool force); -@@ -375,6 +387,22 @@ static inline int video_sync_copy_all(struct udevice *dev) +@@ -378,6 +390,22 @@ static inline int video_sync_copy_all(struct udevice *dev) #endif @@ -1408,139 +883,13 @@ index 66d109ca5da6..a522f33949e5 100644 /** * video_is_active() - Test if one video device it active * +-- +2.43.0 -From patchwork Mon Aug 21 13:51:02 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823648 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20221208 header.b=BdIntNrw; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4RTv6p6cj3z1yYZ - for ; Mon, 21 Aug 2023 23:52:18 +1000 (AEST) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 8A59F87086; - Mon, 21 Aug 2023 15:51:40 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Authentication-Results: phobos.denx.de; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.b="BdIntNrw"; - dkim-atps=neutral -Received: by phobos.denx.de (Postfix, from userid 109) - id 3C3FD867A0; Mon, 21 Aug 2023 15:51:39 +0200 (CEST) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, - SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 -Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com - [IPv6:2a00:1450:4864:20::42c]) - (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 546E686F0A - for ; Mon, 21 Aug 2023 15:51:35 +0200 (CEST) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=gmail.com -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=alpernebiyasak@gmail.com -Received: by mail-wr1-x42c.google.com with SMTP id - ffacd0b85a97d-31c3df710bdso1066363f8f.1 - for ; Mon, 21 Aug 2023 06:51:35 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=gmail.com; s=20221208; t=1692625895; x=1693230695; - h=content-transfer-encoding:mime-version:references:in-reply-to - :message-id:date:subject:cc:to:from:from:to:cc:subject:date - :message-id:reply-to; - bh=rfyiNp4RS7b8BQCxsUs1afKXNK4WMu1bUdXxDQXJn1U=; - b=BdIntNrw+JbVTri7AodJPuA4KoTwuid2ByavDMP+gEZwSfMkjrlWlFROWNdM4E2KeC - btsSXcPQO3jMnyoxVbS5g4DL2PkXPHNZO/Lw5Db4La4RGjoB4ks8w4G1nQ5kVo8NIXlQ - 7da1BVmm9tlV2cmt2LVuLp3WDWvgE5vJ9kVj8BH8fjD+gKc5wVOKtRIPJnqL8Eqj55A5 - y8xjVcW5ldxVps2jj0kE7Mq8LG2R6Bd37Zsw+Dq3Cj/1khMgLkYog8/Nf+k2uYXPQpjA - TS03XR6eJ7GQcRUf0iWft80hVZMVk6KF2AWuF04HcJ/goyNj4MGGFun0tanDYNImJzv0 - A/8A== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20221208; t=1692625895; x=1693230695; - h=content-transfer-encoding:mime-version:references:in-reply-to - :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc - :subject:date:message-id:reply-to; - bh=rfyiNp4RS7b8BQCxsUs1afKXNK4WMu1bUdXxDQXJn1U=; - b=N71LYmMnxX45xKNJxNk72goiD3Cf5e0f3znUaZ/B4Ue95/rqpwn6vLQvhNkxjyJjKz - QxOUGBKeP4pdGPJD2eVZgEA1+8cyBu3q0BssvtHzLuXCZtgGmVE+jhS1ZplzCePV5HDq - cpjabmm8tLydQpgXN42bXGeg5S7C2hbuWb9P1yFz0T2VRKDhKfnBacDMMyCM77q885Xq - scmyG9QS6JjzzhlNCx2LAvunQyb5Ub3Jeac6w62kdW5d82X5hQ7R5IuMhO6HB9cXSoIL - q4cciYJYPkkgJo7cJBCGs9hpoG7mAiYugMX3xvTX0AozIxV+I0RqRnIaeK4YPRctAqDa - B+ZQ== -X-Gm-Message-State: AOJu0Yzo17fP4SdOljTzWNaDUk2p0KMalzHe92zD3l/uyJxeFYnVtZ6Z - JKO6vwp7AEEfITHacMlSfDnu20sRQPA= -X-Google-Smtp-Source: - AGHT+IEaweUWG6MdegfaF+T8dg4D4mXuTL2UTLikuqRhtfAyLWNc6xApEfO0HHPUExbseBScRw20SA== -X-Received: by 2002:a5d:44d1:0:b0:313:f94f:3b15 with SMTP id - z17-20020a5d44d1000000b00313f94f3b15mr5140696wrr.2.1692625894567; - Mon, 21 Aug 2023 06:51:34 -0700 (PDT) -Received: from ALPER-PC.. ([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.32 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:34 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 05/13] dm: video: Add damage notification on display fills -Date: Mon, 21 Aug 2023 16:51:02 +0300 -Message-Id: <20230821135111.3558478-6-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 38f85c1620b99691bc0bd06a18c7173386a0a846 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:02 +0300 +Subject: [PATCH 05/13] dm: video: Add damage notification on display fills Let's report the video damage when we fill parts of the screen. This way we can later lazily flush only relevant regions to hardware. @@ -1549,17 +898,13 @@ Signed-off-by: Alexander Graf Reported-by: Da Xue [Alper: Call video_damage() in video_fill_part(), edit commit message] Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- -Does video_fill_part() need a video_sync(dev, false) here? - -Changes in v5: -- Call video_damage() also in video_fill_part() - drivers/video/video-uclass.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 447689581668..ebf409d839f0 100644 +index 9888a580bfd..09172f1f7f4 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -203,6 +203,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, @@ -1580,140 +925,14 @@ index 447689581668..ebf409d839f0 100644 return video_sync(dev, false); } +-- +2.43.0 -From patchwork Mon Aug 21 13:51:03 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823649 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.35 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:36 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 06/13] vidconsole: Add damage notifications to all - vidconsole drivers -Date: Mon, 21 Aug 2023 16:51:03 +0300 -Message-Id: <20230821135111.3558478-7-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 77425d7aca92bf734e51cf36fad658adc53cb57d Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:03 +0300 +Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole + drivers Now that we have a damage tracking API, let's populate damage done by vidconsole drivers. We try to declare as little memory as damaged as @@ -1725,18 +944,8 @@ Reported-by: Da Xue console_putc_xy() damages pass tests, edit patch message] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Use met->baseline instead of priv->baseline -- Use fontdata->height/width instead of VIDEO_FONT_HEIGHT/WIDTH -- Update console_rotate.c video_damage() calls to pass video tests -- Remove mention about not having minimal damage for console_rotate.c - -Changes in v2: -- Fix ranges in truetype target -- Limit rotate to necessary damage - drivers/video/console_normal.c | 18 +++++++++++ drivers/video/console_rotate.c | 54 ++++++++++++++++++++++++++++++++ drivers/video/console_truetype.c | 21 +++++++++++++ @@ -1744,7 +953,7 @@ Changes in v2: 4 files changed, 94 insertions(+) diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index 413c7abee9e1..a19ce6a2bc11 100644 +index a0231293f31..ad7ce860e9d 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c @@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) @@ -1787,7 +996,7 @@ index 413c7abee9e1..a19ce6a2bc11 100644 if (ret) return ret; diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 65358a1c6e74..6c3e7c1bb8dc 100644 +index 65358a1c6e7..6c3e7c1bb8d 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) @@ -1908,10 +1117,10 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644 } diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 0f9bb49e44f7..0adbf9cc3d67 100644 +index 14fb81e9563..c0a5ad1a51e 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -178,6 +178,7 @@ struct console_tt_priv { +@@ -190,6 +190,7 @@ struct console_tt_store { static int console_truetype_set_row(struct udevice *dev, uint row, int clr) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1919,7 +1128,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; -@@ -221,6 +222,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -233,6 +234,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1932,7 +1141,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644 return 0; } -@@ -228,6 +235,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -240,6 +247,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, uint rowsrc, uint count) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1940,7 +1149,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *dst; -@@ -246,6 +254,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -258,6 +266,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, for (i = 0; i < priv->pos_ptr; i++) priv->pos[i].ypos -= diff; @@ -1953,7 +1162,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644 return 0; } -@@ -403,6 +417,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -415,6 +429,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, line += vid_priv->line_length; } @@ -1968,7 +1177,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644 if (ret) return ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index ebf409d839f0..8bfcbc88dda7 100644 +index 09172f1f7f4..06e344f415c 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -199,6 +199,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, @@ -1979,138 +1188,13 @@ index ebf409d839f0..8bfcbc88dda7 100644 ret = video_sync_copy(dev, start, line); if (ret) return ret; +-- +2.43.0 -From patchwork Mon Aug 21 13:51:04 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823650 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.37 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:39 -0700 (PDT) +From b44368015bdea3e71cb1c392afa124e6d26ab798 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 07/13] video: test: Test video damage tracking via - vidconsole Date: Mon, 21 Aug 2023 16:51:04 +0300 -Message-Id: <20230821135111.3558478-8-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean +Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole With VIDEO_DAMAGE, the video uclass tracks updated regions of the frame buffer in order to avoid unnecessary work during a video sync. Enable @@ -2118,22 +1202,17 @@ the config in sandbox and add a test for it, by printing strings at a few locations and checking the tracked region. Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- -This is hard to test because most things issue video syncs that process -and reset the damaged region. - -Changes in v5: -- Add patch "video: test: Test video damage tracking via vidconsole" - configs/sandbox_defconfig | 1 + test/dm/video.c | 56 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 259f31f26cee..51b820f13121 100644 +index bc5bcb2a623..fa6b23f365c 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -307,6 +307,7 @@ CONFIG_USB_ETH_CDC=y +@@ -311,6 +311,7 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -2142,7 +1221,7 @@ index 259f31f26cee..51b820f13121 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/test/dm/video.c b/test/dm/video.c -index e4bd27a6b76f..8c7d9800a42e 100644 +index e4bd27a6b76..8c7d9800a42 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -711,3 +711,59 @@ static int dm_test_video_copy(struct unit_test_state *uts) @@ -2205,139 +1284,13 @@ index e4bd27a6b76f..8c7d9800a42e 100644 + return 0; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.40 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:41 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 08/13] video: Add damage notification on bmp display -Date: Mon, 21 Aug 2023 16:51:05 +0300 -Message-Id: <20230821135111.3558478-9-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 9278f6c9492b0a7960a6ee2294a524ef150bf1cb Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:05 +0300 +Subject: [PATCH 08/13] video: Add damage notification on bmp display Let's report the video damage when we draw a bitmap on the screen. This way we can later lazily flush only relevant regions to hardware. @@ -2347,14 +1300,11 @@ Reported-by: Da Xue Reviewed-by: Simon Glass Signed-off-by: Alper Nebi Yasak --- - -(no changes since v1) - drivers/video/video_bmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c -index 45f003c8251a..10943b9ca19f 100644 +index 45f003c8251..10943b9ca19 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -460,6 +460,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, @@ -2366,138 +1316,13 @@ index 45f003c8251a..10943b9ca19f 100644 /* Find the position of the top left of the image in the framebuffer */ fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); ret = video_sync_copy(dev, start, fb); +-- +2.43.0 -From patchwork Mon Aug 21 13:51:06 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823652 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.42 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:44 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 09/13] efi_loader: GOP: Add damage notification on BLT -Date: Mon, 21 Aug 2023 16:51:06 +0300 -Message-Id: <20230821135111.3558478-10-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From b56b97ef176a2753a9827d761760a829eece00d0 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:06 +0300 +Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT Now that we have a damage tracking API, let's populate damage done by UEFI payloads when they BLT data onto the screen. @@ -2507,28 +1332,16 @@ Reported-by: Da Xue Reviewed-by: Heinrich Schuchardt [Alper: Add struct comment for new member] Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Document new vdev field in struct efi_gop_obj comment - -Changes in v4: -- Skip damage on EfiBltVideoToBltBuffer - -Changes in v3: -- Adapt to always assume DM is used - -Changes in v2: -- Remove ifdefs from gop - lib/efi_loader/efi_gop.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c -index 778b693f983a..db6535e080c4 100644 +index a09db31eb46..ede77af1fe4 100644 --- a/lib/efi_loader/efi_gop.c +++ b/lib/efi_loader/efi_gop.c -@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; +@@ -25,6 +25,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; * @ops: graphical output protocol interface * @info: graphical output mode information * @mode: graphical output mode @@ -2536,7 +1349,7 @@ index 778b693f983a..db6535e080c4 100644 * @bpix: bits per pixel * @fb: frame buffer */ -@@ -32,6 +33,7 @@ struct efi_gop_obj { +@@ -33,6 +34,7 @@ struct efi_gop_obj { struct efi_gop ops; struct efi_gop_mode_info info; struct efi_gop_mode mode; @@ -2544,7 +1357,7 @@ index 778b693f983a..db6535e080c4 100644 /* Fields we only have access to during init */ u32 bpix; void *fb; -@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -121,6 +123,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, u32 *fb32 = gopobj->fb; u16 *fb16 = gopobj->fb; struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4); @@ -2552,7 +1365,7 @@ index 778b693f983a..db6535e080c4 100644 if (delta) { /* Check for 4 byte alignment */ -@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -244,6 +247,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, dlineoff += dwidth; } @@ -2562,147 +1375,21 @@ index 778b693f983a..db6535e080c4 100644 return EFI_SUCCESS; } -@@ -548,6 +554,7 @@ efi_status_t efi_gop_register(void) +@@ -550,6 +556,7 @@ efi_status_t efi_gop_register(void) gopobj->info.pixels_per_scanline = col; gopobj->bpix = bpix; - gopobj->fb = fb; + gopobj->fb = map_sysmem(fb_base, fb_size); + gopobj->vdev = vdev; return EFI_SUCCESS; } +-- +2.43.0 -From patchwork Mon Aug 21 13:51:07 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823653 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 - header.s=20221208 header.b=SJ3CoTwS; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.45 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:46 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 10/13] video: Only dcache flush damaged lines -Date: Mon, 21 Aug 2023 16:51:07 +0300 -Message-Id: <20230821135111.3558478-11-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From e77793c6320f827b4f8efc06bd55d38037b6373e Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:07 +0300 +Subject: [PATCH 10/13] video: Only dcache flush damaged lines Now that we have a damage area tells us which parts of the frame buffer actually need updating, let's only dcache flush those on video_sync() @@ -2715,20 +1402,11 @@ Reported-by: Da Xue Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak --- - -Changes in v5: -- Use xstart, ystart, xend, yend as names for damage region -- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() - -Changes in v2: -- Fix dcache range; we were flushing too much before -- Remove ifdefs - drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 8bfcbc88dda7..a50220bcc684 100644 +index 06e344f415c..ac2141892bf 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -385,6 +385,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) @@ -2786,138 +1464,13 @@ index 8bfcbc88dda7..a50220bcc684 100644 #elif defined(CONFIG_VIDEO_SANDBOX_SDL) static ulong last_sync; +-- +2.43.0 -From patchwork Mon Aug 21 13:51:08 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823654 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.47 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:49 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY -Date: Mon, 21 Aug 2023 16:51:08 +0300 -Message-Id: <20230821135111.3558478-12-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From e9d51b4dcbfa43aa0e4d2b4f285bf94c295603e4 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:08 +0300 +Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we print a single character, it will always copy the full range of bytes @@ -2942,25 +1495,6 @@ Signed-off-by: Alexander Graf Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak --- - -Changes in v5: -- Remove video_sync_copy() also from video_fill(), video_fill_part() -- Fix memmove() calls by removing the extra dev argument -- Call video_sync() before checking copy_fb in video tests -- Use xstart, ystart, xend, yend as names for damage region -- Use met->baseline instead of priv->baseline -- Use fontdata->height/width instead of VIDEO_FONT_HEIGHT/WIDTH -- Use xstart, ystart, xend, yend as names for damage region -- Use IS_ENABLED() instead of CONFIG_IS_ENABLED() -- Drop VIDEO_DAMAGE from sandbox defconfig added in a new patch -- Update dm_test_video_copy test added in a new patch - -Changes in v3: -- Make VIDEO_COPY always select VIDEO_DAMAGE - -Changes in v2: -- Add patch "video: Use VIDEO_DAMAGE for VIDEO_COPY" - configs/sandbox_defconfig | 1 - drivers/video/Kconfig | 5 ++ drivers/video/console_normal.c | 13 +---- @@ -2975,10 +1509,10 @@ Changes in v2: 11 files changed, 43 insertions(+), 248 deletions(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 51b820f13121..259f31f26cee 100644 +index fa6b23f365c..bc5bcb2a623 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -307,7 +307,6 @@ CONFIG_USB_ETH_CDC=y +@@ -311,7 +311,6 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -2987,7 +1521,7 @@ index 51b820f13121..259f31f26cee 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 97f494a1340b..b3fbd9d7d9ca 100644 +index ac3edbfdb54..438cf3d4899 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE @@ -3015,7 +1549,7 @@ index 97f494a1340b..b3fbd9d7d9ca 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index a19ce6a2bc11..c44aa09473a3 100644 +index ad7ce860e9d..5625dbb8d08 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c @@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) @@ -3057,7 +1591,7 @@ index a19ce6a2bc11..c44aa09473a3 100644 } diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 6c3e7c1bb8dc..6e9067d1c7fb 100644 +index 6c3e7c1bb8d..6e9067d1c7f 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) @@ -3201,10 +1735,10 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644 return ret; diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 0adbf9cc3d67..07bb0af71311 100644 +index c0a5ad1a51e..7aa1cdaef88 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -182,7 +182,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; @@ -3212,7 +1746,7 @@ index 0adbf9cc3d67..07bb0af71311 100644 line = vid_priv->fb + row * met->font_size * vid_priv->line_length; end = line + met->font_size * vid_priv->line_length; -@@ -218,9 +217,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -230,9 +229,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) default: return -ENOSYS; } @@ -3222,7 +1756,7 @@ index 0adbf9cc3d67..07bb0af71311 100644 video_damage(dev->parent, 0, -@@ -240,14 +236,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -252,14 +248,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, struct console_tt_metrics *met = priv->cur_met; void *dst; void *src; @@ -3239,7 +1773,7 @@ index 0adbf9cc3d67..07bb0af71311 100644 /* Scroll up our position history */ diff = (rowsrc - rowdst) * met->font_size; -@@ -280,7 +273,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -292,7 +285,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, u8 *bits, *data; int advance; void *start, *end, *line; @@ -3248,7 +1782,7 @@ index 0adbf9cc3d67..07bb0af71311 100644 /* First get some basic metrics about this character */ stbtt_GetCodepointHMetrics(font, ch, &advance, &lsb); -@@ -424,9 +417,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -436,9 +429,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, width, height); @@ -3259,10 +1793,10 @@ index 0adbf9cc3d67..07bb0af71311 100644 return width_frac; diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 05f930478096..27a1e8ec3e49 100644 +index 22d55df71f6..16b38a27d39 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c -@@ -682,22 +682,6 @@ UCLASS_DRIVER(vidconsole) = { +@@ -751,22 +751,6 @@ UCLASS_DRIVER(vidconsole) = { .per_device_auto = sizeof(struct vidconsole_priv), }; @@ -3286,7 +1820,7 @@ index 05f930478096..27a1e8ec3e49 100644 { int ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index a50220bcc684..c79499252a22 100644 +index ac2141892bf..afbd4670240 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -160,7 +160,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, @@ -3436,7 +1970,7 @@ index a50220bcc684..c79499252a22 100644 extern u8 __splash_ ## _name ## _begin[]; \ extern u8 __splash_ ## _name ## _end[] diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c -index 10943b9ca19f..da2bbe864a03 100644 +index 10943b9ca19..da2bbe864a0 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -268,7 +268,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, @@ -3460,10 +1994,10 @@ index 10943b9ca19f..da2bbe864a03 100644 return video_sync(dev, false); } diff --git a/include/video.h b/include/video.h -index a522f33949e5..42e57b44188d 100644 +index 1310195f307..29eff3c0900 100644 --- a/include/video.h +++ b/include/video.h -@@ -350,43 +350,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); +@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); */ int video_default_font_height(struct udevice *dev); @@ -3508,10 +2042,10 @@ index a522f33949e5..42e57b44188d 100644 * video_damage() - Notify the video subsystem about screen updates. * diff --git a/include/video_console.h b/include/video_console.h -index 2694e44f6ecf..caadeb878989 100644 +index bde67fa9a5a..43bc7db489a 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -404,56 +404,4 @@ void vidconsole_list_fonts(struct udevice *dev); +@@ -527,56 +527,4 @@ void vidconsole_list_fonts(struct udevice *dev); */ int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); @@ -3569,7 +2103,7 @@ index 2694e44f6ecf..caadeb878989 100644 - #endif diff --git a/test/dm/video.c b/test/dm/video.c -index 8c7d9800a42e..4c3bcd26e94f 100644 +index 8c7d9800a42..4c3bcd26e94 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -106,6 +106,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts, @@ -3589,139 +2123,13 @@ index 8c7d9800a42e..4c3bcd26e94f 100644 return 0; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.50 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:51 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 12/13] video: Always compile cache flushing code -Date: Mon, 21 Aug 2023 16:51:09 +0300 -Message-Id: <20230821135111.3558478-13-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 8831933fcc6cf60308e6ede438409717ab1a94a6 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:09 +0300 +Subject: [PATCH 12/13] video: Always compile cache flushing code The dcache flushing code path was conditional on ARM && !DCACHE config options. However, dcaches exist on other platforms as well and may need @@ -3739,17 +2147,11 @@ Signed-off-by: Alexander Graf Reviewed-by: Simon Glass Signed-off-by: Alper Nebi Yasak --- - -(no changes since v4) - -Changes in v4: -- Add patch "video: Always compile cache flushing code" - drivers/video/video-uclass.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index c79499252a22..3f9ddaadd15d 100644 +index afbd4670240..2c7777261ad 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) @@ -3792,139 +2194,13 @@ index c79499252a22..3f9ddaadd15d 100644 static ulong last_sync; if (force || get_timer(last_sync) > 100) { +-- +2.43.0 -From patchwork Mon Aug 21 13:51:10 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Alper Nebi Yasak -X-Patchwork-Id: 1823656 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id - r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.52 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 21 Aug 2023 06:51:54 -0700 (PDT) -From: Alper Nebi Yasak -To: u-boot@lists.denx.de -Cc: Kever Yang , - Jagan Teki , - Andre Przywara , - Svyatoslav Ryhel , Alexander Graf , - Philipp Tomsich , Andrew Davis , - Da Xue , Heinrich Schuchardt , - Patrice Chotard , - Patrick Delaunay , - Derald Woods , - Anatolij Gustschin , - uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , - Matthias Brugger , u-boot-amlogic@groups.io, - Ilias Apalodimas , - Neil Armstrong , - Alper Nebi Yasak -Subject: [PATCH v5 13/13] video: Enable VIDEO_DAMAGE for drivers that need it -Date: Mon, 21 Aug 2023 16:51:10 +0300 -Message-Id: <20230821135111.3558478-14-alpernebiyasak@gmail.com> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - +From 676104d8420152c97321c4fa22bb925fb139dd66 Mon Sep 17 00:00:00 2001 From: Alexander Graf +Date: Mon, 21 Aug 2023 16:51:10 +0300 +Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it Some drivers call video_set_flush_dcache() to indicate that they want to have the dcache flushed for the frame buffer. These drivers benefit from @@ -3938,32 +2214,25 @@ Signed-off-by: Alexander Graf [Alper: Add to VIDEO_TIDSS, imply instead of select] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak +Reviewed-by: Simon Glass --- - -Changes in v5: -- Imply VIDEO_DAMAGE for video drivers instead of selecting it -- Imply VIDEO_DAMAGE also for VIDEO_TIDSS - -Changes in v4: -- Add patch "video: Enable VIDEO_DAMAGE for drivers that need it" - - arch/arm/mach-sunxi/Kconfig | 1 + - drivers/video/Kconfig | 8 ++++++++ - drivers/video/exynos/Kconfig | 1 + - drivers/video/imx/Kconfig | 1 + - drivers/video/meson/Kconfig | 1 + - drivers/video/rockchip/Kconfig | 1 + - drivers/video/stm32/Kconfig | 1 + - drivers/video/tegra20/Kconfig | 1 + - drivers/video/tidss/Kconfig | 1 + - 10 files changed, 17 insertions(+) + arch/arm/mach-sunxi/Kconfig | 1 + + drivers/video/Kconfig | 8 ++++++++ + drivers/video/exynos/Kconfig | 1 + + drivers/video/imx/Kconfig | 1 + + drivers/video/meson/Kconfig | 1 + + drivers/video/rockchip/Kconfig | 1 + + drivers/video/stm32/Kconfig | 1 + + drivers/video/tegra20/Kconfig | 1 + + drivers/video/tidss/Kconfig | 1 + + 9 files changed, 16 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 9d5df2c10273..fb4478ea32e8 100644 +index a4a8d8e9445..1d32a3140bf 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -813,6 +813,7 @@ config VIDEO_SUNXI - depends on !SUN50I_GEN_H6 +@@ -846,6 +846,7 @@ config VIDEO_SUNXI + depends on !SUNXI_GEN_NCAT2 select VIDEO select DISPLAY + imply VIDEO_DAMAGE @@ -3971,7 +2240,7 @@ index 9d5df2c10273..fb4478ea32e8 100644 default y ---help--- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index b3fbd9d7d9ca..185dbb1f8390 100644 +index 438cf3d4899..a736ee6724c 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804 @@ -4039,7 +2308,7 @@ index b3fbd9d7d9ca..185dbb1f8390 100644 Enables a simple display driver for ST-Ericsson MCDE (Multichannel Display Engine), which reads the configuration from diff --git a/drivers/video/exynos/Kconfig b/drivers/video/exynos/Kconfig -index 599d19d5ecc2..a2cf752aac03 100644 +index 599d19d5ecc..a2cf752aac0 100644 --- a/drivers/video/exynos/Kconfig +++ b/drivers/video/exynos/Kconfig @@ -12,6 +12,7 @@ config EXYNOS_DP @@ -4051,7 +2320,7 @@ index 599d19d5ecc2..a2cf752aac03 100644 config EXYNOS_MIPI_DSIM bool "Exynos MIPI DSI support" diff --git a/drivers/video/imx/Kconfig b/drivers/video/imx/Kconfig -index 34e8b640595b..5db3e5c0499e 100644 +index 34e8b640595..5db3e5c0499 100644 --- a/drivers/video/imx/Kconfig +++ b/drivers/video/imx/Kconfig @@ -2,6 +2,7 @@ @@ -4063,7 +2332,7 @@ index 34e8b640595b..5db3e5c0499e 100644 This enables framebuffer driver for i.MX processors working on the IPUv3(Image Processing Unit) internal graphic processor. diff --git a/drivers/video/meson/Kconfig b/drivers/video/meson/Kconfig -index 3c2d72d019b8..fcf486ca0a3a 100644 +index 3c2d72d019b..fcf486ca0a3 100644 --- a/drivers/video/meson/Kconfig +++ b/drivers/video/meson/Kconfig @@ -8,5 +8,6 @@ config VIDEO_MESON @@ -4074,7 +2343,7 @@ index 3c2d72d019b8..fcf486ca0a3a 100644 help Enable Amlogic Meson Video Processing Unit video support. diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig -index 01804dcb1cc8..0f4550a29e38 100644 +index 01804dcb1cc..0f4550a29e3 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -11,6 +11,7 @@ @@ -4086,7 +2355,7 @@ index 01804dcb1cc8..0f4550a29e38 100644 Rockchip SoCs provide video output capabilities for High-Definition Multimedia Interface (HDMI), Low-voltage Differential Signalling diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig -index 48066063e4c5..c354c402c288 100644 +index 48066063e4c..c354c402c28 100644 --- a/drivers/video/stm32/Kconfig +++ b/drivers/video/stm32/Kconfig @@ -8,6 +8,7 @@ @@ -4098,7 +2367,7 @@ index 48066063e4c5..c354c402c288 100644 STM32 supports many video output options including RGB and DSI. This option enables these supports which can be used on diff --git a/drivers/video/tegra20/Kconfig b/drivers/video/tegra20/Kconfig -index f5c4843e1191..2232b0b3ff53 100644 +index f5c4843e119..2232b0b3ff5 100644 --- a/drivers/video/tegra20/Kconfig +++ b/drivers/video/tegra20/Kconfig @@ -1,6 +1,7 @@ @@ -4110,7 +2379,7 @@ index f5c4843e1191..2232b0b3ff53 100644 T20/T30 support video output to an attached LCD panel as well as other options such as HDMI. Only the LCD is supported in U-Boot. diff --git a/drivers/video/tidss/Kconfig b/drivers/video/tidss/Kconfig -index 95086f3a5d66..3291b3ceb8d5 100644 +index 95086f3a5d6..3291b3ceb8d 100644 --- a/drivers/video/tidss/Kconfig +++ b/drivers/video/tidss/Kconfig @@ -11,6 +11,7 @@ @@ -4121,3 +2390,6 @@ index 95086f3a5d66..3291b3ceb8d5 100644 help TIDSS supports video output options LVDS and DPI . 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- --/* Check bootdev ordering with the bootdev-order property */ -+/* -+ * Check bootdev ordering with the bootdev-order property and boot_targets -+ * environment variable -+ */ - static int bootdev_test_order(struct unit_test_state *uts) - { - struct bootflow_iter iter; - struct bootflow bflow; - -+ test_set_skip_delays(true); -+ -+ /* Start up USB which gives us three additional bootdevs */ -+ usb_started = false; -+ ut_assertok(run_command("usb start", 0)); -+ - /* - * First try the order set by the bootdev-order property - * Like all sandbox unit tests this relies on the devicetree setting up -@@ -213,12 +222,14 @@ static int bootdev_test_order(struct unit_test_state *uts) - bootflow_iter_uninit(&iter); - - /* Use the environment variable to override it */ -- ut_assertok(env_set("boot_targets", "mmc1 mmc2")); -+ ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb")); - ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); - ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -- ut_asserteq(2, iter.num_devs); -+ ut_asserteq(3, iter.num_devs); - ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name); - ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); -+ ut_asserteq_str("usb_mass_storage.lun0.bootdev", -+ iter.dev_used[2]->name); - bootflow_iter_uninit(&iter); - - return 0; - -From patchwork Mon Oct 23 07:02:12 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1853515 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 - header.s=google header.b=aYxxWBdy; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; 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- Mon, 23 Oct 2023 00:03:54 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Heinrich Schuchardt , - Guillaume Gardet , Tom Rini , - Simon Glass -Subject: [PATCH 3/4] bootstd: Correct logic for single uclass -Date: Mon, 23 Oct 2023 00:02:12 -0700 -Message-ID: - <20231023000211.3.Icefe7db8f3c1ddc3624f95ca5dc89b81ef97eab4@changeid> -X-Mailer: git-send-email 2.42.0.655.g421f12c284-goog -In-Reply-To: <20231023070216.394709-1-sjg@chromium.org> -References: <20231023070216.394709-1-sjg@chromium.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -The current logic for "bootflow mmc" is flawed since it checks the -uclass of the bootdev instead of its parent, the media device. Correct -this and add a test that covers this scenario. - -Signed-off-by: Simon Glass ---- - - boot/bootflow.c | 24 ++++++++++++++++++++++-- - test/boot/bootdev.c | 13 +++++++++++++ - 2 files changed, 35 insertions(+), 2 deletions(-) - -diff --git a/boot/bootflow.c b/boot/bootflow.c -index 6ef62e1d1896..7f5b0e942078 100644 ---- a/boot/bootflow.c -+++ b/boot/bootflow.c -@@ -155,6 +155,27 @@ static void bootflow_iter_set_dev(struct bootflow_iter *iter, - } - } - -+/** -+ * scan_next_in_uclass() - Scan for the next bootdev in the same media uclass -+ * -+ * Move through the following bootdevs until we find another in this media -+ * uclass, or run out -+ * -+ * @devp: On entry, the device to check, on exit the new device, or NULL if -+ * there is none -+ */ -+static void scan_next_in_uclass(struct udevice **devp) -+{ -+ struct udevice *dev = *devp; -+ enum uclass_id cur_id = device_get_uclass_id(dev->parent); -+ -+ do { -+ uclass_find_next_device(&dev); -+ } while (dev && cur_id != device_get_uclass_id(dev->parent)); -+ -+ *devp = dev; -+} -+ - /** - * iter_incr() - Move to the next item (method, part, bootdev) - * -@@ -230,8 +251,7 @@ static int iter_incr(struct bootflow_iter *iter) - &method_flags); - } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && - (iter->flags & BOOTFLOWIF_SINGLE_UCLASS)) { -- /* Move to the next bootdev in this uclass */ -- uclass_find_next_device(&dev); -+ scan_next_in_uclass(&dev); - if (!dev) { - log_debug("finished uclass %s\n", - dev_get_uclass_name(dev)); -diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c -index 7228f545e9e6..637861748057 100644 ---- a/test/boot/bootdev.c -+++ b/test/boot/bootdev.c -@@ -232,6 +232,19 @@ static int bootdev_test_order(struct unit_test_state *uts) - iter.dev_used[2]->name); - bootflow_iter_uninit(&iter); - -+ /* Try a single uclass */ -+ ut_assertok(env_set("boot_targets", NULL)); -+ ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow)); -+ ut_asserteq(2, iter.num_devs); -+ -+ /* Now scan pass mmc1 and make sure that only mmc0 shows up */ -+ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -+ ut_asserteq(3, iter.num_devs); -+ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); -+ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); -+ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); -+ bootflow_iter_uninit(&iter); -+ - return 0; - } - BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); - -From patchwork Mon Oct 23 07:02:13 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -X-Patchwork-Submitter: Simon Glass -X-Patchwork-Id: 1853516 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 - header.s=google header.b=g7MVFEGd; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; 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- Mon, 23 Oct 2023 00:03:59 -0700 (PDT) -Received: from sjg1.roam.corp.google.com ([202.144.206.130]) - by smtp.gmail.com with ESMTPSA id - u187-20020a6279c4000000b006bde8e1f0adsm5910841pfc.98.2023.10.23.00.03.55 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Mon, 23 Oct 2023 00:03:59 -0700 (PDT) -From: Simon Glass -To: U-Boot Mailing List -Cc: Heinrich Schuchardt , - Guillaume Gardet , Tom Rini , - Simon Glass , Date Huang , - =?utf-8?q?Vincent_Stehl=C3=A9?= , - Ivan Ivanov -Subject: [PATCH 4/4] bootstd: Scan all bootdevs in a boot_targets entry (take - 2) -Date: Mon, 23 Oct 2023 00:02:13 -0700 -Message-ID: - <20231023000211.4.Ie4e7ba290d4957a88bebf306ca39f46618d9c363@changeid> -X-Mailer: git-send-email 2.42.0.655.g421f12c284-goog -In-Reply-To: <20231023070216.394709-1-sjg@chromium.org> -References: <20231023070216.394709-1-sjg@chromium.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -When the boot_targets environment variable is used with the distro-boot -scripts, each device is included individually. For example, if there -are three mmc devices, then we will have something like: - - boot_targets="mmc0 mmc1 mmc2" - -In contrast, standard boot supports specifying just the uclass, i.e.: - - boot_targets="mmc" - -The intention is that this should scan all MMC devices, but in fact it -currently only scans the first. - -Update the logic to handle this case, without required BOOTSTD_FULL to -be enabled. - -Signed-off-by: Simon Glass -Reported-by: Date Huang -Reported-by: Vincent Stehlé -Reported-by: Ivan Ivanov ---- - - boot/bootdev-uclass.c | 3 ++- - boot/bootflow.c | 22 ++++++++++++++++++++-- - test/boot/bootdev.c | 32 ++++++++++++++++++++++++++++++-- - 3 files changed, 52 insertions(+), 5 deletions(-) - -diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c -index 974ddee5d2fa..44ae98a9269c 100644 ---- a/boot/bootdev-uclass.c -+++ b/boot/bootdev-uclass.c -@@ -469,10 +469,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp, - * if no sequence number was provided, we must scan all - * bootdevs for this media uclass - */ -- if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1) -+ if (seq == -1) - method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS; - if (method_flagsp) - *method_flagsp = method_flags; -+ log_debug("method flags %x\n", method_flags); - return 0; - } - log_debug("- no device in %s\n", media->name); -diff --git a/boot/bootflow.c b/boot/bootflow.c -index 7f5b0e942078..be543c8588cc 100644 ---- a/boot/bootflow.c -+++ b/boot/bootflow.c -@@ -280,8 +280,26 @@ static int iter_incr(struct bootflow_iter *iter) - } else { - log_debug("labels %p\n", iter->labels); - if (iter->labels) { -- ret = bootdev_next_label(iter, &dev, -- &method_flags); -+ /* -+ * when the label is "mmc" we want to scan all -+ * mmc bootdevs, not just the first. See -+ * bootdev_find_by_label() where this flag is -+ * set up -+ */ -+ if (iter->method_flags & -+ BOOTFLOW_METHF_SINGLE_UCLASS) { -+ scan_next_in_uclass(&dev); -+ log_debug("looking for next device %s: %s\n", -+ iter->dev->name, -+ dev ? dev->name : ""); -+ } else { -+ dev = NULL; -+ } -+ if (!dev) { -+ log_debug("looking at next label\n"); -+ ret = bootdev_next_label(iter, &dev, -+ &method_flags); -+ } - } else { - ret = bootdev_next_prio(iter, &dev); - method_flags = 0; -diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c -index 637861748057..0702fccdae60 100644 ---- a/test/boot/bootdev.c -+++ b/test/boot/bootdev.c -@@ -225,7 +225,7 @@ static int bootdev_test_order(struct unit_test_state *uts) - ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb")); - ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); - ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -- ut_asserteq(3, iter.num_devs); -+ ut_asserteq(5, iter.num_devs); - ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name); - ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name); - ut_asserteq_str("usb_mass_storage.lun0.bootdev", -@@ -237,7 +237,20 @@ static int bootdev_test_order(struct unit_test_state *uts) - ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow)); - ut_asserteq(2, iter.num_devs); - -- /* Now scan pass mmc1 and make sure that only mmc0 shows up */ -+ /* Now scan past mmc1 and make sure that only mmc0 shows up */ -+ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -+ ut_asserteq(3, iter.num_devs); -+ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); -+ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); -+ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); -+ bootflow_iter_uninit(&iter); -+ -+ /* Try a single uclass with boot_targets */ -+ ut_assertok(env_set("boot_targets", "mmc")); -+ ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); -+ ut_asserteq(2, iter.num_devs); -+ -+ /* Now scan past mmc1 and make sure that only mmc0 shows up */ - ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); - ut_asserteq(3, iter.num_devs); - ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); -@@ -245,6 +258,21 @@ static int bootdev_test_order(struct unit_test_state *uts) - ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); - bootflow_iter_uninit(&iter); - -+ /* Try a single uclass with boot_targets */ -+ ut_assertok(env_set("boot_targets", "mmc usb")); -+ ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow)); -+ ut_asserteq(2, iter.num_devs); -+ -+ /* Now scan past mmc1 and make sure that the 3 USB devices show up */ -+ ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); -+ ut_asserteq(6, iter.num_devs); -+ ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name); -+ ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name); -+ ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name); -+ ut_asserteq_str("usb_mass_storage.lun0.bootdev", -+ iter.dev_used[3]->name); -+ bootflow_iter_uninit(&iter); -+ - return 0; - } - BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT); diff --git a/uboot-tools.spec b/uboot-tools.spec index 798f97d..6635f59 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -23,8 +23,7 @@ Patch3: 0001-smbios-Simplify-reporting-of-unknown-values.patch Patch4: 0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch Patch5: enable-bootmenu-by-default.patch Patch6: uefi-Boot-var-automatic-management-for-removable-medias.patch -#Patch6: Add-video-damage-tracking.patch -#Patch7: bootstd-Test-and-boot_targets-improvements.patch +Patch7: Add-video-damage-tracking.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support From cb6dd9961d7608bf4072257cae7f536897f06808 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 7 Dec 2023 14:49:13 +0000 Subject: [PATCH 242/351] 2024.01 RC4 --- ...Simplify-reporting-of-unknown-values.patch | 115 --- ...to-the-default-DT-if-sysinfo-nodes-a.patch | 242 ------ Provide-a-fallback-to-smbios-tables.patch | 686 ++++++++++++++++++ sources | 2 +- uboot-tools.spec | 11 +- 5 files changed, 694 insertions(+), 362 deletions(-) delete mode 100644 0001-smbios-Simplify-reporting-of-unknown-values.patch delete mode 100644 0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch create mode 100644 Provide-a-fallback-to-smbios-tables.patch diff --git a/0001-smbios-Simplify-reporting-of-unknown-values.patch b/0001-smbios-Simplify-reporting-of-unknown-values.patch deleted file mode 100644 index 6fd5dde..0000000 --- a/0001-smbios-Simplify-reporting-of-unknown-values.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 6eb1fce7ca692b211ca467040cfe25a750ecc0fe Mon Sep 17 00:00:00 2001 -From: Ilias Apalodimas -Date: Tue, 6 Sep 2022 16:44:25 +0300 -Subject: [PATCH 1/2] smbios: Simplify reporting of unknown values - -If a value is not valid during the DT or SYSINFO parsing, we explicitly -set that to "Unknown Product" and "Unknown" for the product and -manufacturer respectively. It's cleaner if we move the checks insisde -smbios_add_string() and always report "Unknown" regardless of the missing -field. - -pre-patch dmidecode - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown Product - Version: Not Specified - Serial Number: Not Specified - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Not Specified - Family: Not Specified - -[...] - -post-patch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown -[...] - -Signed-off-by: Ilias Apalodimas -Reviewed-by: Peter Robinson -Tested-by: Peter Robinson ---- - lib/smbios.c | 17 +++-------------- - 1 file changed, 3 insertions(+), 14 deletions(-) - -diff --git a/lib/smbios.c b/lib/smbios.c -index d7f4999e8b2a..fcc8686993ef 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -102,7 +102,7 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - int i = 1; - char *p = ctx->eos; - -- if (!*str) -+ if (!str || !*str) - str = "Unknown"; - - for (;;) { -@@ -151,8 +151,7 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - const char *str; - - str = ofnode_read_string(ctx->node, prop); -- if (str) -- return smbios_add_string(ctx, str); -+ return smbios_add_string(ctx, str); - } - - return 0; -@@ -231,7 +230,7 @@ static int smbios_write_type0(ulong *current, int handle, - t->vendor = smbios_add_string(ctx, "U-Boot"); - - t->bios_ver = smbios_add_prop(ctx, "version"); -- if (!t->bios_ver) -+ if (!strcmp(ctx->last_str, "Unknown")) - t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); - if (t->bios_ver) - gd->smbios_version = ctx->last_str; -@@ -281,11 +280,7 @@ static int smbios_write_type1(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", - SYSINFO_ID_SMBIOS_SYSTEM_VERSION); - if (serial_str) { -@@ -315,11 +310,7 @@ static int smbios_write_type2(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); - t->version = smbios_add_prop_si(ctx, "version", - SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); - t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); -@@ -344,8 +335,6 @@ static int smbios_write_type3(ulong *current, int handle, - fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); - t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; - t->bootup_state = SMBIOS_STATE_SAFE; - t->power_supply_state = SMBIOS_STATE_SAFE; --- -2.40.1 - diff --git a/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch b/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch deleted file mode 100644 index a256b9b..0000000 --- a/0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch +++ /dev/null @@ -1,242 +0,0 @@ -From ed67997890981fda4f859cb96e523a0ec5b58042 Mon Sep 17 00:00:00 2001 -From: Ilias Apalodimas -Date: Tue, 6 Sep 2022 16:44:26 +0300 -Subject: [PATCH 2/2] smbios: Fallback to the default DT if sysinfo nodes are - missing - -In order to fill in the SMBIOS tables U-Boot currently relies on a -"u-boot,sysinfo-smbios" compatible node. This is fine for the boards -that already include such nodes. However with some recent EFI changes, -the majority of boards can boot up distros, which usually rely on -things like dmidecode etc for their reporting. For boards that -lack this special node the SMBIOS output looks like: - -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -This looks problematic since most of the info are "Unknown". The DT spec -specifies standard properties containing relevant information like -'model' and 'compatible' for which the suggested format is -. So let's add a last resort to our current -smbios parsing. If none of the sysinfo properties are found, we can -scan the root node for 'model' and 'compatible'. - -pre-patch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Not Specified - Asset Tag: Unknown - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - -Handle 0x0003, DMI type 3, 21 bytes -Chassis Information - Manufacturer: Unknown - Type: Desktop - Lock: Not Present - Version: Not Specified - Serial Number: Not Specified - Asset Tag: Not Specified - Boot-up State: Safe - Power Supply State: Safe - Thermal State: Safe - Security Status: None - OEM Information: 0x00000000 - Height: Unspecified - Number Of Power Cords: Unspecified - Contained Elements: 0 - - -post-pastch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: socionext,developer-box - Product Name: Socionext Developer Box - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -Handle 0x0002, DMI type 2, 14 bytes -Base Board Information - Manufacturer: socionext,developer-box - Product Name: Socionext Developer Box - Version: Unknown - Serial Number: Not Specified - Asset Tag: Unknown - Features: - Board is a hosting board - Location In Chassis: Not Specified - Chassis Handle: 0x0000 - Type: Motherboard - -Handle 0x0003, DMI type 3, 21 bytes -Chassis Information - Manufacturer: socionext,developer-box - Type: Desktop - Lock: Not Present - Version: Not Specified - Serial Number: Not Specified - Asset Tag: Not Specified - Boot-up State: Safe - Power Supply State: Safe - Thermal State: Safe - Security Status: None - OEM Information: 0x00000000 - Height: Unspecified - Number Of Power Cords: Unspecified - Contained Elements: 0 - - -Signed-off-by: Ilias Apalodimas -Reviewed-by: Peter Robinson -Tested-by: Peter Robinson ---- - lib/smbios.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++---- - 1 file changed, 64 insertions(+), 4 deletions(-) - -diff --git a/lib/smbios.c b/lib/smbios.c -index fcc8686993ef..9c8e34625e65 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -9,11 +9,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #ifdef CONFIG_CPU - #include - #include -@@ -43,6 +45,25 @@ - - DECLARE_GLOBAL_DATA_PTR; - -+/** -+ * struct map_sysinfo - Mapping of sysinfo strings to DT -+ * -+ * @sysinfo_str: sysinfo string -+ * @dt_str: DT string -+ * @max: Max index of the tokenized string to pick. First element is 0 -+ * -+ */ -+struct map_sysinfo { -+ const char *sysinfo_str; -+ const char *dt_str; -+ int max; -+}; -+ -+static const struct map_sysinfo sysinfo_to_dt[] = { -+ { .sysinfo_str = "product", .dt_str = "model", 1 }, -+ { .sysinfo_str = "manufacturer", .dt_str = "compatible", 0 }, -+}; -+ - /** - * struct smbios_ctx - context for writing SMBIOS tables - * -@@ -87,6 +108,18 @@ struct smbios_write_method { - const char *subnode_name; - }; - -+static const struct map_sysinfo *convert_sysinfo_to_dt(const char *sysinfo_str) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(sysinfo_to_dt); i++) { -+ if (!strcmp(sysinfo_str, sysinfo_to_dt[i].sysinfo_str)) -+ return &sysinfo_to_dt[i]; -+ } -+ -+ return NULL; -+} -+ - /** - * smbios_add_string() - add a string to the string area - * -@@ -139,19 +172,46 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - int sysinfo_id) - { -+ int ret = 0; -+ - if (sysinfo_id && ctx->dev) { - char val[SMBIOS_STR_MAX]; -- int ret; - - ret = sysinfo_get_str(ctx->dev, sysinfo_id, sizeof(val), val); - if (!ret) - return smbios_add_string(ctx, val); - } -+ - if (IS_ENABLED(CONFIG_OF_CONTROL)) { -- const char *str; -+ const char *str = NULL; -+ char str_tmp[128]; -+ char *token; - -- str = ofnode_read_string(ctx->node, prop); -- return smbios_add_string(ctx, str); -+ /* -+ * If the node is not valid fallback and try the entire DT -+ * so we can at least fill in maufacturer and board type -+ */ -+ if (!ofnode_valid(ctx->node)) { -+ const struct map_sysinfo *nprop; -+ -+ nprop = convert_sysinfo_to_dt(prop); -+ if (nprop) { -+ int cnt = 0; -+ -+ str = ofnode_read_string(ofnode_root(), nprop->dt_str); -+ strncpy(str_tmp, str, sizeof(str_tmp)); -+ token = strtok(str_tmp, ","); -+ while (token != NULL && cnt <= nprop->max) { -+ str = token; -+ token = strtok(NULL, ","); -+ cnt++; -+ } -+ } -+ } else { -+ str = ofnode_read_string(ctx->node, prop); -+ } -+ ret = smbios_add_string(ctx, str); -+ return ret; - } - - return 0; --- -2.40.1 - diff --git a/Provide-a-fallback-to-smbios-tables.patch b/Provide-a-fallback-to-smbios-tables.patch new file mode 100644 index 0000000..4ff8ac5 --- /dev/null +++ b/Provide-a-fallback-to-smbios-tables.patch @@ -0,0 +1,686 @@ +From patchwork Thu Dec 7 09:18:49 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Ilias Apalodimas +X-Patchwork-Id: 1873089 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 + header.s=google header.b=SyQQL6ZG; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; 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+ Thu, 07 Dec 2023 01:19:01 -0800 (PST) +From: Ilias Apalodimas +To: trini@konsulko.com, + sjg@chromium.org +Cc: sean.anderson@seco.com, neil.armstrong@linaro.org, + heinrich.schuchardt@canonical.com, mark.kettenis@xs4all.nl, + Ilias Apalodimas , u-boot@lists.denx.de +Subject: [PATCH 1/2 v3] smbios: Simplify reporting of unknown values +Date: Thu, 7 Dec 2023 11:18:49 +0200 +Message-Id: <20231207091850.17776-2-ilias.apalodimas@linaro.org> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20231207091850.17776-1-ilias.apalodimas@linaro.org> +References: <20231207091850.17776-1-ilias.apalodimas@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +If a value is not valid during the DT or SYSINFO parsing, we explicitly +set that to "Unknown Product" and "Unknown" for the product and +manufacturer respectively. It's cleaner if we move the checks insisde +smbios_add_prop_si() and provide an alternative string in case the +primary is NULL or empty + +pre-patch dmidecode + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown Product + Version: Not Specified + Serial Number: Not Specified + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Not Specified + Family: Not Specified + +[...] + +post-patch dmidecode: + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown +[...] + +While at it make smbios_add_prop_si() add a string directly if the prop +node is NULL and replace smbios_add_string() calls with +smbios_add_prop_si(ctx, NULL, ....) + +Signed-off-by: Ilias Apalodimas +--- +Changes since v2: +- refactor even more code and remove the smbios_add_string calls from the + main code. Instead use smbios_add_prop() foir everything and add a + default value, in case the parsed one is NULL or emtpy +Changes since v1: +- None + + lib/smbios.c | 73 +++++++++++++++++++++++++--------------------------- + 1 file changed, 35 insertions(+), 38 deletions(-) + +-- +2.40.1 + +diff --git a/lib/smbios.c b/lib/smbios.c +index d7f4999e8b2a..444aa245a273 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -102,9 +102,6 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + int i = 1; + char *p = ctx->eos; + +- if (!*str) +- str = "Unknown"; +- + for (;;) { + if (!*p) { + ctx->last_str = p; +@@ -134,11 +131,18 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + * + * @ctx: context for writing the tables + * @prop: property to write ++ * @dval: Default value to use if the string is not found or is empty + * Return: 0 if not found, else SMBIOS string number (1 or more) + */ + static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, +- int sysinfo_id) ++ int sysinfo_id, const char *dval) + { ++ if (!dval || !*dval) ++ dval = "Unknown"; ++ ++ if (!prop) ++ return smbios_add_string(ctx, dval); ++ + if (sysinfo_id && ctx->dev) { + char val[SMBIOS_STR_MAX]; + int ret; +@@ -151,8 +155,8 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + const char *str; + + str = ofnode_read_string(ctx->node, prop); +- if (str) +- return smbios_add_string(ctx, str); ++ ++ return smbios_add_string(ctx, str ? str : dval); + } + + return 0; +@@ -161,12 +165,15 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + /** + * smbios_add_prop() - Add a property from the devicetree + * +- * @prop: property to write ++ * @prop: property to write. The default string will be written if ++ * prop is NULL ++ * @dval: Default value to use if the string is not found or is empty + * Return: 0 if not found, else SMBIOS string number (1 or more) + */ +-static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop) ++static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop, ++ const char *dval) + { +- return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE); ++ return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE, dval); + } + + static void smbios_set_eos(struct smbios_ctx *ctx, char *eos) +@@ -228,11 +235,9 @@ static int smbios_write_type0(ulong *current, int handle, + memset(t, 0, sizeof(struct smbios_type0)); + fill_smbios_header(t, SMBIOS_BIOS_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); +- t->vendor = smbios_add_string(ctx, "U-Boot"); ++ t->vendor = smbios_add_prop(ctx, NULL, "U-Boot"); + +- t->bios_ver = smbios_add_prop(ctx, "version"); +- if (!t->bios_ver) +- t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); ++ t->bios_ver = smbios_add_prop(ctx, "version", PLAIN_VERSION); + if (t->bios_ver) + gd->smbios_version = ctx->last_str; + log_debug("smbios_version = %p: '%s'\n", gd->smbios_version, +@@ -241,7 +246,7 @@ static int smbios_write_type0(ulong *current, int handle, + print_buffer((ulong)gd->smbios_version, gd->smbios_version, + 1, strlen(gd->smbios_version) + 1, 0); + #endif +- t->bios_release_date = smbios_add_string(ctx, U_BOOT_DMI_DATE); ++ t->bios_release_date = smbios_add_prop(ctx, NULL, U_BOOT_DMI_DATE); + #ifdef CONFIG_ROM_SIZE + t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; + #endif +@@ -280,22 +285,19 @@ static int smbios_write_type1(ulong *current, int handle, + memset(t, 0, sizeof(struct smbios_type1)); + fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); +- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); +- t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); ++ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); ++ t->product_name = smbios_add_prop(ctx, "product", "Unknown"); + t->version = smbios_add_prop_si(ctx, "version", +- SYSINFO_ID_SMBIOS_SYSTEM_VERSION); ++ SYSINFO_ID_SMBIOS_SYSTEM_VERSION, ++ "Unknown"); + if (serial_str) { +- t->serial_number = smbios_add_string(ctx, serial_str); ++ t->serial_number = smbios_add_prop(ctx, NULL, serial_str); + strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); + } else { +- t->serial_number = smbios_add_prop(ctx, "serial"); ++ t->serial_number = smbios_add_prop(ctx, "serial", "Unknown"); + } +- t->sku_number = smbios_add_prop(ctx, "sku"); +- t->family = smbios_add_prop(ctx, "family"); ++ t->sku_number = smbios_add_prop(ctx, "sku", "Unknown"); ++ t->family = smbios_add_prop(ctx, "family", "Unknown"); + + len = t->length + smbios_string_table_len(ctx); + *current += len; +@@ -314,15 +316,12 @@ static int smbios_write_type2(ulong *current, int handle, + memset(t, 0, sizeof(struct smbios_type2)); + fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); +- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); +- t->product_name = smbios_add_prop(ctx, "product"); +- if (!t->product_name) +- t->product_name = smbios_add_string(ctx, "Unknown Product"); ++ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); ++ t->product_name = smbios_add_prop(ctx, "product", "Unknown"); + t->version = smbios_add_prop_si(ctx, "version", +- SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); +- t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); ++ SYSINFO_ID_SMBIOS_BASEBOARD_VERSION, ++ "Unknown"); ++ t->asset_tag_number = smbios_add_prop(ctx, "asset-tag", "Unknown"); + t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; + t->board_type = SMBIOS_BOARD_MOTHERBOARD; + +@@ -343,9 +342,7 @@ static int smbios_write_type3(ulong *current, int handle, + memset(t, 0, sizeof(struct smbios_type3)); + fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); + smbios_set_eos(ctx, t->eos); +- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); +- if (!t->manufacturer) +- t->manufacturer = smbios_add_string(ctx, "Unknown"); ++ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); + t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; + t->bootup_state = SMBIOS_STATE_SAFE; + t->power_supply_state = SMBIOS_STATE_SAFE; +@@ -388,8 +385,8 @@ static void smbios_write_type4_dm(struct smbios_type4 *t, + #endif + + t->processor_family = processor_family; +- t->processor_manufacturer = smbios_add_string(ctx, vendor); +- t->processor_version = smbios_add_string(ctx, name); ++ t->processor_manufacturer = smbios_add_prop(ctx, NULL, vendor); ++ t->processor_version = smbios_add_prop(ctx, NULL, name); + } + + static int smbios_write_type4(ulong *current, int handle, + +From patchwork Thu Dec 7 09:18:50 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Ilias Apalodimas +X-Patchwork-Id: 1873090 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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+ Thu, 07 Dec 2023 01:19:02 -0800 (PST) +From: Ilias Apalodimas +To: trini@konsulko.com, + sjg@chromium.org +Cc: sean.anderson@seco.com, neil.armstrong@linaro.org, + heinrich.schuchardt@canonical.com, mark.kettenis@xs4all.nl, + Ilias Apalodimas , u-boot@lists.denx.de +Subject: [PATCH 2/2 v3] smbios: Fallback to the default DT if sysinfo nodes + are missing +Date: Thu, 7 Dec 2023 11:18:50 +0200 +Message-Id: <20231207091850.17776-3-ilias.apalodimas@linaro.org> +X-Mailer: git-send-email 2.40.1 +In-Reply-To: <20231207091850.17776-1-ilias.apalodimas@linaro.org> +References: <20231207091850.17776-1-ilias.apalodimas@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +In order to fill in the SMBIOS tables U-Boot currently relies on a +"u-boot,sysinfo-smbios" compatible node. This is fine for the boards +that already include such nodes. However with some recent EFI changes, +the majority of boards can boot up distros, which usually rely on +things like dmidecode etc for their reporting. For boards that +lack this special node the SMBIOS output looks like: + +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: Unknown + UUID: Not Settable + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown + +This looks problematic since most of the info are "Unknown". The DT spec +specifies standard properties containing relevant information like +'model' and 'compatible' for which the suggested format is +. Unfortunately the 'model' string found in DTs is +usually lacking the manufacturer so we can't use it for both +'Manufacturer' and 'Product Name' SMBIOS entries reliably. + +So let's add a last resort to our current smbios parsing. If none of +the sysinfo properties are found, scan for those information in the +root node of the device tree. Use the 'model' to fill the 'Product +Name' and the first value of 'compatible' for the 'Manufacturer', since +that always contains one. + +pre-patch: +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: Unknown + Product Name: Unknown + Version: Unknown + Serial Number: 100000000bb24ceb + UUID: 30303031-3030-3030-3061-613234636435 + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown +[...] + +and post patch: +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: raspberrypi + Product Name: Raspberry Pi 4 Model B Rev 1.1 + Version: Unknown + Serial Number: 100000000bb24ceb + UUID: 30303031-3030-3030-3061-613234636435 + Wake-up Type: Reserved + SKU Number: Unknown + Family: Unknown +[...] + +Signed-off-by: Ilias Apalodimas +--- +Simon, I'll work with tou on the refactoring you wanted and +remove the EFI requirement of SMBIOS in !x86 platforms. +Since this code has no tests, I'll add some once the refactoring +is done + +Changes since v2: +- Spelling mistakes +- rebase on top of patch #1 changes +Changes since v1: +- Tokenize the DT node entry and use the appropriate value instead of + the entire string +- Removed Peters tested/reviewed-by tags due to the above + lib/smbios.c | 94 +++++++++++++++++++++++++++++++++++++++++++++++++--- + 1 file changed, 89 insertions(+), 5 deletions(-) + +-- +2.40.1 + +diff --git a/lib/smbios.c b/lib/smbios.c +index 444aa245a273..3f0e1d529537 100644 +--- a/lib/smbios.c ++++ b/lib/smbios.c +@@ -9,11 +9,14 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include ++#include + #ifdef CONFIG_CPU + #include + #include +@@ -43,6 +46,25 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++/** ++ * struct map_sysinfo - Mapping of sysinfo strings to DT ++ * ++ * @sysinfo_str: sysinfo string ++ * @dt_str: DT string ++ * @max: Max index of the tokenized string to pick. Counting starts from 0 ++ * ++ */ ++struct map_sysinfo { ++ const char *sysinfo_str; ++ const char *dt_str; ++ int max; ++}; ++ ++static const struct map_sysinfo sysinfo_to_dt[] = { ++ { .sysinfo_str = "product", .dt_str = "model", 2 }, ++ { .sysinfo_str = "manufacturer", .dt_str = "compatible", 1 }, ++}; ++ + /** + * struct smbios_ctx - context for writing SMBIOS tables + * +@@ -87,6 +109,18 @@ struct smbios_write_method { + const char *subnode_name; + }; + ++static const struct map_sysinfo *convert_sysinfo_to_dt(const char *sysinfo_str) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(sysinfo_to_dt); i++) { ++ if (!strcmp(sysinfo_str, sysinfo_to_dt[i].sysinfo_str)) ++ return &sysinfo_to_dt[i]; ++ } ++ ++ return NULL; ++} ++ + /** + * smbios_add_string() - add a string to the string area + * +@@ -124,6 +158,42 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + } + } + ++/** ++ * get_str_from_dt - Get a substring from a DT property. ++ * After finding the property in the DT, the function ++ * will parse comma-separated values and return the value. ++ * If nprop->max exceeds the number of comma-separated ++ * elements, the last non NULL value will be returned. ++ * Counting starts from zero. ++ * ++ * @nprop: sysinfo property to use ++ * @str: pointer to fill with data ++ * @size: str buffer length ++ */ ++static ++void get_str_from_dt(const struct map_sysinfo *nprop, char *str, size_t size) ++{ ++ const char *dt_str; ++ int cnt = 0; ++ char *token; ++ ++ memset(str, 0, size); ++ if (!nprop || !nprop->max) ++ return; ++ ++ dt_str = ofnode_read_string(ofnode_root(), nprop->dt_str); ++ if (!dt_str) ++ return; ++ ++ memcpy(str, dt_str, size); ++ token = strtok(str, ","); ++ while (token && cnt < nprop->max) { ++ strlcpy(str, token, strlen(token) + 1); ++ token = strtok(NULL, ","); ++ cnt++; ++ } ++} ++ + /** + * smbios_add_prop_si() - Add a property from the devicetree or sysinfo + * +@@ -137,6 +207,8 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) + static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + int sysinfo_id, const char *dval) + { ++ int ret; ++ + if (!dval || !*dval) + dval = "Unknown"; + +@@ -145,18 +217,30 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, + + if (sysinfo_id && ctx->dev) { + char val[SMBIOS_STR_MAX]; +- int ret; + + ret = sysinfo_get_str(ctx->dev, sysinfo_id, sizeof(val), val); + if (!ret) + return smbios_add_string(ctx, val); + } + if (IS_ENABLED(CONFIG_OF_CONTROL)) { +- const char *str; +- +- str = ofnode_read_string(ctx->node, prop); ++ const char *str = NULL; ++ char str_dt[128] = { 0 }; ++ /* ++ * If the node is not valid fallback and try the entire DT ++ * so we can at least fill in manufacturer and board type ++ */ ++ if (ofnode_valid(ctx->node)) { ++ str = ofnode_read_string(ctx->node, prop); ++ } else { ++ const struct map_sysinfo *nprop; ++ ++ nprop = convert_sysinfo_to_dt(prop); ++ get_str_from_dt(nprop, str_dt, sizeof(str_dt)); ++ str = (const char *)str_dt; ++ } + +- return smbios_add_string(ctx, str ? str : dval); ++ ret = smbios_add_string(ctx, str && *str ? str : dval); ++ return ret; + } + + return 0; diff --git a/sources b/sources index a04670b..baad200 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.01-rc3.tar.bz2) = 51a45e6a0008ef04570b6357518c85fd22604be0090ad5bf1dc7c821eb34ea33441314c49128dd0bd3084406b7138497044bb47f7e57d38a680768fb9f2f6577 +SHA512 (u-boot-2024.01-rc4.tar.bz2) = 02ad9abe2a0c34fb11e75f75b1d76a4dc2df2886ed00f0fbec090cfe87d586becfee7c1edce8e95d26d1e34ead26faf928d17fdc6f8dee158a73f93c0078ae0a diff --git a/uboot-tools.spec b/uboot-tools.spec index 6635f59..e77092e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -19,8 +19,7 @@ Source1: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: disable-VBE-by-default.patch -Patch3: 0001-smbios-Simplify-reporting-of-unknown-values.patch -Patch4: 0002-smbios-Fallback-to-the-default-DT-if-sysinfo-nodes-a.patch +Patch3: Provide-a-fallback-to-smbios-tables.patch Patch5: enable-bootmenu-by-default.patch Patch6: uefi-Boot-var-automatic-management-for-removable-medias.patch Patch7: Add-video-damage-tracking.patch @@ -215,6 +214,10 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand %endif %changelog +* Thu Dec 07 2023 Peter Robinson - 1:2024.01-0.2.rc4 +- Update to 2024.01 RC4 +- Rebase SMBIOS patch to latest rev + * Fri Nov 24 2023 Peter Robinson - 1:2024.01-0.1.rc3 - Update to 2024.01 RC3 From 6bcb24bf3d7addaee76c7d5925b4c2399847c1d8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 8 Dec 2023 12:22:27 +0000 Subject: [PATCH 243/351] cleanup board specific docs --- uboot-tools.spec | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index e77092e..b7ab293 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -191,17 +191,9 @@ install -p -m 0644 doc/mkimage.1 %{buildroot}%{_mandir}/man1 install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} ( cd %{buildroot}%{_bindir}; ln -sf fw_printenv fw_setenv ) -# Copy some useful docs over -mkdir -p builds/docs -cp -p board/hisilicon/hikey/README builds/docs/README.hikey -cp -p board/rockchip/evb_rk3399/README builds/docs/README.evb_rk3399 -cp -p board/sunxi/README.sunxi64 builds/docs/README.sunxi64 -cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand - %files %doc README doc/develop/distro.rst doc/README.gpt -%doc doc/README.rockchip doc/develop/uefi doc/usage doc/arch/arm64.rst -%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/ +%doc doc/develop/uefi doc/usage doc/arch/arm64.rst %{_bindir}/* %{_mandir}/man1/mkimage.1* %dir %{_datadir}/uboot/ From eafba21345fc59c167f58ce881c01bb156d9bbcc Mon Sep 17 00:00:00 2001 From: Daan De Meyer Date: Thu, 14 Dec 2023 14:28:34 +0100 Subject: [PATCH 244/351] Enable qemu aarch64 board Useful for testing aarch64 uboot stuff with qemu's aarch64 virt machine. --- aarch64-boards | 1 + 1 file changed, 1 insertion(+) diff --git a/aarch64-boards b/aarch64-boards index ac90276..39a556a 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -66,6 +66,7 @@ pinephone-pro-rk3399 pinetab poplar puma-rk3399 +qemu_arm64 roc-cc-rk3328 rock64-rk3328 rock960-rk3399 From 7b44a7f95beb2772dcf55939d801b05e6ab0a556 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 8 Jan 2024 22:18:37 +0000 Subject: [PATCH 245/351] 2024.01 --- ...-the-DT-provided-by-the-Raspberry-Pi.patch | 141 -- ...tch-to-OF_HAS_PRIOR_STAGE-by-default.patch | 154 ++ rpi5-initial-support.patch | 1910 +++++++++++++++++ sources | 2 +- uboot-tools.spec | 11 +- ...atic-management-for-removable-medias.patch | 154 +- 6 files changed, 2162 insertions(+), 210 deletions(-) delete mode 100644 rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch create mode 100644 rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch create mode 100644 rpi5-initial-support.patch diff --git a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch deleted file mode 100644 index fd032fe..0000000 --- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 52b75976133683dc9fe66e8ad35127125f938bed Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 28 Feb 2023 12:04:34 +0000 -Subject: [PATCH 2/2] rpi: Use OF_BOARD rather than OF_EMBED - -The use of OF_EMBED isn't recommended for standard use and the OF_BOARD -is actually a better fit for the Raspberry Pi as the prior firmware -provides a DT that can be used by U-Boot and the subsequent OS too, but -it still allows the loading of a DT from disk as well if users wish -to use the upstream kernel DT. - -Signed-off-by: Peter Robinson ---- - configs/rpi_0_w_defconfig | 2 +- - configs/rpi_2_defconfig | 2 +- - configs/rpi_3_32b_defconfig | 2 +- - configs/rpi_3_b_plus_defconfig | 2 +- - configs/rpi_3_defconfig | 2 +- - configs/rpi_4_32b_defconfig | 1 + - configs/rpi_4_defconfig | 1 + - configs/rpi_arm64_defconfig | 1 + - configs/rpi_defconfig | 2 +- - 9 files changed, 9 insertions(+), 6 deletions(-) - -diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index 5249b29d76c..8c217848ca2 100644 ---- a/configs/rpi_0_w_defconfig -+++ b/configs/rpi_0_w_defconfig -@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index 154284765f4..bfc5679fb7e 100644 ---- a/configs/rpi_2_defconfig -+++ b/configs/rpi_2_defconfig -@@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index ef1f25d2ad7..54cdcee980a 100644 ---- a/configs/rpi_3_32b_defconfig -+++ b/configs/rpi_3_32b_defconfig -@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig -index 154615d78a1..3008c7a1c18 100644 ---- a/configs/rpi_3_b_plus_defconfig -+++ b/configs/rpi_3_b_plus_defconfig -@@ -22,7 +22,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index f0cf7f8e236..f7b9108ba00 100644 ---- a/configs/rpi_3_defconfig -+++ b/configs/rpi_3_defconfig -@@ -22,7 +22,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 713b2ee231c..fa20ab767fe 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -24,6 +24,7 @@ CONFIG_CMD_MMC=y - CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 24f70b14fe8..741d4dbbbf4 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -24,6 +24,7 @@ CONFIG_CMD_MMC=y - CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index 1d1ff12a58c..5e1195dd786 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -23,6 +23,7 @@ CONFIG_CMD_MMC=y - CONFIG_CMD_PCI=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y - CONFIG_TFTP_TSIZE=y -diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index 28b92b14456..1504093eddf 100644 ---- a/configs/rpi_defconfig -+++ b/configs/rpi_defconfig -@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y -+CONFIG_OF_BOARD=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --- -2.39.2 - diff --git a/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch b/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch new file mode 100644 index 0000000..9ac9512 --- /dev/null +++ b/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch @@ -0,0 +1,154 @@ +From 5aaa4c98be87eef370a0c50bf6d4ab7f9fcde886 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 8 Jan 2024 22:13:59 +0000 +Subject: [PATCH] rpi: Switch to OF_HAS_PRIOR_STAGE by default +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On all Raspberry Pi platforms, we're loaded by a prior stage firmware +that has assembled and passed on a device tree binary for us to use. +Switch to using this tree by default. + +Signed-off-by: Peter Robinson +Cc: Matthias Brugger +Cc: Simon Glass +Cc: François Ozog +Signed-off-by: Tom Rini +Tested-by: Simon Glass +--- +To be clear, this is on top of current -next where I've applied v8 of +Simon's series that introduces OF_HAS_PRIOR_STAGE. + +I've only been able to test this on my Raspberry Pi 3 boards but this +should work everywhere. What may, or may not, be a problem is that +arch/arm/dts/bcm283x-u-boot.dtsi is never used now. On the other hand, +I believe this should stop the problems we have where changes made to +the device tree via config.txt or similar aren't reflected when booting +U-Boot or Linux since we will be using that tree for certain now. +--- + arch/arm/Kconfig | 1 + + arch/arm/mach-bcm283x/Kconfig | 3 --- + configs/rpi_0_w_defconfig | 1 - + configs/rpi_2_defconfig | 1 - + configs/rpi_3_32b_defconfig | 1 - + configs/rpi_3_b_plus_defconfig | 1 - + configs/rpi_3_defconfig | 1 - + configs/rpi_defconfig | 1 - + 8 files changed, 1 insertion(+), 9 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 1fd7aacc380..33bbe7b4898 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -645,6 +645,7 @@ config ARCH_BCM283X + select SERIAL_SEARCH_ALL + imply CMD_DM + imply FAT_WRITE ++ imply OF_HAS_PRIOR_STAGE + + config ARCH_BCMSTB + bool "Broadcom BCM7XXX family" +diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig +index 6ce278c6d29..b3287ce8bce 100644 +--- a/arch/arm/mach-bcm283x/Kconfig ++++ b/arch/arm/mach-bcm283x/Kconfig +@@ -163,7 +163,6 @@ config TARGET_RPI_4_32B + + This option creates a build targeting the ARMv7/AArch32 ISA. + select BCM2711_32B +- imply OF_HAS_PRIOR_STAGE + + config TARGET_RPI_4 + bool "Raspberry Pi 4 64-bit build" +@@ -189,7 +188,6 @@ config TARGET_RPI_4 + + This option creates a build targeting the ARMv8/AArch64 ISA. + select BCM2711_64B +- imply OF_HAS_PRIOR_STAGE + + config TARGET_RPI_ARM64 + bool "Raspberry Pi one binary 64-bit build" +@@ -197,7 +195,6 @@ config TARGET_RPI_ARM64 + Support for all armv8 based Raspberry Pi variants, such as + the RPi 4 model B, in AArch64 (64-bit) mode. + select ARM64 +- imply OF_HAS_PRIOR_STAGE + + endchoice + +diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig +index bed143d64d6..98f8904c918 100644 +--- a/configs/rpi_0_w_defconfig ++++ b/configs/rpi_0_w_defconfig +@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig +index e4e4843e8cd..1b8676e1d10 100644 +--- a/configs/rpi_2_defconfig ++++ b/configs/rpi_2_defconfig +@@ -25,7 +25,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig +index 215396599e4..abc10a79ada 100644 +--- a/configs/rpi_3_32b_defconfig ++++ b/configs/rpi_3_32b_defconfig +@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig +index d1ec55e558a..3c8f8fc1bb7 100644 +--- a/configs/rpi_3_b_plus_defconfig ++++ b/configs/rpi_3_b_plus_defconfig +@@ -23,7 +23,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig +index 8e9c35b3cef..9853c448809 100644 +--- a/configs/rpi_3_defconfig ++++ b/configs/rpi_3_defconfig +@@ -23,7 +23,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig +index 89d6372c1de..060a8809506 100644 +--- a/configs/rpi_defconfig ++++ b/configs/rpi_defconfig +@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-- +2.43.0 + diff --git a/rpi5-initial-support.patch b/rpi5-initial-support.patch new file mode 100644 index 0000000..4a79f31 --- /dev/null +++ b/rpi5-initial-support.patch @@ -0,0 +1,1910 @@ +From patchwork Mon Dec 18 21:03:35 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T . Ivanov" +Subject: [PATCH v3 1/7] rpi5: add initial memory map for bcm2712 +Date: Mon, 18 Dec 2023 23:03:35 +0200 +Message-ID: <20231218210341.30073-2-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +Authentication-Results: smtp-out1.suse.de; + none +X-Spamd-Result: default: False [0.70 / 50.00]; ARC_NA(0.00)[]; + RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; + TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; + NEURAL_HAM_LONG(-1.00)[-1.000]; RCVD_COUNT_THREE(0.00)[3]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; + MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,bedrocksystems.com:email]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; + FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Dmitry Malkin + +includes: +* 1GB of RAM (from 4GB or 8GB total) +* VPU memory interface +* AXI ranges (main peripherals) + +Signed-off-by: Dmitry Malkin +Signed-off-by: Ivan T. Ivanov +--- + arch/arm/mach-bcm283x/init.c | 38 +++++++++++++++++++++++++++++++++++- + 1 file changed, 37 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 7265faf6ce..af23b9711a 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -19,7 +19,7 @@ + #ifdef CONFIG_ARM64 + #include + +-#define MEM_MAP_MAX_ENTRIES (4) ++#define MEM_MAP_MAX_ENTRIES (5) + + static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = { + { +@@ -68,6 +68,41 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = { + } + }; + ++static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = { ++ { ++ .virt = 0x00000000UL, ++ .phys = 0x00000000UL, ++ .size = 0x3f800000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | ++ PTE_BLOCK_INNER_SHARE ++ }, { ++ .virt = 0x3f800000UL, ++ .phys = 0x3f800000UL, ++ .size = 0x00800000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { ++ /* Beginning of AXI bus where uSD controller lives */ ++ .virt = 0x1000000000UL, ++ .phys = 0x1000000000UL, ++ .size = 0x0002000000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { ++ .virt = 0x107c000000UL, ++ .phys = 0x107c000000UL, ++ .size = 0x0004000000UL, ++ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | ++ PTE_BLOCK_NON_SHARE | ++ PTE_BLOCK_PXN | PTE_BLOCK_UXN ++ }, { ++ /* List terminator */ ++ 0, ++ } ++}; ++ + struct mm_region *mem_map = bcm283x_mem_map; + + /* +@@ -78,6 +113,7 @@ static const struct udevice_id board_ids[] = { + { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map}, + { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map}, + { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map}, ++ { .compatible = "brcm,bcm2712", .data = (ulong)&bcm2712_mem_map}, + { }, + }; + + +From patchwork Mon Dec 18 21:03:36 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T . Ivanov" +Subject: [PATCH v3 2/7] rpi5: Use devicetree as alternative way to read IO + base addresses +Date: Mon, 18 Dec 2023 23:03:36 +0200 +Message-ID: <20231218210341.30073-3-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +X-Spamd-Result: default: False [10.00 / 50.00]; ARC_NA(0.00)[]; + RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_SPAM(5.10)[100.00%]; + FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; + FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; + RCVD_COUNT_THREE(0.00)[3]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[bedrocksystems.com:email,suse.de:email]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; + FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[] +Authentication-Results: smtp-out2.suse.de; + none +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Dmitry Malkin + +MBOX and Watchdog on RPi5/bcm2712 has a different base IO offsets. +Find them via devicetree blob passed by bootloader. + +Signed-off-by: Dmitry Malkin +Signed-off-by: Ivan T. Ivanov +--- + arch/arm/mach-bcm283x/include/mach/base.h | 5 ++- + arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +- + arch/arm/mach-bcm283x/include/mach/sdhci.h | 3 +- + arch/arm/mach-bcm283x/include/mach/timer.h | 3 +- + arch/arm/mach-bcm283x/include/mach/wdog.h | 3 +- + arch/arm/mach-bcm283x/init.c | 43 ++++++++++++++++++---- + 6 files changed, 43 insertions(+), 17 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h +index 4ccaf69693..6de99e7ea1 100644 +--- a/arch/arm/mach-bcm283x/include/mach/base.h ++++ b/arch/arm/mach-bcm283x/include/mach/base.h +@@ -6,7 +6,10 @@ + #ifndef _BCM283x_BASE_H_ + #define _BCM283x_BASE_H_ + +-extern unsigned long rpi_bcm283x_base; ++extern unsigned long rpi_mbox_base; ++extern unsigned long rpi_timer_base; ++extern unsigned long rpi_sdhci_base; ++extern unsigned long rpi_wdog_base; + + #ifdef CONFIG_ARMV7_LPAE + #ifdef CONFIG_TARGET_RPI_4_32B +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 490664f878..35d4e2f075 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -38,8 +38,7 @@ + + /* Raw mailbox HW */ + +-#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ +- rpi_bcm283x_base + 0x0000b880; }) ++#define BCM2835_MBOX_PHYSADDR rpi_mbox_base + + struct bcm2835_mbox_regs { + u32 read; +diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h +index 7323690687..e837c679c4 100644 +--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h ++++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h +@@ -8,8 +8,7 @@ + + #include + +-#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ +- rpi_bcm283x_base + 0x00300000; }) ++#define BCM2835_SDHCI_PHYSADDR rpi_sdhci_base + + int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); + +diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h +index 5567dbd7f3..60500a256d 100644 +--- a/arch/arm/mach-bcm283x/include/mach/timer.h ++++ b/arch/arm/mach-bcm283x/include/mach/timer.h +@@ -11,8 +11,7 @@ + #include + #endif + +-#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ +- rpi_bcm283x_base + 0x00003000; }) ++#define BCM2835_TIMER_PHYSADDR rpi_timer_base + + #define BCM2835_TIMER_CS_M3 (1 << 3) + #define BCM2835_TIMER_CS_M2 (1 << 2) +diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h +index 9942666720..b950560674 100644 +--- a/arch/arm/mach-bcm283x/include/mach/wdog.h ++++ b/arch/arm/mach-bcm283x/include/mach/wdog.h +@@ -8,8 +8,7 @@ + + #include + +-#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ +- rpi_bcm283x_base + 0x00100000; }) ++#define BCM2835_WDOG_PHYSADDR rpi_wdog_base + + struct bcm2835_wdog_regs { + u32 unknown0[7]; +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index af23b9711a..1c5c748484 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -151,7 +151,11 @@ static void rpi_update_mem_map(void) + static void rpi_update_mem_map(void) {} + #endif + +-unsigned long rpi_bcm283x_base = 0x3f000000; ++/* Default bcm283x devices addresses */ ++unsigned long rpi_mbox_base = 0x3f00b880; ++unsigned long rpi_sdhci_base = 0x3f300000; ++unsigned long rpi_wdog_base = 0x3f100000; ++unsigned long rpi_timer_base = 0x3f003000; + + int arch_cpu_init(void) + { +@@ -162,22 +166,45 @@ int arch_cpu_init(void) + + int mach_cpu_init(void) + { +- int ret, soc_offset; ++ int ret, soc, offset; + u64 io_base, size; + + rpi_update_mem_map(); + + /* Get IO base from device tree */ +- soc_offset = fdt_path_offset(gd->fdt_blob, "/soc"); +- if (soc_offset < 0) +- return soc_offset; ++ soc = fdt_path_offset(gd->fdt_blob, "/soc"); ++ if (soc < 0) ++ return soc; + +- ret = fdt_read_range((void *)gd->fdt_blob, soc_offset, 0, NULL, +- &io_base, &size); ++ ret = fdt_read_range((void *)gd->fdt_blob, soc, 0, NULL, ++ &io_base, &size); + if (ret) + return ret; + +- rpi_bcm283x_base = io_base; ++ rpi_mbox_base = io_base + 0x00b880; ++ rpi_sdhci_base = io_base + 0x300000; ++ rpi_wdog_base = io_base + 0x100000; ++ rpi_timer_base = io_base + 0x003000; ++ ++ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, ++ "brcm,bcm2835-mbox"); ++ if (offset > soc) ++ rpi_mbox_base = fdt_get_base_address(gd->fdt_blob, offset); ++ ++ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, ++ "brcm,bcm2835-sdhci"); ++ if (offset > soc) ++ rpi_sdhci_base = fdt_get_base_address(gd->fdt_blob, offset); ++ ++ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, ++ "brcm,bcm2835-system-timer"); ++ if (offset > soc) ++ rpi_timer_base = fdt_get_base_address(gd->fdt_blob, offset); ++ ++ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, ++ "brcm,bcm2712-pm"); ++ if (offset > soc) ++ rpi_wdog_base = fdt_get_base_address(gd->fdt_blob, offset); + + return 0; + } + +From patchwork Mon Dec 18 21:03:37 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T. Ivanov" +Subject: [PATCH v3 3/7] rpi5: Use devicetree to retrieve board revision +Date: Mon, 18 Dec 2023 23:03:37 +0200 +Message-ID: <20231218210341.30073-4-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +Authentication-Results: smtp-out1.suse.de; + none +X-Spamd-Result: default: False [1.14 / 50.00]; ARC_NA(0.00)[]; + RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; + TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; + NEURAL_HAM_LONG(-1.00)[-1.000]; + R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; + RCVD_COUNT_THREE(0.00)[3]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; + MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; + FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-2.56)[98.03%] +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Firmware on RPi5 return error on board revision query +through firmware interface, but on the other hand it fills +"linux,revision" in "system" node, so use it to detect board +revision. + + system { + linux,revision = <0xc04170>; + linux,serial = <0x6cf44e80 0x3c533ede>; + }; + +Signed-off-by: Ivan T. Ivanov +--- + board/raspberrypi/rpi/rpi.c | 22 +++++++++++++++++++--- + 1 file changed, 19 insertions(+), 3 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index cd823ad746..2851ebc985 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -171,6 +171,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2711-rpi-cm4.dtb", + true, + }, ++ [0x17] = { ++ "5 Model B", ++ DTB_DIR "bcm2712-rpi-5-b.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { +@@ -429,15 +434,27 @@ static void get_board_revision(void) + int ret; + const struct rpi_model *models; + uint32_t models_count; ++ ofnode node; + + BCM2835_MBOX_INIT_HDR(msg); + BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV); + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); + if (ret) { +- printf("bcm2835: Could not query board revision\n"); + /* Ignore error; not critical */ +- return; ++ node = ofnode_path("/system"); ++ if (!ofnode_valid(node)) { ++ printf("bcm2835: Could not find /system node\n"); ++ return; ++ } ++ ++ ret = ofnode_read_u32(node, "linux,revision", &revision); ++ if (ret) { ++ printf("bcm2835: Could not find linux,revision\n"); ++ return; ++ } ++ } else { ++ revision = msg->get_board_rev.body.resp.rev; + } + + /* +@@ -451,7 +468,6 @@ static void get_board_revision(void) + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250 + * http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594 + */ +- revision = msg->get_board_rev.body.resp.rev; + if (revision & 0x800000) { + rev_scheme = 1; + rev_type = (revision >> 4) & 0xff; + +From patchwork Mon Dec 18 21:03:38 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. Ivanov" +X-Patchwork-Id: 1877651 +X-Patchwork-Delegate: pbrobinson@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (1024-bit key; + unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 + header.s=susede2_rsa header.b=v2vbP3rz; + dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 + header.s=susede2_ed25519 header.b=DCEhbGvW; + dkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de + header.a=rsa-sha256 header.s=susede2_rsa header.b=v2vbP3rz; + dkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 + header.s=susede2_ed25519 header.b=DCEhbGvW; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4SvC4X1dxWz1ydc + for ; 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T. Ivanov" +Subject: [PATCH v3 4/7] bcm2835: brcm, + bcm2708-fb device is using r5g6b5 format +Date: Mon, 18 Dec 2023 23:03:38 +0200 +Message-ID: <20231218210341.30073-5-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +X-Spamd-Result: default: False [4.90 / 50.00]; ARC_NA(0.00)[]; + RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; + TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; + R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; + RCVD_COUNT_THREE(0.00)[3]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; + FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-0.00)[34.66%] +Authentication-Results: smtp-out1.suse.de; + none +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +brcm,bcm2708-fb device provided by firmware on RPi5 uses +16 bits per pixel. Update driver to properly handle this. + +Signed-off-by: Ivan T. Ivanov +--- + drivers/video/bcm2835.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index 14942526f1..245c958b6e 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -43,7 +43,7 @@ static int bcm2835_video_probe(struct udevice *dev) + + uc_priv->xsize = w; + uc_priv->ysize = h; +- uc_priv->bpix = VIDEO_BPP32; ++ uc_priv->bpix = dev_get_driver_data(dev); + plat->base = fb_base; + plat->size = fb_size; + +@@ -51,11 +51,11 @@ static int bcm2835_video_probe(struct udevice *dev) + } + + static const struct udevice_id bcm2835_video_ids[] = { +- { .compatible = "brcm,bcm2835-hdmi" }, +- { .compatible = "brcm,bcm2711-hdmi0" }, +- { .compatible = "brcm,bcm2708-fb" }, ++ { .compatible = "brcm,bcm2835-hdmi", .data = VIDEO_BPP32}, ++ { .compatible = "brcm,bcm2711-hdmi0", .data = VIDEO_BPP32}, ++ { .compatible = "brcm,bcm2708-fb", .data = VIDEO_BPP16 }, + #if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB) +- { .compatible = "simple-framebuffer" }, ++ { .compatible = "simple-framebuffer", .data = VIDEO_BPP32}, + #endif + { } + }; + +From patchwork Mon Dec 18 21:03:39 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T. Ivanov" +Subject: [PATCH v3 5/7] mmc: bcmstb: Add support for bcm2712 SD controller +Date: Mon, 18 Dec 2023 23:03:39 +0200 +Message-ID: <20231218210341.30073-6-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +X-Spamd-Result: default: False [1.90 / 50.00]; ARC_NA(0.00)[]; + RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; + TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; + R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; + RCVD_COUNT_THREE(0.00)[3]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; + FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] +Authentication-Results: smtp-out1.suse.de; + none +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Borrow SD quirks from vendor Linux driver. + +"BCM2712 unfortunately carries with it a perennial bug with the SD +controller register interface present on previous chips (2711/2709/2708). +Accesses must be dword-sized and a read-modify-write cycle to the 32-bit +registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and +BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. +BCM2712 does not seem to need the extreme delay between each write as on +previous chips, just the serialisation of writes to these registers in a +single 32-bit operation." + +Signed-off-by: Ivan T. Ivanov +--- + drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++++++++++++++++++- + 1 file changed, 172 insertions(+), 1 deletion(-) + +diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c +index dc96818cff..21489e66c0 100644 +--- a/drivers/mmc/bcmstb_sdhci.c ++++ b/drivers/mmc/bcmstb_sdhci.c +@@ -38,6 +38,16 @@ + */ + #define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000 + ++#define SDIO_CFG_CTRL 0x0 ++#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31) ++#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30) ++ ++#define SDIO_CFG_SD_PIN_SEL 0x44 ++#define SDIO_CFG_SD_PIN_SEL_MASK 0x3 ++#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1) ++ ++#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) ++ + /* + * This driver has only been tested with eMMC devices; SD devices may + * not work. +@@ -47,6 +57,53 @@ struct sdhci_bcmstb_plat { + struct mmc mmc; + }; + ++struct sdhci_bcmstb_host { ++ struct sdhci_host host; ++ u32 shadow_cmd; ++ u32 shadow_blk; ++ bool is_cmd_shadowed; ++ bool is_blk_shadowed; ++}; ++ ++struct sdhci_brcmstb_dev_priv { ++ int (*init)(struct udevice *dev); ++ struct sdhci_ops *ops; ++}; ++ ++static inline struct sdhci_bcmstb_host *to_bcmstb_host(struct sdhci_host *host) ++{ ++ return container_of(host, struct sdhci_bcmstb_host, host); ++} ++ ++static int sdhci_brcmstb_init_2712(struct udevice *dev) ++{ ++ struct sdhci_host *host = dev_get_priv(dev); ++ void *cfg_regs; ++ u32 reg; ++ ++ /* Map in the non-standard CFG registers */ ++ cfg_regs = dev_remap_addr_name(dev, "cfg"); ++ if (!cfg_regs) ++ return -ENOENT; ++ ++ if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) || ++ (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) { ++ /* Force presence */ ++ reg = readl(cfg_regs + SDIO_CFG_CTRL); ++ reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV; ++ reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN; ++ writel(reg, cfg_regs + SDIO_CFG_CTRL); ++ } else { ++ /* Enable card detection line */ ++ reg = readl(cfg_regs + SDIO_CFG_SD_PIN_SEL); ++ reg &= ~SDIO_CFG_SD_PIN_SEL_MASK; ++ reg |= SDIO_CFG_SD_PIN_SEL_CARD; ++ writel(reg, cfg_regs + SDIO_CFG_SD_PIN_SEL); ++ } ++ ++ return 0; ++} ++ + static int sdhci_bcmstb_bind(struct udevice *dev) + { + struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); +@@ -58,10 +115,14 @@ static int sdhci_bcmstb_probe(struct udevice *dev) + { + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); +- struct sdhci_host *host = dev_get_priv(dev); ++ struct sdhci_bcmstb_host *bcmstb = dev_get_priv(dev); ++ struct sdhci_host *host = &bcmstb->host; ++ struct sdhci_brcmstb_dev_priv *dev_priv; + fdt_addr_t base; + int ret; + ++ dev_priv = (struct sdhci_brcmstb_dev_priv *)dev_get_driver_data(dev); ++ + base = dev_read_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; +@@ -75,6 +136,10 @@ static int sdhci_bcmstb_probe(struct udevice *dev) + + host->mmc = &plat->mmc; + host->mmc->dev = dev; ++ ++ if (dev_priv && dev_priv->ops) ++ host->ops = dev_priv->ops; ++ + ret = sdhci_setup_cfg(&plat->cfg, host, + BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY, + BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY); +@@ -84,10 +149,116 @@ static int sdhci_bcmstb_probe(struct udevice *dev) + upriv->mmc = &plat->mmc; + host->mmc->priv = host; + ++ if (dev_priv && dev_priv->init) { ++ ret = dev_priv->init(dev); ++ if (ret) ++ return ret; ++ } ++ + return sdhci_probe(dev); + } + ++static u16 sdhci_brcmstb_32bits_readw(struct sdhci_host *host, int reg) ++{ ++ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); ++ u16 word; ++ u32 val; ++ ++ if (reg == SDHCI_TRANSFER_MODE && bcmstb->is_cmd_shadowed) { ++ /* Get the saved transfer mode */ ++ val = bcmstb->shadow_cmd; ++ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && ++ bcmstb->is_blk_shadowed) { ++ /* Get the saved block info */ ++ val = bcmstb->shadow_blk; ++ } else { ++ val = readl(host->ioaddr + (reg & ~3)); ++ } ++ ++ word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; ++ return word; ++} ++ ++static u8 sdhci_brcmstb_32bits_readb(struct sdhci_host *host, int reg) ++{ ++ u32 val = readl(host->ioaddr + (reg & ~3)); ++ u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff; ++ return byte; ++} ++ ++/* ++ * BCM2712 unfortunately carries with it a perennial bug with the SD ++ * controller register interface present on previous chips (2711/2709/2708). ++ * Accesses must be dword-sized and a read-modify-write cycle to the ++ * 32-bit registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and ++ * BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. ++ * BCM2712 does not seem to need the extreme delay between each write as ++ * on previous chips, just the serialisation of writes to these registers ++ * in a single 32-bit operation. ++ */ ++static void sdhci_brcmstb_32bits_writew(struct sdhci_host *host, u16 val, int reg) ++{ ++ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); ++ u32 word_shift = REG_OFFSET_IN_BITS(reg); ++ u32 mask = 0xffff << word_shift; ++ u32 oldval, newval; ++ ++ if (reg == SDHCI_COMMAND) { ++ /* Write the block now as we are issuing a command */ ++ if (bcmstb->is_blk_shadowed) { ++ writel(bcmstb->shadow_blk, host->ioaddr + SDHCI_BLOCK_SIZE); ++ bcmstb->is_blk_shadowed = false; ++ } ++ oldval = bcmstb->shadow_cmd; ++ bcmstb->is_cmd_shadowed = false; ++ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && ++ bcmstb->is_blk_shadowed) { ++ /* Block size and count are stored in shadow reg */ ++ oldval = bcmstb->shadow_blk; ++ } else { ++ /* Read reg, all other registers are not shadowed */ ++ oldval = readl(host->ioaddr + (reg & ~3)); ++ } ++ newval = (oldval & ~mask) | (val << word_shift); ++ ++ if (reg == SDHCI_TRANSFER_MODE) { ++ /* Save the transfer mode until the command is issued */ ++ bcmstb->shadow_cmd = newval; ++ bcmstb->is_cmd_shadowed = true; ++ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { ++ /* Save the block info until the command is issued */ ++ bcmstb->shadow_blk = newval; ++ bcmstb->is_blk_shadowed = true; ++ } else { ++ /* Command or other regular 32-bit write */ ++ writel(newval, host->ioaddr + (reg & ~3)); ++ } ++} ++ ++static void sdhci_brcmstb_32bits_writeb(struct sdhci_host *host, u8 val, int reg) ++{ ++ u32 oldval = readl(host->ioaddr + (reg & ~3)); ++ u32 byte_shift = REG_OFFSET_IN_BITS(reg); ++ u32 mask = 0xff << byte_shift; ++ u32 newval = (oldval & ~mask) | (val << byte_shift); ++ ++ writel(newval, host->ioaddr + (reg & ~3)); ++} ++ ++static struct sdhci_ops sdhci_brcmstb_ops_2712 = { ++ .read_b = sdhci_brcmstb_32bits_readb, ++ .read_w = sdhci_brcmstb_32bits_readw, ++ .write_w = sdhci_brcmstb_32bits_writew, ++ .write_b = sdhci_brcmstb_32bits_writeb, ++}; ++ ++static const struct sdhci_brcmstb_dev_priv match_priv_2712 = { ++ .init = sdhci_brcmstb_init_2712, ++ .ops = &sdhci_brcmstb_ops_2712, ++}; ++ + static const struct udevice_id sdhci_bcmstb_match[] = { ++ { .compatible = "brcm,bcm2712-sdhci", .data = (ulong)&match_priv_2712 }, + { .compatible = "brcm,bcm7425-sdhci" }, + { .compatible = "brcm,sdhci-brcmstb" }, + { } + +From patchwork Mon Dec 18 21:03:40 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T. Ivanov" +Subject: [PATCH v3 6/7] configs: rpi_arm64: enable SDHCI BCMSTB driver +Date: Mon, 18 Dec 2023 23:03:40 +0200 +Message-ID: <20231218210341.30073-7-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +Authentication-Results: smtp-out1.suse.de; + dkim=pass header.d=suse.de header.s=susede2_rsa header.b="f/19Tx1x"; + dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e0CvACbS +X-Rspamd-Server: rspamd2.dmz-prg2.suse.org +X-Spamd-Result: default: False [-1.62 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; + RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; + SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; + TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; + BROKEN_CONTENT_TYPE(1.50)[]; RCVD_COUNT_THREE(0.00)[3]; + DKIM_TRACE(0.00)[suse.de:+]; MX_GOOD(-0.01)[]; + RCPT_COUNT_SEVEN(0.00)[11]; NEURAL_HAM_SHORT(-0.20)[-1.000]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.11)[66.45%]; + ARC_NA(0.00)[]; + R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; + FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; + DWL_DNSWL_HI(-3.50)[suse.de:dkim]; + NEURAL_HAM_LONG(-1.00)[-1.000]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; + FUZZY_BLOCKED(0.00)[rspamd.com]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; + RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] +X-Rspamd-Queue-Id: AA225222AF +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +RPi5 have "brcm,bcm2712-sdhci" controller which is +handled by "sdhci-bcmstb" driver, so enable it. + +Signed-off-by: Ivan T. Ivanov +--- + configs/rpi_arm64_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index f9dade18f6..1107fd11de 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -33,6 +33,7 @@ CONFIG_BCM2835_GPIO=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_BCM2835=y ++CONFIG_MMC_SDHCI_BCMSTB=y + CONFIG_BCMGENET=y + CONFIG_PCI_BRCMSTB=y + CONFIG_PINCTRL=y + +From patchwork Mon Dec 18 21:03:41 2023 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: "Ivan T. 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Ivanov" +To: Matthias Brugger , + Peter Robinson +Cc: Dmitry Malkin , + Thomas Fitzsimmons , Peng Fan , + Jaehoon Chung , Anatolij Gustschin , + wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, + "Ivan T. Ivanov" +Subject: [PATCH v3 7/7] pci: pcie-brcmstb: Add bcm2712 PCIe controller support +Date: Mon, 18 Dec 2023 23:03:41 +0200 +Message-ID: <20231218210341.30073-8-iivanov@suse.de> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> +References: <20231218210341.30073-1-iivanov@suse.de> +MIME-Version: 1.0 +X-Rspamd-Server: rspamd1.dmz-prg2.suse.org +X-Spamd-Bar: / +X-Spamd-Result: default: False [-0.31 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; + RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; + TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; + BROKEN_CONTENT_TYPE(1.50)[]; + R_RATELIMIT(0.00)[to_ip_from(RLccgikja4sxqnupiwsfdm9q1r)]; + RCVD_COUNT_THREE(0.00)[3]; DKIM_TRACE(0.00)[suse.de:+]; + MX_GOOD(-0.01)[]; RCPT_COUNT_SEVEN(0.00)[11]; + FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; + MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.00)[27.73%]; + ARC_NA(0.00)[]; + R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; + FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; + TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; + DWL_DNSWL_HI(-3.50)[suse.de:dkim]; + DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; + MID_CONTAINS_FROM(1.00)[]; + DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; + FUZZY_BLOCKED(0.00)[rspamd.com]; + FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; + RCVD_TLS_ALL(0.00)[]; + RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] +Authentication-Results: smtp-out2.suse.de; + dkim=pass header.d=suse.de header.s=susede2_rsa header.b=1by1WnE8; + dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e64lBvSE +X-Rspamd-Queue-Id: 5507C1F6E6 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +PCIe controller have minor register map difference compared +to bcm2711 variant. Handle this using device specific register +offset. + +Signed-off-by: Ivan T. Ivanov +--- + drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++---- + 1 file changed, 19 insertions(+), 4 deletions(-) + +diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c +index cd45f0bee9..d63e715b2e 100644 +--- a/drivers/pci/pcie_brcmstb.c ++++ b/drivers/pci/pcie_brcmstb.c +@@ -90,7 +90,6 @@ + #define PCIE_MEM_WIN0_LIMIT_HI(win) \ + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) + +-#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 + #define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 + + #define PCIE_MSI_INTR2_CLR 0x4508 +@@ -131,6 +130,10 @@ + #define SSC_STATUS_PLL_LOCK_MASK 0x800 + #define SSC_STATUS_PLL_LOCK_SHIFT 11 + ++struct pcie_cfg_data { ++ unsigned long hard_debug_offs; ++}; ++ + /** + * struct brcm_pcie - the PCIe controller state + * @base: Base address of memory mapped IO registers of the controller +@@ -141,6 +144,7 @@ + struct brcm_pcie { + void __iomem *base; + ++ struct pcie_cfg_data *cfg; + int gen; + bool ssc; + }; +@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev) + /* Take the bridge out of reset */ + clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); + +- clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, ++ clrbits_le32(base + pcie->cfg->hard_debug_offs, + PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); + + /* Wait for SerDes to be stable */ +@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev) + setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK); + + /* Turn off SerDes */ +- setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, ++ setbits_le32(base + pcie->cfg->hard_debug_offs, + PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); + + /* Shutdown bridge */ +@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) + if (!pcie->base) + return -EINVAL; + ++ pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev); ++ + pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); + + ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed); +@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = { + .write_config = brcm_pcie_write_config, + }; + ++static const struct pcie_cfg_data bcm2711_cfg = { ++ .hard_debug_offs = 0x4204 ++}; ++ ++static const struct pcie_cfg_data bcm2712_cfg = { ++ .hard_debug_offs = 0x4304 ++}; ++ + static const struct udevice_id brcm_pcie_ids[] = { +- { .compatible = "brcm,bcm2711-pcie" }, ++ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg }, ++ { .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg }, + { } + }; + diff --git a/sources b/sources index baad200..30e8529 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.01-rc4.tar.bz2) = 02ad9abe2a0c34fb11e75f75b1d76a4dc2df2886ed00f0fbec090cfe87d586becfee7c1edce8e95d26d1e34ead26faf928d17fdc6f8dee158a73f93c0078ae0a +SHA512 (u-boot-2024.01.tar.bz2) = 45bd093ba3bda23e43cdde83d8656c1ee1348ac2886ecff1fee475f101ac4965a5be6565408fa5b990c723f3fdc833edfca60a719f735a43040cd14a1b59a88b diff --git a/uboot-tools.spec b/uboot-tools.spec index b7ab293..8083a3c 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -26,9 +26,11 @@ Patch7: Add-video-damage-tracking.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support -Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch +Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +# Lots more to do, mostly untested, definitely unsupported +Patch12: rpi5-initial-support.patch #Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc @@ -206,6 +208,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Mon Jan 08 2024 Peter Robinson - 1:2024.01-1 +- Update to 2024.01 + * Thu Dec 07 2023 Peter Robinson - 1:2024.01-0.2.rc4 - Update to 2024.01 RC4 - Rebase SMBIOS patch to latest rev diff --git a/uefi-Boot-var-automatic-management-for-removable-medias.patch b/uefi-Boot-var-automatic-management-for-removable-medias.patch index aa8db6c..48ae88e 100644 --- a/uefi-Boot-var-automatic-management-for-removable-medias.patch +++ b/uefi-Boot-var-automatic-management-for-removable-medias.patch @@ -1,17 +1,17 @@ -From patchwork Mon Oct 16 06:45:24 2023 +From patchwork Fri Nov 10 04:25:37 2023 Content-Type: text/plain; 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- Sun, 15 Oct 2023 23:47:07 -0700 (PDT) + AGHT+IE/39rKwHRMrxLkfDXIlyOXct/rRbXebKb2Lc3eaLeJaCt4Vmnxn7CrXnlXXLzUgocEmJUKcA== +X-Received: by 2002:a05:6214:d44:b0:675:667d:a1b6 with SMTP id + 4-20020a0562140d4400b00675667da1b6mr7212832qvr.0.1699590440388; + Thu, 09 Nov 2023 20:27:20 -0800 (PST) Received: from localhost ([164.70.16.189]) by smtp.gmail.com with ESMTPSA id - fa13-20020a056a002d0d00b006b1c14a493fsm5242447pfb.71.2023.10.15.23.47.06 + n18-20020a170902e55200b001c0bf60ba5csm4304818plf.272.2023.11.09.20.27.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sun, 15 Oct 2023 23:47:06 -0700 (PDT) + Thu, 09 Nov 2023 20:27:19 -0800 (PST) From: Masahisa Kojima To: u-boot@lists.denx.de Cc: Heinrich Schuchardt , @@ -99,14 +99,15 @@ Cc: Heinrich Schuchardt , Michal Simek , Raymond Mao , Masahisa Kojima , Joao Marcos Costa , + Huang Jianan , Thomas Petazzoni , - Miquel Raynal -Subject: [PATCH v7 7/9] Boot var automatic management for removable medias -Date: Mon, 16 Oct 2023 15:45:24 +0900 -Message-Id: <20231016064526.2410856-8-masahisa.kojima@linaro.org> + Miquel Raynal , linux-erofs@lists.ozlabs.org +Subject: [PATCH v12 4/9] efi_loader: Boot var automatic management +Date: Fri, 10 Nov 2023 13:25:37 +0900 +Message-Id: <20231110042542.3797301-5-masahisa.kojima@linaro.org> X-Mailer: git-send-email 2.34.1 -In-Reply-To: <20231016064526.2410856-1-masahisa.kojima@linaro.org> -References: <20231016064526.2410856-1-masahisa.kojima@linaro.org> +In-Reply-To: <20231110042542.3797301-1-masahisa.kojima@linaro.org> +References: <20231110042542.3797301-1-masahisa.kojima@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 @@ -148,15 +149,14 @@ efi_secboot tests end up with unexpected failure. The efi_secboot tests need to be modified to explicitly set the BootOrder EFI variable. -squashfs ls test is also affected by this modification, need to -clear the previous state before squashfs ls test starts. +squashfs and erofs ls tests are also affected by this modification, +need to clear the previous state before squashfs ls test starts. Co-developed-by: Masahisa Kojima Signed-off-by: Masahisa Kojima Signed-off-by: Raymond Mao Reviewed-by: Heinrich Schuchardt Reviewed-by: Ilias Apalodimas -Signed-off-by: Joao Marcos Costa Reviewed-by: Joao Marcos Costa --- lib/efi_loader/efi_disk.c | 18 ++++++++ @@ -164,8 +164,9 @@ Reviewed-by: Joao Marcos Costa test/py/tests/test_efi_secboot/test_signed.py | 42 +++++++++---------- .../test_efi_secboot/test_signed_intca.py | 14 +++---- .../tests/test_efi_secboot/test_unsigned.py | 14 +++---- - .../test_fs/test_squashfs/test_sqfs_ls.py | 6 +++ - 6 files changed, 66 insertions(+), 35 deletions(-) + test/py/tests/test_fs/test_erofs.py | 9 ++++ + .../test_fs/test_squashfs/test_sqfs_ls.py | 9 ++++ + 7 files changed, 78 insertions(+), 35 deletions(-) diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index f0d76113b0..b808a7fe62 100644 @@ -204,7 +205,7 @@ index f0d76113b0..b808a7fe62 100644 /** diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c -index e6de685e87..37359a77bb 100644 +index ad719afd63..c02569cb6d 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void) @@ -531,18 +532,41 @@ index df63f0df08..7c078f220d 100644 'efidebug test bootmgr']) assert 'efi_start_image() returned: 26' in ''.join(output) assert 'Hello, world!' not in ''.join(output) -diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -index 527a556ed8..3b8118104f 100644 ---- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -+++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -@@ -118,6 +118,12 @@ def test_sqfs_ls(u_boot_console): +diff --git a/test/py/tests/test_fs/test_erofs.py b/test/py/tests/test_fs/test_erofs.py +index 458a52ba79..87ad8f2d5f 100644 +--- a/test/py/tests/test_fs/test_erofs.py ++++ b/test/py/tests/test_fs/test_erofs.py +@@ -196,6 +196,15 @@ def test_erofs(u_boot_console): """ build_dir = u_boot_console.config.build_dir -+ # If the EFI subsystem is enabled, default file(e.g. EFI/BOOT/BOOTAA64.EFI) -+ # is scanned when the new disk is detected. This ends up with the unexpected -+ # output at the first 'sqfsls' command. -+ # Clear the previous state. ++ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to ++ # add EFI boot option when the new disk is detected. If there is no EFI ++ # System Partition exists, EFI subsystem outputs error messages and ++ # it ends up with test failure. ++ # Restart U-Boot to clear the previous state. ++ # TODO: Ideally EFI test cases need to be fixed, but it will ++ # increase the number of system reset. ++ u_boot_console.restart_uboot() ++ + try: + # setup test environment + make_erofs_image(build_dir) +diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py +index 527a556ed8..a20a7d1a66 100644 +--- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py ++++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py +@@ -118,6 +118,15 @@ def test_sqfs_ls(u_boot_console): + """ + build_dir = u_boot_console.config.build_dir + ++ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to ++ # add EFI boot option when the new disk is detected. If there is no EFI ++ # System Partition exists, EFI subsystem outputs error messages and ++ # it ends up with test failure. ++ # Restart U-Boot to clear the previous state. ++ # TODO: Ideally EFI test cases need to be fixed, but it will ++ # increase the number of system reset. + u_boot_console.restart_uboot() + # setup test environment From 2be69fdb803bf340aaf2bde7c8bafbb10c91e70a Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 27 Jan 2024 06:56:21 +0000 Subject: [PATCH 246/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 8083a3c..dbaa093 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -208,6 +208,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Sat Jan 27 2024 Fedora Release Engineering - 1:2024.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild + * Mon Jan 08 2024 Peter Robinson - 1:2024.01-1 - Update to 2024.01 From 6d54ac747cd8bf8f25bdc91d5688320b8faf361b Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 14 Feb 2024 15:10:30 +0000 Subject: [PATCH 247/351] 2024.04 RC2 --- Provide-a-fallback-to-smbios-tables.patch | 686 ------------------ sources | 2 +- uboot-tools.spec | 13 +- ...atic-management-for-removable-medias.patch | 574 --------------- 4 files changed, 7 insertions(+), 1268 deletions(-) delete mode 100644 Provide-a-fallback-to-smbios-tables.patch delete mode 100644 uefi-Boot-var-automatic-management-for-removable-medias.patch diff --git a/Provide-a-fallback-to-smbios-tables.patch b/Provide-a-fallback-to-smbios-tables.patch deleted file mode 100644 index 4ff8ac5..0000000 --- a/Provide-a-fallback-to-smbios-tables.patch +++ /dev/null @@ -1,686 +0,0 @@ -From patchwork Thu Dec 7 09:18:49 2023 -Content-Type: text/plain; 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- Thu, 07 Dec 2023 01:19:01 -0800 (PST) -Received: from localhost.localdomain (ppp046103111243.access.hol.gr. - [46.103.111.243]) by smtp.gmail.com with ESMTPSA id - u21-20020a05600c139500b00405d9a950a2sm1299003wmf.28.2023.12.07.01.19.00 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 07 Dec 2023 01:19:01 -0800 (PST) -From: Ilias Apalodimas -To: trini@konsulko.com, - sjg@chromium.org -Cc: sean.anderson@seco.com, neil.armstrong@linaro.org, - heinrich.schuchardt@canonical.com, mark.kettenis@xs4all.nl, - Ilias Apalodimas , u-boot@lists.denx.de -Subject: [PATCH 1/2 v3] smbios: Simplify reporting of unknown values -Date: Thu, 7 Dec 2023 11:18:49 +0200 -Message-Id: <20231207091850.17776-2-ilias.apalodimas@linaro.org> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20231207091850.17776-1-ilias.apalodimas@linaro.org> -References: <20231207091850.17776-1-ilias.apalodimas@linaro.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -If a value is not valid during the DT or SYSINFO parsing, we explicitly -set that to "Unknown Product" and "Unknown" for the product and -manufacturer respectively. It's cleaner if we move the checks insisde -smbios_add_prop_si() and provide an alternative string in case the -primary is NULL or empty - -pre-patch dmidecode - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown Product - Version: Not Specified - Serial Number: Not Specified - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Not Specified - Family: Not Specified - -[...] - -post-patch dmidecode: - -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown -[...] - -While at it make smbios_add_prop_si() add a string directly if the prop -node is NULL and replace smbios_add_string() calls with -smbios_add_prop_si(ctx, NULL, ....) - -Signed-off-by: Ilias Apalodimas ---- -Changes since v2: -- refactor even more code and remove the smbios_add_string calls from the - main code. Instead use smbios_add_prop() foir everything and add a - default value, in case the parsed one is NULL or emtpy -Changes since v1: -- None - - lib/smbios.c | 73 +++++++++++++++++++++++++--------------------------- - 1 file changed, 35 insertions(+), 38 deletions(-) - --- -2.40.1 - -diff --git a/lib/smbios.c b/lib/smbios.c -index d7f4999e8b2a..444aa245a273 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -102,9 +102,6 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - int i = 1; - char *p = ctx->eos; - -- if (!*str) -- str = "Unknown"; -- - for (;;) { - if (!*p) { - ctx->last_str = p; -@@ -134,11 +131,18 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - * - * @ctx: context for writing the tables - * @prop: property to write -+ * @dval: Default value to use if the string is not found or is empty - * Return: 0 if not found, else SMBIOS string number (1 or more) - */ - static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, -- int sysinfo_id) -+ int sysinfo_id, const char *dval) - { -+ if (!dval || !*dval) -+ dval = "Unknown"; -+ -+ if (!prop) -+ return smbios_add_string(ctx, dval); -+ - if (sysinfo_id && ctx->dev) { - char val[SMBIOS_STR_MAX]; - int ret; -@@ -151,8 +155,8 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - const char *str; - - str = ofnode_read_string(ctx->node, prop); -- if (str) -- return smbios_add_string(ctx, str); -+ -+ return smbios_add_string(ctx, str ? str : dval); - } - - return 0; -@@ -161,12 +165,15 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - /** - * smbios_add_prop() - Add a property from the devicetree - * -- * @prop: property to write -+ * @prop: property to write. The default string will be written if -+ * prop is NULL -+ * @dval: Default value to use if the string is not found or is empty - * Return: 0 if not found, else SMBIOS string number (1 or more) - */ --static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop) -+static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop, -+ const char *dval) - { -- return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE); -+ return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE, dval); - } - - static void smbios_set_eos(struct smbios_ctx *ctx, char *eos) -@@ -228,11 +235,9 @@ static int smbios_write_type0(ulong *current, int handle, - memset(t, 0, sizeof(struct smbios_type0)); - fill_smbios_header(t, SMBIOS_BIOS_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); -- t->vendor = smbios_add_string(ctx, "U-Boot"); -+ t->vendor = smbios_add_prop(ctx, NULL, "U-Boot"); - -- t->bios_ver = smbios_add_prop(ctx, "version"); -- if (!t->bios_ver) -- t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION); -+ t->bios_ver = smbios_add_prop(ctx, "version", PLAIN_VERSION); - if (t->bios_ver) - gd->smbios_version = ctx->last_str; - log_debug("smbios_version = %p: '%s'\n", gd->smbios_version, -@@ -241,7 +246,7 @@ static int smbios_write_type0(ulong *current, int handle, - print_buffer((ulong)gd->smbios_version, gd->smbios_version, - 1, strlen(gd->smbios_version) + 1, 0); - #endif -- t->bios_release_date = smbios_add_string(ctx, U_BOOT_DMI_DATE); -+ t->bios_release_date = smbios_add_prop(ctx, NULL, U_BOOT_DMI_DATE); - #ifdef CONFIG_ROM_SIZE - t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; - #endif -@@ -280,22 +285,19 @@ static int smbios_write_type1(ulong *current, int handle, - memset(t, 0, sizeof(struct smbios_type1)); - fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); -- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); -- t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); -+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); -+ t->product_name = smbios_add_prop(ctx, "product", "Unknown"); - t->version = smbios_add_prop_si(ctx, "version", -- SYSINFO_ID_SMBIOS_SYSTEM_VERSION); -+ SYSINFO_ID_SMBIOS_SYSTEM_VERSION, -+ "Unknown"); - if (serial_str) { -- t->serial_number = smbios_add_string(ctx, serial_str); -+ t->serial_number = smbios_add_prop(ctx, NULL, serial_str); - strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); - } else { -- t->serial_number = smbios_add_prop(ctx, "serial"); -+ t->serial_number = smbios_add_prop(ctx, "serial", "Unknown"); - } -- t->sku_number = smbios_add_prop(ctx, "sku"); -- t->family = smbios_add_prop(ctx, "family"); -+ t->sku_number = smbios_add_prop(ctx, "sku", "Unknown"); -+ t->family = smbios_add_prop(ctx, "family", "Unknown"); - - len = t->length + smbios_string_table_len(ctx); - *current += len; -@@ -314,15 +316,12 @@ static int smbios_write_type2(ulong *current, int handle, - memset(t, 0, sizeof(struct smbios_type2)); - fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); -- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); -- t->product_name = smbios_add_prop(ctx, "product"); -- if (!t->product_name) -- t->product_name = smbios_add_string(ctx, "Unknown Product"); -+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); -+ t->product_name = smbios_add_prop(ctx, "product", "Unknown"); - t->version = smbios_add_prop_si(ctx, "version", -- SYSINFO_ID_SMBIOS_BASEBOARD_VERSION); -- t->asset_tag_number = smbios_add_prop(ctx, "asset-tag"); -+ SYSINFO_ID_SMBIOS_BASEBOARD_VERSION, -+ "Unknown"); -+ t->asset_tag_number = smbios_add_prop(ctx, "asset-tag", "Unknown"); - t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; - t->board_type = SMBIOS_BOARD_MOTHERBOARD; - -@@ -343,9 +342,7 @@ static int smbios_write_type3(ulong *current, int handle, - memset(t, 0, sizeof(struct smbios_type3)); - fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - smbios_set_eos(ctx, t->eos); -- t->manufacturer = smbios_add_prop(ctx, "manufacturer"); -- if (!t->manufacturer) -- t->manufacturer = smbios_add_string(ctx, "Unknown"); -+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown"); - t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; - t->bootup_state = SMBIOS_STATE_SAFE; - t->power_supply_state = SMBIOS_STATE_SAFE; -@@ -388,8 +385,8 @@ static void smbios_write_type4_dm(struct smbios_type4 *t, - #endif - - t->processor_family = processor_family; -- t->processor_manufacturer = smbios_add_string(ctx, vendor); -- t->processor_version = smbios_add_string(ctx, name); -+ t->processor_manufacturer = smbios_add_prop(ctx, NULL, vendor); -+ t->processor_version = smbios_add_prop(ctx, NULL, name); - } - - static int smbios_write_type4(ulong *current, int handle, - -From patchwork Thu Dec 7 09:18:50 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Ilias Apalodimas -X-Patchwork-Id: 1873090 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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- Thu, 07 Dec 2023 01:19:02 -0800 (PST) -From: Ilias Apalodimas -To: trini@konsulko.com, - sjg@chromium.org -Cc: sean.anderson@seco.com, neil.armstrong@linaro.org, - heinrich.schuchardt@canonical.com, mark.kettenis@xs4all.nl, - Ilias Apalodimas , u-boot@lists.denx.de -Subject: [PATCH 2/2 v3] smbios: Fallback to the default DT if sysinfo nodes - are missing -Date: Thu, 7 Dec 2023 11:18:50 +0200 -Message-Id: <20231207091850.17776-3-ilias.apalodimas@linaro.org> -X-Mailer: git-send-email 2.40.1 -In-Reply-To: <20231207091850.17776-1-ilias.apalodimas@linaro.org> -References: <20231207091850.17776-1-ilias.apalodimas@linaro.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -In order to fill in the SMBIOS tables U-Boot currently relies on a -"u-boot,sysinfo-smbios" compatible node. This is fine for the boards -that already include such nodes. However with some recent EFI changes, -the majority of boards can boot up distros, which usually rely on -things like dmidecode etc for their reporting. For boards that -lack this special node the SMBIOS output looks like: - -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: Unknown - UUID: Not Settable - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown - -This looks problematic since most of the info are "Unknown". The DT spec -specifies standard properties containing relevant information like -'model' and 'compatible' for which the suggested format is -. Unfortunately the 'model' string found in DTs is -usually lacking the manufacturer so we can't use it for both -'Manufacturer' and 'Product Name' SMBIOS entries reliably. - -So let's add a last resort to our current smbios parsing. If none of -the sysinfo properties are found, scan for those information in the -root node of the device tree. Use the 'model' to fill the 'Product -Name' and the first value of 'compatible' for the 'Manufacturer', since -that always contains one. - -pre-patch: -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: Unknown - Product Name: Unknown - Version: Unknown - Serial Number: 100000000bb24ceb - UUID: 30303031-3030-3030-3061-613234636435 - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown -[...] - -and post patch: -Handle 0x0001, DMI type 1, 27 bytes -System Information - Manufacturer: raspberrypi - Product Name: Raspberry Pi 4 Model B Rev 1.1 - Version: Unknown - Serial Number: 100000000bb24ceb - UUID: 30303031-3030-3030-3061-613234636435 - Wake-up Type: Reserved - SKU Number: Unknown - Family: Unknown -[...] - -Signed-off-by: Ilias Apalodimas ---- -Simon, I'll work with tou on the refactoring you wanted and -remove the EFI requirement of SMBIOS in !x86 platforms. -Since this code has no tests, I'll add some once the refactoring -is done - -Changes since v2: -- Spelling mistakes -- rebase on top of patch #1 changes -Changes since v1: -- Tokenize the DT node entry and use the appropriate value instead of - the entire string -- Removed Peters tested/reviewed-by tags due to the above - lib/smbios.c | 94 +++++++++++++++++++++++++++++++++++++++++++++++++--- - 1 file changed, 89 insertions(+), 5 deletions(-) - --- -2.40.1 - -diff --git a/lib/smbios.c b/lib/smbios.c -index 444aa245a273..3f0e1d529537 100644 ---- a/lib/smbios.c -+++ b/lib/smbios.c -@@ -9,11 +9,14 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include -+#include - #ifdef CONFIG_CPU - #include - #include -@@ -43,6 +46,25 @@ - - DECLARE_GLOBAL_DATA_PTR; - -+/** -+ * struct map_sysinfo - Mapping of sysinfo strings to DT -+ * -+ * @sysinfo_str: sysinfo string -+ * @dt_str: DT string -+ * @max: Max index of the tokenized string to pick. Counting starts from 0 -+ * -+ */ -+struct map_sysinfo { -+ const char *sysinfo_str; -+ const char *dt_str; -+ int max; -+}; -+ -+static const struct map_sysinfo sysinfo_to_dt[] = { -+ { .sysinfo_str = "product", .dt_str = "model", 2 }, -+ { .sysinfo_str = "manufacturer", .dt_str = "compatible", 1 }, -+}; -+ - /** - * struct smbios_ctx - context for writing SMBIOS tables - * -@@ -87,6 +109,18 @@ struct smbios_write_method { - const char *subnode_name; - }; - -+static const struct map_sysinfo *convert_sysinfo_to_dt(const char *sysinfo_str) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(sysinfo_to_dt); i++) { -+ if (!strcmp(sysinfo_str, sysinfo_to_dt[i].sysinfo_str)) -+ return &sysinfo_to_dt[i]; -+ } -+ -+ return NULL; -+} -+ - /** - * smbios_add_string() - add a string to the string area - * -@@ -124,6 +158,42 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - } - } - -+/** -+ * get_str_from_dt - Get a substring from a DT property. -+ * After finding the property in the DT, the function -+ * will parse comma-separated values and return the value. -+ * If nprop->max exceeds the number of comma-separated -+ * elements, the last non NULL value will be returned. -+ * Counting starts from zero. -+ * -+ * @nprop: sysinfo property to use -+ * @str: pointer to fill with data -+ * @size: str buffer length -+ */ -+static -+void get_str_from_dt(const struct map_sysinfo *nprop, char *str, size_t size) -+{ -+ const char *dt_str; -+ int cnt = 0; -+ char *token; -+ -+ memset(str, 0, size); -+ if (!nprop || !nprop->max) -+ return; -+ -+ dt_str = ofnode_read_string(ofnode_root(), nprop->dt_str); -+ if (!dt_str) -+ return; -+ -+ memcpy(str, dt_str, size); -+ token = strtok(str, ","); -+ while (token && cnt < nprop->max) { -+ strlcpy(str, token, strlen(token) + 1); -+ token = strtok(NULL, ","); -+ cnt++; -+ } -+} -+ - /** - * smbios_add_prop_si() - Add a property from the devicetree or sysinfo - * -@@ -137,6 +207,8 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str) - static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - int sysinfo_id, const char *dval) - { -+ int ret; -+ - if (!dval || !*dval) - dval = "Unknown"; - -@@ -145,18 +217,30 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, - - if (sysinfo_id && ctx->dev) { - char val[SMBIOS_STR_MAX]; -- int ret; - - ret = sysinfo_get_str(ctx->dev, sysinfo_id, sizeof(val), val); - if (!ret) - return smbios_add_string(ctx, val); - } - if (IS_ENABLED(CONFIG_OF_CONTROL)) { -- const char *str; -- -- str = ofnode_read_string(ctx->node, prop); -+ const char *str = NULL; -+ char str_dt[128] = { 0 }; -+ /* -+ * If the node is not valid fallback and try the entire DT -+ * so we can at least fill in manufacturer and board type -+ */ -+ if (ofnode_valid(ctx->node)) { -+ str = ofnode_read_string(ctx->node, prop); -+ } else { -+ const struct map_sysinfo *nprop; -+ -+ nprop = convert_sysinfo_to_dt(prop); -+ get_str_from_dt(nprop, str_dt, sizeof(str_dt)); -+ str = (const char *)str_dt; -+ } - -- return smbios_add_string(ctx, str ? str : dval); -+ ret = smbios_add_string(ctx, str && *str ? str : dval); -+ return ret; - } - - return 0; diff --git a/sources b/sources index 30e8529..8f50a6d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.01.tar.bz2) = 45bd093ba3bda23e43cdde83d8656c1ee1348ac2886ecff1fee475f101ac4965a5be6565408fa5b990c723f3fdc833edfca60a719f735a43040cd14a1b59a88b +SHA512 (u-boot-2024.04-rc2.tar.bz2) = f5c6d6a37ce6b34bd1ab2cddd5d0cacddfd19b5345934731df3a7ed454a3895ad2d14acbdb2e1b922b9571778e50b54cb7612b1798a04dfb991365d3344cd865 diff --git a/uboot-tools.spec b/uboot-tools.spec index dbaa093..eb2f4a3 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2024.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Version: 2024.04 +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -19,9 +19,7 @@ Source1: aarch64-boards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch2: disable-VBE-by-default.patch -Patch3: Provide-a-fallback-to-smbios-tables.patch Patch5: enable-bootmenu-by-default.patch -Patch6: uefi-Boot-var-automatic-management-for-removable-medias.patch Patch7: Add-video-damage-tracking.patch # Board fixes and enablement @@ -29,8 +27,6 @@ Patch7: Add-video-damage-tracking.patch Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -# Lots more to do, mostly untested, definitely unsupported -Patch12: rpi5-initial-support.patch #Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc @@ -208,6 +204,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Wed Feb 14 2024 Peter Robinson - 1:2024.04-0.2.rc2 +- Update to 2024.04 RC2 + * Sat Jan 27 2024 Fedora Release Engineering - 1:2024.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild diff --git a/uefi-Boot-var-automatic-management-for-removable-medias.patch b/uefi-Boot-var-automatic-management-for-removable-medias.patch deleted file mode 100644 index 48ae88e..0000000 --- a/uefi-Boot-var-automatic-management-for-removable-medias.patch +++ /dev/null @@ -1,574 +0,0 @@ -From patchwork Fri Nov 10 04:25:37 2023 -Content-Type: text/plain; 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- Thu, 09 Nov 2023 20:27:20 -0800 (PST) -Received: from localhost ([164.70.16.189]) by smtp.gmail.com with ESMTPSA id - n18-20020a170902e55200b001c0bf60ba5csm4304818plf.272.2023.11.09.20.27.19 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Thu, 09 Nov 2023 20:27:19 -0800 (PST) -From: Masahisa Kojima -To: u-boot@lists.denx.de -Cc: Heinrich Schuchardt , - Ilias Apalodimas , - Simon Glass , - Takahiro Akashi , - Michal Simek , Raymond Mao , - Masahisa Kojima , - Joao Marcos Costa , - Huang Jianan , - Thomas Petazzoni , - Miquel Raynal , linux-erofs@lists.ozlabs.org -Subject: [PATCH v12 4/9] efi_loader: Boot var automatic management -Date: Fri, 10 Nov 2023 13:25:37 +0900 -Message-Id: <20231110042542.3797301-5-masahisa.kojima@linaro.org> -X-Mailer: git-send-email 2.34.1 -In-Reply-To: <20231110042542.3797301-1-masahisa.kojima@linaro.org> -References: <20231110042542.3797301-1-masahisa.kojima@linaro.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Raymond Mao - -Changes for complying to EFI spec §3.5.1.1 -'Removable Media Boot Behavior'. -Boot variables can be automatically generated during a removable -media is probed. At the same time, unused boot variables will be -detected and removed. - -Please note that currently the function 'efi_disk_remove' has no -ability to distinguish below two scenarios -a) Unplugging of a removable media under U-Boot -b) U-Boot exiting and booting an OS -Thus currently the boot variables management is not added into -'efi_disk_remove' to avoid boot options being added/erased -repeatedly under scenario b) during power cycles -See TODO comments under function 'efi_disk_remove' for more details - -The original efi_secboot tests expect that BootOrder EFI variable -is not defined. With this commit, the BootOrder EFI variable is -automatically added when the disk is detected. The original -efi_secboot tests end up with unexpected failure. -The efi_secboot tests need to be modified to explicitly set -the BootOrder EFI variable. - -squashfs and erofs ls tests are also affected by this modification, -need to clear the previous state before squashfs ls test starts. - -Co-developed-by: Masahisa Kojima -Signed-off-by: Masahisa Kojima -Signed-off-by: Raymond Mao -Reviewed-by: Heinrich Schuchardt -Reviewed-by: Ilias Apalodimas -Reviewed-by: Joao Marcos Costa ---- - lib/efi_loader/efi_disk.c | 18 ++++++++ - lib/efi_loader/efi_setup.c | 7 ++++ - test/py/tests/test_efi_secboot/test_signed.py | 42 +++++++++---------- - .../test_efi_secboot/test_signed_intca.py | 14 +++---- - .../tests/test_efi_secboot/test_unsigned.py | 14 +++---- - test/py/tests/test_fs/test_erofs.py | 9 ++++ - .../test_fs/test_squashfs/test_sqfs_ls.py | 9 ++++ - 7 files changed, 78 insertions(+), 35 deletions(-) - -diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c -index f0d76113b0..b808a7fe62 100644 ---- a/lib/efi_loader/efi_disk.c -+++ b/lib/efi_loader/efi_disk.c -@@ -690,6 +690,13 @@ int efi_disk_probe(void *ctx, struct event *event) - return -1; - } - -+ /* only do the boot option management when UEFI sub-system is initialized */ -+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && efi_obj_list_initialized == EFI_SUCCESS) { -+ ret = efi_bootmgr_update_media_device_boot_option(); -+ if (ret != EFI_SUCCESS) -+ return -1; -+ } -+ - return 0; - } - -@@ -742,6 +749,17 @@ int efi_disk_remove(void *ctx, struct event *event) - dev_tag_del(dev, DM_TAG_EFI); - - return 0; -+ -+ /* -+ * TODO A flag to distinguish below 2 different scenarios of this -+ * function call is needed: -+ * a) Unplugging of a removable media under U-Boot -+ * b) U-Boot exiting and booting an OS -+ * In case of scenario a), efi_bootmgr_update_media_device_boot_option() -+ * needs to be invoked here to update the boot options and remove the -+ * unnecessary ones. -+ */ -+ - } - - /** -diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c -index ad719afd63..c02569cb6d 100644 ---- a/lib/efi_loader/efi_setup.c -+++ b/lib/efi_loader/efi_setup.c -@@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void) - if (ret != EFI_SUCCESS) - goto out; - -+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) { -+ /* update boot option after variable service initialized */ -+ ret = efi_bootmgr_update_media_device_boot_option(); -+ if (ret != EFI_SUCCESS) -+ goto out; -+ } -+ - /* Define supported languages */ - ret = efi_init_platform_lang(); - if (ret != EFI_SUCCESS) -diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py -index ca52e853d8..2f862a259a 100644 ---- a/test/py/tests/test_efi_secboot/test_signed.py -+++ b/test/py/tests/test_efi_secboot/test_signed.py -@@ -29,7 +29,7 @@ class TestEfiSignedImage(object): - output = u_boot_console.run_command_list([ - 'host bind 0 %s' % disk_img, - 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -37,7 +37,7 @@ class TestEfiSignedImage(object): - # Test Case 1b, run unsigned image if no PK - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 2', -+ 'efidebug boot order 2', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -59,13 +59,13 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert('\'HELLO1\' failed' in ''.join(output)) - assert('efi_start_image() returned: 26' in ''.join(output)) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 2', -+ 'efidebug boot order 2', - 'efidebug test bootmgr']) - assert '\'HELLO2\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -77,12 +77,12 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 2', -+ 'efidebug boot order 2', - 'efidebug test bootmgr']) - assert '\'HELLO2\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -105,7 +105,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -117,7 +117,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -143,7 +143,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -170,7 +170,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -181,7 +181,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -193,7 +193,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -205,7 +205,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize dbx']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -230,7 +230,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -254,7 +254,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -265,7 +265,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -279,7 +279,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -307,7 +307,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -330,7 +330,7 @@ class TestEfiSignedImage(object): - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -349,7 +349,7 @@ class TestEfiSignedImage(object): - output = u_boot_console.run_command_list([ - 'host bind 0 %s' % disk_img, - 'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld_forged.efi.signed -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert('hELLO, world!' in ''.join(output)) - -@@ -364,7 +364,7 @@ class TestEfiSignedImage(object): - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK']) - assert 'Failed to set EFI variable' not in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert(not 'hELLO, world!' in ''.join(output)) - assert('\'HELLO1\' failed' in ''.join(output)) -diff --git a/test/py/tests/test_efi_secboot/test_signed_intca.py b/test/py/tests/test_efi_secboot/test_signed_intca.py -index d8d599d22f..8d9a5f3e7f 100644 ---- a/test/py/tests/test_efi_secboot/test_signed_intca.py -+++ b/test/py/tests/test_efi_secboot/test_signed_intca.py -@@ -40,7 +40,7 @@ class TestEfiSignedImageIntca(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO_a host 0:1 /helloworld.efi.signed_a -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO_a\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -49,7 +49,7 @@ class TestEfiSignedImageIntca(object): - # Test Case 1b, signed and authenticated by root CA - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 2 HELLO_ab host 0:1 /helloworld.efi.signed_ab -s ""', -- 'efidebug boot next 2', -+ 'efidebug boot order 2', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -71,7 +71,7 @@ class TestEfiSignedImageIntca(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO_abc\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -81,7 +81,7 @@ class TestEfiSignedImageIntca(object): - output = u_boot_console.run_command_list([ - 'fatload host 0:1 4000000 db_b.auth', - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO_abc\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -@@ -91,7 +91,7 @@ class TestEfiSignedImageIntca(object): - output = u_boot_console.run_command_list([ - 'fatload host 0:1 4000000 db_c.auth', - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize db', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -117,7 +117,7 @@ class TestEfiSignedImageIntca(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'Hello, world!' in ''.join(output) - # Or, -@@ -129,7 +129,7 @@ class TestEfiSignedImageIntca(object): - output = u_boot_console.run_command_list([ - 'fatload host 0:1 4000000 dbx_c.auth', - 'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert '\'HELLO_abc\' failed' in ''.join(output) - assert 'efi_start_image() returned: 26' in ''.join(output) -diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py -index df63f0df08..7c078f220d 100644 ---- a/test/py/tests/test_efi_secboot/test_unsigned.py -+++ b/test/py/tests/test_efi_secboot/test_unsigned.py -@@ -36,11 +36,11 @@ class TestEfiUnsignedImage(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'efi_start_image() returned: 26' in ''.join(output) - assert 'Hello, world!' not in ''.join(output) -@@ -65,7 +65,7 @@ class TestEfiUnsignedImage(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert 'Hello, world!' in ''.join(output) - -@@ -89,11 +89,11 @@ class TestEfiUnsignedImage(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'efi_start_image() returned: 26' in ''.join(output) - assert 'Hello, world!' not in ''.join(output) -@@ -107,11 +107,11 @@ class TestEfiUnsignedImage(object): - - output = u_boot_console.run_command_list([ - 'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""', -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'bootefi bootmgr']) - assert '\'HELLO\' failed' in ''.join(output) - output = u_boot_console.run_command_list([ -- 'efidebug boot next 1', -+ 'efidebug boot order 1', - 'efidebug test bootmgr']) - assert 'efi_start_image() returned: 26' in ''.join(output) - assert 'Hello, world!' not in ''.join(output) -diff --git a/test/py/tests/test_fs/test_erofs.py b/test/py/tests/test_fs/test_erofs.py -index 458a52ba79..87ad8f2d5f 100644 ---- a/test/py/tests/test_fs/test_erofs.py -+++ b/test/py/tests/test_fs/test_erofs.py -@@ -196,6 +196,15 @@ def test_erofs(u_boot_console): - """ - build_dir = u_boot_console.config.build_dir - -+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to -+ # add EFI boot option when the new disk is detected. If there is no EFI -+ # System Partition exists, EFI subsystem outputs error messages and -+ # it ends up with test failure. -+ # Restart U-Boot to clear the previous state. -+ # TODO: Ideally EFI test cases need to be fixed, but it will -+ # increase the number of system reset. -+ u_boot_console.restart_uboot() -+ - try: - # setup test environment - make_erofs_image(build_dir) -diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -index 527a556ed8..a20a7d1a66 100644 ---- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -+++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py -@@ -118,6 +118,15 @@ def test_sqfs_ls(u_boot_console): - """ - build_dir = u_boot_console.config.build_dir - -+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to -+ # add EFI boot option when the new disk is detected. If there is no EFI -+ # System Partition exists, EFI subsystem outputs error messages and -+ # it ends up with test failure. -+ # Restart U-Boot to clear the previous state. -+ # TODO: Ideally EFI test cases need to be fixed, but it will -+ # increase the number of system reset. -+ u_boot_console.restart_uboot() -+ - # setup test environment - check_mksquashfs_version() - generate_sqfs_src_dir(build_dir) From 0c3fb4e23d8f0b2036072bcfdf34bf9cbdbc42bd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 15 Feb 2024 12:57:23 +0000 Subject: [PATCH 248/351] drop old patches --- rockchip-PinePhone-Pro-fixes.patch | 43 - rockchip-general-fixes.patch | 136 -- rpi5-initial-support.patch | 1910 ---------------------------- 3 files changed, 2089 deletions(-) delete mode 100644 rockchip-PinePhone-Pro-fixes.patch delete mode 100644 rockchip-general-fixes.patch delete mode 100644 rpi5-initial-support.patch diff --git a/rockchip-PinePhone-Pro-fixes.patch b/rockchip-PinePhone-Pro-fixes.patch deleted file mode 100644 index 5e07490..0000000 --- a/rockchip-PinePhone-Pro-fixes.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 1af5e42f170d2c4b944beeb875b80ec7f061038a Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Thu, 25 May 2023 15:27:08 +0200 -Subject: [PATCH] pinephone-pro: Fix I/O port voltage (GPIO3D4A is 1.8V) - -This fixes access to camera sensor over I2C during probe time in -the kernel. (Kernel will fix I/0 port voltage by itself, but the -timing depends on probe order of the drivers, so the fix can -come after the camera sensor driver already failed to probe.) - -Signed-off-by: Ondrej Jirman -Cc: Kever Yang -Reviewed-by: Kever Yang ---- - board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -index eb639cd0d07..b6ccbb9c1c4 100644 ---- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -+++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -@@ -15,7 +15,8 @@ - #include - #include - --#define GRF_IO_VSEL_BT565_SHIFT 0 -+#define GRF_IO_VSEL_BT565_GPIO2AB 1 -+#define GRF_IO_VSEL_AUDIO_GPIO3D4A 2 - #define PMUGRF_CON0_VSEL_SHIFT 8 - - #ifndef CONFIG_SPL_BUILD -@@ -48,7 +49,8 @@ static void setup_iodomain(void) - syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); - - /* BT565 is in 1.8v domain */ -- rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); -+ rk_setreg(&grf->io_vsel, -+ GRF_IO_VSEL_BT565_GPIO2AB | GRF_IO_VSEL_AUDIO_GPIO3D4A); - - /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ - rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); --- -2.41.0 diff --git a/rockchip-general-fixes.patch b/rockchip-general-fixes.patch deleted file mode 100644 index 00e78f5..0000000 --- a/rockchip-general-fixes.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 2d9350c50a9659cc2a247cdea07f0eacffa3cb32 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 14:44:44 +0100 -Subject: [PATCH] rockchip: pinebook-pro: minor SPI flash fixes - -Set a default offset for environment so it doesn't write it to -unexpected locations, drop unneeded mtd config option. - -Signed-off-by: Peter Robinson ---- - configs/pinebook-pro-rk3399_defconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 8ca1d0708f9..aaa52c6ea70 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 - CONFIG_NR_DRAM_BANKS=1 - CONFIG_ENV_SIZE=0x8000 -+CONFIG_ENV_OFFSET=0x3F8000 - CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" - CONFIG_ROCKCHIP_RK3399=y - CONFIG_TARGET_PINEBOOK_PRO_RK3399=y -@@ -22,7 +23,6 @@ CONFIG_MISC_INIT_R=y - # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 --CONFIG_SPL_MTD_SUPPORT=y - CONFIG_SPL_SPI_LOAD=y - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y --- -2.36.1 - -From 27ba8e2f904063aec5196f86dd0332bf58a60259 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 14:50:42 +0100 -Subject: [PATCH] rockchip: rockpro64: enable leds - -The Rockpro64 has some GPIO leds so let's enable them so the -user gets some output in early boot. - -Signed-off-by: Peter Robinson ---- - configs/rockpro64-rk3399_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index e6f7a8469a3..b0c3527fab0 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -42,6 +42,8 @@ CONFIG_AHCI_PCI=y - CONFIG_SATA_SIL=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y - CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y --- -2.36.1 - -From 8bca90472e0d71e5344711b6f5fe8dc95e19af5a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 15:12:47 +0100 -Subject: [PATCH] rockchip: pinebook-pro: sync PBP dtb to 5.18 - -Sync the pinebook pro to upstream 5.18, in particular this brings -brings in a fix so the DP is disabled so Linux will actually boot. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro.dts | 11 +++-------- - 1 file changed, 3 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts -index 2b5f001ff4a..d6b68d77d63 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro.dts -+++ b/arch/arm/dts/rk3399-pinebook-pro.dts -@@ -17,6 +17,7 @@ - / { - model = "Pine64 Pinebook Pro"; - compatible = "pine64,pinebook-pro", "rockchip,rk3399"; -+ chassis-type = "laptop"; - - aliases { - mmc0 = &sdio0; -@@ -242,12 +243,12 @@ - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; -+ pwm-supply = <&vcc_sysin>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; -- vin-supply = <&vcc_sysin>; - - regulator-state-mem { - regulator-on-in-suspend; -@@ -385,10 +386,6 @@ - }; - }; - --&cdn_dp { -- status = "okay"; --}; -- - &cpu_b0 { - cpu-supply = <&vdd_cpu_b>; - }; -@@ -475,8 +472,6 @@ - vcc10-supply = <&vcc_sysin>; - vcc11-supply = <&vcc_sysin>; - vcc12-supply = <&vcc3v3_sys>; -- vcc13-supply = <&vcc_sysin>; -- vcc14-supply = <&vcc_sysin>; - - regulators { - /* rk3399 center logic supply */ -@@ -711,7 +706,7 @@ - - connector { - compatible = "usb-c-connector"; -- data-role = "host"; -+ data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T . Ivanov" -Subject: [PATCH v3 1/7] rpi5: add initial memory map for bcm2712 -Date: Mon, 18 Dec 2023 23:03:35 +0200 -Message-ID: <20231218210341.30073-2-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - none -X-Spamd-Result: default: False [0.70 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - NEURAL_HAM_LONG(-1.00)[-1.000]; RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,bedrocksystems.com:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Dmitry Malkin - -includes: -* 1GB of RAM (from 4GB or 8GB total) -* VPU memory interface -* AXI ranges (main peripherals) - -Signed-off-by: Dmitry Malkin -Signed-off-by: Ivan T. Ivanov ---- - arch/arm/mach-bcm283x/init.c | 38 +++++++++++++++++++++++++++++++++++- - 1 file changed, 37 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 7265faf6ce..af23b9711a 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -19,7 +19,7 @@ - #ifdef CONFIG_ARM64 - #include - --#define MEM_MAP_MAX_ENTRIES (4) -+#define MEM_MAP_MAX_ENTRIES (5) - - static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = { - { -@@ -68,6 +68,41 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = { - } - }; - -+static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = { -+ { -+ .virt = 0x00000000UL, -+ .phys = 0x00000000UL, -+ .size = 0x3f800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | -+ PTE_BLOCK_INNER_SHARE -+ }, { -+ .virt = 0x3f800000UL, -+ .phys = 0x3f800000UL, -+ .size = 0x00800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* Beginning of AXI bus where uSD controller lives */ -+ .virt = 0x1000000000UL, -+ .phys = 0x1000000000UL, -+ .size = 0x0002000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ .virt = 0x107c000000UL, -+ .phys = 0x107c000000UL, -+ .size = 0x0004000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* List terminator */ -+ 0, -+ } -+}; -+ - struct mm_region *mem_map = bcm283x_mem_map; - - /* -@@ -78,6 +113,7 @@ static const struct udevice_id board_ids[] = { - { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map}, - { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map}, - { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map}, -+ { .compatible = "brcm,bcm2712", .data = (ulong)&bcm2712_mem_map}, - { }, - }; - - -From patchwork Mon Dec 18 21:03:36 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T . Ivanov" -Subject: [PATCH v3 2/7] rpi5: Use devicetree as alternative way to read IO - base addresses -Date: Mon, 18 Dec 2023 23:03:36 +0200 -Message-ID: <20231218210341.30073-3-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [10.00 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_SPAM(5.10)[100.00%]; - FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[bedrocksystems.com:email,suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[] -Authentication-Results: smtp-out2.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Dmitry Malkin - -MBOX and Watchdog on RPi5/bcm2712 has a different base IO offsets. -Find them via devicetree blob passed by bootloader. - -Signed-off-by: Dmitry Malkin -Signed-off-by: Ivan T. Ivanov ---- - arch/arm/mach-bcm283x/include/mach/base.h | 5 ++- - arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +- - arch/arm/mach-bcm283x/include/mach/sdhci.h | 3 +- - arch/arm/mach-bcm283x/include/mach/timer.h | 3 +- - arch/arm/mach-bcm283x/include/mach/wdog.h | 3 +- - arch/arm/mach-bcm283x/init.c | 43 ++++++++++++++++++---- - 6 files changed, 43 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h -index 4ccaf69693..6de99e7ea1 100644 ---- a/arch/arm/mach-bcm283x/include/mach/base.h -+++ b/arch/arm/mach-bcm283x/include/mach/base.h -@@ -6,7 +6,10 @@ - #ifndef _BCM283x_BASE_H_ - #define _BCM283x_BASE_H_ - --extern unsigned long rpi_bcm283x_base; -+extern unsigned long rpi_mbox_base; -+extern unsigned long rpi_timer_base; -+extern unsigned long rpi_sdhci_base; -+extern unsigned long rpi_wdog_base; - - #ifdef CONFIG_ARMV7_LPAE - #ifdef CONFIG_TARGET_RPI_4_32B -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 490664f878..35d4e2f075 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -38,8 +38,7 @@ - - /* Raw mailbox HW */ - --#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x0000b880; }) -+#define BCM2835_MBOX_PHYSADDR rpi_mbox_base - - struct bcm2835_mbox_regs { - u32 read; -diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h -index 7323690687..e837c679c4 100644 ---- a/arch/arm/mach-bcm283x/include/mach/sdhci.h -+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h -@@ -8,8 +8,7 @@ - - #include - --#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00300000; }) -+#define BCM2835_SDHCI_PHYSADDR rpi_sdhci_base - - int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); - -diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h -index 5567dbd7f3..60500a256d 100644 ---- a/arch/arm/mach-bcm283x/include/mach/timer.h -+++ b/arch/arm/mach-bcm283x/include/mach/timer.h -@@ -11,8 +11,7 @@ - #include - #endif - --#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00003000; }) -+#define BCM2835_TIMER_PHYSADDR rpi_timer_base - - #define BCM2835_TIMER_CS_M3 (1 << 3) - #define BCM2835_TIMER_CS_M2 (1 << 2) -diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h -index 9942666720..b950560674 100644 ---- a/arch/arm/mach-bcm283x/include/mach/wdog.h -+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h -@@ -8,8 +8,7 @@ - - #include - --#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00100000; }) -+#define BCM2835_WDOG_PHYSADDR rpi_wdog_base - - struct bcm2835_wdog_regs { - u32 unknown0[7]; -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index af23b9711a..1c5c748484 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -151,7 +151,11 @@ static void rpi_update_mem_map(void) - static void rpi_update_mem_map(void) {} - #endif - --unsigned long rpi_bcm283x_base = 0x3f000000; -+/* Default bcm283x devices addresses */ -+unsigned long rpi_mbox_base = 0x3f00b880; -+unsigned long rpi_sdhci_base = 0x3f300000; -+unsigned long rpi_wdog_base = 0x3f100000; -+unsigned long rpi_timer_base = 0x3f003000; - - int arch_cpu_init(void) - { -@@ -162,22 +166,45 @@ int arch_cpu_init(void) - - int mach_cpu_init(void) - { -- int ret, soc_offset; -+ int ret, soc, offset; - u64 io_base, size; - - rpi_update_mem_map(); - - /* Get IO base from device tree */ -- soc_offset = fdt_path_offset(gd->fdt_blob, "/soc"); -- if (soc_offset < 0) -- return soc_offset; -+ soc = fdt_path_offset(gd->fdt_blob, "/soc"); -+ if (soc < 0) -+ return soc; - -- ret = fdt_read_range((void *)gd->fdt_blob, soc_offset, 0, NULL, -- &io_base, &size); -+ ret = fdt_read_range((void *)gd->fdt_blob, soc, 0, NULL, -+ &io_base, &size); - if (ret) - return ret; - -- rpi_bcm283x_base = io_base; -+ rpi_mbox_base = io_base + 0x00b880; -+ rpi_sdhci_base = io_base + 0x300000; -+ rpi_wdog_base = io_base + 0x100000; -+ rpi_timer_base = io_base + 0x003000; -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-mbox"); -+ if (offset > soc) -+ rpi_mbox_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-sdhci"); -+ if (offset > soc) -+ rpi_sdhci_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-system-timer"); -+ if (offset > soc) -+ rpi_timer_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2712-pm"); -+ if (offset > soc) -+ rpi_wdog_base = fdt_get_base_address(gd->fdt_blob, offset); - - return 0; - } - -From patchwork Mon Dec 18 21:03:37 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 3/7] rpi5: Use devicetree to retrieve board revision -Date: Mon, 18 Dec 2023 23:03:37 +0200 -Message-ID: <20231218210341.30073-4-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - none -X-Spamd-Result: default: False [1.14 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - NEURAL_HAM_LONG(-1.00)[-1.000]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-2.56)[98.03%] -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Firmware on RPi5 return error on board revision query -through firmware interface, but on the other hand it fills -"linux,revision" in "system" node, so use it to detect board -revision. - - system { - linux,revision = <0xc04170>; - linux,serial = <0x6cf44e80 0x3c533ede>; - }; - -Signed-off-by: Ivan T. Ivanov ---- - board/raspberrypi/rpi/rpi.c | 22 +++++++++++++++++++--- - 1 file changed, 19 insertions(+), 3 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index cd823ad746..2851ebc985 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -171,6 +171,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2711-rpi-cm4.dtb", - true, - }, -+ [0x17] = { -+ "5 Model B", -+ DTB_DIR "bcm2712-rpi-5-b.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { -@@ -429,15 +434,27 @@ static void get_board_revision(void) - int ret; - const struct rpi_model *models; - uint32_t models_count; -+ ofnode node; - - BCM2835_MBOX_INIT_HDR(msg); - BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV); - - ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); - if (ret) { -- printf("bcm2835: Could not query board revision\n"); - /* Ignore error; not critical */ -- return; -+ node = ofnode_path("/system"); -+ if (!ofnode_valid(node)) { -+ printf("bcm2835: Could not find /system node\n"); -+ return; -+ } -+ -+ ret = ofnode_read_u32(node, "linux,revision", &revision); -+ if (ret) { -+ printf("bcm2835: Could not find linux,revision\n"); -+ return; -+ } -+ } else { -+ revision = msg->get_board_rev.body.resp.rev; - } - - /* -@@ -451,7 +468,6 @@ static void get_board_revision(void) - * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250 - * http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594 - */ -- revision = msg->get_board_rev.body.resp.rev; - if (revision & 0x800000) { - rev_scheme = 1; - rev_type = (revision >> 4) & 0xff; - -From patchwork Mon Dec 18 21:03:38 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. Ivanov" -X-Patchwork-Id: 1877651 -X-Patchwork-Delegate: pbrobinson@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 - header.s=susede2_rsa header.b=v2vbP3rz; - dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=DCEhbGvW; - dkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de - header.a=rsa-sha256 header.s=susede2_rsa header.b=v2vbP3rz; - dkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=DCEhbGvW; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4SvC4X1dxWz1ydc - for ; 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 4/7] bcm2835: brcm, - bcm2708-fb device is using r5g6b5 format -Date: Mon, 18 Dec 2023 23:03:38 +0200 -Message-ID: <20231218210341.30073-5-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [4.90 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-0.00)[34.66%] -Authentication-Results: smtp-out1.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -brcm,bcm2708-fb device provided by firmware on RPi5 uses -16 bits per pixel. Update driver to properly handle this. - -Signed-off-by: Ivan T. Ivanov ---- - drivers/video/bcm2835.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index 14942526f1..245c958b6e 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -43,7 +43,7 @@ static int bcm2835_video_probe(struct udevice *dev) - - uc_priv->xsize = w; - uc_priv->ysize = h; -- uc_priv->bpix = VIDEO_BPP32; -+ uc_priv->bpix = dev_get_driver_data(dev); - plat->base = fb_base; - plat->size = fb_size; - -@@ -51,11 +51,11 @@ static int bcm2835_video_probe(struct udevice *dev) - } - - static const struct udevice_id bcm2835_video_ids[] = { -- { .compatible = "brcm,bcm2835-hdmi" }, -- { .compatible = "brcm,bcm2711-hdmi0" }, -- { .compatible = "brcm,bcm2708-fb" }, -+ { .compatible = "brcm,bcm2835-hdmi", .data = VIDEO_BPP32}, -+ { .compatible = "brcm,bcm2711-hdmi0", .data = VIDEO_BPP32}, -+ { .compatible = "brcm,bcm2708-fb", .data = VIDEO_BPP16 }, - #if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB) -- { .compatible = "simple-framebuffer" }, -+ { .compatible = "simple-framebuffer", .data = VIDEO_BPP32}, - #endif - { } - }; - -From patchwork Mon Dec 18 21:03:39 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. Ivanov" -X-Patchwork-Id: 1877653 -X-Patchwork-Delegate: pbrobinson@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 - header.s=susede2_rsa header.b=NbGv/QjH; - dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=mv0vjv7/; - dkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de - header.a=rsa-sha256 header.s=susede2_rsa header.b=NbGv/QjH; - dkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=mv0vjv7/; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1)) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4SvC4s5T6Bz1ydc - for ; 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 5/7] mmc: bcmstb: Add support for bcm2712 SD controller -Date: Mon, 18 Dec 2023 23:03:39 +0200 -Message-ID: <20231218210341.30073-6-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [1.90 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] -Authentication-Results: smtp-out1.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Borrow SD quirks from vendor Linux driver. - -"BCM2712 unfortunately carries with it a perennial bug with the SD -controller register interface present on previous chips (2711/2709/2708). -Accesses must be dword-sized and a read-modify-write cycle to the 32-bit -registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and -BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. -BCM2712 does not seem to need the extreme delay between each write as on -previous chips, just the serialisation of writes to these registers in a -single 32-bit operation." - -Signed-off-by: Ivan T. Ivanov ---- - drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++++++++++++++++++- - 1 file changed, 172 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c -index dc96818cff..21489e66c0 100644 ---- a/drivers/mmc/bcmstb_sdhci.c -+++ b/drivers/mmc/bcmstb_sdhci.c -@@ -38,6 +38,16 @@ - */ - #define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000 - -+#define SDIO_CFG_CTRL 0x0 -+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31) -+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30) -+ -+#define SDIO_CFG_SD_PIN_SEL 0x44 -+#define SDIO_CFG_SD_PIN_SEL_MASK 0x3 -+#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1) -+ -+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) -+ - /* - * This driver has only been tested with eMMC devices; SD devices may - * not work. -@@ -47,6 +57,53 @@ struct sdhci_bcmstb_plat { - struct mmc mmc; - }; - -+struct sdhci_bcmstb_host { -+ struct sdhci_host host; -+ u32 shadow_cmd; -+ u32 shadow_blk; -+ bool is_cmd_shadowed; -+ bool is_blk_shadowed; -+}; -+ -+struct sdhci_brcmstb_dev_priv { -+ int (*init)(struct udevice *dev); -+ struct sdhci_ops *ops; -+}; -+ -+static inline struct sdhci_bcmstb_host *to_bcmstb_host(struct sdhci_host *host) -+{ -+ return container_of(host, struct sdhci_bcmstb_host, host); -+} -+ -+static int sdhci_brcmstb_init_2712(struct udevice *dev) -+{ -+ struct sdhci_host *host = dev_get_priv(dev); -+ void *cfg_regs; -+ u32 reg; -+ -+ /* Map in the non-standard CFG registers */ -+ cfg_regs = dev_remap_addr_name(dev, "cfg"); -+ if (!cfg_regs) -+ return -ENOENT; -+ -+ if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) || -+ (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) { -+ /* Force presence */ -+ reg = readl(cfg_regs + SDIO_CFG_CTRL); -+ reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV; -+ reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN; -+ writel(reg, cfg_regs + SDIO_CFG_CTRL); -+ } else { -+ /* Enable card detection line */ -+ reg = readl(cfg_regs + SDIO_CFG_SD_PIN_SEL); -+ reg &= ~SDIO_CFG_SD_PIN_SEL_MASK; -+ reg |= SDIO_CFG_SD_PIN_SEL_CARD; -+ writel(reg, cfg_regs + SDIO_CFG_SD_PIN_SEL); -+ } -+ -+ return 0; -+} -+ - static int sdhci_bcmstb_bind(struct udevice *dev) - { - struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); -@@ -58,10 +115,14 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - { - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); -- struct sdhci_host *host = dev_get_priv(dev); -+ struct sdhci_bcmstb_host *bcmstb = dev_get_priv(dev); -+ struct sdhci_host *host = &bcmstb->host; -+ struct sdhci_brcmstb_dev_priv *dev_priv; - fdt_addr_t base; - int ret; - -+ dev_priv = (struct sdhci_brcmstb_dev_priv *)dev_get_driver_data(dev); -+ - base = dev_read_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; -@@ -75,6 +136,10 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - - host->mmc = &plat->mmc; - host->mmc->dev = dev; -+ -+ if (dev_priv && dev_priv->ops) -+ host->ops = dev_priv->ops; -+ - ret = sdhci_setup_cfg(&plat->cfg, host, - BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY, - BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY); -@@ -84,10 +149,116 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - upriv->mmc = &plat->mmc; - host->mmc->priv = host; - -+ if (dev_priv && dev_priv->init) { -+ ret = dev_priv->init(dev); -+ if (ret) -+ return ret; -+ } -+ - return sdhci_probe(dev); - } - -+static u16 sdhci_brcmstb_32bits_readw(struct sdhci_host *host, int reg) -+{ -+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); -+ u16 word; -+ u32 val; -+ -+ if (reg == SDHCI_TRANSFER_MODE && bcmstb->is_cmd_shadowed) { -+ /* Get the saved transfer mode */ -+ val = bcmstb->shadow_cmd; -+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && -+ bcmstb->is_blk_shadowed) { -+ /* Get the saved block info */ -+ val = bcmstb->shadow_blk; -+ } else { -+ val = readl(host->ioaddr + (reg & ~3)); -+ } -+ -+ word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; -+ return word; -+} -+ -+static u8 sdhci_brcmstb_32bits_readb(struct sdhci_host *host, int reg) -+{ -+ u32 val = readl(host->ioaddr + (reg & ~3)); -+ u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff; -+ return byte; -+} -+ -+/* -+ * BCM2712 unfortunately carries with it a perennial bug with the SD -+ * controller register interface present on previous chips (2711/2709/2708). -+ * Accesses must be dword-sized and a read-modify-write cycle to the -+ * 32-bit registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and -+ * BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. -+ * BCM2712 does not seem to need the extreme delay between each write as -+ * on previous chips, just the serialisation of writes to these registers -+ * in a single 32-bit operation. -+ */ -+static void sdhci_brcmstb_32bits_writew(struct sdhci_host *host, u16 val, int reg) -+{ -+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); -+ u32 word_shift = REG_OFFSET_IN_BITS(reg); -+ u32 mask = 0xffff << word_shift; -+ u32 oldval, newval; -+ -+ if (reg == SDHCI_COMMAND) { -+ /* Write the block now as we are issuing a command */ -+ if (bcmstb->is_blk_shadowed) { -+ writel(bcmstb->shadow_blk, host->ioaddr + SDHCI_BLOCK_SIZE); -+ bcmstb->is_blk_shadowed = false; -+ } -+ oldval = bcmstb->shadow_cmd; -+ bcmstb->is_cmd_shadowed = false; -+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && -+ bcmstb->is_blk_shadowed) { -+ /* Block size and count are stored in shadow reg */ -+ oldval = bcmstb->shadow_blk; -+ } else { -+ /* Read reg, all other registers are not shadowed */ -+ oldval = readl(host->ioaddr + (reg & ~3)); -+ } -+ newval = (oldval & ~mask) | (val << word_shift); -+ -+ if (reg == SDHCI_TRANSFER_MODE) { -+ /* Save the transfer mode until the command is issued */ -+ bcmstb->shadow_cmd = newval; -+ bcmstb->is_cmd_shadowed = true; -+ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { -+ /* Save the block info until the command is issued */ -+ bcmstb->shadow_blk = newval; -+ bcmstb->is_blk_shadowed = true; -+ } else { -+ /* Command or other regular 32-bit write */ -+ writel(newval, host->ioaddr + (reg & ~3)); -+ } -+} -+ -+static void sdhci_brcmstb_32bits_writeb(struct sdhci_host *host, u8 val, int reg) -+{ -+ u32 oldval = readl(host->ioaddr + (reg & ~3)); -+ u32 byte_shift = REG_OFFSET_IN_BITS(reg); -+ u32 mask = 0xff << byte_shift; -+ u32 newval = (oldval & ~mask) | (val << byte_shift); -+ -+ writel(newval, host->ioaddr + (reg & ~3)); -+} -+ -+static struct sdhci_ops sdhci_brcmstb_ops_2712 = { -+ .read_b = sdhci_brcmstb_32bits_readb, -+ .read_w = sdhci_brcmstb_32bits_readw, -+ .write_w = sdhci_brcmstb_32bits_writew, -+ .write_b = sdhci_brcmstb_32bits_writeb, -+}; -+ -+static const struct sdhci_brcmstb_dev_priv match_priv_2712 = { -+ .init = sdhci_brcmstb_init_2712, -+ .ops = &sdhci_brcmstb_ops_2712, -+}; -+ - static const struct udevice_id sdhci_bcmstb_match[] = { -+ { .compatible = "brcm,bcm2712-sdhci", .data = (ulong)&match_priv_2712 }, - { .compatible = "brcm,bcm7425-sdhci" }, - { .compatible = "brcm,sdhci-brcmstb" }, - { } - -From patchwork Mon Dec 18 21:03:40 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 6/7] configs: rpi_arm64: enable SDHCI BCMSTB driver -Date: Mon, 18 Dec 2023 23:03:40 +0200 -Message-ID: <20231218210341.30073-7-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - dkim=pass header.d=suse.de header.s=susede2_rsa header.b="f/19Tx1x"; - dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e0CvACbS -X-Rspamd-Server: rspamd2.dmz-prg2.suse.org -X-Spamd-Result: default: False [-1.62 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; - RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; - BROKEN_CONTENT_TYPE(1.50)[]; RCVD_COUNT_THREE(0.00)[3]; - DKIM_TRACE(0.00)[suse.de:+]; MX_GOOD(-0.01)[]; - RCPT_COUNT_SEVEN(0.00)[11]; NEURAL_HAM_SHORT(-0.20)[-1.000]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.11)[66.45%]; - ARC_NA(0.00)[]; - R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; - DWL_DNSWL_HI(-3.50)[suse.de:dkim]; - NEURAL_HAM_LONG(-1.00)[-1.000]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; - FUZZY_BLOCKED(0.00)[rspamd.com]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; - RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] -X-Rspamd-Queue-Id: AA225222AF -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -RPi5 have "brcm,bcm2712-sdhci" controller which is -handled by "sdhci-bcmstb" driver, so enable it. - -Signed-off-by: Ivan T. Ivanov ---- - configs/rpi_arm64_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index f9dade18f6..1107fd11de 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -33,6 +33,7 @@ CONFIG_BCM2835_GPIO=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_MMC_SDHCI_BCMSTB=y - CONFIG_BCMGENET=y - CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - -From patchwork Mon Dec 18 21:03:41 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 7/7] pci: pcie-brcmstb: Add bcm2712 PCIe controller support -Date: Mon, 18 Dec 2023 23:03:41 +0200 -Message-ID: <20231218210341.30073-8-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Rspamd-Server: rspamd1.dmz-prg2.suse.org -X-Spamd-Bar: / -X-Spamd-Result: default: False [-0.31 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; - RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; - BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RLccgikja4sxqnupiwsfdm9q1r)]; - RCVD_COUNT_THREE(0.00)[3]; DKIM_TRACE(0.00)[suse.de:+]; - MX_GOOD(-0.01)[]; RCPT_COUNT_SEVEN(0.00)[11]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.00)[27.73%]; - ARC_NA(0.00)[]; - R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; - DWL_DNSWL_HI(-3.50)[suse.de:dkim]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; - FUZZY_BLOCKED(0.00)[rspamd.com]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; - RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] -Authentication-Results: smtp-out2.suse.de; - dkim=pass header.d=suse.de header.s=susede2_rsa header.b=1by1WnE8; - dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e64lBvSE -X-Rspamd-Queue-Id: 5507C1F6E6 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -PCIe controller have minor register map difference compared -to bcm2711 variant. Handle this using device specific register -offset. - -Signed-off-by: Ivan T. Ivanov ---- - drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++---- - 1 file changed, 19 insertions(+), 4 deletions(-) - -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index cd45f0bee9..d63e715b2e 100644 ---- a/drivers/pci/pcie_brcmstb.c -+++ b/drivers/pci/pcie_brcmstb.c -@@ -90,7 +90,6 @@ - #define PCIE_MEM_WIN0_LIMIT_HI(win) \ - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) - --#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 - #define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 - - #define PCIE_MSI_INTR2_CLR 0x4508 -@@ -131,6 +130,10 @@ - #define SSC_STATUS_PLL_LOCK_MASK 0x800 - #define SSC_STATUS_PLL_LOCK_SHIFT 11 - -+struct pcie_cfg_data { -+ unsigned long hard_debug_offs; -+}; -+ - /** - * struct brcm_pcie - the PCIe controller state - * @base: Base address of memory mapped IO registers of the controller -@@ -141,6 +144,7 @@ - struct brcm_pcie { - void __iomem *base; - -+ struct pcie_cfg_data *cfg; - int gen; - bool ssc; - }; -@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev) - /* Take the bridge out of reset */ - clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); - -- clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ clrbits_le32(base + pcie->cfg->hard_debug_offs, - PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); - - /* Wait for SerDes to be stable */ -@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev) - setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK); - - /* Turn off SerDes */ -- setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ setbits_le32(base + pcie->cfg->hard_debug_offs, - PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); - - /* Shutdown bridge */ -@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) - if (!pcie->base) - return -EINVAL; - -+ pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev); -+ - pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); - - ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed); -@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = { - .write_config = brcm_pcie_write_config, - }; - -+static const struct pcie_cfg_data bcm2711_cfg = { -+ .hard_debug_offs = 0x4204 -+}; -+ -+static const struct pcie_cfg_data bcm2712_cfg = { -+ .hard_debug_offs = 0x4304 -+}; -+ - static const struct udevice_id brcm_pcie_ids[] = { -- { .compatible = "brcm,bcm2711-pcie" }, -+ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg }, -+ { .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg }, - { } - }; - From 69b6819f2e49a15fe7dbdeb2b23616b0a09ba043 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 15 Feb 2024 13:05:33 +0000 Subject: [PATCH 249/351] drop another patch --- ...rockpro64-Build-u-boot-rockchip-spi..patch | 41 ------------------- uboot-tools.spec | 1 - 2 files changed, 42 deletions(-) delete mode 100644 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch diff --git a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch deleted file mode 100644 index 30e4ad8..0000000 --- a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +++ /dev/null @@ -1,41 +0,0 @@ -From ed5ffb3b53690a47333b931301a3765b9588b5dc Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 11 Jun 2023 21:22:41 +0100 -Subject: [PATCH] Revert "rockchip: rockpro64: Build u-boot-rockchip-spi.bin" - -This reverts commit 5713135ecc75660684ff3eb6cfba7bc11eb6433c. ---- - configs/rockpro64-rk3399_defconfig | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index f41c0306790..0ca2cecade2 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -11,7 +11,6 @@ - CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" - CONFIG_DM_RESET=y - CONFIG_ROCKCHIP_RK3399=y --CONFIG_ROCKCHIP_SPI_IMAGE=y - CONFIG_TARGET_ROCKPRO64_RK3399=y - CONFIG_SPL_STACK=0x400000 - CONFIG_DEBUG_UART_BASE=0xFF1A0000 -@@ -21,7 +20,6 @@ - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y --CONFIG_LTO=y - CONFIG_SPL_FIT_SIGNATURE=y - CONFIG_LEGACY_IMAGE_FORMAT=y - CONFIG_BOOTSTAGE=y -@@ -40,7 +38,6 @@ - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 - CONFIG_SPL_SPI_LOAD=y --CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y --- -2.41.0 - diff --git a/uboot-tools.spec b/uboot-tools.spec index eb2f4a3..b17640e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -27,7 +27,6 @@ Patch7: Add-video-damage-tracking.patch Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -#Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc BuildRequires: bison From 9dc8c9ae3c672f9d57b120e8bfaddb56aa0f0838 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 29 Feb 2024 19:51:50 +0000 Subject: [PATCH 250/351] Update to 2024.04 RC3 Enable a number of new upstream devices Upstream now builds Rockchip SPI artifacts Various cleanups Fix ESP partition detection to enable EFI vars --- ...rockpro64-Build-u-boot-rockchip-spi..patch | 41 - aarch64-boards | 13 + rockchip-PinePhone-Pro-fixes.patch | 43 - rockchip-general-fixes.patch | 136 -- rpi5-initial-support.patch | 1910 ----------------- sources | 2 +- uboot-tools.spec | 78 +- ...ll-options-for-EFI-System-Partitions.patch | 36 + 8 files changed, 85 insertions(+), 2174 deletions(-) delete mode 100644 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch delete mode 100644 rockchip-PinePhone-Pro-fixes.patch delete mode 100644 rockchip-general-fixes.patch delete mode 100644 rpi5-initial-support.patch create mode 100644 uefi-Add-all-options-for-EFI-System-Partitions.patch diff --git a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch b/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch deleted file mode 100644 index 30e4ad8..0000000 --- a/0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch +++ /dev/null @@ -1,41 +0,0 @@ -From ed5ffb3b53690a47333b931301a3765b9588b5dc Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 11 Jun 2023 21:22:41 +0100 -Subject: [PATCH] Revert "rockchip: rockpro64: Build u-boot-rockchip-spi.bin" - -This reverts commit 5713135ecc75660684ff3eb6cfba7bc11eb6433c. ---- - configs/rockpro64-rk3399_defconfig | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index f41c0306790..0ca2cecade2 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -11,7 +11,6 @@ - CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" - CONFIG_DM_RESET=y - CONFIG_ROCKCHIP_RK3399=y --CONFIG_ROCKCHIP_SPI_IMAGE=y - CONFIG_TARGET_ROCKPRO64_RK3399=y - CONFIG_SPL_STACK=0x400000 - CONFIG_DEBUG_UART_BASE=0xFF1A0000 -@@ -21,7 +20,6 @@ - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y --CONFIG_LTO=y - CONFIG_SPL_FIT_SIGNATURE=y - CONFIG_LEGACY_IMAGE_FORMAT=y - CONFIG_BOOTSTAGE=y -@@ -40,7 +38,6 @@ - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 - CONFIG_SPL_SPI_LOAD=y --CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y --- -2.41.0 - diff --git a/aarch64-boards b/aarch64-boards index 39a556a..07154e5 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,4 +1,5 @@ a64-olinuxino +a64-olinuxino-emmc amarula_a64_relic apple_m1 bananapi_m2_plus_h5 @@ -8,6 +9,8 @@ dragonboard410c dragonboard820c dragonboard845c eaidk-610-rk3399 +emlid_neutis_n5_devboard +evb-px5 evb-rk3328 evb-rk3399 ficus-rk3399 @@ -39,17 +42,23 @@ nanopi_neo2 nanopi-neo4-rk3399 nanopi_neo_plus2 nanopi_r1s_h5 +nanopi-r2c-plus-rk3328 +nanopi-r2c-rk3328 nanopi-r2s-rk3328 nanopi-r4s-rk3399 +oceanic_5205_5inmfd odroid-c2 orangepi_3 orangepi_lite2 orangepi_one_plus orangepi_pc2 orangepi_prime +orangepi-r1-plus-lts-rk3328 +orangepi-r1-plus-rk3328 orangepi-rk3399 orangepi_win orangepi_zero2 +orangepi_zero3 orangepi_zero_plus orangepi_zero_plus2 p212 @@ -68,6 +77,8 @@ poplar puma-rk3399 qemu_arm64 roc-cc-rk3328 +rock-4c-plus-rk3399 +rock-4se-rk3399 rock64-rk3328 rock960-rk3399 rock-pi-4c-rk3399 @@ -82,6 +93,8 @@ sopine_baseboard starqltechn tanix_tx6 teres_i +transpeed-8k618-t turris_mox vexpress_aemv8a_juno +x96_mate xilinx_zynqmp_virt diff --git a/rockchip-PinePhone-Pro-fixes.patch b/rockchip-PinePhone-Pro-fixes.patch deleted file mode 100644 index 5e07490..0000000 --- a/rockchip-PinePhone-Pro-fixes.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 1af5e42f170d2c4b944beeb875b80ec7f061038a Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Thu, 25 May 2023 15:27:08 +0200 -Subject: [PATCH] pinephone-pro: Fix I/O port voltage (GPIO3D4A is 1.8V) - -This fixes access to camera sensor over I2C during probe time in -the kernel. (Kernel will fix I/0 port voltage by itself, but the -timing depends on probe order of the drivers, so the fix can -come after the camera sensor driver already failed to probe.) - -Signed-off-by: Ondrej Jirman -Cc: Kever Yang -Reviewed-by: Kever Yang ---- - board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -index eb639cd0d07..b6ccbb9c1c4 100644 ---- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -+++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c -@@ -15,7 +15,8 @@ - #include - #include - --#define GRF_IO_VSEL_BT565_SHIFT 0 -+#define GRF_IO_VSEL_BT565_GPIO2AB 1 -+#define GRF_IO_VSEL_AUDIO_GPIO3D4A 2 - #define PMUGRF_CON0_VSEL_SHIFT 8 - - #ifndef CONFIG_SPL_BUILD -@@ -48,7 +49,8 @@ static void setup_iodomain(void) - syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); - - /* BT565 is in 1.8v domain */ -- rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); -+ rk_setreg(&grf->io_vsel, -+ GRF_IO_VSEL_BT565_GPIO2AB | GRF_IO_VSEL_AUDIO_GPIO3D4A); - - /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ - rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); --- -2.41.0 diff --git a/rockchip-general-fixes.patch b/rockchip-general-fixes.patch deleted file mode 100644 index 00e78f5..0000000 --- a/rockchip-general-fixes.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 2d9350c50a9659cc2a247cdea07f0eacffa3cb32 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 14:44:44 +0100 -Subject: [PATCH] rockchip: pinebook-pro: minor SPI flash fixes - -Set a default offset for environment so it doesn't write it to -unexpected locations, drop unneeded mtd config option. - -Signed-off-by: Peter Robinson ---- - configs/pinebook-pro-rk3399_defconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 8ca1d0708f9..aaa52c6ea70 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y - CONFIG_SYS_TEXT_BASE=0x00200000 - CONFIG_NR_DRAM_BANKS=1 - CONFIG_ENV_SIZE=0x8000 -+CONFIG_ENV_OFFSET=0x3F8000 - CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" - CONFIG_ROCKCHIP_RK3399=y - CONFIG_TARGET_PINEBOOK_PRO_RK3399=y -@@ -22,7 +23,6 @@ CONFIG_MISC_INIT_R=y - # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set - CONFIG_SPL_STACK_R=y - CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 --CONFIG_SPL_MTD_SUPPORT=y - CONFIG_SPL_SPI_LOAD=y - CONFIG_TPL=y - CONFIG_CMD_BOOTZ=y --- -2.36.1 - -From 27ba8e2f904063aec5196f86dd0332bf58a60259 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 14:50:42 +0100 -Subject: [PATCH] rockchip: rockpro64: enable leds - -The Rockpro64 has some GPIO leds so let's enable them so the -user gets some output in early boot. - -Signed-off-by: Peter Robinson ---- - configs/rockpro64-rk3399_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index e6f7a8469a3..b0c3527fab0 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -42,6 +42,8 @@ CONFIG_AHCI_PCI=y - CONFIG_SATA_SIL=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y - CONFIG_MISC=y - CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y --- -2.36.1 - -From 8bca90472e0d71e5344711b6f5fe8dc95e19af5a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 12 Jun 2022 15:12:47 +0100 -Subject: [PATCH] rockchip: pinebook-pro: sync PBP dtb to 5.18 - -Sync the pinebook pro to upstream 5.18, in particular this brings -brings in a fix so the DP is disabled so Linux will actually boot. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinebook-pro.dts | 11 +++-------- - 1 file changed, 3 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts -index 2b5f001ff4a..d6b68d77d63 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro.dts -+++ b/arch/arm/dts/rk3399-pinebook-pro.dts -@@ -17,6 +17,7 @@ - / { - model = "Pine64 Pinebook Pro"; - compatible = "pine64,pinebook-pro", "rockchip,rk3399"; -+ chassis-type = "laptop"; - - aliases { - mmc0 = &sdio0; -@@ -242,12 +243,12 @@ - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; -+ pwm-supply = <&vcc_sysin>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; -- vin-supply = <&vcc_sysin>; - - regulator-state-mem { - regulator-on-in-suspend; -@@ -385,10 +386,6 @@ - }; - }; - --&cdn_dp { -- status = "okay"; --}; -- - &cpu_b0 { - cpu-supply = <&vdd_cpu_b>; - }; -@@ -475,8 +472,6 @@ - vcc10-supply = <&vcc_sysin>; - vcc11-supply = <&vcc_sysin>; - vcc12-supply = <&vcc3v3_sys>; -- vcc13-supply = <&vcc_sysin>; -- vcc14-supply = <&vcc_sysin>; - - regulators { - /* rk3399 center logic supply */ -@@ -711,7 +706,7 @@ - - connector { - compatible = "usb-c-connector"; -- data-role = "host"; -+ data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; --- -2.36.1 - diff --git a/rpi5-initial-support.patch b/rpi5-initial-support.patch deleted file mode 100644 index 4a79f31..0000000 --- a/rpi5-initial-support.patch +++ /dev/null @@ -1,1910 +0,0 @@ -From patchwork Mon Dec 18 21:03:35 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T . Ivanov" -Subject: [PATCH v3 1/7] rpi5: add initial memory map for bcm2712 -Date: Mon, 18 Dec 2023 23:03:35 +0200 -Message-ID: <20231218210341.30073-2-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - none -X-Spamd-Result: default: False [0.70 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - NEURAL_HAM_LONG(-1.00)[-1.000]; RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,bedrocksystems.com:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Dmitry Malkin - -includes: -* 1GB of RAM (from 4GB or 8GB total) -* VPU memory interface -* AXI ranges (main peripherals) - -Signed-off-by: Dmitry Malkin -Signed-off-by: Ivan T. Ivanov ---- - arch/arm/mach-bcm283x/init.c | 38 +++++++++++++++++++++++++++++++++++- - 1 file changed, 37 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index 7265faf6ce..af23b9711a 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -19,7 +19,7 @@ - #ifdef CONFIG_ARM64 - #include - --#define MEM_MAP_MAX_ENTRIES (4) -+#define MEM_MAP_MAX_ENTRIES (5) - - static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = { - { -@@ -68,6 +68,41 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = { - } - }; - -+static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = { -+ { -+ .virt = 0x00000000UL, -+ .phys = 0x00000000UL, -+ .size = 0x3f800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | -+ PTE_BLOCK_INNER_SHARE -+ }, { -+ .virt = 0x3f800000UL, -+ .phys = 0x3f800000UL, -+ .size = 0x00800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* Beginning of AXI bus where uSD controller lives */ -+ .virt = 0x1000000000UL, -+ .phys = 0x1000000000UL, -+ .size = 0x0002000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ .virt = 0x107c000000UL, -+ .phys = 0x107c000000UL, -+ .size = 0x0004000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* List terminator */ -+ 0, -+ } -+}; -+ - struct mm_region *mem_map = bcm283x_mem_map; - - /* -@@ -78,6 +113,7 @@ static const struct udevice_id board_ids[] = { - { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map}, - { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map}, - { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map}, -+ { .compatible = "brcm,bcm2712", .data = (ulong)&bcm2712_mem_map}, - { }, - }; - - -From patchwork Mon Dec 18 21:03:36 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T . Ivanov" -Subject: [PATCH v3 2/7] rpi5: Use devicetree as alternative way to read IO - base addresses -Date: Mon, 18 Dec 2023 23:03:36 +0200 -Message-ID: <20231218210341.30073-3-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [10.00 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_SPAM(5.10)[100.00%]; - FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[bedrocksystems.com:email,suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[] -Authentication-Results: smtp-out2.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -From: Dmitry Malkin - -MBOX and Watchdog on RPi5/bcm2712 has a different base IO offsets. -Find them via devicetree blob passed by bootloader. - -Signed-off-by: Dmitry Malkin -Signed-off-by: Ivan T. Ivanov ---- - arch/arm/mach-bcm283x/include/mach/base.h | 5 ++- - arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +- - arch/arm/mach-bcm283x/include/mach/sdhci.h | 3 +- - arch/arm/mach-bcm283x/include/mach/timer.h | 3 +- - arch/arm/mach-bcm283x/include/mach/wdog.h | 3 +- - arch/arm/mach-bcm283x/init.c | 43 ++++++++++++++++++---- - 6 files changed, 43 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h -index 4ccaf69693..6de99e7ea1 100644 ---- a/arch/arm/mach-bcm283x/include/mach/base.h -+++ b/arch/arm/mach-bcm283x/include/mach/base.h -@@ -6,7 +6,10 @@ - #ifndef _BCM283x_BASE_H_ - #define _BCM283x_BASE_H_ - --extern unsigned long rpi_bcm283x_base; -+extern unsigned long rpi_mbox_base; -+extern unsigned long rpi_timer_base; -+extern unsigned long rpi_sdhci_base; -+extern unsigned long rpi_wdog_base; - - #ifdef CONFIG_ARMV7_LPAE - #ifdef CONFIG_TARGET_RPI_4_32B -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 490664f878..35d4e2f075 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -38,8 +38,7 @@ - - /* Raw mailbox HW */ - --#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x0000b880; }) -+#define BCM2835_MBOX_PHYSADDR rpi_mbox_base - - struct bcm2835_mbox_regs { - u32 read; -diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h -index 7323690687..e837c679c4 100644 ---- a/arch/arm/mach-bcm283x/include/mach/sdhci.h -+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h -@@ -8,8 +8,7 @@ - - #include - --#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00300000; }) -+#define BCM2835_SDHCI_PHYSADDR rpi_sdhci_base - - int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); - -diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h -index 5567dbd7f3..60500a256d 100644 ---- a/arch/arm/mach-bcm283x/include/mach/timer.h -+++ b/arch/arm/mach-bcm283x/include/mach/timer.h -@@ -11,8 +11,7 @@ - #include - #endif - --#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00003000; }) -+#define BCM2835_TIMER_PHYSADDR rpi_timer_base - - #define BCM2835_TIMER_CS_M3 (1 << 3) - #define BCM2835_TIMER_CS_M2 (1 << 2) -diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h -index 9942666720..b950560674 100644 ---- a/arch/arm/mach-bcm283x/include/mach/wdog.h -+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h -@@ -8,8 +8,7 @@ - - #include - --#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \ -- rpi_bcm283x_base + 0x00100000; }) -+#define BCM2835_WDOG_PHYSADDR rpi_wdog_base - - struct bcm2835_wdog_regs { - u32 unknown0[7]; -diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c -index af23b9711a..1c5c748484 100644 ---- a/arch/arm/mach-bcm283x/init.c -+++ b/arch/arm/mach-bcm283x/init.c -@@ -151,7 +151,11 @@ static void rpi_update_mem_map(void) - static void rpi_update_mem_map(void) {} - #endif - --unsigned long rpi_bcm283x_base = 0x3f000000; -+/* Default bcm283x devices addresses */ -+unsigned long rpi_mbox_base = 0x3f00b880; -+unsigned long rpi_sdhci_base = 0x3f300000; -+unsigned long rpi_wdog_base = 0x3f100000; -+unsigned long rpi_timer_base = 0x3f003000; - - int arch_cpu_init(void) - { -@@ -162,22 +166,45 @@ int arch_cpu_init(void) - - int mach_cpu_init(void) - { -- int ret, soc_offset; -+ int ret, soc, offset; - u64 io_base, size; - - rpi_update_mem_map(); - - /* Get IO base from device tree */ -- soc_offset = fdt_path_offset(gd->fdt_blob, "/soc"); -- if (soc_offset < 0) -- return soc_offset; -+ soc = fdt_path_offset(gd->fdt_blob, "/soc"); -+ if (soc < 0) -+ return soc; - -- ret = fdt_read_range((void *)gd->fdt_blob, soc_offset, 0, NULL, -- &io_base, &size); -+ ret = fdt_read_range((void *)gd->fdt_blob, soc, 0, NULL, -+ &io_base, &size); - if (ret) - return ret; - -- rpi_bcm283x_base = io_base; -+ rpi_mbox_base = io_base + 0x00b880; -+ rpi_sdhci_base = io_base + 0x300000; -+ rpi_wdog_base = io_base + 0x100000; -+ rpi_timer_base = io_base + 0x003000; -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-mbox"); -+ if (offset > soc) -+ rpi_mbox_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-sdhci"); -+ if (offset > soc) -+ rpi_sdhci_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2835-system-timer"); -+ if (offset > soc) -+ rpi_timer_base = fdt_get_base_address(gd->fdt_blob, offset); -+ -+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc, -+ "brcm,bcm2712-pm"); -+ if (offset > soc) -+ rpi_wdog_base = fdt_get_base_address(gd->fdt_blob, offset); - - return 0; - } - -From patchwork Mon Dec 18 21:03:37 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 3/7] rpi5: Use devicetree to retrieve board revision -Date: Mon, 18 Dec 2023 23:03:37 +0200 -Message-ID: <20231218210341.30073-4-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - none -X-Spamd-Result: default: False [1.14 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - NEURAL_HAM_LONG(-1.00)[-1.000]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - NEURAL_HAM_SHORT(-0.20)[-1.000]; RCPT_COUNT_SEVEN(0.00)[11]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-2.56)[98.03%] -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Firmware on RPi5 return error on board revision query -through firmware interface, but on the other hand it fills -"linux,revision" in "system" node, so use it to detect board -revision. - - system { - linux,revision = <0xc04170>; - linux,serial = <0x6cf44e80 0x3c533ede>; - }; - -Signed-off-by: Ivan T. Ivanov ---- - board/raspberrypi/rpi/rpi.c | 22 +++++++++++++++++++--- - 1 file changed, 19 insertions(+), 3 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index cd823ad746..2851ebc985 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -171,6 +171,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2711-rpi-cm4.dtb", - true, - }, -+ [0x17] = { -+ "5 Model B", -+ DTB_DIR "bcm2712-rpi-5-b.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { -@@ -429,15 +434,27 @@ static void get_board_revision(void) - int ret; - const struct rpi_model *models; - uint32_t models_count; -+ ofnode node; - - BCM2835_MBOX_INIT_HDR(msg); - BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV); - - ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); - if (ret) { -- printf("bcm2835: Could not query board revision\n"); - /* Ignore error; not critical */ -- return; -+ node = ofnode_path("/system"); -+ if (!ofnode_valid(node)) { -+ printf("bcm2835: Could not find /system node\n"); -+ return; -+ } -+ -+ ret = ofnode_read_u32(node, "linux,revision", &revision); -+ if (ret) { -+ printf("bcm2835: Could not find linux,revision\n"); -+ return; -+ } -+ } else { -+ revision = msg->get_board_rev.body.resp.rev; - } - - /* -@@ -451,7 +468,6 @@ static void get_board_revision(void) - * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250 - * http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594 - */ -- revision = msg->get_board_rev.body.resp.rev; - if (revision & 0x800000) { - rev_scheme = 1; - rev_type = (revision >> 4) & 0xff; - -From patchwork Mon Dec 18 21:03:38 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. Ivanov" -X-Patchwork-Id: 1877651 -X-Patchwork-Delegate: pbrobinson@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 - header.s=susede2_rsa header.b=v2vbP3rz; - dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=DCEhbGvW; - dkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de - header.a=rsa-sha256 header.s=susede2_rsa header.b=v2vbP3rz; - dkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=DCEhbGvW; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4SvC4X1dxWz1ydc - for ; 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 4/7] bcm2835: brcm, - bcm2708-fb device is using r5g6b5 format -Date: Mon, 18 Dec 2023 23:03:38 +0200 -Message-ID: <20231218210341.30073-5-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [4.90 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-0.00)[34.66%] -Authentication-Results: smtp-out1.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -brcm,bcm2708-fb device provided by firmware on RPi5 uses -16 bits per pixel. Update driver to properly handle this. - -Signed-off-by: Ivan T. Ivanov ---- - drivers/video/bcm2835.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index 14942526f1..245c958b6e 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -43,7 +43,7 @@ static int bcm2835_video_probe(struct udevice *dev) - - uc_priv->xsize = w; - uc_priv->ysize = h; -- uc_priv->bpix = VIDEO_BPP32; -+ uc_priv->bpix = dev_get_driver_data(dev); - plat->base = fb_base; - plat->size = fb_size; - -@@ -51,11 +51,11 @@ static int bcm2835_video_probe(struct udevice *dev) - } - - static const struct udevice_id bcm2835_video_ids[] = { -- { .compatible = "brcm,bcm2835-hdmi" }, -- { .compatible = "brcm,bcm2711-hdmi0" }, -- { .compatible = "brcm,bcm2708-fb" }, -+ { .compatible = "brcm,bcm2835-hdmi", .data = VIDEO_BPP32}, -+ { .compatible = "brcm,bcm2711-hdmi0", .data = VIDEO_BPP32}, -+ { .compatible = "brcm,bcm2708-fb", .data = VIDEO_BPP16 }, - #if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB) -- { .compatible = "simple-framebuffer" }, -+ { .compatible = "simple-framebuffer", .data = VIDEO_BPP32}, - #endif - { } - }; - -From patchwork Mon Dec 18 21:03:39 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. Ivanov" -X-Patchwork-Id: 1877653 -X-Patchwork-Delegate: pbrobinson@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 - header.s=susede2_rsa header.b=NbGv/QjH; - dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=mv0vjv7/; - dkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de - header.a=rsa-sha256 header.s=susede2_rsa header.b=NbGv/QjH; - dkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 - header.s=susede2_ed25519 header.b=mv0vjv7/; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1)) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4SvC4s5T6Bz1ydc - for ; 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 5/7] mmc: bcmstb: Add support for bcm2712 SD controller -Date: Mon, 18 Dec 2023 23:03:39 +0200 -Message-ID: <20231218210341.30073-6-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Spamd-Result: default: False [1.90 / 50.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; - TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RL9dd9h8xg9qpm5f14t9e5w4zz)]; - RCVD_COUNT_THREE(0.00)[3]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCPT_COUNT_SEVEN(0.00)[11]; MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; - FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%] -Authentication-Results: smtp-out1.suse.de; - none -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Borrow SD quirks from vendor Linux driver. - -"BCM2712 unfortunately carries with it a perennial bug with the SD -controller register interface present on previous chips (2711/2709/2708). -Accesses must be dword-sized and a read-modify-write cycle to the 32-bit -registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and -BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. -BCM2712 does not seem to need the extreme delay between each write as on -previous chips, just the serialisation of writes to these registers in a -single 32-bit operation." - -Signed-off-by: Ivan T. Ivanov ---- - drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++++++++++++++++++- - 1 file changed, 172 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c -index dc96818cff..21489e66c0 100644 ---- a/drivers/mmc/bcmstb_sdhci.c -+++ b/drivers/mmc/bcmstb_sdhci.c -@@ -38,6 +38,16 @@ - */ - #define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000 - -+#define SDIO_CFG_CTRL 0x0 -+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31) -+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30) -+ -+#define SDIO_CFG_SD_PIN_SEL 0x44 -+#define SDIO_CFG_SD_PIN_SEL_MASK 0x3 -+#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1) -+ -+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) -+ - /* - * This driver has only been tested with eMMC devices; SD devices may - * not work. -@@ -47,6 +57,53 @@ struct sdhci_bcmstb_plat { - struct mmc mmc; - }; - -+struct sdhci_bcmstb_host { -+ struct sdhci_host host; -+ u32 shadow_cmd; -+ u32 shadow_blk; -+ bool is_cmd_shadowed; -+ bool is_blk_shadowed; -+}; -+ -+struct sdhci_brcmstb_dev_priv { -+ int (*init)(struct udevice *dev); -+ struct sdhci_ops *ops; -+}; -+ -+static inline struct sdhci_bcmstb_host *to_bcmstb_host(struct sdhci_host *host) -+{ -+ return container_of(host, struct sdhci_bcmstb_host, host); -+} -+ -+static int sdhci_brcmstb_init_2712(struct udevice *dev) -+{ -+ struct sdhci_host *host = dev_get_priv(dev); -+ void *cfg_regs; -+ u32 reg; -+ -+ /* Map in the non-standard CFG registers */ -+ cfg_regs = dev_remap_addr_name(dev, "cfg"); -+ if (!cfg_regs) -+ return -ENOENT; -+ -+ if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) || -+ (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) { -+ /* Force presence */ -+ reg = readl(cfg_regs + SDIO_CFG_CTRL); -+ reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV; -+ reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN; -+ writel(reg, cfg_regs + SDIO_CFG_CTRL); -+ } else { -+ /* Enable card detection line */ -+ reg = readl(cfg_regs + SDIO_CFG_SD_PIN_SEL); -+ reg &= ~SDIO_CFG_SD_PIN_SEL_MASK; -+ reg |= SDIO_CFG_SD_PIN_SEL_CARD; -+ writel(reg, cfg_regs + SDIO_CFG_SD_PIN_SEL); -+ } -+ -+ return 0; -+} -+ - static int sdhci_bcmstb_bind(struct udevice *dev) - { - struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); -@@ -58,10 +115,14 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - { - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct sdhci_bcmstb_plat *plat = dev_get_plat(dev); -- struct sdhci_host *host = dev_get_priv(dev); -+ struct sdhci_bcmstb_host *bcmstb = dev_get_priv(dev); -+ struct sdhci_host *host = &bcmstb->host; -+ struct sdhci_brcmstb_dev_priv *dev_priv; - fdt_addr_t base; - int ret; - -+ dev_priv = (struct sdhci_brcmstb_dev_priv *)dev_get_driver_data(dev); -+ - base = dev_read_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; -@@ -75,6 +136,10 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - - host->mmc = &plat->mmc; - host->mmc->dev = dev; -+ -+ if (dev_priv && dev_priv->ops) -+ host->ops = dev_priv->ops; -+ - ret = sdhci_setup_cfg(&plat->cfg, host, - BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY, - BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY); -@@ -84,10 +149,116 @@ static int sdhci_bcmstb_probe(struct udevice *dev) - upriv->mmc = &plat->mmc; - host->mmc->priv = host; - -+ if (dev_priv && dev_priv->init) { -+ ret = dev_priv->init(dev); -+ if (ret) -+ return ret; -+ } -+ - return sdhci_probe(dev); - } - -+static u16 sdhci_brcmstb_32bits_readw(struct sdhci_host *host, int reg) -+{ -+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); -+ u16 word; -+ u32 val; -+ -+ if (reg == SDHCI_TRANSFER_MODE && bcmstb->is_cmd_shadowed) { -+ /* Get the saved transfer mode */ -+ val = bcmstb->shadow_cmd; -+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && -+ bcmstb->is_blk_shadowed) { -+ /* Get the saved block info */ -+ val = bcmstb->shadow_blk; -+ } else { -+ val = readl(host->ioaddr + (reg & ~3)); -+ } -+ -+ word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; -+ return word; -+} -+ -+static u8 sdhci_brcmstb_32bits_readb(struct sdhci_host *host, int reg) -+{ -+ u32 val = readl(host->ioaddr + (reg & ~3)); -+ u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff; -+ return byte; -+} -+ -+/* -+ * BCM2712 unfortunately carries with it a perennial bug with the SD -+ * controller register interface present on previous chips (2711/2709/2708). -+ * Accesses must be dword-sized and a read-modify-write cycle to the -+ * 32-bit registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and -+ * BLOCK_COUNT registers tramples the upper/lower 16 bits of data written. -+ * BCM2712 does not seem to need the extreme delay between each write as -+ * on previous chips, just the serialisation of writes to these registers -+ * in a single 32-bit operation. -+ */ -+static void sdhci_brcmstb_32bits_writew(struct sdhci_host *host, u16 val, int reg) -+{ -+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host); -+ u32 word_shift = REG_OFFSET_IN_BITS(reg); -+ u32 mask = 0xffff << word_shift; -+ u32 oldval, newval; -+ -+ if (reg == SDHCI_COMMAND) { -+ /* Write the block now as we are issuing a command */ -+ if (bcmstb->is_blk_shadowed) { -+ writel(bcmstb->shadow_blk, host->ioaddr + SDHCI_BLOCK_SIZE); -+ bcmstb->is_blk_shadowed = false; -+ } -+ oldval = bcmstb->shadow_cmd; -+ bcmstb->is_cmd_shadowed = false; -+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && -+ bcmstb->is_blk_shadowed) { -+ /* Block size and count are stored in shadow reg */ -+ oldval = bcmstb->shadow_blk; -+ } else { -+ /* Read reg, all other registers are not shadowed */ -+ oldval = readl(host->ioaddr + (reg & ~3)); -+ } -+ newval = (oldval & ~mask) | (val << word_shift); -+ -+ if (reg == SDHCI_TRANSFER_MODE) { -+ /* Save the transfer mode until the command is issued */ -+ bcmstb->shadow_cmd = newval; -+ bcmstb->is_cmd_shadowed = true; -+ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { -+ /* Save the block info until the command is issued */ -+ bcmstb->shadow_blk = newval; -+ bcmstb->is_blk_shadowed = true; -+ } else { -+ /* Command or other regular 32-bit write */ -+ writel(newval, host->ioaddr + (reg & ~3)); -+ } -+} -+ -+static void sdhci_brcmstb_32bits_writeb(struct sdhci_host *host, u8 val, int reg) -+{ -+ u32 oldval = readl(host->ioaddr + (reg & ~3)); -+ u32 byte_shift = REG_OFFSET_IN_BITS(reg); -+ u32 mask = 0xff << byte_shift; -+ u32 newval = (oldval & ~mask) | (val << byte_shift); -+ -+ writel(newval, host->ioaddr + (reg & ~3)); -+} -+ -+static struct sdhci_ops sdhci_brcmstb_ops_2712 = { -+ .read_b = sdhci_brcmstb_32bits_readb, -+ .read_w = sdhci_brcmstb_32bits_readw, -+ .write_w = sdhci_brcmstb_32bits_writew, -+ .write_b = sdhci_brcmstb_32bits_writeb, -+}; -+ -+static const struct sdhci_brcmstb_dev_priv match_priv_2712 = { -+ .init = sdhci_brcmstb_init_2712, -+ .ops = &sdhci_brcmstb_ops_2712, -+}; -+ - static const struct udevice_id sdhci_bcmstb_match[] = { -+ { .compatible = "brcm,bcm2712-sdhci", .data = (ulong)&match_priv_2712 }, - { .compatible = "brcm,bcm7425-sdhci" }, - { .compatible = "brcm,sdhci-brcmstb" }, - { } - -From patchwork Mon Dec 18 21:03:40 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 6/7] configs: rpi_arm64: enable SDHCI BCMSTB driver -Date: Mon, 18 Dec 2023 23:03:40 +0200 -Message-ID: <20231218210341.30073-7-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -Authentication-Results: smtp-out1.suse.de; - dkim=pass header.d=suse.de header.s=susede2_rsa header.b="f/19Tx1x"; - dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e0CvACbS -X-Rspamd-Server: rspamd2.dmz-prg2.suse.org -X-Spamd-Result: default: False [-1.62 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; - RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; - BROKEN_CONTENT_TYPE(1.50)[]; RCVD_COUNT_THREE(0.00)[3]; - DKIM_TRACE(0.00)[suse.de:+]; MX_GOOD(-0.01)[]; - RCPT_COUNT_SEVEN(0.00)[11]; NEURAL_HAM_SHORT(-0.20)[-1.000]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.11)[66.45%]; - ARC_NA(0.00)[]; - R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; - DWL_DNSWL_HI(-3.50)[suse.de:dkim]; - NEURAL_HAM_LONG(-1.00)[-1.000]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; - FUZZY_BLOCKED(0.00)[rspamd.com]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; - RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] -X-Rspamd-Queue-Id: AA225222AF -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -RPi5 have "brcm,bcm2712-sdhci" controller which is -handled by "sdhci-bcmstb" driver, so enable it. - -Signed-off-by: Ivan T. Ivanov ---- - configs/rpi_arm64_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig -index f9dade18f6..1107fd11de 100644 ---- a/configs/rpi_arm64_defconfig -+++ b/configs/rpi_arm64_defconfig -@@ -33,6 +33,7 @@ CONFIG_BCM2835_GPIO=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_MMC_SDHCI_BCMSTB=y - CONFIG_BCMGENET=y - CONFIG_PCI_BRCMSTB=y - CONFIG_PINCTRL=y - -From patchwork Mon Dec 18 21:03:41 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Ivan T. 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Ivanov" -To: Matthias Brugger , - Peter Robinson -Cc: Dmitry Malkin , - Thomas Fitzsimmons , Peng Fan , - Jaehoon Chung , Anatolij Gustschin , - wahrenst@gmx.net, florian.fainelli@broadcom.com, u-boot@lists.denx.de, - "Ivan T. Ivanov" -Subject: [PATCH v3 7/7] pci: pcie-brcmstb: Add bcm2712 PCIe controller support -Date: Mon, 18 Dec 2023 23:03:41 +0200 -Message-ID: <20231218210341.30073-8-iivanov@suse.de> -X-Mailer: git-send-email 2.43.0 -In-Reply-To: <20231218210341.30073-1-iivanov@suse.de> -References: <20231218210341.30073-1-iivanov@suse.de> -MIME-Version: 1.0 -X-Rspamd-Server: rspamd1.dmz-prg2.suse.org -X-Spamd-Bar: / -X-Spamd-Result: default: False [-0.31 / 50.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; - RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; - TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; - BROKEN_CONTENT_TYPE(1.50)[]; - R_RATELIMIT(0.00)[to_ip_from(RLccgikja4sxqnupiwsfdm9q1r)]; - RCVD_COUNT_THREE(0.00)[3]; DKIM_TRACE(0.00)[suse.de:+]; - MX_GOOD(-0.01)[]; RCPT_COUNT_SEVEN(0.00)[11]; - FREEMAIL_TO(0.00)[suse.com,gmail.com]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; BAYES_HAM(-0.00)[27.73%]; - ARC_NA(0.00)[]; - R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - RCVD_DKIM_ARC_DNSWL_HI(-1.00)[]; FROM_HAS_DN(0.00)[]; - FREEMAIL_ENVRCPT(0.00)[gmail.com,gmx.net]; - TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; - DWL_DNSWL_HI(-3.50)[suse.de:dkim]; - DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; - MID_CONTAINS_FROM(1.00)[]; - DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; - FUZZY_BLOCKED(0.00)[rspamd.com]; - FREEMAIL_CC(0.00)[bedrocksystems.com,fitzsim.org,nxp.com,samsung.com,denx.de,gmx.net,broadcom.com,lists.denx.de,suse.de]; - RCVD_TLS_ALL(0.00)[]; - RCVD_IN_DNSWL_HI(-0.50)[2a07:de40:b281:104:10:150:64:97:from] -Authentication-Results: smtp-out2.suse.de; - dkim=pass header.d=suse.de header.s=susede2_rsa header.b=1by1WnE8; - dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=e64lBvSE -X-Rspamd-Queue-Id: 5507C1F6E6 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -PCIe controller have minor register map difference compared -to bcm2711 variant. Handle this using device specific register -offset. - -Signed-off-by: Ivan T. Ivanov ---- - drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++---- - 1 file changed, 19 insertions(+), 4 deletions(-) - -diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c -index cd45f0bee9..d63e715b2e 100644 ---- a/drivers/pci/pcie_brcmstb.c -+++ b/drivers/pci/pcie_brcmstb.c -@@ -90,7 +90,6 @@ - #define PCIE_MEM_WIN0_LIMIT_HI(win) \ - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) - --#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 - #define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 - - #define PCIE_MSI_INTR2_CLR 0x4508 -@@ -131,6 +130,10 @@ - #define SSC_STATUS_PLL_LOCK_MASK 0x800 - #define SSC_STATUS_PLL_LOCK_SHIFT 11 - -+struct pcie_cfg_data { -+ unsigned long hard_debug_offs; -+}; -+ - /** - * struct brcm_pcie - the PCIe controller state - * @base: Base address of memory mapped IO registers of the controller -@@ -141,6 +144,7 @@ - struct brcm_pcie { - void __iomem *base; - -+ struct pcie_cfg_data *cfg; - int gen; - bool ssc; - }; -@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev) - /* Take the bridge out of reset */ - clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK); - -- clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ clrbits_le32(base + pcie->cfg->hard_debug_offs, - PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); - - /* Wait for SerDes to be stable */ -@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev) - setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK); - - /* Turn off SerDes */ -- setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ setbits_le32(base + pcie->cfg->hard_debug_offs, - PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); - - /* Shutdown bridge */ -@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev) - if (!pcie->base) - return -EINVAL; - -+ pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev); -+ - pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc"); - - ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed); -@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = { - .write_config = brcm_pcie_write_config, - }; - -+static const struct pcie_cfg_data bcm2711_cfg = { -+ .hard_debug_offs = 0x4204 -+}; -+ -+static const struct pcie_cfg_data bcm2712_cfg = { -+ .hard_debug_offs = 0x4304 -+}; -+ - static const struct udevice_id brcm_pcie_ids[] = { -- { .compatible = "brcm,bcm2711-pcie" }, -+ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg }, -+ { .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg }, - { } - }; - diff --git a/sources b/sources index 8f50a6d..be81335 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.04-rc2.tar.bz2) = f5c6d6a37ce6b34bd1ab2cddd5d0cacddfd19b5345934731df3a7ed454a3895ad2d14acbdb2e1b922b9571778e50b54cb7612b1798a04dfb991365d3344cd865 +SHA512 (u-boot-2024.04-rc3.tar.bz2) = 75f36d57330e771dd3757c49d576b3a7f1c933dad9a102f22d2438286a763f0ec7deae863a97559cac48be8fc736b68a5292b4383d45178b111bd08134352e38 diff --git a/uboot-tools.spec b/uboot-tools.spec index eb2f4a3..4d006c4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -17,17 +17,23 @@ ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards +# This is now legacy, most devices use bootflow, we keep this for the laggards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch2: disable-VBE-by-default.patch +# Identify VFAT partitions as ESP, allows EFI setvar on our images +Patch2: uefi-Add-all-options-for-EFI-System-Partitions.patch +# New function to find fdt for loading from disk +#Patch3: +# Fedora patches to enable/disable features +Patch4: disable-VBE-by-default.patch Patch5: enable-bootmenu-by-default.patch -Patch7: Add-video-damage-tracking.patch +# Should be upstream but it's taking time +Patch6: Add-video-damage-tracking.patch # Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -#Patch12: 0001-Revert-rockchip-rockpro64-Build-u-boot-rockchip-spi..patch BuildRequires: bc BuildRequires: bison @@ -87,22 +93,27 @@ do mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i) + sun50i=(a64-olinuxino a64-olinuxino-emmc amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 oceanic_5205_5inmfd orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" - cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/ + cp /usr/share/arm-trusted-firmware/sun50i_a64/bl31.bin builds/$(echo $board)/atf-bl31 fi - sun50h6=(beelink_gs1 orangepi_3 orangepi_lite2 orangepi_one_plus orangepi_zero2 pine_h64 tanix_tx6) + sun50h6=(beelink_gs1 emlid_neutis_n5_devboard orangepi_3 orangepi_lite2 orangepi_one_plus pine_h64 tanix_tx6) if [[ " ${sun50h6[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h6" - cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ + cp /usr/share/arm-trusted-firmware/sun50i_h6/bl31.bin builds/$(echo $board)/atf-bl31 fi - rk3328=(evb-rk3328 nanopi-r2s-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328) + sun50i_h616=(orangepi_zero2 orangepi_zero3 transpeed-8k618-t x96_mate) + if [[ " ${sun50i_h616[*]} " == *" $board "* ]]; then + echo "Board: $board using sun50i_h616" + cp /usr/share/arm-trusted-firmware/sun50i_h616/bl31.bin builds/$(echo $board)/atf-bl31 + fi + rk3328=(evb-rk3328 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 nanopi-r2s-rk3328 orangepi-r1-plus-lts-rk3328 orangepi-r1-plus-rk3328 roc-cc-rk3328 rock64-rk3328 rock-pi-e-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/bl31.elf builds/$(echo $board)/atf-bl31 fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399 eaidk-610-rk3399) + rk3399=(eaidk-610-rk3399 evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -113,17 +124,6 @@ do BINMAN_ALLOW_MISSING=1 make $(echo $board)_defconfig O=builds/$(echo $board)/ BINMAN_ALLOW_MISSING=1 %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ - # build spi images for rockchip boards with SPI flash - rkspi=(rock64-rk3328) - if [[ " ${rkspi[*]} " == *" $board "* ]]; then - echo "Board: $board with SPI flash" - builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi - fi - rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) - if [[ " ${rkspi[*]} " == *" $board "* ]]; then - echo "Board: $board with SPI flash" - builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi - fi done %endif @@ -138,39 +138,24 @@ mkdir -p %{buildroot}%{_datadir}/uboot/ %ifarch aarch64 for board in $(ls builds) do - mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/ - for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img idbloader.spi spl/boot.bin spl/sunxi-spl.bin + for file in u-boot.bin u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img idbloader-spi.img spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then - install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/ + install -pD -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/$(echo $file) fi done done -# For Apple M1 we also need the nodtb variant -install -p -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin -%endif +# For Apple M-series we also need the nodtb variant +install -pD -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin # Bit of a hack to remove binaries we don't use as they're large -%ifarch aarch64 for board in $(ls builds) do rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.dtb if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.* - fi - if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/MLO ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin - fi - if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/SPL ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin - fi - if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin - fi - if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.kwb ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.* - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin + rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/sunxi-spl.bin fi if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/idbloader.img ]; then rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin @@ -194,16 +179,23 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %doc doc/develop/uefi doc/usage doc/arch/arm64.rst %{_bindir}/* %{_mandir}/man1/mkimage.1* -%dir %{_datadir}/uboot/ %if %{with toolsonly} %ifarch aarch64 %files -n uboot-images-armv8 +%dir %{_datadir}/uboot/ %{_datadir}/uboot/* %endif %endif %changelog +* Thu Feb 29 2024 Peter Robinson - 1:2024.04-0.3.rc3 +- Update to 2024.04 RC3 +- Enable a number of new upstream devices +- Upstream now builds Rockchip SPI artifacts +- Various cleanups +- Fix ESP partition detection to enable EFI vars + * Wed Feb 14 2024 Peter Robinson - 1:2024.04-0.2.rc2 - Update to 2024.04 RC2 diff --git a/uefi-Add-all-options-for-EFI-System-Partitions.patch b/uefi-Add-all-options-for-EFI-System-Partitions.patch new file mode 100644 index 0000000..22c5bcc --- /dev/null +++ b/uefi-Add-all-options-for-EFI-System-Partitions.patch @@ -0,0 +1,36 @@ +From 7ce45304053f31afaea6b80305aaee164c2e260a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 21 Feb 2024 14:43:16 +0000 +Subject: [PATCH] disk: dos: Add all options for EFI System Partitions + +The EFI spec states that the ESP can be any of FAT12/16/32 but for +compatibility doesn't necssarily require the partition to be the +EFI partition table ID of 0xef. A number of arm devices will not +find their firmware on a FAT partition with an ID of 0xef so also +allow the original FAT12/16/32 partition IDs as they are also +permissable for an ESP. + +Signed-off-by: Peter Robinson +--- + disk/part_dos.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/disk/part_dos.c b/disk/part_dos.c +index 567ead7511d..303eb1d13ee 100644 +--- a/disk/part_dos.c ++++ b/disk/part_dos.c +@@ -40,6 +40,12 @@ static int get_bootable(dos_partition_t *p) + { + int ret = 0; + ++ if (p->sys_ind == 0x1) ++ ret |= PART_EFI_SYSTEM_PARTITION; ++ if (p->sys_ind == 0x6) ++ ret |= PART_EFI_SYSTEM_PARTITION; ++ if (p->sys_ind == 0x0b) ++ ret |= PART_EFI_SYSTEM_PARTITION; + if (p->sys_ind == 0xef) + ret |= PART_EFI_SYSTEM_PARTITION; + if (p->boot_ind == 0x80) +-- +2.43.1 From 7f2aed2f989431930d981e2498685661e611eb99 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 12 Mar 2024 00:18:30 +0000 Subject: [PATCH 251/351] 2024.04 RC4, upstream fixes --- sources | 2 +- uboot-tools.spec | 10 +- ...ll-options-for-EFI-System-Partitions.patch | 51 +++-- ..._location-for-finding-the-DT-on-disk.patch | 180 ++++++++++++++++++ 4 files changed, 224 insertions(+), 19 deletions(-) create mode 100644 uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch diff --git a/sources b/sources index be81335..0b96c52 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.04-rc3.tar.bz2) = 75f36d57330e771dd3757c49d576b3a7f1c933dad9a102f22d2438286a763f0ec7deae863a97559cac48be8fc736b68a5292b4383d45178b111bd08134352e38 +SHA512 (u-boot-2024.04-rc4.tar.bz2) = 4a546eb790d54c9aadd423888baa5c909249afeedfd71f85c8b424421c08463b0e65f3addfc2d00f4a38fb56d8051ed70c8368d49a89bd33ec69773474d4d62d diff --git a/uboot-tools.spec b/uboot-tools.spec index 4d006c4..de80725 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -22,7 +22,7 @@ Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch # Identify VFAT partitions as ESP, allows EFI setvar on our images Patch2: uefi-Add-all-options-for-EFI-System-Partitions.patch # New function to find fdt for loading from disk -#Patch3: +Patch3: uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch # Fedora patches to enable/disable features Patch4: disable-VBE-by-default.patch Patch5: enable-bootmenu-by-default.patch @@ -189,6 +189,10 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Mar 12 2024 Peter Robinson - 1:2024.04-0.4.rc4 +- Update to 2024.04 RC4 +- Initial fix for loading DT off /boot (rhbz 2247873) + * Thu Feb 29 2024 Peter Robinson - 1:2024.04-0.3.rc3 - Update to 2024.04 RC3 - Enable a number of new upstream devices diff --git a/uefi-Add-all-options-for-EFI-System-Partitions.patch b/uefi-Add-all-options-for-EFI-System-Partitions.patch index 22c5bcc..3bf1ec8 100644 --- a/uefi-Add-all-options-for-EFI-System-Partitions.patch +++ b/uefi-Add-all-options-for-EFI-System-Partitions.patch @@ -1,7 +1,7 @@ -From 7ce45304053f31afaea6b80305aaee164c2e260a Mon Sep 17 00:00:00 2001 +From 86782e882e9542f5f402e00cd87efb36ad0552d3 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 21 Feb 2024 14:43:16 +0000 -Subject: [PATCH] disk: dos: Add all options for EFI System Partitions +Date: Sat, 2 Mar 2024 11:17:42 +0000 +Subject: [PATCH v4] disk: dos: Add all options for EFI System Partitions The EFI spec states that the ESP can be any of FAT12/16/32 but for compatibility doesn't necssarily require the partition to be the @@ -12,25 +12,46 @@ permissable for an ESP. Signed-off-by: Peter Robinson --- - disk/part_dos.c | 6 ++++++ - 1 file changed, 6 insertions(+) + +v2: +- Add 0x0c option +- Make hex constants consistent +- Move from if to switch statement +v3: +- Fix switch brain fart +v4: +- Drop boot_ind out of switch + + disk/part_dos.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/disk/part_dos.c b/disk/part_dos.c -index 567ead7511d..303eb1d13ee 100644 +index 567ead7511d..a35181dff4f 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c -@@ -40,6 +40,12 @@ static int get_bootable(dos_partition_t *p) +@@ -40,10 +40,21 @@ static int get_bootable(dos_partition_t *p) { int ret = 0; -+ if (p->sys_ind == 0x1) -+ ret |= PART_EFI_SYSTEM_PARTITION; -+ if (p->sys_ind == 0x6) -+ ret |= PART_EFI_SYSTEM_PARTITION; -+ if (p->sys_ind == 0x0b) -+ ret |= PART_EFI_SYSTEM_PARTITION; - if (p->sys_ind == 0xef) +- if (p->sys_ind == 0xef) ++ switch (p->sys_ind) { ++ case 0x01: ++ case 0x06: ++ case 0x0b: ++ case 0x0c: ++ case 0xef: ret |= PART_EFI_SYSTEM_PARTITION; ++ break; ++ default: ++ break; ++ } ++ if (p->boot_ind == 0x80) + ret |= PART_BOOTABLE; ++ + return ret; + } + -- -2.43.1 +2.44.0 + diff --git a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch new file mode 100644 index 0000000..e1937f8 --- /dev/null +++ b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch @@ -0,0 +1,180 @@ +From 47bf70fe95dd3883c08af3478f29564476f0950e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 12 Mar 2024 00:05:23 +0000 +Subject: [PATCH] initial find_fdt_location for finding the DT on disk + +The old distro boot looked for a DT on the first boot partition +in the /dtb or /dtb/current directories, and Fedora extended this +to look not just on the boot partition but all the partitions on +that disk. + +The new ways of booting, both bootstd and bootefi bootmgr processes +don't properly look for those options. This provides a function +to search for the DTB on disk so that if the other DT mechanisms +don't work this will look for one on disk to provide a working DT +so that devices will continue to work as they did previously. + +Signed-off-by: Peter Robinson +--- + + cmd/bootefi.c | 1 + + cmd/bootmenu.c | 5 +++ + include/efi_loader.h | 2 + + lib/efi_loader/efi_helper.c | 82 ++++++++++++++++++++++++++++++++++++- + 4 files changed, 89 insertions(+), 1 deletion(-) + +diff --git a/cmd/bootefi.c b/cmd/bootefi.c +index 9cf9027bf40..8b6194a8702 100644 +--- a/cmd/bootefi.c ++++ b/cmd/bootefi.c +@@ -144,6 +144,7 @@ static int do_bootefi(struct cmd_tbl *cmdtp, int flag, int argc, + if (argc > 2) { + uintptr_t fdt_addr; + ++ /* Do we need to run find_fdt_location here?*/ + fdt_addr = hextoul(argv[2], NULL); + fdt = map_sysmem(fdt_addr, 0); + } else { +diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c +index 78184fccab2..48368c8d42e 100644 +--- a/cmd/bootmenu.c ++++ b/cmd/bootmenu.c +@@ -448,6 +448,11 @@ static void handle_uefi_bootnext(void) + u16 bootnext; + efi_status_t ret; + efi_uintn_t size; ++ const char *fdt_opt; ++ ++ /* Find the DTB on disk */ ++ log_debug("We will load the DTB\n"); ++ fdt_opt = find_fdt_location(); + + /* Initialize EFI drivers */ + ret = efi_init_obj_list(); +diff --git a/include/efi_loader.h b/include/efi_loader.h +index 7daca0afba2..a969378ff2f 100644 +--- a/include/efi_loader.h ++++ b/include/efi_loader.h +@@ -524,6 +524,8 @@ struct efi_register_notify_event { + struct list_head handles; + }; + ++/* Find the FDT on any partition */ ++char *find_fdt_location(void); + /* called at pre-initialization */ + int efi_init_early(void); + /* Initialize efi execution environment */ +diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c +index 5dd9cc876e4..59bdb2d030c 100644 +--- a/lib/efi_loader/efi_helper.c ++++ b/lib/efi_loader/efi_helper.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -24,6 +25,76 @@ + const efi_guid_t efi_lf2_initrd_guid = EFI_INITRD_MEDIA_GUID; + #endif + ++/* We need to pass a blk device in and return a location, or a loaded DT */ ++char *find_fdt_location(void) ++{ ++ const char *fdt_filename; ++ /* FIXME: dynamic size */ ++ char fdt_fullpath[60]; ++ const char *prefix; ++ struct udevice *blk; ++ /* FIXME: Fedora really only cares about first 2*/ ++ int MAX_PART = 8; ++ int part; ++ struct disk_partition info; ++ int ret; ++ int retfdt; ++ int retload; ++ loff_t fdtsize; ++ ulong pbraddr; ++ loff_t len_read; ++ ++ /* step one logic: we have the DT name we're hunting for */ ++ fdt_filename = env_get("fdtfile"); ++ if (fdt_filename) { ++ log_debug("FFL: We're looking for the DTB now!: %s\n", fdt_filename); ++ ++ /* probe all block disks to search for fdt */ ++ uclass_foreach_dev_probe(UCLASS_BLK, blk) { ++ log_debug("FFL: dev name: %s\n", blk->name); ++ struct blk_desc *desc; ++ desc = dev_get_uclass_plat(blk); ++ /* we should get a partition count here for looping */ ++ /* For loop for each partition */ ++ /* Need to also deal with zero part whole disk - part_get_info_whole_disk */ ++ for (part = 1; part <= MAX_PART; part++) { ++ log_debug("FFL: part num: %d\n", part); ++ ret = part_get_info(desc, part, &info); ++ /* if we have partition check it for DT */ ++ if (ret) { ++ log_debug("FFL: we have a partition\n"); ++ /* we should have a case/for prefix in =/ /dtb/ /dtb/current/ */ ++ /* but for now we hard code if for Fedora */ ++ prefix = "/dtb"; ++ snprintf(fdt_fullpath, sizeof(fdt_fullpath), "%s/%s", prefix, fdt_filename); ++ log_debug("FFL: full name: %s\n", fdt_fullpath); ++ /* search for DT on partition and either find and exit or continue */ ++ retfdt = fs_size(fdt_fullpath, &fdtsize); ++ if (retfdt) { ++ /* we have a fdt!*/ ++ log_debug("FFL: we have found a DT on disk\n"); ++ retload = fs_read(fdt_fullpath, pbraddr, 0, 0, &len_read); ++ if (retload) { ++ log_debug("FFL: we have a loaded DT, size %ld we can return\n", sizeof(len_read)); ++ log_info("Found DTB: %s\n", fdt_filename); ++ const char *fdt_opt; ++ fdt_opt = env_get("fdt_addr"); ++ return fdt_opt; ++ } ++ } ++ } else { ++ log_debug("FFL: no partition\n"); ++ } ++ } ++ } ++ } else { ++ log_debug("FFL: fdt_filename not defined!!\n"); ++ } ++ ++ /* We didn't find a FDT */ ++ return NULL; ++} ++ + /** + * efi_create_current_boot_var() - Return Boot#### name were #### is replaced by + * the value of BootCurrent +@@ -432,11 +503,20 @@ efi_status_t efi_install_fdt(void *fdt) + /* Look for device tree that is already installed */ + if (efi_get_configuration_table(&efi_guid_fdt)) + return EFI_SUCCESS; ++ /* Check if there is device tree loaded from disk */ ++ fdt_opt = find_fdt_location(); ++ if (fdt_opt) ++ log_debug("Found DTB: insert file name here\n"); + /* Check if there is a hardware device tree */ +- fdt_opt = env_get("fdt_addr"); ++ if (!fdt_opt) { ++ fdt_opt = env_get("fdt_addr"); ++ if (fdt_opt) ++ log_info("Found DTB: Prior firmware\n"); ++ } + /* Use our own device tree as fallback */ + if (!fdt_opt) { + fdt_opt = env_get("fdtcontroladdr"); ++ log_debug("Using DT from U-Boot\n"); + if (!fdt_opt) { + log_err("ERROR: need device tree\n"); + return EFI_NOT_FOUND; +-- +2.44.0 + From 59b16b49885d6fb573d55f741df8ad7330b36361 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 13 Mar 2024 19:18:40 +0000 Subject: [PATCH 252/351] Fixes for Rockchip rk3399 autoboot --- ...hip-Enable-preboot-start-for-pci-usb.patch | 166 ++++++++++++++++++ uboot-tools.spec | 8 +- 2 files changed, 172 insertions(+), 2 deletions(-) create mode 100644 rockchip-Enable-preboot-start-for-pci-usb.patch diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch new file mode 100644 index 0000000..408609e --- /dev/null +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -0,0 +1,166 @@ +From 367b3afc360e6fc92bd4cdca643ed2e4d928472d Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 13 Mar 2024 19:14:50 +0000 +Subject: [PATCH] rockchip: Enable preboot start for pci/usb + +Enable the preboot so nvme works OOTB + +Signed-off-by: Peter Robinson +--- + configs/firefly-rk3399_defconfig | 2 ++ + configs/nanopc-t4-rk3399_defconfig | 2 ++ + configs/pinebook-pro-rk3399_defconfig | 1 + + configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ + configs/rock-4c-plus-rk3399_defconfig | 2 ++ + configs/rock-4se-rk3399_defconfig | 2 ++ + configs/rock-pi-4-rk3399_defconfig | 2 ++ + configs/rock-pi-4c-rk3399_defconfig | 2 ++ + configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ + configs/rock960-rk3399_defconfig | 1 + + configs/rockpro64-rk3399_defconfig | 2 ++ + 11 files changed, 20 insertions(+) + +diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig +index b7c8e95b7b8..1e33083c138 100644 +--- a/configs/firefly-rk3399_defconfig ++++ b/configs/firefly-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_MISC_INIT_R=y +diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig +index c18e7b1bd16..e9a18eb3e9f 100644 +--- a/configs/nanopc-t4-rk3399_defconfig ++++ b/configs/nanopc-t4-rk3399_defconfig +@@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_MAX_SIZE=0x2e000 +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index de357415fbe..4168adb1935 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -24,6 +24,7 @@ CONFIG_PCI=y + CONFIG_DEBUG_UART=y + CONFIG_BOOTDELAY=3 + CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_MISC_INIT_R=y +diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig +index de6539bedf4..61c6182d27e 100644 +--- a/configs/roc-pc-mezzanine-rk3399_defconfig ++++ b/configs/roc-pc-mezzanine-rk3399_defconfig +@@ -23,6 +23,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y +diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig +index 18525c8bf50..89e9f69eb63 100644 +--- a/configs/rock-4c-plus-rk3399_defconfig ++++ b/configs/rock-4c-plus-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y +diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig +index 171de23ec8f..d2769a2f516 100644 +--- a/configs/rock-4se-rk3399_defconfig ++++ b/configs/rock-4se-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_LEGACY_IMAGE_FORMAT=y +diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig +index 83fc4ad7dab..24ca614fe5a 100644 +--- a/configs/rock-pi-4-rk3399_defconfig ++++ b/configs/rock-pi-4-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_LEGACY_IMAGE_FORMAT=y +diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig +index 089344097e0..83c2cfba157 100644 +--- a/configs/rock-pi-4c-rk3399_defconfig ++++ b/configs/rock-pi-4c-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y +diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig +index dc4b3b40380..db34bc70a22 100644 +--- a/configs/rock-pi-n10-rk3399pro_defconfig ++++ b/configs/rock-pi-n10-rk3399pro_defconfig +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" + # CONFIG_CONSOLE_MUX is not set +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index b93dda56593..6d1b352a855 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -17,6 +17,7 @@ CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y + CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" + CONFIG_SYS_PBSIZE=1052 + CONFIG_DISPLAY_BOARDINFO_LATE=y +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index 711541f8462..8c1ea1a0b63 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -21,6 +21,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_LEGACY_IMAGE_FORMAT=y + CONFIG_BOOTSTAGE=y +-- +2.44.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index de80725..adff3dd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -34,6 +34,7 @@ Patch6: Add-video-damage-tracking.patch Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +Patch12: rockchip-Enable-preboot-start-for-pci-usb.patch BuildRequires: bc BuildRequires: bison @@ -138,7 +139,7 @@ mkdir -p %{buildroot}%{_datadir}/uboot/ %ifarch aarch64 for board in $(ls builds) do - for file in u-boot.bin u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img idbloader-spi.img spl/boot.bin + for file in u-boot.bin u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip-spi.bin u-boot-rockchip.bin idbloader.img idbloader-spi.img spl/boot.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -pD -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/$(echo $file) @@ -189,6 +190,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Wed Mar 13 2024 Peter Robinson - 1:2024.04-0.5.rc4 +- Fixes for Rockchip rk3399 autoboot + * Tue Mar 12 2024 Peter Robinson - 1:2024.04-0.4.rc4 - Update to 2024.04 RC4 - Initial fix for loading DT off /boot (rhbz 2247873) From bda7eb94be4cdeb796a997f2ba3b3c071480485a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 15 Mar 2024 16:43:39 +0000 Subject: [PATCH 253/351] Updated fix for FDT load --- uboot-tools.spec | 5 ++++- ...fdt_location-for-finding-the-DT-on-disk.patch | 16 ++++++++-------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index adff3dd..fa7c75d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -190,6 +190,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Fri Mar 15 2024 Peter Robinson - 1:2024.04-0.6.rc4 +- Updated fix for FDT load + * Wed Mar 13 2024 Peter Robinson - 1:2024.04-0.5.rc4 - Fixes for Rockchip rk3399 autoboot diff --git a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch index e1937f8..2b425f1 100644 --- a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch +++ b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch @@ -1,6 +1,6 @@ -From 47bf70fe95dd3883c08af3478f29564476f0950e Mon Sep 17 00:00:00 2001 +From 751b1c4ec581f3546c49e4d59485306601fe6e2d Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Tue, 12 Mar 2024 00:05:23 +0000 +Date: Fri, 15 Mar 2024 16:42:23 +0000 Subject: [PATCH] initial find_fdt_location for finding the DT on disk The old distro boot looked for a DT on the first boot partition @@ -16,12 +16,11 @@ so that devices will continue to work as they did previously. Signed-off-by: Peter Robinson --- - cmd/bootefi.c | 1 + cmd/bootmenu.c | 5 +++ include/efi_loader.h | 2 + - lib/efi_loader/efi_helper.c | 82 ++++++++++++++++++++++++++++++++++++- - 4 files changed, 89 insertions(+), 1 deletion(-) + lib/efi_loader/efi_helper.c | 83 ++++++++++++++++++++++++++++++++++++- + 4 files changed, 90 insertions(+), 1 deletion(-) diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 9cf9027bf40..8b6194a8702 100644 @@ -65,7 +64,7 @@ index 7daca0afba2..a969378ff2f 100644 int efi_init_early(void); /* Initialize efi execution environment */ diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c -index 5dd9cc876e4..59bdb2d030c 100644 +index 5dd9cc876e4..8d51c9570b7 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c @@ -12,6 +12,7 @@ @@ -76,7 +75,7 @@ index 5dd9cc876e4..59bdb2d030c 100644 #include #include #include -@@ -24,6 +25,76 @@ +@@ -24,6 +25,77 @@ const efi_guid_t efi_lf2_initrd_guid = EFI_INITRD_MEDIA_GUID; #endif @@ -128,6 +127,7 @@ index 5dd9cc876e4..59bdb2d030c 100644 + if (retfdt) { + /* we have a fdt!*/ + log_debug("FFL: we have found a DT on disk\n"); ++ pbraddr = (ulong)(env_get("fdt_addr")); + retload = fs_read(fdt_fullpath, pbraddr, 0, 0, &len_read); + if (retload) { + log_debug("FFL: we have a loaded DT, size %ld we can return\n", sizeof(len_read)); @@ -153,7 +153,7 @@ index 5dd9cc876e4..59bdb2d030c 100644 /** * efi_create_current_boot_var() - Return Boot#### name were #### is replaced by * the value of BootCurrent -@@ -432,11 +503,20 @@ efi_status_t efi_install_fdt(void *fdt) +@@ -432,11 +504,20 @@ efi_status_t efi_install_fdt(void *fdt) /* Look for device tree that is already installed */ if (efi_get_configuration_table(&efi_guid_fdt)) return EFI_SUCCESS; From d91245dd1ce4d8e65efd11c44cafdae90c9e70a5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 21 Mar 2024 13:56:05 +0000 Subject: [PATCH 254/351] Updated patch for DTB loading --- uboot-tools.spec | 5 +- ..._location-for-finding-the-DT-on-disk.patch | 74 ++++++++++++------- 2 files changed, 52 insertions(+), 27 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index fa7c75d..d726634 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -190,6 +190,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Thu Mar 21 2024 Peter Robinson - 1:2024.04-0.7.rc4 +- Updated patch for DTB loading + * Fri Mar 15 2024 Peter Robinson - 1:2024.04-0.6.rc4 - Updated fix for FDT load diff --git a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch index 2b425f1..232e121 100644 --- a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch +++ b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch @@ -1,6 +1,6 @@ -From 751b1c4ec581f3546c49e4d59485306601fe6e2d Mon Sep 17 00:00:00 2001 +From 8abb44f89aefd25cda27c54c08b68b3a60bea7c3 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Fri, 15 Mar 2024 16:42:23 +0000 +Date: Thu, 21 Mar 2024 13:43:24 +0000 Subject: [PATCH] initial find_fdt_location for finding the DT on disk The old distro boot looked for a DT on the first boot partition @@ -16,11 +16,11 @@ so that devices will continue to work as they did previously. Signed-off-by: Peter Robinson --- - cmd/bootefi.c | 1 + - cmd/bootmenu.c | 5 +++ - include/efi_loader.h | 2 + - lib/efi_loader/efi_helper.c | 83 ++++++++++++++++++++++++++++++++++++- - 4 files changed, 90 insertions(+), 1 deletion(-) + cmd/bootefi.c | 1 + + cmd/bootmenu.c | 5 ++ + include/efi_loader.h | 2 + + lib/efi_loader/efi_helper.c | 105 +++++++++++++++++++++++++++++++++++- + 4 files changed, 112 insertions(+), 1 deletion(-) diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 9cf9027bf40..8b6194a8702 100644 @@ -64,7 +64,7 @@ index 7daca0afba2..a969378ff2f 100644 int efi_init_early(void); /* Initialize efi execution environment */ diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c -index 5dd9cc876e4..8d51c9570b7 100644 +index 5dd9cc876e4..a33ec39ff74 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c @@ -12,6 +12,7 @@ @@ -75,7 +75,7 @@ index 5dd9cc876e4..8d51c9570b7 100644 #include #include #include -@@ -24,6 +25,77 @@ +@@ -24,6 +25,99 @@ const efi_guid_t efi_lf2_initrd_guid = EFI_INITRD_MEDIA_GUID; #endif @@ -91,6 +91,7 @@ index 5dd9cc876e4..8d51c9570b7 100644 + int MAX_PART = 8; + int part; + struct disk_partition info; ++ int fdtext; + int ret; + int retfdt; + int retload; @@ -115,7 +116,9 @@ index 5dd9cc876e4..8d51c9570b7 100644 + log_debug("FFL: part num: %d\n", part); + ret = part_get_info(desc, part, &info); + /* if we have partition check it for DT */ -+ if (ret) { ++ if (ret < 0) { ++ log_debug("FFL: no partition\n"); ++ } else { + log_debug("FFL: we have a partition\n"); + /* we should have a case/for prefix in =/ /dtb/ /dtb/current/ */ + /* but for now we hard code if for Fedora */ @@ -123,22 +126,41 @@ index 5dd9cc876e4..8d51c9570b7 100644 + snprintf(fdt_fullpath, sizeof(fdt_fullpath), "%s/%s", prefix, fdt_filename); + log_debug("FFL: full name: %s\n", fdt_fullpath); + /* search for DT on partition and either find and exit or continue */ -+ retfdt = fs_size(fdt_fullpath, &fdtsize); -+ if (retfdt) { -+ /* we have a fdt!*/ -+ log_debug("FFL: we have found a DT on disk\n"); -+ pbraddr = (ulong)(env_get("fdt_addr")); -+ retload = fs_read(fdt_fullpath, pbraddr, 0, 0, &len_read); -+ if (retload) { -+ log_debug("FFL: we have a loaded DT, size %ld we can return\n", sizeof(len_read)); -+ log_info("Found DTB: %s\n", fdt_filename); -+ const char *fdt_opt; -+ fdt_opt = env_get("fdt_addr"); -+ return fdt_opt; ++ if (fs_set_blk_dev_with_part(desc, part) == 0){ ++ log_debug("FFL: set block part pass\n"); ++ fdtext = fs_exists(fdt_fullpath); ++ if (fdtext) { ++ /* we have a fdt!*/ ++ if (fs_set_blk_dev_with_part(desc, part) == 0){ ++ retfdt = fs_size(fdt_fullpath, &fdtsize); ++ if (retfdt == 0) { ++ log_debug("FFL: we have found a DT on disk, size %lld\n", fdtsize); ++ /* Get the main fdt and map it */ ++ const char *fdt_pbr; ++ fdt_pbr = env_get("fdt_addr_r"); ++ pbraddr = hextoul(fdt_pbr, NULL); ++ log_debug("FFL: fdr addr: %s\n", fdt_pbr); ++ if (fs_set_blk_dev_with_part(desc, part) == 0){ ++ retload = fs_read(fdt_fullpath, pbraddr, 0, fdtsize, &len_read); ++ if (retload == 0) { ++ log_debug("FFL: we have a loaded DT, size %lld we can return\n", fdtsize); ++ log_info("Found DTB: %s\n", fdt_filename); ++ return fdt_pbr; ++ } else { ++ log_debug("FFL: DT load failed\n"); ++ } ++ } ++ } else { ++ log_debug("FFL: we DON'T have a DT with size\n"); ++ } ++ } ++ } else { ++ /* we don't have a fdt!*/ ++ log_debug("FFL: we DON'T have a DT\n"); + } ++ } else { ++ log_debug("FFL: set block part FAIL\n"); + } -+ } else { -+ log_debug("FFL: no partition\n"); + } + } + } @@ -153,14 +175,14 @@ index 5dd9cc876e4..8d51c9570b7 100644 /** * efi_create_current_boot_var() - Return Boot#### name were #### is replaced by * the value of BootCurrent -@@ -432,11 +504,20 @@ efi_status_t efi_install_fdt(void *fdt) +@@ -432,11 +526,20 @@ efi_status_t efi_install_fdt(void *fdt) /* Look for device tree that is already installed */ if (efi_get_configuration_table(&efi_guid_fdt)) return EFI_SUCCESS; + /* Check if there is device tree loaded from disk */ + fdt_opt = find_fdt_location(); + if (fdt_opt) -+ log_debug("Found DTB: insert file name here\n"); ++ log_debug("Found DTB on disk\n"); /* Check if there is a hardware device tree */ - fdt_opt = env_get("fdt_addr"); + if (!fdt_opt) { From 2a31c9025b794a3101093aaa4a6911a834783bad Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Mar 2024 04:44:15 +0000 Subject: [PATCH 255/351] 2024.04 RC5 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 0b96c52..c146dd5 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.04-rc4.tar.bz2) = 4a546eb790d54c9aadd423888baa5c909249afeedfd71f85c8b424421c08463b0e65f3addfc2d00f4a38fb56d8051ed70c8368d49a89bd33ec69773474d4d62d +SHA512 (u-boot-2024.04-rc5.tar.bz2) = 1e985d9b9840b8ea9ed8f10f6e22d503ad87373b12c1a081c3d270f630d16a7881fd4ce072cbf08c20a2a038d458d6e161fa21494967d771d2494c378c7c2d6f diff --git a/uboot-tools.spec b/uboot-tools.spec index d726634..cd5dff5 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +%global candidate rc5 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -190,6 +190,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Wed Mar 27 2024 Peter Robinson - 1:2024.04-0.8.rc5 +- Update to 2024.04 RC5 + * Thu Mar 21 2024 Peter Robinson - 1:2024.04-0.7.rc4 - Updated patch for DTB loading From dcafedfd49902c2105accbf779ff7690fbcc19da Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 3 Apr 2024 05:55:01 +0100 Subject: [PATCH 256/351] 2024.04 GA, rk3328 USB fixes --- ...kchip-inno-usb2-Write-to-correct-GRF.patch | 572 +++++++++++++++ ...grate-to-use-DM_USB_GADGET-on-RK3328.patch | 691 ++++++++++++++++++ sources | 2 +- uboot-tools.spec | 10 +- 4 files changed, 1272 insertions(+), 3 deletions(-) create mode 100644 phy-rockchip-inno-usb2-Write-to-correct-GRF.patch create mode 100644 rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch diff --git a/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch b/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch new file mode 100644 index 0000000..b240ad6 --- /dev/null +++ b/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch @@ -0,0 +1,572 @@ +From patchwork Sun Feb 25 22:10:19 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jonas Karlman +X-Patchwork-Id: 1903989 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 + header.s=fe-e1b5cab7be header.b=yOZt1tiR; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4TjdHl4wttz23cw + for ; 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Sun, 25 Feb 2024 23:10:49 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=kwiboo.se +Authentication-Results: phobos.denx.de; spf=pass + smtp.mailfrom=SRS0=31c0=KD=kwiboo.se=jonas@fe-bounces.kwiboo.se +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; + h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: + Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; + t=1708899036; bh=AzFTi2bcYYAtXfClfRKD6v/Yh+iTeLs39b0UoXgmBwI=; + b=yOZt1tiRwOXYRO3mwXmOiJo897JN79a+B1jEzPSXrDGT/XlOaEYuhCBCO4IIUTSOg1irZCZD0 + XierFKG1DECIT3JlIXV16mU6P9Dsg/amgtgJp8QQmuACEJ6JERBNINdt0i7+i0oUF0bmiYupJ+U + VY5LPHhscKquVc3LCEo/DcIMMX+gh3zOF15G4QPE6ldeQbs/Ys4bqYQ/cMe+X4ijANkou6hqNSw + VY/TylYiKqrMyUW8SKJ6oXRxluNhrYpWWde3hoCc0zjTEWW9dGzSbxX8NLmmhqTT0uGKH6/RrB0 + nNeuIgaMGTk7jCCUtbi4Vp99P9HYFnlfmTRXoVLEofxw== +From: Jonas Karlman +To: Kever Yang , Simon Glass , + Philipp Tomsich , Tom Rini , + Ren Jianing , Manoj Sai + , Jagan Teki + , Eugen Hristev , + Frank Wang , Xavier Drudis Ferran + +Cc: u-boot@lists.denx.de, Jonas Karlman +Subject: [PATCH 1/2] phy: rockchip-inno-usb2: Write to correct GRF +Date: Sun, 25 Feb 2024 22:10:19 +0000 +Message-ID: <20240225221024.1974853-2-jonas@kwiboo.se> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20240225221024.1974853-1-jonas@kwiboo.se> +References: <20240225221024.1974853-1-jonas@kwiboo.se> +MIME-Version: 1.0 +X-Report-Abuse-To: abuse@forwardemail.net +X-Report-Abuse: abuse@forwardemail.net +X-Complaints-To: abuse@forwardemail.net +X-ForwardEmail-Version: 0.4.40 +X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, + 149.28.215.223 +X-ForwardEmail-ID: 65dbbada46c899733a83b3ec +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +On RK3399 the USB2PHY regs are located in the common GRF, remaining SoCs +that is supported by this driver have the USB2PHY regs in a different +GRF. + +When support for RK356x, RK3588 and RK3328 was added this driver was +never updated to use correct GRF and have instead incorrectly written +to wrong GRF for these SoCs. + +The default reset values for the USB2PHY have made USB mostly working +even when wrong GRF was used, however, following have been observed: + + scanning bus usb@fd840000 for devices... + ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did + not provide a handshake (OUT) (5) + ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did + not provide a handshake (OUT) (5) + unable to get device descriptor (error=-1) + +Fix this by using a regmap from rockchip,usbgrf prop and fall back to +getting a regmap for parent udevice instead of always getting the +common GRF. + +Also protect against accidental clear of bit 0 in a reg with offset 0, +only bind driver to enabled otg/host-ports and remove unused headers. + +Fixes: 3da15f0b49a2 ("phy: rockchip-inno-usb2: Add USB2 PHY for rk3568") +Fixes: cdf9010f6e17 ("phy: rockchip-inno-usb2: add initial support for rk3588 PHY") +Fixes: 9aa93d84038b ("phy: rockchip-inno-usb2: Add USB2 PHY for RK3328") +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +--- + drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 41 ++++++++++--------- + 1 file changed, 22 insertions(+), 19 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +index 70e61eccb79a..7317128d135e 100644 +--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c ++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +@@ -6,23 +6,16 @@ + * Copyright (C) 2020 Amarula Solutions(India) + */ + +-#include + #include + #include +-#include + #include + #include + #include + #include +-#include ++#include + #include +-#include +-#include +-#include + #include + +-DECLARE_GLOBAL_DATA_PTR; +- + #define usleep_range(a, b) udelay((b)) + #define BIT_WRITEABLE_SHIFT 16 + +@@ -61,30 +54,39 @@ struct rockchip_usb2phy_cfg { + }; + + struct rockchip_usb2phy { +- void *reg_base; ++ struct regmap *reg_base; + struct clk phyclk; + const struct rockchip_usb2phy_cfg *phy_cfg; + }; + +-static inline int property_enable(void *reg_base, ++static inline int property_enable(struct regmap *base, + const struct usb2phy_reg *reg, bool en) + { + unsigned int val, mask, tmp; + ++ if (!reg->offset && !reg->enable && !reg->disable) ++ return 0; ++ + tmp = en ? reg->enable : reg->disable; + mask = GENMASK(reg->bitend, reg->bitstart); + val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); + +- return writel(val, reg_base + reg->offset); ++ return regmap_write(base, reg->offset, val); + } + +-static inline bool property_enabled(void *reg_base, ++static inline bool property_enabled(struct regmap *base, + const struct usb2phy_reg *reg) + { ++ int ret; + unsigned int tmp, orig; + unsigned int mask = GENMASK(reg->bitend, reg->bitstart); + +- orig = readl(reg_base + reg->offset); ++ if (!reg->offset && !reg->enable && !reg->disable) ++ return false; ++ ++ ret = regmap_read(base, reg->offset, &orig); ++ if (ret) ++ return false; + + tmp = (orig & mask) >> reg->bitstart; + return tmp != reg->disable; +@@ -248,7 +250,11 @@ static int rockchip_usb2phy_probe(struct udevice *dev) + unsigned int reg; + int index, ret; + +- priv->reg_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); ++ if (dev_read_bool(dev, "rockchip,usbgrf")) ++ priv->reg_base = ++ syscon_regmap_lookup_by_phandle(dev, "rockchip,usbgrf"); ++ else ++ priv->reg_base = syscon_get_regmap(dev_get_parent(dev)); + if (IS_ERR(priv->reg_base)) + return PTR_ERR(priv->reg_base); + +@@ -305,11 +311,8 @@ static int rockchip_usb2phy_bind(struct udevice *dev) + int ret = 0; + + dev_for_each_subnode(node, dev) { +- if (!ofnode_valid(node)) { +- dev_info(dev, "subnode %s not found\n", dev->name); +- ret = -ENXIO; +- goto bind_fail; +- } ++ if (!ofnode_is_enabled(node)) ++ continue; + + name = ofnode_get_name(node); + dev_dbg(dev, "subnode %s\n", name); + +From patchwork Sun Feb 25 22:10:20 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jonas Karlman +X-Patchwork-Id: 1903988 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 + header.s=fe-e1b5cab7be header.b=Bv1sBawV; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4TjdHW2kk5z23cw + for ; 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Sun, 25 Feb 2024 23:10:48 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=kwiboo.se +Authentication-Results: phobos.denx.de; spf=pass + smtp.mailfrom=SRS0=31c0=KD=kwiboo.se=jonas@fe-bounces.kwiboo.se +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; + h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: + Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; + t=1708899040; bh=DyusC9ORAR+XZuJiPJ/3cQGjPsGAIRRpa763lcRm9QI=; + b=Bv1sBawVhXXIyoD7RTT7PpAz6+xCx17DjVExzdjGWsgUube7Xho69mue9hWqeTSU0bCFYYtv7 + HD7t7qbOmnYD+L0UVg+SHdibpC38eSbz+ucYsZrMhZL1IiRJNWWlFyb0IZacRz+AeagLdc75goJ + qTiFcN9xKXoHBJKpyqXiwsuJJMOXWwg9aOhGc9HZ91jwYEXSai2WfZYxtzx23bl5U4pDvpDuJd9 + ijrjK7DdsrJyRm4ALrkvjlr2/gZguEXEzOiHrFbbIZn+QIZjKhbbSdTQOScvPdvnFFKG8F3wZsX + rdxXOykD/CZU8ni3ZAYh20CBo6kwKIBdthaDsbYR18nw== +From: Jonas Karlman +To: Kever Yang , Simon Glass , + Philipp Tomsich , Tom Rini +Cc: u-boot@lists.denx.de, Jonas Karlman +Subject: [PATCH 2/2] phy: rockchip-inno-usb2: Limit changes made to regs +Date: Sun, 25 Feb 2024 22:10:20 +0000 +Message-ID: <20240225221024.1974853-3-jonas@kwiboo.se> +X-Mailer: git-send-email 2.43.0 +In-Reply-To: <20240225221024.1974853-1-jonas@kwiboo.se> +References: <20240225221024.1974853-1-jonas@kwiboo.se> +MIME-Version: 1.0 +X-Report-Abuse-To: abuse@forwardemail.net +X-Report-Abuse: abuse@forwardemail.net +X-Complaints-To: abuse@forwardemail.net +X-ForwardEmail-Version: 0.4.40 +X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, + 149.28.215.223 +X-ForwardEmail-ID: 65dbbade46c899733a83b3fe +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +The USB2PHY regs already contain working default reset values for RK3328 +and RK35xx as evidenced by the fact that this driver never has changed a +single value for these SoCs. + +Reduce to only configure utmi_suspend_n and utmi_sel bits similar to +what is currently done on RK3399. Also add missing clkout_ctl for RK3588. + +When enabled utmi_suspend_n is changed to normal mode and utmi_sel to +use otg/host controller utmi interface to phy. When disabled +utmi_suspend_n is changed to suspend mode and utmi_sel to use GRF utmi +interface to phy. + +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +--- + drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 117 +++--------------- + 1 file changed, 14 insertions(+), 103 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +index 7317128d135e..d392aed2d4de 100644 +--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c ++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +@@ -35,16 +35,6 @@ struct usb2phy_reg { + + struct rockchip_usb2phy_port_cfg { + struct usb2phy_reg phy_sus; +- struct usb2phy_reg bvalid_det_en; +- struct usb2phy_reg bvalid_det_st; +- struct usb2phy_reg bvalid_det_clr; +- struct usb2phy_reg ls_det_en; +- struct usb2phy_reg ls_det_st; +- struct usb2phy_reg ls_det_clr; +- struct usb2phy_reg utmi_avalid; +- struct usb2phy_reg utmi_bvalid; +- struct usb2phy_reg utmi_ls; +- struct usb2phy_reg utmi_hstdet; + }; + + struct rockchip_usb2phy_cfg { +@@ -131,7 +121,6 @@ static int rockchip_usb2phy_init(struct phy *phy) + { + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); +- const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + int ret; + + ret = clk_enable(&priv->phyclk); +@@ -140,14 +129,6 @@ static int rockchip_usb2phy_init(struct phy *phy) + return ret; + } + +- if (phy->id == USB2PHY_PORT_OTG) { +- property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); +- property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); +- } else if (phy->id == USB2PHY_PORT_HOST) { +- property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); +- property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); +- } +- + return 0; + } + +@@ -351,27 +332,13 @@ bind_fail: + static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { + { + .reg = 0x100, +- .clkout_ctl = { 0x108, 4, 4, 1, 0 }, ++ .clkout_ctl = { 0x0108, 4, 4, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { +- .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 }, +- .bvalid_det_en = { 0x0110, 3, 2, 0, 3 }, +- .bvalid_det_st = { 0x0114, 3, 2, 0, 3 }, +- .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 }, +- .ls_det_en = { 0x0110, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0114, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0118, 0, 0, 0, 1 }, +- .utmi_avalid = { 0x0120, 10, 10, 0, 1 }, +- .utmi_bvalid = { 0x0120, 9, 9, 0, 1 }, +- .utmi_ls = { 0x0120, 5, 4, 0, 1 }, ++ .phy_sus = { 0x0100, 1, 0, 2, 1 }, + }, + [USB2PHY_PORT_HOST] = { +- .phy_sus = { 0x104, 15, 0, 0, 0x1d1 }, +- .ls_det_en = { 0x110, 1, 1, 0, 1 }, +- .ls_det_st = { 0x114, 1, 1, 0, 1 }, +- .ls_det_clr = { 0x118, 1, 1, 0, 1 }, +- .utmi_ls = { 0x120, 17, 16, 0, 1 }, +- .utmi_hstdet = { 0x120, 19, 19, 0, 1 } ++ .phy_sus = { 0x0104, 1, 0, 2, 1 }, + } + }, + }, +@@ -385,19 +352,9 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0xe454, 1, 0, 2, 1 }, +- .bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 }, +- .bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 }, +- .bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 }, +- .utmi_avalid = { 0xe2ac, 7, 7, 0, 1 }, +- .utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { +- .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 }, +- .ls_det_en = { 0xe3c0, 6, 6, 0, 1 }, +- .ls_det_st = { 0xe3e0, 6, 6, 0, 1 }, +- .ls_det_clr = { 0xe3d0, 6, 6, 0, 1 }, +- .utmi_ls = { 0xe2ac, 22, 21, 0, 1 }, +- .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 } ++ .phy_sus = { 0xe458, 1, 0, 2, 1 }, + } + }, + }, +@@ -407,19 +364,9 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0xe464, 1, 0, 2, 1 }, +- .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 }, +- .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 }, +- .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 }, +- .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 }, +- .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { +- .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 }, +- .ls_det_en = { 0xe3c0, 11, 11, 0, 1 }, +- .ls_det_st = { 0xe3e0, 11, 11, 0, 1 }, +- .ls_det_clr = { 0xe3d0, 11, 11, 0, 1 }, +- .utmi_ls = { 0xe2ac, 26, 25, 0, 1 }, +- .utmi_hstdet = { 0xe2ac, 27, 27, 0, 1 } ++ .phy_sus = { 0xe468, 1, 0, 2, 1 }, + } + }, + }, +@@ -432,24 +379,10 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { + .clkout_ctl = { 0x0008, 4, 4, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { +- .phy_sus = { 0x0000, 8, 0, 0x052, 0x1d1 }, +- .bvalid_det_en = { 0x0080, 2, 2, 0, 1 }, +- .bvalid_det_st = { 0x0084, 2, 2, 0, 1 }, +- .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_avalid = { 0x00c0, 10, 10, 0, 1 }, +- .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 }, +- .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, ++ .phy_sus = { 0x0000, 1, 0, 2, 1 }, + }, + [USB2PHY_PORT_HOST] = { +- .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, +- .ls_det_en = { 0x0080, 1, 1, 0, 1 }, +- .ls_det_st = { 0x0084, 1, 1, 0, 1 }, +- .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, +- .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, +- .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } ++ .phy_sus = { 0x0004, 1, 0, 2, 1 }, + } + }, + }, +@@ -458,20 +391,10 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { + .clkout_ctl = { 0x0008, 4, 4, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { +- .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, +- .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 } ++ .phy_sus = { 0x0000, 1, 0, 2, 1 }, + }, + [USB2PHY_PORT_HOST] = { +- .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, +- .ls_det_en = { 0x0080, 1, 1, 0, 1 }, +- .ls_det_st = { 0x0084, 1, 1, 0, 1 }, +- .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, +- .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, +- .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } ++ .phy_sus = { 0x0004, 1, 0, 2, 1 }, + } + }, + }, +@@ -481,49 +404,37 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { + static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { + { + .reg = 0x0000, ++ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x000c, 11, 11, 0, 1 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, + } + }, + }, + { + .reg = 0x4000, ++ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { +- .phy_sus = { 0x000c, 11, 11, 0, 0 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, ++ .phy_sus = { 0x000c, 11, 11, 0, 1 }, + } + }, + }, + { + .reg = 0x8000, ++ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0008, 2, 2, 0, 1 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, + } + }, + }, + { + .reg = 0xc000, ++ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0008, 2, 2, 0, 1 }, +- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, +- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, +- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, +- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, + } + }, + }, diff --git a/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch b/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch new file mode 100644 index 0000000..e2b54b4 --- /dev/null +++ b/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch @@ -0,0 +1,691 @@ +From 0149cf303734fad55f1d733628f76a6994d1436d Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 10 Mar 2024 18:50:57 +0000 +Subject: [PATCH 1/4] rockchip: Update the default USB Product ID value + +RK3036 is using the USB product id normally used by RK3066B, and RK3328 +is using the product id normally used by RK3368. + +Fix this and update the default USB_GADGET_PRODUCT_NUM Kconfig option +for remaining supported Rockchip SoCs to match the product id used in +Maskrom mode. + +Also remove a reference to an undefined ROCKCHIP_RK3229 Kconfig symbol. + +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +--- + drivers/usb/gadget/Kconfig | 15 ++++++++++++--- + 1 file changed, 12 insertions(+), 3 deletions(-) + +diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig +index c72a8047635..4621a6fd5e6 100644 +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -70,12 +70,21 @@ config USB_GADGET_PRODUCT_NUM + hex "Product ID of the USB device" + default 0x701a if ARCH_TEGRA + default 0x1010 if ARCH_SUNXI +- default 0x310a if ROCKCHIP_RK3036 ++ default 0x110a if ROCKCHIP_RV1108 ++ default 0x110b if ROCKCHIP_RV1126 + default 0x300a if ROCKCHIP_RK3066 ++ default 0x301a if ROCKCHIP_RK3036 ++ default 0x310b if ROCKCHIP_RK3188 + default 0x310c if ROCKCHIP_RK3128 +- default 0x320a if ROCKCHIP_RK3229 || ROCKCHIP_RK3288 +- default 0x330a if ROCKCHIP_RK3328 ++ default 0x320a if ROCKCHIP_RK3288 ++ default 0x320b if ROCKCHIP_RK322X ++ default 0x320c if ROCKCHIP_RK3328 ++ default 0x330a if ROCKCHIP_RK3368 + default 0x330c if ROCKCHIP_RK3399 ++ default 0x330d if ROCKCHIP_PX30 ++ default 0x330e if ROCKCHIP_RK3308 ++ default 0x350a if ROCKCHIP_RK3568 ++ default 0x350b if ROCKCHIP_RK3588 + default 0x0 + help + Product ID of the USB device emulated, reported to the host device. +-- +2.44.0 + +From 3b4d52ef627bb3899c331ff24fe31cec5f445069 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 10 Mar 2024 18:50:58 +0000 +Subject: [PATCH 2/4] rockchip: board: Prepare for use of DM_USB_GADGET with + DWC2_OTG + +The board_usb_init() and board_usb_cleanup() functions is always +included when USB_GADGET and USB_GADGET_DWC2_OTG is enabled. + +Prepare for a change to use DM_USB_GADGET with DWC2_OTG by adding an +extra ifdef condition. The extra separate ifdef for USB_GADGET prepare +for next patch that adds a g_dnl_bind_fixup() function. + +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +--- + arch/arm/mach-rockchip/board.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c +index 2620530e03f..2ec670dde69 100644 +--- a/arch/arm/mach-rockchip/board.c ++++ b/arch/arm/mach-rockchip/board.c +@@ -205,7 +205,8 @@ void enable_caches(void) + } + #endif + +-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) ++#if IS_ENABLED(CONFIG_USB_GADGET) ++#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) + #include + #include + #include +@@ -281,6 +282,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) + return 0; + } + #endif /* CONFIG_USB_GADGET_DWC2_OTG */ ++#endif /* CONFIG_USB_GADGET */ + + #if IS_ENABLED(CONFIG_FASTBOOT) + int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) +-- +2.44.0 + +From 201da409a8c879482a00867010b772327aba6a51 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 10 Mar 2024 18:50:59 +0000 +Subject: [PATCH 3/4] rockchip: board: Use a common USB Product ID for UMS + +Change to use the common Product ID 0x0010 when the ums command is used. + +This matches downstream vendor U-Boot and is a Product ID that tools +such as rkdeveloptool and RKDevTool will identify as MSC mode. + +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +--- + arch/arm/mach-rockchip/board.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c +index 2ec670dde69..2db746b27fb 100644 +--- a/arch/arm/mach-rockchip/board.c ++++ b/arch/arm/mach-rockchip/board.c +@@ -206,8 +206,23 @@ void enable_caches(void) + #endif + + #if IS_ENABLED(CONFIG_USB_GADGET) +-#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) + #include ++ ++#if IS_ENABLED(CONFIG_USB_GADGET_DOWNLOAD) ++#define ROCKCHIP_G_DNL_UMS_PRODUCT_NUM 0x0010 ++ ++int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) ++{ ++ if (!strcmp(name, "usb_dnl_ums")) ++ put_unaligned(ROCKCHIP_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct); ++ else ++ put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct); ++ ++ return 0; ++} ++#endif /* CONFIG_USB_GADGET_DOWNLOAD */ ++ ++#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) + #include + #include + +-- +2.44.0 + +From 2cb2428ae571956dfafb2eeed8b54857b12e17d0 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 3 Apr 2024 05:29:20 +0100 +Subject: [PATCH 4/4] rockchip: Migrate to use DM_USB_GADGET on RK3328 + +USB gadget is not working fully as expected on RK3328, it uses a +board_usb_init() function to initialize the DWC2 OTG port. + +The board_usb_init() function does not intgrate with the generic phy +framework and as a result the USB phy is not properly configured before +or after USB gadget use. + +Having both USB_DWC2 and DWC2_OTG enabled for the same board is also +causing some issues. + +Trying to use rockusb or ums command after usb stop result in a freeze +due to usb stop is putting the phy in a suspended state. + + => usb start + => usb stop + => ums 0 mmc 0 + --> freeze due to usb phy is suspended <-- + +Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral) +depending on the most likely usage of the otg port and by migrating to +use DM_USB_GADGET instead of a board_usb_init() function. + +The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a +Type-C connector, mark these boards dr_mode as peripheral, the most +likely usage is for recovery and image download. + +The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG +driver from these boards to ensure that the USB_DWC2 driver is used. + +The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2 +and DWC2_OTG is removed from this board. + +Enable RockUSB and UMS on all boards with a otg port in peripheral mode. + +Also with the migration to DM_USB_GADGET completed the U-Boot specific +change to reorder usb nodes in the soc device tree can be reverted. + +Signed-off-by: Jonas Karlman +Reviewed-by: Kever Yang +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 4 ++ + .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 4 ++ + .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 4 ++ + arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 ++ + arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 9 ++++ + arch/arm/dts/rk3328-rock64-u-boot.dtsi | 4 ++ + arch/arm/dts/rk3328-u-boot.dtsi | 4 -- + arch/arm/dts/rk3328.dtsi | 41 ++++++++----------- + configs/evb-rk3328_defconfig | 7 +++- + configs/nanopi-r2c-plus-rk3328_defconfig | 7 +++- + configs/nanopi-r2c-rk3328_defconfig | 7 +++- + configs/nanopi-r2s-rk3328_defconfig | 7 +++- + configs/orangepi-r1-plus-lts-rk3328_defconfig | 7 +++- + configs/orangepi-r1-plus-rk3328_defconfig | 7 +++- + configs/roc-cc-rk3328_defconfig | 7 ---- + configs/rock-pi-e-rk3328_defconfig | 7 ---- + configs/rock64-rk3328_defconfig | 6 --- + 17 files changed, 75 insertions(+), 61 deletions(-) + +diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +index 78d37ab4755..3a16f86c18a 100644 +--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +@@ -28,6 +28,10 @@ + bootph-pre-ram; + }; + ++&usb20_otg { ++ dr_mode = "peripheral"; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +index ebe33e48cb9..2247daebc13 100644 +--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +@@ -28,6 +28,10 @@ + bootph-pre-ram; + }; + ++&usb20_otg { ++ dr_mode = "peripheral"; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +index 637c70adf19..79942a49a29 100644 +--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +@@ -28,6 +28,10 @@ + bootph-pre-ram; + }; + ++&usb20_otg { ++ dr_mode = "peripheral"; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +index 2062f34bf82..1aeb0083631 100644 +--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +@@ -48,6 +48,10 @@ + bootph-pre-ram; + }; + ++&usb20_otg { ++ hnp-srp-disable; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +index 1f220c6dcd0..c2371fb1688 100644 +--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +@@ -45,6 +45,15 @@ + bootph-pre-ram; + }; + ++&u2phy_host { ++ phy-supply = <&vcc_host_5v>; ++}; ++ ++&vcc_host_5v { ++ /delete-property/ regulator-always-on; ++ /delete-property/ regulator-boot-on; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +index 6904515b969..1e4649ae120 100644 +--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +@@ -48,6 +48,10 @@ + bootph-pre-ram; + }; + ++&usb20_otg { ++ hnp-srp-disable; ++}; ++ + /* Need this and all the pinctrl/gpio stuff above to set pinmux */ + &vcc_sd { + bootph-pre-ram; +diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi +index a9f2536de2a..b5da4518ec9 100644 +--- a/arch/arm/dts/rk3328-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-u-boot.dtsi +@@ -61,10 +61,6 @@ + u-boot,spl-fifo-mode; + }; + +-&usb20_otg { +- hnp-srp-disable; +-}; +- + &spi0 { + bootph-all; + }; +diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi +index e8d8f00be8a..8c821acb21f 100644 +--- a/arch/arm/dts/rk3328.dtsi ++++ b/arch/arm/dts/rk3328.dtsi +@@ -944,6 +944,22 @@ + }; + }; + ++ usb20_otg: usb@ff580000 { ++ compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", ++ "snps,dwc2"; ++ reg = <0x0 0xff580000 0x0 0x40000>; ++ interrupts = ; ++ clocks = <&cru HCLK_OTG>; ++ clock-names = "otg"; ++ dr_mode = "otg"; ++ g-np-tx-fifo-size = <16>; ++ g-rx-fifo-size = <280>; ++ g-tx-fifo-size = <256 128 128 64 32 16>; ++ phys = <&u2phy_otg>; ++ phy-names = "usb2-phy"; ++ status = "disabled"; ++ }; ++ + usb_host0_ehci: usb@ff5c0000 { + compatible = "generic-ehci"; + reg = <0x0 0xff5c0000 0x0 0x10000>; +@@ -983,31 +999,6 @@ + status = "disabled"; + }; + +- /* +- * U-Boot Specific Change +- * +- * The OTG controller must come after the USB host pair for it +- * to work. This is likely due to lack of support for the USB +- * PHYs. This must be manually changed after each device tree +- * sync. There is no clean way to handle this in -u-boot.dtsi +- * files. +- */ +- usb20_otg: usb@ff580000 { +- compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", +- "snps,dwc2"; +- reg = <0x0 0xff580000 0x0 0x40000>; +- interrupts = ; +- clocks = <&cru HCLK_OTG>; +- clock-names = "otg"; +- dr_mode = "otg"; +- g-np-tx-fifo-size = <16>; +- g-rx-fifo-size = <280>; +- g-tx-fifo-size = <256 128 128 64 32 16>; +- phys = <&u2phy_otg>; +- phy-names = "usb2-phy"; +- status = "disabled"; +- }; +- + gic: interrupt-controller@ff811000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; +diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig +index b9c541a92a1..ed2e2b7aa6f 100644 +--- a/configs/evb-rk3328_defconfig ++++ b/configs/evb-rk3328_defconfig +@@ -46,6 +46,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -93,17 +95,18 @@ CONFIG_SYS_NS16550_MEM32=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig +index 320ed8b434a..015bcfef369 100644 +--- a/configs/nanopi-r2c-plus-rk3328_defconfig ++++ b/configs/nanopi-r2c-plus-rk3328_defconfig +@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig +index 583179d7c54..5742567a3d4 100644 +--- a/configs/nanopi-r2c-rk3328_defconfig ++++ b/configs/nanopi-r2c-rk3328_defconfig +@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig +index f7ed71e4122..180a76e0eeb 100644 +--- a/configs/nanopi-r2s-rk3328_defconfig ++++ b/configs/nanopi-r2s-rk3328_defconfig +@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig +index d3d9417509e..a1a96bf2f28 100644 +--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig ++++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig +@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -99,17 +101,18 @@ CONFIG_SYSINFO=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig +index 9356e87132e..04273a0491c 100644 +--- a/configs/orangepi-r1-plus-rk3328_defconfig ++++ b/configs/orangepi-r1-plus-rk3328_defconfig +@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -99,17 +101,18 @@ CONFIG_SYSINFO=y + CONFIG_SYSRESET=y + # CONFIG_TPL_SYSRESET is not set + CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y + # CONFIG_USB_DWC3_GADGET is not set +-CONFIG_USB_DWC3_GENERIC=y + CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig +index 4ac3c9403b0..0e4edcc999d 100644 +--- a/configs/roc-cc-rk3328_defconfig ++++ b/configs/roc-cc-rk3328_defconfig +@@ -23,7 +23,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_DEBUG_UART=y +-# CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_LOAD_FIT=y +@@ -48,7 +47,6 @@ CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y +-CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TIME=y + CONFIG_SPL_OF_CONTROL=y +@@ -68,8 +66,6 @@ CONFIG_SPL_SYSCON=y + CONFIG_TPL_SYSCON=y + CONFIG_CLK=y + CONFIG_SPL_CLK=y +-CONFIG_FASTBOOT_BUF_ADDR=0x800800 +-CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y +@@ -110,10 +106,7 @@ CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y +-# CONFIG_USB_DWC3_GADGET is not set + CONFIG_USB_DWC3_GENERIC=y +-CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig +index 6dda900a9b4..6a4284120d2 100644 +--- a/configs/rock-pi-e-rk3328_defconfig ++++ b/configs/rock-pi-e-rk3328_defconfig +@@ -24,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_DEBUG_UART=y +-# CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_LOAD_FIT=y +@@ -69,8 +68,6 @@ CONFIG_SPL_SYSCON=y + CONFIG_TPL_SYSCON=y + CONFIG_CLK=y + CONFIG_SPL_CLK=y +-CONFIG_FASTBOOT_BUF_ADDR=0x800800 +-CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y +@@ -109,12 +106,8 @@ CONFIG_USB_EHCI_HCD=y + CONFIG_USB_EHCI_GENERIC=y + CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y +-CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y +-# CONFIG_USB_DWC3_GADGET is not set + CONFIG_USB_DWC3_GENERIC=y +-CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig +index 0297d098761..fd42059565a 100644 +--- a/configs/rock64-rk3328_defconfig ++++ b/configs/rock64-rk3328_defconfig +@@ -23,7 +23,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_DEBUG_UART=y +-# CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_LOAD_FIT=y +@@ -67,8 +66,6 @@ CONFIG_SPL_SYSCON=y + CONFIG_TPL_SYSCON=y + CONFIG_CLK=y + CONFIG_SPL_CLK=y +-CONFIG_FASTBOOT_BUF_ADDR=0x800800 +-CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y +@@ -111,10 +108,7 @@ CONFIG_USB_OHCI_HCD=y + CONFIG_USB_OHCI_GENERIC=y + CONFIG_USB_DWC2=y + CONFIG_USB_DWC3=y +-# CONFIG_USB_DWC3_GADGET is not set + CONFIG_USB_DWC3_GENERIC=y +-CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_SPL_TINY_MEMSET=y + CONFIG_TPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +-- +2.44.0 + diff --git a/sources b/sources index c146dd5..6013800 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.04-rc5.tar.bz2) = 1e985d9b9840b8ea9ed8f10f6e22d503ad87373b12c1a081c3d270f630d16a7881fd4ce072cbf08c20a2a038d458d6e161fa21494967d771d2494c378c7c2d6f +SHA512 (u-boot-2024.04.tar.bz2) = a71270302b38e9e68a83b3acdf8f7635f72d9fa75169e3c2241cdfa21eab834b8f25dfd35c281191bccb2fcec1e86d6b64afcf1d2ed5cd4fdc02258cd75fc236 diff --git a/uboot-tools.spec b/uboot-tools.spec index cd5dff5..aefeb8b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc5 +#global candidate rc5 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.04 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -35,6 +35,8 @@ Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch Patch12: rockchip-Enable-preboot-start-for-pci-usb.patch +Patch13: phy-rockchip-inno-usb2-Write-to-correct-GRF.patch +Patch14: rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch BuildRequires: bc BuildRequires: bison @@ -190,6 +192,10 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Wed Apr 03 2024 Peter Robinson - 1:2024.04-1 +- Update to 2024.04 GA +- Rockchip rk3328 USB fixes + * Wed Mar 27 2024 Peter Robinson - 1:2024.04-0.8.rc5 - Update to 2024.04 RC5 From 69c93ea5d0cd3de940cd335514d81eb4f0717cf0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 25 May 2024 12:30:42 +0100 Subject: [PATCH 257/351] Update to 2024.07-rc3 --- Add-video-damage-tracking.patch | 248 +++---- aarch64-boards | 2 +- ...kchip-inno-usb2-Write-to-correct-GRF.patch | 572 --------------- ...nitial-support-for-the-PinePhone-Pro.patch | 236 ------ ...hip-Enable-preboot-start-for-pci-usb.patch | 79 +- ...grate-to-use-DM_USB_GADGET-on-RK3328.patch | 691 ------------------ ...tch-to-OF_HAS_PRIOR_STAGE-by-default.patch | 154 ---- sources | 2 +- uboot-tools.spec | 17 +- 9 files changed, 175 insertions(+), 1826 deletions(-) delete mode 100644 phy-rockchip-inno-usb2-Write-to-correct-GRF.patch delete mode 100644 rockchip-Add-initial-support-for-the-PinePhone-Pro.patch delete mode 100644 rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch delete mode 100644 rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch diff --git a/Add-video-damage-tracking.patch b/Add-video-damage-tracking.patch index 7ba10f6..1aea71e 100644 --- a/Add-video-damage-tracking.patch +++ b/Add-video-damage-tracking.patch @@ -1,4 +1,4 @@ -From 79c2ed100ee9b901d676567e73ea4ebde84f15bc Mon Sep 17 00:00:00 2001 +From 26fad18312fe9cb0ed97ed8550b1c704d0985ebe Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:50:58 +0300 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a @@ -300,9 +300,9 @@ index d907f681600..641a6250100 100644 return 0; } -- -2.43.0 +2.45.1 -From eb6a5cd225f0818e5dec2253e0c676142c3835a1 Mon Sep 17 00:00:00 2001 +From 6c7cff43f374242ed4d585f7359fa5c334332a0a Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:50:59 +0300 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer @@ -611,9 +611,9 @@ index 641a6250100..b9ff3da10c1 100644 return 0; -- -2.43.0 +2.45.1 -From 4c80b655e5c82acd1573e80668747d8ef25deb83 Mon Sep 17 00:00:00 2001 +From 1020e92b30457fa042a78395dabce0f50d07de8e Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:51:00 +0300 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame @@ -694,9 +694,9 @@ index b9ff3da10c1..e4bd27a6b76 100644 +} +DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- -2.43.0 +2.45.1 -From 40f4addde7e05ce94fb74cd7d6795265ad282de6 Mon Sep 17 00:00:00 2001 +From 57b3429b596c7ed89c1858663c87865e11d965e2 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:01 +0300 Subject: [PATCH 04/13] dm: video: Add damage tracking API @@ -721,7 +721,7 @@ Reviewed-by: Simon Glass 3 files changed, 81 insertions(+), 5 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index ab927641bb7..ac3edbfdb54 100644 +index 7808ae7919e..7815b590481 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -92,6 +92,19 @@ config VIDEO_COPY @@ -745,10 +745,10 @@ index ab927641bb7..ac3edbfdb54 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index f743ed74c81..9888a580bfd 100644 +index 7b5d1dfbb3b..99a8458199a 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -351,9 +351,39 @@ void video_set_default_colors(struct udevice *dev, bool invert) +@@ -347,9 +347,39 @@ void video_set_default_colors(struct udevice *dev, bool invert) priv->colour_bg = video_index_to_colour(priv, back); } @@ -788,7 +788,7 @@ index f743ed74c81..9888a580bfd 100644 struct video_ops *ops = video_get_ops(vid); int ret; -@@ -369,15 +399,12 @@ int video_sync(struct udevice *vid, bool force) +@@ -365,15 +395,12 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -804,7 +804,7 @@ index f743ed74c81..9888a580bfd 100644 static ulong last_sync; if (force || get_timer(last_sync) > 100) { -@@ -385,6 +412,14 @@ int video_sync(struct udevice *vid, bool force) +@@ -381,6 +408,14 @@ int video_sync(struct udevice *vid, bool force) last_sync = get_timer(0); } #endif @@ -884,9 +884,9 @@ index 4d8df9baaad..1310195f307 100644 * video_is_active() - Test if one video device it active * -- -2.43.0 +2.45.1 -From 38f85c1620b99691bc0bd06a18c7173386a0a846 Mon Sep 17 00:00:00 2001 +From 6677746b0fc8b653af608513bdef54b379b4ee7d Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:02 +0300 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills @@ -904,10 +904,10 @@ Reviewed-by: Simon Glass 1 file changed, 4 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 9888a580bfd..09172f1f7f4 100644 +index 99a8458199a..96b8962b8de 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -203,6 +203,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -196,6 +196,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, if (ret) return ret; @@ -916,7 +916,7 @@ index 9888a580bfd..09172f1f7f4 100644 return 0; } -@@ -249,6 +251,8 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -245,6 +247,8 @@ int video_fill(struct udevice *dev, u32 colour) if (ret) return ret; @@ -926,9 +926,9 @@ index 9888a580bfd..09172f1f7f4 100644 } -- -2.43.0 +2.45.1 -From 77425d7aca92bf734e51cf36fad658adc53cb57d Mon Sep 17 00:00:00 2001 +From 96ee787a7966c0357e5f028317b85a8593757883 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:03 +0300 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole @@ -953,10 +953,10 @@ Reviewed-by: Simon Glass 4 files changed, 94 insertions(+) diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index a0231293f31..ad7ce860e9d 100644 +index 34ef5a52294..6634d3f27da 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c -@@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) +@@ -40,6 +40,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -969,7 +969,7 @@ index a0231293f31..ad7ce860e9d 100644 return 0; } -@@ -60,6 +66,12 @@ static int console_move_rows(struct udevice *dev, uint rowdst, +@@ -61,6 +67,12 @@ static int console_move_rows(struct udevice *dev, uint rowdst, if (ret) return ret; @@ -982,7 +982,7 @@ index a0231293f31..ad7ce860e9d 100644 return 0; } -@@ -90,6 +102,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -92,6 +104,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -996,10 +996,10 @@ index a0231293f31..ad7ce860e9d 100644 if (ret) return ret; diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 65358a1c6e7..6c3e7c1bb8d 100644 +index e4303dfb364..8129c7b2aa7 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c -@@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -37,6 +37,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1012,7 +1012,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -64,6 +70,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -65,6 +71,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } @@ -1025,7 +1025,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -96,6 +108,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -98,6 +110,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1038,7 +1038,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return VID_TO_POS(fontdata->width); } -@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -123,6 +141,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1051,7 +1051,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -144,6 +168,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vidconsole_memmove(dev, dst, src, fontdata->height * vid_priv->line_length * count); @@ -1064,7 +1064,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -174,6 +204,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -177,6 +207,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1077,7 +1077,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return VID_TO_POS(fontdata->width); } -@@ -198,6 +234,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -201,6 +237,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1090,7 +1090,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -224,6 +266,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -227,6 +269,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } @@ -1103,7 +1103,7 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 return 0; } -@@ -255,6 +303,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -259,6 +307,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1117,10 +1117,10 @@ index 65358a1c6e7..6c3e7c1bb8d 100644 } diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 14fb81e9563..c0a5ad1a51e 100644 +index 28665a32757..ed6c9cbb4f4 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -190,6 +190,7 @@ struct console_tt_store { +@@ -191,6 +191,7 @@ struct console_tt_store { static int console_truetype_set_row(struct udevice *dev, uint row, int clr) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1128,7 +1128,7 @@ index 14fb81e9563..c0a5ad1a51e 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; -@@ -233,6 +234,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -234,6 +235,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1141,7 +1141,7 @@ index 14fb81e9563..c0a5ad1a51e 100644 return 0; } -@@ -240,6 +247,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -241,6 +248,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, uint rowsrc, uint count) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1149,7 +1149,7 @@ index 14fb81e9563..c0a5ad1a51e 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *dst; -@@ -258,6 +266,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -259,6 +267,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, for (i = 0; i < priv->pos_ptr; i++) priv->pos[i].ypos -= diff; @@ -1162,7 +1162,7 @@ index 14fb81e9563..c0a5ad1a51e 100644 return 0; } -@@ -415,6 +429,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -419,6 +433,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, line += vid_priv->line_length; } @@ -1177,10 +1177,10 @@ index 14fb81e9563..c0a5ad1a51e 100644 if (ret) return ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 09172f1f7f4..06e344f415c 100644 +index 96b8962b8de..cbdda274f2d 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -199,6 +199,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -192,6 +192,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, } line += priv->line_length; } @@ -1189,9 +1189,9 @@ index 09172f1f7f4..06e344f415c 100644 if (ret) return ret; -- -2.43.0 +2.45.1 -From b44368015bdea3e71cb1c392afa124e6d26ab798 Mon Sep 17 00:00:00 2001 +From 077a499a8fc2ccad28114264c8792d342bf8536c Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:51:04 +0300 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole @@ -1209,10 +1209,10 @@ Reviewed-by: Simon Glass 2 files changed, 57 insertions(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index bc5bcb2a623..fa6b23f365c 100644 +index 93b52f2de5c..2051f0a3d7a 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -311,6 +311,7 @@ CONFIG_USB_ETH_CDC=y +@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1285,9 +1285,9 @@ index e4bd27a6b76..8c7d9800a42 100644 +} +DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- -2.43.0 +2.45.1 -From 9278f6c9492b0a7960a6ee2294a524ef150bf1cb Mon Sep 17 00:00:00 2001 +From e5b927255d0375408a5ff14403a978aca09fa68f Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:05 +0300 Subject: [PATCH 08/13] video: Add damage notification on bmp display @@ -1317,9 +1317,9 @@ index 45f003c8251..10943b9ca19 100644 fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); ret = video_sync_copy(dev, start, fb); -- -2.43.0 +2.45.1 -From b56b97ef176a2753a9827d761760a829eece00d0 Mon Sep 17 00:00:00 2001 +From d31ef2b17c98d0b7b1040e5abda99bb1720eb8c0 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:06 +0300 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT @@ -1338,10 +1338,10 @@ Reviewed-by: Simon Glass 1 file changed, 7 insertions(+) diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c -index a09db31eb46..ede77af1fe4 100644 +index 41e12fa7246..1694e23dcc6 100644 --- a/lib/efi_loader/efi_gop.c +++ b/lib/efi_loader/efi_gop.c -@@ -25,6 +25,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; +@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; * @ops: graphical output protocol interface * @info: graphical output mode information * @mode: graphical output mode @@ -1349,7 +1349,7 @@ index a09db31eb46..ede77af1fe4 100644 * @bpix: bits per pixel * @fb: frame buffer */ -@@ -33,6 +34,7 @@ struct efi_gop_obj { +@@ -32,6 +33,7 @@ struct efi_gop_obj { struct efi_gop ops; struct efi_gop_mode_info info; struct efi_gop_mode mode; @@ -1357,7 +1357,7 @@ index a09db31eb46..ede77af1fe4 100644 /* Fields we only have access to during init */ u32 bpix; void *fb; -@@ -121,6 +123,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, u32 *fb32 = gopobj->fb; u16 *fb16 = gopobj->fb; struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4); @@ -1365,7 +1365,7 @@ index a09db31eb46..ede77af1fe4 100644 if (delta) { /* Check for 4 byte alignment */ -@@ -244,6 +247,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, dlineoff += dwidth; } @@ -1375,7 +1375,7 @@ index a09db31eb46..ede77af1fe4 100644 return EFI_SUCCESS; } -@@ -550,6 +556,7 @@ efi_status_t efi_gop_register(void) +@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void) gopobj->info.pixels_per_scanline = col; gopobj->bpix = bpix; gopobj->fb = map_sysmem(fb_base, fb_size); @@ -1384,9 +1384,9 @@ index a09db31eb46..ede77af1fe4 100644 return EFI_SUCCESS; } -- -2.43.0 +2.45.1 -From e77793c6320f827b4f8efc06bd55d38037b6373e Mon Sep 17 00:00:00 2001 +From 63e4c90e38c476d89148f4328778af0adcbe7adf Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:07 +0300 Subject: [PATCH 10/13] video: Only dcache flush damaged lines @@ -1406,10 +1406,10 @@ Signed-off-by: Alper Nebi Yasak 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 06e344f415c..ac2141892bf 100644 +index cbdda274f2d..e009be4f55d 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -385,6 +385,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -381,6 +381,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) priv->damage.yend = max(yend, priv->damage.yend); } @@ -1451,7 +1451,7 @@ index 06e344f415c..ac2141892bf 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -404,11 +439,7 @@ int video_sync(struct udevice *vid, bool force) +@@ -400,11 +435,7 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -1465,12 +1465,15 @@ index 06e344f415c..ac2141892bf 100644 static ulong last_sync; -- -2.43.0 +2.45.1 -From e9d51b4dcbfa43aa0e4d2b4f285bf94c295603e4 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 21 Aug 2023 16:51:08 +0300 -Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY +From 09e504af253b3f3062891d59ad17c4fb8193dcc7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 25 May 2024 12:18:41 +0100 +Subject: [PATCH 11/13] From e9d51b4dcbfa43aa0e4d2b4f285bf94c295603e4 Mon Sep + 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug + 2023 16:51:08 +0300 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for + VIDEO_COPY CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we print a single character, it will always copy the full range of bytes @@ -1494,6 +1497,7 @@ Signed-off-by: Alexander Graf call video_sync() before copy_fb check, update video_copy test] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak +Signed-off-by: Peter Robinson --- configs/sandbox_defconfig | 1 - drivers/video/Kconfig | 5 ++ @@ -1509,10 +1513,10 @@ Signed-off-by: Alper Nebi Yasak 11 files changed, 43 insertions(+), 248 deletions(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index fa6b23f365c..bc5bcb2a623 100644 +index 2051f0a3d7a..93b52f2de5c 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -311,7 +311,6 @@ CONFIG_USB_ETH_CDC=y +@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1521,7 +1525,7 @@ index fa6b23f365c..bc5bcb2a623 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index ac3edbfdb54..438cf3d4899 100644 +index 7815b590481..88c6f8e6897 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE @@ -1549,10 +1553,10 @@ index ac3edbfdb54..438cf3d4899 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index ad7ce860e9d..5625dbb8d08 100644 +index 6634d3f27da..fbfd2caabc6 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c -@@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) +@@ -36,10 +36,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); end = dst; @@ -1563,7 +1567,7 @@ index ad7ce860e9d..5625dbb8d08 100644 video_damage(dev->parent, 0, fontdata->height * row, -@@ -57,14 +53,11 @@ static int console_move_rows(struct udevice *dev, uint rowdst, +@@ -58,14 +54,11 @@ static int console_move_rows(struct udevice *dev, uint rowdst, void *dst; void *src; int size; @@ -1579,7 +1583,7 @@ index ad7ce860e9d..5625dbb8d08 100644 video_damage(dev->parent, 0, -@@ -108,10 +101,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -110,10 +103,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) fontdata->width, fontdata->height); @@ -1591,10 +1595,10 @@ index ad7ce860e9d..5625dbb8d08 100644 } diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 6c3e7c1bb8d..6e9067d1c7f 100644 +index 8129c7b2aa7..fa0b4faf63b 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c -@@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -22,7 +22,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) int pbytes = VNBYTES(vid_priv->bpix); void *start, *dst, *line; int i, j; @@ -1602,7 +1606,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 start = vid_priv->fb + vid_priv->line_length - (row + 1) * fontdata->height * pbytes; -@@ -32,9 +31,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -33,9 +32,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); line += vid_priv->line_length; } @@ -1612,7 +1616,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, vid_priv->xsize - ((row + 1) * fontdata->height), -@@ -54,7 +50,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -55,7 +51,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, int pbytes = VNBYTES(vid_priv->bpix); void *dst; void *src; @@ -1621,7 +1625,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 dst = vid_priv->fb + vid_priv->line_length - (rowdst + count) * fontdata->height * pbytes; -@@ -62,10 +58,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -63,10 +59,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, (rowsrc + count) * fontdata->height * pbytes; for (j = 0; j < vid_priv->ysize; j++) { @@ -1633,7 +1637,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 src += vid_priv->line_length; dst += vid_priv->line_length; } -@@ -104,10 +97,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -106,10 +99,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) return ret; /* We draw backwards from 'start, so account for the first line */ @@ -1644,7 +1648,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, vid_priv->xsize - y - fontdata->height, linenum - 1, -@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -127,7 +116,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; void *start, *line, *dst, *end; int pixels = fontdata->height * vid_priv->xsize; @@ -1653,7 +1657,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 int pbytes = VNBYTES(vid_priv->bpix); start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length - -@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -137,9 +126,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) for (i = 0; i < pixels; i++) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); end = dst; @@ -1663,7 +1667,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, 0, -@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -165,8 +151,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vid_priv->line_length; src = end - (rowsrc + count) * fontdata->height * vid_priv->line_length; @@ -1673,7 +1677,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, 0, -@@ -199,11 +184,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -202,11 +187,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1685,7 +1689,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, x - fontdata->width + 1, linenum - fontdata->height + 1, -@@ -220,7 +200,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -223,7 +203,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; int pbytes = VNBYTES(vid_priv->bpix); void *start, *dst, *line; @@ -1694,7 +1698,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 start = vid_priv->fb + row * fontdata->height * pbytes; line = start; -@@ -230,9 +210,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -233,9 +213,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); line += vid_priv->line_length; } @@ -1704,7 +1708,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 video_damage(dev->parent, row * fontdata->height, -@@ -252,16 +229,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -255,16 +232,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, int pbytes = VNBYTES(vid_priv->bpix); void *dst; void *src; @@ -1723,7 +1727,7 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 src += vid_priv->line_length; dst += vid_priv->line_length; } -@@ -296,10 +270,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch) +@@ -300,10 +274,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) line = start; ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); @@ -1735,10 +1739,10 @@ index 6c3e7c1bb8d..6e9067d1c7f 100644 return ret; diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index c0a5ad1a51e..7aa1cdaef88 100644 +index ed6c9cbb4f4..4cf9b013293 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -195,7 +195,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; @@ -1746,7 +1750,7 @@ index c0a5ad1a51e..7aa1cdaef88 100644 line = vid_priv->fb + row * met->font_size * vid_priv->line_length; end = line + met->font_size * vid_priv->line_length; -@@ -230,9 +229,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -231,9 +230,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) default: return -ENOSYS; } @@ -1756,7 +1760,7 @@ index c0a5ad1a51e..7aa1cdaef88 100644 video_damage(dev->parent, 0, -@@ -252,14 +248,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -253,14 +249,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, struct console_tt_metrics *met = priv->cur_met; void *dst; void *src; @@ -1773,7 +1777,7 @@ index c0a5ad1a51e..7aa1cdaef88 100644 /* Scroll up our position history */ diff = (rowsrc - rowdst) * met->font_size; -@@ -292,7 +285,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -293,7 +286,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, u8 *bits, *data; int advance; void *start, *end, *line; @@ -1781,8 +1785,8 @@ index c0a5ad1a51e..7aa1cdaef88 100644 + int row; /* First get some basic metrics about this character */ - stbtt_GetCodepointHMetrics(font, ch, &advance, &lsb); -@@ -436,9 +429,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, + stbtt_GetCodepointHMetrics(font, cp, &advance, &lsb); +@@ -440,9 +433,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, width, height); @@ -1793,10 +1797,10 @@ index c0a5ad1a51e..7aa1cdaef88 100644 return width_frac; diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 22d55df71f6..16b38a27d39 100644 +index 5d06e51ff23..5f1dd0aaa41 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c -@@ -751,22 +751,6 @@ UCLASS_DRIVER(vidconsole) = { +@@ -760,22 +760,6 @@ UCLASS_DRIVER(vidconsole) = { .per_device_auto = sizeof(struct vidconsole_priv), }; @@ -1820,10 +1824,10 @@ index 22d55df71f6..16b38a27d39 100644 { int ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index ac2141892bf..afbd4670240 100644 +index e009be4f55d..b3eeccb996d 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -160,7 +160,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -153,7 +153,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, struct video_priv *priv = dev_get_uclass_priv(dev); void *start, *line; int pixels = xend - xstart; @@ -1832,7 +1836,7 @@ index ac2141892bf..afbd4670240 100644 start = priv->fb + ystart * priv->line_length; start += xstart * VNBYTES(priv->bpix); -@@ -200,10 +200,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -193,10 +193,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, line += priv->line_length; } @@ -1843,7 +1847,7 @@ index ac2141892bf..afbd4670240 100644 video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); return 0; -@@ -223,7 +219,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) +@@ -219,7 +215,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) int video_fill(struct udevice *dev, u32 colour) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -1851,7 +1855,7 @@ index ac2141892bf..afbd4670240 100644 switch (priv->bpix) { case VIDEO_BPP16: -@@ -248,9 +243,6 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -244,9 +239,6 @@ int video_fill(struct udevice *dev, u32 colour) memset(priv->fb, colour, priv->fb_size); break; } @@ -1861,7 +1865,7 @@ index ac2141892bf..afbd4670240 100644 video_damage(dev, 0, 0, priv->xsize, priv->ysize); -@@ -420,6 +412,27 @@ static void video_flush_dcache(struct udevice *vid) +@@ -416,6 +408,27 @@ static void video_flush_dcache(struct udevice *vid) } #endif @@ -1889,7 +1893,7 @@ index ac2141892bf..afbd4670240 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -427,6 +440,9 @@ int video_sync(struct udevice *vid, bool force) +@@ -423,6 +436,9 @@ int video_sync(struct udevice *vid, bool force) struct video_ops *ops = video_get_ops(vid); int ret; @@ -2042,10 +2046,10 @@ index 1310195f307..29eff3c0900 100644 * video_damage() - Notify the video subsystem about screen updates. * diff --git a/include/video_console.h b/include/video_console.h -index bde67fa9a5a..43bc7db489a 100644 +index 8b5928dc5eb..8806d10f946 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -527,56 +527,4 @@ void vidconsole_list_fonts(struct udevice *dev); +@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev); */ int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); @@ -2124,9 +2128,9 @@ index 8c7d9800a42..4c3bcd26e94 100644 return 0; } -- -2.43.0 +2.45.1 -From 8831933fcc6cf60308e6ede438409717ab1a94a6 Mon Sep 17 00:00:00 2001 +From 6b90fed4745a705c1ca660a346a3563f0da8def5 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:09 +0300 Subject: [PATCH 12/13] video: Always compile cache flushing code @@ -2151,10 +2155,10 @@ Signed-off-by: Alper Nebi Yasak 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index afbd4670240..2c7777261ad 100644 +index b3eeccb996d..33ad9ff3fab 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -373,11 +373,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) priv->damage.yend = max(yend, priv->damage.yend); } @@ -2169,7 +2173,7 @@ index afbd4670240..2c7777261ad 100644 if (!priv->flush_dcache) return; -@@ -410,7 +412,6 @@ static void video_flush_dcache(struct udevice *vid) +@@ -406,7 +408,6 @@ static void video_flush_dcache(struct udevice *vid) } } } @@ -2177,7 +2181,7 @@ index afbd4670240..2c7777261ad 100644 static void video_flush_copy(struct udevice *vid) { -@@ -449,14 +450,9 @@ int video_sync(struct udevice *vid, bool force) +@@ -445,14 +446,9 @@ int video_sync(struct udevice *vid, bool force) return ret; } @@ -2195,9 +2199,9 @@ index afbd4670240..2c7777261ad 100644 if (force || get_timer(last_sync) > 100) { -- -2.43.0 +2.45.1 -From 676104d8420152c97321c4fa22bb925fb139dd66 Mon Sep 17 00:00:00 2001 +From 7cfa667a11f245596e4b31842b0d646929be24e9 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:10 +0300 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it @@ -2228,10 +2232,10 @@ Reviewed-by: Simon Glass 9 files changed, 16 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index a4a8d8e9445..1d32a3140bf 100644 +index ddf9414b08e..3c9745065ba 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -846,6 +846,7 @@ config VIDEO_SUNXI +@@ -863,6 +863,7 @@ config VIDEO_SUNXI depends on !SUNXI_GEN_NCAT2 select VIDEO select DISPLAY @@ -2240,7 +2244,7 @@ index a4a8d8e9445..1d32a3140bf 100644 default y ---help--- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 438cf3d4899..a736ee6724c 100644 +index 88c6f8e6897..06d3ed8a736 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804 @@ -2259,7 +2263,7 @@ index 438cf3d4899..a736ee6724c 100644 help The graphics processor already sets up the display so this driver simply checks the resolution and then sets up the frame buffer with -@@ -654,6 +656,7 @@ source "drivers/video/meson/Kconfig" +@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig" config VIDEO_MVEBU bool "Armada XP LCD controller" @@ -2267,7 +2271,7 @@ index 438cf3d4899..a736ee6724c 100644 ---help--- Support for the LCD controller integrated in the Marvell Armada XP SoC. -@@ -688,6 +691,7 @@ config NXP_TDA19988 +@@ -705,6 +708,7 @@ config NXP_TDA19988 config ATMEL_HLCD bool "Enable ATMEL video support using HLCDC" @@ -2275,7 +2279,7 @@ index 438cf3d4899..a736ee6724c 100644 help HLCDC supports video output to an attached LCD panel. -@@ -764,6 +768,7 @@ source "drivers/video/tidss/Kconfig" +@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig" config VIDEO_TEGRA124 bool "Enable video support on Tegra124" @@ -2283,7 +2287,7 @@ index 438cf3d4899..a736ee6724c 100644 help Tegra124 supports many video output options including eDP and HDMI. At present only eDP is supported by U-Boot. This option -@@ -778,6 +783,7 @@ source "drivers/video/imx/Kconfig" +@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig" config VIDEO_MXS bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs" @@ -2291,7 +2295,7 @@ index 438cf3d4899..a736ee6724c 100644 help Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors -@@ -840,6 +846,7 @@ config VIDEO_DW_MIPI_DSI +@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" @@ -2299,7 +2303,7 @@ index 438cf3d4899..a736ee6724c 100644 help Enables a simple generic display driver which utilizes the simple-framebuffer devicetree bindings. -@@ -858,6 +865,7 @@ config VIDEO_DT_SIMPLEFB +@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB config VIDEO_MCDE_SIMPLE bool "Simple driver for ST-Ericsson MCDE with preconfigured display" @@ -2391,5 +2395,5 @@ index 95086f3a5d6..3291b3ceb8d 100644 TIDSS supports video output options LVDS and DPI . This option enables these supports which can be used on -- -2.43.0 +2.45.1 diff --git a/aarch64-boards b/aarch64-boards index 07154e5..f88eb85 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -7,7 +7,6 @@ bananapi_m64 beelink_gs1 dragonboard410c dragonboard820c -dragonboard845c eaidk-610-rk3399 emlid_neutis_n5_devboard evb-px5 @@ -75,6 +74,7 @@ pinephone-pro-rk3399 pinetab poplar puma-rk3399 +qcom_defconfig qemu_arm64 roc-cc-rk3328 rock-4c-plus-rk3399 diff --git a/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch b/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch deleted file mode 100644 index b240ad6..0000000 --- a/phy-rockchip-inno-usb2-Write-to-correct-GRF.patch +++ /dev/null @@ -1,572 +0,0 @@ -From patchwork Sun Feb 25 22:10:19 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Jonas Karlman -X-Patchwork-Id: 1903989 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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jonas@kwiboo.se, smtp.forwardemail.net, - 149.28.215.223 -X-ForwardEmail-ID: 65dbbada46c899733a83b3ec -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -On RK3399 the USB2PHY regs are located in the common GRF, remaining SoCs -that is supported by this driver have the USB2PHY regs in a different -GRF. - -When support for RK356x, RK3588 and RK3328 was added this driver was -never updated to use correct GRF and have instead incorrectly written -to wrong GRF for these SoCs. - -The default reset values for the USB2PHY have made USB mostly working -even when wrong GRF was used, however, following have been observed: - - scanning bus usb@fd840000 for devices... - ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did - not provide a handshake (OUT) (5) - ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did - not provide a handshake (OUT) (5) - unable to get device descriptor (error=-1) - -Fix this by using a regmap from rockchip,usbgrf prop and fall back to -getting a regmap for parent udevice instead of always getting the -common GRF. - -Also protect against accidental clear of bit 0 in a reg with offset 0, -only bind driver to enabled otg/host-ports and remove unused headers. - -Fixes: 3da15f0b49a2 ("phy: rockchip-inno-usb2: Add USB2 PHY for rk3568") -Fixes: cdf9010f6e17 ("phy: rockchip-inno-usb2: add initial support for rk3588 PHY") -Fixes: 9aa93d84038b ("phy: rockchip-inno-usb2: Add USB2 PHY for RK3328") -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 41 ++++++++++--------- - 1 file changed, 22 insertions(+), 19 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 70e61eccb79a..7317128d135e 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -6,23 +6,16 @@ - * Copyright (C) 2020 Amarula Solutions(India) - */ - --#include - #include - #include --#include - #include - #include - #include - #include --#include -+#include - #include --#include --#include --#include - #include - --DECLARE_GLOBAL_DATA_PTR; -- - #define usleep_range(a, b) udelay((b)) - #define BIT_WRITEABLE_SHIFT 16 - -@@ -61,30 +54,39 @@ struct rockchip_usb2phy_cfg { - }; - - struct rockchip_usb2phy { -- void *reg_base; -+ struct regmap *reg_base; - struct clk phyclk; - const struct rockchip_usb2phy_cfg *phy_cfg; - }; - --static inline int property_enable(void *reg_base, -+static inline int property_enable(struct regmap *base, - const struct usb2phy_reg *reg, bool en) - { - unsigned int val, mask, tmp; - -+ if (!reg->offset && !reg->enable && !reg->disable) -+ return 0; -+ - tmp = en ? reg->enable : reg->disable; - mask = GENMASK(reg->bitend, reg->bitstart); - val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); - -- return writel(val, reg_base + reg->offset); -+ return regmap_write(base, reg->offset, val); - } - --static inline bool property_enabled(void *reg_base, -+static inline bool property_enabled(struct regmap *base, - const struct usb2phy_reg *reg) - { -+ int ret; - unsigned int tmp, orig; - unsigned int mask = GENMASK(reg->bitend, reg->bitstart); - -- orig = readl(reg_base + reg->offset); -+ if (!reg->offset && !reg->enable && !reg->disable) -+ return false; -+ -+ ret = regmap_read(base, reg->offset, &orig); -+ if (ret) -+ return false; - - tmp = (orig & mask) >> reg->bitstart; - return tmp != reg->disable; -@@ -248,7 +250,11 @@ static int rockchip_usb2phy_probe(struct udevice *dev) - unsigned int reg; - int index, ret; - -- priv->reg_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); -+ if (dev_read_bool(dev, "rockchip,usbgrf")) -+ priv->reg_base = -+ syscon_regmap_lookup_by_phandle(dev, "rockchip,usbgrf"); -+ else -+ priv->reg_base = syscon_get_regmap(dev_get_parent(dev)); - if (IS_ERR(priv->reg_base)) - return PTR_ERR(priv->reg_base); - -@@ -305,11 +311,8 @@ static int rockchip_usb2phy_bind(struct udevice *dev) - int ret = 0; - - dev_for_each_subnode(node, dev) { -- if (!ofnode_valid(node)) { -- dev_info(dev, "subnode %s not found\n", dev->name); -- ret = -ENXIO; -- goto bind_fail; -- } -+ if (!ofnode_is_enabled(node)) -+ continue; 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jonas@kwiboo.se, smtp.forwardemail.net, - 149.28.215.223 -X-ForwardEmail-ID: 65dbbade46c899733a83b3fe -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -The USB2PHY regs already contain working default reset values for RK3328 -and RK35xx as evidenced by the fact that this driver never has changed a -single value for these SoCs. - -Reduce to only configure utmi_suspend_n and utmi_sel bits similar to -what is currently done on RK3399. Also add missing clkout_ctl for RK3588. - -When enabled utmi_suspend_n is changed to normal mode and utmi_sel to -use otg/host controller utmi interface to phy. When disabled -utmi_suspend_n is changed to suspend mode and utmi_sel to use GRF utmi -interface to phy. - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 117 +++--------------- - 1 file changed, 14 insertions(+), 103 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 7317128d135e..d392aed2d4de 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -35,16 +35,6 @@ struct usb2phy_reg { - - struct rockchip_usb2phy_port_cfg { - struct usb2phy_reg phy_sus; -- struct usb2phy_reg bvalid_det_en; -- struct usb2phy_reg bvalid_det_st; -- struct usb2phy_reg bvalid_det_clr; -- struct usb2phy_reg ls_det_en; -- struct usb2phy_reg ls_det_st; -- struct usb2phy_reg ls_det_clr; -- struct usb2phy_reg utmi_avalid; -- struct usb2phy_reg utmi_bvalid; -- struct usb2phy_reg utmi_ls; -- struct usb2phy_reg utmi_hstdet; - }; - - struct rockchip_usb2phy_cfg { -@@ -131,7 +121,6 @@ static int rockchip_usb2phy_init(struct phy *phy) - { - struct udevice *parent = dev_get_parent(phy->dev); - struct rockchip_usb2phy *priv = dev_get_priv(parent); -- const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); - int ret; - - ret = clk_enable(&priv->phyclk); -@@ -140,14 +129,6 @@ static int rockchip_usb2phy_init(struct phy *phy) - return ret; - } - -- if (phy->id == USB2PHY_PORT_OTG) { -- property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); -- property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); -- } else if (phy->id == USB2PHY_PORT_HOST) { -- property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); -- property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); -- } -- - return 0; - } - -@@ -351,27 +332,13 @@ bind_fail: - static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { - { - .reg = 0x100, -- .clkout_ctl = { 0x108, 4, 4, 1, 0 }, -+ .clkout_ctl = { 0x0108, 4, 4, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_OTG] = { -- .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 }, -- .bvalid_det_en = { 0x0110, 3, 2, 0, 3 }, -- .bvalid_det_st = { 0x0114, 3, 2, 0, 3 }, -- .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 }, -- .ls_det_en = { 0x0110, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0114, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0118, 0, 0, 0, 1 }, -- .utmi_avalid = { 0x0120, 10, 10, 0, 1 }, -- .utmi_bvalid = { 0x0120, 9, 9, 0, 1 }, -- .utmi_ls = { 0x0120, 5, 4, 0, 1 }, -+ .phy_sus = { 0x0100, 1, 0, 2, 1 }, - }, - [USB2PHY_PORT_HOST] = { -- .phy_sus = { 0x104, 15, 0, 0, 0x1d1 }, -- .ls_det_en = { 0x110, 1, 1, 0, 1 }, -- .ls_det_st = { 0x114, 1, 1, 0, 1 }, -- .ls_det_clr = { 0x118, 1, 1, 0, 1 }, -- .utmi_ls = { 0x120, 17, 16, 0, 1 }, -- .utmi_hstdet = { 0x120, 19, 19, 0, 1 } -+ .phy_sus = { 0x0104, 1, 0, 2, 1 }, - } - }, - }, -@@ -385,19 +352,9 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { - .port_cfgs = { - [USB2PHY_PORT_OTG] = { - .phy_sus = { 0xe454, 1, 0, 2, 1 }, -- .bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 }, -- .bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 }, -- .bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 }, -- .utmi_avalid = { 0xe2ac, 7, 7, 0, 1 }, -- .utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 }, - }, - [USB2PHY_PORT_HOST] = { -- .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 }, -- .ls_det_en = { 0xe3c0, 6, 6, 0, 1 }, -- .ls_det_st = { 0xe3e0, 6, 6, 0, 1 }, -- .ls_det_clr = { 0xe3d0, 6, 6, 0, 1 }, -- .utmi_ls = { 0xe2ac, 22, 21, 0, 1 }, -- .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 } -+ .phy_sus = { 0xe458, 1, 0, 2, 1 }, - } - }, - }, -@@ -407,19 +364,9 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { - .port_cfgs = { - [USB2PHY_PORT_OTG] = { - .phy_sus = { 0xe464, 1, 0, 2, 1 }, -- .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 }, -- .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 }, -- .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 }, -- .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 }, -- .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 }, - }, - [USB2PHY_PORT_HOST] = { -- .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 }, -- .ls_det_en = { 0xe3c0, 11, 11, 0, 1 }, -- .ls_det_st = { 0xe3e0, 11, 11, 0, 1 }, -- .ls_det_clr = { 0xe3d0, 11, 11, 0, 1 }, -- .utmi_ls = { 0xe2ac, 26, 25, 0, 1 }, -- .utmi_hstdet = { 0xe2ac, 27, 27, 0, 1 } -+ .phy_sus = { 0xe468, 1, 0, 2, 1 }, - } - }, - }, -@@ -432,24 +379,10 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { - .clkout_ctl = { 0x0008, 4, 4, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_OTG] = { -- .phy_sus = { 0x0000, 8, 0, 0x052, 0x1d1 }, -- .bvalid_det_en = { 0x0080, 2, 2, 0, 1 }, -- .bvalid_det_st = { 0x0084, 2, 2, 0, 1 }, -- .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_avalid = { 0x00c0, 10, 10, 0, 1 }, -- .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 }, -- .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, -+ .phy_sus = { 0x0000, 1, 0, 2, 1 }, - }, - [USB2PHY_PORT_HOST] = { -- .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, -- .ls_det_en = { 0x0080, 1, 1, 0, 1 }, -- .ls_det_st = { 0x0084, 1, 1, 0, 1 }, -- .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, -- .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, -- .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } -+ .phy_sus = { 0x0004, 1, 0, 2, 1 }, - } - }, - }, -@@ -458,20 +391,10 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { - .clkout_ctl = { 0x0008, 4, 4, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_OTG] = { -- .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, -- .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 } -+ .phy_sus = { 0x0000, 1, 0, 2, 1 }, - }, - [USB2PHY_PORT_HOST] = { -- .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, -- .ls_det_en = { 0x0080, 1, 1, 0, 1 }, -- .ls_det_st = { 0x0084, 1, 1, 0, 1 }, -- .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, -- .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, -- .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } -+ .phy_sus = { 0x0004, 1, 0, 2, 1 }, - } - }, - }, -@@ -481,49 +404,37 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { - static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { - { - .reg = 0x0000, -+ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_OTG] = { - .phy_sus = { 0x000c, 11, 11, 0, 1 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, - } - }, - }, - { - .reg = 0x4000, -+ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_OTG] = { -- .phy_sus = { 0x000c, 11, 11, 0, 0 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, -+ .phy_sus = { 0x000c, 11, 11, 0, 1 }, - } - }, - }, - { - .reg = 0x8000, -+ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_HOST] = { - .phy_sus = { 0x0008, 2, 2, 0, 1 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, - } - }, - }, - { - .reg = 0xc000, -+ .clkout_ctl = { 0x0000, 0, 0, 1, 0 }, - .port_cfgs = { - [USB2PHY_PORT_HOST] = { - .phy_sus = { 0x0008, 2, 2, 0, 1 }, -- .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -- .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -- .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -- .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, - } - }, - }, diff --git a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch b/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch deleted file mode 100644 index 337ea8c..0000000 --- a/rockchip-Add-initial-support-for-the-PinePhone-Pro.patch +++ /dev/null @@ -1,236 +0,0 @@ -From 72400858605c085cf94a6cf5599269c8c39e3e72 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 14 Mar 2023 12:30:36 +0000 -Subject: [PATCH] rockchip: pinephone pro: add initial display support - -Add proposed upstream DT patches for display, disable edp, -enable mipi and backlight, add required clocks. - -Clocks may not be required based on upstream review. Still -need to add panel pieces, the rk3288-evb has an example for -panel DT for u-boot, or may need to do a mipi addition to -simple-panel, or something else. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3399-pinephone-pro.dts | 123 +++++++++++++++++++++++++ - configs/pinephone-pro-rk3399_defconfig | 3 +- - include/dt-bindings/clock/rk3399-cru.h | 2 + - 3 files changed, 127 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts -index 04403a76238..d0609d1b534 100644 ---- a/arch/arm/dts/rk3399-pinephone-pro.dts -+++ b/arch/arm/dts/rk3399-pinephone-pro.dts -@@ -29,6 +29,12 @@ - stdout-path = "serial2:115200n8"; - }; - -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm0 0 1000000 0>; -+ pwm-delay-us = <10000>; -+ }; -+ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -@@ -102,6 +108,32 @@ - /* WL_REG_ON on module */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; -+ -+ /* MIPI DSI panel 1.8v supply */ -+ vcc1v8_lcd: vcc1v8-lcd-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ regulator-name = "vcc1v8_lcd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc3v3_sys>; -+ gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&display_pwren1>; -+ }; -+ -+ /* MIPI DSI panel 2.8v supply */ -+ vcc2v8_lcd: vcc2v8-lcd-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ regulator-name = "vcc2v8_lcd"; -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ vin-supply = <&vcc3v3_sys>; -+ gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&display_pwren>; -+ }; - }; - - &cpu_l0 { -@@ -132,6 +164,11 @@ - status = "okay"; - }; - -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ - &i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; -@@ -214,6 +251,9 @@ - regulator-name = "vcc3v0_touch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; - }; - - vcca1v8_codec: LDO_REG3 { -@@ -347,6 +387,25 @@ - }; - }; - -+&i2c3 { -+ i2c-scl-rising-time-ns = <450>; -+ i2c-scl-falling-time-ns = <15>; -+ status = "okay"; -+ -+ touchscreen@14 { -+ compatible = "goodix,gt917s"; -+ reg = <0x14>; -+ interrupt-parent = <&gpio3>; -+ interrupts = ; -+ irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; -+ AVDD28-supply = <&vcc3v0_touch>; -+ VDDIO-supply = <&vcc3v0_touch>; -+ touchscreen-size-x = <720>; -+ touchscreen-size-y = <1440>; -+ }; -+}; -+ - &io_domains { - bt656-supply = <&vcc1v8_dvp>; - audio-supply = <&vcca1v8_codec>; -@@ -355,6 +414,40 @@ - status = "okay"; - }; - -+&mipi_dsi { -+ status = "okay"; -+ clock-master; -+ -+ ports { -+ mipi_out: port@1 { -+ #address-cells = <0>; -+ #size-cells = <0>; -+ reg = <1>; -+ -+ mipi_out_panel: endpoint { -+ remote-endpoint = <&mipi_in_panel>; -+ }; -+ }; -+ }; -+ -+ panel@0 { -+ compatible = "hannstar,hsd060bhw4"; -+ reg = <0>; -+ backlight = <&backlight>; -+ reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; -+ vcc-supply = <&vcc2v8_lcd>; -+ iovcc-supply = <&vcc1v8_lcd>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&display_rst_l>; -+ -+ port { -+ mipi_in_panel: endpoint { -+ remote-endpoint = <&mipi_out_panel>; -+ }; -+ }; -+ }; -+}; -+ - &pmu_io_domains { - pmu1830-supply = <&vcc_1v8>; - status = "okay"; -@@ -387,6 +480,20 @@ - }; - }; - -+ dsi { -+ display_rst_l: display-rst-l { -+ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ display_pwren: display-pwren { -+ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ display_pwren1: display-pwren1 { -+ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ - sound { - vcc1v8_codec_en: vcc1v8-codec-en { - rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; -@@ -422,6 +529,10 @@ - status = "okay"; - }; - -+&pwm0 { -+ status = "okay"; -+}; -+ - &sdmmc { - bus-width = <4>; - cap-sd-highspeed; -@@ -472,3 +583,15 @@ - &uart2 { - status = "okay"; - }; -+ -+&vopb { -+ status = "okay"; -+ assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, -+ <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; -+ assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; -+ assigned-clock-parents = <&cru PLL_CPLL>, <&cru DCLK_VOP0_FRAC>; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig -index 54f9b90536c..1982131c805 100644 ---- a/configs/pinephone-pro-rk3399_defconfig -+++ b/configs/pinephone-pro-rk3399_defconfig -@@ -96,6 +96,7 @@ CONFIG_USB_ETHER_RTL8152=y - CONFIG_VIDEO=y - CONFIG_DISPLAY=y - CONFIG_VIDEO_ROCKCHIP=y --CONFIG_DISPLAY_ROCKCHIP_EDP=y -+CONFIG_DISPLAY_ROCKCHIP_MIPI=y -+CONFIG_BACKLIGHT_PWM=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h -index 211faf8fa89..7866e5266d2 100644 ---- a/include/dt-bindings/clock/rk3399-cru.h -+++ b/include/dt-bindings/clock/rk3399-cru.h -@@ -131,6 +131,8 @@ - #define DCLK_VOP0_DIV 182 - #define DCLK_VOP1_DIV 183 - #define DCLK_M0_PERILP 184 -+#define DCLK_VOP0_FRAC 185 -+#define DCLK_VOP1_FRAC 186 - - #define FCLK_CM0S 190 - --- -2.39.2 - diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch index 408609e..56756bc 100644 --- a/rockchip-Enable-preboot-start-for-pci-usb.patch +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -1,6 +1,6 @@ -From 367b3afc360e6fc92bd4cdca643ed2e4d928472d Mon Sep 17 00:00:00 2001 +From 3665ff79304fcb47427651125ccc2cfac01cb9f1 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Wed, 13 Mar 2024 19:14:50 +0000 +Date: Sat, 25 May 2024 12:23:42 +0100 Subject: [PATCH] rockchip: Enable preboot start for pci/usb Enable the preboot so nvme works OOTB @@ -16,15 +16,15 @@ Signed-off-by: Peter Robinson configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ - configs/rock960-rk3399_defconfig | 1 + + configs/rock960-rk3399_defconfig | 2 ++ configs/rockpro64-rk3399_defconfig | 2 ++ - 11 files changed, 20 insertions(+) + 11 files changed, 21 insertions(+) diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index b7c8e95b7b8..1e33083c138 100644 +index edacef29edf..71db7b7834e 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y @@ -32,12 +32,12 @@ index b7c8e95b7b8..1e33083c138 100644 +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_MISC_INIT_R=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig -index c18e7b1bd16..e9a18eb3e9f 100644 +index c63f4c076d5..7174b82cfa4 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig -@@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y @@ -45,24 +45,24 @@ index c18e7b1bd16..e9a18eb3e9f 100644 +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_MAX_SIZE=0x2e000 + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index de357415fbe..4168adb1935 100644 +index 5d3e32f9108..c9b3615f2ff 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig -@@ -24,6 +24,7 @@ CONFIG_PCI=y +@@ -21,6 +21,7 @@ CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_MISC_INIT_R=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig -index de6539bedf4..61c6182d27e 100644 +index a57899bfdfa..bd7030b237c 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig -@@ -23,6 +23,8 @@ CONFIG_SPL_SPI=y +@@ -20,6 +20,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y @@ -72,12 +72,12 @@ index de6539bedf4..61c6182d27e 100644 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig -index 18525c8bf50..89e9f69eb63 100644 +index 80dc44986e7..0ff8afe8e1e 100644 --- a/configs/rock-4c-plus-rk3399_defconfig +++ b/configs/rock-4c-plus-rk3399_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -85,49 +85,49 @@ index 18525c8bf50..89e9f69eb63 100644 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig -index 171de23ec8f..d2769a2f516 100644 +index f52d4bf9913..72ff304cff7 100644 --- a/configs/rock-4se-rk3399_defconfig +++ b/configs/rock-4se-rk3399_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_SPL_FIT_SIGNATURE=y - CONFIG_LEGACY_IMAGE_FORMAT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4se.dtb" diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig -index 83fc4ad7dab..24ca614fe5a 100644 +index e71c4588b94..387dbf83be3 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_SPL_FIT_SIGNATURE=y - CONFIG_LEGACY_IMAGE_FORMAT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb" diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig -index 089344097e0..83c2cfba157 100644 +index 14373933a34..34e09eeccd2 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig -index dc4b3b40380..db34bc70a22 100644 +index ec995a54a0e..1a973ea2c97 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig -@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 +@@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y @@ -137,30 +137,31 @@ index dc4b3b40380..db34bc70a22 100644 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index b93dda56593..6d1b352a855 100644 +index 8fff3ed17c2..ea6d6d4a319 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig -@@ -17,6 +17,7 @@ CONFIG_SYS_LOAD_ADDR=0x800800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y - CONFIG_USE_PREBOOT=y ++CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" CONFIG_SYS_PBSIZE=1052 CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index 711541f8462..8c1ea1a0b63 100644 +index fc0804a0b80..9a94d96b148 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig -@@ -21,6 +21,8 @@ CONFIG_SPL_SPI=y +@@ -19,6 +19,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_SPL_FIT_SIGNATURE=y - CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTSTAGE=y + CONFIG_BOOTSTAGE_REPORT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" -- -2.44.0 +2.45.1 diff --git a/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch b/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch deleted file mode 100644 index e2b54b4..0000000 --- a/rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch +++ /dev/null @@ -1,691 +0,0 @@ -From 0149cf303734fad55f1d733628f76a6994d1436d Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 10 Mar 2024 18:50:57 +0000 -Subject: [PATCH 1/4] rockchip: Update the default USB Product ID value - -RK3036 is using the USB product id normally used by RK3066B, and RK3328 -is using the product id normally used by RK3368. - -Fix this and update the default USB_GADGET_PRODUCT_NUM Kconfig option -for remaining supported Rockchip SoCs to match the product id used in -Maskrom mode. - -Also remove a reference to an undefined ROCKCHIP_RK3229 Kconfig symbol. - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - drivers/usb/gadget/Kconfig | 15 ++++++++++++--- - 1 file changed, 12 insertions(+), 3 deletions(-) - -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index c72a8047635..4621a6fd5e6 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -70,12 +70,21 @@ config USB_GADGET_PRODUCT_NUM - hex "Product ID of the USB device" - default 0x701a if ARCH_TEGRA - default 0x1010 if ARCH_SUNXI -- default 0x310a if ROCKCHIP_RK3036 -+ default 0x110a if ROCKCHIP_RV1108 -+ default 0x110b if ROCKCHIP_RV1126 - default 0x300a if ROCKCHIP_RK3066 -+ default 0x301a if ROCKCHIP_RK3036 -+ default 0x310b if ROCKCHIP_RK3188 - default 0x310c if ROCKCHIP_RK3128 -- default 0x320a if ROCKCHIP_RK3229 || ROCKCHIP_RK3288 -- default 0x330a if ROCKCHIP_RK3328 -+ default 0x320a if ROCKCHIP_RK3288 -+ default 0x320b if ROCKCHIP_RK322X -+ default 0x320c if ROCKCHIP_RK3328 -+ default 0x330a if ROCKCHIP_RK3368 - default 0x330c if ROCKCHIP_RK3399 -+ default 0x330d if ROCKCHIP_PX30 -+ default 0x330e if ROCKCHIP_RK3308 -+ default 0x350a if ROCKCHIP_RK3568 -+ default 0x350b if ROCKCHIP_RK3588 - default 0x0 - help - Product ID of the USB device emulated, reported to the host device. --- -2.44.0 - -From 3b4d52ef627bb3899c331ff24fe31cec5f445069 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 10 Mar 2024 18:50:58 +0000 -Subject: [PATCH 2/4] rockchip: board: Prepare for use of DM_USB_GADGET with - DWC2_OTG - -The board_usb_init() and board_usb_cleanup() functions is always -included when USB_GADGET and USB_GADGET_DWC2_OTG is enabled. - -Prepare for a change to use DM_USB_GADGET with DWC2_OTG by adding an -extra ifdef condition. The extra separate ifdef for USB_GADGET prepare -for next patch that adds a g_dnl_bind_fixup() function. - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - arch/arm/mach-rockchip/board.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c -index 2620530e03f..2ec670dde69 100644 ---- a/arch/arm/mach-rockchip/board.c -+++ b/arch/arm/mach-rockchip/board.c -@@ -205,7 +205,8 @@ void enable_caches(void) - } - #endif - --#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -+#if IS_ENABLED(CONFIG_USB_GADGET) -+#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) - #include - #include - #include -@@ -281,6 +282,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) - return 0; - } - #endif /* CONFIG_USB_GADGET_DWC2_OTG */ -+#endif /* CONFIG_USB_GADGET */ - - #if IS_ENABLED(CONFIG_FASTBOOT) - int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) --- -2.44.0 - -From 201da409a8c879482a00867010b772327aba6a51 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 10 Mar 2024 18:50:59 +0000 -Subject: [PATCH 3/4] rockchip: board: Use a common USB Product ID for UMS - -Change to use the common Product ID 0x0010 when the ums command is used. - -This matches downstream vendor U-Boot and is a Product ID that tools -such as rkdeveloptool and RKDevTool will identify as MSC mode. - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - arch/arm/mach-rockchip/board.c | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c -index 2ec670dde69..2db746b27fb 100644 ---- a/arch/arm/mach-rockchip/board.c -+++ b/arch/arm/mach-rockchip/board.c -@@ -206,8 +206,23 @@ void enable_caches(void) - #endif - - #if IS_ENABLED(CONFIG_USB_GADGET) --#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) - #include -+ -+#if IS_ENABLED(CONFIG_USB_GADGET_DOWNLOAD) -+#define ROCKCHIP_G_DNL_UMS_PRODUCT_NUM 0x0010 -+ -+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) -+{ -+ if (!strcmp(name, "usb_dnl_ums")) -+ put_unaligned(ROCKCHIP_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct); -+ else -+ put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct); -+ -+ return 0; -+} -+#endif /* CONFIG_USB_GADGET_DOWNLOAD */ -+ -+#if IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG) && !IS_ENABLED(CONFIG_DM_USB_GADGET) - #include - #include - --- -2.44.0 - -From 2cb2428ae571956dfafb2eeed8b54857b12e17d0 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 3 Apr 2024 05:29:20 +0100 -Subject: [PATCH 4/4] rockchip: Migrate to use DM_USB_GADGET on RK3328 - -USB gadget is not working fully as expected on RK3328, it uses a -board_usb_init() function to initialize the DWC2 OTG port. - -The board_usb_init() function does not intgrate with the generic phy -framework and as a result the USB phy is not properly configured before -or after USB gadget use. - -Having both USB_DWC2 and DWC2_OTG enabled for the same board is also -causing some issues. - -Trying to use rockusb or ums command after usb stop result in a freeze -due to usb stop is putting the phy in a suspended state. - - => usb start - => usb stop - => ums 0 mmc 0 - --> freeze due to usb phy is suspended <-- - -Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral) -depending on the most likely usage of the otg port and by migrating to -use DM_USB_GADGET instead of a board_usb_init() function. - -The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a -Type-C connector, mark these boards dr_mode as peripheral, the most -likely usage is for recovery and image download. - -The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG -driver from these boards to ensure that the USB_DWC2 driver is used. - -The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2 -and DWC2_OTG is removed from this board. - -Enable RockUSB and UMS on all boards with a otg port in peripheral mode. - -Also with the migration to DM_USB_GADGET completed the U-Boot specific -change to reorder usb nodes in the soc device tree can be reverted. - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang -Signed-off-by: Peter Robinson ---- - arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 4 ++ - .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 4 ++ - .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 4 ++ - arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 ++ - arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 9 ++++ - arch/arm/dts/rk3328-rock64-u-boot.dtsi | 4 ++ - arch/arm/dts/rk3328-u-boot.dtsi | 4 -- - arch/arm/dts/rk3328.dtsi | 41 ++++++++----------- - configs/evb-rk3328_defconfig | 7 +++- - configs/nanopi-r2c-plus-rk3328_defconfig | 7 +++- - configs/nanopi-r2c-rk3328_defconfig | 7 +++- - configs/nanopi-r2s-rk3328_defconfig | 7 +++- - configs/orangepi-r1-plus-lts-rk3328_defconfig | 7 +++- - configs/orangepi-r1-plus-rk3328_defconfig | 7 +++- - configs/roc-cc-rk3328_defconfig | 7 ---- - configs/rock-pi-e-rk3328_defconfig | 7 ---- - configs/rock64-rk3328_defconfig | 6 --- - 17 files changed, 75 insertions(+), 61 deletions(-) - -diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -index 78d37ab4755..3a16f86c18a 100644 ---- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -@@ -28,6 +28,10 @@ - bootph-pre-ram; - }; - -+&usb20_otg { -+ dr_mode = "peripheral"; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi -index ebe33e48cb9..2247daebc13 100644 ---- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi -@@ -28,6 +28,10 @@ - bootph-pre-ram; - }; - -+&usb20_otg { -+ dr_mode = "peripheral"; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi -index 637c70adf19..79942a49a29 100644 ---- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi -@@ -28,6 +28,10 @@ - bootph-pre-ram; - }; - -+&usb20_otg { -+ dr_mode = "peripheral"; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -index 2062f34bf82..1aeb0083631 100644 ---- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -@@ -48,6 +48,10 @@ - bootph-pre-ram; - }; - -+&usb20_otg { -+ hnp-srp-disable; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -index 1f220c6dcd0..c2371fb1688 100644 ---- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -@@ -45,6 +45,15 @@ - bootph-pre-ram; - }; - -+&u2phy_host { -+ phy-supply = <&vcc_host_5v>; -+}; -+ -+&vcc_host_5v { -+ /delete-property/ regulator-always-on; -+ /delete-property/ regulator-boot-on; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -index 6904515b969..1e4649ae120 100644 ---- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -@@ -48,6 +48,10 @@ - bootph-pre-ram; - }; - -+&usb20_otg { -+ hnp-srp-disable; -+}; -+ - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { - bootph-pre-ram; -diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi -index a9f2536de2a..b5da4518ec9 100644 ---- a/arch/arm/dts/rk3328-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-u-boot.dtsi -@@ -61,10 +61,6 @@ - u-boot,spl-fifo-mode; - }; - --&usb20_otg { -- hnp-srp-disable; --}; -- - &spi0 { - bootph-all; - }; -diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi -index e8d8f00be8a..8c821acb21f 100644 ---- a/arch/arm/dts/rk3328.dtsi -+++ b/arch/arm/dts/rk3328.dtsi -@@ -944,6 +944,22 @@ - }; - }; - -+ usb20_otg: usb@ff580000 { -+ compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", -+ "snps,dwc2"; -+ reg = <0x0 0xff580000 0x0 0x40000>; -+ interrupts = ; -+ clocks = <&cru HCLK_OTG>; -+ clock-names = "otg"; -+ dr_mode = "otg"; -+ g-np-tx-fifo-size = <16>; -+ g-rx-fifo-size = <280>; -+ g-tx-fifo-size = <256 128 128 64 32 16>; -+ phys = <&u2phy_otg>; -+ phy-names = "usb2-phy"; -+ status = "disabled"; -+ }; -+ - usb_host0_ehci: usb@ff5c0000 { - compatible = "generic-ehci"; - reg = <0x0 0xff5c0000 0x0 0x10000>; -@@ -983,31 +999,6 @@ - status = "disabled"; - }; - -- /* -- * U-Boot Specific Change -- * -- * The OTG controller must come after the USB host pair for it -- * to work. This is likely due to lack of support for the USB -- * PHYs. This must be manually changed after each device tree -- * sync. There is no clean way to handle this in -u-boot.dtsi -- * files. -- */ -- usb20_otg: usb@ff580000 { -- compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", -- "snps,dwc2"; -- reg = <0x0 0xff580000 0x0 0x40000>; -- interrupts = ; -- clocks = <&cru HCLK_OTG>; -- clock-names = "otg"; -- dr_mode = "otg"; -- g-np-tx-fifo-size = <16>; -- g-rx-fifo-size = <280>; -- g-tx-fifo-size = <256 128 128 64 32 16>; -- phys = <&u2phy_otg>; -- phy-names = "usb2-phy"; -- status = "disabled"; -- }; -- - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; -diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig -index b9c541a92a1..ed2e2b7aa6f 100644 ---- a/configs/evb-rk3328_defconfig -+++ b/configs/evb-rk3328_defconfig -@@ -46,6 +46,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -93,17 +95,18 @@ CONFIG_SYS_NS16550_MEM32=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig -index 320ed8b434a..015bcfef369 100644 ---- a/configs/nanopi-r2c-plus-rk3328_defconfig -+++ b/configs/nanopi-r2c-plus-rk3328_defconfig -@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig -index 583179d7c54..5742567a3d4 100644 ---- a/configs/nanopi-r2c-rk3328_defconfig -+++ b/configs/nanopi-r2c-rk3328_defconfig -@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig -index f7ed71e4122..180a76e0eeb 100644 ---- a/configs/nanopi-r2s-rk3328_defconfig -+++ b/configs/nanopi-r2s-rk3328_defconfig -@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -98,17 +100,18 @@ CONFIG_SYSINFO=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig -index d3d9417509e..a1a96bf2f28 100644 ---- a/configs/orangepi-r1-plus-lts-rk3328_defconfig -+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig -@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -99,17 +101,18 @@ CONFIG_SYSINFO=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig -index 9356e87132e..04273a0491c 100644 ---- a/configs/orangepi-r1-plus-rk3328_defconfig -+++ b/configs/orangepi-r1-plus-rk3328_defconfig -@@ -48,6 +48,8 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -99,17 +101,18 @@ CONFIG_SYSINFO=y - CONFIG_SYSRESET=y - # CONFIG_TPL_SYSRESET is not set - CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y - CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y - # CONFIG_USB_DWC3_GADGET is not set --CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_GADGET=y - CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig -index 4ac3c9403b0..0e4edcc999d 100644 ---- a/configs/roc-cc-rk3328_defconfig -+++ b/configs/roc-cc-rk3328_defconfig -@@ -23,7 +23,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_DEBUG_UART=y --# CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_FIT=y - CONFIG_FIT_VERBOSE=y - CONFIG_SPL_LOAD_FIT=y -@@ -48,7 +47,6 @@ CONFIG_CMD_BOOTZ=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y --CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_TIME=y - CONFIG_SPL_OF_CONTROL=y -@@ -68,8 +66,6 @@ CONFIG_SPL_SYSCON=y - CONFIG_TPL_SYSCON=y - CONFIG_CLK=y - CONFIG_SPL_CLK=y --CONFIG_FASTBOOT_BUF_ADDR=0x800800 --CONFIG_FASTBOOT_CMD_OEM_FORMAT=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MISC=y -@@ -110,10 +106,7 @@ CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y --# CONFIG_USB_DWC3_GADGET is not set - CONFIG_USB_DWC3_GENERIC=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_DWC2_OTG=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig -index 6dda900a9b4..6a4284120d2 100644 ---- a/configs/rock-pi-e-rk3328_defconfig -+++ b/configs/rock-pi-e-rk3328_defconfig -@@ -24,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_DEBUG_UART=y --# CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_FIT=y - CONFIG_FIT_VERBOSE=y - CONFIG_SPL_LOAD_FIT=y -@@ -69,8 +68,6 @@ CONFIG_SPL_SYSCON=y - CONFIG_TPL_SYSCON=y - CONFIG_CLK=y - CONFIG_SPL_CLK=y --CONFIG_FASTBOOT_BUF_ADDR=0x800800 --CONFIG_FASTBOOT_CMD_OEM_FORMAT=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MISC=y -@@ -109,12 +106,8 @@ CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y --CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y --# CONFIG_USB_DWC3_GADGET is not set - CONFIG_USB_DWC3_GENERIC=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_DWC2_OTG=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y -diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig -index 0297d098761..fd42059565a 100644 ---- a/configs/rock64-rk3328_defconfig -+++ b/configs/rock64-rk3328_defconfig -@@ -23,7 +23,6 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_DEBUG_UART=y --# CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_FIT=y - CONFIG_FIT_VERBOSE=y - CONFIG_SPL_LOAD_FIT=y -@@ -67,8 +66,6 @@ CONFIG_SPL_SYSCON=y - CONFIG_TPL_SYSCON=y - CONFIG_CLK=y - CONFIG_SPL_CLK=y --CONFIG_FASTBOOT_BUF_ADDR=0x800800 --CONFIG_FASTBOOT_CMD_OEM_FORMAT=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_MISC=y -@@ -111,10 +108,7 @@ CONFIG_USB_OHCI_HCD=y - CONFIG_USB_OHCI_GENERIC=y - CONFIG_USB_DWC2=y - CONFIG_USB_DWC3=y --# CONFIG_USB_DWC3_GADGET is not set - CONFIG_USB_DWC3_GENERIC=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_DWC2_OTG=y - CONFIG_SPL_TINY_MEMSET=y - CONFIG_TPL_TINY_MEMSET=y - CONFIG_ERRNO_STR=y --- -2.44.0 - diff --git a/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch b/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch deleted file mode 100644 index 9ac9512..0000000 --- a/rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch +++ /dev/null @@ -1,154 +0,0 @@ -From 5aaa4c98be87eef370a0c50bf6d4ab7f9fcde886 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 8 Jan 2024 22:13:59 +0000 -Subject: [PATCH] rpi: Switch to OF_HAS_PRIOR_STAGE by default -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -On all Raspberry Pi platforms, we're loaded by a prior stage firmware -that has assembled and passed on a device tree binary for us to use. -Switch to using this tree by default. - -Signed-off-by: Peter Robinson -Cc: Matthias Brugger -Cc: Simon Glass -Cc: François Ozog -Signed-off-by: Tom Rini -Tested-by: Simon Glass ---- -To be clear, this is on top of current -next where I've applied v8 of -Simon's series that introduces OF_HAS_PRIOR_STAGE. - -I've only been able to test this on my Raspberry Pi 3 boards but this -should work everywhere. What may, or may not, be a problem is that -arch/arm/dts/bcm283x-u-boot.dtsi is never used now. On the other hand, -I believe this should stop the problems we have where changes made to -the device tree via config.txt or similar aren't reflected when booting -U-Boot or Linux since we will be using that tree for certain now. ---- - arch/arm/Kconfig | 1 + - arch/arm/mach-bcm283x/Kconfig | 3 --- - configs/rpi_0_w_defconfig | 1 - - configs/rpi_2_defconfig | 1 - - configs/rpi_3_32b_defconfig | 1 - - configs/rpi_3_b_plus_defconfig | 1 - - configs/rpi_3_defconfig | 1 - - configs/rpi_defconfig | 1 - - 8 files changed, 1 insertion(+), 9 deletions(-) - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 1fd7aacc380..33bbe7b4898 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -645,6 +645,7 @@ config ARCH_BCM283X - select SERIAL_SEARCH_ALL - imply CMD_DM - imply FAT_WRITE -+ imply OF_HAS_PRIOR_STAGE - - config ARCH_BCMSTB - bool "Broadcom BCM7XXX family" -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 6ce278c6d29..b3287ce8bce 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -163,7 +163,6 @@ config TARGET_RPI_4_32B - - This option creates a build targeting the ARMv7/AArch32 ISA. - select BCM2711_32B -- imply OF_HAS_PRIOR_STAGE - - config TARGET_RPI_4 - bool "Raspberry Pi 4 64-bit build" -@@ -189,7 +188,6 @@ config TARGET_RPI_4 - - This option creates a build targeting the ARMv8/AArch64 ISA. - select BCM2711_64B -- imply OF_HAS_PRIOR_STAGE - - config TARGET_RPI_ARM64 - bool "Raspberry Pi one binary 64-bit build" -@@ -197,7 +195,6 @@ config TARGET_RPI_ARM64 - Support for all armv8 based Raspberry Pi variants, such as - the RPi 4 model B, in AArch64 (64-bit) mode. - select ARM64 -- imply OF_HAS_PRIOR_STAGE - - endchoice - -diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig -index bed143d64d6..98f8904c918 100644 ---- a/configs/rpi_0_w_defconfig -+++ b/configs/rpi_0_w_defconfig -@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig -index e4e4843e8cd..1b8676e1d10 100644 ---- a/configs/rpi_2_defconfig -+++ b/configs/rpi_2_defconfig -@@ -25,7 +25,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig -index 215396599e4..abc10a79ada 100644 ---- a/configs/rpi_3_32b_defconfig -+++ b/configs/rpi_3_32b_defconfig -@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig -index d1ec55e558a..3c8f8fc1bb7 100644 ---- a/configs/rpi_3_b_plus_defconfig -+++ b/configs/rpi_3_b_plus_defconfig -@@ -23,7 +23,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig -index 8e9c35b3cef..9853c448809 100644 ---- a/configs/rpi_3_defconfig -+++ b/configs/rpi_3_defconfig -@@ -23,7 +23,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig -index 89d6372c1de..060a8809506 100644 ---- a/configs/rpi_defconfig -+++ b/configs/rpi_defconfig -@@ -24,7 +24,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y - CONFIG_CMD_FS_UUID=y --CONFIG_OF_EMBED=y - CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --- -2.43.0 - diff --git a/sources b/sources index 6013800..555d633 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.04.tar.bz2) = a71270302b38e9e68a83b3acdf8f7635f72d9fa75169e3c2241cdfa21eab834b8f25dfd35c281191bccb2fcec1e86d6b64afcf1d2ed5cd4fdc02258cd75fc236 +SHA512 (u-boot-2024.07-rc3.tar.bz2) = 6b86ef1739fce647f5d44b7f6e659500d922c1bd4b591d8d31d2007d15e305e5b3b09bef72cb8b466ca611269102dead0e9b9aac1e0f67f711201c342828514c diff --git a/uboot-tools.spec b/uboot-tools.spec index aefeb8b..2e1743b 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc5 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2024.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2024.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -29,14 +29,8 @@ Patch5: enable-bootmenu-by-default.patch # Should be upstream but it's taking time Patch6: Add-video-damage-tracking.patch -# Board fixes and enablement -# RPi - uses RPI firmware device tree for HAT support -Patch10: rpi-Switch-to-OF_HAS_PRIOR_STAGE-by-default.patch # Rockchips improvements -Patch11: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch -Patch12: rockchip-Enable-preboot-start-for-pci-usb.patch -Patch13: phy-rockchip-inno-usb2-Write-to-correct-GRF.patch -Patch14: rockchip-Migrate-to-use-DM_USB_GADGET-on-RK3328.patch +Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch BuildRequires: bc BuildRequires: bison @@ -192,6 +186,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Sat May 25 2024 Peter Robinson - 1:2024.07-0.1.rc3 +- Update to 2024.07 RC3 + * Wed Apr 03 2024 Peter Robinson - 1:2024.04-1 - Update to 2024.04 GA - Rockchip rk3328 USB fixes From 3711935a69028d14fe557cd8fa5d9e7b9b8d4da7 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 25 May 2024 16:03:03 +0100 Subject: [PATCH 258/351] Fix qcom config name --- aarch64-boards | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index f88eb85..d831619 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -74,7 +74,7 @@ pinephone-pro-rk3399 pinetab poplar puma-rk3399 -qcom_defconfig +qcom qemu_arm64 roc-cc-rk3328 rock-4c-plus-rk3399 From f00b318695c8aa0e4ed61cd8c13853bf752b7a54 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 25 May 2024 17:32:32 +0100 Subject: [PATCH 259/351] drop starqltechn --- aarch64-boards | 1 - 1 file changed, 1 deletion(-) diff --git a/aarch64-boards b/aarch64-boards index d831619..2087102 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -90,7 +90,6 @@ roc-pc-mezzanine-rk3399 roc-pc-rk3399 rpi_arm64 sopine_baseboard -starqltechn tanix_tx6 teres_i transpeed-8k618-t From 1c674170ad51371d94bf187592fb64f174c35510 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 18 Jun 2024 11:57:00 +0100 Subject: [PATCH 260/351] 2024.07 RC4 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 555d633..92b8e44 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.07-rc3.tar.bz2) = 6b86ef1739fce647f5d44b7f6e659500d922c1bd4b591d8d31d2007d15e305e5b3b09bef72cb8b466ca611269102dead0e9b9aac1e0f67f711201c342828514c +SHA512 (u-boot-2024.07-rc4.tar.bz2) = 2fa73c48ab4f6e60cee11ebac79a35e1b15d95eba5d8bb3612bd354e6b6153bfc17fcf1783b6b410a8b78505535152eab9f2cfbb35a6f19af7f7af7b2741e2a6 diff --git a/uboot-tools.spec b/uboot-tools.spec index 2e1743b..6afa5c4 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.07 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -186,6 +186,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Jun 18 2024 Peter Robinson - 1:2024.07-0.2.rc4 +- Update to 2024.07 RC4 + * Sat May 25 2024 Peter Robinson - 1:2024.07-0.1.rc3 - Update to 2024.07 RC3 From 5dceaa60eb0c412b35f3df43473d4460503ea193 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sat, 20 Jul 2024 08:05:43 +0000 Subject: [PATCH 261/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 6afa5c4..e573122 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.07 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -186,6 +186,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Sat Jul 20 2024 Fedora Release Engineering - 1:2024.07-0.3.rc4 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild + * Tue Jun 18 2024 Peter Robinson - 1:2024.07-0.2.rc4 - Update to 2024.07 RC4 From 90b2ec4c3ddfc85d05dc272c724b97c36250f883 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Dan=20Hor=C3=A1k?= Date: Tue, 23 Jul 2024 13:48:55 +0200 Subject: [PATCH 262/351] explicitly enable OpenSSL engine support --- uboot-tools.spec | 1 + 1 file changed, 1 insertion(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index e573122..1c94acd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -42,6 +42,7 @@ BuildRequires: libuuid-devel BuildRequires: make BuildRequires: ncurses-devel BuildRequires: openssl-devel +BuildRequires: openssl-devel-engine BuildRequires: perl-interpreter BuildRequires: python3-devel BuildRequires: python3-setuptools From d68e991d5c06c853a8984046887b070253594cb4 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 23 Jul 2024 14:15:09 +0100 Subject: [PATCH 263/351] 2024.07 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index 92b8e44..09f870f 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.07-rc4.tar.bz2) = 2fa73c48ab4f6e60cee11ebac79a35e1b15d95eba5d8bb3612bd354e6b6153bfc17fcf1783b6b410a8b78505535152eab9f2cfbb35a6f19af7f7af7b2741e2a6 +SHA512 (u-boot-2024.07.tar.bz2) = 678f44e2b9132140f0bf05c637e57e638c73c278611037a41824b3ebff2131af4dec0163da4664bb2e5c4fd8034ba8c95b93b57f7aa9f4c045da322d87c3b5e9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 1c94acd..ee24ef7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -187,6 +187,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Jul 23 2024 Peter Robinson - 1:2024.07-1 +- Update to 2024.07 + * Sat Jul 20 2024 Fedora Release Engineering - 1:2024.07-0.3.rc4 - Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild From 480feaf12cf59a7a03d83c86aa8e4a1e908088ca Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 15 Aug 2024 13:26:54 +0100 Subject: [PATCH 264/351] 2024.10 RC2 --- uboot-tools.spec | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index ee24ef7..47f8333 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2024.07 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2024.10 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -27,7 +27,7 @@ Patch3: uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch Patch4: disable-VBE-by-default.patch Patch5: enable-bootmenu-by-default.patch # Should be upstream but it's taking time -Patch6: Add-video-damage-tracking.patch +#Patch6: Add-video-damage-tracking.patch # Rockchips improvements Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch @@ -187,6 +187,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Thu Aug 15 2024 Peter Robinson - 1:2024.10-0.1.rc2 +- Update to 2024.10 RC2 + * Tue Jul 23 2024 Peter Robinson - 1:2024.07-1 - Update to 2024.07 From e4c7f912206cacc62b5c8b77275f107a857e8452 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 15 Aug 2024 18:55:21 +0100 Subject: [PATCH 265/351] upload source --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index 09f870f..4d7803b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.07.tar.bz2) = 678f44e2b9132140f0bf05c637e57e638c73c278611037a41824b3ebff2131af4dec0163da4664bb2e5c4fd8034ba8c95b93b57f7aa9f4c045da322d87c3b5e9 +SHA512 (u-boot-2024.10-rc2.tar.bz2) = 606b48ef1fbd67fcd686b68540eb6db9453f9a02af16fc244add9fd5b75743bd776e2a3806192345b8d6eaa0f6ba3a1322623e3254c1d511d8ee524f7515e8b3 From d4601d22550dffe75d725465661a7c7cd73e11b9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 15 Aug 2024 20:12:14 +0100 Subject: [PATCH 266/351] add xxd --- uboot-tools.spec | 1 + 1 file changed, 1 insertion(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index 47f8333..5f2aaa7 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -53,6 +53,7 @@ BuildRequires: swig %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 BuildRequires: python3-pyelftools +BuildRequires: xxd %endif %endif Requires: dtc From ddf286405650610596a91c2ebec620ba1fb17cb2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 27 Aug 2024 15:57:40 +0100 Subject: [PATCH 267/351] 2024.10 RC3, initial QCM6490 support --- ...support-for-SC7280-and-the-RB3-Gen-2.patch | 1414 +++++++++++++++++ aarch64-boards | 1 + sources | 2 +- uboot-tools.spec | 10 +- 4 files changed, 1424 insertions(+), 3 deletions(-) create mode 100644 Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch diff --git a/Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch b/Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch new file mode 100644 index 0000000..0dec1ea --- /dev/null +++ b/Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch @@ -0,0 +1,1414 @@ +From patchwork Wed Aug 21 13:41:46 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit 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drivers/clk/qcom/clock-qcom.h | 1 + + drivers/clk/qcom/clock-sc7280.c | 132 ++++++++++++++++++++++++++++++++++++++++ + 4 files changed, 142 insertions(+) + +diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig +index 45d63c6d6dbf..0d2c0ac225c5 100644 +--- a/drivers/clk/qcom/Kconfig ++++ b/drivers/clk/qcom/Kconfig +@@ -85,7 +85,15 @@ config CLK_QCOM_SM8650 + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SM8650 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + ++config CLK_QCOM_SC7280 ++ bool "Qualcomm SC7280 GCC" ++ select CLK_QCOM ++ help ++ Say Y here to enable support for the Global Clock Controller ++ on the Snapdragon SC7280 SoC. This driver supports the clocks ++ and resets exposed by the GCC hardware block. ++ + endmenu + + endif +diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile +index dec20e4b5943..e223c131ee4d 100644 +--- a/drivers/clk/qcom/Makefile ++++ b/drivers/clk/qcom/Makefile +@@ -8,8 +8,9 @@ obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o + obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o + obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o + obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o + obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o ++obj-$(CONFIG_CLK_QCOM_SC7280) += clock-sc7280.o + obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o + obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o + obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o + obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o +diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h +index f6445c8f566f..7aa6ca59aad5 100644 +--- a/drivers/clk/qcom/clock-qcom.h ++++ b/drivers/clk/qcom/clock-qcom.h +@@ -10,8 +10,9 @@ + #define CFG_CLK_SRC_CXO (0 << 8) + #define CFG_CLK_SRC_GPLL0 (1 << 8) + #define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8) + #define CFG_CLK_SRC_GPLL9 (2 << 8) ++#define CFG_CLK_SRC_GPLL0_ODD (3 << 8) + #define CFG_CLK_SRC_GPLL6 (4 << 8) + #define CFG_CLK_SRC_GPLL7 (3 << 8) + #define CFG_CLK_SRC_GPLL4 (5 << 8) + #define CFG_CLK_SRC_GPLL0_EVEN (6 << 8) +diff --git a/drivers/clk/qcom/clock-sc7280.c b/drivers/clk/qcom/clock-sc7280.c +new file mode 100644 +index 000000000000..5d343f120519 +--- /dev/null ++++ b/drivers/clk/qcom/clock-sc7280.c +@@ -0,0 +1,132 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Clock drivers for Qualcomm sc7280 ++ * ++ * (C) Copyright 2024 Linaro Ltd. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "clock-qcom.h" ++ ++#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038 ++#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020 ++ ++static ulong sc7280_set_rate(struct clk *clk, ulong rate) ++{ ++ struct msm_clk_priv *priv = dev_get_priv(clk->dev); ++ ++ if (clk->id < priv->data->num_clks) ++ debug("%s: %s, requested rate=%ld\n", __func__, priv->data->clks[clk->id].name, rate); ++ ++ switch (clk->id) { ++ case GCC_USB30_PRIM_MOCK_UTMI_CLK: ++ WARN(rate != 19200000, "Unexpected rate for USB30_PRIM_MOCK_UTMI_CLK: %lu\n", rate); ++ clk_rcg_set_rate(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, 0, CFG_CLK_SRC_CXO); ++ return rate; ++ case GCC_USB30_PRIM_MASTER_CLK: ++ WARN(rate != 200000000, "Unexpected rate for USB30_PRIM_MASTER_CLK: %lu\n", rate); ++ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, ++ 1, 0, 0, CFG_CLK_SRC_GPLL0_ODD, 8); ++ clk_rcg_set_rate(priv->base, 0xf064, 0, 0); ++ return rate; ++ default: ++ return 0; ++ } ++} ++ ++static const struct gate_clk sc7280_clks[] = { ++ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0xf07c, 1), ++ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0xf010, 1), ++ GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0xf080, 1), ++ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0xf018, 1), ++ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0xf01c, 1), ++ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0xf054, 1), ++ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0xf058, 1), ++}; ++ ++static int sc7280_enable(struct clk *clk) ++{ ++ struct msm_clk_priv *priv = dev_get_priv(clk->dev); ++ ++ if (priv->data->num_clks < clk->id) { ++ debug("%s: unknown clk id %lu\n", __func__, clk->id); ++ return 0; ++ } ++ ++ debug("%s: clk %ld: %s\n", __func__, clk->id, sc7280_clks[clk->id].name); ++ ++ switch (clk->id) { ++ case GCC_AGGRE_USB3_PRIM_AXI_CLK: ++ qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); ++ fallthrough; ++ case GCC_USB30_PRIM_MASTER_CLK: ++ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); ++ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); ++ break; ++ } ++ ++ qcom_gate_clk_en(priv, clk->id); ++ ++ return 0; ++} ++ ++static const struct qcom_reset_map sc7280_gcc_resets[] = { ++ [GCC_PCIE_0_BCR] = { 0x6b000 }, ++ [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, ++ [GCC_PCIE_1_BCR] = { 0x8d000 }, ++ [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, ++ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, ++ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, ++ [GCC_SDCC1_BCR] = { 0x75000 }, ++ [GCC_SDCC2_BCR] = { 0x14000 }, ++ [GCC_SDCC4_BCR] = { 0x16000 }, ++ [GCC_UFS_PHY_BCR] = { 0x77000 }, ++ [GCC_USB30_PRIM_BCR] = { 0xf000 }, ++ [GCC_USB30_SEC_BCR] = { 0x9e000 }, ++ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, ++ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, ++ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, ++ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, ++}; ++ ++static const struct qcom_power_map sc7280_gdscs[] = { ++ [GCC_UFS_PHY_GDSC] = { 0x77004 }, ++ [GCC_USB30_PRIM_GDSC] = { 0xf004 }, ++}; ++ ++static struct msm_clk_data qcs404_gcc_data = { ++ .resets = sc7280_gcc_resets, ++ .num_resets = ARRAY_SIZE(sc7280_gcc_resets), ++ .clks = sc7280_clks, ++ .num_clks = ARRAY_SIZE(sc7280_clks), ++ ++ .power_domains = sc7280_gdscs, ++ .num_power_domains = ARRAY_SIZE(sc7280_gdscs), ++ ++ .enable = sc7280_enable, ++ .set_rate = sc7280_set_rate, ++}; ++ ++static const struct udevice_id gcc_sc7280_of_match[] = { ++ { ++ .compatible = "qcom,gcc-sc7280", ++ .data = (ulong)&qcs404_gcc_data, ++ }, ++ { } ++}; ++ ++U_BOOT_DRIVER(gcc_sc7280) = { ++ .name = "gcc_sc7280", ++ .id = UCLASS_NOP, ++ .of_match = gcc_sc7280_of_match, ++ .bind = qcom_cc_bind, ++ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, ++}; + +From patchwork Wed Aug 21 13:41:47 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Caleb Connolly +X-Patchwork-Id: 1974971 +X-Patchwork-Delegate: caleb.connolly@linaro.org +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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+ Wed, 21 Aug 2024 06:41:55 -0700 (PDT) +From: Caleb Connolly +Date: Wed, 21 Aug 2024 15:41:47 +0200 +Subject: [PATCH v2 2/7] dts: qcs6490-rb3gen2-u-boot: add override dtsi +MIME-Version: 1.0 +Message-Id: <20240821-b4-rb3gen2-v2-2-49b07633f3a8@linaro.org> +References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +To: Tom Rini , Lukasz Majewski , + Sean Anderson , + Caleb Connolly , + Neil Armstrong , + Sumit Garg +Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io +X-Mailer: b4 0.14-dev +X-Developer-Signature: v=1; a=openpgp-sha256; l=1273; + i=caleb.connolly@linaro.org; h=from:subject:message-id; + bh=WycUvGIX1Vb2Dt9TSRhlFTIc8lgmewYYBQWg2kxs6NI=; + b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6djNLXRIVPQZZW1FVYvOn/tPtr3vGLbnTcN + EIiqQUfY2uJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k + tnN7D/0d90bQBLWvZQ8d0lHinZ/3zwe3FEdaLK31OGRD7VJd7Q8ckuOxOF/eO8TLmksQovgvrTY + 68llyxkNZe/nnmY9UX+DJ+i5pzqINuLlGRqANukMePwwJxJZilb6dRXB9sR+hSBHC+YTyfY67xk + 78ILyZhMmZqmi/ya6lBqxLieP+CnHq1V9n07s3jljhE1oSp4NucQzFXpv48MGEpOt/sIyjtzQ5w + aw7r1Wsay9w+xmNly+kBT+05q5dp/CTnqMp1koKGG/fWWkSZUgo5yODYeRAiieb7ZQ5JaVmxJkf + G3K0BPkFJ+kaPyU6Mbe0d573tY+oZsWDWEBFP/diduz8lw27tIDOmpTIyT8lMsu1vL7dcj38NsS + 50a7smXimMWcKwJsEQV32Tw0QYv4kfJyqjxXVj6kJ+DWL1bm15LZ6fZpXy3tbTHzJvWRr2Lx/AZ + mWXbylc+uUx4tQkb+7+OhSN376NPfWUNlGHMdHSfQHgzcFuGbMmf9v58sPXa7ZKb3UFkKk2MAzA + 8kiDEMgp/6k55lHxdc4ndxK/vXTKxiU59H2k+okeAQ2iMnA39r/M7yOe6a8vyXDyeuCmJHncNAX + /Uy4yr757EQpUKygo3DjdfRcZQ/h5hQ2TFiWm3BlU87k8MlQl5JEGwxqpkM+9JXFjRwiGcR2ZSO + fOkmL+X6FXNHw3A== +X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; + fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +For running U-Boot as primary bootloader we must define the memory +layout statically. + +Signed-off-by: Caleb Connolly +--- + arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi +new file mode 100644 +index 000000000000..c3ec4a317f7c +--- /dev/null ++++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi +@@ -0,0 +1,23 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2024 Linaro Ltd. ++ */ ++/ { ++ /* When running as the primary bootloader there is no prior ++ * stage to populate the memory layout for us. We *should* ++ * have two nodes here, but ABL does NOT like that. ++ * sooo we're stuck with this. ++ */ ++ memory@80000000 { ++ device_type = "memory"; ++ reg = <0 0x80000000 0 0x3A800000>, ++ <0 0xC0000000 0 0x01800000>, ++ <0 0xC3400000 0 0x3CC00000>, ++ <1 0x00000000 1 0x00000000>; ++ }; ++}; ++ ++// RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 ++// RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 ++// RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 ++// RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 + +From patchwork Wed Aug 21 13:41:48 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Caleb Connolly +X-Patchwork-Id: 1974972 +X-Patchwork-Delegate: caleb.connolly@linaro.org +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 + header.s=google header.b=W/enKPtj; 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+ Wed, 21 Aug 2024 06:41:56 -0700 (PDT) +From: Caleb Connolly +Date: Wed, 21 Aug 2024 15:41:48 +0200 +Subject: [PATCH v2 3/7] dts: qcs6490-rb3gen2-u-boot: USB host mode +MIME-Version: 1.0 +Message-Id: <20240821-b4-rb3gen2-v2-3-49b07633f3a8@linaro.org> +References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +To: Tom Rini , Lukasz Majewski , + Sean Anderson , + Caleb Connolly , + Neil Armstrong , + Sumit Garg +Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io +X-Mailer: b4 0.14-dev +X-Developer-Signature: v=1; a=openpgp-sha256; l=955; + i=caleb.connolly@linaro.org; h=from:subject:message-id; + bh=HTbXxsrMd17GClJdrUxqmv1t42K8cKHfbuWdCzpCB0M=; + b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6djkazDSIeIn+UGkfv2WCzgyN2+Nv9IFp8u + /7f/kVTNzKJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k + tt0qEACLN54DQLVEpmwhpZIBzCPjtaeMTHKNrVejy201O3Ts9I8BmKyuCQmcJReF8E1oTvhVE2p + RRdEnopYd86hGyIc6pZZ1tNwmwCxeADAERIygNKEAGK6f6v29CJZt0OMSVRx7emdUn6wDP0/6FQ + W7zfmxJKZMNp1gEMS80FJSa+PkI148T6WzfmKEfNbENYTwwIwC/e8yqlKXp+joiPv269f/nYbtY + ZR6mW3re0fvIoCbUjHcIRmu5ZWB92qqfwAiSCLLlajpzIF8iDrDyOYOdb7/TxM5eWZloPwDYHaK + 0eJde2EIysMA1TJFP8ynVnUe1c4sZxDLB+ZnVUpbvGTvHjguamxfazEZlUmd1kV6m+ilTqAIlUP + 2v5eY2KUjx+MD8qm5FLgpj6JHDE9jszg3LSETAPwJDk0MICXQoY9HMu03kO8KE62j2HrRwVn7/G + i1agSOBRJyNDHqTiUh2vYQnwwBPANZPjipnQgPkZ6Ebd98KbzzHr9Dh+kR7eC/caSf0V82YK4G8 + mPCaznXAPS+VNfT+JZQxQz7Axm1O7bWfIuSdLGqVGBRj4+4W3k1PzFWI7S46Vj4qWbpJXuWKl6I + UlE67yw71FwYzQt6B7xLMSCr2O8bFmlv42AVl6bNjG53CZ8HmBo5AuKrhbdhpLv5HfjWK1j58tW + Ci+WPJUvj2lPPfg== +X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; + fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Adjust DTS so USB runs in host mode. The type-c port is the only +supported port (since the others need PCIe). Booting from USB is +possible with a powered type-c dock. + +Signed-off-by: Caleb Connolly +--- + arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi +index c3ec4a317f7c..fbe72595f5ac 100644 +--- a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi ++++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi +@@ -16,8 +16,13 @@ + <1 0x00000000 1 0x00000000>; + }; + }; + ++&usb_1_dwc3 { ++ dr_mode = "host"; ++ /delete-property/ usb-role-switch; ++}; ++ + // RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 + // RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 + // RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 + // RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 + +From patchwork Wed Aug 21 13:41:49 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Caleb Connolly +X-Patchwork-Id: 1974973 +X-Patchwork-Delegate: caleb.connolly@linaro.org +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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+ Wed, 21 Aug 2024 06:41:57 -0700 (PDT) +From: Caleb Connolly +Date: Wed, 21 Aug 2024 15:41:49 +0200 +Subject: [PATCH v2 4/7] iommu: qcom-smmu: add sc7280-smmu-500 compatible +MIME-Version: 1.0 +Message-Id: <20240821-b4-rb3gen2-v2-4-49b07633f3a8@linaro.org> +References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +To: Tom Rini , Lukasz Majewski , + Sean Anderson , + Caleb Connolly , + Neil Armstrong , + Sumit Garg +Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io +X-Mailer: b4 0.14-dev +X-Developer-Signature: v=1; a=openpgp-sha256; l=735; + i=caleb.connolly@linaro.org; h=from:subject:message-id; + bh=kxKBScKaYeuETfEZtkdyvgk1CIJk9dkzDtE1GYwaPOI=; + b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6dVYUKBuKYzxniyjNVxYEoPmLImzpJJVKSN + fZ8OGllgq+JAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k + thhHD/sEX0G2aVw1Y8dD02U8Fg111EK/PNvDyUlifhchP/sTDJHxyzWJc0zxsb1FtSosTWlnv1i + tgFSLVCLklzMwrcUCZb5Fe/9bWGRL6Uz0dEbDXZohGWagR4SC9MoM/shyb6R7Xm2ywwaR1dBkHM + alh2af0YAoJi0TljeQz70GlUCBAyLiLhLD9/V7JDfkdAgUj1R7tGibGbz7plVk1ySD/JUbXLyRD + Oj3l66FUGleJAA+KrvbPR5sVcA8Zt+Mak0xp5xyjQ0T8TUNfwJF0VUgWEpiVHWZGPgOgw2OnE5U + Iv4mBGteHGHC0WjCdjt/thyn2+QCx/LjPwrBDrsyw6FFyg43yWEmDkEgfCiTDSHMtTMSPLvYbXM + b00Egv5OZrrhIGahpHxdd2Ui/6zicLanexZopGSaMu4DnMnhfm7GGdRxNphtP9VMWwgy+vePa+a + ghVuG+oIgtIOoEwE/SN2zBpMIxLNuzTi3c80xsxh6uA+5VH9X937eNFlB0fouXJjG27Jo4NSbKL + oeSE2rLXYtJ2bCV0ee7E5InyvUsdzHynjewLM0usEvnFHn433yCibXdQ1VjAZJVOJlFwxt85evc + Y/3ckT+iau+N7Z8un7Vhsp2FKf/IR5/QGd1NrfOyZuZ4V3ojqtD71Hymz1874HoW492BdpUytut + 5WHbOvM4jWAm5dQ== +X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; + fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +This soc doesn't have the generic compatible. + +Reviewed-by: Neil Armstrong +Signed-off-by: Caleb Connolly +Reviewed-by: Simon Glass +--- + drivers/iommu/qcom-hyp-smmu.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c +index 7b646d840dd4..1b5a09bb7b39 100644 +--- a/drivers/iommu/qcom-hyp-smmu.c ++++ b/drivers/iommu/qcom-hyp-smmu.c +@@ -380,8 +380,9 @@ static struct iommu_ops qcom_smmu_ops = { + }; + + static const struct udevice_id qcom_smmu500_ids[] = { + { .compatible = "qcom,sdm845-smmu-500" }, ++ { .compatible = "qcom,sc7280-smmu-500" }, + { .compatible = "qcom,smmu-500", }, + { /* sentinel */ } + }; + + +From patchwork Wed Aug 21 13:41:50 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Caleb Connolly +X-Patchwork-Id: 1974974 +X-Patchwork-Delegate: caleb.connolly@linaro.org +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 + header.s=google header.b=yOMaz64l; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Wpnb85tThz1yXf + for ; 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a=openpgp; + fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Introduce a defconfig for the RB3 Gen 2 and other QCM6490 boards with a +dedicated uefi partition. These can replace EDK2 entirely with U-Boot. + +Signed-off-by: Caleb Connolly +Reviewed-by: Simon Glass +--- + MAINTAINERS | 1 + + configs/qcm6490_defconfig | 18 ++++++++++++++++++ + 2 files changed, 19 insertions(+) + +diff --git a/MAINTAINERS b/MAINTAINERS +index daaf0345d0e8..7ab39d91a553 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -616,8 +616,9 @@ M: Neil Armstrong + R: Sumit Garg + L: u-boot-qcom@groups.io + S: Maintained + T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git ++F: configs/qcm6490_defconfig + F: drivers/*/*/pm8???-* + F: drivers/gpio/msm_gpio.c + F: drivers/mmc/msm_sdhci.c + F: drivers/phy/msm8916-usbh-phy.c +diff --git a/configs/qcm6490_defconfig b/configs/qcm6490_defconfig +new file mode 100644 +index 000000000000..25413ac9ed5a +--- /dev/null ++++ b/configs/qcm6490_defconfig +@@ -0,0 +1,18 @@ ++# Configuration for building U-Boot to be flashed ++# to the uefi partition of QCM6490 dev boards with ++# the "Linux Embedded" partition layout (which have ++# a dedicated "uefi" partition for edk2/U-Boot) ++ ++#include "qcom_defconfig" ++ ++CONFIG_DEBUG_UART=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_BASE=0x994000 ++CONFIG_DEBUG_UART_MSM_GENI=y ++CONFIG_DEBUG_UART_CLOCK=14745600 ++ ++# Address where U-Boot will be loaded ++CONFIG_TEXT_BASE=0x9fc00000 ++CONFIG_REMAKE_ELF=y ++ ++CONFIG_DEFAULT_DEVICE_TREE="qcom/qcs6490-rb3gen2" + +From patchwork Wed Aug 21 13:41:52 2024 +Content-Type: text/plain; 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+ Wed, 21 Aug 2024 06:42:01 -0700 (PDT) +Received: from [192.168.0.113] ([2a02:8109:aa0d:be00::676e]) + by smtp.gmail.com with ESMTPSA id + a640c23a62f3a-a83839342f6sm904164066b.137.2024.08.21.06.42.00 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 21 Aug 2024 06:42:01 -0700 (PDT) +From: Caleb Connolly +Date: Wed, 21 Aug 2024 15:41:52 +0200 +Subject: [PATCH v2 7/7] doc: board/qualcomm: document rb3gen2 + building/flashing +MIME-Version: 1.0 +Message-Id: <20240821-b4-rb3gen2-v2-7-49b07633f3a8@linaro.org> +References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> +To: Tom Rini , Lukasz Majewski , + Sean Anderson , + Caleb Connolly , + Neil Armstrong , + Sumit Garg +Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io +X-Mailer: b4 0.14-dev +X-Developer-Signature: v=1; a=openpgp-sha256; l=3002; + i=caleb.connolly@linaro.org; h=from:subject:message-id; + bh=Zfbm5IKZooOMQaYWVdjsboSGnZBH9tpLor1DsgqeCLA=; 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SPDX-License-Identifier: GPL-2.0+ ++.. sectionauthor:: Caleb Connolly ++ ++Qualcomm Robotics RB3 Gen 2 ++=========================== ++ ++The RB3 Gen 2 is a development board based on the Qualcomm QCM6490 SoC (a derivative ++of SC7280). More information can be found on `Qualcomm's product page`_. ++ ++U-Boot can be used as a replacement for Qualcomm's original EDK2 bootloader by ++flashing it directly to the uefi_a (or _b) partition. ++ ++.. _Qualcomm's product page: https://www.qualcomm.com/developer/hardware/rb3-gen-2-development-kit ++ ++Installation ++------------ ++First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``qcm6490``:: ++ ++ $ export CROSS_COMPILE= ++ $ make qcm6490_defconfig ++ $ make -j8 ++ ++This will build ``u-boot.elf`` in the configured output directory. ++ ++Although the RB3 Gen 2 does not have secure boot set up by default, ++the firmware still expects firmware ELF images to be "signed". The signature ++does not provide any security in this case, but it provides the firmware with ++some required metadata. ++ ++To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: ++ ++ $ qtestsign -v6 aboot -o u-boot.mbn u-boot.elf ++ ++Then install the resulting ``u-boot.mbn`` to the ``uefi_a`` partition ++on your device with ``fastboot flash uefi_a u-boot.mbn``. ++ ++U-Boot should be running after a reboot (``fastboot reboot``). ++ ++Note that fastboot is not yet supported in U-Boot on this board, as a result, ++to flash back the original firmware, or new versoins of the U-Boot, EDL mode ++must be used. This can be accessed by pressing the EDL mode button as described ++in the Qualcomm Linux documentation. A tool like bkerler's `edl`_ can be used ++for flashing with the firehose loader binary appropriate for the board. ++ ++.. _qtestsign: https://github.com/msm8916-mainline/qtestsign ++.. _edl: https://github.com/bkerler/edl ++ ++Usage ++----- ++ ++The USB Type-A ports are connected via a PCIe USB hub, which is not supported yet. ++However, the Type-C port can be used with a powered USB dock to connect peripherals ++like a USB stick. diff --git a/aarch64-boards b/aarch64-boards index 2087102..9cdccef 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -75,6 +75,7 @@ pinetab poplar puma-rk3399 qcom +qcm6490 qemu_arm64 roc-cc-rk3328 rock-4c-plus-rk3399 diff --git a/sources b/sources index 4d7803b..a81cb70 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10-rc2.tar.bz2) = 606b48ef1fbd67fcd686b68540eb6db9453f9a02af16fc244add9fd5b75743bd776e2a3806192345b8d6eaa0f6ba3a1322623e3254c1d511d8ee524f7515e8b3 +SHA512 (u-boot-2024.10-rc3.tar.bz2) = 3787a2b7333881c66fe1d1e5de2a83914bef9b00a584a9cbbdb791ca2f4ae0398f24acb2e8c4df8aa8a396f2c4a9005b590c928890a3bdf996ed0ed3f9a16330 diff --git a/uboot-tools.spec b/uboot-tools.spec index 5f2aaa7..9682fbd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc2 +%global candidate rc3 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -31,6 +31,8 @@ Patch5: enable-bootmenu-by-default.patch # Rockchips improvements Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch +# QCom +Patch11: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch BuildRequires: bc BuildRequires: bison @@ -188,6 +190,10 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Aug 27 2024 Peter Robinson - 1:2024.10-0.2.rc3 +- Update to 2024.10 RC3 +- Enable initial QCM6490 SoC support + * Thu Aug 15 2024 Peter Robinson - 1:2024.10-0.1.rc2 - Update to 2024.10 RC2 From 9767fcde4a18cd56a753dbf20b4dc167443fd2f0 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 2 Sep 2024 16:38:20 +0100 Subject: [PATCH 268/351] A number of fixes - Fix Allwinner firmware chainloading (rhbz#2309138) - Fix ATF firmware selection on a number of devices - Support Allwinner SCP firmware (fixes suspend/resume) --- aarch64-boards | 5 ++++- uboot-tools.spec | 33 ++++++++++++++++++++++++++------- 2 files changed, 30 insertions(+), 8 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index 9cdccef..0530e42 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -16,6 +16,7 @@ ficus-rk3399 firefly-rk3399 geekbox hikey +hmibsc khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 @@ -57,6 +58,7 @@ orangepi-r1-plus-rk3328 orangepi-rk3399 orangepi_win orangepi_zero2 +orangepi_zero2w orangepi_zero3 orangepi_zero_plus orangepi_zero_plus2 @@ -74,8 +76,8 @@ pinephone-pro-rk3399 pinetab poplar puma-rk3399 -qcom qcm6490 +qcom qemu_arm64 roc-cc-rk3328 rock-4c-plus-rk3399 @@ -85,6 +87,7 @@ rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-e-rk3328 +rock-pi-e-v3-rk3328 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 diff --git a/uboot-tools.spec b/uboot-tools.spec index 9682fbd..4c8fb22 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -54,6 +54,7 @@ BuildRequires: swig %if %{with toolsonly} %ifarch aarch64 BuildRequires: arm-trusted-firmware-armv8 +BuildRequires: crust-firmware BuildRequires: python3-pyelftools BuildRequires: xxd %endif @@ -94,27 +95,40 @@ do mkdir builds/$(echo $board)/ # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome - sun50i=(a64-olinuxino a64-olinuxino-emmc amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 oceanic_5205_5inmfd orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i) + sun50i=(a64-olinuxino a64-olinuxino-emmc amarula_a64_relic bananapi_m64 nanopi_a64 oceanic_5205_5inmfd orangepi_win pine64-lts pine64_plus pine64_plus pinebook pinephone pinephone pinetab sopine_baseboard teres_i) if [[ " ${sun50i[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_a64" cp /usr/share/arm-trusted-firmware/sun50i_a64/bl31.bin builds/$(echo $board)/atf-bl31 + cp /usr/share/crust-firmware/a64/scp.bin builds/$(echo $board)/ + fi + sun50h5=(bananapi_m2_plus_h5 emlid_neutis_n5_devboard libretech_all_h3_cc_h5 libretech_all_h3_it_h5 libretech_all_h5_cc_h5 nanopi_neo2 nanopi_neo_plus2 nanopi_r1s_h5 orangepi_pc2 orangepi_prime orangepi_zero_plus2 orangepi_zero_plus) + if [[ " ${sun50h5[*]} " == *" $board "* ]]; then + echo "Board: $board using sun50i_h6" + cp /usr/share/arm-trusted-firmware/sun50i_a64/bl31.bin builds/$(echo $board)/atf-bl31 + cp /usr/share/crust-firmware/h5/scp.bin builds/$(echo $board)/ fi sun50h6=(beelink_gs1 emlid_neutis_n5_devboard orangepi_3 orangepi_lite2 orangepi_one_plus pine_h64 tanix_tx6) if [[ " ${sun50h6[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/bl31.bin builds/$(echo $board)/atf-bl31 + cp /usr/share/crust-firmware/h6/scp.bin builds/$(echo $board)/ fi - sun50i_h616=(orangepi_zero2 orangepi_zero3 transpeed-8k618-t x96_mate) + sun50i_h616=(orangepi_zero2 orangepi_zero2w orangepi_zero3 transpeed-8k618-t x96_mate) if [[ " ${sun50i_h616[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h616" cp /usr/share/arm-trusted-firmware/sun50i_h616/bl31.bin builds/$(echo $board)/atf-bl31 fi - rk3328=(evb-rk3328 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 nanopi-r2s-rk3328 orangepi-r1-plus-lts-rk3328 orangepi-r1-plus-rk3328 roc-cc-rk3328 rock64-rk3328 rock-pi-e-rk3328) + rk3328=(evb-rk3328 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 nanopi-r2s-rk3328 orangepi-r1-plus-lts-rk3328 orangepi-r1-plus-rk3328 roc-cc-rk3328 rock64-rk3328 rock-pi-e-rk3328 rock-pi-e-v3-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/bl31.elf builds/$(echo $board)/atf-bl31 fi - rk3399=(eaidk-610-rk3399 evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) + rk3368=(evb-px5 geekbox) + if [[ " ${rk3368[*]} " == *" $board "* ]]; then + echo "Board: $board using rk3368" + cp /usr/share/arm-trusted-firmware/rk3368/bl31.elf builds/$(echo $board)/atf-bl31 + fi + rk3399=(eaidk-610-rk3399 evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock-4c-plus-rk3399 rock-4se-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -122,8 +136,8 @@ do fi # End ATF - BINMAN_ALLOW_MISSING=1 make $(echo $board)_defconfig O=builds/$(echo $board)/ - BINMAN_ALLOW_MISSING=1 %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ + make $(echo $board)_defconfig O=builds/$(echo $board)/ + BL31=builds/$(echo $board)/atf-bl31 %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/ done @@ -190,6 +204,11 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Mon Sep 02 2024 Peter Robinson - 1:2024.10-0.3.rc3 +- Fix Allwinner firmware chainloading (rhbz#2309138) +- Fix ATF firmware selection on a number of devices +- Support Allwinner SCP firmware (fixes suspend/resume) + * Tue Aug 27 2024 Peter Robinson - 1:2024.10-0.2.rc3 - Update to 2024.10 RC3 - Enable initial QCM6490 SoC support From 53b4b4d5397ad2c1f8b34cc53321c10cb565cc1e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 5 Sep 2024 20:18:57 +0100 Subject: [PATCH 269/351] 2024.10 RC4 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index a81cb70..3c6cf70 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10-rc3.tar.bz2) = 3787a2b7333881c66fe1d1e5de2a83914bef9b00a584a9cbbdb791ca2f4ae0398f24acb2e8c4df8aa8a396f2c4a9005b590c928890a3bdf996ed0ed3f9a16330 +SHA512 (u-boot-2024.10-rc4.tar.bz2) = 31869a7a6c6592ffe73b2f71c4985ace8beee33b232f4e8cbb8d2ebcee9b08d7bedeb57ca7e36cbadf42df44283b0ba79e87b55b1b2f94f2cc4a01cbce747cf7 diff --git a/uboot-tools.spec b/uboot-tools.spec index 4c8fb22..195029d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc3 +%global candidate rc4 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -204,6 +204,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Sep 03 2024 Peter Robinson - 1:2024.10-0.4.rc4 +- Update to 2024.10 RC4 + * Mon Sep 02 2024 Peter Robinson - 1:2024.10-0.3.rc3 - Fix Allwinner firmware chainloading (rhbz#2309138) - Fix ATF firmware selection on a number of devices From 92653178449939bea35dab846ab09ee61e8f6728 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 20 Sep 2024 09:44:17 +0100 Subject: [PATCH 270/351] Add missing licenses directory --- uboot-tools.spec | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 195029d..02850f0 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -190,6 +190,7 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} ( cd %{buildroot}%{_bindir}; ln -sf fw_printenv fw_setenv ) %files +%license Licenses/* %doc README doc/develop/distro.rst doc/README.gpt %doc doc/develop/uefi doc/usage doc/arch/arm64.rst %{_bindir}/* @@ -198,12 +199,16 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %if %{with toolsonly} %ifarch aarch64 %files -n uboot-images-armv8 +%license Licenses/* %dir %{_datadir}/uboot/ %{_datadir}/uboot/* %endif %endif %changelog +* Fri Sep 20 2024 Peter Robinson - 1:2024.10-0.5.rc4 +- Add missing licenses directory + * Tue Sep 03 2024 Peter Robinson - 1:2024.10-0.4.rc4 - Update to 2024.10 RC4 From 3cce66678269ec8a7f4b7404fd8cc3a032d812c3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 9 Sep 2024 05:42:54 +0100 Subject: [PATCH 271/351] trim changelog --- uboot-tools.spec | 386 ----------------------------------------------- 1 file changed, 386 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 02850f0..09f67c6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -271,389 +271,3 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} * Mon Jan 08 2024 Peter Robinson - 1:2024.01-1 - Update to 2024.01 - -* Thu Dec 07 2023 Peter Robinson - 1:2024.01-0.2.rc4 -- Update to 2024.01 RC4 -- Rebase SMBIOS patch to latest rev - -* Fri Nov 24 2023 Peter Robinson - 1:2024.01-0.1.rc3 -- Update to 2024.01 RC3 - -* Tue Oct 31 2023 Peter Robinson - 1:2023.10-0.9 -- Rebuild - -* Mon Oct 23 2023 Peter Robinson - 2023.10-0.8 -- Further potential upstream fixes - -* Mon Oct 02 2023 Peter Robinson - 2023.10-0.7 -- Update to 2023.10 GA -- Some upstream fixes - -* Mon Aug 21 2023 Peter Robinson - 2023.10-0.4.rc3 -- Update to 2023.10 RC3 - -* Mon Aug 21 2023 Peter Robinson - 2023.10-0.3.rc2 -- Add patch to speed up firmware UEFI video output - -* Sat Aug 19 2023 Peter Robinson - 2023.10-0.2.rc2 -- Add patch for Raspberry Pi boot - -* Fri Aug 18 2023 Peter Robinson - 2023.10-0.1.rc2 -- Update to 2023.10 RC2 - -* Sat Jul 22 2023 Fedora Release Engineering - 2023.07-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild - -* Tue Jul 11 2023 Peter Robinson - 2023.07-1 -- Update to 2023.07 GA - -* Fri Jun 16 2023 Peter Robinson - 2023.07-0.4.rc4 -- Disable NFS by default - -* Mon Jun 12 2023 Peter Robinson - 2023.07-0.3.rc4 -- Update to 2023.07 RC4 - -* Sun Jun 11 2023 Peter Robinson - 2023.07-0.2.rc3 -- Update to 2023.07 RC3 -- Fixes for the Pinephone Pro, RockPro64 - -* Wed May 17 2023 Peter Robinson - 2023.07-0.1.rc2 -- Update to 2023.07 RC2 - -* Tue Apr 04 2023 Peter Robinson - 2023.04-1 -- Update to 2023.04 GA - -* Tue Mar 28 2023 Peter Robinson - 2023.04-0.4.rc5 -- Update to 2023.04 RC5 -- Drop upstreamed patches -- Rockchip boot fixes - -* Tue Mar 14 2023 Peter Robinson - 2023.04-0.3.rc4 -- Update to 2023.04 RC4 - -* Fri Feb 17 2023 Peter Robinson - 2023.04-0.2.rc2 -- Update to 2023.04 RC2 - -* Tue Jan 31 2023 Peter Robinson - 2023.04-0.1.rc1 -- Update to 2023.04 RC1 -- Drop bmp_logo tool - -* Sat Jan 21 2023 Fedora Release Engineering - 2023.01-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild - -* Wed Jan 18 2023 Peter Robinson - 2023.01-1 -- Update to 2023.01 GA - -* Sat Dec 31 2022 Peter Robinson - 2023.01-0.4.rc4 -- Update PinePhone Pro to latest rev - -* Tue Dec 20 2022 Peter Robinson - 2023.01-0.3.rc4 -- Update to 2023.01 RC4 - -* Mon Dec 05 2022 Peter Robinson - 2023.01-0.2.rc3 -- Update to 2023.01 RC3 - -* Thu Nov 24 2022 Peter Robinson - 2023.01-0.1.rc2 -- Update to U-Boot 2023.01 RC2 -- Update Pinephone Pro patches - -* Mon Oct 10 2022 Peter Robinson - 2022.10-1 -- Update to 2022.10 GA - -* Tue Sep 06 2022 Peter Robinson - 2022.10-0.6.rc4 -- Update SMBIOS patch - -* Tue Sep 06 2022 Peter Robinson - 2022.10-0.5.rc4 -- Update to 2022.10 RC4 -- Fix for booting Rockchip devices from NVME - -* Tue Aug 23 2022 Peter Robinson - 2022.10-0.4.rc3 -- Update to 2022.10 RC3 - -* Mon Aug 22 2022 Davide Cavalca - 2022.10-0.3.rc1 -- Install nodtb variant for Apple M1 (rhbz#2068958) - -* Tue Aug 16 2022 Peter Robinson - 2022.10-0.2.rc1 -- Fix for DT property propogation via firmware - -* Thu Jul 28 2022 Peter Robinson - 2022.10-0.1.rc1 -- Update to 2022.10 RC1 -- Enable LTO for firmware builds - -* Sat Jul 23 2022 Fedora Release Engineering - 2022.07-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild - -* Sun Jul 17 2022 Peter Robinson - 2022.07-1 -- Update to 2022.07 GA - -* Mon Jul 04 2022 Peter Robinson - 2022.07-0.6.rc6 -- Update to 2022.07 RC6 - -* Mon Jun 20 2022 Peter Robinson - 2022.07-0.5.rc5 -- Update to 2022.07 RC5 - -* Sun Jun 12 2022 Peter Robinson - 2022.07-0.4.rc4 -- Update to 2022.07 RC4 -- Some minor Rockchips device fixes - -* Wed May 25 2022 Peter Robinson - 2022.07-0.3.rc3 -- Update to 2022.07 RC3 - -* Sat May 14 2022 Peter Robinson - 2022.07-0.2.rc2 -- Update to 2022.07 RC2 - -* Tue Apr 26 2022 Peter Robinson - 2022.07-0.1.rc1 -- Update to 2022.07 RC1 - -* Mon Apr 04 2022 Peter Robinson - 2022.04-1 -- Update to 2022.04 GA - -* Mon Mar 28 2022 Peter Robinson - 2022.04-0.4.rc5 -- Update to 2022.04 RC5 - -* Tue Mar 08 2022 Peter Robinson - 2022.04-0.3.rc3 -- Update to 2022.04 RC3 -- Enable new Rockchip devices - -* Tue Feb 15 2022 Peter Robinson - 2022.04-0.2.rc2 -- Update to 2022.04 RC2 - -* Wed Feb 02 2022 Peter Robinson - 2022.04-0.1.rc1 -- Update to 2022.04 RC1 - -* Sat Jan 22 2022 Fedora Release Engineering - 2022.01-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild - -* Mon Jan 10 2022 Peter Robinson - 2022.01-1 -- Update to 2022.01 - -* Wed Jan 05 2022 Peter Robinson - 2022.01-0.3.rc4 -- Upstream fixes for PHY and UEFI - -* Mon Dec 20 2021 Peter Robinson - 2022.01-0.2.rc4 -- Update to 2022.01 RC4 - -* Mon Nov 15 2021 Peter Robinson - 2022.01-0.1.rc2 -- Update to 2022.01 RC2 - -* Mon Nov 15 2021 Peter Robinson - 2021.10-3 -- Fixes for rk3399 devices - -* Thu Oct 14 2021 Peter Robinson - 2021.10-2 -- Fix booting from MMC for Rockchip 3399 (rhbz #2014182) -- Enable new rk3399 devices (Leez, NanoPi-M4B, NanoPi-4S, NanoPi-T4) (rhbz #2009126) - -* Mon Oct 04 2021 Peter Robinson - 2021.10-1 -- Update to 2021.10 - -* Mon Sep 27 2021 Peter Robinson - 2021.10-0.7.rc5 -- Update to 2021.10 RC5 - -* Wed Sep 15 2021 Peter Robinson - 2021.10-0.6.rc4 -- Update to 2021.10 RC4 -- Proposed fix for RPi MMC clock issue - -* Tue Sep 14 2021 Sahana Prasad - 2021.10-0.6.rc3 -- Rebuilt with OpenSSL 3.0.0 - -* Mon Aug 30 2021 Peter Robinson - 2021.10-0.5.rc3 -- Update to 2021.10 RC3 - -* Tue Aug 24 2021 Peter Robinson - 2021.10-0.4.rc2 -- Fix for Raspberry Pi firmware properties - -* Mon Aug 23 2021 Peter Robinson - 2021.10-0.3.rc2 -- Fix for rockchip SPI - -* Mon Aug 16 2021 Peter Robinson - 2021.10-0.2.rc2 -- Update to 2021.10 RC2 - -* Sun Aug 08 2021 Peter Robinson - 2021.10-0.1.rc1 -- Update to 2021.10 RC1 - -* Thu Jul 22 2021 Peter Robinson - 2021.07-2 -- Fix regression for Rockchip devices running firmware from SPI flash - -* Mon Jul 05 2021 Peter Robinson - 2021.07-1 -- Update to 2021.07 GA - -* Mon Jun 28 2021 Peter Robinson - 2021.07-0.6.rc5 -- Update to 2021.07 RC5 -- Build SPI fash images for ROC-PC-RK3399 - -* Mon Jun 07 2021 Peter Robinson - 2021.07-0.5.rc4 -- Update to 2021.07 RC4 - -* Sat Jun 05 2021 Peter Robinson - 2021.07-0.4.rc3 -- Fix AllWinner devices booting from mSD/MMC - -* Tue May 25 2021 Peter Robinson - 2021.07-0.3.rc3 -- Update to 2021.07 RC3 -- Build against ATF 2.5 GA - -* Thu May 13 2021 Peter Robinson - 2021.07-0.2.rc2 -- Build against new ATF 2.5-rc1 - -* Mon May 10 2021 Peter Robinson - 2021.07-0.1.rc2 -- Update to 2021.07 RC2 - -* Wed Apr 28 2021 Peter Robinson - 2021.04-3 -- Upstream fix for console regression (rhbz 1946278) -- Fix for fallback.efi crash (rhbz 1733817) - -* Wed Apr 21 2021 Peter Robinson - 2021.04-2 -- Revert keyboard console regression change (rhbz 1946278) - -* Sun Apr 18 2021 Peter Robinson - 2021.04-1 -- Update to 2021.04 GA -- Fix DTB load check (rhbz 1946278) -- Build Rockchip SPI support as idbloader.spi -- Fixes for Rockchip devices -- Build Turris Omnia for MMC/SPI/UART - -* Wed Mar 17 2021 Peter Robinson - 2021.04-0.6.rc4 -- Update to 2021.04 RC4 -- Move to upstream fix for SMP on RPi3B and RPi3B+ - -* Sat Mar 13 2021 Peter Robinson - 2021.04-0.5.rc3 -- Fix for SMP on RPi3B and RPi3B+ -- Initial support for Pinephone 3Gb edition - -* Mon Mar 08 2021 Peter Robinson - 2021.04-0.4.rc3 -- Update to 2021.04 RC3 - -* Tue Feb 16 2021 Peter Robinson - 2021.04-0.3.rc2 -- Update to 2021.04 RC2 - -* Mon Feb 15 2021 Dennis Gilmore -- build spi and uart images in addition to mmc for helios4 and clearfog - -* Wed Feb 10 2021 Peter Robinson - 2021.04-0.2.rc1 -- Fixes for network issues on some Allwinner devices - -* Mon Feb 01 2021 Peter Robinson - 2021.04-0.1.rc1 -- Update to 2021.04 RC1 -- Add new upstream devices - -* Wed Jan 27 2021 Fedora Release Engineering - 2021.01-2 -- Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild - -* Mon Jan 11 2021 Peter Robinson - 2021.01-1 -- Update to 2021.01 GA -- Updates for Raspberry Pi 4 Series of devices - -* Tue Jan 5 2021 Peter Robinson - 2021.01-0.5.rc5 -- Update to 2021.01 RC5 - -* Sun Dec 27 2020 Peter Robinson - 2021.01-0.4.rc4 -- Update to 2021.01 RC4 -- Latest RPi-400/CM4 support patch - -* Tue Dec 15 2020 Peter Robinson - 2021.01-0.3.rc3 -- Update to 2021.01 RC3 -- Latest RPi-400/CM4 support patch -- Re-enable previously disabled device support - -* Mon Dec 14 2020 Javier Martinez Canillas - 2021.01-0.2.rc2 -- Fix a "scan_dev_for_efi" not defined error - -* Sun Nov 22 2020 Peter Robinson - 2021.01-0.1.rc2 -- Update to 2021.01 RC2 -- Latest Pinebook Pro display patches -- Initial RPi-400 support patch -- Update Fedora specific patches - -* Sun Nov 8 2020 Peter Robinson - 2020.10-3 -- Fix SPI on Rockchip devices -- Latest Pinebook Pro display patches -- Fix Keyboard and USB-A ports on Pinebook Pro - -* Wed Oct 28 2020 Peter Robinson - 2020.10-2 -- Fix kernel installs for non EBBR systems -- Fix for wired networks on some Allwinner devices - -* Tue Oct 06 2020 Peter Robinson - 2020.10-1 -- Update to 2020.10 - -* Sun Sep 27 2020 Peter Robinson - 2020.10-0.6.rc5 -- Initial support for display output on Pinebook Pro - -* Tue Sep 22 2020 Peter Robinson - 2020.10-0.5.rc5 -- Update to 2020.10 RC5 - -* Wed Sep 09 2020 Peter Robinson - 2020.10-0.4.rc4 -- Update to 2020.10 RC4 - -* Wed Aug 19 2020 Peter Robinson - 2020.10-0.3.rc2 -- Enable a number of new Rockchip devices - -* Mon Aug 10 2020 Peter Robinson - 2020.10-0.2.rc2 -- Update to 2020.10 RC2 - -* Tue Jul 28 2020 Peter Robinson - 2020.10-0.1.rc1 -- 2020.10 RC1 - -* Tue Jul 14 2020 Tom Stellard - 2020.07-2 -- Use make macros -- https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro - -* Mon Jul 06 2020 Peter Robinson - 2020.07-1 -- 2020.07 GA - -* Tue Jun 23 2020 Peter Robinson - 2020.07-0.5.rc5 -- 2020.07 RC5 - -* Thu Jun 18 2020 Peter Robinson - 2020.07-0.4.rc4 -- Update various patches to latest upstream - -* Wed Jun 10 2020 Peter Robinson - 2020.07-0.3.rc4 -- 2020.07 RC4 -- Minor updates and other fixes - -* Tue May 12 2020 Peter Robinson - 2020.07-0.2.rc2 -- 2020.07 RC2 -- Minor device updates - -* Wed Apr 29 2020 Peter Robinson - 2020.07-0.1.rc1 -- 2020.07 RC1 - -* Tue Apr 21 2020 Peter Robinson - 2020.04-4 -- Initial support for USB on Rasperry Pi 4 - -* Tue Apr 21 2020 Peter Robinson - 2020.04-3 -- Ship u-boot-rockchip.bin for SPI flash - -* Mon Apr 20 2020 Peter Robinson - 2020.04-2 -- Fix ATF for new aarch64 devices -- Fix Wandboard board detection (rhbz 1825247) -- Fix mSD card on RockPro64 -- Enable (inital) Pinebook Pro - -* Tue Apr 14 2020 Peter Robinson - 2020.04-1 -- 2020.04 - -* Tue Apr 7 2020 Peter Robinson 2020.04-0.7-rc5 -- 2020.04 RC5 - -* Tue Mar 31 2020 Peter Robinson 2020.04-0.6-rc4 -- 2020.04 RC4 -- Updates for NVIDIA Jetson platforms -- Support RNG for random seed for KASLR on some Rockchip devices - -* Thu Mar 26 2020 Peter Robinson 2020.04-0.5-rc3 -- Fix ext4 alignment issue seen on some NXP i.MX devices - -* Wed Feb 26 2020 Peter Robinson 2020.04-0.4-rc3 -- 2020.04 RC3 - -* Thu Feb 13 2020 Peter Robinson 2020.04-0.3-rc2 -- 2020.04 RC2 - -* Sun Feb 2 2020 Peter Robinson 2020.04-0.2-rc1 -- Update genet NIC driver - -* Wed Jan 29 2020 Peter Robinson 2020.04-0.1-rc1 -- 2020.04 RC1 - -* Tue Jan 7 2020 Peter Robinson 2020.01-1 -- 2020.01 From 09ab1870db8190fa69b72e789165433cc9571a7a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 16 Sep 2024 22:18:24 +0100 Subject: [PATCH 272/351] 2024.10 RC5 --- FUSB302-USB-C-controller-support.patch | 6018 ++++++++++++++++++++++++ sources | 2 +- uboot-tools.spec | 10 +- 3 files changed, 6026 insertions(+), 4 deletions(-) create mode 100644 FUSB302-USB-C-controller-support.patch diff --git a/FUSB302-USB-C-controller-support.patch b/FUSB302-USB-C-controller-support.patch new file mode 100644 index 0000000..a25f8dd --- /dev/null +++ b/FUSB302-USB-C-controller-support.patch @@ -0,0 +1,6018 @@ +From patchwork Thu Sep 5 15:08:37 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sebastian Reichel +X-Patchwork-Id: 1981315 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=collabora.com header.i=@collabora.com + header.a=rsa-sha256 header.s=mail header.b=VOvjn+x1; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA 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core framework +Date: Thu, 5 Sep 2024 17:08:37 +0200 +Message-ID: <20240905151707.59101-2-sebastian.reichel@collabora.com> +X-Mailer: git-send-email 2.45.2 +In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> +References: <20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +This adds TCPM framework in preparation for fusb302 support, which can +handle USB power delivery messages. This is needed to solve issues with +devices, that are running from a USB-C port supporting USB-PD, but not +having a battery. + +Such a device currently boots to the kernel without interacting with +the power-supply at all. If there are no USB-PD message replies within +5 seconds, the power-supply assumes the peripheral is not capable of +USB-PD. It usually takes more than 5 seconds for the system to reach +the kernel and probe the I2C based fusb302 chip driver. Thus the +system always runs into this state. The power-supply's solution to +fix this error state is a hard reset, which involves removing the +power from VBUS. Boards without a battery (or huge capacitors) will +reset at this point resulting in a boot loop. + +This imports the TCPM framework from the kernel. The porting has +originally been done by Rockchip using hardware timers and the Linux +kernel's TCPM code from some years ago. + +I had a look at upgrading to the latest TCPM kernel code, but that +beast became a lot more complex due to adding more USB-C features. +I believe these features are not needed in U-Boot and with multiple +kthreads and hrtimers being involved it is non-trivial to port them. +Instead I worked on stripping down features from the Rockchip port +to an even more basic level. Also the TCPM code has been reworked +to avoid complete use of any timers (Rockchip used SoC specific +hardware timers + IRQ to implement delayed work mechanism). Instead +the delayed state changes are handled directly from the poll loop. + +Note, that (in contrast to the original Rockchip port) the state +machine has the same hard reset quirk, that the kernel has - i.e. +it avoids disabling the CC pin resistors for devices that are not +self-powered. Without that quirk, the Radxa Rock 5B will not just +end up doing a machine reset when a hard reset is triggered, but will +not even recover, because the CPU will loose power and the FUSB302 +will keep this state because of leak voltage arriving through the RX +serial pin (assuming a serial adapter is connected). + +This also includes a 'tcpm' command, which can be used to get +information about the current state and the negotiated voltage +and current. + +Co-developed-by: Wang Jie +Signed-off-by: Wang Jie +Tested-by: Soeren Moch +Signed-off-by: Sebastian Reichel +--- + Makefile | 1 + + cmd/Kconfig | 7 + + cmd/Makefile | 1 + + cmd/tcpm.c | 136 ++ + doc/usage/cmd/tcpm.rst | 66 + + doc/usage/index.rst | 1 + + drivers/usb/Kconfig | 2 + + drivers/usb/tcpm/Kconfig | 8 + + drivers/usb/tcpm/Makefile | 3 + + drivers/usb/tcpm/tcpm-internal.h | 173 +++ + drivers/usb/tcpm/tcpm-uclass.c | 149 ++ + drivers/usb/tcpm/tcpm.c | 2288 ++++++++++++++++++++++++++++++ + include/dm/uclass-id.h | 1 + + include/usb/pd.h | 516 +++++++ + include/usb/tcpm.h | 99 ++ + 15 files changed, 3451 insertions(+) + create mode 100644 cmd/tcpm.c + create mode 100644 doc/usage/cmd/tcpm.rst + create mode 100644 drivers/usb/tcpm/Kconfig + create mode 100644 drivers/usb/tcpm/Makefile + create mode 100644 drivers/usb/tcpm/tcpm-internal.h + create mode 100644 drivers/usb/tcpm/tcpm-uclass.c + create mode 100644 drivers/usb/tcpm/tcpm.c + create mode 100644 include/usb/pd.h + create mode 100644 include/usb/tcpm.h + +diff --git a/Makefile b/Makefile +index 74df5d177c1f..5a581199c170 100644 +--- a/Makefile ++++ b/Makefile +@@ -879,6 +879,7 @@ libs-y += drivers/usb/musb/ + libs-y += drivers/usb/musb-new/ + libs-y += drivers/usb/isp1760/ + libs-y += drivers/usb/phy/ ++libs-y += drivers/usb/tcpm/ + libs-y += drivers/usb/ulpi/ + ifdef CONFIG_POST + libs-y += post/ +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 978f44eda426..7710bee22ace 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -221,6 +221,13 @@ config CMD_REGINFO + help + Register dump + ++config CMD_TCPM ++ bool "tcpm" ++ depends on TYPEC_TCPM ++ help ++ Show voltage and current negotiated via USB PD as well as the ++ current state of the Type C Port Manager (TCPM) state machine. ++ + config CMD_TLV_EEPROM + bool "tlv_eeprom" + depends on I2C_EEPROM +diff --git a/cmd/Makefile b/cmd/Makefile +index 87133cc27a8a..bd0b23ef1013 100644 +--- a/cmd/Makefile ++++ b/cmd/Makefile +@@ -172,6 +172,7 @@ obj-$(CONFIG_CMD_SMBIOS) += smbios.o + obj-$(CONFIG_CMD_SMC) += smccc.o + obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o + obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o ++obj-$(CONFIG_CMD_TCPM) += tcpm.o + obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o + obj-$(CONFIG_CMD_TERMINAL) += terminal.o + obj-$(CONFIG_CMD_TIME) += time.o +diff --git a/cmd/tcpm.c b/cmd/tcpm.c +new file mode 100644 +index 000000000000..962cd234a869 +--- /dev/null ++++ b/cmd/tcpm.c +@@ -0,0 +1,136 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2024 Collabora ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define LIMIT_DEV 32 ++#define LIMIT_PARENT 20 ++ ++static struct udevice *currdev; ++ ++static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ char *name; ++ int ret = -ENODEV; ++ ++ switch (argc) { ++ case 2: ++ name = argv[1]; ++ ret = tcpm_get(name, &currdev); ++ if (ret) { ++ log_err("Can't get TCPM %s: %d (%s)!\n", name, ret, errno_str(ret)); ++ return CMD_RET_FAILURE; ++ } ++ case 1: ++ if (!currdev) { ++ log_err("TCPM device is not set!\n\n"); ++ return CMD_RET_USAGE; ++ } ++ ++ printf("dev: %d @ %s\n", dev_seq(currdev), currdev->name); ++ } ++ ++ return CMD_RET_SUCCESS; ++} ++ ++static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ struct udevice *dev; ++ int ret, err = 0; ++ ++ printf("| %-*.*s| %-*.*s| %s @ %s\n", ++ LIMIT_DEV, LIMIT_DEV, "Name", ++ LIMIT_PARENT, LIMIT_PARENT, "Parent name", ++ "Parent uclass", "seq"); ++ ++ for (ret = uclass_first_device_check(UCLASS_TCPM, &dev); dev; ++ ret = uclass_next_device_check(&dev)) { ++ if (ret) ++ err = ret; ++ ++ printf("| %-*.*s| %-*.*s| %s @ %d | status: %i\n", ++ LIMIT_DEV, LIMIT_DEV, dev->name, ++ LIMIT_PARENT, LIMIT_PARENT, dev->parent->name, ++ dev_get_uclass_name(dev->parent), dev_seq(dev->parent), ++ ret); ++ } ++ ++ if (err) ++ return CMD_RET_FAILURE; ++ ++ return CMD_RET_SUCCESS; ++} ++ ++int do_print_info(struct udevice *dev) ++{ ++ enum typec_orientation orientation = tcpm_get_orientation(dev); ++ const char *state = tcpm_get_state(dev); ++ int pd_rev = tcpm_get_pd_rev(dev); ++ int mv = tcpm_get_voltage(dev); ++ int ma = tcpm_get_current(dev); ++ enum typec_role pwr_role = tcpm_get_pwr_role(dev); ++ enum typec_data_role data_role = tcpm_get_data_role(dev); ++ bool connected = tcpm_is_connected(dev); ++ ++ if (!connected) { ++ printf("TCPM State: %s\n", state); ++ return 0; ++ } ++ ++ printf("Orientation: %s\n", typec_orientation_name[orientation]); ++ printf("PD Revision: %s\n", typec_pd_rev_name[pd_rev]); ++ printf("Power Role: %s\n", typec_role_name[pwr_role]); ++ printf("Data Role: %s\n", typec_data_role_name[data_role]); ++ printf("Voltage: %2d.%03d V\n", mv / 1000, mv % 1000); ++ printf("Current: %2d.%03d A\n", ma / 1000, ma % 1000); ++ ++ return 0; ++} ++ ++static int do_info(struct cmd_tbl *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ if (!currdev) { ++ printf("First, set the TCPM device!\n"); ++ return CMD_RET_USAGE; ++ } ++ ++ return do_print_info(currdev); ++} ++ ++static struct cmd_tbl subcmd[] = { ++ U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""), ++ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""), ++ U_BOOT_CMD_MKENT(info, 1, 1, do_info, "", ""), ++}; ++ ++static int do_tcpm(struct cmd_tbl *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ struct cmd_tbl *cmd; ++ ++ argc--; ++ argv++; ++ ++ cmd = find_cmd_tbl(argv[0], subcmd, ARRAY_SIZE(subcmd)); ++ if (!cmd || argc > cmd->maxargs) ++ return CMD_RET_USAGE; ++ ++ return cmd->cmd(cmdtp, flag, argc, argv); ++} ++ ++ /**************************************************/ ++ ++U_BOOT_CMD(tcpm, CONFIG_SYS_MAXARGS, 1, do_tcpm, ++ "TCPM sub-system", ++ "list - list TCPM devices\n" ++ "tcpm dev [name] - show or [set] operating TCPM device\n" ++ "tcpm info - dump information\n" ++); +diff --git a/doc/usage/cmd/tcpm.rst b/doc/usage/cmd/tcpm.rst +new file mode 100644 +index 000000000000..1e8199c0f89c +--- /dev/null ++++ b/doc/usage/cmd/tcpm.rst +@@ -0,0 +1,66 @@ ++.. SPDX-License-Identifier: GPL-2.0+: ++ ++.. index:: ++ single: tcpm (command) ++ ++tcpm command ++============ ++ ++Synopsis ++-------- ++ ++:: ++ ++ tcpm dev [devname] ++ tcpm info ++ tcpm list ++ ++Description ++----------- ++ ++The tcpm command is used to control USB-PD controllers, also known as TypeC Port Manager (TCPM). ++ ++The 'tcpm dev' command shows or set current TCPM device. ++ ++ devname ++ device name to change ++ ++The 'tcpm info' command displays the current state of the device ++ ++The 'tcpm list' command displays the list available devices. ++ ++Examples ++-------- ++ ++The 'tcpm info' command displays device's status: ++:: ++ ++ => tcpm info ++ Orientation: normal ++ PD Revision: rev3 ++ Power Role: sink ++ Data Role: device ++ Voltage: 20.000 V ++ Current: 2.250 A ++ ++The current device can be shown or set via 'tcpm dev' command: ++:: ++ ++ => tcpm dev ++ TCPM device is not set! ++ => tcpm dev usb-typec@22 ++ dev: 0 @ usb-typec@22 ++ => tcpm dev ++ dev: 0 @ usb-typec@22 ++ ++The list of available devices can be shown via 'tcpm list' command: ++:: ++ ++ => tcpm list ++ | Name | Parent name | Parent uclass @ seq ++ | usb-typec@22 | i2c@feac0000 | i2c @ 4 | status: 0 ++ ++Configuration ++------------- ++ ++The tcpm command is only available if CONFIG_CMD_TCPM=y. +diff --git a/doc/usage/index.rst b/doc/usage/index.rst +index 6a218c46b4e4..b4be42f59119 100644 +--- a/doc/usage/index.rst ++++ b/doc/usage/index.rst +@@ -111,6 +111,7 @@ Shell commands + cmd/smbios + cmd/sound + cmd/source ++ cmd/tcpm + cmd/temperature + cmd/tftpput + cmd/trace +diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig +index a972d87c7ad4..985d3a9ef7e6 100644 +--- a/drivers/usb/Kconfig ++++ b/drivers/usb/Kconfig +@@ -85,6 +85,8 @@ source "drivers/usb/emul/Kconfig" + + source "drivers/usb/phy/Kconfig" + ++source "drivers/usb/tcpm/Kconfig" ++ + source "drivers/usb/ulpi/Kconfig" + + if USB_HOST +diff --git a/drivers/usb/tcpm/Kconfig b/drivers/usb/tcpm/Kconfig +new file mode 100644 +index 000000000000..55bf8e202b90 +--- /dev/null ++++ b/drivers/usb/tcpm/Kconfig +@@ -0,0 +1,8 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++config TYPEC_TCPM ++ tristate "USB Type-C Port Controller Manager" ++ depends on DM ++ help ++ The Type-C Port Controller Manager provides a USB PD and USB Type-C ++ state machine for use with Type-C Port Controllers. +diff --git a/drivers/usb/tcpm/Makefile b/drivers/usb/tcpm/Makefile +new file mode 100644 +index 000000000000..a0f76436f3fd +--- /dev/null ++++ b/drivers/usb/tcpm/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++obj-$(CONFIG_TYPEC_TCPM) += tcpm.o tcpm-uclass.o +diff --git a/drivers/usb/tcpm/tcpm-internal.h b/drivers/usb/tcpm/tcpm-internal.h +new file mode 100644 +index 000000000000..561442090027 +--- /dev/null ++++ b/drivers/usb/tcpm/tcpm-internal.h +@@ -0,0 +1,173 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright 2015-2017 Google, Inc ++ * Copyright 2024 Collabora ++ */ ++ ++#ifndef __LINUX_USB_TCPM_INTERNAL_H ++#define __LINUX_USB_TCPM_INTERNAL_H ++ ++#define FOREACH_TCPM_STATE(S) \ ++ S(INVALID_STATE), \ ++ S(TOGGLING), \ ++ S(SRC_UNATTACHED), \ ++ S(SRC_ATTACH_WAIT), \ ++ S(SRC_ATTACHED), \ ++ S(SRC_STARTUP), \ ++ S(SRC_SEND_CAPABILITIES), \ ++ S(SRC_SEND_CAPABILITIES_TIMEOUT), \ ++ S(SRC_NEGOTIATE_CAPABILITIES), \ ++ S(SRC_TRANSITION_SUPPLY), \ ++ S(SRC_READY), \ ++ S(SRC_WAIT_NEW_CAPABILITIES), \ ++ \ ++ S(SNK_UNATTACHED), \ ++ S(SNK_ATTACH_WAIT), \ ++ S(SNK_DEBOUNCED), \ ++ S(SNK_ATTACHED), \ ++ S(SNK_STARTUP), \ ++ S(SNK_DISCOVERY), \ ++ S(SNK_DISCOVERY_DEBOUNCE), \ ++ S(SNK_DISCOVERY_DEBOUNCE_DONE), \ ++ S(SNK_WAIT_CAPABILITIES), \ ++ S(SNK_NEGOTIATE_CAPABILITIES), \ ++ S(SNK_TRANSITION_SINK), \ ++ S(SNK_TRANSITION_SINK_VBUS), \ ++ S(SNK_READY), \ ++ \ ++ S(HARD_RESET_SEND), \ ++ S(HARD_RESET_START), \ ++ S(SRC_HARD_RESET_VBUS_OFF), \ ++ S(SRC_HARD_RESET_VBUS_ON), \ ++ S(SNK_HARD_RESET_SINK_OFF), \ ++ S(SNK_HARD_RESET_WAIT_VBUS), \ ++ S(SNK_HARD_RESET_SINK_ON), \ ++ \ ++ S(SOFT_RESET), \ ++ S(SOFT_RESET_SEND), \ ++ \ ++ S(DR_SWAP_ACCEPT), \ ++ S(DR_SWAP_CHANGE_DR), \ ++ \ ++ S(ERROR_RECOVERY), \ ++ S(PORT_RESET), \ ++ S(PORT_RESET_WAIT_OFF) ++ ++#define GENERATE_TCPM_ENUM(e) e ++#define GENERATE_TCPM_STRING(s) #s ++#define TCPM_POLL_EVENT_TIME_OUT 2000 ++ ++enum tcpm_state { ++ FOREACH_TCPM_STATE(GENERATE_TCPM_ENUM) ++}; ++ ++enum pd_msg_request { ++ PD_MSG_NONE = 0, ++ PD_MSG_CTRL_REJECT, ++ PD_MSG_CTRL_WAIT, ++ PD_MSG_CTRL_NOT_SUPP, ++ PD_MSG_DATA_SINK_CAP, ++ PD_MSG_DATA_SOURCE_CAP, ++}; ++ ++struct tcpm_port { ++ enum typec_port_type typec_type; ++ int typec_prefer_role; ++ ++ enum typec_role vconn_role; ++ enum typec_role pwr_role; ++ enum typec_data_role data_role; ++ ++ struct typec_partner *partner; ++ ++ enum typec_cc_status cc_req; ++ enum typec_cc_status cc1; ++ enum typec_cc_status cc2; ++ enum typec_cc_polarity polarity; ++ ++ bool attached; ++ bool connected; ++ int poll_event_cnt; ++ enum typec_port_type port_type; ++ ++ /* ++ * Set to true when vbus is greater than VSAFE5V min. ++ * Set to false when vbus falls below vSinkDisconnect max threshold. ++ */ ++ bool vbus_present; ++ ++ /* ++ * Set to true when vbus is less than VSAFE0V max. ++ * Set to false when vbus is greater than VSAFE0V max. ++ */ ++ bool vbus_vsafe0v; ++ ++ bool vbus_never_low; ++ bool vbus_source; ++ bool vbus_charge; ++ ++ int try_role; ++ ++ enum pd_msg_request queued_message; ++ ++ enum tcpm_state enter_state; ++ enum tcpm_state prev_state; ++ enum tcpm_state state; ++ enum tcpm_state delayed_state; ++ unsigned long delay_ms; ++ ++ bool state_machine_running; ++ ++ bool tx_complete; ++ enum tcpm_transmit_status tx_status; ++ ++ unsigned int negotiated_rev; ++ unsigned int message_id; ++ unsigned int caps_count; ++ unsigned int hard_reset_count; ++ bool pd_capable; ++ bool explicit_contract; ++ unsigned int rx_msgid; ++ ++ /* Partner capabilities/requests */ ++ u32 sink_request; ++ u32 source_caps[PDO_MAX_OBJECTS]; ++ unsigned int nr_source_caps; ++ u32 sink_caps[PDO_MAX_OBJECTS]; ++ unsigned int nr_sink_caps; ++ ++ /* ++ * whether to wait for the Type-C device to send the DR_SWAP Message flag ++ * For Type-C device with Dual-Role Power and Dual-Role Data, the port side ++ * is used as sink + ufp, then the tcpm framework needs to wait for Type-C ++ * device to initiate DR_swap Message. ++ */ ++ bool wait_dr_swap_message; ++ ++ /* Local capabilities */ ++ u32 src_pdo[PDO_MAX_OBJECTS]; ++ unsigned int nr_src_pdo; ++ u32 snk_pdo[PDO_MAX_OBJECTS]; ++ unsigned int nr_snk_pdo; ++ ++ unsigned int operating_snk_mw; ++ bool update_sink_caps; ++ ++ /* Requested current / voltage to the port partner */ ++ u32 req_current_limit; ++ u32 req_supply_voltage; ++ /* Actual current / voltage limit of the local port */ ++ u32 current_limit; ++ u32 supply_voltage; ++ ++ /* port belongs to a self powered device */ ++ bool self_powered; ++ ++ unsigned long delay_target; ++}; ++ ++extern const char * const tcpm_states[]; ++ ++int tcpm_post_probe(struct udevice *dev); ++ ++#endif +diff --git a/drivers/usb/tcpm/tcpm-uclass.c b/drivers/usb/tcpm/tcpm-uclass.c +new file mode 100644 +index 000000000000..92f9eff1ada6 +--- /dev/null ++++ b/drivers/usb/tcpm/tcpm-uclass.c +@@ -0,0 +1,149 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2024 Collabora Ltd. ++ * ++ * USB Power Delivery protocol stack. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include "tcpm-internal.h" ++ ++int tcpm_get_voltage(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->supply_voltage; ++} ++ ++int tcpm_get_current(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->current_limit; ++} ++ ++enum typec_orientation tcpm_get_orientation(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ switch (port->polarity) { ++ case TYPEC_POLARITY_CC1: ++ return TYPEC_ORIENTATION_NORMAL; ++ case TYPEC_POLARITY_CC2: ++ return TYPEC_ORIENTATION_REVERSE; ++ default: ++ return TYPEC_ORIENTATION_NONE; ++ } ++} ++ ++const char *tcpm_get_state(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return tcpm_states[port->state]; ++} ++ ++int tcpm_get_pd_rev(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->negotiated_rev; ++} ++ ++enum typec_role tcpm_get_pwr_role(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->pwr_role; ++} ++ ++enum typec_data_role tcpm_get_data_role(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->data_role; ++} ++ ++bool tcpm_is_connected(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return port->connected; ++} ++ ++int tcpm_get(const char *name, struct udevice **devp) ++{ ++ return uclass_get_device_by_name(UCLASS_TCPM, name, devp); ++} ++ ++static int tcpm_post_bind(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ const char *cap_str; ++ ofnode node; ++ int ret; ++ ++ /* ++ * USB Power Delivery (USB PD) specification requires, that communication ++ * with a sink happens within roughly 5 seconds. Otherwise the source ++ * might assume that the sink does not support USB PD. Starting to do ++ * USB PD communication after that results in a hard reset, which briefly ++ * removes any power from the USB-C port. ++ * ++ * On systems with alternative power supplies this is not an issue, but ++ * systems, which get soleley powered through their USB-C port will end ++ * up losing their power supply and doing a board level reset. The hard ++ * reset will also restart the 5 second timeout. That means a operating ++ * system initializing USB PD will put the system into a boot loop when ++ * it takes more than 5 seconds from cold boot to the operating system ++ * starting to transmit USB PD messages. ++ * ++ * The issue can be avoided by doing the initial USB PD communication ++ * in U-Boot. The operating system can then re-negotiate by doing a ++ * soft reset, which does not trigger removal of the supply voltage. ++ * ++ * Since the TCPM state machine is quite complex and depending on the ++ * remote side can take quite some time to finish, this tries to limit ++ * the automatic probing to systems probably relying on power being ++ * provided by the USB-C port(s): ++ * ++ * 1. self-powered devices won't reset when the USB-C port looses power ++ * 2. if the power is allowed to go into anything else than sink mode ++ * it is not the only power source ++ */ ++ ret = drvops->get_connector_node(dev, &node); ++ if (ret) ++ return ret; ++ ++ if (ofnode_read_bool(node, "self-powered")) ++ return 0; ++ ++ cap_str = ofnode_read_string(node, "power-role"); ++ if (!cap_str) ++ return -EINVAL; ++ ++ if (strcmp("sink", cap_str)) ++ return 0; ++ ++ /* Do not auto-probe PD controller when PD is disabled */ ++ if (ofnode_read_bool(node, "pd-disable")) ++ return 0; ++ ++ dev_info(dev, "probing Type-C port manager..."); ++ ++ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); ++ ++ return 0; ++} ++ ++UCLASS_DRIVER(tcpm) = { ++ .id = UCLASS_TCPM, ++ .name = "tcpm", ++ .per_device_plat_auto = sizeof(struct tcpm_port), ++ .post_bind = tcpm_post_bind, ++ .post_probe = tcpm_post_probe, ++}; +diff --git a/drivers/usb/tcpm/tcpm.c b/drivers/usb/tcpm/tcpm.c +new file mode 100644 +index 000000000000..0aee57cb2f4a +--- /dev/null ++++ b/drivers/usb/tcpm/tcpm.c +@@ -0,0 +1,2288 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2015-2017 Google, Inc ++ * ++ * USB Power Delivery protocol stack. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "tcpm-internal.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++const char * const tcpm_states[] = { ++ FOREACH_TCPM_STATE(GENERATE_TCPM_STRING) ++}; ++ ++const char * const typec_pd_rev_name[] = { ++ [PD_REV10] = "rev1", ++ [PD_REV20] = "rev2", ++ [PD_REV30] = "rev3", ++}; ++ ++const char * const typec_role_name[] = { ++ [TYPEC_SINK] = "sink", ++ [TYPEC_SOURCE] = "source", ++}; ++ ++const char * const typec_data_role_name[] = { ++ [TYPEC_DEVICE] = "device", ++ [TYPEC_HOST] = "host", ++}; ++ ++const char * const typec_orientation_name[] = { ++ [TYPEC_ORIENTATION_NONE] = "none", ++ [TYPEC_ORIENTATION_NORMAL] = "normal", ++ [TYPEC_ORIENTATION_REVERSE] = "reverse", ++}; ++ ++const char * const typec_cc_status_name[] = { ++ [TYPEC_CC_OPEN] = "open", ++ [TYPEC_CC_RA] = "ra", ++ [TYPEC_CC_RD] = "rd", ++ [TYPEC_CC_RP_DEF] = "rp-def", ++ [TYPEC_CC_RP_1_5] = "rp-1.5", ++ [TYPEC_CC_RP_3_0] = "rp-3.0", ++}; ++ ++static inline bool tcpm_cc_is_sink(enum typec_cc_status cc) ++{ ++ return cc == TYPEC_CC_RP_DEF || ++ cc == TYPEC_CC_RP_1_5 || ++ cc == TYPEC_CC_RP_3_0; ++} ++ ++static inline bool tcpm_port_is_sink(struct tcpm_port *port) ++{ ++ bool cc1_is_snk = tcpm_cc_is_sink(port->cc1); ++ bool cc2_is_snk = tcpm_cc_is_sink(port->cc2); ++ ++ return (cc1_is_snk && !cc2_is_snk) || ++ (cc2_is_snk && !cc1_is_snk); ++} ++ ++static inline bool tcpm_cc_is_source(enum typec_cc_status cc) ++{ ++ return cc == TYPEC_CC_RD; ++} ++ ++static inline bool tcpm_port_is_source(struct tcpm_port *port) ++{ ++ bool cc1_is_src = tcpm_cc_is_source(port->cc1); ++ bool cc2_is_src = tcpm_cc_is_source(port->cc2); ++ ++ return (cc1_is_src && !cc2_is_src) || ++ (cc2_is_src && !cc1_is_src); ++} ++ ++static inline bool tcpm_try_src(struct tcpm_port *port) ++{ ++ return port->try_role == TYPEC_SOURCE && ++ port->port_type == TYPEC_PORT_DRP; ++} ++ ++static inline void tcpm_reset_event_cnt(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ port->poll_event_cnt = 0; ++} ++ ++static enum tcpm_state tcpm_default_state(struct tcpm_port *port) ++{ ++ if (port->port_type == TYPEC_PORT_DRP) { ++ if (port->try_role == TYPEC_SINK) ++ return SNK_UNATTACHED; ++ else if (port->try_role == TYPEC_SOURCE) ++ return SRC_UNATTACHED; ++ } else if (port->port_type == TYPEC_PORT_SNK) { ++ return SNK_UNATTACHED; ++ } ++ return SRC_UNATTACHED; ++} ++ ++static bool tcpm_port_is_disconnected(struct tcpm_port *port) ++{ ++ return (!port->attached && port->cc1 == TYPEC_CC_OPEN && ++ port->cc2 == TYPEC_CC_OPEN) || ++ (port->attached && ((port->polarity == TYPEC_POLARITY_CC1 && ++ port->cc1 == TYPEC_CC_OPEN) || ++ (port->polarity == TYPEC_POLARITY_CC2 && ++ port->cc2 == TYPEC_CC_OPEN))); ++} ++ ++static void tcpm_set_cc(struct udevice *dev, enum typec_cc_status cc) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ dev_dbg(dev, "TCPM: set cc = %d\n", cc); ++ port->cc_req = cc; ++ drvops->set_cc(dev, cc); ++} ++ ++/* ++ * Determine RP value to set based on maximum current supported ++ * by a port if configured as source. ++ * Returns CC value to report to link partner. ++ */ ++static enum typec_cc_status tcpm_rp_cc(struct tcpm_port *port) ++{ ++ const u32 *src_pdo = port->src_pdo; ++ int nr_pdo = port->nr_src_pdo; ++ int i; ++ ++ /* ++ * Search for first entry with matching voltage. ++ * It should report the maximum supported current. ++ */ ++ for (i = 0; i < nr_pdo; i++) { ++ const u32 pdo = src_pdo[i]; ++ ++ if (pdo_type(pdo) == PDO_TYPE_FIXED && ++ pdo_fixed_voltage(pdo) == 5000) { ++ unsigned int curr = pdo_max_current(pdo); ++ ++ if (curr >= 3000) ++ return TYPEC_CC_RP_3_0; ++ else if (curr >= 1500) ++ return TYPEC_CC_RP_1_5; ++ return TYPEC_CC_RP_DEF; ++ } ++ } ++ ++ return TYPEC_CC_RP_DEF; ++} ++ ++static void tcpm_check_and_run_delayed_work(struct udevice *dev); ++ ++static bool tcpm_transmit_helper(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ drvops->poll_event(dev); ++ udelay(500); ++ tcpm_check_and_run_delayed_work(dev); ++ return port->tx_complete; ++} ++ ++static int tcpm_pd_transmit(struct udevice *dev, ++ enum tcpm_transmit_type type, ++ const struct pd_message *msg) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ u32 timeout_us = PD_T_TCPC_TX_TIMEOUT * 1000; ++ bool tx_complete; ++ int ret; ++ ++ if (msg) ++ dev_dbg(dev, "TCPM: PD TX, header: %#x\n", ++ le16_to_cpu(msg->header)); ++ else ++ dev_dbg(dev, "TCPM: PD TX, type: %#x\n", type); ++ ++ port->tx_complete = false; ++ ret = drvops->pd_transmit(dev, type, msg, port->negotiated_rev); ++ if (ret < 0) ++ return ret; ++ ++ /* ++ * At this point we basically need to block until the TCPM controller ++ * returns successful transmission. Since this is usually done using ++ * the generic interrupt status bits, we poll for any events. That ++ * will clear the interrupt status, so we also need to process any ++ * of the incoming events. This means we will do more processing and ++ * thus let's give everything a bit more time. ++ */ ++ timeout_us *= 5; ++ ret = read_poll_timeout(tcpm_transmit_helper, tx_complete, ++ !tx_complete, false, timeout_us, dev); ++ if (ret < 0) { ++ dev_err(dev, "TCPM: PD transmit data failed: %d\n", ret); ++ return ret; ++ } ++ ++ switch (port->tx_status) { ++ case TCPC_TX_SUCCESS: ++ port->message_id = (port->message_id + 1) & PD_HEADER_ID_MASK; ++ break; ++ case TCPC_TX_DISCARDED: ++ ret = -EAGAIN; ++ break; ++ case TCPC_TX_FAILED: ++ default: ++ ret = -EIO; ++ break; ++ } ++ ++ return ret; ++} ++ ++void tcpm_pd_transmit_complete(struct udevice *dev, ++ enum tcpm_transmit_status status) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ dev_dbg(dev, "TCPM: PD TX complete, status: %u\n", status); ++ tcpm_reset_event_cnt(dev); ++ port->tx_status = status; ++ port->tx_complete = true; ++} ++ ++static int tcpm_set_polarity(struct udevice *dev, ++ enum typec_cc_polarity polarity) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ int ret; ++ ++ dev_dbg(dev, "TCPM: set polarity = %d\n", polarity); ++ ++ if (drvops->set_polarity) { ++ ret = drvops->set_polarity(dev, polarity); ++ if (ret < 0) ++ return ret; ++ } ++ ++ port->polarity = polarity; ++ ++ return 0; ++} ++ ++static int tcpm_set_vconn(struct udevice *dev, bool enable) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ dev_dbg(dev, "TCPM: set vconn = %d\n", enable); ++ ++ ret = drvops->set_vconn(dev, enable); ++ if (!ret) ++ port->vconn_role = enable ? TYPEC_SOURCE : TYPEC_SINK; ++ ++ return ret; ++} ++ ++static inline u32 tcpm_get_current_limit(struct tcpm_port *port) ++{ ++ switch (port->polarity ? port->cc2 : port->cc1) { ++ case TYPEC_CC_RP_1_5: ++ return 1500; ++ case TYPEC_CC_RP_3_0: ++ return 3000; ++ case TYPEC_CC_RP_DEF: ++ default: ++ return 0; ++ } ++} ++ ++static int tcpm_set_current_limit(struct udevice *dev, u32 max_ma, u32 mv) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret = -EOPNOTSUPP; ++ ++ dev_info(dev, "TCPM: set voltage limit = %u mV\n", mv); ++ dev_info(dev, "TCPM: set current limit = %u mA\n", max_ma); ++ ++ port->supply_voltage = mv; ++ port->current_limit = max_ma; ++ ++ return ret; ++} ++ ++static int tcpm_set_attached_state(struct udevice *dev, bool attached) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ return drvops->set_roles(dev, attached, port->pwr_role, ++ port->data_role); ++} ++ ++static int tcpm_set_roles(struct udevice *dev, bool attached, ++ enum typec_role role, enum typec_data_role data) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ ret = drvops->set_roles(dev, attached, role, data); ++ if (ret < 0) ++ return ret; ++ ++ port->pwr_role = role; ++ port->data_role = data; ++ ++ return 0; ++} ++ ++static int tcpm_pd_send_source_caps(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ struct pd_message msg; ++ int i; ++ ++ memset(&msg, 0, sizeof(msg)); ++ ++ if (!port->nr_src_pdo) { ++ /* No source capabilities defined, sink only */ ++ msg.header = PD_HEADER_LE(PD_CTRL_REJECT, ++ port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, 0); ++ } else { ++ msg.header = PD_HEADER_LE(PD_DATA_SOURCE_CAP, ++ port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, ++ port->nr_src_pdo); ++ } ++ ++ for (i = 0; i < port->nr_src_pdo; i++) ++ msg.payload[i] = cpu_to_le32(port->src_pdo[i]); ++ ++ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); ++} ++ ++static int tcpm_pd_send_sink_caps(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ struct pd_message msg; ++ unsigned int i; ++ ++ memset(&msg, 0, sizeof(msg)); ++ ++ if (!port->nr_snk_pdo) { ++ /* No sink capabilities defined, source only */ ++ msg.header = PD_HEADER_LE(PD_CTRL_REJECT, ++ port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, 0); ++ } else { ++ msg.header = PD_HEADER_LE(PD_DATA_SINK_CAP, ++ port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, ++ port->nr_snk_pdo); ++ } ++ ++ for (i = 0; i < port->nr_snk_pdo; i++) ++ msg.payload[i] = cpu_to_le32(port->snk_pdo[i]); ++ ++ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); ++} ++ ++static void tcpm_state_machine(struct udevice *dev); ++ ++static inline void tcpm_timer_uninit(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ port->delay_target = 0; ++} ++ ++static void tcpm_timer_init(struct udevice *dev, uint32_t ms) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ unsigned long time_us = ms * 1000; ++ ++ port->delay_target = timer_get_us() + time_us; ++} ++ ++static void tcpm_check_and_run_delayed_work(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ /* no delayed state changes scheduled */ ++ if (port->delay_target == 0) ++ return; ++ ++ /* it's not yet time */ ++ if (timer_get_us() < port->delay_target) ++ return; ++ ++ tcpm_timer_uninit(dev); ++ tcpm_state_machine(dev); ++} ++ ++static void mod_tcpm_delayed_work(struct udevice *dev, unsigned int delay_ms) ++{ ++ if (delay_ms) { ++ tcpm_timer_init(dev, delay_ms); ++ } else { ++ tcpm_timer_uninit(dev); ++ tcpm_state_machine(dev); ++ } ++} ++ ++static void tcpm_set_state(struct udevice *dev, enum tcpm_state state, ++ unsigned int delay_ms) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ if (delay_ms) { ++ dev_dbg(dev, "TCPM: pending state change %s -> %s @ %u ms [%s]\n", ++ tcpm_states[port->state], tcpm_states[state], delay_ms, ++ typec_pd_rev_name[port->negotiated_rev]); ++ port->delayed_state = state; ++ mod_tcpm_delayed_work(dev, delay_ms); ++ port->delay_ms = delay_ms; ++ } else { ++ dev_dbg(dev, "TCPM: state change %s -> %s\n", ++ tcpm_states[port->state], tcpm_states[state]); ++ port->delayed_state = INVALID_STATE; ++ port->prev_state = port->state; ++ port->state = state; ++ /* ++ * Don't re-queue the state machine work item if we're currently ++ * in the state machine and we're immediately changing states. ++ * tcpm_state_machine_work() will continue running the state ++ * machine. ++ */ ++ if (!port->state_machine_running) ++ mod_tcpm_delayed_work(dev, 0); ++ } ++} ++ ++static void tcpm_set_state_cond(struct udevice *dev, enum tcpm_state state, ++ unsigned int delay_ms) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ if (port->enter_state == port->state) ++ tcpm_set_state(dev, state, delay_ms); ++ else ++ dev_dbg(dev, "TCPM: skipped %sstate change %s -> %s [%u ms], context state %s [%s]\n", ++ delay_ms ? "delayed " : "", ++ tcpm_states[port->state], tcpm_states[state], ++ delay_ms, tcpm_states[port->enter_state], ++ typec_pd_rev_name[port->negotiated_rev]); ++} ++ ++static void tcpm_queue_message(struct udevice *dev, ++ enum pd_msg_request message) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ port->queued_message = message; ++ mod_tcpm_delayed_work(dev, 0); ++} ++ ++enum pdo_err { ++ PDO_NO_ERR, ++ PDO_ERR_NO_VSAFE5V, ++ PDO_ERR_VSAFE5V_NOT_FIRST, ++ PDO_ERR_PDO_TYPE_NOT_IN_ORDER, ++ PDO_ERR_FIXED_NOT_SORTED, ++ PDO_ERR_VARIABLE_BATT_NOT_SORTED, ++ PDO_ERR_DUPE_PDO, ++ PDO_ERR_PPS_APDO_NOT_SORTED, ++ PDO_ERR_DUPE_PPS_APDO, ++}; ++ ++static const char * const pdo_err_msg[] = { ++ [PDO_ERR_NO_VSAFE5V] = ++ " err: source/sink caps should at least have vSafe5V", ++ [PDO_ERR_VSAFE5V_NOT_FIRST] = ++ " err: vSafe5V Fixed Supply Object Shall always be the first object", ++ [PDO_ERR_PDO_TYPE_NOT_IN_ORDER] = ++ " err: PDOs should be in the following order: Fixed; Battery; Variable", ++ [PDO_ERR_FIXED_NOT_SORTED] = ++ " err: Fixed supply pdos should be in increasing order of their fixed voltage", ++ [PDO_ERR_VARIABLE_BATT_NOT_SORTED] = ++ " err: Variable/Battery supply pdos should be in increasing order of their minimum voltage", ++ [PDO_ERR_DUPE_PDO] = ++ " err: Variable/Batt supply pdos cannot have same min/max voltage", ++ [PDO_ERR_PPS_APDO_NOT_SORTED] = ++ " err: Programmable power supply apdos should be in increasing order of their maximum voltage", ++ [PDO_ERR_DUPE_PPS_APDO] = ++ " err: Programmable power supply apdos cannot have same min/max voltage and max current", ++}; ++ ++static enum pdo_err tcpm_caps_err(struct udevice *dev, const u32 *pdo, ++ unsigned int nr_pdo) ++{ ++ unsigned int i; ++ ++ /* Should at least contain vSafe5v */ ++ if (nr_pdo < 1) ++ return PDO_ERR_NO_VSAFE5V; ++ ++ /* The vSafe5V Fixed Supply Object Shall always be the first object */ ++ if (pdo_type(pdo[0]) != PDO_TYPE_FIXED || ++ pdo_fixed_voltage(pdo[0]) != VSAFE5V) ++ return PDO_ERR_VSAFE5V_NOT_FIRST; ++ ++ for (i = 1; i < nr_pdo; i++) { ++ if (pdo_type(pdo[i]) < pdo_type(pdo[i - 1])) { ++ return PDO_ERR_PDO_TYPE_NOT_IN_ORDER; ++ } else if (pdo_type(pdo[i]) == pdo_type(pdo[i - 1])) { ++ enum pd_pdo_type type = pdo_type(pdo[i]); ++ ++ switch (type) { ++ /* ++ * The remaining Fixed Supply Objects, if ++ * present, shall be sent in voltage order; ++ * lowest to highest. ++ */ ++ case PDO_TYPE_FIXED: ++ if (pdo_fixed_voltage(pdo[i]) <= ++ pdo_fixed_voltage(pdo[i - 1])) ++ return PDO_ERR_FIXED_NOT_SORTED; ++ break; ++ /* ++ * The Battery Supply Objects and Variable ++ * supply, if present shall be sent in Minimum ++ * Voltage order; lowest to highest. ++ */ ++ case PDO_TYPE_VAR: ++ case PDO_TYPE_BATT: ++ if (pdo_min_voltage(pdo[i]) < ++ pdo_min_voltage(pdo[i - 1])) ++ return PDO_ERR_VARIABLE_BATT_NOT_SORTED; ++ else if ((pdo_min_voltage(pdo[i]) == ++ pdo_min_voltage(pdo[i - 1])) && ++ (pdo_max_voltage(pdo[i]) == ++ pdo_max_voltage(pdo[i - 1]))) ++ return PDO_ERR_DUPE_PDO; ++ break; ++ /* ++ * The Programmable Power Supply APDOs, if present, ++ * shall be sent in Maximum Voltage order; ++ * lowest to highest. ++ */ ++ case PDO_TYPE_APDO: ++ if (pdo_apdo_type(pdo[i]) != APDO_TYPE_PPS) ++ break; ++ ++ if (pdo_pps_apdo_max_voltage(pdo[i]) < ++ pdo_pps_apdo_max_voltage(pdo[i - 1])) ++ return PDO_ERR_PPS_APDO_NOT_SORTED; ++ else if (pdo_pps_apdo_min_voltage(pdo[i]) == ++ pdo_pps_apdo_min_voltage(pdo[i - 1]) && ++ pdo_pps_apdo_max_voltage(pdo[i]) == ++ pdo_pps_apdo_max_voltage(pdo[i - 1]) && ++ pdo_pps_apdo_max_current(pdo[i]) == ++ pdo_pps_apdo_max_current(pdo[i - 1])) ++ return PDO_ERR_DUPE_PPS_APDO; ++ break; ++ default: ++ dev_err(dev, "TCPM: Unknown pdo type\n"); ++ } ++ } ++ } ++ ++ return PDO_NO_ERR; ++} ++ ++static int tcpm_validate_caps(struct udevice *dev, const u32 *pdo, ++ unsigned int nr_pdo) ++{ ++ enum pdo_err err_index = tcpm_caps_err(dev, pdo, nr_pdo); ++ ++ if (err_index != PDO_NO_ERR) { ++ dev_err(dev, "TCPM:%s\n", pdo_err_msg[err_index]); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/* ++ * PD (data, control) command handling functions ++ */ ++static inline enum tcpm_state ready_state(struct tcpm_port *port) ++{ ++ if (port->pwr_role == TYPEC_SOURCE) ++ return SRC_READY; ++ else ++ return SNK_READY; ++} ++ ++static void tcpm_pd_data_request(struct udevice *dev, ++ const struct pd_message *msg) ++{ ++ enum pd_data_msg_type type = pd_header_type_le(msg->header); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ unsigned int cnt = pd_header_cnt_le(msg->header); ++ unsigned int rev = pd_header_rev_le(msg->header); ++ unsigned int i; ++ ++ switch (type) { ++ case PD_DATA_SOURCE_CAP: ++ for (i = 0; i < cnt; i++) ++ port->source_caps[i] = le32_to_cpu(msg->payload[i]); ++ ++ port->nr_source_caps = cnt; ++ ++ tcpm_validate_caps(dev, port->source_caps, ++ port->nr_source_caps); ++ ++ /* ++ * Adjust revision in subsequent message headers, as required, ++ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't ++ * support Rev 1.0 so just do nothing in that scenario. ++ */ ++ if (rev == PD_REV10) ++ break; ++ ++ if (rev < PD_MAX_REV) ++ port->negotiated_rev = rev; ++ ++ if ((pdo_type(port->source_caps[0]) == PDO_TYPE_FIXED) && ++ (port->source_caps[0] & PDO_FIXED_DUAL_ROLE) && ++ (port->source_caps[0] & PDO_FIXED_DATA_SWAP)) { ++ /* Dual role power and data, eg: self-powered Type-C */ ++ port->wait_dr_swap_message = true; ++ } else { ++ /* Non-Dual role power, eg: adapter */ ++ port->wait_dr_swap_message = false; ++ } ++ ++ /* ++ * This message may be received even if VBUS is not ++ * present. This is quite unexpected; see USB PD ++ * specification, sections 8.3.3.6.3.1 and 8.3.3.6.3.2. ++ * However, at the same time, we must be ready to ++ * receive this message and respond to it 15ms after ++ * receiving PS_RDY during power swap operations, no matter ++ * if VBUS is available or not (USB PD specification, ++ * section 6.5.9.2). ++ * So we need to accept the message either way, ++ * but be prepared to keep waiting for VBUS after it was ++ * handled. ++ */ ++ tcpm_set_state(dev, SNK_NEGOTIATE_CAPABILITIES, 0); ++ break; ++ case PD_DATA_REQUEST: ++ /* ++ * Adjust revision in subsequent message headers, as required, ++ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't ++ * support Rev 1.0 so just reject in that scenario. ++ */ ++ if (rev == PD_REV10) { ++ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); ++ break; ++ } ++ ++ if (rev < PD_MAX_REV) ++ port->negotiated_rev = rev; ++ ++ port->sink_request = le32_to_cpu(msg->payload[0]); ++ ++ tcpm_set_state(dev, SRC_NEGOTIATE_CAPABILITIES, 0); ++ break; ++ case PD_DATA_SINK_CAP: ++ /* We don't do anything with this at the moment... */ ++ for (i = 0; i < cnt; i++) ++ port->sink_caps[i] = le32_to_cpu(msg->payload[i]); ++ ++ port->nr_sink_caps = cnt; ++ break; ++ default: ++ break; ++ } ++} ++ ++static void tcpm_pd_ctrl_request(struct udevice *dev, ++ const struct pd_message *msg) ++{ ++ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum tcpm_state next_state; ++ ++ switch (type) { ++ case PD_CTRL_GOOD_CRC: ++ case PD_CTRL_PING: ++ break; ++ case PD_CTRL_GET_SOURCE_CAP: ++ switch (port->state) { ++ case SRC_READY: ++ case SNK_READY: ++ tcpm_queue_message(dev, PD_MSG_DATA_SOURCE_CAP); ++ break; ++ default: ++ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); ++ break; ++ } ++ break; ++ case PD_CTRL_GET_SINK_CAP: ++ switch (port->state) { ++ case SRC_READY: ++ case SNK_READY: ++ tcpm_queue_message(dev, PD_MSG_DATA_SINK_CAP); ++ break; ++ default: ++ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); ++ break; ++ } ++ break; ++ case PD_CTRL_GOTO_MIN: ++ break; ++ case PD_CTRL_PS_RDY: ++ switch (port->state) { ++ case SNK_TRANSITION_SINK: ++ if (port->vbus_present) { ++ tcpm_set_current_limit(dev, ++ port->req_current_limit, ++ port->req_supply_voltage); ++ port->explicit_contract = true; ++ tcpm_set_state(dev, SNK_READY, 0); ++ } else { ++ /* ++ * Seen after power swap. Keep waiting for VBUS ++ * in a transitional state. ++ */ ++ tcpm_set_state(dev, ++ SNK_TRANSITION_SINK_VBUS, 0); ++ } ++ break; ++ default: ++ break; ++ } ++ break; ++ case PD_CTRL_REJECT: ++ case PD_CTRL_WAIT: ++ case PD_CTRL_NOT_SUPP: ++ switch (port->state) { ++ case SNK_NEGOTIATE_CAPABILITIES: ++ /* USB PD specification, Figure 8-43 */ ++ if (port->explicit_contract) ++ next_state = SNK_READY; ++ else ++ next_state = SNK_WAIT_CAPABILITIES; ++ ++ tcpm_set_state(dev, next_state, 0); ++ break; ++ default: ++ break; ++ } ++ break; ++ case PD_CTRL_ACCEPT: ++ switch (port->state) { ++ case SNK_NEGOTIATE_CAPABILITIES: ++ tcpm_set_state(dev, SNK_TRANSITION_SINK, 0); ++ break; ++ case SOFT_RESET_SEND: ++ port->message_id = 0; ++ port->rx_msgid = -1; ++ if (port->pwr_role == TYPEC_SOURCE) ++ next_state = SRC_SEND_CAPABILITIES; ++ else ++ next_state = SNK_WAIT_CAPABILITIES; ++ tcpm_set_state(dev, next_state, 0); ++ break; ++ default: ++ break; ++ } ++ break; ++ case PD_CTRL_SOFT_RESET: ++ tcpm_set_state(dev, SOFT_RESET, 0); ++ break; ++ case PD_CTRL_DR_SWAP: ++ if (port->port_type != TYPEC_PORT_DRP) { ++ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); ++ break; ++ } ++ /* ++ * 6.3.9: If an alternate mode is active, a request to swap ++ * alternate modes shall trigger a port reset. ++ */ ++ switch (port->state) { ++ case SRC_READY: ++ case SNK_READY: ++ tcpm_set_state(dev, DR_SWAP_ACCEPT, 0); ++ break; ++ default: ++ tcpm_queue_message(dev, PD_MSG_CTRL_WAIT); ++ break; ++ } ++ break; ++ case PD_CTRL_PR_SWAP: ++ case PD_CTRL_VCONN_SWAP: ++ case PD_CTRL_GET_SOURCE_CAP_EXT: ++ case PD_CTRL_GET_STATUS: ++ case PD_CTRL_FR_SWAP: ++ case PD_CTRL_GET_PPS_STATUS: ++ case PD_CTRL_GET_COUNTRY_CODES: ++ /* Currently not supported */ ++ dev_err(dev, "TCPM: Currently not supported type %#x\n", type); ++ tcpm_queue_message(dev, PD_MSG_CTRL_NOT_SUPP); ++ break; ++ default: ++ dev_err(dev, "TCPM: Unrecognized ctrl message type %#x\n", type); ++ break; ++ } ++} ++ ++static void tcpm_pd_rx_handler(struct udevice *dev, ++ const struct pd_message *msg) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ unsigned int cnt = pd_header_cnt_le(msg->header); ++ bool remote_is_host, local_is_host; ++ ++ dev_dbg(dev, "TCPM: PD RX, header: %#x [%d]\n", ++ le16_to_cpu(msg->header), port->attached); ++ ++ if (port->attached) { ++ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header); ++ unsigned int msgid = pd_header_msgid_le(msg->header); ++ ++ /* ++ * USB PD standard, 6.6.1.2: ++ * "... if MessageID value in a received Message is the ++ * same as the stored value, the receiver shall return a ++ * GoodCRC Message with that MessageID value and drop ++ * the Message (this is a retry of an already received ++ * Message). Note: this shall not apply to the Soft_Reset ++ * Message which always has a MessageID value of zero." ++ */ ++ if (msgid == port->rx_msgid && type != PD_CTRL_SOFT_RESET) ++ return; ++ port->rx_msgid = msgid; ++ ++ /* ++ * If both ends believe to be DFP/host, we have a data role ++ * mismatch. ++ */ ++ remote_is_host = !!(le16_to_cpu(msg->header) & PD_HEADER_DATA_ROLE); ++ local_is_host = port->data_role == TYPEC_HOST; ++ if (remote_is_host == local_is_host) { ++ dev_err(dev, "TCPM: data role mismatch, initiating error recovery\n"); ++ tcpm_set_state(dev, ERROR_RECOVERY, 0); ++ } else { ++ if (cnt) ++ tcpm_pd_data_request(dev, msg); ++ else ++ tcpm_pd_ctrl_request(dev, msg); ++ } ++ } ++} ++ ++void tcpm_pd_receive(struct udevice *dev, const struct pd_message *msg) ++{ ++ tcpm_reset_event_cnt(dev); ++ tcpm_pd_rx_handler(dev, msg); ++} ++ ++static int tcpm_pd_send_control(struct udevice *dev, ++ enum pd_ctrl_msg_type type) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ struct pd_message msg; ++ ++ memset(&msg, 0, sizeof(msg)); ++ msg.header = PD_HEADER_LE(type, port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, 0); ++ ++ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); ++} ++ ++/* ++ * Send queued message without affecting state. ++ * Return true if state machine should go back to sleep, ++ * false otherwise. ++ */ ++static bool tcpm_send_queued_message(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum pd_msg_request queued_message; ++ int max_messages = 100; ++ ++ do { ++ queued_message = port->queued_message; ++ port->queued_message = PD_MSG_NONE; ++ max_messages--; ++ ++ switch (queued_message) { ++ case PD_MSG_CTRL_WAIT: ++ tcpm_pd_send_control(dev, PD_CTRL_WAIT); ++ break; ++ case PD_MSG_CTRL_REJECT: ++ tcpm_pd_send_control(dev, PD_CTRL_REJECT); ++ break; ++ case PD_MSG_CTRL_NOT_SUPP: ++ tcpm_pd_send_control(dev, PD_CTRL_NOT_SUPP); ++ break; ++ case PD_MSG_DATA_SINK_CAP: ++ tcpm_pd_send_sink_caps(dev); ++ break; ++ case PD_MSG_DATA_SOURCE_CAP: ++ tcpm_pd_send_source_caps(dev); ++ break; ++ default: ++ break; ++ } ++ } while (max_messages > 0 && port->queued_message != PD_MSG_NONE); ++ ++ if (!max_messages) ++ dev_err(dev, "Aborted sending of too many queued messages\n"); ++ ++ return false; ++} ++ ++static int tcpm_pd_check_request(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ u32 pdo, rdo = port->sink_request; ++ unsigned int max, op, pdo_max, index; ++ enum pd_pdo_type type; ++ ++ index = rdo_index(rdo); ++ if (!index || index > port->nr_src_pdo) ++ return -EINVAL; ++ ++ pdo = port->src_pdo[index - 1]; ++ type = pdo_type(pdo); ++ switch (type) { ++ case PDO_TYPE_FIXED: ++ case PDO_TYPE_VAR: ++ max = rdo_max_current(rdo); ++ op = rdo_op_current(rdo); ++ pdo_max = pdo_max_current(pdo); ++ ++ if (op > pdo_max) ++ return -EINVAL; ++ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH)) ++ return -EINVAL; ++ ++ if (type == PDO_TYPE_FIXED) ++ dev_dbg(dev, "TCPM: Requested %u mV, %u mA for %u / %u mA\n", ++ pdo_fixed_voltage(pdo), pdo_max, op, max); ++ else ++ dev_dbg(dev, "TCPM: Requested %u -> %u mV, %u mA for %u / %u mA\n", ++ pdo_min_voltage(pdo), pdo_max_voltage(pdo), ++ pdo_max, op, max); ++ break; ++ case PDO_TYPE_BATT: ++ max = rdo_max_power(rdo); ++ op = rdo_op_power(rdo); ++ pdo_max = pdo_max_power(pdo); ++ ++ if (op > pdo_max) ++ return -EINVAL; ++ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH)) ++ return -EINVAL; ++ dev_info(dev, "TCPM: Requested %u -> %u mV, %u mW for %u / %u mW\n", ++ pdo_min_voltage(pdo), pdo_max_voltage(pdo), ++ pdo_max, op, max); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++#define min_power(x, y) min(pdo_max_power(x), pdo_max_power(y)) ++#define min_current(x, y) min(pdo_max_current(x), pdo_max_current(y)) ++ ++static int tcpm_pd_select_pdo(struct udevice *dev, int *sink_pdo, ++ int *src_pdo) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ unsigned int i, j, max_src_mv = 0, min_src_mv = 0, max_mw = 0, ++ max_mv = 0, src_mw = 0, src_ma = 0, max_snk_mv = 0, ++ min_snk_mv = 0; ++ int ret = -EINVAL; ++ ++ /* ++ * Select the source PDO providing the most power which has a ++ * matchig sink cap. ++ */ ++ for (i = 0; i < port->nr_source_caps; i++) { ++ u32 pdo = port->source_caps[i]; ++ enum pd_pdo_type type = pdo_type(pdo); ++ ++ switch (type) { ++ case PDO_TYPE_FIXED: ++ max_src_mv = pdo_fixed_voltage(pdo); ++ min_src_mv = max_src_mv; ++ break; ++ case PDO_TYPE_BATT: ++ case PDO_TYPE_VAR: ++ max_src_mv = pdo_max_voltage(pdo); ++ min_src_mv = pdo_min_voltage(pdo); ++ break; ++ case PDO_TYPE_APDO: ++ continue; ++ default: ++ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n"); ++ continue; ++ } ++ ++ switch (type) { ++ case PDO_TYPE_FIXED: ++ case PDO_TYPE_VAR: ++ src_ma = pdo_max_current(pdo); ++ src_mw = src_ma * min_src_mv / 1000; ++ break; ++ case PDO_TYPE_BATT: ++ src_mw = pdo_max_power(pdo); ++ break; ++ case PDO_TYPE_APDO: ++ continue; ++ default: ++ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n"); ++ continue; ++ } ++ ++ for (j = 0; j < port->nr_snk_pdo; j++) { ++ pdo = port->snk_pdo[j]; ++ ++ switch (pdo_type(pdo)) { ++ case PDO_TYPE_FIXED: ++ max_snk_mv = pdo_fixed_voltage(pdo); ++ min_snk_mv = max_snk_mv; ++ break; ++ case PDO_TYPE_BATT: ++ case PDO_TYPE_VAR: ++ max_snk_mv = pdo_max_voltage(pdo); ++ min_snk_mv = pdo_min_voltage(pdo); ++ break; ++ case PDO_TYPE_APDO: ++ continue; ++ default: ++ dev_err(dev, "TCPM: Invalid sink PDO type, ignoring\n"); ++ continue; ++ } ++ ++ if (max_src_mv <= max_snk_mv && min_src_mv >= min_snk_mv) { ++ /* Prefer higher voltages if available */ ++ if ((src_mw == max_mw && min_src_mv > max_mv) || ++ src_mw > max_mw) { ++ *src_pdo = i; ++ *sink_pdo = j; ++ max_mw = src_mw; ++ max_mv = min_src_mv; ++ ret = 0; ++ } ++ } ++ } ++ } ++ ++ return ret; ++} ++ ++static int tcpm_pd_build_request(struct udevice *dev, u32 *rdo) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ unsigned int mv, ma, mw, flags; ++ unsigned int max_ma, max_mw; ++ enum pd_pdo_type type; ++ u32 pdo, matching_snk_pdo; ++ int src_pdo_index = 0; ++ int snk_pdo_index = 0; ++ int ret; ++ ++ ret = tcpm_pd_select_pdo(dev, &snk_pdo_index, &src_pdo_index); ++ if (ret < 0) ++ return ret; ++ ++ pdo = port->source_caps[src_pdo_index]; ++ matching_snk_pdo = port->snk_pdo[snk_pdo_index]; ++ type = pdo_type(pdo); ++ ++ switch (type) { ++ case PDO_TYPE_FIXED: ++ mv = pdo_fixed_voltage(pdo); ++ break; ++ case PDO_TYPE_BATT: ++ case PDO_TYPE_VAR: ++ mv = pdo_min_voltage(pdo); ++ break; ++ default: ++ dev_err(dev, "TCPM: Invalid PDO selected!\n"); ++ return -EINVAL; ++ } ++ ++ /* Select maximum available current within the sink pdo's limit */ ++ if (type == PDO_TYPE_BATT) { ++ mw = min_power(pdo, matching_snk_pdo); ++ ma = 1000 * mw / mv; ++ } else { ++ ma = min_current(pdo, matching_snk_pdo); ++ mw = ma * mv / 1000; ++ } ++ ++ flags = RDO_USB_COMM | RDO_NO_SUSPEND; ++ ++ /* Set mismatch bit if offered power is less than operating power */ ++ max_ma = ma; ++ max_mw = mw; ++ if (mw < port->operating_snk_mw) { ++ flags |= RDO_CAP_MISMATCH; ++ if (type == PDO_TYPE_BATT && ++ (pdo_max_power(matching_snk_pdo) > pdo_max_power(pdo))) ++ max_mw = pdo_max_power(matching_snk_pdo); ++ else if (pdo_max_current(matching_snk_pdo) > ++ pdo_max_current(pdo)) ++ max_ma = pdo_max_current(matching_snk_pdo); ++ } ++ ++ dev_dbg(dev, "TCPM: cc=%d cc1=%d cc2=%d vbus=%d vconn=%s polarity=%d\n", ++ port->cc_req, port->cc1, port->cc2, port->vbus_source, ++ port->vconn_role == TYPEC_SOURCE ? "source" : "sink", ++ port->polarity); ++ ++ if (type == PDO_TYPE_BATT) { ++ *rdo = RDO_BATT(src_pdo_index + 1, mw, max_mw, flags); ++ ++ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mW%s\n", ++ src_pdo_index, mv, mw, ++ flags & RDO_CAP_MISMATCH ? " [mismatch]" : ""); ++ } else { ++ *rdo = RDO_FIXED(src_pdo_index + 1, ma, max_ma, flags); ++ ++ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mA%s\n", ++ src_pdo_index, mv, ma, ++ flags & RDO_CAP_MISMATCH ? " [mismatch]" : ""); ++ } ++ ++ port->req_current_limit = ma; ++ port->req_supply_voltage = mv; ++ ++ return 0; ++} ++ ++static int tcpm_pd_send_request(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ struct pd_message msg; ++ int ret; ++ u32 rdo; ++ ++ ret = tcpm_pd_build_request(dev, &rdo); ++ if (ret < 0) ++ return ret; ++ ++ memset(&msg, 0, sizeof(msg)); ++ msg.header = PD_HEADER_LE(PD_DATA_REQUEST, ++ port->pwr_role, ++ port->data_role, ++ port->negotiated_rev, ++ port->message_id, 1); ++ msg.payload[0] = cpu_to_le32(rdo); ++ ++ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); ++} ++ ++static int tcpm_set_vbus(struct udevice *dev, bool enable) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ int ret; ++ ++ if (enable && port->vbus_charge) ++ return -EINVAL; ++ ++ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n", ++ enable, port->vbus_charge); ++ ++ ret = drvops->set_vbus(dev, enable, port->vbus_charge); ++ if (ret < 0) ++ return ret; ++ ++ port->vbus_source = enable; ++ return 0; ++} ++ ++static int tcpm_set_charge(struct udevice *dev, bool charge) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ if (charge && port->vbus_source) ++ return -EINVAL; ++ ++ if (charge != port->vbus_charge) { ++ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n", ++ port->vbus_source, charge); ++ ret = drvops->set_vbus(dev, port->vbus_source, ++ charge); ++ if (ret < 0) ++ return ret; ++ } ++ port->vbus_charge = charge; ++ return 0; ++} ++ ++static bool tcpm_start_toggling(struct udevice *dev, enum typec_cc_status cc) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ if (!drvops->start_toggling) ++ return false; ++ ++ dev_dbg(dev, "TCPM: Start toggling\n"); ++ ret = drvops->start_toggling(dev, port->port_type, cc); ++ return ret == 0; ++} ++ ++static int tcpm_init_vbus(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ ret = drvops->set_vbus(dev, false, false); ++ port->vbus_source = false; ++ port->vbus_charge = false; ++ return ret; ++} ++ ++static int tcpm_init_vconn(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ ret = drvops->set_vconn(dev, false); ++ port->vconn_role = TYPEC_SINK; ++ return ret; ++} ++ ++static inline void tcpm_typec_connect(struct tcpm_port *port) ++{ ++ if (!port->connected) ++ port->connected = true; ++} ++ ++static int tcpm_src_attach(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum typec_cc_polarity polarity = ++ port->cc2 == TYPEC_CC_RD ? TYPEC_POLARITY_CC2 ++ : TYPEC_POLARITY_CC1; ++ int ret; ++ ++ if (port->attached) ++ return 0; ++ ++ ret = tcpm_set_polarity(dev, polarity); ++ if (ret < 0) ++ return ret; ++ ++ ret = tcpm_set_roles(dev, true, TYPEC_SOURCE, TYPEC_HOST); ++ if (ret < 0) ++ return ret; ++ ++ ret = drvops->set_pd_rx(dev, true); ++ if (ret < 0) ++ goto out_disable_mux; ++ ++ /* ++ * USB Type-C specification, version 1.2, ++ * chapter 4.5.2.2.8.1 (Attached.SRC Requirements) ++ * Enable VCONN only if the non-RD port is set to RA. ++ */ ++ if ((polarity == TYPEC_POLARITY_CC1 && port->cc2 == TYPEC_CC_RA) || ++ (polarity == TYPEC_POLARITY_CC2 && port->cc1 == TYPEC_CC_RA)) { ++ ret = tcpm_set_vconn(dev, true); ++ if (ret < 0) ++ goto out_disable_pd; ++ } ++ ++ ret = tcpm_set_vbus(dev, true); ++ if (ret < 0) ++ goto out_disable_vconn; ++ ++ port->pd_capable = false; ++ ++ port->partner = NULL; ++ ++ port->attached = true; ++ ++ return 0; ++ ++out_disable_vconn: ++ tcpm_set_vconn(dev, false); ++out_disable_pd: ++ drvops->set_pd_rx(dev, false); ++out_disable_mux: ++ dev_err(dev, "TCPM: CC connected in %s as DFP\n", ++ polarity ? "CC2" : "CC1"); ++ return 0; ++} ++ ++static inline void tcpm_typec_disconnect(struct tcpm_port *port) ++{ ++ if (port->connected) { ++ port->partner = NULL; ++ port->connected = false; ++ } ++} ++ ++static void tcpm_reset_port(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ tcpm_timer_uninit(dev); ++ tcpm_typec_disconnect(port); ++ tcpm_reset_event_cnt(dev); ++ port->wait_dr_swap_message = false; ++ port->attached = false; ++ port->pd_capable = false; ++ ++ /* ++ * First Rx ID should be 0; set this to a sentinel of -1 so that ++ * we can check tcpm_pd_rx_handler() if we had seen it before. ++ */ ++ port->rx_msgid = -1; ++ ++ drvops->set_pd_rx(dev, false); ++ tcpm_init_vbus(dev); /* also disables charging */ ++ tcpm_init_vconn(dev); ++ tcpm_set_current_limit(dev, 0, 0); ++ tcpm_set_polarity(dev, TYPEC_POLARITY_CC1); ++ tcpm_set_attached_state(dev, false); ++ port->nr_sink_caps = 0; ++} ++ ++static void tcpm_detach(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ if (tcpm_port_is_disconnected(port)) ++ port->hard_reset_count = 0; ++ ++ if (!port->attached) ++ return; ++ ++ tcpm_reset_port(dev); ++} ++ ++static void tcpm_src_detach(struct udevice *dev) ++{ ++ tcpm_detach(dev); ++} ++ ++static int tcpm_snk_attach(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ if (port->attached) ++ return 0; ++ ++ ret = tcpm_set_polarity(dev, port->cc2 != TYPEC_CC_OPEN ? ++ TYPEC_POLARITY_CC2 : TYPEC_POLARITY_CC1); ++ if (ret < 0) ++ return ret; ++ ++ ret = tcpm_set_roles(dev, true, TYPEC_SINK, TYPEC_DEVICE); ++ if (ret < 0) ++ return ret; ++ ++ port->pd_capable = false; ++ ++ port->partner = NULL; ++ ++ port->attached = true; ++ dev_info(dev, "TCPM: CC connected in %s as UFP\n", ++ port->cc1 != TYPEC_CC_OPEN ? "CC1" : "CC2"); ++ ++ return 0; ++} ++ ++static void tcpm_snk_detach(struct udevice *dev) ++{ ++ tcpm_detach(dev); ++} ++ ++static inline enum tcpm_state hard_reset_state(struct tcpm_port *port) ++{ ++ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) ++ return HARD_RESET_SEND; ++ if (port->pd_capable) ++ return ERROR_RECOVERY; ++ if (port->pwr_role == TYPEC_SOURCE) ++ return SRC_UNATTACHED; ++ if (port->state == SNK_WAIT_CAPABILITIES) ++ return SNK_READY; ++ return SNK_UNATTACHED; ++} ++ ++static inline enum tcpm_state unattached_state(struct tcpm_port *port) ++{ ++ if (port->port_type == TYPEC_PORT_DRP) { ++ if (port->pwr_role == TYPEC_SOURCE) ++ return SRC_UNATTACHED; ++ else ++ return SNK_UNATTACHED; ++ } else if (port->port_type == TYPEC_PORT_SRC) { ++ return SRC_UNATTACHED; ++ } ++ ++ return SNK_UNATTACHED; ++} ++ ++static void run_state_machine(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int ret; ++ ++ port->enter_state = port->state; ++ switch (port->state) { ++ case TOGGLING: ++ break; ++ /* SRC states */ ++ case SRC_UNATTACHED: ++ tcpm_src_detach(dev); ++ if (tcpm_start_toggling(dev, tcpm_rp_cc(port))) { ++ tcpm_set_state(dev, TOGGLING, 0); ++ break; ++ } ++ tcpm_set_cc(dev, tcpm_rp_cc(port)); ++ if (port->port_type == TYPEC_PORT_DRP) ++ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_DRP_SNK); ++ break; ++ case SRC_ATTACH_WAIT: ++ if (tcpm_port_is_source(port)) ++ tcpm_set_state(dev, SRC_ATTACHED, PD_T_CC_DEBOUNCE); ++ break; ++ ++ case SRC_ATTACHED: ++ ret = tcpm_src_attach(dev); ++ /* ++ * Currently, vbus control is not implemented, ++ * and the SRC detection process cannot be fully implemented. ++ */ ++ tcpm_set_state(dev, SRC_READY, 0); ++ break; ++ case SRC_STARTUP: ++ port->caps_count = 0; ++ port->negotiated_rev = PD_MAX_REV; ++ port->message_id = 0; ++ port->rx_msgid = -1; ++ port->explicit_contract = false; ++ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); ++ break; ++ case SRC_SEND_CAPABILITIES: ++ port->caps_count++; ++ if (port->caps_count > PD_N_CAPS_COUNT) { ++ tcpm_set_state(dev, SRC_READY, 0); ++ break; ++ } ++ ret = tcpm_pd_send_source_caps(dev); ++ if (ret < 0) { ++ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, ++ PD_T_SEND_SOURCE_CAP); ++ } else { ++ /* ++ * Per standard, we should clear the reset counter here. ++ * However, that can result in state machine hang-ups. ++ * Reset it only in READY state to improve stability. ++ */ ++ /* port->hard_reset_count = 0; */ ++ port->caps_count = 0; ++ port->pd_capable = true; ++ tcpm_set_state_cond(dev, SRC_SEND_CAPABILITIES_TIMEOUT, ++ PD_T_SEND_SOURCE_CAP); ++ } ++ break; ++ case SRC_SEND_CAPABILITIES_TIMEOUT: ++ /* ++ * Error recovery for a PD_DATA_SOURCE_CAP reply timeout. ++ * ++ * PD 2.0 sinks are supposed to accept src-capabilities with a ++ * 3.0 header and simply ignore any src PDOs which the sink does ++ * not understand such as PPS but some 2.0 sinks instead ignore ++ * the entire PD_DATA_SOURCE_CAP message, causing contract ++ * negotiation to fail. ++ * ++ * After PD_N_HARD_RESET_COUNT hard-reset attempts, we try ++ * sending src-capabilities with a lower PD revision to ++ * make these broken sinks work. ++ */ ++ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) { ++ tcpm_set_state(dev, HARD_RESET_SEND, 0); ++ } else if (port->negotiated_rev > PD_REV20) { ++ port->negotiated_rev--; ++ port->hard_reset_count = 0; ++ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); ++ } else { ++ tcpm_set_state(dev, hard_reset_state(port), 0); ++ } ++ break; ++ case SRC_NEGOTIATE_CAPABILITIES: ++ ret = tcpm_pd_check_request(dev); ++ if (ret < 0) { ++ tcpm_pd_send_control(dev, PD_CTRL_REJECT); ++ if (!port->explicit_contract) { ++ tcpm_set_state(dev, ++ SRC_WAIT_NEW_CAPABILITIES, 0); ++ } else { ++ tcpm_set_state(dev, SRC_READY, 0); ++ } ++ } else { ++ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); ++ tcpm_set_state(dev, SRC_TRANSITION_SUPPLY, ++ PD_T_SRC_TRANSITION); ++ } ++ break; ++ case SRC_TRANSITION_SUPPLY: ++ /* XXX: regulator_set_voltage(vbus, ...) */ ++ tcpm_pd_send_control(dev, PD_CTRL_PS_RDY); ++ port->explicit_contract = true; ++ tcpm_set_state_cond(dev, SRC_READY, 0); ++ break; ++ case SRC_READY: ++ port->hard_reset_count = 0; ++ ++ tcpm_typec_connect(port); ++ break; ++ case SRC_WAIT_NEW_CAPABILITIES: ++ /* Nothing to do... */ ++ break; ++ ++ /* SNK states */ ++ case SNK_UNATTACHED: ++ tcpm_snk_detach(dev); ++ if (tcpm_start_toggling(dev, TYPEC_CC_RD)) { ++ tcpm_set_state(dev, TOGGLING, 0); ++ break; ++ } ++ tcpm_set_cc(dev, TYPEC_CC_RD); ++ if (port->port_type == TYPEC_PORT_DRP) ++ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_DRP_SRC); ++ break; ++ case SNK_ATTACH_WAIT: ++ if ((port->cc1 == TYPEC_CC_OPEN && ++ port->cc2 != TYPEC_CC_OPEN) || ++ (port->cc1 != TYPEC_CC_OPEN && ++ port->cc2 == TYPEC_CC_OPEN)) ++ tcpm_set_state(dev, SNK_DEBOUNCED, ++ PD_T_CC_DEBOUNCE); ++ else if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, SNK_UNATTACHED, ++ PD_T_CC_DEBOUNCE); ++ break; ++ case SNK_DEBOUNCED: ++ if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_PD_DEBOUNCE); ++ else if (port->vbus_present) ++ tcpm_set_state(dev, SNK_ATTACHED, 0); ++ else ++ /* Wait for VBUS, but not forever */ ++ tcpm_set_state(dev, PORT_RESET, PD_T_PS_SOURCE_ON); ++ break; ++ case SNK_ATTACHED: ++ ret = tcpm_snk_attach(dev); ++ if (ret < 0) ++ tcpm_set_state(dev, SNK_UNATTACHED, 0); ++ else ++ tcpm_set_state(dev, SNK_STARTUP, 0); ++ break; ++ case SNK_STARTUP: ++ port->negotiated_rev = PD_MAX_REV; ++ port->message_id = 0; ++ port->rx_msgid = -1; ++ port->explicit_contract = false; ++ tcpm_set_state(dev, SNK_DISCOVERY, 0); ++ break; ++ case SNK_DISCOVERY: ++ if (port->vbus_present) { ++ tcpm_set_current_limit(dev, ++ tcpm_get_current_limit(port), ++ 5000); ++ tcpm_set_charge(dev, true); ++ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); ++ break; ++ } ++ /* ++ * For DRP, timeouts differ. Also, handling is supposed to be ++ * different and much more complex (dead battery detection; ++ * see USB power delivery specification, section 8.3.3.6.1.5.1). ++ */ ++ tcpm_set_state(dev, hard_reset_state(port), ++ port->port_type == TYPEC_PORT_DRP ? ++ PD_T_DB_DETECT : PD_T_NO_RESPONSE); ++ break; ++ case SNK_DISCOVERY_DEBOUNCE: ++ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE_DONE, ++ PD_T_CC_DEBOUNCE); ++ break; ++ case SNK_DISCOVERY_DEBOUNCE_DONE: ++ tcpm_set_state(dev, unattached_state(port), 0); ++ break; ++ case SNK_WAIT_CAPABILITIES: ++ ret = drvops->set_pd_rx(dev, true); ++ if (ret < 0) { ++ tcpm_set_state(dev, SNK_READY, 0); ++ break; ++ } ++ /* ++ * If VBUS has never been low, and we time out waiting ++ * for source cap, try a soft reset first, in case we ++ * were already in a stable contract before this boot. ++ * Do this only once. ++ */ ++ if (port->vbus_never_low) { ++ port->vbus_never_low = false; ++ tcpm_set_state(dev, SOFT_RESET_SEND, ++ PD_T_SINK_WAIT_CAP); ++ } else { ++ tcpm_set_state(dev, hard_reset_state(port), ++ PD_T_SINK_WAIT_CAP); ++ } ++ break; ++ case SNK_NEGOTIATE_CAPABILITIES: ++ port->pd_capable = true; ++ port->hard_reset_count = 0; ++ ret = tcpm_pd_send_request(dev); ++ if (ret < 0) { ++ /* Let the Source send capabilities again. */ ++ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); ++ } else { ++ tcpm_set_state_cond(dev, hard_reset_state(port), ++ PD_T_SENDER_RESPONSE); ++ } ++ break; ++ case SNK_TRANSITION_SINK: ++ case SNK_TRANSITION_SINK_VBUS: ++ tcpm_set_state(dev, hard_reset_state(port), ++ PD_T_PS_TRANSITION); ++ break; ++ case SNK_READY: ++ port->update_sink_caps = false; ++ tcpm_typec_connect(port); ++ /* ++ * Here poll_event_cnt is cleared, waiting for self-powered Type-C devices ++ * to send DR_swap Messge until 1s (TCPM_POLL_EVENT_TIME_OUT * 500us)timeout ++ */ ++ if (port->wait_dr_swap_message) ++ tcpm_reset_event_cnt(dev); ++ ++ break; ++ ++ /* Hard_Reset states */ ++ case HARD_RESET_SEND: ++ tcpm_pd_transmit(dev, TCPC_TX_HARD_RESET, NULL); ++ tcpm_set_state(dev, HARD_RESET_START, 0); ++ port->wait_dr_swap_message = false; ++ break; ++ case HARD_RESET_START: ++ port->hard_reset_count++; ++ drvops->set_pd_rx(dev, false); ++ port->nr_sink_caps = 0; ++ if (port->pwr_role == TYPEC_SOURCE) ++ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_OFF, ++ PD_T_PS_HARD_RESET); ++ else ++ tcpm_set_state(dev, SNK_HARD_RESET_SINK_OFF, 0); ++ break; ++ case SRC_HARD_RESET_VBUS_OFF: ++ tcpm_set_vconn(dev, true); ++ tcpm_set_vbus(dev, false); ++ tcpm_set_roles(dev, port->self_powered, TYPEC_SOURCE, ++ TYPEC_HOST); ++ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_ON, PD_T_SRC_RECOVER); ++ break; ++ case SRC_HARD_RESET_VBUS_ON: ++ tcpm_set_vconn(dev, true); ++ tcpm_set_vbus(dev, true); ++ drvops->set_pd_rx(dev, true); ++ tcpm_set_attached_state(dev, true); ++ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_PS_SOURCE_ON); ++ break; ++ case SNK_HARD_RESET_SINK_OFF: ++ tcpm_set_vconn(dev, false); ++ if (port->pd_capable) ++ tcpm_set_charge(dev, false); ++ tcpm_set_roles(dev, port->self_powered, TYPEC_SINK, ++ TYPEC_DEVICE); ++ /* ++ * VBUS may or may not toggle, depending on the adapter. ++ * If it doesn't toggle, transition to SNK_HARD_RESET_SINK_ON ++ * directly after timeout. ++ */ ++ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, PD_T_SAFE_0V); ++ break; ++ case SNK_HARD_RESET_WAIT_VBUS: ++ /* Assume we're disconnected if VBUS doesn't come back. */ ++ tcpm_set_state(dev, SNK_UNATTACHED, ++ PD_T_SRC_RECOVER_MAX + PD_T_SRC_TURN_ON); ++ break; ++ case SNK_HARD_RESET_SINK_ON: ++ /* Note: There is no guarantee that VBUS is on in this state */ ++ /* ++ * XXX: ++ * The specification suggests that dual mode ports in sink ++ * mode should transition to state PE_SRC_Transition_to_default. ++ * See USB power delivery specification chapter 8.3.3.6.1.3. ++ * This would mean to ++ * - turn off VCONN, reset power supply ++ * - request hardware reset ++ * - turn on VCONN ++ * - Transition to state PE_Src_Startup ++ * SNK only ports shall transition to state Snk_Startup ++ * (see chapter 8.3.3.3.8). ++ * Similar, dual-mode ports in source mode should transition ++ * to PE_SNK_Transition_to_default. ++ */ ++ if (port->pd_capable) { ++ tcpm_set_current_limit(dev, ++ tcpm_get_current_limit(port), ++ 5000); ++ tcpm_set_charge(dev, true); ++ } ++ tcpm_set_attached_state(dev, true); ++ tcpm_set_state(dev, SNK_STARTUP, 0); ++ break; ++ ++ /* Soft_Reset states */ ++ case SOFT_RESET: ++ port->message_id = 0; ++ port->rx_msgid = -1; ++ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); ++ if (port->pwr_role == TYPEC_SOURCE) ++ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); ++ else ++ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); ++ break; ++ case SOFT_RESET_SEND: ++ port->message_id = 0; ++ port->rx_msgid = -1; ++ if (tcpm_pd_send_control(dev, PD_CTRL_SOFT_RESET)) ++ tcpm_set_state_cond(dev, hard_reset_state(port), 0); ++ else ++ tcpm_set_state_cond(dev, hard_reset_state(port), ++ PD_T_SENDER_RESPONSE); ++ break; ++ ++ /* DR_Swap states */ ++ case DR_SWAP_ACCEPT: ++ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); ++ tcpm_set_state_cond(dev, DR_SWAP_CHANGE_DR, 0); ++ break; ++ case DR_SWAP_CHANGE_DR: ++ if (port->data_role == TYPEC_HOST) { ++ tcpm_set_roles(dev, true, port->pwr_role, ++ TYPEC_DEVICE); ++ } else { ++ tcpm_set_roles(dev, true, port->pwr_role, ++ TYPEC_HOST); ++ } ++ /* DR_swap process complete, wait_dr_swap_message is cleared */ ++ port->wait_dr_swap_message = false; ++ tcpm_set_state(dev, ready_state(port), 0); ++ break; ++ case ERROR_RECOVERY: ++ tcpm_set_state(dev, PORT_RESET, 0); ++ break; ++ case PORT_RESET: ++ tcpm_reset_port(dev); ++ if (port->self_powered) ++ tcpm_set_cc(dev, TYPEC_CC_OPEN); ++ else ++ tcpm_set_cc(dev, tcpm_default_state(port) == SNK_UNATTACHED ? ++ TYPEC_CC_RD : tcpm_rp_cc(port)); ++ tcpm_set_state(dev, PORT_RESET_WAIT_OFF, ++ PD_T_ERROR_RECOVERY); ++ break; ++ case PORT_RESET_WAIT_OFF: ++ tcpm_set_state(dev, ++ tcpm_default_state(port), ++ port->vbus_present ? PD_T_PS_SOURCE_OFF : 0); ++ break; ++ default: ++ dev_err(dev, "TCPM: Unexpected port state %d\n", port->state); ++ break; ++ } ++} ++ ++static void tcpm_state_machine(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum tcpm_state prev_state; ++ ++ mutex_lock(&port->lock); ++ port->state_machine_running = true; ++ ++ if (port->queued_message && tcpm_send_queued_message(dev)) ++ goto done; ++ ++ /* If we were queued due to a delayed state change, update it now */ ++ if (port->delayed_state) { ++ dev_dbg(dev, "TCPM: state change %s -> %s [delayed %ld ms]\n", ++ tcpm_states[port->state], ++ tcpm_states[port->delayed_state], port->delay_ms); ++ port->prev_state = port->state; ++ port->state = port->delayed_state; ++ port->delayed_state = INVALID_STATE; ++ } ++ ++ /* ++ * Continue running as long as we have (non-delayed) state changes ++ * to make. ++ */ ++ do { ++ prev_state = port->state; ++ run_state_machine(dev); ++ if (port->queued_message) ++ tcpm_send_queued_message(dev); ++ } while (port->state != prev_state && !port->delayed_state); ++ ++done: ++ port->state_machine_running = false; ++ mutex_unlock(&port->lock); ++} ++ ++static void _tcpm_cc_change(struct udevice *dev, enum typec_cc_status cc1, ++ enum typec_cc_status cc2) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum typec_cc_status old_cc1, old_cc2; ++ enum tcpm_state new_state; ++ ++ old_cc1 = port->cc1; ++ old_cc2 = port->cc2; ++ port->cc1 = cc1; ++ port->cc2 = cc2; ++ ++ dev_dbg(dev, "TCPM: CC1: %u -> %u, CC2: %u -> %u [state %s, polarity %d, %s]\n", ++ old_cc1, cc1, old_cc2, cc2, tcpm_states[port->state], ++ port->polarity, ++ tcpm_port_is_disconnected(port) ? "disconnected" : "connected"); ++ ++ switch (port->state) { ++ case TOGGLING: ++ if (tcpm_port_is_source(port)) ++ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0); ++ else if (tcpm_port_is_sink(port)) ++ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); ++ break; ++ case SRC_UNATTACHED: ++ case SRC_ATTACH_WAIT: ++ if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, SRC_UNATTACHED, 0); ++ else if (cc1 != old_cc1 || cc2 != old_cc2) ++ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0); ++ break; ++ case SRC_ATTACHED: ++ case SRC_SEND_CAPABILITIES: ++ case SRC_READY: ++ if (tcpm_port_is_disconnected(port) || ++ !tcpm_port_is_source(port)) ++ tcpm_set_state(dev, SRC_UNATTACHED, 0); ++ break; ++ case SNK_UNATTACHED: ++ if (tcpm_port_is_sink(port)) ++ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); ++ break; ++ case SNK_ATTACH_WAIT: ++ if ((port->cc1 == TYPEC_CC_OPEN && ++ port->cc2 != TYPEC_CC_OPEN) || ++ (port->cc1 != TYPEC_CC_OPEN && ++ port->cc2 == TYPEC_CC_OPEN)) ++ new_state = SNK_DEBOUNCED; ++ else if (tcpm_port_is_disconnected(port)) ++ new_state = SNK_UNATTACHED; ++ else ++ break; ++ if (new_state != port->delayed_state) ++ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); ++ break; ++ case SNK_DEBOUNCED: ++ if (tcpm_port_is_disconnected(port)) ++ new_state = SNK_UNATTACHED; ++ else if (port->vbus_present) ++ new_state = tcpm_try_src(port) ? INVALID_STATE : SNK_ATTACHED; ++ else ++ new_state = SNK_UNATTACHED; ++ if (new_state != port->delayed_state) ++ tcpm_set_state(dev, SNK_DEBOUNCED, 0); ++ break; ++ case SNK_READY: ++ if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, unattached_state(port), 0); ++ else if (!port->pd_capable && ++ (cc1 != old_cc1 || cc2 != old_cc2)) ++ tcpm_set_current_limit(dev, ++ tcpm_get_current_limit(port), ++ 5000); ++ break; ++ ++ case SNK_DISCOVERY: ++ /* CC line is unstable, wait for debounce */ ++ if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE, 0); ++ break; ++ case SNK_DISCOVERY_DEBOUNCE: ++ break; ++ ++ case PORT_RESET: ++ case PORT_RESET_WAIT_OFF: ++ /* ++ * State set back to default mode once the timer completes. ++ * Ignore CC changes here. ++ */ ++ break; ++ default: ++ /* ++ * While acting as sink and auto vbus discharge is enabled, Allow disconnect ++ * to be driven by vbus disconnect. ++ */ ++ if (tcpm_port_is_disconnected(port)) ++ tcpm_set_state(dev, unattached_state(port), 0); ++ break; ++ } ++} ++ ++static void _tcpm_pd_vbus_on(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ dev_dbg(dev, "TCPM: VBUS on event\n"); ++ port->vbus_present = true; ++ /* ++ * When vbus_present is true i.e. Voltage at VBUS is greater than VSAFE5V implicitly ++ * states that vbus is not at VSAFE0V, hence clear the vbus_vsafe0v flag here. ++ */ ++ port->vbus_vsafe0v = false; ++ ++ switch (port->state) { ++ case SNK_TRANSITION_SINK_VBUS: ++ port->explicit_contract = true; ++ tcpm_set_state(dev, SNK_READY, 0); ++ break; ++ case SNK_DISCOVERY: ++ tcpm_set_state(dev, SNK_DISCOVERY, 0); ++ break; ++ case SNK_DEBOUNCED: ++ tcpm_set_state(dev, SNK_ATTACHED, 0); ++ break; ++ case SNK_HARD_RESET_WAIT_VBUS: ++ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, 0); ++ break; ++ case SRC_ATTACHED: ++ tcpm_set_state(dev, SRC_STARTUP, 0); ++ break; ++ case SRC_HARD_RESET_VBUS_ON: ++ tcpm_set_state(dev, SRC_STARTUP, 0); ++ break; ++ ++ case PORT_RESET: ++ case PORT_RESET_WAIT_OFF: ++ /* ++ * State set back to default mode once the timer completes. ++ * Ignore vbus changes here. ++ */ ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++static void _tcpm_pd_vbus_off(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ dev_dbg(dev, "TCPM: VBUS off event\n"); ++ port->vbus_present = false; ++ port->vbus_never_low = false; ++ switch (port->state) { ++ case SNK_HARD_RESET_SINK_OFF: ++ tcpm_set_state(dev, SNK_HARD_RESET_WAIT_VBUS, 0); ++ break; ++ case HARD_RESET_SEND: ++ break; ++ case SNK_ATTACH_WAIT: ++ tcpm_set_state(dev, SNK_UNATTACHED, 0); ++ break; ++ ++ case SNK_NEGOTIATE_CAPABILITIES: ++ break; ++ ++ case PORT_RESET_WAIT_OFF: ++ tcpm_set_state(dev, tcpm_default_state(port), 0); ++ break; ++ ++ case PORT_RESET: ++ /* ++ * State set back to default mode once the timer completes. ++ * Ignore vbus changes here. ++ */ ++ break; ++ ++ default: ++ if (port->pwr_role == TYPEC_SINK && port->attached) ++ tcpm_set_state(dev, SNK_UNATTACHED, 0); ++ break; ++ } ++} ++ ++void tcpm_cc_change(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ enum typec_cc_status cc1, cc2; ++ ++ tcpm_reset_event_cnt(dev); ++ if (drvops->get_cc(dev, &cc1, &cc2) == 0) ++ _tcpm_cc_change(dev, cc1, cc2); ++} ++ ++void tcpm_vbus_change(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ bool vbus; ++ ++ tcpm_reset_event_cnt(dev); ++ vbus = drvops->get_vbus(dev); ++ if (vbus) ++ _tcpm_pd_vbus_on(dev); ++ else ++ _tcpm_pd_vbus_off(dev); ++} ++ ++void tcpm_pd_hard_reset(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ tcpm_reset_event_cnt(dev); ++ dev_dbg(dev, "TCPM: Received hard reset\n"); ++ ++ /* If a hard reset message is received during the port reset process, ++ * we should ignore it, that is, do not set port->state to HARD_RESET_START. ++ */ ++ if (port->state == PORT_RESET || port->state == PORT_RESET_WAIT_OFF) ++ return; ++ ++ /* ++ * If we keep receiving hard reset requests, executing the hard reset ++ * must have failed. Revert to error recovery if that happens. ++ */ ++ tcpm_set_state(dev, ++ port->hard_reset_count < PD_N_HARD_RESET_COUNT ? ++ HARD_RESET_START : ERROR_RECOVERY, ++ 0); ++} ++ ++static void tcpm_init(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ enum typec_cc_status cc1, cc2; ++ ++ drvops->init(dev); ++ ++ tcpm_reset_port(dev); ++ ++ /* ++ * XXX ++ * Should possibly wait for VBUS to settle if it was enabled locally ++ * since tcpm_reset_port() will disable VBUS. ++ */ ++ port->vbus_present = drvops->get_vbus(dev); ++ if (port->vbus_present) ++ port->vbus_never_low = true; ++ ++ /* ++ * 1. When vbus_present is true, voltage on VBUS is already at VSAFE5V. ++ * So implicitly vbus_vsafe0v = false. ++ * ++ * 2. When vbus_present is false and TCPC does NOT support querying ++ * vsafe0v status, then, it's best to assume vbus is at VSAFE0V i.e. ++ * vbus_vsafe0v is true. ++ * ++ * 3. When vbus_present is false and TCPC does support querying vsafe0v, ++ * then, query tcpc for vsafe0v status. ++ */ ++ if (port->vbus_present) ++ port->vbus_vsafe0v = false; ++ else ++ port->vbus_vsafe0v = true; ++ ++ tcpm_set_state(dev, tcpm_default_state(port), 0); ++ ++ if (drvops->get_cc(dev, &cc1, &cc2) == 0) ++ _tcpm_cc_change(dev, cc1, cc2); ++} ++ ++static int tcpm_fw_get_caps(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ofnode node; ++ const char *cap_str; ++ int ret; ++ u32 mw; ++ ++ ret = drvops->get_connector_node(dev, &node); ++ if (ret) ++ return ret; ++ ++ cap_str = ofnode_read_string(node, "power-role"); ++ if (!cap_str) ++ return -EINVAL; ++ ++ if (!strcmp("dual", cap_str)) ++ port->typec_type = TYPEC_PORT_DRP; ++ else if (!strcmp("source", cap_str)) ++ port->typec_type = TYPEC_PORT_SRC; ++ else if (!strcmp("sink", cap_str)) ++ port->typec_type = TYPEC_PORT_SNK; ++ else ++ return -EINVAL; ++ ++ port->port_type = port->typec_type; ++ ++ if (port->port_type == TYPEC_PORT_SNK) ++ goto sink; ++ ++ /* Get source pdos */ ++ ret = ofnode_read_size(node, "source-pdos") / sizeof(u32); ++ if (ret <= 0) ++ return -EINVAL; ++ ++ port->nr_src_pdo = min(ret, PDO_MAX_OBJECTS); ++ ret = ofnode_read_u32_array(node, "source-pdos", ++ port->src_pdo, port->nr_src_pdo); ++ if (ret || tcpm_validate_caps(dev, port->src_pdo, port->nr_src_pdo)) ++ return -EINVAL; ++ ++ if (port->port_type == TYPEC_PORT_SRC) ++ return 0; ++ ++ /* Get the preferred power role for DRP */ ++ cap_str = ofnode_read_string(node, "try-power-role"); ++ if (!cap_str) ++ return -EINVAL; ++ ++ if (!strcmp("sink", cap_str)) ++ port->typec_prefer_role = TYPEC_SINK; ++ else if (!strcmp("source", cap_str)) ++ port->typec_prefer_role = TYPEC_SOURCE; ++ else ++ return -EINVAL; ++ ++ if (port->typec_prefer_role < 0) ++ return -EINVAL; ++sink: ++ /* Get sink pdos */ ++ ret = ofnode_read_size(node, "sink-pdos") / sizeof(u32); ++ if (ret <= 0) ++ return -EINVAL; ++ ++ port->nr_snk_pdo = min(ret, PDO_MAX_OBJECTS); ++ ret = ofnode_read_u32_array(node, "sink-pdos", ++ port->snk_pdo, port->nr_snk_pdo); ++ if (ret || tcpm_validate_caps(dev, port->snk_pdo, port->nr_snk_pdo)) ++ return -EINVAL; ++ ++ if (ofnode_read_u32_array(node, "op-sink-microwatt", &mw, 1)) ++ return -EINVAL; ++ port->operating_snk_mw = mw / 1000; ++ ++ port->self_powered = ofnode_read_bool(node, "self-powered"); ++ ++ return 0; ++} ++ ++static int tcpm_port_init(struct udevice *dev) ++{ ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ int err; ++ ++ err = tcpm_fw_get_caps(dev); ++ if (err < 0) { ++ dev_err(dev, "TCPM: please check the dts config: %d\n", err); ++ return err; ++ } ++ ++ port->try_role = port->typec_prefer_role; ++ port->port_type = port->typec_type; ++ ++ tcpm_init(dev); ++ ++ dev_info(dev, "TCPM: init finished\n"); ++ ++ return 0; ++} ++ ++static void tcpm_poll_event(struct udevice *dev) ++{ ++ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); ++ struct tcpm_port *port = dev_get_uclass_plat(dev); ++ ++ if (!drvops->get_vbus(dev)) ++ return; ++ ++ while (port->poll_event_cnt < TCPM_POLL_EVENT_TIME_OUT) { ++ if (!port->wait_dr_swap_message && ++ (port->state == SNK_READY || port->state == SRC_READY)) ++ break; ++ ++ drvops->poll_event(dev); ++ port->poll_event_cnt++; ++ udelay(500); ++ tcpm_check_and_run_delayed_work(dev); ++ } ++ ++ if (port->state != SNK_READY && port->state != SRC_READY) ++ dev_warn(dev, "TCPM: exit in state %s\n", ++ tcpm_states[port->state]); ++ ++ /* ++ * At this time, call the callback function of the respective pd chip ++ * to enter the low-power mode. In order to reduce the time spent on ++ * the PD chip driver as much as possible, the tcpm framework does not ++ * fully process the communication initiated by the device,so it should ++ * be noted that we can disable the internal oscillator, etc., but do ++ * not turn off the power of the transceiver module, otherwise the ++ * self-powered Type-C device will initiate a Message(eg: self-powered ++ * Type-C hub initiates a SINK capability request(PD_CTRL_GET_SINK_CAP)) ++ * and the pd chip cannot reply to GoodCRC, causing the self-powered Type-C ++ * device to switch vbus to vSafe5v, or even turn off vbus. ++ */ ++ if (!drvops->enter_low_power_mode) ++ return; ++ ++ if (drvops->enter_low_power_mode(dev, port->attached, port->pd_capable)) ++ dev_err(dev, "TCPM: failed to enter low power\n"); ++ else ++ dev_info(dev, "TCPM: PD chip enter low power mode\n"); ++} ++ ++int tcpm_post_probe(struct udevice *dev) ++{ ++ int ret = tcpm_port_init(dev); ++ ++ if (ret < 0) { ++ dev_err(dev, "failed to tcpm port init\n"); ++ return ret; ++ } ++ ++ tcpm_poll_event(dev); ++ ++ return 0; ++} +diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h +index 5271e646bb16..270088ad94f7 100644 +--- a/include/dm/uclass-id.h ++++ b/include/dm/uclass-id.h +@@ -139,6 +139,7 @@ enum uclass_id { + UCLASS_SYSCON, /* System configuration device */ + UCLASS_SYSINFO, /* Device information from hardware */ + UCLASS_SYSRESET, /* System reset device */ ++ UCLASS_TCPM, /* TypeC port manager */ + UCLASS_TEE, /* Trusted Execution Environment device */ + UCLASS_THERMAL, /* Thermal sensor */ + UCLASS_TIMER, /* Timer device */ +diff --git a/include/usb/pd.h b/include/usb/pd.h +new file mode 100644 +index 000000000000..cacda322d7c6 +--- /dev/null ++++ b/include/usb/pd.h +@@ -0,0 +1,516 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright 2015-2017 Google, Inc ++ */ ++ ++#ifndef __LINUX_USB_PD_H ++#define __LINUX_USB_PD_H ++ ++#include ++#include ++ ++enum typec_port_type { ++ TYPEC_PORT_SRC, ++ TYPEC_PORT_SNK, ++ TYPEC_PORT_DRP, ++}; ++ ++enum typec_data_role { ++ TYPEC_DEVICE, ++ TYPEC_HOST, ++}; ++ ++enum typec_role { ++ TYPEC_SINK, ++ TYPEC_SOURCE, ++}; ++ ++/* USB PD Messages */ ++enum pd_ctrl_msg_type { ++ /* 0 Reserved */ ++ PD_CTRL_GOOD_CRC = 1, ++ PD_CTRL_GOTO_MIN = 2, ++ PD_CTRL_ACCEPT = 3, ++ PD_CTRL_REJECT = 4, ++ PD_CTRL_PING = 5, ++ PD_CTRL_PS_RDY = 6, ++ PD_CTRL_GET_SOURCE_CAP = 7, ++ PD_CTRL_GET_SINK_CAP = 8, ++ PD_CTRL_DR_SWAP = 9, ++ PD_CTRL_PR_SWAP = 10, ++ PD_CTRL_VCONN_SWAP = 11, ++ PD_CTRL_WAIT = 12, ++ PD_CTRL_SOFT_RESET = 13, ++ /* 14-15 Reserved */ ++ PD_CTRL_NOT_SUPP = 16, ++ PD_CTRL_GET_SOURCE_CAP_EXT = 17, ++ PD_CTRL_GET_STATUS = 18, ++ PD_CTRL_FR_SWAP = 19, ++ PD_CTRL_GET_PPS_STATUS = 20, ++ PD_CTRL_GET_COUNTRY_CODES = 21, ++ /* 22-31 Reserved */ ++}; ++ ++enum pd_data_msg_type { ++ /* 0 Reserved */ ++ PD_DATA_SOURCE_CAP = 1, ++ PD_DATA_REQUEST = 2, ++ PD_DATA_BIST = 3, ++ PD_DATA_SINK_CAP = 4, ++ PD_DATA_BATT_STATUS = 5, ++ PD_DATA_ALERT = 6, ++ PD_DATA_GET_COUNTRY_INFO = 7, ++ PD_DATA_ENTER_USB = 8, ++ /* 9-14 Reserved */ ++ PD_DATA_VENDOR_DEF = 15, ++ /* 16-31 Reserved */ ++}; ++ ++enum pd_ext_msg_type { ++ /* 0 Reserved */ ++ PD_EXT_SOURCE_CAP_EXT = 1, ++ PD_EXT_STATUS = 2, ++ PD_EXT_GET_BATT_CAP = 3, ++ PD_EXT_GET_BATT_STATUS = 4, ++ PD_EXT_BATT_CAP = 5, ++ PD_EXT_GET_MANUFACTURER_INFO = 6, ++ PD_EXT_MANUFACTURER_INFO = 7, ++ PD_EXT_SECURITY_REQUEST = 8, ++ PD_EXT_SECURITY_RESPONSE = 9, ++ PD_EXT_FW_UPDATE_REQUEST = 10, ++ PD_EXT_FW_UPDATE_RESPONSE = 11, ++ PD_EXT_PPS_STATUS = 12, ++ PD_EXT_COUNTRY_INFO = 13, ++ PD_EXT_COUNTRY_CODES = 14, ++ /* 15-31 Reserved */ ++}; ++ ++#define PD_REV10 0x0 ++#define PD_REV20 0x1 ++#define PD_REV30 0x2 ++#define PD_MAX_REV PD_REV30 ++ ++#define PD_HEADER_EXT_HDR BIT(15) ++#define PD_HEADER_CNT_SHIFT 12 ++#define PD_HEADER_CNT_MASK 0x7 ++#define PD_HEADER_ID_SHIFT 9 ++#define PD_HEADER_ID_MASK 0x7 ++#define PD_HEADER_PWR_ROLE BIT(8) ++#define PD_HEADER_REV_SHIFT 6 ++#define PD_HEADER_REV_MASK 0x3 ++#define PD_HEADER_DATA_ROLE BIT(5) ++#define PD_HEADER_TYPE_SHIFT 0 ++#define PD_HEADER_TYPE_MASK 0x1f ++ ++#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \ ++ ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \ ++ ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \ ++ ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \ ++ ((rev) << PD_HEADER_REV_SHIFT) | \ ++ (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \ ++ (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \ ++ ((ext_hdr) ? PD_HEADER_EXT_HDR : 0)) ++ ++#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \ ++ cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0))) ++ ++static inline unsigned int pd_header_cnt(u16 header) ++{ ++ return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK; ++} ++ ++static inline unsigned int pd_header_cnt_le(__le16 header) ++{ ++ return pd_header_cnt(le16_to_cpu(header)); ++} ++ ++static inline unsigned int pd_header_type(u16 header) ++{ ++ return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK; ++} ++ ++static inline unsigned int pd_header_type_le(__le16 header) ++{ ++ return pd_header_type(le16_to_cpu(header)); ++} ++ ++static inline unsigned int pd_header_msgid(u16 header) ++{ ++ return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK; ++} ++ ++static inline unsigned int pd_header_msgid_le(__le16 header) ++{ ++ return pd_header_msgid(le16_to_cpu(header)); ++} ++ ++static inline unsigned int pd_header_rev(u16 header) ++{ ++ return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK; ++} ++ ++static inline unsigned int pd_header_rev_le(__le16 header) ++{ ++ return pd_header_rev(le16_to_cpu(header)); ++} ++ ++#define PD_EXT_HDR_CHUNKED BIT(15) ++#define PD_EXT_HDR_CHUNK_NUM_SHIFT 11 ++#define PD_EXT_HDR_CHUNK_NUM_MASK 0xf ++#define PD_EXT_HDR_REQ_CHUNK BIT(10) ++#define PD_EXT_HDR_DATA_SIZE_SHIFT 0 ++#define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff ++ ++#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \ ++ ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \ ++ ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \ ++ (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \ ++ ((chunked) ? PD_EXT_HDR_CHUNKED : 0)) ++ ++#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \ ++ cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked))) ++ ++static inline unsigned int pd_ext_header_chunk_num(u16 ext_header) ++{ ++ return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) & ++ PD_EXT_HDR_CHUNK_NUM_MASK; ++} ++ ++static inline unsigned int pd_ext_header_data_size(u16 ext_header) ++{ ++ return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) & ++ PD_EXT_HDR_DATA_SIZE_MASK; ++} ++ ++static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header) ++{ ++ return pd_ext_header_data_size(le16_to_cpu(ext_header)); ++} ++ ++#define PD_MAX_PAYLOAD 7 ++#define PD_EXT_MAX_CHUNK_DATA 26 ++ ++/* ++ * struct pd_chunked_ext_message_data - PD chunked extended message data as ++ * seen on wire ++ * @header: PD extended message header ++ * @data: PD extended message data ++ */ ++struct pd_chunked_ext_message_data { ++ __le16 header; ++ u8 data[PD_EXT_MAX_CHUNK_DATA]; ++} __packed; ++ ++/* ++ * struct pd_message - PD message as seen on wire ++ * @header: PD message header ++ * @payload: PD message payload ++ * @ext_msg: PD message chunked extended message data ++ */ ++struct pd_message { ++ __le16 header; ++ union { ++ __le32 payload[PD_MAX_PAYLOAD]; ++ struct pd_chunked_ext_message_data ext_msg; ++ }; ++} __packed; ++ ++/* PDO: Power Data Object */ ++#define PDO_MAX_OBJECTS 7 ++ ++enum pd_pdo_type { ++ PDO_TYPE_FIXED = 0, ++ PDO_TYPE_BATT = 1, ++ PDO_TYPE_VAR = 2, ++ PDO_TYPE_APDO = 3, ++}; ++ ++#define PDO_TYPE_SHIFT 30 ++#define PDO_TYPE_MASK 0x3 ++ ++#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) ++ ++#define PDO_VOLT_MASK 0x3ff ++#define PDO_CURR_MASK 0x3ff ++#define PDO_PWR_MASK 0x3ff ++ ++#define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */ ++#define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */ ++#define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */ ++#define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */ ++#define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */ ++#define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */ ++#define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */ ++#define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */ ++#define PDO_FIXED_FRS_CURR_SHIFT 23 ++#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ ++#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ ++ ++#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) ++#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) ++ ++#define PDO_FIXED(mv, ma, flags) \ ++ (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ ++ PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) ++ ++#define VSAFE5V 5000 /* mv units */ ++ ++#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ ++#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ ++#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ ++ ++#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) ++#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) ++#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) ++ ++#define PDO_BATT(min_mv, max_mv, max_mw) \ ++ (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ ++ PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) ++ ++#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ ++#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ ++#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ ++ ++#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) ++#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) ++#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) ++ ++#define PDO_VAR(min_mv, max_mv, max_ma) \ ++ (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ ++ PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) ++ ++enum pd_apdo_type { ++ APDO_TYPE_PPS = 0, ++}; ++ ++#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */ ++#define PDO_APDO_TYPE_MASK 0x3 ++ ++#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT) ++ ++#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */ ++#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */ ++#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */ ++ ++#define PDO_PPS_APDO_VOLT_MASK 0xff ++#define PDO_PPS_APDO_CURR_MASK 0x7f ++ ++#define PDO_PPS_APDO_MIN_VOLT(mv) \ ++ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT) ++#define PDO_PPS_APDO_MAX_VOLT(mv) \ ++ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT) ++#define PDO_PPS_APDO_MAX_CURR(ma) \ ++ ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT) ++ ++#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \ ++ (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \ ++ PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \ ++ PDO_PPS_APDO_MAX_CURR(max_ma)) ++ ++static inline enum pd_pdo_type pdo_type(u32 pdo) ++{ ++ return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK; ++} ++ ++static inline unsigned int pdo_fixed_voltage(u32 pdo) ++{ ++ return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; ++} ++ ++static inline unsigned int pdo_min_voltage(u32 pdo) ++{ ++ return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; ++} ++ ++static inline unsigned int pdo_max_voltage(u32 pdo) ++{ ++ return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; ++} ++ ++static inline unsigned int pdo_max_current(u32 pdo) ++{ ++ return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10; ++} ++ ++static inline unsigned int pdo_max_power(u32 pdo) ++{ ++ return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250; ++} ++ ++static inline enum pd_apdo_type pdo_apdo_type(u32 pdo) ++{ ++ return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK; ++} ++ ++static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo) ++{ ++ return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) & ++ PDO_PPS_APDO_VOLT_MASK) * 100; ++} ++ ++static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo) ++{ ++ return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) & ++ PDO_PPS_APDO_VOLT_MASK) * 100; ++} ++ ++static inline unsigned int pdo_pps_apdo_max_current(u32 pdo) ++{ ++ return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) & ++ PDO_PPS_APDO_CURR_MASK) * 50; ++} ++ ++/* RDO: Request Data Object */ ++#define RDO_OBJ_POS_SHIFT 28 ++#define RDO_OBJ_POS_MASK 0x7 ++#define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */ ++#define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */ ++#define RDO_USB_COMM BIT(25) /* USB communications capable */ ++#define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */ ++ ++#define RDO_PWR_MASK 0x3ff ++#define RDO_CURR_MASK 0x3ff ++ ++#define RDO_FIXED_OP_CURR_SHIFT 10 ++#define RDO_FIXED_MAX_CURR_SHIFT 0 ++ ++#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT) ++ ++#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT) ++#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT) ++ ++#define RDO_FIXED(idx, op_ma, max_ma, flags) \ ++ (RDO_OBJ(idx) | (flags) | \ ++ PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma)) ++ ++#define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */ ++#define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ ++ ++#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT) ++#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT) ++ ++#define RDO_BATT(idx, op_mw, max_mw, flags) \ ++ (RDO_OBJ(idx) | (flags) | \ ++ RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw)) ++ ++#define RDO_PROG_VOLT_MASK 0x7ff ++#define RDO_PROG_CURR_MASK 0x7f ++ ++#define RDO_PROG_VOLT_SHIFT 9 ++#define RDO_PROG_CURR_SHIFT 0 ++ ++#define RDO_PROG_VOLT_MV_STEP 20 ++#define RDO_PROG_CURR_MA_STEP 50 ++ ++#define PDO_PROG_OUT_VOLT(mv) \ ++ ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT) ++#define PDO_PROG_OP_CURR(ma) \ ++ ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT) ++ ++#define RDO_PROG(idx, out_mv, op_ma, flags) \ ++ (RDO_OBJ(idx) | (flags) | \ ++ PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma)) ++ ++static inline unsigned int rdo_index(u32 rdo) ++{ ++ return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK; ++} ++ ++static inline unsigned int rdo_op_current(u32 rdo) ++{ ++ return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10; ++} ++ ++static inline unsigned int rdo_max_current(u32 rdo) ++{ ++ return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) & ++ RDO_CURR_MASK) * 10; ++} ++ ++static inline unsigned int rdo_op_power(u32 rdo) ++{ ++ return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250; ++} ++ ++static inline unsigned int rdo_max_power(u32 rdo) ++{ ++ return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250; ++} ++ ++/* Enter_USB Data Object */ ++#define EUDO_USB_MODE_MASK GENMASK(30, 28) ++#define EUDO_USB_MODE_SHIFT 28 ++#define EUDO_USB_MODE_USB2 0 ++#define EUDO_USB_MODE_USB3 1 ++#define EUDO_USB_MODE_USB4 2 ++#define EUDO_USB4_DRD BIT(26) ++#define EUDO_USB3_DRD BIT(25) ++#define EUDO_CABLE_SPEED_MASK GENMASK(23, 21) ++#define EUDO_CABLE_SPEED_SHIFT 21 ++#define EUDO_CABLE_SPEED_USB2 0 ++#define EUDO_CABLE_SPEED_USB3_GEN1 1 ++#define EUDO_CABLE_SPEED_USB4_GEN2 2 ++#define EUDO_CABLE_SPEED_USB4_GEN3 3 ++#define EUDO_CABLE_TYPE_MASK GENMASK(20, 19) ++#define EUDO_CABLE_TYPE_SHIFT 19 ++#define EUDO_CABLE_TYPE_PASSIVE 0 ++#define EUDO_CABLE_TYPE_RE_TIMER 1 ++#define EUDO_CABLE_TYPE_RE_DRIVER 2 ++#define EUDO_CABLE_TYPE_OPTICAL 3 ++#define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17) ++#define EUDO_CABLE_CURRENT_SHIFT 17 ++#define EUDO_CABLE_CURRENT_NOTSUPP 0 ++#define EUDO_CABLE_CURRENT_3A 2 ++#define EUDO_CABLE_CURRENT_5A 3 ++#define EUDO_PCIE_SUPPORT BIT(16) ++#define EUDO_DP_SUPPORT BIT(15) ++#define EUDO_TBT_SUPPORT BIT(14) ++#define EUDO_HOST_PRESENT BIT(13) ++ ++/* USB PD timers and counters */ ++#define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */ ++#define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */ ++#define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */ ++#define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */ ++#define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */ ++#define PD_T_SOURCE_ACTIVITY 45 ++#define PD_T_SINK_ACTIVITY 135 ++#define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */ ++#define PD_T_PS_TRANSITION 500 ++#define PD_T_SRC_TRANSITION 35 ++#define PD_T_DRP_SNK 40 ++#define PD_T_DRP_SRC 30 ++#define PD_T_PS_SOURCE_OFF 920 ++#define PD_T_PS_SOURCE_ON 480 ++#define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */ ++#define PD_T_PS_HARD_RESET 30 ++#define PD_T_SRC_RECOVER 760 ++#define PD_T_SRC_RECOVER_MAX 1000 ++#define PD_T_SRC_TURN_ON 275 ++#define PD_T_SAFE_0V 650 ++#define PD_T_VCONN_SOURCE_ON 100 ++#define PD_T_SINK_REQUEST 100 /* 100 ms minimum */ ++#define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */ ++#define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */ ++#define PD_T_NEWSRC 250 /* Maximum of 275ms */ ++#define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */ ++#define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */ ++#define PD_T_SINK_TX 16 /* 16 - 20 ms */ ++#define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */ ++ ++#define PD_T_DRP_TRY 100 /* 75 - 150 ms */ ++#define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */ ++ ++#define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */ ++#define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */ ++#define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */ ++ ++#define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP) ++#define PD_N_HARD_RESET_COUNT 1 ++ ++#define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */ ++ ++/* Time to wait for TCPC to complete transmit */ ++#define PD_T_TCPC_TX_TIMEOUT 100 /* in ms */ ++ ++#endif /* __LINUX_USB_PD_H */ +diff --git a/include/usb/tcpm.h b/include/usb/tcpm.h +new file mode 100644 +index 000000000000..4574a5175ddb +--- /dev/null ++++ b/include/usb/tcpm.h +@@ -0,0 +1,99 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright 2015-2017 Google, Inc ++ * Copyright 2024 Collabora ++ */ ++ ++#ifndef __LINUX_USB_TCPM_H ++#define __LINUX_USB_TCPM_H ++ ++#include ++#include ++#include "pd.h" ++ ++enum typec_orientation { ++ TYPEC_ORIENTATION_NONE, ++ TYPEC_ORIENTATION_NORMAL, ++ TYPEC_ORIENTATION_REVERSE, ++}; ++ ++enum typec_cc_status { ++ TYPEC_CC_OPEN, ++ TYPEC_CC_RA, ++ TYPEC_CC_RD, ++ TYPEC_CC_RP_DEF, ++ TYPEC_CC_RP_1_5, ++ TYPEC_CC_RP_3_0, ++}; ++ ++enum typec_cc_polarity { ++ TYPEC_POLARITY_CC1, ++ TYPEC_POLARITY_CC2, ++}; ++ ++enum tcpm_transmit_status { ++ TCPC_TX_SUCCESS = 0, ++ TCPC_TX_DISCARDED = 1, ++ TCPC_TX_FAILED = 2, ++}; ++ ++enum tcpm_transmit_type { ++ TCPC_TX_SOP = 0, ++ TCPC_TX_SOP_PRIME = 1, ++ TCPC_TX_SOP_PRIME_PRIME = 2, ++ TCPC_TX_SOP_DEBUG_PRIME = 3, ++ TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4, ++ TCPC_TX_HARD_RESET = 5, ++ TCPC_TX_CABLE_RESET = 6, ++ TCPC_TX_BIST_MODE_2 = 7 ++}; ++ ++struct dm_tcpm_ops { ++ int (*get_connector_node)(struct udevice *dev, ofnode *connector_node); ++ int (*init)(struct udevice *dev); ++ int (*get_vbus)(struct udevice *dev); ++ int (*set_cc)(struct udevice *dev, enum typec_cc_status cc); ++ int (*get_cc)(struct udevice *dev, enum typec_cc_status *cc1, ++ enum typec_cc_status *cc2); ++ int (*set_polarity)(struct udevice *dev, ++ enum typec_cc_polarity polarity); ++ int (*set_vconn)(struct udevice *dev, bool on); ++ int (*set_vbus)(struct udevice *dev, bool on, bool charge); ++ int (*set_pd_rx)(struct udevice *dev, bool on); ++ int (*set_roles)(struct udevice *dev, bool attached, ++ enum typec_role role, enum typec_data_role data); ++ int (*start_toggling)(struct udevice *dev, ++ enum typec_port_type port_type, ++ enum typec_cc_status cc); ++ int (*pd_transmit)(struct udevice *dev, enum tcpm_transmit_type type, ++ const struct pd_message *msg, unsigned int negotiated_rev); ++ void (*poll_event)(struct udevice *dev); ++ int (*enter_low_power_mode)(struct udevice *dev, bool attached, bool pd_capable); ++}; ++ ++/* API for drivers */ ++void tcpm_vbus_change(struct udevice *dev); ++void tcpm_cc_change(struct udevice *dev); ++void tcpm_pd_receive(struct udevice *dev, const struct pd_message *msg); ++void tcpm_pd_transmit_complete(struct udevice *dev, ++ enum tcpm_transmit_status status); ++void tcpm_pd_hard_reset(struct udevice *dev); ++ ++/* API for boards */ ++extern const char * const typec_pd_rev_name[]; ++extern const char * const typec_orientation_name[]; ++extern const char * const typec_role_name[]; ++extern const char * const typec_data_role_name[]; ++extern const char * const typec_cc_status_name[]; ++ ++int tcpm_get(const char *name, struct udevice **devp); ++int tcpm_get_pd_rev(struct udevice *dev); ++int tcpm_get_current(struct udevice *dev); ++int tcpm_get_voltage(struct udevice *dev); ++enum typec_orientation tcpm_get_orientation(struct udevice *dev); ++enum typec_role tcpm_get_pwr_role(struct udevice *dev); ++enum typec_data_role tcpm_get_data_role(struct udevice *dev); ++bool tcpm_is_connected(struct udevice *dev); ++const char *tcpm_get_state(struct udevice *dev); ++ ++#endif /* __LINUX_USB_TCPM_H */ + +From patchwork Thu Sep 5 15:08:38 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sebastian Reichel +X-Patchwork-Id: 1981316 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; 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+ Thu, 5 Sep 2024 17:17:12 +0200 (CEST) +Received: by jupiter.universe (Postfix, from userid 1000) + id A19EE4800F4; Thu, 05 Sep 2024 17:17:07 +0200 (CEST) +From: Sebastian Reichel +To: Marek Vasut , u-boot@lists.denx.de, + Jonas Karlman , Soeren Moch +Cc: Eugen Hristev , + Tim Harvey , Kever Yang , + Philipp Tomsich , Simon Glass , + Sebastian Reichel +Subject: [PATCH v6 2/6] usb: tcpm: fusb302: add driver +Date: Thu, 5 Sep 2024 17:08:38 +0200 +Message-ID: <20240905151707.59101-3-sebastian.reichel@collabora.com> +X-Mailer: git-send-email 2.45.2 +In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> +References: <20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Now that the TCPM framework exists we can introduce fusb302 +driver using it. This chip is a very common USB-C controller +chip with PD support, which can be found in the Radxa Rock 5B +among many other boards. Apart from Power Delivery, it also +handles detection of the cable orientation. That can be used +to control a mux for connecting the right USB3 lane pair to +the USB3 controller. + +The driver is originally from the Linux kernel, but has been +adapted to the requirements of U-Boot and its TCPM framework. + +Co-developed-by: Wang Jie +Signed-off-by: Wang Jie +Tested-by: Soeren Moch +Signed-off-by: Sebastian Reichel +--- + drivers/usb/tcpm/Kconfig | 8 + + drivers/usb/tcpm/Makefile | 1 + + drivers/usb/tcpm/fusb302.c | 1323 ++++++++++++++++++++++++++++++++ + drivers/usb/tcpm/fusb302_reg.h | 177 +++++ + 4 files changed, 1509 insertions(+) + create mode 100644 drivers/usb/tcpm/fusb302.c + create mode 100644 drivers/usb/tcpm/fusb302_reg.h + +diff --git a/drivers/usb/tcpm/Kconfig b/drivers/usb/tcpm/Kconfig +index 55bf8e202b90..9be4b496e82f 100644 +--- a/drivers/usb/tcpm/Kconfig ++++ b/drivers/usb/tcpm/Kconfig +@@ -6,3 +6,11 @@ config TYPEC_TCPM + help + The Type-C Port Controller Manager provides a USB PD and USB Type-C + state machine for use with Type-C Port Controllers. ++ ++config TYPEC_FUSB302 ++ tristate "Fairchild FUSB302 Type-C chip driver" ++ depends on DM && DM_I2C && TYPEC_TCPM ++ help ++ The Fairchild FUSB302 Type-C chip driver that works with ++ Type-C Port Controller Manager to provide USB PD and USB ++ Type-C functionalities. +diff --git a/drivers/usb/tcpm/Makefile b/drivers/usb/tcpm/Makefile +index a0f76436f3fd..668d33155bf1 100644 +--- a/drivers/usb/tcpm/Makefile ++++ b/drivers/usb/tcpm/Makefile +@@ -1,3 +1,4 @@ + # SPDX-License-Identifier: GPL-2.0 + + obj-$(CONFIG_TYPEC_TCPM) += tcpm.o tcpm-uclass.o ++obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o +diff --git a/drivers/usb/tcpm/fusb302.c b/drivers/usb/tcpm/fusb302.c +new file mode 100644 +index 000000000000..fe93ff3d3397 +--- /dev/null ++++ b/drivers/usb/tcpm/fusb302.c +@@ -0,0 +1,1323 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2016-2017 Google, Inc ++ * ++ * Fairchild FUSB302 Type-C Chip Driver ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "fusb302_reg.h" ++ ++#define FUSB302_MAX_MSG_LEN 0x1F ++ ++enum toggling_mode { ++ TOGGLING_MODE_OFF, ++ TOGGLING_MODE_DRP, ++ TOGGLING_MODE_SNK, ++ TOGGLING_MODE_SRC, ++}; ++ ++enum src_current_status { ++ SRC_CURRENT_DEFAULT, ++ SRC_CURRENT_MEDIUM, ++ SRC_CURRENT_HIGH, ++}; ++ ++static const u8 ra_mda_value[] = { ++ [SRC_CURRENT_DEFAULT] = 4, /* 210mV */ ++ [SRC_CURRENT_MEDIUM] = 9, /* 420mV */ ++ [SRC_CURRENT_HIGH] = 18, /* 798mV */ ++}; ++ ++static const u8 rd_mda_value[] = { ++ [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */ ++ [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */ ++ [SRC_CURRENT_HIGH] = 61, /* 2604mV */ ++}; ++ ++struct fusb302_chip { ++ enum toggling_mode toggling_mode; ++ enum src_current_status src_current_status; ++ bool intr_togdone; ++ bool intr_bc_lvl; ++ bool intr_comp_chng; ++ ++ /* port status */ ++ bool vconn_on; ++ bool vbus_present; ++ enum typec_cc_polarity cc_polarity; ++ enum typec_cc_status cc1; ++ enum typec_cc_status cc2; ++}; ++ ++static int fusb302_i2c_write(struct udevice *dev, u8 address, u8 data) ++{ ++ int ret; ++ ++ ret = dm_i2c_write(dev, address, &data, 1); ++ if (ret) ++ dev_err(dev, "cannot write 0x%02x to 0x%02x, ret=%d\n", ++ data, address, ret); ++ ++ return ret; ++} ++ ++static int fusb302_i2c_block_write(struct udevice *dev, u8 address, ++ u8 length, const u8 *data) ++{ ++ int ret; ++ ++ if (!length) ++ return 0; ++ ++ ret = dm_i2c_write(dev, address, data, length); ++ if (ret) ++ dev_err(dev, "cannot block write 0x%02x, len=%d, ret=%d\n", ++ address, length, ret); ++ ++ return ret; ++} ++ ++static int fusb302_i2c_read(struct udevice *dev, u8 address, u8 *data) ++{ ++ int ret, retries; ++ ++ for (retries = 0; retries < 3; retries++) { ++ ret = dm_i2c_read(dev, address, data, 1); ++ if (ret == 0) ++ return ret; ++ dev_err(dev, "cannot read %02x, ret=%d\n", address, ret); ++ } ++ ++ return ret; ++} ++ ++static int fusb302_i2c_block_read(struct udevice *dev, u8 address, ++ u8 length, u8 *data) ++{ ++ int ret; ++ ++ if (!length) ++ return 0; ++ ++ ret = dm_i2c_read(dev, address, data, length); ++ if (ret) ++ dev_err(dev, "cannot block read 0x%02x, len=%d, ret=%d\n", ++ address, length, ret); ++ return ret; ++} ++ ++static int fusb302_i2c_mask_write(struct udevice *dev, u8 address, ++ u8 mask, u8 value) ++{ ++ int ret; ++ u8 data; ++ ++ ret = fusb302_i2c_read(dev, address, &data); ++ if (ret) ++ return ret; ++ data &= ~mask; ++ data |= value; ++ ret = fusb302_i2c_write(dev, address, data); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++ ++static int fusb302_i2c_set_bits(struct udevice *dev, u8 address, u8 set_bits) ++{ ++ return fusb302_i2c_mask_write(dev, address, 0x00, set_bits); ++} ++ ++static int fusb302_i2c_clear_bits(struct udevice *dev, u8 address, u8 clear_bits) ++{ ++ return fusb302_i2c_mask_write(dev, address, clear_bits, 0x00); ++} ++ ++static int fusb302_sw_reset(struct udevice *dev) ++{ ++ int ret = fusb302_i2c_write(dev, FUSB_REG_RESET, FUSB_REG_RESET_SW_RESET); ++ ++ if (ret) ++ dev_err(dev, "cannot sw reset the fusb302: %d\n", ret); ++ ++ return ret; ++} ++ ++static int fusb302_enable_tx_auto_retries(struct udevice *dev, u8 retry_count) ++{ ++ int ret; ++ ++ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, retry_count | ++ FUSB_REG_CONTROL3_AUTO_RETRY); ++ ++ return ret; ++} ++ ++/* ++ * mask all interrupt on the chip ++ */ ++static int fusb302_mask_interrupt(struct udevice *dev) ++{ ++ int ret; ++ ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASK, 0xFF); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_INT_MASK); ++ return ret; ++} ++ ++/* ++ * initialize interrupt on the chip ++ * - unmasked interrupt: VBUS_OK ++ */ ++static int fusb302_init_interrupt(struct udevice *dev) ++{ ++ int ret; ++ ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASK, ++ 0xFF & ~FUSB_REG_MASK_VBUSOK); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_INT_MASK); ++ return ret; ++} ++ ++static int fusb302_set_power_mode(struct udevice *dev, u8 power_mode) ++{ ++ int ret; ++ ++ ret = fusb302_i2c_write(dev, FUSB_REG_POWER, power_mode); ++ ++ return ret; ++} ++ ++static int fusb302_init(struct udevice *dev) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ u8 data; ++ ++ ret = fusb302_sw_reset(dev); ++ if (ret) ++ return ret; ++ ret = fusb302_enable_tx_auto_retries(dev, FUSB_REG_CONTROL3_N_RETRIES_3); ++ if (ret) ++ return ret; ++ ret = fusb302_init_interrupt(dev); ++ if (ret) ++ return ret; ++ ret = fusb302_set_power_mode(dev, FUSB_REG_POWER_PWR_ALL); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &data); ++ if (ret) ++ return ret; ++ chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK); ++ ret = fusb302_i2c_read(dev, FUSB_REG_DEVICE_ID, &data); ++ if (ret) ++ return ret; ++ dev_info(dev, "fusb302 device ID: 0x%02x\n", data); ++ ++ return ret; ++} ++ ++static int fusb302_get_vbus(struct udevice *dev) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ ++ return chip->vbus_present ? 1 : 0; ++} ++ ++static int fusb302_set_src_current(struct udevice *dev, ++ enum src_current_status status) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ ++ chip->src_current_status = status; ++ switch (status) { ++ case SRC_CURRENT_DEFAULT: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_HOST_CUR_MASK, ++ FUSB_REG_CONTROL0_HOST_CUR_DEF); ++ break; ++ case SRC_CURRENT_MEDIUM: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_HOST_CUR_MASK, ++ FUSB_REG_CONTROL0_HOST_CUR_MED); ++ break; ++ case SRC_CURRENT_HIGH: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_HOST_CUR_MASK, ++ FUSB_REG_CONTROL0_HOST_CUR_HIGH); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++static int fusb302_set_toggling(struct udevice *dev, ++ enum toggling_mode mode) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ ++ /* first disable toggling */ ++ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_TOGGLE); ++ if (ret) ++ return ret; ++ /* mask interrupts for SRC or SNK */ ++ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASK, ++ FUSB_REG_MASK_BC_LVL | ++ FUSB_REG_MASK_COMP_CHNG); ++ if (ret) ++ return ret; ++ chip->intr_bc_lvl = false; ++ chip->intr_comp_chng = false; ++ /* configure toggling mode: none/snk/src/drp */ ++ switch (mode) { ++ case TOGGLING_MODE_OFF: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_MODE_MASK, ++ FUSB_REG_CONTROL2_MODE_NONE); ++ break; ++ case TOGGLING_MODE_SNK: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_MODE_MASK, ++ FUSB_REG_CONTROL2_MODE_UFP); ++ break; ++ case TOGGLING_MODE_SRC: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_MODE_MASK, ++ FUSB_REG_CONTROL2_MODE_DFP); ++ break; ++ case TOGGLING_MODE_DRP: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_MODE_MASK, ++ FUSB_REG_CONTROL2_MODE_DRP); ++ break; ++ default: ++ break; ++ } ++ ++ if (ret) ++ return ret; ++ ++ if (mode == TOGGLING_MODE_OFF) { ++ /* mask TOGDONE interrupt */ ++ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, ++ FUSB_REG_MASKA_TOGDONE); ++ if (ret) ++ return ret; ++ chip->intr_togdone = false; ++ } else { ++ /* Datasheet says vconn MUST be off when toggling */ ++ if (chip->vconn_on) ++ dev_warn(dev, "Vconn is on during toggle start\n"); ++ /* unmask TOGDONE interrupt */ ++ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, ++ FUSB_REG_MASKA_TOGDONE); ++ if (ret) ++ return ret; ++ chip->intr_togdone = true; ++ /* start toggling */ ++ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL2, ++ FUSB_REG_CONTROL2_TOGGLE); ++ if (ret) ++ return ret; ++ /* during toggling, consider cc as Open */ ++ chip->cc1 = TYPEC_CC_OPEN; ++ chip->cc2 = TYPEC_CC_OPEN; ++ } ++ chip->toggling_mode = mode; ++ ++ return ret; ++} ++ ++static const enum src_current_status cc_src_current[] = { ++ [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT, ++ [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT, ++ [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT, ++ [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT, ++ [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM, ++ [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH, ++}; ++ ++static int fusb302_set_cc(struct udevice *dev, enum typec_cc_status cc) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ const u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN | ++ FUSB_REG_SWITCHES0_CC2_PU_EN | ++ FUSB_REG_SWITCHES0_CC1_PD_EN | ++ FUSB_REG_SWITCHES0_CC2_PD_EN; ++ u8 rd_mda, switches0_data = 0x00; ++ int ret; ++ ++ switch (cc) { ++ case TYPEC_CC_OPEN: ++ break; ++ case TYPEC_CC_RD: ++ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | ++ FUSB_REG_SWITCHES0_CC2_PD_EN; ++ break; ++ case TYPEC_CC_RP_DEF: ++ case TYPEC_CC_RP_1_5: ++ case TYPEC_CC_RP_3_0: ++ switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ? ++ FUSB_REG_SWITCHES0_CC1_PU_EN : ++ FUSB_REG_SWITCHES0_CC2_PU_EN; ++ break; ++ default: ++ dev_err(dev, "unsupported CC value: %s\n", ++ typec_cc_status_name[cc]); ++ ret = -EINVAL; ++ goto done; ++ } ++ ++ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); ++ if (ret) { ++ dev_err(dev, "cannot set toggling mode: %d\n", ret); ++ goto done; ++ } ++ ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0, ++ switches0_mask, switches0_data); ++ if (ret) { ++ dev_err(dev, "cannot set pull-up/-down: %d\n", ret); ++ goto done; ++ } ++ /* reset the cc status */ ++ chip->cc1 = TYPEC_CC_OPEN; ++ chip->cc2 = TYPEC_CC_OPEN; ++ ++ /* adjust current for SRC */ ++ ret = fusb302_set_src_current(dev, cc_src_current[cc]); ++ if (ret) { ++ dev_err(dev, "cannot set src current %s: %d\n", ++ typec_cc_status_name[cc], ret); ++ goto done; ++ } ++ ++ /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */ ++ switch (cc) { ++ case TYPEC_CC_RP_DEF: ++ case TYPEC_CC_RP_1_5: ++ case TYPEC_CC_RP_3_0: ++ rd_mda = rd_mda_value[cc_src_current[cc]]; ++ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); ++ if (ret) { ++ dev_err(dev, "cannot set SRC measure value: %d\n", ret); ++ goto done; ++ } ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK, ++ FUSB_REG_MASK_BC_LVL | ++ FUSB_REG_MASK_COMP_CHNG, ++ FUSB_REG_MASK_BC_LVL); ++ if (ret) { ++ dev_err(dev, "cannot set SRC irq: %d\n", ret); ++ goto done; ++ } ++ chip->intr_comp_chng = true; ++ break; ++ case TYPEC_CC_RD: ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK, ++ FUSB_REG_MASK_BC_LVL | ++ FUSB_REG_MASK_COMP_CHNG, ++ FUSB_REG_MASK_COMP_CHNG); ++ if (ret) { ++ dev_err(dev, "cannot set SRC irq: %d\n", ret); ++ goto done; ++ } ++ chip->intr_bc_lvl = true; ++ break; ++ default: ++ break; ++ } ++done: ++ return ret; ++} ++ ++static int fusb302_get_cc(struct udevice *dev, enum typec_cc_status *cc1, ++ enum typec_cc_status *cc2) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ ++ *cc1 = chip->cc1; ++ *cc2 = chip->cc2; ++ dev_dbg(dev, "get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1], ++ typec_cc_status_name[*cc2]); ++ ++ return 0; ++} ++ ++static int fusb302_set_vconn(struct udevice *dev, bool on) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ u8 switches0_data = 0x00; ++ u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 | ++ FUSB_REG_SWITCHES0_VCONN_CC2; ++ ++ if (chip->vconn_on == on) { ++ ret = 0; ++ dev_dbg(dev, "vconn is already %s\n", on ? "on" : "off"); ++ goto done; ++ } ++ if (on) { ++ switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ? ++ FUSB_REG_SWITCHES0_VCONN_CC2 : ++ FUSB_REG_SWITCHES0_VCONN_CC1; ++ } ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0, ++ switches0_mask, switches0_data); ++ if (ret) ++ goto done; ++ dev_dbg(dev, "set vconn = %s\n", on ? "on" : "off"); ++done: ++ return ret; ++} ++ ++static int fusb302_set_vbus(struct udevice *dev, bool on, bool charge) ++{ ++ return 0; ++} ++ ++static int fusb302_pd_tx_flush(struct udevice *dev) ++{ ++ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0, ++ FUSB_REG_CONTROL0_TX_FLUSH); ++} ++ ++static int fusb302_pd_rx_flush(struct udevice *dev) ++{ ++ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL1, ++ FUSB_REG_CONTROL1_RX_FLUSH); ++} ++ ++static int fusb302_pd_set_auto_goodcrc(struct udevice *dev, bool on) ++{ ++ if (on) ++ return fusb302_i2c_set_bits(dev, FUSB_REG_SWITCHES1, ++ FUSB_REG_SWITCHES1_AUTO_GCRC); ++ return fusb302_i2c_clear_bits(dev, FUSB_REG_SWITCHES1, ++ FUSB_REG_SWITCHES1_AUTO_GCRC); ++} ++ ++static int fusb302_pd_set_interrupts(struct udevice *dev, bool on) ++{ ++ int ret; ++ u8 mask_interrupts = FUSB_REG_MASK_COLLISION; ++ u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL | ++ FUSB_REG_MASKA_HARDSENT | ++ FUSB_REG_MASKA_TX_SUCCESS | ++ FUSB_REG_MASKA_HARDRESET; ++ u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT; ++ ++ ret = on ? ++ fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, mask_interrupts) : ++ fusb302_i2c_set_bits(dev, FUSB_REG_MASK, mask_interrupts); ++ if (ret) ++ return ret; ++ ret = on ? ++ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, maska_interrupts) : ++ fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, maska_interrupts); ++ if (ret) ++ return ret; ++ ret = on ? ++ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKB, maskb_interrupts) : ++ fusb302_i2c_set_bits(dev, FUSB_REG_MASKB, maskb_interrupts); ++ return ret; ++} ++ ++static int fusb302_set_pd_rx(struct udevice *dev, bool on) ++{ ++ int ret; ++ ++ ret = fusb302_pd_rx_flush(dev); ++ if (ret) { ++ dev_err(dev, "cannot flush pd rx buffer: %d\n", ret); ++ goto done; ++ } ++ ret = fusb302_pd_tx_flush(dev); ++ if (ret) { ++ dev_err(dev, "cannot flush pd tx buffer: %d\n", ret); ++ goto done; ++ } ++ ret = fusb302_pd_set_auto_goodcrc(dev, on); ++ if (ret) { ++ dev_err(dev, "cannot turn %s auto GoodCRC: %d\n", ++ on ? "on" : "off", ret); ++ goto done; ++ } ++ ret = fusb302_pd_set_interrupts(dev, on); ++ if (ret) { ++ dev_err(dev, "cannot turn %s pd interrupts: %d\n", ++ on ? "on" : "off", ret); ++ goto done; ++ } ++ dev_dbg(dev, "set pd RX %s\n", on ? "on" : "off"); ++done: ++ return ret; ++} ++ ++static int fusb302_set_roles(struct udevice *dev, bool attached, ++ enum typec_role pwr, enum typec_data_role data) ++{ ++ int ret; ++ u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE | ++ FUSB_REG_SWITCHES1_DATAROLE; ++ u8 switches1_data = 0x00; ++ ++ if (pwr == TYPEC_SOURCE) ++ switches1_data |= FUSB_REG_SWITCHES1_POWERROLE; ++ if (data == TYPEC_HOST) ++ switches1_data |= FUSB_REG_SWITCHES1_DATAROLE; ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1, ++ switches1_mask, switches1_data); ++ if (ret) { ++ dev_err(dev, "unable to set pd header %s, %s, ret=%d\n", ++ typec_role_name[pwr], typec_data_role_name[data], ret); ++ goto done; ++ } ++ dev_dbg(dev, "pd header : %s, %s\n", typec_role_name[pwr], ++ typec_data_role_name[data]); ++done: ++ ++ return ret; ++} ++ ++static int fusb302_start_toggling(struct udevice *dev, ++ enum typec_port_type port_type, ++ enum typec_cc_status cc) ++{ ++ enum toggling_mode mode = TOGGLING_MODE_OFF; ++ int ret; ++ ++ switch (port_type) { ++ case TYPEC_PORT_SRC: ++ mode = TOGGLING_MODE_SRC; ++ break; ++ case TYPEC_PORT_SNK: ++ mode = TOGGLING_MODE_SNK; ++ break; ++ case TYPEC_PORT_DRP: ++ mode = TOGGLING_MODE_DRP; ++ break; ++ } ++ ++ ret = fusb302_set_src_current(dev, cc_src_current[cc]); ++ if (ret) { ++ dev_err(dev, "unable to set src current %s, ret=%d", ++ typec_cc_status_name[cc], ret); ++ goto done; ++ } ++ ret = fusb302_set_toggling(dev, mode); ++ if (ret) { ++ dev_err(dev, "unable to start drp toggling: %d\n", ret); ++ goto done; ++ } ++ dev_info(dev, "fusb302 start drp toggling\n"); ++done: ++ ++ return ret; ++} ++ ++static int fusb302_pd_send_message(struct udevice *dev, ++ const struct pd_message *msg) ++{ ++ int ret; ++ /* SOP tokens */ ++ u8 buf[40] = {FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, ++ FUSB302_TKN_SYNC2}; ++ u8 pos = 4; ++ int len; ++ ++ len = pd_header_cnt_le(msg->header) * 4; ++ /* plug 2 for header */ ++ len += 2; ++ if (len > FUSB302_MAX_MSG_LEN) { ++ dev_err(dev, "PD message too long %d (incl. header)", len); ++ return -EINVAL; ++ } ++ /* packsym tells the FUSB302 chip that the next X bytes are payload */ ++ buf[pos++] = FUSB302_TKN_PACKSYM | (len & FUSB302_MAX_MSG_LEN); ++ memcpy(&buf[pos], &msg->header, sizeof(msg->header)); ++ pos += sizeof(msg->header); ++ ++ len -= 2; ++ memcpy(&buf[pos], msg->payload, len); ++ pos += len; ++ ++ /* CRC */ ++ buf[pos++] = FUSB302_TKN_JAMCRC; ++ /* EOP */ ++ buf[pos++] = FUSB302_TKN_EOP; ++ /* turn tx off after sending message */ ++ buf[pos++] = FUSB302_TKN_TXOFF; ++ /* start transmission */ ++ buf[pos++] = FUSB302_TKN_TXON; ++ ++ ret = fusb302_i2c_block_write(dev, FUSB_REG_FIFOS, pos, buf); ++ if (ret) ++ return ret; ++ dev_dbg(dev, "Send PD message (header=0x%x len=%d)\n", msg->header, len); ++ ++ return ret; ++} ++ ++static int fusb302_pd_send_hardreset(struct udevice *dev) ++{ ++ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, ++ FUSB_REG_CONTROL3_SEND_HARDRESET); ++} ++ ++static const char * const transmit_type_name[] = { ++ [TCPC_TX_SOP] = "SOP", ++ [TCPC_TX_SOP_PRIME] = "SOP'", ++ [TCPC_TX_SOP_PRIME_PRIME] = "SOP''", ++ [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'", ++ [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''", ++ [TCPC_TX_HARD_RESET] = "HARD_RESET", ++ [TCPC_TX_CABLE_RESET] = "CABLE_RESET", ++ [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2", ++}; ++ ++static int fusb302_pd_transmit(struct udevice *dev, enum tcpm_transmit_type type, ++ const struct pd_message *msg, unsigned int negotiated_rev) ++{ ++ int ret; ++ ++ switch (type) { ++ case TCPC_TX_SOP: ++ /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */ ++ ret = fusb302_enable_tx_auto_retries(dev, negotiated_rev > PD_REV20 ? ++ FUSB_REG_CONTROL3_N_RETRIES_2 : ++ FUSB_REG_CONTROL3_N_RETRIES_3); ++ if (ret) ++ dev_err(dev, "cannot update retry count: %d\n", ret); ++ ++ ret = fusb302_pd_send_message(dev, msg); ++ if (ret) ++ dev_err(dev, "cannot send PD message: %d\n", ret); ++ break; ++ case TCPC_TX_HARD_RESET: ++ ret = fusb302_pd_send_hardreset(dev); ++ if (ret) ++ dev_err(dev, "cannot send hardreset: %d\n", ret); ++ break; ++ default: ++ dev_err(dev, "type %s not supported", transmit_type_name[type]); ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl) ++{ ++ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX) ++ return TYPEC_CC_RP_3_0; ++ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230) ++ return TYPEC_CC_RP_1_5; ++ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600) ++ return TYPEC_CC_RP_DEF; ++ return TYPEC_CC_OPEN; ++} ++ ++static void fusb302_bc_lvl_handler(struct udevice *dev) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ enum typec_cc_status cc_status; ++ u8 status0, bc_lvl; ++ int ret; ++ ++ if (!chip->intr_bc_lvl) { ++ dev_err(dev, "BC_LVL interrupt is turned off, abort\n"); ++ goto done; ++ } ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); ++ if (ret) ++ goto done; ++ ++ dev_dbg(dev, "BC_LVL handler, status0 = 0x%02x\n", status0); ++ if (status0 & FUSB_REG_STATUS0_ACTIVITY) ++ dev_info(dev, "CC activities detected, delay handling\n"); ++ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; ++ cc_status = fusb302_bc_lvl_to_cc(bc_lvl); ++ if (chip->cc_polarity == TYPEC_POLARITY_CC1) { ++ if (chip->cc1 != cc_status) { ++ dev_dbg(dev, "cc1: %s -> %s\n", ++ typec_cc_status_name[chip->cc1], ++ typec_cc_status_name[cc_status]); ++ chip->cc1 = cc_status; ++ tcpm_cc_change(dev); ++ } ++ } else { ++ if (chip->cc2 != cc_status) { ++ dev_dbg(dev, "cc2: %s -> %s\n", ++ typec_cc_status_name[chip->cc2], ++ typec_cc_status_name[cc_status]); ++ chip->cc2 = cc_status; ++ tcpm_cc_change(dev); ++ } ++ } ++ ++done: ++ return; ++} ++ ++static int fusb302_enter_low_power_mode(struct udevice *dev, ++ bool attached, bool pd_capable) ++{ ++ unsigned int reg; ++ int ret; ++ ++ ret = fusb302_mask_interrupt(dev); ++ if (ret) ++ return ret; ++ if (attached && pd_capable) ++ reg = FUSB_REG_POWER_PWR_MEDIUM; ++ else if (attached) ++ reg = FUSB_REG_POWER_PWR_LOW; ++ else ++ reg = 0; ++ ++ return fusb302_set_power_mode(dev, reg); ++} ++ ++static const char * const cc_polarity_name[] = { ++ [TYPEC_POLARITY_CC1] = "Polarity_CC1", ++ [TYPEC_POLARITY_CC2] = "Polarity_CC2", ++}; ++ ++static int fusb302_set_cc_polarity_and_pull(struct udevice *dev, ++ enum typec_cc_polarity cc_polarity, ++ bool pull_up, bool pull_down) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ u8 switches0_data = 0x00; ++ u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN | ++ FUSB_REG_SWITCHES1_TXCC2_EN; ++ u8 switches1_data = 0x00; ++ ++ if (pull_down) ++ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | ++ FUSB_REG_SWITCHES0_CC2_PD_EN; ++ ++ if (cc_polarity == TYPEC_POLARITY_CC1) { ++ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1; ++ if (chip->vconn_on) ++ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2; ++ if (pull_up) ++ switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN; ++ switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN; ++ } else { ++ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2; ++ if (chip->vconn_on) ++ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1; ++ if (pull_up) ++ switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN; ++ switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN; ++ } ++ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1, ++ switches1_mask, switches1_data); ++ if (ret) ++ return ret; ++ chip->cc_polarity = cc_polarity; ++ ++ return ret; ++} ++ ++static int fusb302_handle_togdone_snk(struct udevice *dev, ++ u8 togdone_result) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ int ret; ++ u8 status0; ++ u8 bc_lvl; ++ enum typec_cc_polarity cc_polarity; ++ enum typec_cc_status cc_status_active, cc1, cc2; ++ ++ /* set polarity and pull_up, pull_down */ ++ cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ? ++ TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2; ++ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, false, true); ++ if (ret) { ++ dev_err(dev, "cannot set cc polarity %s, ret = %d\n", ++ cc_polarity_name[cc_polarity], ret); ++ return ret; ++ } ++ /* fusb302_set_cc_polarity() has set the correct measure block */ ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); ++ if (ret < 0) ++ return ret; ++ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; ++ cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl); ++ /* restart toggling if the cc status on the active line is OPEN */ ++ if (cc_status_active == TYPEC_CC_OPEN) { ++ dev_info(dev, "restart toggling as CC_OPEN detected\n"); ++ ret = fusb302_set_toggling(dev, chip->toggling_mode); ++ return ret; ++ } ++ /* update tcpm with the new cc value */ ++ cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ? ++ cc_status_active : TYPEC_CC_OPEN; ++ cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ? ++ cc_status_active : TYPEC_CC_OPEN; ++ if (chip->cc1 != cc1 || chip->cc2 != cc2) { ++ chip->cc1 = cc1; ++ chip->cc2 = cc2; ++ tcpm_cc_change(dev); ++ } ++ /* turn off toggling */ ++ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); ++ if (ret) { ++ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret); ++ return ret; ++ } ++ /* unmask bc_lvl interrupt */ ++ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL); ++ if (ret) { ++ dev_err(dev, "cannot unmask bc_lcl irq, ret=%d\n", ret); ++ return ret; ++ } ++ chip->intr_bc_lvl = true; ++ dev_dbg(dev, "detected cc1=%s, cc2=%s\n", ++ typec_cc_status_name[cc1], ++ typec_cc_status_name[cc2]); ++ ++ return ret; ++} ++ ++/* On error returns < 0, otherwise a typec_cc_status value */ ++static int fusb302_get_src_cc_status(struct udevice *dev, ++ enum typec_cc_polarity cc_polarity, ++ enum typec_cc_status *cc) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ u8 ra_mda = ra_mda_value[chip->src_current_status]; ++ u8 rd_mda = rd_mda_value[chip->src_current_status]; ++ u8 switches0_data, status0; ++ int ret; ++ ++ /* Step 1: Set switches so that we measure the right CC pin */ ++ switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ? ++ FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 : ++ FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2; ++ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data); ++ if (ret < 0) ++ return ret; ++ ++ fusb302_i2c_read(dev, FUSB_REG_SWITCHES0, &status0); ++ dev_dbg(dev, "get_src_cc_status switches: 0x%0x", status0); ++ ++ /* Step 2: Set compararator volt to differentiate between Open and Rd */ ++ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); ++ if (ret) ++ return ret; ++ ++ udelay(100); ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); ++ if (ret) ++ return ret; ++ ++ dev_dbg(dev, "get_src_cc_status rd_mda status0: 0x%0x", status0); ++ if (status0 & FUSB_REG_STATUS0_COMP) { ++ *cc = TYPEC_CC_OPEN; ++ return 0; ++ } ++ ++ /* Step 3: Set compararator input to differentiate between Rd and Ra. */ ++ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, ra_mda); ++ if (ret) ++ return ret; ++ ++ udelay(100); ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); ++ if (ret) ++ return ret; ++ ++ dev_dbg(dev, "get_src_cc_status ra_mda status0: 0x%0x", status0); ++ if (status0 & FUSB_REG_STATUS0_COMP) ++ *cc = TYPEC_CC_RD; ++ else ++ *cc = TYPEC_CC_RA; ++ ++ return 0; ++} ++ ++static int fusb302_handle_togdone_src(struct udevice *dev, ++ u8 togdone_result) ++{ ++ /* ++ * - set polarity (measure cc, vconn, tx) ++ * - set pull_up, pull_down ++ * - set cc1, cc2, and update to tcpm state machine ++ * - set I_COMP interrupt on ++ */ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ u8 rd_mda = rd_mda_value[chip->src_current_status]; ++ enum toggling_mode toggling_mode = chip->toggling_mode; ++ enum typec_cc_polarity cc_polarity; ++ enum typec_cc_status cc1, cc2; ++ int ret; ++ ++ /* ++ * The toggle-engine will stop in a src state if it sees either Ra or ++ * Rd. Determine the status for both CC pins, starting with the one ++ * where toggling stopped, as that is where the switches point now. ++ */ ++ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) ++ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1); ++ else ++ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2); ++ if (ret) ++ return ret; ++ /* we must turn off toggling before we can measure the other pin */ ++ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); ++ if (ret) { ++ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret); ++ return ret; ++ } ++ /* get the status of the other pin */ ++ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) ++ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2); ++ else ++ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1); ++ if (ret) ++ return ret; ++ ++ /* determine polarity based on the status of both pins */ ++ if (cc1 == TYPEC_CC_RD && (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) { ++ cc_polarity = TYPEC_POLARITY_CC1; ++ } else if (cc2 == TYPEC_CC_RD && ++ (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) { ++ cc_polarity = TYPEC_POLARITY_CC2; ++ } else { ++ dev_err(dev, "unexpected CC status cc1=%s, cc2=%s, restarting toggling\n", ++ typec_cc_status_name[cc1], ++ typec_cc_status_name[cc2]); ++ return fusb302_set_toggling(dev, toggling_mode); ++ } ++ /* set polarity and pull_up, pull_down */ ++ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, true, false); ++ if (ret < 0) { ++ dev_err(dev, "cannot set cc polarity %s, ret=%d\n", ++ cc_polarity_name[cc_polarity], ret); ++ return ret; ++ } ++ /* update tcpm with the new cc value */ ++ if (chip->cc1 != cc1 || chip->cc2 != cc2) { ++ chip->cc1 = cc1; ++ chip->cc2 = cc2; ++ tcpm_cc_change(dev); ++ } ++ /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */ ++ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); ++ if (ret) ++ return ret; ++ /* unmask comp_chng interrupt */ ++ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, ++ FUSB_REG_MASK_COMP_CHNG); ++ if (ret) { ++ dev_err(dev, "cannot unmask comp_chng irq, ret=%d\n", ret); ++ return ret; ++ } ++ chip->intr_comp_chng = true; ++ dev_dbg(dev, "detected cc1=%s, cc2=%s\n", ++ typec_cc_status_name[cc1], ++ typec_cc_status_name[cc2]); ++ ++ return ret; ++} ++ ++static int fusb302_handle_togdone(struct udevice *dev) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ u8 togdone_result, status1a; ++ int ret; ++ ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS1A, &status1a); ++ if (ret < 0) ++ return ret; ++ togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) & ++ FUSB_REG_STATUS1A_TOGSS_MASK; ++ switch (togdone_result) { ++ case FUSB_REG_STATUS1A_TOGSS_SNK1: ++ case FUSB_REG_STATUS1A_TOGSS_SNK2: ++ return fusb302_handle_togdone_snk(dev, togdone_result); ++ case FUSB_REG_STATUS1A_TOGSS_SRC1: ++ case FUSB_REG_STATUS1A_TOGSS_SRC2: ++ return fusb302_handle_togdone_src(dev, togdone_result); ++ case FUSB_REG_STATUS1A_TOGSS_AA: ++ /* doesn't support */ ++ dev_err(dev, "AudioAccessory not supported\n"); ++ fusb302_set_toggling(dev, chip->toggling_mode); ++ break; ++ default: ++ dev_err(dev, "TOGDONE with an invalid state: %d\n", ++ togdone_result); ++ fusb302_set_toggling(dev, chip->toggling_mode); ++ break; ++ } ++ return ret; ++} ++ ++static int fusb302_pd_reset(struct udevice *dev) ++{ ++ return fusb302_i2c_set_bits(dev, FUSB_REG_RESET, ++ FUSB_REG_RESET_PD_RESET); ++} ++ ++static int fusb302_pd_read_message(struct udevice *dev, ++ struct pd_message *msg) ++{ ++ int len, ret; ++ u8 crc[4]; ++ u8 token; ++ ++ /* first SOP token */ ++ ret = fusb302_i2c_read(dev, FUSB_REG_FIFOS, &token); ++ if (ret) ++ return ret; ++ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 2, ++ (u8 *)&msg->header); ++ if (ret) ++ return ret; ++ len = pd_header_cnt_le(msg->header) * 4; ++ /* add 4 to length to include the CRC */ ++ if (len > PD_MAX_PAYLOAD * 4) { ++ dev_err(dev, "PD message too long %d\n", len); ++ return -EINVAL; ++ } ++ if (len > 0) { ++ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, len, ++ (u8 *)msg->payload); ++ if (ret) ++ return ret; ++ } ++ /* another 4 bytes to read CRC out */ ++ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 4, crc); ++ if (ret) ++ return ret; ++ dev_dbg(dev, "Received PD message (header=0x%x len=%d)\n", msg->header, len); ++ ++ /* ++ * Check if we've read off a GoodCRC message. If so then indicate to ++ * TCPM that the previous transmission has completed. Otherwise we pass ++ * the received message over to TCPM for processing. ++ * ++ * We make this check here instead of basing the reporting decision on ++ * the IRQ event type, as it's possible for the chip to report the ++ * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need ++ * to check the message type to ensure correct reporting to TCPM. ++ */ ++ if (!len && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC)) ++ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS); ++ else ++ tcpm_pd_receive(dev, msg); ++ ++ return ret; ++} ++ ++static void fusb302_interrupt_handle(struct udevice *dev) ++{ ++ struct fusb302_chip *chip = dev_get_priv(dev); ++ u8 interrupt; ++ u8 interrupta; ++ u8 interruptb; ++ u8 status0; ++ bool vbus_present; ++ bool comp_result; ++ bool intr_togdone; ++ bool intr_bc_lvl; ++ bool intr_comp_chng; ++ struct pd_message pd_msg; ++ int ret; ++ ++ /* grab a snapshot of intr flags */ ++ intr_togdone = chip->intr_togdone; ++ intr_bc_lvl = chip->intr_bc_lvl; ++ intr_comp_chng = chip->intr_comp_chng; ++ ++ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPT, &interrupt); ++ if (ret) ++ return; ++ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTA, &interrupta); ++ if (ret) ++ return; ++ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTB, &interruptb); ++ if (ret) ++ return; ++ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); ++ if (ret) ++ return; ++ ++ /* ++ * Since we are polling the IRQs, avoid printing messages when there ++ * no interrupts at all to avoid spamming the log. ++ */ ++ if (interrupt != 0 || interrupta != 0 || interruptb != 0) ++ dev_dbg(dev, "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n", ++ interrupt, interrupta, interruptb, status0); ++ ++ if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) { ++ vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK); ++ dev_dbg(dev, "IRQ: VBUS_OK, vbus=%s\n", ++ vbus_present ? "On" : "Off"); ++ if (vbus_present != chip->vbus_present) { ++ chip->vbus_present = vbus_present; ++ tcpm_vbus_change(dev); ++ } ++ } ++ ++ if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) { ++ dev_dbg(dev, "IRQ: TOGDONE\n"); ++ ret = fusb302_handle_togdone(dev); ++ if (ret) { ++ dev_err(dev, "handle togdone error: %d\n", ret); ++ return; ++ } ++ } ++ ++ if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) { ++ dev_dbg(dev, "IRQ: BC_LVL, handler pending\n"); ++ fusb302_bc_lvl_handler(dev); ++ } ++ ++ if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) { ++ comp_result = !!(status0 & FUSB_REG_STATUS0_COMP); ++ dev_dbg(dev, "IRQ: COMP_CHNG, comp=%s\n", ++ comp_result ? "true" : "false"); ++ if (comp_result) { ++ /* cc level > Rd_threshold, detach */ ++ chip->cc1 = TYPEC_CC_OPEN; ++ chip->cc2 = TYPEC_CC_OPEN; ++ tcpm_cc_change(dev); ++ } ++ } ++ ++ if (interrupt & FUSB_REG_INTERRUPT_COLLISION) { ++ dev_dbg(dev, "IRQ: PD collision\n"); ++ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED); ++ } ++ ++ if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) { ++ dev_dbg(dev, "IRQ: PD retry failed\n"); ++ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED); ++ } ++ ++ if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) { ++ dev_dbg(dev, "IRQ: PD hardreset sent\n"); ++ ret = fusb302_pd_reset(dev); ++ if (ret) { ++ dev_err(dev, "cannot PD reset, ret=%d\n", ret); ++ return; ++ } ++ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS); ++ } ++ ++ if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) { ++ dev_dbg(dev, "IRQ: PD tx success\n"); ++ ret = fusb302_pd_read_message(dev, &pd_msg); ++ if (ret) { ++ dev_err(dev, "cannot read in PD message, ret=%d\n", ret); ++ return; ++ } ++ } ++ ++ if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) { ++ dev_dbg(dev, "IRQ: PD received hardreset\n"); ++ ret = fusb302_pd_reset(dev); ++ if (ret) { ++ dev_err(dev, "cannot PD reset, ret=%d\n", ret); ++ return; ++ } ++ tcpm_pd_hard_reset(dev); ++ } ++ ++ if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) { ++ dev_dbg(dev, "IRQ: PD sent good CRC\n"); ++ ret = fusb302_pd_read_message(dev, &pd_msg); ++ if (ret) { ++ dev_err(dev, "cannot read in PD message, ret=%d\n", ret); ++ return; ++ } ++ } ++} ++ ++static void fusb302_poll_event(struct udevice *dev) ++{ ++ fusb302_interrupt_handle(dev); ++} ++ ++static int fusb302_get_connector_node(struct udevice *dev, ofnode *connector_node) ++{ ++ *connector_node = dev_read_subnode(dev, "connector"); ++ if (!ofnode_valid(*connector_node)) { ++ dev_err(dev, "'connector' node is not found\n"); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++static struct dm_tcpm_ops fusb302_ops = { ++ .get_connector_node = fusb302_get_connector_node, ++ .init = fusb302_init, ++ .get_vbus = fusb302_get_vbus, ++ .set_cc = fusb302_set_cc, ++ .get_cc = fusb302_get_cc, ++ .set_vconn = fusb302_set_vconn, ++ .set_vbus = fusb302_set_vbus, ++ .set_pd_rx = fusb302_set_pd_rx, ++ .set_roles = fusb302_set_roles, ++ .start_toggling = fusb302_start_toggling, ++ .pd_transmit = fusb302_pd_transmit, ++ .poll_event = fusb302_poll_event, ++ .enter_low_power_mode = fusb302_enter_low_power_mode, ++}; ++ ++static const struct udevice_id fusb302_ids[] = { ++ { .compatible = "fcs,fusb302" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(fusb302) = { ++ .name = "fusb302", ++ .id = UCLASS_TCPM, ++ .of_match = fusb302_ids, ++ .ops = &fusb302_ops, ++ .priv_auto = sizeof(struct fusb302_chip), ++}; +diff --git a/drivers/usb/tcpm/fusb302_reg.h b/drivers/usb/tcpm/fusb302_reg.h +new file mode 100644 +index 000000000000..edc0e4b0f1e6 +--- /dev/null ++++ b/drivers/usb/tcpm/fusb302_reg.h +@@ -0,0 +1,177 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2016-2017 Google, Inc ++ * ++ * Fairchild FUSB302 Type-C Chip Driver ++ */ ++ ++#ifndef FUSB302_REG_H ++#define FUSB302_REG_H ++ ++#define FUSB_REG_DEVICE_ID 0x01 ++#define FUSB_REG_SWITCHES0 0x02 ++#define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7) ++#define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6) ++#define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5) ++#define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4) ++#define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3) ++#define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2) ++#define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1) ++#define FUSB_REG_SWITCHES0_CC1_PD_EN BIT(0) ++#define FUSB_REG_SWITCHES1 0x03 ++#define FUSB_REG_SWITCHES1_POWERROLE BIT(7) ++#define FUSB_REG_SWITCHES1_SPECREV1 BIT(6) ++#define FUSB_REG_SWITCHES1_SPECREV0 BIT(5) ++#define FUSB_REG_SWITCHES1_DATAROLE BIT(4) ++#define FUSB_REG_SWITCHES1_AUTO_GCRC BIT(2) ++#define FUSB_REG_SWITCHES1_TXCC2_EN BIT(1) ++#define FUSB_REG_SWITCHES1_TXCC1_EN BIT(0) ++#define FUSB_REG_MEASURE 0x04 ++#define FUSB_REG_MEASURE_MDAC5 BIT(7) ++#define FUSB_REG_MEASURE_MDAC4 BIT(6) ++#define FUSB_REG_MEASURE_MDAC3 BIT(5) ++#define FUSB_REG_MEASURE_MDAC2 BIT(4) ++#define FUSB_REG_MEASURE_MDAC1 BIT(3) ++#define FUSB_REG_MEASURE_MDAC0 BIT(2) ++#define FUSB_REG_MEASURE_VBUS BIT(1) ++#define FUSB_REG_MEASURE_XXXX5 BIT(0) ++#define FUSB_REG_CONTROL0 0x06 ++#define FUSB_REG_CONTROL0_TX_FLUSH BIT(6) ++#define FUSB_REG_CONTROL0_INT_MASK BIT(5) ++#define FUSB_REG_CONTROL0_HOST_CUR_MASK (0xC) ++#define FUSB_REG_CONTROL0_HOST_CUR_HIGH (0xC) ++#define FUSB_REG_CONTROL0_HOST_CUR_MED (0x8) ++#define FUSB_REG_CONTROL0_HOST_CUR_DEF (0x4) ++#define FUSB_REG_CONTROL0_TX_START BIT(0) ++#define FUSB_REG_CONTROL1 0x07 ++#define FUSB_REG_CONTROL1_ENSOP2DB BIT(6) ++#define FUSB_REG_CONTROL1_ENSOP1DB BIT(5) ++#define FUSB_REG_CONTROL1_BIST_MODE2 BIT(4) ++#define FUSB_REG_CONTROL1_RX_FLUSH BIT(2) ++#define FUSB_REG_CONTROL1_ENSOP2 BIT(1) ++#define FUSB_REG_CONTROL1_ENSOP1 BIT(0) ++#define FUSB_REG_CONTROL2 0x08 ++#define FUSB_REG_CONTROL2_MODE BIT(1) ++#define FUSB_REG_CONTROL2_MODE_MASK (0x6) ++#define FUSB_REG_CONTROL2_MODE_DFP (0x6) ++#define FUSB_REG_CONTROL2_MODE_UFP (0x4) ++#define FUSB_REG_CONTROL2_MODE_DRP (0x2) ++#define FUSB_REG_CONTROL2_MODE_NONE (0x0) ++#define FUSB_REG_CONTROL2_TOGGLE BIT(0) ++#define FUSB_REG_CONTROL3 0x09 ++#define FUSB_REG_CONTROL3_SEND_HARDRESET BIT(6) ++#define FUSB_REG_CONTROL3_BIST_TMODE BIT(5) /* 302B Only */ ++#define FUSB_REG_CONTROL3_AUTO_HARDRESET BIT(4) ++#define FUSB_REG_CONTROL3_AUTO_SOFTRESET BIT(3) ++#define FUSB_REG_CONTROL3_N_RETRIES BIT(1) ++#define FUSB_REG_CONTROL3_N_RETRIES_MASK (0x6) ++#define FUSB_REG_CONTROL3_N_RETRIES_3 (0x6) ++#define FUSB_REG_CONTROL3_N_RETRIES_2 (0x4) ++#define FUSB_REG_CONTROL3_N_RETRIES_1 (0x2) ++#define FUSB_REG_CONTROL3_AUTO_RETRY BIT(0) ++#define FUSB_REG_MASK 0x0A ++#define FUSB_REG_MASK_VBUSOK BIT(7) ++#define FUSB_REG_MASK_ACTIVITY BIT(6) ++#define FUSB_REG_MASK_COMP_CHNG BIT(5) ++#define FUSB_REG_MASK_CRC_CHK BIT(4) ++#define FUSB_REG_MASK_ALERT BIT(3) ++#define FUSB_REG_MASK_WAKE BIT(2) ++#define FUSB_REG_MASK_COLLISION BIT(1) ++#define FUSB_REG_MASK_BC_LVL BIT(0) ++#define FUSB_REG_POWER 0x0B ++#define FUSB_REG_POWER_PWR BIT(0) ++#define FUSB_REG_POWER_PWR_LOW 0x1 ++#define FUSB_REG_POWER_PWR_MEDIUM 0x3 ++#define FUSB_REG_POWER_PWR_HIGH 0x7 ++#define FUSB_REG_POWER_PWR_ALL 0xF ++#define FUSB_REG_RESET 0x0C ++#define FUSB_REG_RESET_PD_RESET BIT(1) ++#define FUSB_REG_RESET_SW_RESET BIT(0) ++#define FUSB_REG_MASKA 0x0E ++#define FUSB_REG_MASKA_OCP_TEMP BIT(7) ++#define FUSB_REG_MASKA_TOGDONE BIT(6) ++#define FUSB_REG_MASKA_SOFTFAIL BIT(5) ++#define FUSB_REG_MASKA_RETRYFAIL BIT(4) ++#define FUSB_REG_MASKA_HARDSENT BIT(3) ++#define FUSB_REG_MASKA_TX_SUCCESS BIT(2) ++#define FUSB_REG_MASKA_SOFTRESET BIT(1) ++#define FUSB_REG_MASKA_HARDRESET BIT(0) ++#define FUSB_REG_MASKB 0x0F ++#define FUSB_REG_MASKB_GCRCSENT BIT(0) ++#define FUSB_REG_STATUS0A 0x3C ++#define FUSB_REG_STATUS0A_SOFTFAIL BIT(5) ++#define FUSB_REG_STATUS0A_RETRYFAIL BIT(4) ++#define FUSB_REG_STATUS0A_POWER BIT(2) ++#define FUSB_REG_STATUS0A_RX_SOFT_RESET BIT(1) ++#define FUSB_REG_STATUS0A_RX_HARD_RESET BIT(0) ++#define FUSB_REG_STATUS1A 0x3D ++#define FUSB_REG_STATUS1A_TOGSS BIT(3) ++#define FUSB_REG_STATUS1A_TOGSS_RUNNING 0x0 ++#define FUSB_REG_STATUS1A_TOGSS_SRC1 0x1 ++#define FUSB_REG_STATUS1A_TOGSS_SRC2 0x2 ++#define FUSB_REG_STATUS1A_TOGSS_SNK1 0x5 ++#define FUSB_REG_STATUS1A_TOGSS_SNK2 0x6 ++#define FUSB_REG_STATUS1A_TOGSS_AA 0x7 ++#define FUSB_REG_STATUS1A_TOGSS_POS (3) ++#define FUSB_REG_STATUS1A_TOGSS_MASK (0x7) ++#define FUSB_REG_STATUS1A_RXSOP2DB BIT(2) ++#define FUSB_REG_STATUS1A_RXSOP1DB BIT(1) ++#define FUSB_REG_STATUS1A_RXSOP BIT(0) ++#define FUSB_REG_INTERRUPTA 0x3E ++#define FUSB_REG_INTERRUPTA_OCP_TEMP BIT(7) ++#define FUSB_REG_INTERRUPTA_TOGDONE BIT(6) ++#define FUSB_REG_INTERRUPTA_SOFTFAIL BIT(5) ++#define FUSB_REG_INTERRUPTA_RETRYFAIL BIT(4) ++#define FUSB_REG_INTERRUPTA_HARDSENT BIT(3) ++#define FUSB_REG_INTERRUPTA_TX_SUCCESS BIT(2) ++#define FUSB_REG_INTERRUPTA_SOFTRESET BIT(1) ++#define FUSB_REG_INTERRUPTA_HARDRESET BIT(0) ++#define FUSB_REG_INTERRUPTB 0x3F ++#define FUSB_REG_INTERRUPTB_GCRCSENT BIT(0) ++#define FUSB_REG_STATUS0 0x40 ++#define FUSB_REG_STATUS0_VBUSOK BIT(7) ++#define FUSB_REG_STATUS0_ACTIVITY BIT(6) ++#define FUSB_REG_STATUS0_COMP BIT(5) ++#define FUSB_REG_STATUS0_CRC_CHK BIT(4) ++#define FUSB_REG_STATUS0_ALERT BIT(3) ++#define FUSB_REG_STATUS0_WAKE BIT(2) ++#define FUSB_REG_STATUS0_BC_LVL_MASK 0x03 ++#define FUSB_REG_STATUS0_BC_LVL_0_200 0x0 ++#define FUSB_REG_STATUS0_BC_LVL_200_600 0x1 ++#define FUSB_REG_STATUS0_BC_LVL_600_1230 0x2 ++#define FUSB_REG_STATUS0_BC_LVL_1230_MAX 0x3 ++#define FUSB_REG_STATUS0_BC_LVL1 BIT(1) ++#define FUSB_REG_STATUS0_BC_LVL0 BIT(0) ++#define FUSB_REG_STATUS1 0x41 ++#define FUSB_REG_STATUS1_RXSOP2 BIT(7) ++#define FUSB_REG_STATUS1_RXSOP1 BIT(6) ++#define FUSB_REG_STATUS1_RX_EMPTY BIT(5) ++#define FUSB_REG_STATUS1_RX_FULL BIT(4) ++#define FUSB_REG_STATUS1_TX_EMPTY BIT(3) ++#define FUSB_REG_STATUS1_TX_FULL BIT(2) ++#define FUSB_REG_INTERRUPT 0x42 ++#define FUSB_REG_INTERRUPT_VBUSOK BIT(7) ++#define FUSB_REG_INTERRUPT_ACTIVITY BIT(6) ++#define FUSB_REG_INTERRUPT_COMP_CHNG BIT(5) ++#define FUSB_REG_INTERRUPT_CRC_CHK BIT(4) ++#define FUSB_REG_INTERRUPT_ALERT BIT(3) ++#define FUSB_REG_INTERRUPT_WAKE BIT(2) ++#define FUSB_REG_INTERRUPT_COLLISION BIT(1) ++#define FUSB_REG_INTERRUPT_BC_LVL BIT(0) ++#define FUSB_REG_FIFOS 0x43 ++ ++/* Tokens defined for the FUSB302 TX FIFO */ ++enum fusb302_txfifo_tokens { ++ FUSB302_TKN_TXON = 0xA1, ++ FUSB302_TKN_SYNC1 = 0x12, ++ FUSB302_TKN_SYNC2 = 0x13, ++ FUSB302_TKN_SYNC3 = 0x1B, ++ FUSB302_TKN_RST1 = 0x15, ++ FUSB302_TKN_RST2 = 0x16, ++ FUSB302_TKN_PACKSYM = 0x80, ++ FUSB302_TKN_JAMCRC = 0xFF, ++ FUSB302_TKN_EOP = 0x14, ++ FUSB302_TKN_TXOFF = 0xFE, ++}; ++ ++#endif + +From patchwork Thu Sep 5 15:08:39 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit 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rock5b-rk3588: enable USB-C in operating system +Date: Thu, 5 Sep 2024 17:08:39 +0200 +Message-ID: <20240905151707.59101-4-sebastian.reichel@collabora.com> +X-Mailer: git-send-email 2.45.2 +In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> +References: <20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Since older U-Boot releases do not negotiate USB PD, the kernel +DT may not enable the USB-C controller by default to avoid a +regression. The plan is to upstream it with 'status = "fail";' +instead. U-Boot should then mark it as 'status = "okay";' if +it negotiated USB PD. Currently existing upstream kernel DTs do +not yet have the USB-C controller at all, so we ignore any +failures. + +Reviewed-by: Kever Yang +Tested-by: Soeren Moch +Signed-off-by: Sebastian Reichel +--- + board/radxa/rock5b-rk3588/Makefile | 6 ++++++ + board/radxa/rock5b-rk3588/rock5b-rk3588.c | 16 ++++++++++++++++ + 2 files changed, 22 insertions(+) + create mode 100644 board/radxa/rock5b-rk3588/Makefile + create mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c + +diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile +new file mode 100644 +index 000000000000..95d813596da4 +--- /dev/null ++++ b/board/radxa/rock5b-rk3588/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# Copyright (c) 2022 Collabora Ltd. ++# ++ ++obj-y += rock5b-rk3588.o +diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c +new file mode 100644 +index 000000000000..fc2f69db2241 +--- /dev/null ++++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c +@@ -0,0 +1,16 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2023-2024 Collabora Ltd. ++ */ ++ ++#include ++#include ++ ++#ifdef CONFIG_OF_BOARD_SETUP ++int ft_board_setup(void *blob, struct bd_info *bd) ++{ ++ if (IS_ENABLED(CONFIG_TYPEC_FUSB302)) ++ fdt_status_okay_by_compatible(blob, "fcs,fusb302"); ++ return 0; ++} ++#endif + +From patchwork Thu Sep 5 15:08:40 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sebastian Reichel +X-Patchwork-Id: 1981311 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=collabora.com header.i=@collabora.com + header.a=rsa-sha256 header.s=mail header.b=Hn8Z4MVu; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4X02z82c6zz1yXY + for ; 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+ Thu, 5 Sep 2024 17:17:07 +0200 (CEST) +Received: by jupiter.universe (Postfix, from userid 1000) + id A518D4800F8; Thu, 05 Sep 2024 17:17:07 +0200 (CEST) +From: Sebastian Reichel +To: Marek Vasut , u-boot@lists.denx.de, + Jonas Karlman , Soeren Moch +Cc: Eugen Hristev , + Tim Harvey , Kever Yang , + Philipp Tomsich , Simon Glass , + Sebastian Reichel +Subject: [PATCH v6 4/6] rockchip: rk3588-rock-5b: Add USB-C controller to + u-boot.dtsi +Date: Thu, 5 Sep 2024 17:08:40 +0200 +Message-ID: <20240905151707.59101-5-sebastian.reichel@collabora.com> +X-Mailer: git-send-email 2.45.2 +In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> +References: <20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Add USB-C controller (fusb302), which will be used by U-Boot to +initialize USB-PD. This is needed, because USB-PD communication +must happen within 5 seconds after the USB-C connector got plugged. +On my Rock 5B it often takes 5 seconds to jump to the Linux binary, +so it must happen before Linux is initialized. + +This adds the DT node to the U-Boot specific file, since the Linux +kernel DT currently does not describe it to avoid a system reset. +The plan is to add it to the Linux DT with status = 'fail' and then +let U-Boot mark it as status = 'okay' if it properly dealt with +early USB-PD initialization. Until the Kernel DT has the node, let's +add it in U-Boot to get things going. + +Reviewed-by: Kever Yang +Tested-by: Soeren Moch +Signed-off-by: Sebastian Reichel +--- + arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 28 +++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +index 4dd17ff408cb..b0ad1158854c 100644 +--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi ++++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +@@ -3,6 +3,7 @@ + * Copyright (c) 2023 Collabora Ltd. + */ + ++#include + #include "rk3588-u-boot.dtsi" + + &fspim2_pins { +@@ -10,6 +11,33 @@ + bootph-some-ram; + }; + ++&i2c4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c4m1_xfer>; ++ status = "okay"; ++ ++ usbc0: usb-typec@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio3>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ usb_con: connector { ++ compatible = "usb-c-connector"; ++ label = "USB-C"; ++ data-role = "dual"; ++ power-role = "sink"; ++ try-power-role = "sink"; ++ op-sink-microwatt = <1000000>; ++ sink-pdos = ++ , ++ ; ++ }; ++ }; ++}; ++ + &sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; + +From patchwork Thu Sep 5 15:08:41 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sebastian Reichel +X-Patchwork-Id: 1981313 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=collabora.com header.i=@collabora.com + header.a=rsa-sha256 header.s=mail header.b=q3YksfJp; + dkim-atps=neutral +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + 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Reichel +To: Marek Vasut , u-boot@lists.denx.de, + Jonas Karlman , Soeren Moch +Cc: Eugen Hristev , + Tim Harvey , Kever Yang , + Philipp Tomsich , Simon Glass , + Sebastian Reichel +Subject: [PATCH v6 5/6] rockchip: rock5b-rk3588: Enable USB-C PD support +Date: Thu, 5 Sep 2024 17:08:41 +0200 +Message-ID: <20240905151707.59101-6-sebastian.reichel@collabora.com> +X-Mailer: git-send-email 2.45.2 +In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> +References: <20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Now that all code has been prepared update the default configuration to +make use of it. + +Reviewed-by: Kever Yang +Tested-by: Soeren Moch +Signed-off-by: Sebastian Reichel +--- + configs/rock5b-rk3588_defconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig +index 80a2f2fed586..82c942a52d62 100644 +--- a/configs/rock5b-rk3588_defconfig ++++ b/configs/rock5b-rk3588_defconfig +@@ -23,6 +23,7 @@ CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y + CONFIG_SPL_LOAD_FIT=y + CONFIG_LEGACY_IMAGE_FORMAT=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_DISPLAY_BOARDINFO_LATE=y +@@ -103,3 +104,6 @@ CONFIG_USB_GADGET=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_FUNCTION_ROCKUSB=y + CONFIG_ERRNO_STR=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_FUSB302=y ++CONFIG_CMD_TCPM=y + +From patchwork Thu Sep 5 15:08:42 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sebastian Reichel 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<20240905151707.59101-1-sebastian.reichel@collabora.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Add new section for USB TypeC Port Manager (TCPM) support, which +is needed to figure out cable orientation of USB-C plus and to do +USB PD communication. + +Signed-off-by: Sebastian Reichel +--- + MAINTAINERS | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/MAINTAINERS b/MAINTAINERS +index 2050ae24df82..f3cf84d20dbd 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1721,6 +1721,15 @@ F: common/usb_kbd.c + F: common/usb_storage.c + F: include/usb.h + ++USB TCPM ++M: Sebastian Reichel ++S: Maintained ++F: cmd/tcpm.c ++F: doc/usage/cmd/tcpm.rst ++F: drivers/usb/tcpm/ ++F: include/usb/pd.h ++F: include/usb/tcpm.h ++ + USB xHCI + M: Bin Meng + S: Maintained diff --git a/sources b/sources index 3c6cf70..f50fe43 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10-rc4.tar.bz2) = 31869a7a6c6592ffe73b2f71c4985ace8beee33b232f4e8cbb8d2ebcee9b08d7bedeb57ca7e36cbadf42df44283b0ba79e87b55b1b2f94f2cc4a01cbce747cf7 +SHA512 (u-boot-2024.10-rc5.tar.bz2) = bd86b6cc780ac79fef2abca1e6b27a97312105e6a8d809d8a7f93e3665342f90352124786ec075b5a64cf6705a91ae507dff127d2062c64ecdb325e395a7b0d9 diff --git a/uboot-tools.spec b/uboot-tools.spec index 09f67c6..2098d1e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc4 +%global candidate rc5 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ @@ -31,8 +31,9 @@ Patch5: enable-bootmenu-by-default.patch # Rockchips improvements Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch +Patch11: FUSB302-USB-C-controller-support.patch # QCom -Patch11: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch +Patch15: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch BuildRequires: bc BuildRequires: bison @@ -206,6 +207,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Mon Sep 16 2024 Peter Robinson - 1:2024.10-0.6.rc5 +- Update to 2024.10 RC5 + * Fri Sep 20 2024 Peter Robinson - 1:2024.10-0.5.rc4 - Add missing licenses directory From ebdce54175b30a10f2777cb358a7a5386ba46061 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 17 Sep 2024 07:53:12 +0100 Subject: [PATCH 273/351] fix changelog date --- uboot-tools.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 2098d1e..a7cc4bf 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -210,7 +210,7 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} * Mon Sep 16 2024 Peter Robinson - 1:2024.10-0.6.rc5 - Update to 2024.10 RC5 -* Fri Sep 20 2024 Peter Robinson - 1:2024.10-0.5.rc4 +* Fri Sep 6 2024 Peter Robinson - 1:2024.10-0.5.rc4 - Add missing licenses directory * Tue Sep 03 2024 Peter Robinson - 1:2024.10-0.4.rc4 From 511682db4a42872dc47378a5863a87fdbbaebbd6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 23 Sep 2024 19:52:54 +0100 Subject: [PATCH 274/351] Add rk35xx for pci/usb enum --- ...hip-Enable-preboot-start-for-pci-usb.patch | 630 ++++++++++++++++++ 1 file changed, 630 insertions(+) diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch index 56756bc..0542ab0 100644 --- a/rockchip-Enable-preboot-start-for-pci-usb.patch +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -165,3 +165,633 @@ index fc0804a0b80..9a94d96b148 100644 -- 2.45.1 +From 5116720be74a92417c69229fc45a97502869ff9b Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Mon, 23 Sep 2024 19:51:00 +0100 +Subject: [PATCH] rockchip: rk35xx: Enable preboot start for pci/usb + +Enable the preboot so nvme works OOTB + +Signed-off-by: Peter Robinson +--- + configs/anbernic-rgxx3-rk3566_defconfig | 2 ++ + configs/bpi-r2-pro-rk3568_defconfig | 2 ++ + configs/cm3588-nas-rk3588_defconfig | 2 ++ + configs/coolpi-4b-rk3588s_defconfig | 2 ++ + configs/coolpi-cm5-evb-rk3588_defconfig | 2 ++ + configs/evb-rk3568_defconfig | 2 ++ + configs/evb-rk3588_defconfig | 2 ++ + configs/generic-rk3568_defconfig | 2 ++ + configs/generic-rk3588_defconfig | 2 ++ + configs/jaguar-rk3588_defconfig | 2 ++ + configs/lubancat-2-rk3568_defconfig | 2 ++ + configs/nanopc-t6-rk3588_defconfig | 2 ++ + configs/nanopi-r5c-rk3568_defconfig | 2 ++ + configs/nanopi-r5s-rk3568_defconfig | 2 ++ + configs/nanopi-r6c-rk3588s_defconfig | 2 ++ + configs/nanopi-r6s-rk3588s_defconfig | 2 ++ + configs/neu6a-io-rk3588_defconfig | 2 ++ + configs/neu6b-io-rk3588_defconfig | 2 ++ + configs/nova-rk3588s_defconfig | 2 ++ + configs/odroid-m1-rk3568_defconfig | 2 ++ + configs/orangepi-3b-rk3566_defconfig | 2 ++ + configs/orangepi-5-plus-rk3588_defconfig | 2 ++ + configs/orangepi-5-rk3588s_defconfig | 2 ++ + configs/pinetab2-rk3566_defconfig | 2 ++ + configs/powkiddy-x55-rk3566_defconfig | 2 ++ + configs/quartz64-a-rk3566_defconfig | 2 ++ + configs/quartz64-b-rk3566_defconfig | 2 ++ + configs/quartzpro64-rk3588_defconfig | 2 ++ + configs/radxa-cm3-io-rk3566_defconfig | 2 ++ + configs/radxa-e25-rk3568_defconfig | 2 ++ + configs/radxa-zero-3-rk3566_defconfig | 2 ++ + configs/rock-3a-rk3568_defconfig | 2 ++ + configs/rock-3b-rk3568_defconfig | 2 ++ + configs/rock-3c-rk3566_defconfig | 2 ++ + configs/rock-5-itx-rk3588_defconfig | 2 ++ + configs/rock5a-rk3588s_defconfig | 2 ++ + configs/rock5b-rk3588_defconfig | 2 ++ + configs/sige7-rk3588_defconfig | 2 ++ + configs/soquartz-blade-rk3566_defconfig | 2 ++ + configs/soquartz-cm4-rk3566_defconfig | 2 ++ + configs/soquartz-model-a-rk3566_defconfig | 2 ++ + configs/tiger-rk3588_defconfig | 2 ++ + configs/toybrick-rk3588_defconfig | 2 ++ + configs/turing-rk1-rk3588_defconfig | 2 ++ + 44 files changed, 88 insertions(+) + +diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig +index a03509bf467..45cfaf5deb7 100644 +--- a/configs/anbernic-rgxx3-rk3566_defconfig ++++ b/configs/anbernic-rgxx3-rk3566_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig +index eccc15a0ae5..57d4fafbef4 100644 +--- a/configs/bpi-r2-pro-rk3568_defconfig ++++ b/configs/bpi-r2-pro-rk3568_defconfig +@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/cm3588-nas-rk3588_defconfig b/configs/cm3588-nas-rk3588_defconfig +index d6d82757a2d..7ef75dfedeb 100644 +--- a/configs/cm3588-nas-rk3588_defconfig ++++ b/configs/cm3588-nas-rk3588_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig +index 3d45d939abb..6005d0b556b 100644 +--- a/configs/coolpi-4b-rk3588s_defconfig ++++ b/configs/coolpi-4b-rk3588s_defconfig +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig +index 5190d69c1c5..30f1690fe4d 100644 +--- a/configs/coolpi-cm5-evb-rk3588_defconfig ++++ b/configs/coolpi-cm5-evb-rk3588_defconfig +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig +index 2076f55122b..543c1a7d6ba 100644 +--- a/configs/evb-rk3568_defconfig ++++ b/configs/evb-rk3568_defconfig +@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig +index 1d5585677a4..44ef0fd0f54 100644 +--- a/configs/evb-rk3588_defconfig ++++ b/configs/evb-rk3588_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig +index 66a33afbbaf..b1bfb831aa5 100644 +--- a/configs/generic-rk3568_defconfig ++++ b/configs/generic-rk3568_defconfig +@@ -13,6 +13,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig +index 42bc2c9a765..6c713094bf0 100644 +--- a/configs/generic-rk3588_defconfig ++++ b/configs/generic-rk3588_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig +index 18006467dde..a5d7612d9a5 100644 +--- a/configs/jaguar-rk3588_defconfig ++++ b/configs/jaguar-rk3588_defconfig +@@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig +index 88593bfa705..870d8f72317 100644 +--- a/configs/lubancat-2-rk3568_defconfig ++++ b/configs/lubancat-2-rk3568_defconfig +@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig +index 926267f93ad..7b0ac43d8c1 100644 +--- a/configs/nanopc-t6-rk3588_defconfig ++++ b/configs/nanopc-t6-rk3588_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig +index 8e30093ed9d..2c1d7b7435b 100644 +--- a/configs/nanopi-r5c-rk3568_defconfig ++++ b/configs/nanopi-r5c-rk3568_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig +index e1865b2e171..1afce812b22 100644 +--- a/configs/nanopi-r5s-rk3568_defconfig ++++ b/configs/nanopi-r5s-rk3568_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopi-r6c-rk3588s_defconfig b/configs/nanopi-r6c-rk3588s_defconfig +index f8d2d67bd35..e6e9cf1101a 100644 +--- a/configs/nanopi-r6c-rk3588s_defconfig ++++ b/configs/nanopi-r6c-rk3588s_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopi-r6s-rk3588s_defconfig b/configs/nanopi-r6s-rk3588s_defconfig +index f7b364655ff..fd28485db93 100644 +--- a/configs/nanopi-r6s-rk3588s_defconfig ++++ b/configs/nanopi-r6s-rk3588s_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig +index ac281e65392..3338f0a3160 100644 +--- a/configs/neu6a-io-rk3588_defconfig ++++ b/configs/neu6a-io-rk3588_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig +index c01e5fb0d04..73cc8e6d0ff 100644 +--- a/configs/neu6b-io-rk3588_defconfig ++++ b/configs/neu6b-io-rk3588_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nova-rk3588s_defconfig b/configs/nova-rk3588s_defconfig +index a2e2440359c..45862f403fb 100644 +--- a/configs/nova-rk3588s_defconfig ++++ b/configs/nova-rk3588s_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig +index b5263caff6d..a2217b530d1 100644 +--- a/configs/odroid-m1-rk3568_defconfig ++++ b/configs/odroid-m1-rk3568_defconfig +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/orangepi-3b-rk3566_defconfig b/configs/orangepi-3b-rk3566_defconfig +index 575dc4340d3..817de7b69e6 100644 +--- a/configs/orangepi-3b-rk3566_defconfig ++++ b/configs/orangepi-3b-rk3566_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig +index 138a633f320..e0aaa8dfb15 100644 +--- a/configs/orangepi-5-plus-rk3588_defconfig ++++ b/configs/orangepi-5-plus-rk3588_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig +index 33529d4cac3..09d8475d051 100644 +--- a/configs/orangepi-5-rk3588s_defconfig ++++ b/configs/orangepi-5-rk3588s_defconfig +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig +index 2d075d12174..fcb3c474044 100644 +--- a/configs/pinetab2-rk3566_defconfig ++++ b/configs/pinetab2-rk3566_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/powkiddy-x55-rk3566_defconfig b/configs/powkiddy-x55-rk3566_defconfig +index 2360bdbe84b..afb7f3ffafb 100644 +--- a/configs/powkiddy-x55-rk3566_defconfig ++++ b/configs/powkiddy-x55-rk3566_defconfig +@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig +index 1ea8e0f40cc..a4211afb6a9 100644 +--- a/configs/quartz64-a-rk3566_defconfig ++++ b/configs/quartz64-a-rk3566_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig +index f61b2c181a1..408b63dbb08 100644 +--- a/configs/quartz64-b-rk3566_defconfig ++++ b/configs/quartz64-b-rk3566_defconfig +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig +index 06c5cff3ca5..dccc550d4ef 100644 +--- a/configs/quartzpro64-rk3588_defconfig ++++ b/configs/quartzpro64-rk3588_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig +index 48c8fcf5a66..65198e4a507 100644 +--- a/configs/radxa-cm3-io-rk3566_defconfig ++++ b/configs/radxa-cm3-io-rk3566_defconfig +@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig +index 496fee0e0a4..b726e47c3e0 100644 +--- a/configs/radxa-e25-rk3568_defconfig ++++ b/configs/radxa-e25-rk3568_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/radxa-zero-3-rk3566_defconfig b/configs/radxa-zero-3-rk3566_defconfig +index 7606edf393e..d1611a638ae 100644 +--- a/configs/radxa-zero-3-rk3566_defconfig ++++ b/configs/radxa-zero-3-rk3566_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig +index 66ac2f6d7aa..1500691419d 100644 +--- a/configs/rock-3a-rk3568_defconfig ++++ b/configs/rock-3a-rk3568_defconfig +@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock-3b-rk3568_defconfig b/configs/rock-3b-rk3568_defconfig +index 937796811a9..38d048439ed 100644 +--- a/configs/rock-3b-rk3568_defconfig ++++ b/configs/rock-3b-rk3568_defconfig +@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock-3c-rk3566_defconfig b/configs/rock-3c-rk3566_defconfig +index f44b202c8c3..488b1c4e0c3 100644 +--- a/configs/rock-3c-rk3566_defconfig ++++ b/configs/rock-3c-rk3566_defconfig +@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock-5-itx-rk3588_defconfig b/configs/rock-5-itx-rk3588_defconfig +index bb9f148692a..1d6a9e9465b 100644 +--- a/configs/rock-5-itx-rk3588_defconfig ++++ b/configs/rock-5-itx-rk3588_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig +index c09e6655f02..39602d86845 100644 +--- a/configs/rock5a-rk3588s_defconfig ++++ b/configs/rock5a-rk3588s_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig +index 80a2f2fed58..d3cc8a19cfd 100644 +--- a/configs/rock5b-rk3588_defconfig ++++ b/configs/rock5b-rk3588_defconfig +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/sige7-rk3588_defconfig b/configs/sige7-rk3588_defconfig +index d15fc09fc8d..c77919cac79 100644 +--- a/configs/sige7-rk3588_defconfig ++++ b/configs/sige7-rk3588_defconfig +@@ -13,6 +13,8 @@ CONFIG_SPL_SPI=y + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig +index 82910daf7cc..09fc6b6b6e5 100644 +--- a/configs/soquartz-blade-rk3566_defconfig ++++ b/configs/soquartz-blade-rk3566_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig +index 5744f1baa81..e5a9ee1938b 100644 +--- a/configs/soquartz-cm4-rk3566_defconfig ++++ b/configs/soquartz-cm4-rk3566_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig +index 920df9b622d..efcd3f5bc77 100644 +--- a/configs/soquartz-model-a-rk3566_defconfig ++++ b/configs/soquartz-model-a-rk3566_defconfig +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig +index 8eb1027e449..39e4946b0bf 100644 +--- a/configs/tiger-rk3588_defconfig ++++ b/configs/tiger-rk3588_defconfig +@@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig +index 12a076aeeae..c70210c0dee 100644 +--- a/configs/toybrick-rk3588_defconfig ++++ b/configs/toybrick-rk3588_defconfig +@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig +index e6e1bda7ec1..e1bf365edc8 100644 +--- a/configs/turing-rk1-rk3588_defconfig ++++ b/configs/turing-rk1-rk3588_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y +-- +2.46.1 + From 950f8e0de649f2a61bdd937a00fc67380c187f17 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Miroslav=20Such=C3=BD?= Date: Wed, 11 Sep 2024 04:33:22 +0000 Subject: [PATCH 275/351] Migrate to SPDX license (temporary ids) This is part of https://fedoraproject.org/wiki/Changes/SPDX_Licenses_Phase_4 Note that this is an SPDX identifier, but it still needs to be migrated to the proper identifiers in the fedora-license-data set. If there will be no comments in two weeks, I will merge this. --- uboot-tools.spec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index a7cc4bf..acb6f58 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -10,9 +10,9 @@ Version: 2024.10 Release: 0.6%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities -License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ +# Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. +License: GPL-2.0-or-later AND LicenseRef-Callaway-BSD AND LGPL-2.1-or-later AND LGPL-2.0-or-later URL: http://www.denx.de/wiki/U-Boot - ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards From 2605ac3cdc5da7e3d1fb3508929b9df553f5703f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 2 Oct 2024 10:30:23 +0100 Subject: [PATCH 276/351] 2024.10 RC6 --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index f50fe43..3a48403 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10-rc5.tar.bz2) = bd86b6cc780ac79fef2abca1e6b27a97312105e6a8d809d8a7f93e3665342f90352124786ec075b5a64cf6705a91ae507dff127d2062c64ecdb325e395a7b0d9 +SHA512 (u-boot-2024.10-rc6.tar.bz2) = df569020757f330dc9f25f05712f02f4f8f1e3f5219223a439519050e684bee93971d85c2eb6a014e92e6ae6a2e59dac35b91c4f8e2cfa7884a5cf0083e8a023 diff --git a/uboot-tools.spec b/uboot-tools.spec index acb6f58..4a3fae8 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc5 +%global candidate rc6 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -207,6 +207,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Oct 01 2024 Peter Robinson - 1:2024.10-0.7.rc6 +- Update to 2024.10 RC6 + * Mon Sep 16 2024 Peter Robinson - 1:2024.10-0.6.rc5 - Update to 2024.10 RC5 From 33cdd961f3534e474899fc4f1d4f3e13f29aea83 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 3 Oct 2024 18:33:04 +0100 Subject: [PATCH 277/351] Pass CMA FW setting through to kernel DT for Raspberry Pi --- ...pi-Pass-CMA-through-from-firmware-DT.patch | 32 +++++++++++++++++++ uboot-tools.spec | 7 +++- 2 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch diff --git a/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch b/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch new file mode 100644 index 0000000..aa19adf --- /dev/null +++ b/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch @@ -0,0 +1,32 @@ +From 81a2ddb6c44ff87be51201372f8ca0d84aaef6c9 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 3 Oct 2024 18:25:51 +0100 +Subject: [PATCH] board: rpi: Pass CMA through from firmware DT + +For a lot of usecases, such as display, camera, media +the Raspberry Pi needs a lot more CMA than distros +configure as default so we should pass this parameter +through so things work as expected. + +Signed-off-by: Peter Robinson +--- + board/raspberrypi/rpi/rpi.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index ab5ea85cf9f..c50eb884074 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -561,6 +561,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) + + /* address of the PHY device as provided by the firmware */ + copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg"); ++ ++ /* copy the CMA set from the firmware DT to linux */ ++ copy_property(fdt, fw_fdt, "cma", "size"); + } + + int ft_board_setup(void *blob, struct bd_info *bd) +-- +2.46.2 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 4a3fae8..8fad7dc 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -34,6 +34,8 @@ Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch Patch11: FUSB302-USB-C-controller-support.patch # QCom Patch15: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch +# RPi +Patch20: 0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch BuildRequires: bc BuildRequires: bison @@ -207,6 +209,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Thu Oct 03 2024 Peter Robinson - 1:2024.10-0.8.rc6 +- Pass CMA FW setting through to kernel DT for Raspberry Pi + * Tue Oct 01 2024 Peter Robinson - 1:2024.10-0.7.rc6 - Update to 2024.10 RC6 From 53f4c13a16c04c4c85189c94a11367a42009e554 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 11 Oct 2024 17:03:55 +0100 Subject: [PATCH 278/351] Update to 2024.10 GA Fix passing RPi firmware CMA setting to kernel DT Update Geekbox --- ...pi-Pass-CMA-through-from-firmware-DT.patch | 32 --- rockchip-Modernise-Geekbox-config.patch | 189 ++++++++++++++++++ rpi-Pass-CMA-through-from-firmware-DT.patch | 40 ++++ sources | 2 +- uboot-tools.spec | 12 +- 5 files changed, 239 insertions(+), 36 deletions(-) delete mode 100644 0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch create mode 100644 rockchip-Modernise-Geekbox-config.patch create mode 100644 rpi-Pass-CMA-through-from-firmware-DT.patch diff --git a/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch b/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch deleted file mode 100644 index aa19adf..0000000 --- a/0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 81a2ddb6c44ff87be51201372f8ca0d84aaef6c9 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 3 Oct 2024 18:25:51 +0100 -Subject: [PATCH] board: rpi: Pass CMA through from firmware DT - -For a lot of usecases, such as display, camera, media -the Raspberry Pi needs a lot more CMA than distros -configure as default so we should pass this parameter -through so things work as expected. - -Signed-off-by: Peter Robinson ---- - board/raspberrypi/rpi/rpi.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index ab5ea85cf9f..c50eb884074 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -561,6 +561,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) - - /* address of the PHY device as provided by the firmware */ - copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg"); -+ -+ /* copy the CMA set from the firmware DT to linux */ -+ copy_property(fdt, fw_fdt, "cma", "size"); - } - - int ft_board_setup(void *blob, struct bd_info *bd) --- -2.46.2 - diff --git a/rockchip-Modernise-Geekbox-config.patch b/rockchip-Modernise-Geekbox-config.patch new file mode 100644 index 0000000..ee49fcf --- /dev/null +++ b/rockchip-Modernise-Geekbox-config.patch @@ -0,0 +1,189 @@ +From 45d8808e95ddf0702ed78acde7678291ae52abdb Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 11 Oct 2024 17:14:26 +0100 +Subject: [PATCH] configs: rockchip: Modernise Geekbox config + +Modernise and move the Geekbox config to use SPL/TPL with +upstream TF-A, enable MMC/USB/Eth to make the device more +useful and work like other Rockchip devices. Update the +readme to reflect the changes to the build process. + +Signed-off-by: Peter Robinson +--- + arch/arm/dts/rk3368-geekbox-u-boot.dtsi | 10 ++++ + board/geekbuying/geekbox/README | 40 +++++++++++++- + configs/geekbox_defconfig | 71 ++++++++++++++++++++++++- + 3 files changed, 118 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi +index cfc8b9340a8..55d007f7ab8 100644 +--- a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi ++++ b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi +@@ -26,6 +26,16 @@ + bootph-all; + }; + ++&dmc { ++ bootph-all; ++ ++ rockchip,memory-schedule = ; ++ rockchip,ddr-frequency = <800000000>; ++ rockchip,ddr-speed-bin = ; ++ ++ status = "okay"; ++}; ++ + &grf { + bootph-all; + }; +diff --git a/board/geekbuying/geekbox/README b/board/geekbuying/geekbox/README +index de980f2f233..bd4d8cdd084 100644 +--- a/board/geekbuying/geekbox/README ++++ b/board/geekbuying/geekbox/README +@@ -1 +1,39 @@ +-see board/rockchip/sheep_rk3368/README ++Here is the step-by-step to boot to U-Boot on the Geekbox ++ ++Get the Source and build ATF ++============================ ++ ++ > git clone https://github.com/TrustedFirmware-A/trusted-firmware-a.git ++ > cd arm-trusted-firmware ++ > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31 ++ ++Configure U-Boot ++================ ++ ++ > cd ../u-boot ++ > export BL31=../arm-trusted-firmware/build/rk3368/release/bl31.bin ++ > make geekbox_defconfig ++ ++Build the full U-Boot/ATF firmware stack ++======================================== ++ ++ > make CROSS_COMPILE=aarch64-unknown-elf- ++ ++Flash the image ++=============== ++ ++Copy the SPL to offset 32k and the FIT image containing the payloads ++(U-Boot proper, ATF, devicetree) to offset 256k card. ++ ++eMMC ++---- ++ ++rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with ++help of the Rockchip loader binary. ++ ++ > git clone https://github.com/rockchip-linux/rkdeveloptool ++ > cd rkdeveloptool ++ > autoreconf -i && && ./configure && make ++ > git clone https://github.com/rockchip-linux/rkbin.git ++ > ./rkdeveloptool db rkbin/rk33/rk3368_loader_v2.00.256.bin ++ > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin +diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig +index 8f4be79831a..1b116fa8602 100644 +--- a/configs/geekbox_defconfig ++++ b/configs/geekbox_defconfig +@@ -3,29 +3,96 @@ CONFIG_SKIP_LOWLEVEL_INIT=y + CONFIG_COUNTER_FREQUENCY=24000000 + CONFIG_ARCH_ROCKCHIP=y + CONFIG_TEXT_BASE=0x00200000 +-CONFIG_SYS_MALLOC_F_LEN=0x1000 + CONFIG_NR_DRAM_BANKS=1 + CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y + CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 + CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" ++CONFIG_SPL_TEXT_BASE=0x00000000 + CONFIG_ROCKCHIP_RK3368=y ++CONFIG_TPL_LIBCOMMON_SUPPORT=y ++CONFIG_TPL_LIBGENERIC_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC=y ++CONFIG_SPL_STACK=0x188000 ++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y ++CONFIG_SPL_BSS_START_ADDR=0x400000 ++CONFIG_SPL_BSS_MAX_SIZE=0x20000 ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 ++CONFIG_SPL=y + CONFIG_TARGET_GEEKBOX=y + CONFIG_DEBUG_UART_BASE=0xFF690000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SYS_LOAD_ADDR=0x800800 + CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++CONFIG_SPL_BOOTROM_SUPPORT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 ++CONFIG_SPL_ATF=y ++CONFIG_TPL=y ++CONFIG_TPL_SYS_MALLOC_SIMPLE=y ++CONFIG_TPL_DRIVERS_MISC=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_CMD_USB=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_TPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" ++CONFIG_TPL_OF_PLATDATA=y ++CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_TPL_DM=y + CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_TPL_REGMAP=y + CONFIG_SYSCON=y +-CONFIG_BOUNCE_BUFFER=y ++CONFIG_SPL_SYSCON=y ++CONFIG_TPL_SYSCON=y + CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_TPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_PINCTRL=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_RGMII=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y + CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y + CONFIG_DEBUG_UART_SHIFT=2 + CONFIG_DEBUG_UART_ANNOUNCE=y + CONFIG_SYS_NS16550_MEM32=y ++CONFIG_SYSINFO=y ++CONFIG_SYSINFO_SMBIOS=y + CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_LZO=y + CONFIG_ERRNO_STR=y +-- +2.47.0 + diff --git a/rpi-Pass-CMA-through-from-firmware-DT.patch b/rpi-Pass-CMA-through-from-firmware-DT.patch new file mode 100644 index 0000000..1185095 --- /dev/null +++ b/rpi-Pass-CMA-through-from-firmware-DT.patch @@ -0,0 +1,40 @@ +From c449955f6aece3148ccf67890df1083fb3a41884 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Fri, 11 Oct 2024 12:04:10 +0100 +Subject: [PATCH] board: rpi: Pass CMA through from firmware DT + +For a lot of usecases, such as display, camera, media +the Raspberry Pi needs a lot more CMA than distros +configure as default so we should pass this parameter +through so things work as expected. Fix a spelling +mistake while we're at it. + +Signed-off-by: Peter Robinson +--- + board/raspberrypi/rpi/rpi.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index ab5ea85cf9f..dd5a318d239 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -540,12 +540,15 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) + if (fdt == fw_fdt) + return; + +- /* The firmware provides a more precie model; so copy that */ ++ /* The firmware provides a more precise model; so copy that */ + copy_property(fdt, fw_fdt, "/", "model"); + + /* memory reserve as suggested by the firmware */ + copy_property(fdt, fw_fdt, "/", "memreserve"); + ++ /* copy the CMA memory setting from the firmware DT to linux */ ++ copy_property(fdt, fw_fdt, "/reserved-memory/linux,cma", "size"); ++ + /* Adjust dma-ranges for the SD card and PCI bus as they can depend on + * the SoC revision + */ +-- +2.47.0 + diff --git a/sources b/sources index 3a48403..82c8edc 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10-rc6.tar.bz2) = df569020757f330dc9f25f05712f02f4f8f1e3f5219223a439519050e684bee93971d85c2eb6a014e92e6ae6a2e59dac35b91c4f8e2cfa7884a5cf0083e8a023 +SHA512 (u-boot-2024.10.tar.bz2) = ef817c9b5ae8dc6cd9e3f57811e90acc6a4d4394f0356aa5923e3e3c8559168f977bd5bf82824cd3650aa8e5e3c3d1b00e20818d21368151748682f1fc51152c diff --git a/uboot-tools.spec b/uboot-tools.spec index 8fad7dc..9eeb08e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc6 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2024.10 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -32,10 +32,11 @@ Patch5: enable-bootmenu-by-default.patch # Rockchips improvements Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch Patch11: FUSB302-USB-C-controller-support.patch +Patch12: rockchip-Modernise-Geekbox-config.patch # QCom Patch15: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch # RPi -Patch20: 0001-board-rpi-Pass-CMA-through-from-firmware-DT.patch +Patch20: rpi-Pass-CMA-through-from-firmware-DT.patch BuildRequires: bc BuildRequires: bison @@ -209,6 +210,11 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Fri Oct 11 2024 Peter Robinson - 1:2024.10-1 +- Update to 2024.10 GA +- Fix passing RPi firmware CMA setting to kernel DT +- Update Geekbox + * Thu Oct 03 2024 Peter Robinson - 1:2024.10-0.8.rc6 - Pass CMA FW setting through to kernel DT for Raspberry Pi From 9fb9e1ac57ec5784ff52eed70aa506f3d67cff95 Mon Sep 17 00:00:00 2001 From: Andrew Gunnerson Date: Mon, 4 Nov 2024 19:00:36 -0500 Subject: [PATCH 279/351] Install manpages for dumpimage, kwboot, and mkeficapsule Signed-off-by: Andrew Gunnerson --- uboot-tools.spec | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 9eeb08e..a63daa3 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -188,7 +188,10 @@ for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gd do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done -install -p -m 0644 doc/mkimage.1 %{buildroot}%{_mandir}/man1 +for tool in dumpimage kwboot mkeficapsule mkimage +do +install -p -m 0644 doc/$tool.1 %{buildroot}%{_mandir}/man1 +done install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} ( cd %{buildroot}%{_bindir}; ln -sf fw_printenv fw_setenv ) @@ -198,6 +201,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %doc README doc/develop/distro.rst doc/README.gpt %doc doc/develop/uefi doc/usage doc/arch/arm64.rst %{_bindir}/* +%{_mandir}/man1/dumpimage.1* +%{_mandir}/man1/kwboot.1* +%{_mandir}/man1/mkeficapsule.1* %{_mandir}/man1/mkimage.1* %if %{with toolsonly} From 139751f49cb6ae7547df1a1a4eff29e0ba0b2ffc Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 15 Oct 2024 22:33:40 +0100 Subject: [PATCH 280/351] drop unused duplicate firmwares --- uboot-tools.spec | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index a63daa3..3ebc11a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -157,7 +157,7 @@ mkdir -p %{buildroot}%{_datadir}/uboot/ %ifarch aarch64 for board in $(ls builds) do - for file in u-boot.bin u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip-spi.bin u-boot-rockchip.bin idbloader.img idbloader-spi.img spl/boot.bin + for file in u-boot.bin u-boot.img u-boot-dtb.img u-boot-sunxi-with-spl.bin u-boot-rockchip-spi.bin u-boot-rockchip.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -pD -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/$(echo $file) @@ -165,6 +165,10 @@ do done done +# Just for xilinx_zynqmp_virt +install -pD -m 0644 builds/xilinx_zynqmp_virt/u-boot.itb %{buildroot}%{_datadir}/uboot/xilinx_zynqmp_virt/u-boot.itb +install -pD -m 0644 builds/xilinx_zynqmp_virt/spl/boot.bin %{buildroot}%{_datadir}/uboot/xilinx_zynqmp_virt/boot.bin + # For Apple M-series we also need the nodtb variant install -pD -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin From 357edb992292e9e396ed885a288dc42b1b72c763 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 31 Dec 2024 15:12:02 +0000 Subject: [PATCH 281/351] 2025.01 RC6 --- FUSB302-USB-C-controller-support.patch | 6018 ----------------- ...support-for-SC7280-and-the-RB3-Gen-2.patch | 1414 ---- aarch64-boards | 2 + ...hip-Enable-preboot-start-for-pci-usb.patch | 596 +- ...identifiers-for-the-new-RPi-5-series.patch | 43 + rpi-Pass-CMA-through-from-firmware-DT.patch | 40 - sources | 2 +- uboot-tools.spec | 23 +- ..._location-for-finding-the-DT-on-disk.patch | 32 +- 9 files changed, 365 insertions(+), 7805 deletions(-) delete mode 100644 FUSB302-USB-C-controller-support.patch delete mode 100644 Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch create mode 100644 rpi-Add-identifiers-for-the-new-RPi-5-series.patch delete mode 100644 rpi-Pass-CMA-through-from-firmware-DT.patch diff --git a/FUSB302-USB-C-controller-support.patch b/FUSB302-USB-C-controller-support.patch deleted file mode 100644 index a25f8dd..0000000 --- a/FUSB302-USB-C-controller-support.patch +++ /dev/null @@ -1,6018 +0,0 @@ -From patchwork Thu Sep 5 15:08:37 2024 -Content-Type: text/plain; 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- Thu, 5 Sep 2024 17:17:07 +0200 (CEST) -Received: by jupiter.universe (Postfix, from userid 1000) - id 9F52C4800EB; Thu, 05 Sep 2024 17:17:07 +0200 (CEST) -From: Sebastian Reichel -To: Marek Vasut , u-boot@lists.denx.de, - Jonas Karlman , Soeren Moch -Cc: Eugen Hristev , - Tim Harvey , Kever Yang , - Philipp Tomsich , Simon Glass , - Sebastian Reichel -Subject: [PATCH v6 1/6] usb: tcpm: add core framework -Date: Thu, 5 Sep 2024 17:08:37 +0200 -Message-ID: <20240905151707.59101-2-sebastian.reichel@collabora.com> -X-Mailer: git-send-email 2.45.2 -In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> -References: <20240905151707.59101-1-sebastian.reichel@collabora.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -This adds TCPM framework in preparation for fusb302 support, which can -handle USB power delivery messages. This is needed to solve issues with -devices, that are running from a USB-C port supporting USB-PD, but not -having a battery. - -Such a device currently boots to the kernel without interacting with -the power-supply at all. If there are no USB-PD message replies within -5 seconds, the power-supply assumes the peripheral is not capable of -USB-PD. It usually takes more than 5 seconds for the system to reach -the kernel and probe the I2C based fusb302 chip driver. Thus the -system always runs into this state. The power-supply's solution to -fix this error state is a hard reset, which involves removing the -power from VBUS. Boards without a battery (or huge capacitors) will -reset at this point resulting in a boot loop. - -This imports the TCPM framework from the kernel. The porting has -originally been done by Rockchip using hardware timers and the Linux -kernel's TCPM code from some years ago. - -I had a look at upgrading to the latest TCPM kernel code, but that -beast became a lot more complex due to adding more USB-C features. -I believe these features are not needed in U-Boot and with multiple -kthreads and hrtimers being involved it is non-trivial to port them. -Instead I worked on stripping down features from the Rockchip port -to an even more basic level. Also the TCPM code has been reworked -to avoid complete use of any timers (Rockchip used SoC specific -hardware timers + IRQ to implement delayed work mechanism). Instead -the delayed state changes are handled directly from the poll loop. - -Note, that (in contrast to the original Rockchip port) the state -machine has the same hard reset quirk, that the kernel has - i.e. -it avoids disabling the CC pin resistors for devices that are not -self-powered. Without that quirk, the Radxa Rock 5B will not just -end up doing a machine reset when a hard reset is triggered, but will -not even recover, because the CPU will loose power and the FUSB302 -will keep this state because of leak voltage arriving through the RX -serial pin (assuming a serial adapter is connected). - -This also includes a 'tcpm' command, which can be used to get -information about the current state and the negotiated voltage -and current. - -Co-developed-by: Wang Jie -Signed-off-by: Wang Jie -Tested-by: Soeren Moch -Signed-off-by: Sebastian Reichel ---- - Makefile | 1 + - cmd/Kconfig | 7 + - cmd/Makefile | 1 + - cmd/tcpm.c | 136 ++ - doc/usage/cmd/tcpm.rst | 66 + - doc/usage/index.rst | 1 + - drivers/usb/Kconfig | 2 + - drivers/usb/tcpm/Kconfig | 8 + - drivers/usb/tcpm/Makefile | 3 + - drivers/usb/tcpm/tcpm-internal.h | 173 +++ - drivers/usb/tcpm/tcpm-uclass.c | 149 ++ - drivers/usb/tcpm/tcpm.c | 2288 ++++++++++++++++++++++++++++++ - include/dm/uclass-id.h | 1 + - include/usb/pd.h | 516 +++++++ - include/usb/tcpm.h | 99 ++ - 15 files changed, 3451 insertions(+) - create mode 100644 cmd/tcpm.c - create mode 100644 doc/usage/cmd/tcpm.rst - create mode 100644 drivers/usb/tcpm/Kconfig - create mode 100644 drivers/usb/tcpm/Makefile - create mode 100644 drivers/usb/tcpm/tcpm-internal.h - create mode 100644 drivers/usb/tcpm/tcpm-uclass.c - create mode 100644 drivers/usb/tcpm/tcpm.c - create mode 100644 include/usb/pd.h - create mode 100644 include/usb/tcpm.h - -diff --git a/Makefile b/Makefile -index 74df5d177c1f..5a581199c170 100644 ---- a/Makefile -+++ b/Makefile -@@ -879,6 +879,7 @@ libs-y += drivers/usb/musb/ - libs-y += drivers/usb/musb-new/ - libs-y += drivers/usb/isp1760/ - libs-y += drivers/usb/phy/ -+libs-y += drivers/usb/tcpm/ - libs-y += drivers/usb/ulpi/ - ifdef CONFIG_POST - libs-y += post/ -diff --git a/cmd/Kconfig b/cmd/Kconfig -index 978f44eda426..7710bee22ace 100644 ---- a/cmd/Kconfig -+++ b/cmd/Kconfig -@@ -221,6 +221,13 @@ config CMD_REGINFO - help - Register dump - -+config CMD_TCPM -+ bool "tcpm" -+ depends on TYPEC_TCPM -+ help -+ Show voltage and current negotiated via USB PD as well as the -+ current state of the Type C Port Manager (TCPM) state machine. -+ - config CMD_TLV_EEPROM - bool "tlv_eeprom" - depends on I2C_EEPROM -diff --git a/cmd/Makefile b/cmd/Makefile -index 87133cc27a8a..bd0b23ef1013 100644 ---- a/cmd/Makefile -+++ b/cmd/Makefile -@@ -172,6 +172,7 @@ obj-$(CONFIG_CMD_SMBIOS) += smbios.o - obj-$(CONFIG_CMD_SMC) += smccc.o - obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o - obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o -+obj-$(CONFIG_CMD_TCPM) += tcpm.o - obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o - obj-$(CONFIG_CMD_TERMINAL) += terminal.o - obj-$(CONFIG_CMD_TIME) += time.o -diff --git a/cmd/tcpm.c b/cmd/tcpm.c -new file mode 100644 -index 000000000000..962cd234a869 ---- /dev/null -+++ b/cmd/tcpm.c -@@ -0,0 +1,136 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2024 Collabora -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define LIMIT_DEV 32 -+#define LIMIT_PARENT 20 -+ -+static struct udevice *currdev; -+ -+static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+{ -+ char *name; -+ int ret = -ENODEV; -+ -+ switch (argc) { -+ case 2: -+ name = argv[1]; -+ ret = tcpm_get(name, &currdev); -+ if (ret) { -+ log_err("Can't get TCPM %s: %d (%s)!\n", name, ret, errno_str(ret)); -+ return CMD_RET_FAILURE; -+ } -+ case 1: -+ if (!currdev) { -+ log_err("TCPM device is not set!\n\n"); -+ return CMD_RET_USAGE; -+ } -+ -+ printf("dev: %d @ %s\n", dev_seq(currdev), currdev->name); -+ } -+ -+ return CMD_RET_SUCCESS; -+} -+ -+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ struct udevice *dev; -+ int ret, err = 0; -+ -+ printf("| %-*.*s| %-*.*s| %s @ %s\n", -+ LIMIT_DEV, LIMIT_DEV, "Name", -+ LIMIT_PARENT, LIMIT_PARENT, "Parent name", -+ "Parent uclass", "seq"); -+ -+ for (ret = uclass_first_device_check(UCLASS_TCPM, &dev); dev; -+ ret = uclass_next_device_check(&dev)) { -+ if (ret) -+ err = ret; -+ -+ printf("| %-*.*s| %-*.*s| %s @ %d | status: %i\n", -+ LIMIT_DEV, LIMIT_DEV, dev->name, -+ LIMIT_PARENT, LIMIT_PARENT, dev->parent->name, -+ dev_get_uclass_name(dev->parent), dev_seq(dev->parent), -+ ret); -+ } -+ -+ if (err) -+ return CMD_RET_FAILURE; -+ -+ return CMD_RET_SUCCESS; -+} -+ -+int do_print_info(struct udevice *dev) -+{ -+ enum typec_orientation orientation = tcpm_get_orientation(dev); -+ const char *state = tcpm_get_state(dev); -+ int pd_rev = tcpm_get_pd_rev(dev); -+ int mv = tcpm_get_voltage(dev); -+ int ma = tcpm_get_current(dev); -+ enum typec_role pwr_role = tcpm_get_pwr_role(dev); -+ enum typec_data_role data_role = tcpm_get_data_role(dev); -+ bool connected = tcpm_is_connected(dev); -+ -+ if (!connected) { -+ printf("TCPM State: %s\n", state); -+ return 0; -+ } -+ -+ printf("Orientation: %s\n", typec_orientation_name[orientation]); -+ printf("PD Revision: %s\n", typec_pd_rev_name[pd_rev]); -+ printf("Power Role: %s\n", typec_role_name[pwr_role]); -+ printf("Data Role: %s\n", typec_data_role_name[data_role]); -+ printf("Voltage: %2d.%03d V\n", mv / 1000, mv % 1000); -+ printf("Current: %2d.%03d A\n", ma / 1000, ma % 1000); -+ -+ return 0; -+} -+ -+static int do_info(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ if (!currdev) { -+ printf("First, set the TCPM device!\n"); -+ return CMD_RET_USAGE; -+ } -+ -+ return do_print_info(currdev); -+} -+ -+static struct cmd_tbl subcmd[] = { -+ U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""), -+ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""), -+ U_BOOT_CMD_MKENT(info, 1, 1, do_info, "", ""), -+}; -+ -+static int do_tcpm(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ struct cmd_tbl *cmd; -+ -+ argc--; -+ argv++; -+ -+ cmd = find_cmd_tbl(argv[0], subcmd, ARRAY_SIZE(subcmd)); -+ if (!cmd || argc > cmd->maxargs) -+ return CMD_RET_USAGE; -+ -+ return cmd->cmd(cmdtp, flag, argc, argv); -+} -+ -+ /**************************************************/ -+ -+U_BOOT_CMD(tcpm, CONFIG_SYS_MAXARGS, 1, do_tcpm, -+ "TCPM sub-system", -+ "list - list TCPM devices\n" -+ "tcpm dev [name] - show or [set] operating TCPM device\n" -+ "tcpm info - dump information\n" -+); -diff --git a/doc/usage/cmd/tcpm.rst b/doc/usage/cmd/tcpm.rst -new file mode 100644 -index 000000000000..1e8199c0f89c ---- /dev/null -+++ b/doc/usage/cmd/tcpm.rst -@@ -0,0 +1,66 @@ -+.. SPDX-License-Identifier: GPL-2.0+: -+ -+.. index:: -+ single: tcpm (command) -+ -+tcpm command -+============ -+ -+Synopsis -+-------- -+ -+:: -+ -+ tcpm dev [devname] -+ tcpm info -+ tcpm list -+ -+Description -+----------- -+ -+The tcpm command is used to control USB-PD controllers, also known as TypeC Port Manager (TCPM). -+ -+The 'tcpm dev' command shows or set current TCPM device. -+ -+ devname -+ device name to change -+ -+The 'tcpm info' command displays the current state of the device -+ -+The 'tcpm list' command displays the list available devices. -+ -+Examples -+-------- -+ -+The 'tcpm info' command displays device's status: -+:: -+ -+ => tcpm info -+ Orientation: normal -+ PD Revision: rev3 -+ Power Role: sink -+ Data Role: device -+ Voltage: 20.000 V -+ Current: 2.250 A -+ -+The current device can be shown or set via 'tcpm dev' command: -+:: -+ -+ => tcpm dev -+ TCPM device is not set! -+ => tcpm dev usb-typec@22 -+ dev: 0 @ usb-typec@22 -+ => tcpm dev -+ dev: 0 @ usb-typec@22 -+ -+The list of available devices can be shown via 'tcpm list' command: -+:: -+ -+ => tcpm list -+ | Name | Parent name | Parent uclass @ seq -+ | usb-typec@22 | i2c@feac0000 | i2c @ 4 | status: 0 -+ -+Configuration -+------------- -+ -+The tcpm command is only available if CONFIG_CMD_TCPM=y. -diff --git a/doc/usage/index.rst b/doc/usage/index.rst -index 6a218c46b4e4..b4be42f59119 100644 ---- a/doc/usage/index.rst -+++ b/doc/usage/index.rst -@@ -111,6 +111,7 @@ Shell commands - cmd/smbios - cmd/sound - cmd/source -+ cmd/tcpm - cmd/temperature - cmd/tftpput - cmd/trace -diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig -index a972d87c7ad4..985d3a9ef7e6 100644 ---- a/drivers/usb/Kconfig -+++ b/drivers/usb/Kconfig -@@ -85,6 +85,8 @@ source "drivers/usb/emul/Kconfig" - - source "drivers/usb/phy/Kconfig" - -+source "drivers/usb/tcpm/Kconfig" -+ - source "drivers/usb/ulpi/Kconfig" - - if USB_HOST -diff --git a/drivers/usb/tcpm/Kconfig b/drivers/usb/tcpm/Kconfig -new file mode 100644 -index 000000000000..55bf8e202b90 ---- /dev/null -+++ b/drivers/usb/tcpm/Kconfig -@@ -0,0 +1,8 @@ -+# SPDX-License-Identifier: GPL-2.0 -+ -+config TYPEC_TCPM -+ tristate "USB Type-C Port Controller Manager" -+ depends on DM -+ help -+ The Type-C Port Controller Manager provides a USB PD and USB Type-C -+ state machine for use with Type-C Port Controllers. -diff --git a/drivers/usb/tcpm/Makefile b/drivers/usb/tcpm/Makefile -new file mode 100644 -index 000000000000..a0f76436f3fd ---- /dev/null -+++ b/drivers/usb/tcpm/Makefile -@@ -0,0 +1,3 @@ -+# SPDX-License-Identifier: GPL-2.0 -+ -+obj-$(CONFIG_TYPEC_TCPM) += tcpm.o tcpm-uclass.o -diff --git a/drivers/usb/tcpm/tcpm-internal.h b/drivers/usb/tcpm/tcpm-internal.h -new file mode 100644 -index 000000000000..561442090027 ---- /dev/null -+++ b/drivers/usb/tcpm/tcpm-internal.h -@@ -0,0 +1,173 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+/* -+ * Copyright 2015-2017 Google, Inc -+ * Copyright 2024 Collabora -+ */ -+ -+#ifndef __LINUX_USB_TCPM_INTERNAL_H -+#define __LINUX_USB_TCPM_INTERNAL_H -+ -+#define FOREACH_TCPM_STATE(S) \ -+ S(INVALID_STATE), \ -+ S(TOGGLING), \ -+ S(SRC_UNATTACHED), \ -+ S(SRC_ATTACH_WAIT), \ -+ S(SRC_ATTACHED), \ -+ S(SRC_STARTUP), \ -+ S(SRC_SEND_CAPABILITIES), \ -+ S(SRC_SEND_CAPABILITIES_TIMEOUT), \ -+ S(SRC_NEGOTIATE_CAPABILITIES), \ -+ S(SRC_TRANSITION_SUPPLY), \ -+ S(SRC_READY), \ -+ S(SRC_WAIT_NEW_CAPABILITIES), \ -+ \ -+ S(SNK_UNATTACHED), \ -+ S(SNK_ATTACH_WAIT), \ -+ S(SNK_DEBOUNCED), \ -+ S(SNK_ATTACHED), \ -+ S(SNK_STARTUP), \ -+ S(SNK_DISCOVERY), \ -+ S(SNK_DISCOVERY_DEBOUNCE), \ -+ S(SNK_DISCOVERY_DEBOUNCE_DONE), \ -+ S(SNK_WAIT_CAPABILITIES), \ -+ S(SNK_NEGOTIATE_CAPABILITIES), \ -+ S(SNK_TRANSITION_SINK), \ -+ S(SNK_TRANSITION_SINK_VBUS), \ -+ S(SNK_READY), \ -+ \ -+ S(HARD_RESET_SEND), \ -+ S(HARD_RESET_START), \ -+ S(SRC_HARD_RESET_VBUS_OFF), \ -+ S(SRC_HARD_RESET_VBUS_ON), \ -+ S(SNK_HARD_RESET_SINK_OFF), \ -+ S(SNK_HARD_RESET_WAIT_VBUS), \ -+ S(SNK_HARD_RESET_SINK_ON), \ -+ \ -+ S(SOFT_RESET), \ -+ S(SOFT_RESET_SEND), \ -+ \ -+ S(DR_SWAP_ACCEPT), \ -+ S(DR_SWAP_CHANGE_DR), \ -+ \ -+ S(ERROR_RECOVERY), \ -+ S(PORT_RESET), \ -+ S(PORT_RESET_WAIT_OFF) -+ -+#define GENERATE_TCPM_ENUM(e) e -+#define GENERATE_TCPM_STRING(s) #s -+#define TCPM_POLL_EVENT_TIME_OUT 2000 -+ -+enum tcpm_state { -+ FOREACH_TCPM_STATE(GENERATE_TCPM_ENUM) -+}; -+ -+enum pd_msg_request { -+ PD_MSG_NONE = 0, -+ PD_MSG_CTRL_REJECT, -+ PD_MSG_CTRL_WAIT, -+ PD_MSG_CTRL_NOT_SUPP, -+ PD_MSG_DATA_SINK_CAP, -+ PD_MSG_DATA_SOURCE_CAP, -+}; -+ -+struct tcpm_port { -+ enum typec_port_type typec_type; -+ int typec_prefer_role; -+ -+ enum typec_role vconn_role; -+ enum typec_role pwr_role; -+ enum typec_data_role data_role; -+ -+ struct typec_partner *partner; -+ -+ enum typec_cc_status cc_req; -+ enum typec_cc_status cc1; -+ enum typec_cc_status cc2; -+ enum typec_cc_polarity polarity; -+ -+ bool attached; -+ bool connected; -+ int poll_event_cnt; -+ enum typec_port_type port_type; -+ -+ /* -+ * Set to true when vbus is greater than VSAFE5V min. -+ * Set to false when vbus falls below vSinkDisconnect max threshold. -+ */ -+ bool vbus_present; -+ -+ /* -+ * Set to true when vbus is less than VSAFE0V max. -+ * Set to false when vbus is greater than VSAFE0V max. -+ */ -+ bool vbus_vsafe0v; -+ -+ bool vbus_never_low; -+ bool vbus_source; -+ bool vbus_charge; -+ -+ int try_role; -+ -+ enum pd_msg_request queued_message; -+ -+ enum tcpm_state enter_state; -+ enum tcpm_state prev_state; -+ enum tcpm_state state; -+ enum tcpm_state delayed_state; -+ unsigned long delay_ms; -+ -+ bool state_machine_running; -+ -+ bool tx_complete; -+ enum tcpm_transmit_status tx_status; -+ -+ unsigned int negotiated_rev; -+ unsigned int message_id; -+ unsigned int caps_count; -+ unsigned int hard_reset_count; -+ bool pd_capable; -+ bool explicit_contract; -+ unsigned int rx_msgid; -+ -+ /* Partner capabilities/requests */ -+ u32 sink_request; -+ u32 source_caps[PDO_MAX_OBJECTS]; -+ unsigned int nr_source_caps; -+ u32 sink_caps[PDO_MAX_OBJECTS]; -+ unsigned int nr_sink_caps; -+ -+ /* -+ * whether to wait for the Type-C device to send the DR_SWAP Message flag -+ * For Type-C device with Dual-Role Power and Dual-Role Data, the port side -+ * is used as sink + ufp, then the tcpm framework needs to wait for Type-C -+ * device to initiate DR_swap Message. -+ */ -+ bool wait_dr_swap_message; -+ -+ /* Local capabilities */ -+ u32 src_pdo[PDO_MAX_OBJECTS]; -+ unsigned int nr_src_pdo; -+ u32 snk_pdo[PDO_MAX_OBJECTS]; -+ unsigned int nr_snk_pdo; -+ -+ unsigned int operating_snk_mw; -+ bool update_sink_caps; -+ -+ /* Requested current / voltage to the port partner */ -+ u32 req_current_limit; -+ u32 req_supply_voltage; -+ /* Actual current / voltage limit of the local port */ -+ u32 current_limit; -+ u32 supply_voltage; -+ -+ /* port belongs to a self powered device */ -+ bool self_powered; -+ -+ unsigned long delay_target; -+}; -+ -+extern const char * const tcpm_states[]; -+ -+int tcpm_post_probe(struct udevice *dev); -+ -+#endif -diff --git a/drivers/usb/tcpm/tcpm-uclass.c b/drivers/usb/tcpm/tcpm-uclass.c -new file mode 100644 -index 000000000000..92f9eff1ada6 ---- /dev/null -+++ b/drivers/usb/tcpm/tcpm-uclass.c -@@ -0,0 +1,149 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2024 Collabora Ltd. -+ * -+ * USB Power Delivery protocol stack. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "tcpm-internal.h" -+ -+int tcpm_get_voltage(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->supply_voltage; -+} -+ -+int tcpm_get_current(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->current_limit; -+} -+ -+enum typec_orientation tcpm_get_orientation(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ switch (port->polarity) { -+ case TYPEC_POLARITY_CC1: -+ return TYPEC_ORIENTATION_NORMAL; -+ case TYPEC_POLARITY_CC2: -+ return TYPEC_ORIENTATION_REVERSE; -+ default: -+ return TYPEC_ORIENTATION_NONE; -+ } -+} -+ -+const char *tcpm_get_state(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return tcpm_states[port->state]; -+} -+ -+int tcpm_get_pd_rev(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->negotiated_rev; -+} -+ -+enum typec_role tcpm_get_pwr_role(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->pwr_role; -+} -+ -+enum typec_data_role tcpm_get_data_role(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->data_role; -+} -+ -+bool tcpm_is_connected(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return port->connected; -+} -+ -+int tcpm_get(const char *name, struct udevice **devp) -+{ -+ return uclass_get_device_by_name(UCLASS_TCPM, name, devp); -+} -+ -+static int tcpm_post_bind(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ const char *cap_str; -+ ofnode node; -+ int ret; -+ -+ /* -+ * USB Power Delivery (USB PD) specification requires, that communication -+ * with a sink happens within roughly 5 seconds. Otherwise the source -+ * might assume that the sink does not support USB PD. Starting to do -+ * USB PD communication after that results in a hard reset, which briefly -+ * removes any power from the USB-C port. -+ * -+ * On systems with alternative power supplies this is not an issue, but -+ * systems, which get soleley powered through their USB-C port will end -+ * up losing their power supply and doing a board level reset. The hard -+ * reset will also restart the 5 second timeout. That means a operating -+ * system initializing USB PD will put the system into a boot loop when -+ * it takes more than 5 seconds from cold boot to the operating system -+ * starting to transmit USB PD messages. -+ * -+ * The issue can be avoided by doing the initial USB PD communication -+ * in U-Boot. The operating system can then re-negotiate by doing a -+ * soft reset, which does not trigger removal of the supply voltage. -+ * -+ * Since the TCPM state machine is quite complex and depending on the -+ * remote side can take quite some time to finish, this tries to limit -+ * the automatic probing to systems probably relying on power being -+ * provided by the USB-C port(s): -+ * -+ * 1. self-powered devices won't reset when the USB-C port looses power -+ * 2. if the power is allowed to go into anything else than sink mode -+ * it is not the only power source -+ */ -+ ret = drvops->get_connector_node(dev, &node); -+ if (ret) -+ return ret; -+ -+ if (ofnode_read_bool(node, "self-powered")) -+ return 0; -+ -+ cap_str = ofnode_read_string(node, "power-role"); -+ if (!cap_str) -+ return -EINVAL; -+ -+ if (strcmp("sink", cap_str)) -+ return 0; -+ -+ /* Do not auto-probe PD controller when PD is disabled */ -+ if (ofnode_read_bool(node, "pd-disable")) -+ return 0; -+ -+ dev_info(dev, "probing Type-C port manager..."); -+ -+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); -+ -+ return 0; -+} -+ -+UCLASS_DRIVER(tcpm) = { -+ .id = UCLASS_TCPM, -+ .name = "tcpm", -+ .per_device_plat_auto = sizeof(struct tcpm_port), -+ .post_bind = tcpm_post_bind, -+ .post_probe = tcpm_post_probe, -+}; -diff --git a/drivers/usb/tcpm/tcpm.c b/drivers/usb/tcpm/tcpm.c -new file mode 100644 -index 000000000000..0aee57cb2f4a ---- /dev/null -+++ b/drivers/usb/tcpm/tcpm.c -@@ -0,0 +1,2288 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2015-2017 Google, Inc -+ * -+ * USB Power Delivery protocol stack. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "tcpm-internal.h" -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+const char * const tcpm_states[] = { -+ FOREACH_TCPM_STATE(GENERATE_TCPM_STRING) -+}; -+ -+const char * const typec_pd_rev_name[] = { -+ [PD_REV10] = "rev1", -+ [PD_REV20] = "rev2", -+ [PD_REV30] = "rev3", -+}; -+ -+const char * const typec_role_name[] = { -+ [TYPEC_SINK] = "sink", -+ [TYPEC_SOURCE] = "source", -+}; -+ -+const char * const typec_data_role_name[] = { -+ [TYPEC_DEVICE] = "device", -+ [TYPEC_HOST] = "host", -+}; -+ -+const char * const typec_orientation_name[] = { -+ [TYPEC_ORIENTATION_NONE] = "none", -+ [TYPEC_ORIENTATION_NORMAL] = "normal", -+ [TYPEC_ORIENTATION_REVERSE] = "reverse", -+}; -+ -+const char * const typec_cc_status_name[] = { -+ [TYPEC_CC_OPEN] = "open", -+ [TYPEC_CC_RA] = "ra", -+ [TYPEC_CC_RD] = "rd", -+ [TYPEC_CC_RP_DEF] = "rp-def", -+ [TYPEC_CC_RP_1_5] = "rp-1.5", -+ [TYPEC_CC_RP_3_0] = "rp-3.0", -+}; -+ -+static inline bool tcpm_cc_is_sink(enum typec_cc_status cc) -+{ -+ return cc == TYPEC_CC_RP_DEF || -+ cc == TYPEC_CC_RP_1_5 || -+ cc == TYPEC_CC_RP_3_0; -+} -+ -+static inline bool tcpm_port_is_sink(struct tcpm_port *port) -+{ -+ bool cc1_is_snk = tcpm_cc_is_sink(port->cc1); -+ bool cc2_is_snk = tcpm_cc_is_sink(port->cc2); -+ -+ return (cc1_is_snk && !cc2_is_snk) || -+ (cc2_is_snk && !cc1_is_snk); -+} -+ -+static inline bool tcpm_cc_is_source(enum typec_cc_status cc) -+{ -+ return cc == TYPEC_CC_RD; -+} -+ -+static inline bool tcpm_port_is_source(struct tcpm_port *port) -+{ -+ bool cc1_is_src = tcpm_cc_is_source(port->cc1); -+ bool cc2_is_src = tcpm_cc_is_source(port->cc2); -+ -+ return (cc1_is_src && !cc2_is_src) || -+ (cc2_is_src && !cc1_is_src); -+} -+ -+static inline bool tcpm_try_src(struct tcpm_port *port) -+{ -+ return port->try_role == TYPEC_SOURCE && -+ port->port_type == TYPEC_PORT_DRP; -+} -+ -+static inline void tcpm_reset_event_cnt(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ port->poll_event_cnt = 0; -+} -+ -+static enum tcpm_state tcpm_default_state(struct tcpm_port *port) -+{ -+ if (port->port_type == TYPEC_PORT_DRP) { -+ if (port->try_role == TYPEC_SINK) -+ return SNK_UNATTACHED; -+ else if (port->try_role == TYPEC_SOURCE) -+ return SRC_UNATTACHED; -+ } else if (port->port_type == TYPEC_PORT_SNK) { -+ return SNK_UNATTACHED; -+ } -+ return SRC_UNATTACHED; -+} -+ -+static bool tcpm_port_is_disconnected(struct tcpm_port *port) -+{ -+ return (!port->attached && port->cc1 == TYPEC_CC_OPEN && -+ port->cc2 == TYPEC_CC_OPEN) || -+ (port->attached && ((port->polarity == TYPEC_POLARITY_CC1 && -+ port->cc1 == TYPEC_CC_OPEN) || -+ (port->polarity == TYPEC_POLARITY_CC2 && -+ port->cc2 == TYPEC_CC_OPEN))); -+} -+ -+static void tcpm_set_cc(struct udevice *dev, enum typec_cc_status cc) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ dev_dbg(dev, "TCPM: set cc = %d\n", cc); -+ port->cc_req = cc; -+ drvops->set_cc(dev, cc); -+} -+ -+/* -+ * Determine RP value to set based on maximum current supported -+ * by a port if configured as source. -+ * Returns CC value to report to link partner. -+ */ -+static enum typec_cc_status tcpm_rp_cc(struct tcpm_port *port) -+{ -+ const u32 *src_pdo = port->src_pdo; -+ int nr_pdo = port->nr_src_pdo; -+ int i; -+ -+ /* -+ * Search for first entry with matching voltage. -+ * It should report the maximum supported current. -+ */ -+ for (i = 0; i < nr_pdo; i++) { -+ const u32 pdo = src_pdo[i]; -+ -+ if (pdo_type(pdo) == PDO_TYPE_FIXED && -+ pdo_fixed_voltage(pdo) == 5000) { -+ unsigned int curr = pdo_max_current(pdo); -+ -+ if (curr >= 3000) -+ return TYPEC_CC_RP_3_0; -+ else if (curr >= 1500) -+ return TYPEC_CC_RP_1_5; -+ return TYPEC_CC_RP_DEF; -+ } -+ } -+ -+ return TYPEC_CC_RP_DEF; -+} -+ -+static void tcpm_check_and_run_delayed_work(struct udevice *dev); -+ -+static bool tcpm_transmit_helper(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ drvops->poll_event(dev); -+ udelay(500); -+ tcpm_check_and_run_delayed_work(dev); -+ return port->tx_complete; -+} -+ -+static int tcpm_pd_transmit(struct udevice *dev, -+ enum tcpm_transmit_type type, -+ const struct pd_message *msg) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ u32 timeout_us = PD_T_TCPC_TX_TIMEOUT * 1000; -+ bool tx_complete; -+ int ret; -+ -+ if (msg) -+ dev_dbg(dev, "TCPM: PD TX, header: %#x\n", -+ le16_to_cpu(msg->header)); -+ else -+ dev_dbg(dev, "TCPM: PD TX, type: %#x\n", type); -+ -+ port->tx_complete = false; -+ ret = drvops->pd_transmit(dev, type, msg, port->negotiated_rev); -+ if (ret < 0) -+ return ret; -+ -+ /* -+ * At this point we basically need to block until the TCPM controller -+ * returns successful transmission. Since this is usually done using -+ * the generic interrupt status bits, we poll for any events. That -+ * will clear the interrupt status, so we also need to process any -+ * of the incoming events. This means we will do more processing and -+ * thus let's give everything a bit more time. -+ */ -+ timeout_us *= 5; -+ ret = read_poll_timeout(tcpm_transmit_helper, tx_complete, -+ !tx_complete, false, timeout_us, dev); -+ if (ret < 0) { -+ dev_err(dev, "TCPM: PD transmit data failed: %d\n", ret); -+ return ret; -+ } -+ -+ switch (port->tx_status) { -+ case TCPC_TX_SUCCESS: -+ port->message_id = (port->message_id + 1) & PD_HEADER_ID_MASK; -+ break; -+ case TCPC_TX_DISCARDED: -+ ret = -EAGAIN; -+ break; -+ case TCPC_TX_FAILED: -+ default: -+ ret = -EIO; -+ break; -+ } -+ -+ return ret; -+} -+ -+void tcpm_pd_transmit_complete(struct udevice *dev, -+ enum tcpm_transmit_status status) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ dev_dbg(dev, "TCPM: PD TX complete, status: %u\n", status); -+ tcpm_reset_event_cnt(dev); -+ port->tx_status = status; -+ port->tx_complete = true; -+} -+ -+static int tcpm_set_polarity(struct udevice *dev, -+ enum typec_cc_polarity polarity) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ int ret; -+ -+ dev_dbg(dev, "TCPM: set polarity = %d\n", polarity); -+ -+ if (drvops->set_polarity) { -+ ret = drvops->set_polarity(dev, polarity); -+ if (ret < 0) -+ return ret; -+ } -+ -+ port->polarity = polarity; -+ -+ return 0; -+} -+ -+static int tcpm_set_vconn(struct udevice *dev, bool enable) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ dev_dbg(dev, "TCPM: set vconn = %d\n", enable); -+ -+ ret = drvops->set_vconn(dev, enable); -+ if (!ret) -+ port->vconn_role = enable ? TYPEC_SOURCE : TYPEC_SINK; -+ -+ return ret; -+} -+ -+static inline u32 tcpm_get_current_limit(struct tcpm_port *port) -+{ -+ switch (port->polarity ? port->cc2 : port->cc1) { -+ case TYPEC_CC_RP_1_5: -+ return 1500; -+ case TYPEC_CC_RP_3_0: -+ return 3000; -+ case TYPEC_CC_RP_DEF: -+ default: -+ return 0; -+ } -+} -+ -+static int tcpm_set_current_limit(struct udevice *dev, u32 max_ma, u32 mv) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret = -EOPNOTSUPP; -+ -+ dev_info(dev, "TCPM: set voltage limit = %u mV\n", mv); -+ dev_info(dev, "TCPM: set current limit = %u mA\n", max_ma); -+ -+ port->supply_voltage = mv; -+ port->current_limit = max_ma; -+ -+ return ret; -+} -+ -+static int tcpm_set_attached_state(struct udevice *dev, bool attached) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ return drvops->set_roles(dev, attached, port->pwr_role, -+ port->data_role); -+} -+ -+static int tcpm_set_roles(struct udevice *dev, bool attached, -+ enum typec_role role, enum typec_data_role data) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ ret = drvops->set_roles(dev, attached, role, data); -+ if (ret < 0) -+ return ret; -+ -+ port->pwr_role = role; -+ port->data_role = data; -+ -+ return 0; -+} -+ -+static int tcpm_pd_send_source_caps(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ struct pd_message msg; -+ int i; -+ -+ memset(&msg, 0, sizeof(msg)); -+ -+ if (!port->nr_src_pdo) { -+ /* No source capabilities defined, sink only */ -+ msg.header = PD_HEADER_LE(PD_CTRL_REJECT, -+ port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, 0); -+ } else { -+ msg.header = PD_HEADER_LE(PD_DATA_SOURCE_CAP, -+ port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, -+ port->nr_src_pdo); -+ } -+ -+ for (i = 0; i < port->nr_src_pdo; i++) -+ msg.payload[i] = cpu_to_le32(port->src_pdo[i]); -+ -+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); -+} -+ -+static int tcpm_pd_send_sink_caps(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ struct pd_message msg; -+ unsigned int i; -+ -+ memset(&msg, 0, sizeof(msg)); -+ -+ if (!port->nr_snk_pdo) { -+ /* No sink capabilities defined, source only */ -+ msg.header = PD_HEADER_LE(PD_CTRL_REJECT, -+ port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, 0); -+ } else { -+ msg.header = PD_HEADER_LE(PD_DATA_SINK_CAP, -+ port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, -+ port->nr_snk_pdo); -+ } -+ -+ for (i = 0; i < port->nr_snk_pdo; i++) -+ msg.payload[i] = cpu_to_le32(port->snk_pdo[i]); -+ -+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); -+} -+ -+static void tcpm_state_machine(struct udevice *dev); -+ -+static inline void tcpm_timer_uninit(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ port->delay_target = 0; -+} -+ -+static void tcpm_timer_init(struct udevice *dev, uint32_t ms) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ unsigned long time_us = ms * 1000; -+ -+ port->delay_target = timer_get_us() + time_us; -+} -+ -+static void tcpm_check_and_run_delayed_work(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ /* no delayed state changes scheduled */ -+ if (port->delay_target == 0) -+ return; -+ -+ /* it's not yet time */ -+ if (timer_get_us() < port->delay_target) -+ return; -+ -+ tcpm_timer_uninit(dev); -+ tcpm_state_machine(dev); -+} -+ -+static void mod_tcpm_delayed_work(struct udevice *dev, unsigned int delay_ms) -+{ -+ if (delay_ms) { -+ tcpm_timer_init(dev, delay_ms); -+ } else { -+ tcpm_timer_uninit(dev); -+ tcpm_state_machine(dev); -+ } -+} -+ -+static void tcpm_set_state(struct udevice *dev, enum tcpm_state state, -+ unsigned int delay_ms) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ if (delay_ms) { -+ dev_dbg(dev, "TCPM: pending state change %s -> %s @ %u ms [%s]\n", -+ tcpm_states[port->state], tcpm_states[state], delay_ms, -+ typec_pd_rev_name[port->negotiated_rev]); -+ port->delayed_state = state; -+ mod_tcpm_delayed_work(dev, delay_ms); -+ port->delay_ms = delay_ms; -+ } else { -+ dev_dbg(dev, "TCPM: state change %s -> %s\n", -+ tcpm_states[port->state], tcpm_states[state]); -+ port->delayed_state = INVALID_STATE; -+ port->prev_state = port->state; -+ port->state = state; -+ /* -+ * Don't re-queue the state machine work item if we're currently -+ * in the state machine and we're immediately changing states. -+ * tcpm_state_machine_work() will continue running the state -+ * machine. -+ */ -+ if (!port->state_machine_running) -+ mod_tcpm_delayed_work(dev, 0); -+ } -+} -+ -+static void tcpm_set_state_cond(struct udevice *dev, enum tcpm_state state, -+ unsigned int delay_ms) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ if (port->enter_state == port->state) -+ tcpm_set_state(dev, state, delay_ms); -+ else -+ dev_dbg(dev, "TCPM: skipped %sstate change %s -> %s [%u ms], context state %s [%s]\n", -+ delay_ms ? "delayed " : "", -+ tcpm_states[port->state], tcpm_states[state], -+ delay_ms, tcpm_states[port->enter_state], -+ typec_pd_rev_name[port->negotiated_rev]); -+} -+ -+static void tcpm_queue_message(struct udevice *dev, -+ enum pd_msg_request message) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ port->queued_message = message; -+ mod_tcpm_delayed_work(dev, 0); -+} -+ -+enum pdo_err { -+ PDO_NO_ERR, -+ PDO_ERR_NO_VSAFE5V, -+ PDO_ERR_VSAFE5V_NOT_FIRST, -+ PDO_ERR_PDO_TYPE_NOT_IN_ORDER, -+ PDO_ERR_FIXED_NOT_SORTED, -+ PDO_ERR_VARIABLE_BATT_NOT_SORTED, -+ PDO_ERR_DUPE_PDO, -+ PDO_ERR_PPS_APDO_NOT_SORTED, -+ PDO_ERR_DUPE_PPS_APDO, -+}; -+ -+static const char * const pdo_err_msg[] = { -+ [PDO_ERR_NO_VSAFE5V] = -+ " err: source/sink caps should at least have vSafe5V", -+ [PDO_ERR_VSAFE5V_NOT_FIRST] = -+ " err: vSafe5V Fixed Supply Object Shall always be the first object", -+ [PDO_ERR_PDO_TYPE_NOT_IN_ORDER] = -+ " err: PDOs should be in the following order: Fixed; Battery; Variable", -+ [PDO_ERR_FIXED_NOT_SORTED] = -+ " err: Fixed supply pdos should be in increasing order of their fixed voltage", -+ [PDO_ERR_VARIABLE_BATT_NOT_SORTED] = -+ " err: Variable/Battery supply pdos should be in increasing order of their minimum voltage", -+ [PDO_ERR_DUPE_PDO] = -+ " err: Variable/Batt supply pdos cannot have same min/max voltage", -+ [PDO_ERR_PPS_APDO_NOT_SORTED] = -+ " err: Programmable power supply apdos should be in increasing order of their maximum voltage", -+ [PDO_ERR_DUPE_PPS_APDO] = -+ " err: Programmable power supply apdos cannot have same min/max voltage and max current", -+}; -+ -+static enum pdo_err tcpm_caps_err(struct udevice *dev, const u32 *pdo, -+ unsigned int nr_pdo) -+{ -+ unsigned int i; -+ -+ /* Should at least contain vSafe5v */ -+ if (nr_pdo < 1) -+ return PDO_ERR_NO_VSAFE5V; -+ -+ /* The vSafe5V Fixed Supply Object Shall always be the first object */ -+ if (pdo_type(pdo[0]) != PDO_TYPE_FIXED || -+ pdo_fixed_voltage(pdo[0]) != VSAFE5V) -+ return PDO_ERR_VSAFE5V_NOT_FIRST; -+ -+ for (i = 1; i < nr_pdo; i++) { -+ if (pdo_type(pdo[i]) < pdo_type(pdo[i - 1])) { -+ return PDO_ERR_PDO_TYPE_NOT_IN_ORDER; -+ } else if (pdo_type(pdo[i]) == pdo_type(pdo[i - 1])) { -+ enum pd_pdo_type type = pdo_type(pdo[i]); -+ -+ switch (type) { -+ /* -+ * The remaining Fixed Supply Objects, if -+ * present, shall be sent in voltage order; -+ * lowest to highest. -+ */ -+ case PDO_TYPE_FIXED: -+ if (pdo_fixed_voltage(pdo[i]) <= -+ pdo_fixed_voltage(pdo[i - 1])) -+ return PDO_ERR_FIXED_NOT_SORTED; -+ break; -+ /* -+ * The Battery Supply Objects and Variable -+ * supply, if present shall be sent in Minimum -+ * Voltage order; lowest to highest. -+ */ -+ case PDO_TYPE_VAR: -+ case PDO_TYPE_BATT: -+ if (pdo_min_voltage(pdo[i]) < -+ pdo_min_voltage(pdo[i - 1])) -+ return PDO_ERR_VARIABLE_BATT_NOT_SORTED; -+ else if ((pdo_min_voltage(pdo[i]) == -+ pdo_min_voltage(pdo[i - 1])) && -+ (pdo_max_voltage(pdo[i]) == -+ pdo_max_voltage(pdo[i - 1]))) -+ return PDO_ERR_DUPE_PDO; -+ break; -+ /* -+ * The Programmable Power Supply APDOs, if present, -+ * shall be sent in Maximum Voltage order; -+ * lowest to highest. -+ */ -+ case PDO_TYPE_APDO: -+ if (pdo_apdo_type(pdo[i]) != APDO_TYPE_PPS) -+ break; -+ -+ if (pdo_pps_apdo_max_voltage(pdo[i]) < -+ pdo_pps_apdo_max_voltage(pdo[i - 1])) -+ return PDO_ERR_PPS_APDO_NOT_SORTED; -+ else if (pdo_pps_apdo_min_voltage(pdo[i]) == -+ pdo_pps_apdo_min_voltage(pdo[i - 1]) && -+ pdo_pps_apdo_max_voltage(pdo[i]) == -+ pdo_pps_apdo_max_voltage(pdo[i - 1]) && -+ pdo_pps_apdo_max_current(pdo[i]) == -+ pdo_pps_apdo_max_current(pdo[i - 1])) -+ return PDO_ERR_DUPE_PPS_APDO; -+ break; -+ default: -+ dev_err(dev, "TCPM: Unknown pdo type\n"); -+ } -+ } -+ } -+ -+ return PDO_NO_ERR; -+} -+ -+static int tcpm_validate_caps(struct udevice *dev, const u32 *pdo, -+ unsigned int nr_pdo) -+{ -+ enum pdo_err err_index = tcpm_caps_err(dev, pdo, nr_pdo); -+ -+ if (err_index != PDO_NO_ERR) { -+ dev_err(dev, "TCPM:%s\n", pdo_err_msg[err_index]); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+/* -+ * PD (data, control) command handling functions -+ */ -+static inline enum tcpm_state ready_state(struct tcpm_port *port) -+{ -+ if (port->pwr_role == TYPEC_SOURCE) -+ return SRC_READY; -+ else -+ return SNK_READY; -+} -+ -+static void tcpm_pd_data_request(struct udevice *dev, -+ const struct pd_message *msg) -+{ -+ enum pd_data_msg_type type = pd_header_type_le(msg->header); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ unsigned int cnt = pd_header_cnt_le(msg->header); -+ unsigned int rev = pd_header_rev_le(msg->header); -+ unsigned int i; -+ -+ switch (type) { -+ case PD_DATA_SOURCE_CAP: -+ for (i = 0; i < cnt; i++) -+ port->source_caps[i] = le32_to_cpu(msg->payload[i]); -+ -+ port->nr_source_caps = cnt; -+ -+ tcpm_validate_caps(dev, port->source_caps, -+ port->nr_source_caps); -+ -+ /* -+ * Adjust revision in subsequent message headers, as required, -+ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't -+ * support Rev 1.0 so just do nothing in that scenario. -+ */ -+ if (rev == PD_REV10) -+ break; -+ -+ if (rev < PD_MAX_REV) -+ port->negotiated_rev = rev; -+ -+ if ((pdo_type(port->source_caps[0]) == PDO_TYPE_FIXED) && -+ (port->source_caps[0] & PDO_FIXED_DUAL_ROLE) && -+ (port->source_caps[0] & PDO_FIXED_DATA_SWAP)) { -+ /* Dual role power and data, eg: self-powered Type-C */ -+ port->wait_dr_swap_message = true; -+ } else { -+ /* Non-Dual role power, eg: adapter */ -+ port->wait_dr_swap_message = false; -+ } -+ -+ /* -+ * This message may be received even if VBUS is not -+ * present. This is quite unexpected; see USB PD -+ * specification, sections 8.3.3.6.3.1 and 8.3.3.6.3.2. -+ * However, at the same time, we must be ready to -+ * receive this message and respond to it 15ms after -+ * receiving PS_RDY during power swap operations, no matter -+ * if VBUS is available or not (USB PD specification, -+ * section 6.5.9.2). -+ * So we need to accept the message either way, -+ * but be prepared to keep waiting for VBUS after it was -+ * handled. -+ */ -+ tcpm_set_state(dev, SNK_NEGOTIATE_CAPABILITIES, 0); -+ break; -+ case PD_DATA_REQUEST: -+ /* -+ * Adjust revision in subsequent message headers, as required, -+ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't -+ * support Rev 1.0 so just reject in that scenario. -+ */ -+ if (rev == PD_REV10) { -+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); -+ break; -+ } -+ -+ if (rev < PD_MAX_REV) -+ port->negotiated_rev = rev; -+ -+ port->sink_request = le32_to_cpu(msg->payload[0]); -+ -+ tcpm_set_state(dev, SRC_NEGOTIATE_CAPABILITIES, 0); -+ break; -+ case PD_DATA_SINK_CAP: -+ /* We don't do anything with this at the moment... */ -+ for (i = 0; i < cnt; i++) -+ port->sink_caps[i] = le32_to_cpu(msg->payload[i]); -+ -+ port->nr_sink_caps = cnt; -+ break; -+ default: -+ break; -+ } -+} -+ -+static void tcpm_pd_ctrl_request(struct udevice *dev, -+ const struct pd_message *msg) -+{ -+ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum tcpm_state next_state; -+ -+ switch (type) { -+ case PD_CTRL_GOOD_CRC: -+ case PD_CTRL_PING: -+ break; -+ case PD_CTRL_GET_SOURCE_CAP: -+ switch (port->state) { -+ case SRC_READY: -+ case SNK_READY: -+ tcpm_queue_message(dev, PD_MSG_DATA_SOURCE_CAP); -+ break; -+ default: -+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); -+ break; -+ } -+ break; -+ case PD_CTRL_GET_SINK_CAP: -+ switch (port->state) { -+ case SRC_READY: -+ case SNK_READY: -+ tcpm_queue_message(dev, PD_MSG_DATA_SINK_CAP); -+ break; -+ default: -+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); -+ break; -+ } -+ break; -+ case PD_CTRL_GOTO_MIN: -+ break; -+ case PD_CTRL_PS_RDY: -+ switch (port->state) { -+ case SNK_TRANSITION_SINK: -+ if (port->vbus_present) { -+ tcpm_set_current_limit(dev, -+ port->req_current_limit, -+ port->req_supply_voltage); -+ port->explicit_contract = true; -+ tcpm_set_state(dev, SNK_READY, 0); -+ } else { -+ /* -+ * Seen after power swap. Keep waiting for VBUS -+ * in a transitional state. -+ */ -+ tcpm_set_state(dev, -+ SNK_TRANSITION_SINK_VBUS, 0); -+ } -+ break; -+ default: -+ break; -+ } -+ break; -+ case PD_CTRL_REJECT: -+ case PD_CTRL_WAIT: -+ case PD_CTRL_NOT_SUPP: -+ switch (port->state) { -+ case SNK_NEGOTIATE_CAPABILITIES: -+ /* USB PD specification, Figure 8-43 */ -+ if (port->explicit_contract) -+ next_state = SNK_READY; -+ else -+ next_state = SNK_WAIT_CAPABILITIES; -+ -+ tcpm_set_state(dev, next_state, 0); -+ break; -+ default: -+ break; -+ } -+ break; -+ case PD_CTRL_ACCEPT: -+ switch (port->state) { -+ case SNK_NEGOTIATE_CAPABILITIES: -+ tcpm_set_state(dev, SNK_TRANSITION_SINK, 0); -+ break; -+ case SOFT_RESET_SEND: -+ port->message_id = 0; -+ port->rx_msgid = -1; -+ if (port->pwr_role == TYPEC_SOURCE) -+ next_state = SRC_SEND_CAPABILITIES; -+ else -+ next_state = SNK_WAIT_CAPABILITIES; -+ tcpm_set_state(dev, next_state, 0); -+ break; -+ default: -+ break; -+ } -+ break; -+ case PD_CTRL_SOFT_RESET: -+ tcpm_set_state(dev, SOFT_RESET, 0); -+ break; -+ case PD_CTRL_DR_SWAP: -+ if (port->port_type != TYPEC_PORT_DRP) { -+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT); -+ break; -+ } -+ /* -+ * 6.3.9: If an alternate mode is active, a request to swap -+ * alternate modes shall trigger a port reset. -+ */ -+ switch (port->state) { -+ case SRC_READY: -+ case SNK_READY: -+ tcpm_set_state(dev, DR_SWAP_ACCEPT, 0); -+ break; -+ default: -+ tcpm_queue_message(dev, PD_MSG_CTRL_WAIT); -+ break; -+ } -+ break; -+ case PD_CTRL_PR_SWAP: -+ case PD_CTRL_VCONN_SWAP: -+ case PD_CTRL_GET_SOURCE_CAP_EXT: -+ case PD_CTRL_GET_STATUS: -+ case PD_CTRL_FR_SWAP: -+ case PD_CTRL_GET_PPS_STATUS: -+ case PD_CTRL_GET_COUNTRY_CODES: -+ /* Currently not supported */ -+ dev_err(dev, "TCPM: Currently not supported type %#x\n", type); -+ tcpm_queue_message(dev, PD_MSG_CTRL_NOT_SUPP); -+ break; -+ default: -+ dev_err(dev, "TCPM: Unrecognized ctrl message type %#x\n", type); -+ break; -+ } -+} -+ -+static void tcpm_pd_rx_handler(struct udevice *dev, -+ const struct pd_message *msg) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ unsigned int cnt = pd_header_cnt_le(msg->header); -+ bool remote_is_host, local_is_host; -+ -+ dev_dbg(dev, "TCPM: PD RX, header: %#x [%d]\n", -+ le16_to_cpu(msg->header), port->attached); -+ -+ if (port->attached) { -+ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header); -+ unsigned int msgid = pd_header_msgid_le(msg->header); -+ -+ /* -+ * USB PD standard, 6.6.1.2: -+ * "... if MessageID value in a received Message is the -+ * same as the stored value, the receiver shall return a -+ * GoodCRC Message with that MessageID value and drop -+ * the Message (this is a retry of an already received -+ * Message). Note: this shall not apply to the Soft_Reset -+ * Message which always has a MessageID value of zero." -+ */ -+ if (msgid == port->rx_msgid && type != PD_CTRL_SOFT_RESET) -+ return; -+ port->rx_msgid = msgid; -+ -+ /* -+ * If both ends believe to be DFP/host, we have a data role -+ * mismatch. -+ */ -+ remote_is_host = !!(le16_to_cpu(msg->header) & PD_HEADER_DATA_ROLE); -+ local_is_host = port->data_role == TYPEC_HOST; -+ if (remote_is_host == local_is_host) { -+ dev_err(dev, "TCPM: data role mismatch, initiating error recovery\n"); -+ tcpm_set_state(dev, ERROR_RECOVERY, 0); -+ } else { -+ if (cnt) -+ tcpm_pd_data_request(dev, msg); -+ else -+ tcpm_pd_ctrl_request(dev, msg); -+ } -+ } -+} -+ -+void tcpm_pd_receive(struct udevice *dev, const struct pd_message *msg) -+{ -+ tcpm_reset_event_cnt(dev); -+ tcpm_pd_rx_handler(dev, msg); -+} -+ -+static int tcpm_pd_send_control(struct udevice *dev, -+ enum pd_ctrl_msg_type type) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ struct pd_message msg; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.header = PD_HEADER_LE(type, port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, 0); -+ -+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); -+} -+ -+/* -+ * Send queued message without affecting state. -+ * Return true if state machine should go back to sleep, -+ * false otherwise. -+ */ -+static bool tcpm_send_queued_message(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum pd_msg_request queued_message; -+ int max_messages = 100; -+ -+ do { -+ queued_message = port->queued_message; -+ port->queued_message = PD_MSG_NONE; -+ max_messages--; -+ -+ switch (queued_message) { -+ case PD_MSG_CTRL_WAIT: -+ tcpm_pd_send_control(dev, PD_CTRL_WAIT); -+ break; -+ case PD_MSG_CTRL_REJECT: -+ tcpm_pd_send_control(dev, PD_CTRL_REJECT); -+ break; -+ case PD_MSG_CTRL_NOT_SUPP: -+ tcpm_pd_send_control(dev, PD_CTRL_NOT_SUPP); -+ break; -+ case PD_MSG_DATA_SINK_CAP: -+ tcpm_pd_send_sink_caps(dev); -+ break; -+ case PD_MSG_DATA_SOURCE_CAP: -+ tcpm_pd_send_source_caps(dev); -+ break; -+ default: -+ break; -+ } -+ } while (max_messages > 0 && port->queued_message != PD_MSG_NONE); -+ -+ if (!max_messages) -+ dev_err(dev, "Aborted sending of too many queued messages\n"); -+ -+ return false; -+} -+ -+static int tcpm_pd_check_request(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ u32 pdo, rdo = port->sink_request; -+ unsigned int max, op, pdo_max, index; -+ enum pd_pdo_type type; -+ -+ index = rdo_index(rdo); -+ if (!index || index > port->nr_src_pdo) -+ return -EINVAL; -+ -+ pdo = port->src_pdo[index - 1]; -+ type = pdo_type(pdo); -+ switch (type) { -+ case PDO_TYPE_FIXED: -+ case PDO_TYPE_VAR: -+ max = rdo_max_current(rdo); -+ op = rdo_op_current(rdo); -+ pdo_max = pdo_max_current(pdo); -+ -+ if (op > pdo_max) -+ return -EINVAL; -+ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH)) -+ return -EINVAL; -+ -+ if (type == PDO_TYPE_FIXED) -+ dev_dbg(dev, "TCPM: Requested %u mV, %u mA for %u / %u mA\n", -+ pdo_fixed_voltage(pdo), pdo_max, op, max); -+ else -+ dev_dbg(dev, "TCPM: Requested %u -> %u mV, %u mA for %u / %u mA\n", -+ pdo_min_voltage(pdo), pdo_max_voltage(pdo), -+ pdo_max, op, max); -+ break; -+ case PDO_TYPE_BATT: -+ max = rdo_max_power(rdo); -+ op = rdo_op_power(rdo); -+ pdo_max = pdo_max_power(pdo); -+ -+ if (op > pdo_max) -+ return -EINVAL; -+ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH)) -+ return -EINVAL; -+ dev_info(dev, "TCPM: Requested %u -> %u mV, %u mW for %u / %u mW\n", -+ pdo_min_voltage(pdo), pdo_max_voltage(pdo), -+ pdo_max, op, max); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+#define min_power(x, y) min(pdo_max_power(x), pdo_max_power(y)) -+#define min_current(x, y) min(pdo_max_current(x), pdo_max_current(y)) -+ -+static int tcpm_pd_select_pdo(struct udevice *dev, int *sink_pdo, -+ int *src_pdo) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ unsigned int i, j, max_src_mv = 0, min_src_mv = 0, max_mw = 0, -+ max_mv = 0, src_mw = 0, src_ma = 0, max_snk_mv = 0, -+ min_snk_mv = 0; -+ int ret = -EINVAL; -+ -+ /* -+ * Select the source PDO providing the most power which has a -+ * matchig sink cap. -+ */ -+ for (i = 0; i < port->nr_source_caps; i++) { -+ u32 pdo = port->source_caps[i]; -+ enum pd_pdo_type type = pdo_type(pdo); -+ -+ switch (type) { -+ case PDO_TYPE_FIXED: -+ max_src_mv = pdo_fixed_voltage(pdo); -+ min_src_mv = max_src_mv; -+ break; -+ case PDO_TYPE_BATT: -+ case PDO_TYPE_VAR: -+ max_src_mv = pdo_max_voltage(pdo); -+ min_src_mv = pdo_min_voltage(pdo); -+ break; -+ case PDO_TYPE_APDO: -+ continue; -+ default: -+ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n"); -+ continue; -+ } -+ -+ switch (type) { -+ case PDO_TYPE_FIXED: -+ case PDO_TYPE_VAR: -+ src_ma = pdo_max_current(pdo); -+ src_mw = src_ma * min_src_mv / 1000; -+ break; -+ case PDO_TYPE_BATT: -+ src_mw = pdo_max_power(pdo); -+ break; -+ case PDO_TYPE_APDO: -+ continue; -+ default: -+ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n"); -+ continue; -+ } -+ -+ for (j = 0; j < port->nr_snk_pdo; j++) { -+ pdo = port->snk_pdo[j]; -+ -+ switch (pdo_type(pdo)) { -+ case PDO_TYPE_FIXED: -+ max_snk_mv = pdo_fixed_voltage(pdo); -+ min_snk_mv = max_snk_mv; -+ break; -+ case PDO_TYPE_BATT: -+ case PDO_TYPE_VAR: -+ max_snk_mv = pdo_max_voltage(pdo); -+ min_snk_mv = pdo_min_voltage(pdo); -+ break; -+ case PDO_TYPE_APDO: -+ continue; -+ default: -+ dev_err(dev, "TCPM: Invalid sink PDO type, ignoring\n"); -+ continue; -+ } -+ -+ if (max_src_mv <= max_snk_mv && min_src_mv >= min_snk_mv) { -+ /* Prefer higher voltages if available */ -+ if ((src_mw == max_mw && min_src_mv > max_mv) || -+ src_mw > max_mw) { -+ *src_pdo = i; -+ *sink_pdo = j; -+ max_mw = src_mw; -+ max_mv = min_src_mv; -+ ret = 0; -+ } -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+static int tcpm_pd_build_request(struct udevice *dev, u32 *rdo) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ unsigned int mv, ma, mw, flags; -+ unsigned int max_ma, max_mw; -+ enum pd_pdo_type type; -+ u32 pdo, matching_snk_pdo; -+ int src_pdo_index = 0; -+ int snk_pdo_index = 0; -+ int ret; -+ -+ ret = tcpm_pd_select_pdo(dev, &snk_pdo_index, &src_pdo_index); -+ if (ret < 0) -+ return ret; -+ -+ pdo = port->source_caps[src_pdo_index]; -+ matching_snk_pdo = port->snk_pdo[snk_pdo_index]; -+ type = pdo_type(pdo); -+ -+ switch (type) { -+ case PDO_TYPE_FIXED: -+ mv = pdo_fixed_voltage(pdo); -+ break; -+ case PDO_TYPE_BATT: -+ case PDO_TYPE_VAR: -+ mv = pdo_min_voltage(pdo); -+ break; -+ default: -+ dev_err(dev, "TCPM: Invalid PDO selected!\n"); -+ return -EINVAL; -+ } -+ -+ /* Select maximum available current within the sink pdo's limit */ -+ if (type == PDO_TYPE_BATT) { -+ mw = min_power(pdo, matching_snk_pdo); -+ ma = 1000 * mw / mv; -+ } else { -+ ma = min_current(pdo, matching_snk_pdo); -+ mw = ma * mv / 1000; -+ } -+ -+ flags = RDO_USB_COMM | RDO_NO_SUSPEND; -+ -+ /* Set mismatch bit if offered power is less than operating power */ -+ max_ma = ma; -+ max_mw = mw; -+ if (mw < port->operating_snk_mw) { -+ flags |= RDO_CAP_MISMATCH; -+ if (type == PDO_TYPE_BATT && -+ (pdo_max_power(matching_snk_pdo) > pdo_max_power(pdo))) -+ max_mw = pdo_max_power(matching_snk_pdo); -+ else if (pdo_max_current(matching_snk_pdo) > -+ pdo_max_current(pdo)) -+ max_ma = pdo_max_current(matching_snk_pdo); -+ } -+ -+ dev_dbg(dev, "TCPM: cc=%d cc1=%d cc2=%d vbus=%d vconn=%s polarity=%d\n", -+ port->cc_req, port->cc1, port->cc2, port->vbus_source, -+ port->vconn_role == TYPEC_SOURCE ? "source" : "sink", -+ port->polarity); -+ -+ if (type == PDO_TYPE_BATT) { -+ *rdo = RDO_BATT(src_pdo_index + 1, mw, max_mw, flags); -+ -+ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mW%s\n", -+ src_pdo_index, mv, mw, -+ flags & RDO_CAP_MISMATCH ? " [mismatch]" : ""); -+ } else { -+ *rdo = RDO_FIXED(src_pdo_index + 1, ma, max_ma, flags); -+ -+ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mA%s\n", -+ src_pdo_index, mv, ma, -+ flags & RDO_CAP_MISMATCH ? " [mismatch]" : ""); -+ } -+ -+ port->req_current_limit = ma; -+ port->req_supply_voltage = mv; -+ -+ return 0; -+} -+ -+static int tcpm_pd_send_request(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ struct pd_message msg; -+ int ret; -+ u32 rdo; -+ -+ ret = tcpm_pd_build_request(dev, &rdo); -+ if (ret < 0) -+ return ret; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.header = PD_HEADER_LE(PD_DATA_REQUEST, -+ port->pwr_role, -+ port->data_role, -+ port->negotiated_rev, -+ port->message_id, 1); -+ msg.payload[0] = cpu_to_le32(rdo); -+ -+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg); -+} -+ -+static int tcpm_set_vbus(struct udevice *dev, bool enable) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ int ret; -+ -+ if (enable && port->vbus_charge) -+ return -EINVAL; -+ -+ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n", -+ enable, port->vbus_charge); -+ -+ ret = drvops->set_vbus(dev, enable, port->vbus_charge); -+ if (ret < 0) -+ return ret; -+ -+ port->vbus_source = enable; -+ return 0; -+} -+ -+static int tcpm_set_charge(struct udevice *dev, bool charge) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ if (charge && port->vbus_source) -+ return -EINVAL; -+ -+ if (charge != port->vbus_charge) { -+ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n", -+ port->vbus_source, charge); -+ ret = drvops->set_vbus(dev, port->vbus_source, -+ charge); -+ if (ret < 0) -+ return ret; -+ } -+ port->vbus_charge = charge; -+ return 0; -+} -+ -+static bool tcpm_start_toggling(struct udevice *dev, enum typec_cc_status cc) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ if (!drvops->start_toggling) -+ return false; -+ -+ dev_dbg(dev, "TCPM: Start toggling\n"); -+ ret = drvops->start_toggling(dev, port->port_type, cc); -+ return ret == 0; -+} -+ -+static int tcpm_init_vbus(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ ret = drvops->set_vbus(dev, false, false); -+ port->vbus_source = false; -+ port->vbus_charge = false; -+ return ret; -+} -+ -+static int tcpm_init_vconn(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ ret = drvops->set_vconn(dev, false); -+ port->vconn_role = TYPEC_SINK; -+ return ret; -+} -+ -+static inline void tcpm_typec_connect(struct tcpm_port *port) -+{ -+ if (!port->connected) -+ port->connected = true; -+} -+ -+static int tcpm_src_attach(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum typec_cc_polarity polarity = -+ port->cc2 == TYPEC_CC_RD ? TYPEC_POLARITY_CC2 -+ : TYPEC_POLARITY_CC1; -+ int ret; -+ -+ if (port->attached) -+ return 0; -+ -+ ret = tcpm_set_polarity(dev, polarity); -+ if (ret < 0) -+ return ret; -+ -+ ret = tcpm_set_roles(dev, true, TYPEC_SOURCE, TYPEC_HOST); -+ if (ret < 0) -+ return ret; -+ -+ ret = drvops->set_pd_rx(dev, true); -+ if (ret < 0) -+ goto out_disable_mux; -+ -+ /* -+ * USB Type-C specification, version 1.2, -+ * chapter 4.5.2.2.8.1 (Attached.SRC Requirements) -+ * Enable VCONN only if the non-RD port is set to RA. -+ */ -+ if ((polarity == TYPEC_POLARITY_CC1 && port->cc2 == TYPEC_CC_RA) || -+ (polarity == TYPEC_POLARITY_CC2 && port->cc1 == TYPEC_CC_RA)) { -+ ret = tcpm_set_vconn(dev, true); -+ if (ret < 0) -+ goto out_disable_pd; -+ } -+ -+ ret = tcpm_set_vbus(dev, true); -+ if (ret < 0) -+ goto out_disable_vconn; -+ -+ port->pd_capable = false; -+ -+ port->partner = NULL; -+ -+ port->attached = true; -+ -+ return 0; -+ -+out_disable_vconn: -+ tcpm_set_vconn(dev, false); -+out_disable_pd: -+ drvops->set_pd_rx(dev, false); -+out_disable_mux: -+ dev_err(dev, "TCPM: CC connected in %s as DFP\n", -+ polarity ? "CC2" : "CC1"); -+ return 0; -+} -+ -+static inline void tcpm_typec_disconnect(struct tcpm_port *port) -+{ -+ if (port->connected) { -+ port->partner = NULL; -+ port->connected = false; -+ } -+} -+ -+static void tcpm_reset_port(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ tcpm_timer_uninit(dev); -+ tcpm_typec_disconnect(port); -+ tcpm_reset_event_cnt(dev); -+ port->wait_dr_swap_message = false; -+ port->attached = false; -+ port->pd_capable = false; -+ -+ /* -+ * First Rx ID should be 0; set this to a sentinel of -1 so that -+ * we can check tcpm_pd_rx_handler() if we had seen it before. -+ */ -+ port->rx_msgid = -1; -+ -+ drvops->set_pd_rx(dev, false); -+ tcpm_init_vbus(dev); /* also disables charging */ -+ tcpm_init_vconn(dev); -+ tcpm_set_current_limit(dev, 0, 0); -+ tcpm_set_polarity(dev, TYPEC_POLARITY_CC1); -+ tcpm_set_attached_state(dev, false); -+ port->nr_sink_caps = 0; -+} -+ -+static void tcpm_detach(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ if (tcpm_port_is_disconnected(port)) -+ port->hard_reset_count = 0; -+ -+ if (!port->attached) -+ return; -+ -+ tcpm_reset_port(dev); -+} -+ -+static void tcpm_src_detach(struct udevice *dev) -+{ -+ tcpm_detach(dev); -+} -+ -+static int tcpm_snk_attach(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ if (port->attached) -+ return 0; -+ -+ ret = tcpm_set_polarity(dev, port->cc2 != TYPEC_CC_OPEN ? -+ TYPEC_POLARITY_CC2 : TYPEC_POLARITY_CC1); -+ if (ret < 0) -+ return ret; -+ -+ ret = tcpm_set_roles(dev, true, TYPEC_SINK, TYPEC_DEVICE); -+ if (ret < 0) -+ return ret; -+ -+ port->pd_capable = false; -+ -+ port->partner = NULL; -+ -+ port->attached = true; -+ dev_info(dev, "TCPM: CC connected in %s as UFP\n", -+ port->cc1 != TYPEC_CC_OPEN ? "CC1" : "CC2"); -+ -+ return 0; -+} -+ -+static void tcpm_snk_detach(struct udevice *dev) -+{ -+ tcpm_detach(dev); -+} -+ -+static inline enum tcpm_state hard_reset_state(struct tcpm_port *port) -+{ -+ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) -+ return HARD_RESET_SEND; -+ if (port->pd_capable) -+ return ERROR_RECOVERY; -+ if (port->pwr_role == TYPEC_SOURCE) -+ return SRC_UNATTACHED; -+ if (port->state == SNK_WAIT_CAPABILITIES) -+ return SNK_READY; -+ return SNK_UNATTACHED; -+} -+ -+static inline enum tcpm_state unattached_state(struct tcpm_port *port) -+{ -+ if (port->port_type == TYPEC_PORT_DRP) { -+ if (port->pwr_role == TYPEC_SOURCE) -+ return SRC_UNATTACHED; -+ else -+ return SNK_UNATTACHED; -+ } else if (port->port_type == TYPEC_PORT_SRC) { -+ return SRC_UNATTACHED; -+ } -+ -+ return SNK_UNATTACHED; -+} -+ -+static void run_state_machine(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int ret; -+ -+ port->enter_state = port->state; -+ switch (port->state) { -+ case TOGGLING: -+ break; -+ /* SRC states */ -+ case SRC_UNATTACHED: -+ tcpm_src_detach(dev); -+ if (tcpm_start_toggling(dev, tcpm_rp_cc(port))) { -+ tcpm_set_state(dev, TOGGLING, 0); -+ break; -+ } -+ tcpm_set_cc(dev, tcpm_rp_cc(port)); -+ if (port->port_type == TYPEC_PORT_DRP) -+ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_DRP_SNK); -+ break; -+ case SRC_ATTACH_WAIT: -+ if (tcpm_port_is_source(port)) -+ tcpm_set_state(dev, SRC_ATTACHED, PD_T_CC_DEBOUNCE); -+ break; -+ -+ case SRC_ATTACHED: -+ ret = tcpm_src_attach(dev); -+ /* -+ * Currently, vbus control is not implemented, -+ * and the SRC detection process cannot be fully implemented. -+ */ -+ tcpm_set_state(dev, SRC_READY, 0); -+ break; -+ case SRC_STARTUP: -+ port->caps_count = 0; -+ port->negotiated_rev = PD_MAX_REV; -+ port->message_id = 0; -+ port->rx_msgid = -1; -+ port->explicit_contract = false; -+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); -+ break; -+ case SRC_SEND_CAPABILITIES: -+ port->caps_count++; -+ if (port->caps_count > PD_N_CAPS_COUNT) { -+ tcpm_set_state(dev, SRC_READY, 0); -+ break; -+ } -+ ret = tcpm_pd_send_source_caps(dev); -+ if (ret < 0) { -+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, -+ PD_T_SEND_SOURCE_CAP); -+ } else { -+ /* -+ * Per standard, we should clear the reset counter here. -+ * However, that can result in state machine hang-ups. -+ * Reset it only in READY state to improve stability. -+ */ -+ /* port->hard_reset_count = 0; */ -+ port->caps_count = 0; -+ port->pd_capable = true; -+ tcpm_set_state_cond(dev, SRC_SEND_CAPABILITIES_TIMEOUT, -+ PD_T_SEND_SOURCE_CAP); -+ } -+ break; -+ case SRC_SEND_CAPABILITIES_TIMEOUT: -+ /* -+ * Error recovery for a PD_DATA_SOURCE_CAP reply timeout. -+ * -+ * PD 2.0 sinks are supposed to accept src-capabilities with a -+ * 3.0 header and simply ignore any src PDOs which the sink does -+ * not understand such as PPS but some 2.0 sinks instead ignore -+ * the entire PD_DATA_SOURCE_CAP message, causing contract -+ * negotiation to fail. -+ * -+ * After PD_N_HARD_RESET_COUNT hard-reset attempts, we try -+ * sending src-capabilities with a lower PD revision to -+ * make these broken sinks work. -+ */ -+ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) { -+ tcpm_set_state(dev, HARD_RESET_SEND, 0); -+ } else if (port->negotiated_rev > PD_REV20) { -+ port->negotiated_rev--; -+ port->hard_reset_count = 0; -+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); -+ } else { -+ tcpm_set_state(dev, hard_reset_state(port), 0); -+ } -+ break; -+ case SRC_NEGOTIATE_CAPABILITIES: -+ ret = tcpm_pd_check_request(dev); -+ if (ret < 0) { -+ tcpm_pd_send_control(dev, PD_CTRL_REJECT); -+ if (!port->explicit_contract) { -+ tcpm_set_state(dev, -+ SRC_WAIT_NEW_CAPABILITIES, 0); -+ } else { -+ tcpm_set_state(dev, SRC_READY, 0); -+ } -+ } else { -+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); -+ tcpm_set_state(dev, SRC_TRANSITION_SUPPLY, -+ PD_T_SRC_TRANSITION); -+ } -+ break; -+ case SRC_TRANSITION_SUPPLY: -+ /* XXX: regulator_set_voltage(vbus, ...) */ -+ tcpm_pd_send_control(dev, PD_CTRL_PS_RDY); -+ port->explicit_contract = true; -+ tcpm_set_state_cond(dev, SRC_READY, 0); -+ break; -+ case SRC_READY: -+ port->hard_reset_count = 0; -+ -+ tcpm_typec_connect(port); -+ break; -+ case SRC_WAIT_NEW_CAPABILITIES: -+ /* Nothing to do... */ -+ break; -+ -+ /* SNK states */ -+ case SNK_UNATTACHED: -+ tcpm_snk_detach(dev); -+ if (tcpm_start_toggling(dev, TYPEC_CC_RD)) { -+ tcpm_set_state(dev, TOGGLING, 0); -+ break; -+ } -+ tcpm_set_cc(dev, TYPEC_CC_RD); -+ if (port->port_type == TYPEC_PORT_DRP) -+ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_DRP_SRC); -+ break; -+ case SNK_ATTACH_WAIT: -+ if ((port->cc1 == TYPEC_CC_OPEN && -+ port->cc2 != TYPEC_CC_OPEN) || -+ (port->cc1 != TYPEC_CC_OPEN && -+ port->cc2 == TYPEC_CC_OPEN)) -+ tcpm_set_state(dev, SNK_DEBOUNCED, -+ PD_T_CC_DEBOUNCE); -+ else if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, SNK_UNATTACHED, -+ PD_T_CC_DEBOUNCE); -+ break; -+ case SNK_DEBOUNCED: -+ if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_PD_DEBOUNCE); -+ else if (port->vbus_present) -+ tcpm_set_state(dev, SNK_ATTACHED, 0); -+ else -+ /* Wait for VBUS, but not forever */ -+ tcpm_set_state(dev, PORT_RESET, PD_T_PS_SOURCE_ON); -+ break; -+ case SNK_ATTACHED: -+ ret = tcpm_snk_attach(dev); -+ if (ret < 0) -+ tcpm_set_state(dev, SNK_UNATTACHED, 0); -+ else -+ tcpm_set_state(dev, SNK_STARTUP, 0); -+ break; -+ case SNK_STARTUP: -+ port->negotiated_rev = PD_MAX_REV; -+ port->message_id = 0; -+ port->rx_msgid = -1; -+ port->explicit_contract = false; -+ tcpm_set_state(dev, SNK_DISCOVERY, 0); -+ break; -+ case SNK_DISCOVERY: -+ if (port->vbus_present) { -+ tcpm_set_current_limit(dev, -+ tcpm_get_current_limit(port), -+ 5000); -+ tcpm_set_charge(dev, true); -+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); -+ break; -+ } -+ /* -+ * For DRP, timeouts differ. Also, handling is supposed to be -+ * different and much more complex (dead battery detection; -+ * see USB power delivery specification, section 8.3.3.6.1.5.1). -+ */ -+ tcpm_set_state(dev, hard_reset_state(port), -+ port->port_type == TYPEC_PORT_DRP ? -+ PD_T_DB_DETECT : PD_T_NO_RESPONSE); -+ break; -+ case SNK_DISCOVERY_DEBOUNCE: -+ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE_DONE, -+ PD_T_CC_DEBOUNCE); -+ break; -+ case SNK_DISCOVERY_DEBOUNCE_DONE: -+ tcpm_set_state(dev, unattached_state(port), 0); -+ break; -+ case SNK_WAIT_CAPABILITIES: -+ ret = drvops->set_pd_rx(dev, true); -+ if (ret < 0) { -+ tcpm_set_state(dev, SNK_READY, 0); -+ break; -+ } -+ /* -+ * If VBUS has never been low, and we time out waiting -+ * for source cap, try a soft reset first, in case we -+ * were already in a stable contract before this boot. -+ * Do this only once. -+ */ -+ if (port->vbus_never_low) { -+ port->vbus_never_low = false; -+ tcpm_set_state(dev, SOFT_RESET_SEND, -+ PD_T_SINK_WAIT_CAP); -+ } else { -+ tcpm_set_state(dev, hard_reset_state(port), -+ PD_T_SINK_WAIT_CAP); -+ } -+ break; -+ case SNK_NEGOTIATE_CAPABILITIES: -+ port->pd_capable = true; -+ port->hard_reset_count = 0; -+ ret = tcpm_pd_send_request(dev); -+ if (ret < 0) { -+ /* Let the Source send capabilities again. */ -+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); -+ } else { -+ tcpm_set_state_cond(dev, hard_reset_state(port), -+ PD_T_SENDER_RESPONSE); -+ } -+ break; -+ case SNK_TRANSITION_SINK: -+ case SNK_TRANSITION_SINK_VBUS: -+ tcpm_set_state(dev, hard_reset_state(port), -+ PD_T_PS_TRANSITION); -+ break; -+ case SNK_READY: -+ port->update_sink_caps = false; -+ tcpm_typec_connect(port); -+ /* -+ * Here poll_event_cnt is cleared, waiting for self-powered Type-C devices -+ * to send DR_swap Messge until 1s (TCPM_POLL_EVENT_TIME_OUT * 500us)timeout -+ */ -+ if (port->wait_dr_swap_message) -+ tcpm_reset_event_cnt(dev); -+ -+ break; -+ -+ /* Hard_Reset states */ -+ case HARD_RESET_SEND: -+ tcpm_pd_transmit(dev, TCPC_TX_HARD_RESET, NULL); -+ tcpm_set_state(dev, HARD_RESET_START, 0); -+ port->wait_dr_swap_message = false; -+ break; -+ case HARD_RESET_START: -+ port->hard_reset_count++; -+ drvops->set_pd_rx(dev, false); -+ port->nr_sink_caps = 0; -+ if (port->pwr_role == TYPEC_SOURCE) -+ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_OFF, -+ PD_T_PS_HARD_RESET); -+ else -+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_OFF, 0); -+ break; -+ case SRC_HARD_RESET_VBUS_OFF: -+ tcpm_set_vconn(dev, true); -+ tcpm_set_vbus(dev, false); -+ tcpm_set_roles(dev, port->self_powered, TYPEC_SOURCE, -+ TYPEC_HOST); -+ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_ON, PD_T_SRC_RECOVER); -+ break; -+ case SRC_HARD_RESET_VBUS_ON: -+ tcpm_set_vconn(dev, true); -+ tcpm_set_vbus(dev, true); -+ drvops->set_pd_rx(dev, true); -+ tcpm_set_attached_state(dev, true); -+ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_PS_SOURCE_ON); -+ break; -+ case SNK_HARD_RESET_SINK_OFF: -+ tcpm_set_vconn(dev, false); -+ if (port->pd_capable) -+ tcpm_set_charge(dev, false); -+ tcpm_set_roles(dev, port->self_powered, TYPEC_SINK, -+ TYPEC_DEVICE); -+ /* -+ * VBUS may or may not toggle, depending on the adapter. -+ * If it doesn't toggle, transition to SNK_HARD_RESET_SINK_ON -+ * directly after timeout. -+ */ -+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, PD_T_SAFE_0V); -+ break; -+ case SNK_HARD_RESET_WAIT_VBUS: -+ /* Assume we're disconnected if VBUS doesn't come back. */ -+ tcpm_set_state(dev, SNK_UNATTACHED, -+ PD_T_SRC_RECOVER_MAX + PD_T_SRC_TURN_ON); -+ break; -+ case SNK_HARD_RESET_SINK_ON: -+ /* Note: There is no guarantee that VBUS is on in this state */ -+ /* -+ * XXX: -+ * The specification suggests that dual mode ports in sink -+ * mode should transition to state PE_SRC_Transition_to_default. -+ * See USB power delivery specification chapter 8.3.3.6.1.3. -+ * This would mean to -+ * - turn off VCONN, reset power supply -+ * - request hardware reset -+ * - turn on VCONN -+ * - Transition to state PE_Src_Startup -+ * SNK only ports shall transition to state Snk_Startup -+ * (see chapter 8.3.3.3.8). -+ * Similar, dual-mode ports in source mode should transition -+ * to PE_SNK_Transition_to_default. -+ */ -+ if (port->pd_capable) { -+ tcpm_set_current_limit(dev, -+ tcpm_get_current_limit(port), -+ 5000); -+ tcpm_set_charge(dev, true); -+ } -+ tcpm_set_attached_state(dev, true); -+ tcpm_set_state(dev, SNK_STARTUP, 0); -+ break; -+ -+ /* Soft_Reset states */ -+ case SOFT_RESET: -+ port->message_id = 0; -+ port->rx_msgid = -1; -+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); -+ if (port->pwr_role == TYPEC_SOURCE) -+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0); -+ else -+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0); -+ break; -+ case SOFT_RESET_SEND: -+ port->message_id = 0; -+ port->rx_msgid = -1; -+ if (tcpm_pd_send_control(dev, PD_CTRL_SOFT_RESET)) -+ tcpm_set_state_cond(dev, hard_reset_state(port), 0); -+ else -+ tcpm_set_state_cond(dev, hard_reset_state(port), -+ PD_T_SENDER_RESPONSE); -+ break; -+ -+ /* DR_Swap states */ -+ case DR_SWAP_ACCEPT: -+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT); -+ tcpm_set_state_cond(dev, DR_SWAP_CHANGE_DR, 0); -+ break; -+ case DR_SWAP_CHANGE_DR: -+ if (port->data_role == TYPEC_HOST) { -+ tcpm_set_roles(dev, true, port->pwr_role, -+ TYPEC_DEVICE); -+ } else { -+ tcpm_set_roles(dev, true, port->pwr_role, -+ TYPEC_HOST); -+ } -+ /* DR_swap process complete, wait_dr_swap_message is cleared */ -+ port->wait_dr_swap_message = false; -+ tcpm_set_state(dev, ready_state(port), 0); -+ break; -+ case ERROR_RECOVERY: -+ tcpm_set_state(dev, PORT_RESET, 0); -+ break; -+ case PORT_RESET: -+ tcpm_reset_port(dev); -+ if (port->self_powered) -+ tcpm_set_cc(dev, TYPEC_CC_OPEN); -+ else -+ tcpm_set_cc(dev, tcpm_default_state(port) == SNK_UNATTACHED ? -+ TYPEC_CC_RD : tcpm_rp_cc(port)); -+ tcpm_set_state(dev, PORT_RESET_WAIT_OFF, -+ PD_T_ERROR_RECOVERY); -+ break; -+ case PORT_RESET_WAIT_OFF: -+ tcpm_set_state(dev, -+ tcpm_default_state(port), -+ port->vbus_present ? PD_T_PS_SOURCE_OFF : 0); -+ break; -+ default: -+ dev_err(dev, "TCPM: Unexpected port state %d\n", port->state); -+ break; -+ } -+} -+ -+static void tcpm_state_machine(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum tcpm_state prev_state; -+ -+ mutex_lock(&port->lock); -+ port->state_machine_running = true; -+ -+ if (port->queued_message && tcpm_send_queued_message(dev)) -+ goto done; -+ -+ /* If we were queued due to a delayed state change, update it now */ -+ if (port->delayed_state) { -+ dev_dbg(dev, "TCPM: state change %s -> %s [delayed %ld ms]\n", -+ tcpm_states[port->state], -+ tcpm_states[port->delayed_state], port->delay_ms); -+ port->prev_state = port->state; -+ port->state = port->delayed_state; -+ port->delayed_state = INVALID_STATE; -+ } -+ -+ /* -+ * Continue running as long as we have (non-delayed) state changes -+ * to make. -+ */ -+ do { -+ prev_state = port->state; -+ run_state_machine(dev); -+ if (port->queued_message) -+ tcpm_send_queued_message(dev); -+ } while (port->state != prev_state && !port->delayed_state); -+ -+done: -+ port->state_machine_running = false; -+ mutex_unlock(&port->lock); -+} -+ -+static void _tcpm_cc_change(struct udevice *dev, enum typec_cc_status cc1, -+ enum typec_cc_status cc2) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum typec_cc_status old_cc1, old_cc2; -+ enum tcpm_state new_state; -+ -+ old_cc1 = port->cc1; -+ old_cc2 = port->cc2; -+ port->cc1 = cc1; -+ port->cc2 = cc2; -+ -+ dev_dbg(dev, "TCPM: CC1: %u -> %u, CC2: %u -> %u [state %s, polarity %d, %s]\n", -+ old_cc1, cc1, old_cc2, cc2, tcpm_states[port->state], -+ port->polarity, -+ tcpm_port_is_disconnected(port) ? "disconnected" : "connected"); -+ -+ switch (port->state) { -+ case TOGGLING: -+ if (tcpm_port_is_source(port)) -+ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0); -+ else if (tcpm_port_is_sink(port)) -+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); -+ break; -+ case SRC_UNATTACHED: -+ case SRC_ATTACH_WAIT: -+ if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, SRC_UNATTACHED, 0); -+ else if (cc1 != old_cc1 || cc2 != old_cc2) -+ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0); -+ break; -+ case SRC_ATTACHED: -+ case SRC_SEND_CAPABILITIES: -+ case SRC_READY: -+ if (tcpm_port_is_disconnected(port) || -+ !tcpm_port_is_source(port)) -+ tcpm_set_state(dev, SRC_UNATTACHED, 0); -+ break; -+ case SNK_UNATTACHED: -+ if (tcpm_port_is_sink(port)) -+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); -+ break; -+ case SNK_ATTACH_WAIT: -+ if ((port->cc1 == TYPEC_CC_OPEN && -+ port->cc2 != TYPEC_CC_OPEN) || -+ (port->cc1 != TYPEC_CC_OPEN && -+ port->cc2 == TYPEC_CC_OPEN)) -+ new_state = SNK_DEBOUNCED; -+ else if (tcpm_port_is_disconnected(port)) -+ new_state = SNK_UNATTACHED; -+ else -+ break; -+ if (new_state != port->delayed_state) -+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0); -+ break; -+ case SNK_DEBOUNCED: -+ if (tcpm_port_is_disconnected(port)) -+ new_state = SNK_UNATTACHED; -+ else if (port->vbus_present) -+ new_state = tcpm_try_src(port) ? INVALID_STATE : SNK_ATTACHED; -+ else -+ new_state = SNK_UNATTACHED; -+ if (new_state != port->delayed_state) -+ tcpm_set_state(dev, SNK_DEBOUNCED, 0); -+ break; -+ case SNK_READY: -+ if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, unattached_state(port), 0); -+ else if (!port->pd_capable && -+ (cc1 != old_cc1 || cc2 != old_cc2)) -+ tcpm_set_current_limit(dev, -+ tcpm_get_current_limit(port), -+ 5000); -+ break; -+ -+ case SNK_DISCOVERY: -+ /* CC line is unstable, wait for debounce */ -+ if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE, 0); -+ break; -+ case SNK_DISCOVERY_DEBOUNCE: -+ break; -+ -+ case PORT_RESET: -+ case PORT_RESET_WAIT_OFF: -+ /* -+ * State set back to default mode once the timer completes. -+ * Ignore CC changes here. -+ */ -+ break; -+ default: -+ /* -+ * While acting as sink and auto vbus discharge is enabled, Allow disconnect -+ * to be driven by vbus disconnect. -+ */ -+ if (tcpm_port_is_disconnected(port)) -+ tcpm_set_state(dev, unattached_state(port), 0); -+ break; -+ } -+} -+ -+static void _tcpm_pd_vbus_on(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ dev_dbg(dev, "TCPM: VBUS on event\n"); -+ port->vbus_present = true; -+ /* -+ * When vbus_present is true i.e. Voltage at VBUS is greater than VSAFE5V implicitly -+ * states that vbus is not at VSAFE0V, hence clear the vbus_vsafe0v flag here. -+ */ -+ port->vbus_vsafe0v = false; -+ -+ switch (port->state) { -+ case SNK_TRANSITION_SINK_VBUS: -+ port->explicit_contract = true; -+ tcpm_set_state(dev, SNK_READY, 0); -+ break; -+ case SNK_DISCOVERY: -+ tcpm_set_state(dev, SNK_DISCOVERY, 0); -+ break; -+ case SNK_DEBOUNCED: -+ tcpm_set_state(dev, SNK_ATTACHED, 0); -+ break; -+ case SNK_HARD_RESET_WAIT_VBUS: -+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, 0); -+ break; -+ case SRC_ATTACHED: -+ tcpm_set_state(dev, SRC_STARTUP, 0); -+ break; -+ case SRC_HARD_RESET_VBUS_ON: -+ tcpm_set_state(dev, SRC_STARTUP, 0); -+ break; -+ -+ case PORT_RESET: -+ case PORT_RESET_WAIT_OFF: -+ /* -+ * State set back to default mode once the timer completes. -+ * Ignore vbus changes here. -+ */ -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static void _tcpm_pd_vbus_off(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ dev_dbg(dev, "TCPM: VBUS off event\n"); -+ port->vbus_present = false; -+ port->vbus_never_low = false; -+ switch (port->state) { -+ case SNK_HARD_RESET_SINK_OFF: -+ tcpm_set_state(dev, SNK_HARD_RESET_WAIT_VBUS, 0); -+ break; -+ case HARD_RESET_SEND: -+ break; -+ case SNK_ATTACH_WAIT: -+ tcpm_set_state(dev, SNK_UNATTACHED, 0); -+ break; -+ -+ case SNK_NEGOTIATE_CAPABILITIES: -+ break; -+ -+ case PORT_RESET_WAIT_OFF: -+ tcpm_set_state(dev, tcpm_default_state(port), 0); -+ break; -+ -+ case PORT_RESET: -+ /* -+ * State set back to default mode once the timer completes. -+ * Ignore vbus changes here. -+ */ -+ break; -+ -+ default: -+ if (port->pwr_role == TYPEC_SINK && port->attached) -+ tcpm_set_state(dev, SNK_UNATTACHED, 0); -+ break; -+ } -+} -+ -+void tcpm_cc_change(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ enum typec_cc_status cc1, cc2; -+ -+ tcpm_reset_event_cnt(dev); -+ if (drvops->get_cc(dev, &cc1, &cc2) == 0) -+ _tcpm_cc_change(dev, cc1, cc2); -+} -+ -+void tcpm_vbus_change(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ bool vbus; -+ -+ tcpm_reset_event_cnt(dev); -+ vbus = drvops->get_vbus(dev); -+ if (vbus) -+ _tcpm_pd_vbus_on(dev); -+ else -+ _tcpm_pd_vbus_off(dev); -+} -+ -+void tcpm_pd_hard_reset(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ tcpm_reset_event_cnt(dev); -+ dev_dbg(dev, "TCPM: Received hard reset\n"); -+ -+ /* If a hard reset message is received during the port reset process, -+ * we should ignore it, that is, do not set port->state to HARD_RESET_START. -+ */ -+ if (port->state == PORT_RESET || port->state == PORT_RESET_WAIT_OFF) -+ return; -+ -+ /* -+ * If we keep receiving hard reset requests, executing the hard reset -+ * must have failed. Revert to error recovery if that happens. -+ */ -+ tcpm_set_state(dev, -+ port->hard_reset_count < PD_N_HARD_RESET_COUNT ? -+ HARD_RESET_START : ERROR_RECOVERY, -+ 0); -+} -+ -+static void tcpm_init(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ enum typec_cc_status cc1, cc2; -+ -+ drvops->init(dev); -+ -+ tcpm_reset_port(dev); -+ -+ /* -+ * XXX -+ * Should possibly wait for VBUS to settle if it was enabled locally -+ * since tcpm_reset_port() will disable VBUS. -+ */ -+ port->vbus_present = drvops->get_vbus(dev); -+ if (port->vbus_present) -+ port->vbus_never_low = true; -+ -+ /* -+ * 1. When vbus_present is true, voltage on VBUS is already at VSAFE5V. -+ * So implicitly vbus_vsafe0v = false. -+ * -+ * 2. When vbus_present is false and TCPC does NOT support querying -+ * vsafe0v status, then, it's best to assume vbus is at VSAFE0V i.e. -+ * vbus_vsafe0v is true. -+ * -+ * 3. When vbus_present is false and TCPC does support querying vsafe0v, -+ * then, query tcpc for vsafe0v status. -+ */ -+ if (port->vbus_present) -+ port->vbus_vsafe0v = false; -+ else -+ port->vbus_vsafe0v = true; -+ -+ tcpm_set_state(dev, tcpm_default_state(port), 0); -+ -+ if (drvops->get_cc(dev, &cc1, &cc2) == 0) -+ _tcpm_cc_change(dev, cc1, cc2); -+} -+ -+static int tcpm_fw_get_caps(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ ofnode node; -+ const char *cap_str; -+ int ret; -+ u32 mw; -+ -+ ret = drvops->get_connector_node(dev, &node); -+ if (ret) -+ return ret; -+ -+ cap_str = ofnode_read_string(node, "power-role"); -+ if (!cap_str) -+ return -EINVAL; -+ -+ if (!strcmp("dual", cap_str)) -+ port->typec_type = TYPEC_PORT_DRP; -+ else if (!strcmp("source", cap_str)) -+ port->typec_type = TYPEC_PORT_SRC; -+ else if (!strcmp("sink", cap_str)) -+ port->typec_type = TYPEC_PORT_SNK; -+ else -+ return -EINVAL; -+ -+ port->port_type = port->typec_type; -+ -+ if (port->port_type == TYPEC_PORT_SNK) -+ goto sink; -+ -+ /* Get source pdos */ -+ ret = ofnode_read_size(node, "source-pdos") / sizeof(u32); -+ if (ret <= 0) -+ return -EINVAL; -+ -+ port->nr_src_pdo = min(ret, PDO_MAX_OBJECTS); -+ ret = ofnode_read_u32_array(node, "source-pdos", -+ port->src_pdo, port->nr_src_pdo); -+ if (ret || tcpm_validate_caps(dev, port->src_pdo, port->nr_src_pdo)) -+ return -EINVAL; -+ -+ if (port->port_type == TYPEC_PORT_SRC) -+ return 0; -+ -+ /* Get the preferred power role for DRP */ -+ cap_str = ofnode_read_string(node, "try-power-role"); -+ if (!cap_str) -+ return -EINVAL; -+ -+ if (!strcmp("sink", cap_str)) -+ port->typec_prefer_role = TYPEC_SINK; -+ else if (!strcmp("source", cap_str)) -+ port->typec_prefer_role = TYPEC_SOURCE; -+ else -+ return -EINVAL; -+ -+ if (port->typec_prefer_role < 0) -+ return -EINVAL; -+sink: -+ /* Get sink pdos */ -+ ret = ofnode_read_size(node, "sink-pdos") / sizeof(u32); -+ if (ret <= 0) -+ return -EINVAL; -+ -+ port->nr_snk_pdo = min(ret, PDO_MAX_OBJECTS); -+ ret = ofnode_read_u32_array(node, "sink-pdos", -+ port->snk_pdo, port->nr_snk_pdo); -+ if (ret || tcpm_validate_caps(dev, port->snk_pdo, port->nr_snk_pdo)) -+ return -EINVAL; -+ -+ if (ofnode_read_u32_array(node, "op-sink-microwatt", &mw, 1)) -+ return -EINVAL; -+ port->operating_snk_mw = mw / 1000; -+ -+ port->self_powered = ofnode_read_bool(node, "self-powered"); -+ -+ return 0; -+} -+ -+static int tcpm_port_init(struct udevice *dev) -+{ -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ int err; -+ -+ err = tcpm_fw_get_caps(dev); -+ if (err < 0) { -+ dev_err(dev, "TCPM: please check the dts config: %d\n", err); -+ return err; -+ } -+ -+ port->try_role = port->typec_prefer_role; -+ port->port_type = port->typec_type; -+ -+ tcpm_init(dev); -+ -+ dev_info(dev, "TCPM: init finished\n"); -+ -+ return 0; -+} -+ -+static void tcpm_poll_event(struct udevice *dev) -+{ -+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev); -+ struct tcpm_port *port = dev_get_uclass_plat(dev); -+ -+ if (!drvops->get_vbus(dev)) -+ return; -+ -+ while (port->poll_event_cnt < TCPM_POLL_EVENT_TIME_OUT) { -+ if (!port->wait_dr_swap_message && -+ (port->state == SNK_READY || port->state == SRC_READY)) -+ break; -+ -+ drvops->poll_event(dev); -+ port->poll_event_cnt++; -+ udelay(500); -+ tcpm_check_and_run_delayed_work(dev); -+ } -+ -+ if (port->state != SNK_READY && port->state != SRC_READY) -+ dev_warn(dev, "TCPM: exit in state %s\n", -+ tcpm_states[port->state]); -+ -+ /* -+ * At this time, call the callback function of the respective pd chip -+ * to enter the low-power mode. In order to reduce the time spent on -+ * the PD chip driver as much as possible, the tcpm framework does not -+ * fully process the communication initiated by the device,so it should -+ * be noted that we can disable the internal oscillator, etc., but do -+ * not turn off the power of the transceiver module, otherwise the -+ * self-powered Type-C device will initiate a Message(eg: self-powered -+ * Type-C hub initiates a SINK capability request(PD_CTRL_GET_SINK_CAP)) -+ * and the pd chip cannot reply to GoodCRC, causing the self-powered Type-C -+ * device to switch vbus to vSafe5v, or even turn off vbus. -+ */ -+ if (!drvops->enter_low_power_mode) -+ return; -+ -+ if (drvops->enter_low_power_mode(dev, port->attached, port->pd_capable)) -+ dev_err(dev, "TCPM: failed to enter low power\n"); -+ else -+ dev_info(dev, "TCPM: PD chip enter low power mode\n"); -+} -+ -+int tcpm_post_probe(struct udevice *dev) -+{ -+ int ret = tcpm_port_init(dev); -+ -+ if (ret < 0) { -+ dev_err(dev, "failed to tcpm port init\n"); -+ return ret; -+ } -+ -+ tcpm_poll_event(dev); -+ -+ return 0; -+} -diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h -index 5271e646bb16..270088ad94f7 100644 ---- a/include/dm/uclass-id.h -+++ b/include/dm/uclass-id.h -@@ -139,6 +139,7 @@ enum uclass_id { - UCLASS_SYSCON, /* System configuration device */ - UCLASS_SYSINFO, /* Device information from hardware */ - UCLASS_SYSRESET, /* System reset device */ -+ UCLASS_TCPM, /* TypeC port manager */ - UCLASS_TEE, /* Trusted Execution Environment device */ - UCLASS_THERMAL, /* Thermal sensor */ - UCLASS_TIMER, /* Timer device */ -diff --git a/include/usb/pd.h b/include/usb/pd.h -new file mode 100644 -index 000000000000..cacda322d7c6 ---- /dev/null -+++ b/include/usb/pd.h -@@ -0,0 +1,516 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+/* -+ * Copyright 2015-2017 Google, Inc -+ */ -+ -+#ifndef __LINUX_USB_PD_H -+#define __LINUX_USB_PD_H -+ -+#include -+#include -+ -+enum typec_port_type { -+ TYPEC_PORT_SRC, -+ TYPEC_PORT_SNK, -+ TYPEC_PORT_DRP, -+}; -+ -+enum typec_data_role { -+ TYPEC_DEVICE, -+ TYPEC_HOST, -+}; -+ -+enum typec_role { -+ TYPEC_SINK, -+ TYPEC_SOURCE, -+}; -+ -+/* USB PD Messages */ -+enum pd_ctrl_msg_type { -+ /* 0 Reserved */ -+ PD_CTRL_GOOD_CRC = 1, -+ PD_CTRL_GOTO_MIN = 2, -+ PD_CTRL_ACCEPT = 3, -+ PD_CTRL_REJECT = 4, -+ PD_CTRL_PING = 5, -+ PD_CTRL_PS_RDY = 6, -+ PD_CTRL_GET_SOURCE_CAP = 7, -+ PD_CTRL_GET_SINK_CAP = 8, -+ PD_CTRL_DR_SWAP = 9, -+ PD_CTRL_PR_SWAP = 10, -+ PD_CTRL_VCONN_SWAP = 11, -+ PD_CTRL_WAIT = 12, -+ PD_CTRL_SOFT_RESET = 13, -+ /* 14-15 Reserved */ -+ PD_CTRL_NOT_SUPP = 16, -+ PD_CTRL_GET_SOURCE_CAP_EXT = 17, -+ PD_CTRL_GET_STATUS = 18, -+ PD_CTRL_FR_SWAP = 19, -+ PD_CTRL_GET_PPS_STATUS = 20, -+ PD_CTRL_GET_COUNTRY_CODES = 21, -+ /* 22-31 Reserved */ -+}; -+ -+enum pd_data_msg_type { -+ /* 0 Reserved */ -+ PD_DATA_SOURCE_CAP = 1, -+ PD_DATA_REQUEST = 2, -+ PD_DATA_BIST = 3, -+ PD_DATA_SINK_CAP = 4, -+ PD_DATA_BATT_STATUS = 5, -+ PD_DATA_ALERT = 6, -+ PD_DATA_GET_COUNTRY_INFO = 7, -+ PD_DATA_ENTER_USB = 8, -+ /* 9-14 Reserved */ -+ PD_DATA_VENDOR_DEF = 15, -+ /* 16-31 Reserved */ -+}; -+ -+enum pd_ext_msg_type { -+ /* 0 Reserved */ -+ PD_EXT_SOURCE_CAP_EXT = 1, -+ PD_EXT_STATUS = 2, -+ PD_EXT_GET_BATT_CAP = 3, -+ PD_EXT_GET_BATT_STATUS = 4, -+ PD_EXT_BATT_CAP = 5, -+ PD_EXT_GET_MANUFACTURER_INFO = 6, -+ PD_EXT_MANUFACTURER_INFO = 7, -+ PD_EXT_SECURITY_REQUEST = 8, -+ PD_EXT_SECURITY_RESPONSE = 9, -+ PD_EXT_FW_UPDATE_REQUEST = 10, -+ PD_EXT_FW_UPDATE_RESPONSE = 11, -+ PD_EXT_PPS_STATUS = 12, -+ PD_EXT_COUNTRY_INFO = 13, -+ PD_EXT_COUNTRY_CODES = 14, -+ /* 15-31 Reserved */ -+}; -+ -+#define PD_REV10 0x0 -+#define PD_REV20 0x1 -+#define PD_REV30 0x2 -+#define PD_MAX_REV PD_REV30 -+ -+#define PD_HEADER_EXT_HDR BIT(15) -+#define PD_HEADER_CNT_SHIFT 12 -+#define PD_HEADER_CNT_MASK 0x7 -+#define PD_HEADER_ID_SHIFT 9 -+#define PD_HEADER_ID_MASK 0x7 -+#define PD_HEADER_PWR_ROLE BIT(8) -+#define PD_HEADER_REV_SHIFT 6 -+#define PD_HEADER_REV_MASK 0x3 -+#define PD_HEADER_DATA_ROLE BIT(5) -+#define PD_HEADER_TYPE_SHIFT 0 -+#define PD_HEADER_TYPE_MASK 0x1f -+ -+#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \ -+ ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \ -+ ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \ -+ ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \ -+ ((rev) << PD_HEADER_REV_SHIFT) | \ -+ (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \ -+ (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \ -+ ((ext_hdr) ? PD_HEADER_EXT_HDR : 0)) -+ -+#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \ -+ cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0))) -+ -+static inline unsigned int pd_header_cnt(u16 header) -+{ -+ return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK; -+} -+ -+static inline unsigned int pd_header_cnt_le(__le16 header) -+{ -+ return pd_header_cnt(le16_to_cpu(header)); -+} -+ -+static inline unsigned int pd_header_type(u16 header) -+{ -+ return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK; -+} -+ -+static inline unsigned int pd_header_type_le(__le16 header) -+{ -+ return pd_header_type(le16_to_cpu(header)); -+} -+ -+static inline unsigned int pd_header_msgid(u16 header) -+{ -+ return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK; -+} -+ -+static inline unsigned int pd_header_msgid_le(__le16 header) -+{ -+ return pd_header_msgid(le16_to_cpu(header)); -+} -+ -+static inline unsigned int pd_header_rev(u16 header) -+{ -+ return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK; -+} -+ -+static inline unsigned int pd_header_rev_le(__le16 header) -+{ -+ return pd_header_rev(le16_to_cpu(header)); -+} -+ -+#define PD_EXT_HDR_CHUNKED BIT(15) -+#define PD_EXT_HDR_CHUNK_NUM_SHIFT 11 -+#define PD_EXT_HDR_CHUNK_NUM_MASK 0xf -+#define PD_EXT_HDR_REQ_CHUNK BIT(10) -+#define PD_EXT_HDR_DATA_SIZE_SHIFT 0 -+#define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff -+ -+#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \ -+ ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \ -+ ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \ -+ (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \ -+ ((chunked) ? PD_EXT_HDR_CHUNKED : 0)) -+ -+#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \ -+ cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked))) -+ -+static inline unsigned int pd_ext_header_chunk_num(u16 ext_header) -+{ -+ return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) & -+ PD_EXT_HDR_CHUNK_NUM_MASK; -+} -+ -+static inline unsigned int pd_ext_header_data_size(u16 ext_header) -+{ -+ return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) & -+ PD_EXT_HDR_DATA_SIZE_MASK; -+} -+ -+static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header) -+{ -+ return pd_ext_header_data_size(le16_to_cpu(ext_header)); -+} -+ -+#define PD_MAX_PAYLOAD 7 -+#define PD_EXT_MAX_CHUNK_DATA 26 -+ -+/* -+ * struct pd_chunked_ext_message_data - PD chunked extended message data as -+ * seen on wire -+ * @header: PD extended message header -+ * @data: PD extended message data -+ */ -+struct pd_chunked_ext_message_data { -+ __le16 header; -+ u8 data[PD_EXT_MAX_CHUNK_DATA]; -+} __packed; -+ -+/* -+ * struct pd_message - PD message as seen on wire -+ * @header: PD message header -+ * @payload: PD message payload -+ * @ext_msg: PD message chunked extended message data -+ */ -+struct pd_message { -+ __le16 header; -+ union { -+ __le32 payload[PD_MAX_PAYLOAD]; -+ struct pd_chunked_ext_message_data ext_msg; -+ }; -+} __packed; -+ -+/* PDO: Power Data Object */ -+#define PDO_MAX_OBJECTS 7 -+ -+enum pd_pdo_type { -+ PDO_TYPE_FIXED = 0, -+ PDO_TYPE_BATT = 1, -+ PDO_TYPE_VAR = 2, -+ PDO_TYPE_APDO = 3, -+}; -+ -+#define PDO_TYPE_SHIFT 30 -+#define PDO_TYPE_MASK 0x3 -+ -+#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) -+ -+#define PDO_VOLT_MASK 0x3ff -+#define PDO_CURR_MASK 0x3ff -+#define PDO_PWR_MASK 0x3ff -+ -+#define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */ -+#define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */ -+#define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */ -+#define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */ -+#define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */ -+#define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */ -+#define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */ -+#define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */ -+#define PDO_FIXED_FRS_CURR_SHIFT 23 -+#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ -+#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ -+ -+#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) -+#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) -+ -+#define PDO_FIXED(mv, ma, flags) \ -+ (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ -+ PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) -+ -+#define VSAFE5V 5000 /* mv units */ -+ -+#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ -+#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ -+#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ -+ -+#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) -+#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) -+#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) -+ -+#define PDO_BATT(min_mv, max_mv, max_mw) \ -+ (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ -+ PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) -+ -+#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ -+#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ -+#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ -+ -+#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) -+#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) -+#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) -+ -+#define PDO_VAR(min_mv, max_mv, max_ma) \ -+ (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ -+ PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) -+ -+enum pd_apdo_type { -+ APDO_TYPE_PPS = 0, -+}; -+ -+#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */ -+#define PDO_APDO_TYPE_MASK 0x3 -+ -+#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT) -+ -+#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */ -+#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */ -+#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */ -+ -+#define PDO_PPS_APDO_VOLT_MASK 0xff -+#define PDO_PPS_APDO_CURR_MASK 0x7f -+ -+#define PDO_PPS_APDO_MIN_VOLT(mv) \ -+ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT) -+#define PDO_PPS_APDO_MAX_VOLT(mv) \ -+ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT) -+#define PDO_PPS_APDO_MAX_CURR(ma) \ -+ ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT) -+ -+#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \ -+ (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \ -+ PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \ -+ PDO_PPS_APDO_MAX_CURR(max_ma)) -+ -+static inline enum pd_pdo_type pdo_type(u32 pdo) -+{ -+ return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK; -+} -+ -+static inline unsigned int pdo_fixed_voltage(u32 pdo) -+{ -+ return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; -+} -+ -+static inline unsigned int pdo_min_voltage(u32 pdo) -+{ -+ return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; -+} -+ -+static inline unsigned int pdo_max_voltage(u32 pdo) -+{ -+ return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; -+} -+ -+static inline unsigned int pdo_max_current(u32 pdo) -+{ -+ return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10; -+} -+ -+static inline unsigned int pdo_max_power(u32 pdo) -+{ -+ return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250; -+} -+ -+static inline enum pd_apdo_type pdo_apdo_type(u32 pdo) -+{ -+ return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK; -+} -+ -+static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo) -+{ -+ return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) & -+ PDO_PPS_APDO_VOLT_MASK) * 100; -+} -+ -+static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo) -+{ -+ return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) & -+ PDO_PPS_APDO_VOLT_MASK) * 100; -+} -+ -+static inline unsigned int pdo_pps_apdo_max_current(u32 pdo) -+{ -+ return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) & -+ PDO_PPS_APDO_CURR_MASK) * 50; -+} -+ -+/* RDO: Request Data Object */ -+#define RDO_OBJ_POS_SHIFT 28 -+#define RDO_OBJ_POS_MASK 0x7 -+#define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */ -+#define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */ -+#define RDO_USB_COMM BIT(25) /* USB communications capable */ -+#define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */ -+ -+#define RDO_PWR_MASK 0x3ff -+#define RDO_CURR_MASK 0x3ff -+ -+#define RDO_FIXED_OP_CURR_SHIFT 10 -+#define RDO_FIXED_MAX_CURR_SHIFT 0 -+ -+#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT) -+ -+#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT) -+#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT) -+ -+#define RDO_FIXED(idx, op_ma, max_ma, flags) \ -+ (RDO_OBJ(idx) | (flags) | \ -+ PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma)) -+ -+#define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */ -+#define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ -+ -+#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT) -+#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT) -+ -+#define RDO_BATT(idx, op_mw, max_mw, flags) \ -+ (RDO_OBJ(idx) | (flags) | \ -+ RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw)) -+ -+#define RDO_PROG_VOLT_MASK 0x7ff -+#define RDO_PROG_CURR_MASK 0x7f -+ -+#define RDO_PROG_VOLT_SHIFT 9 -+#define RDO_PROG_CURR_SHIFT 0 -+ -+#define RDO_PROG_VOLT_MV_STEP 20 -+#define RDO_PROG_CURR_MA_STEP 50 -+ -+#define PDO_PROG_OUT_VOLT(mv) \ -+ ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT) -+#define PDO_PROG_OP_CURR(ma) \ -+ ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT) -+ -+#define RDO_PROG(idx, out_mv, op_ma, flags) \ -+ (RDO_OBJ(idx) | (flags) | \ -+ PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma)) -+ -+static inline unsigned int rdo_index(u32 rdo) -+{ -+ return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK; -+} -+ -+static inline unsigned int rdo_op_current(u32 rdo) -+{ -+ return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10; -+} -+ -+static inline unsigned int rdo_max_current(u32 rdo) -+{ -+ return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) & -+ RDO_CURR_MASK) * 10; -+} -+ -+static inline unsigned int rdo_op_power(u32 rdo) -+{ -+ return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250; -+} -+ -+static inline unsigned int rdo_max_power(u32 rdo) -+{ -+ return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250; -+} -+ -+/* Enter_USB Data Object */ -+#define EUDO_USB_MODE_MASK GENMASK(30, 28) -+#define EUDO_USB_MODE_SHIFT 28 -+#define EUDO_USB_MODE_USB2 0 -+#define EUDO_USB_MODE_USB3 1 -+#define EUDO_USB_MODE_USB4 2 -+#define EUDO_USB4_DRD BIT(26) -+#define EUDO_USB3_DRD BIT(25) -+#define EUDO_CABLE_SPEED_MASK GENMASK(23, 21) -+#define EUDO_CABLE_SPEED_SHIFT 21 -+#define EUDO_CABLE_SPEED_USB2 0 -+#define EUDO_CABLE_SPEED_USB3_GEN1 1 -+#define EUDO_CABLE_SPEED_USB4_GEN2 2 -+#define EUDO_CABLE_SPEED_USB4_GEN3 3 -+#define EUDO_CABLE_TYPE_MASK GENMASK(20, 19) -+#define EUDO_CABLE_TYPE_SHIFT 19 -+#define EUDO_CABLE_TYPE_PASSIVE 0 -+#define EUDO_CABLE_TYPE_RE_TIMER 1 -+#define EUDO_CABLE_TYPE_RE_DRIVER 2 -+#define EUDO_CABLE_TYPE_OPTICAL 3 -+#define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17) -+#define EUDO_CABLE_CURRENT_SHIFT 17 -+#define EUDO_CABLE_CURRENT_NOTSUPP 0 -+#define EUDO_CABLE_CURRENT_3A 2 -+#define EUDO_CABLE_CURRENT_5A 3 -+#define EUDO_PCIE_SUPPORT BIT(16) -+#define EUDO_DP_SUPPORT BIT(15) -+#define EUDO_TBT_SUPPORT BIT(14) -+#define EUDO_HOST_PRESENT BIT(13) -+ -+/* USB PD timers and counters */ -+#define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */ -+#define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */ -+#define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */ -+#define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */ -+#define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */ -+#define PD_T_SOURCE_ACTIVITY 45 -+#define PD_T_SINK_ACTIVITY 135 -+#define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */ -+#define PD_T_PS_TRANSITION 500 -+#define PD_T_SRC_TRANSITION 35 -+#define PD_T_DRP_SNK 40 -+#define PD_T_DRP_SRC 30 -+#define PD_T_PS_SOURCE_OFF 920 -+#define PD_T_PS_SOURCE_ON 480 -+#define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */ -+#define PD_T_PS_HARD_RESET 30 -+#define PD_T_SRC_RECOVER 760 -+#define PD_T_SRC_RECOVER_MAX 1000 -+#define PD_T_SRC_TURN_ON 275 -+#define PD_T_SAFE_0V 650 -+#define PD_T_VCONN_SOURCE_ON 100 -+#define PD_T_SINK_REQUEST 100 /* 100 ms minimum */ -+#define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */ -+#define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */ -+#define PD_T_NEWSRC 250 /* Maximum of 275ms */ -+#define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */ -+#define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */ -+#define PD_T_SINK_TX 16 /* 16 - 20 ms */ -+#define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */ -+ -+#define PD_T_DRP_TRY 100 /* 75 - 150 ms */ -+#define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */ -+ -+#define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */ -+#define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */ -+#define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */ -+ -+#define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP) -+#define PD_N_HARD_RESET_COUNT 1 -+ -+#define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */ -+ -+/* Time to wait for TCPC to complete transmit */ -+#define PD_T_TCPC_TX_TIMEOUT 100 /* in ms */ -+ -+#endif /* __LINUX_USB_PD_H */ -diff --git a/include/usb/tcpm.h b/include/usb/tcpm.h -new file mode 100644 -index 000000000000..4574a5175ddb ---- /dev/null -+++ b/include/usb/tcpm.h -@@ -0,0 +1,99 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+/* -+ * Copyright 2015-2017 Google, Inc -+ * Copyright 2024 Collabora -+ */ -+ -+#ifndef __LINUX_USB_TCPM_H -+#define __LINUX_USB_TCPM_H -+ -+#include -+#include -+#include "pd.h" -+ -+enum typec_orientation { -+ TYPEC_ORIENTATION_NONE, -+ TYPEC_ORIENTATION_NORMAL, -+ TYPEC_ORIENTATION_REVERSE, -+}; -+ -+enum typec_cc_status { -+ TYPEC_CC_OPEN, -+ TYPEC_CC_RA, -+ TYPEC_CC_RD, -+ TYPEC_CC_RP_DEF, -+ TYPEC_CC_RP_1_5, -+ TYPEC_CC_RP_3_0, -+}; -+ -+enum typec_cc_polarity { -+ TYPEC_POLARITY_CC1, -+ TYPEC_POLARITY_CC2, -+}; -+ -+enum tcpm_transmit_status { -+ TCPC_TX_SUCCESS = 0, -+ TCPC_TX_DISCARDED = 1, -+ TCPC_TX_FAILED = 2, -+}; -+ -+enum tcpm_transmit_type { -+ TCPC_TX_SOP = 0, -+ TCPC_TX_SOP_PRIME = 1, -+ TCPC_TX_SOP_PRIME_PRIME = 2, -+ TCPC_TX_SOP_DEBUG_PRIME = 3, -+ TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4, -+ TCPC_TX_HARD_RESET = 5, -+ TCPC_TX_CABLE_RESET = 6, -+ TCPC_TX_BIST_MODE_2 = 7 -+}; -+ -+struct dm_tcpm_ops { -+ int (*get_connector_node)(struct udevice *dev, ofnode *connector_node); -+ int (*init)(struct udevice *dev); -+ int (*get_vbus)(struct udevice *dev); -+ int (*set_cc)(struct udevice *dev, enum typec_cc_status cc); -+ int (*get_cc)(struct udevice *dev, enum typec_cc_status *cc1, -+ enum typec_cc_status *cc2); -+ int (*set_polarity)(struct udevice *dev, -+ enum typec_cc_polarity polarity); -+ int (*set_vconn)(struct udevice *dev, bool on); -+ int (*set_vbus)(struct udevice *dev, bool on, bool charge); -+ int (*set_pd_rx)(struct udevice *dev, bool on); -+ int (*set_roles)(struct udevice *dev, bool attached, -+ enum typec_role role, enum typec_data_role data); -+ int (*start_toggling)(struct udevice *dev, -+ enum typec_port_type port_type, -+ enum typec_cc_status cc); -+ int (*pd_transmit)(struct udevice *dev, enum tcpm_transmit_type type, -+ const struct pd_message *msg, unsigned int negotiated_rev); -+ void (*poll_event)(struct udevice *dev); -+ int (*enter_low_power_mode)(struct udevice *dev, bool attached, bool pd_capable); -+}; -+ -+/* API for drivers */ -+void tcpm_vbus_change(struct udevice *dev); -+void tcpm_cc_change(struct udevice *dev); -+void tcpm_pd_receive(struct udevice *dev, const struct pd_message *msg); -+void tcpm_pd_transmit_complete(struct udevice *dev, -+ enum tcpm_transmit_status status); -+void tcpm_pd_hard_reset(struct udevice *dev); -+ -+/* API for boards */ -+extern const char * const typec_pd_rev_name[]; -+extern const char * const typec_orientation_name[]; -+extern const char * const typec_role_name[]; -+extern const char * const typec_data_role_name[]; -+extern const char * const typec_cc_status_name[]; -+ -+int tcpm_get(const char *name, struct udevice **devp); -+int tcpm_get_pd_rev(struct udevice *dev); -+int tcpm_get_current(struct udevice *dev); -+int tcpm_get_voltage(struct udevice *dev); -+enum typec_orientation tcpm_get_orientation(struct udevice *dev); -+enum typec_role tcpm_get_pwr_role(struct udevice *dev); -+enum typec_data_role tcpm_get_data_role(struct udevice *dev); -+bool tcpm_is_connected(struct udevice *dev); -+const char *tcpm_get_state(struct udevice *dev); -+ -+#endif /* __LINUX_USB_TCPM_H */ - -From patchwork Thu Sep 5 15:08:38 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sebastian Reichel -X-Patchwork-Id: 1981316 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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- Thu, 5 Sep 2024 17:17:12 +0200 (CEST) -Received: by jupiter.universe (Postfix, from userid 1000) - id A19EE4800F4; Thu, 05 Sep 2024 17:17:07 +0200 (CEST) -From: Sebastian Reichel -To: Marek Vasut , u-boot@lists.denx.de, - Jonas Karlman , Soeren Moch -Cc: Eugen Hristev , - Tim Harvey , Kever Yang , - Philipp Tomsich , Simon Glass , - Sebastian Reichel -Subject: [PATCH v6 2/6] usb: tcpm: fusb302: add driver -Date: Thu, 5 Sep 2024 17:08:38 +0200 -Message-ID: <20240905151707.59101-3-sebastian.reichel@collabora.com> -X-Mailer: git-send-email 2.45.2 -In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> -References: <20240905151707.59101-1-sebastian.reichel@collabora.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Now that the TCPM framework exists we can introduce fusb302 -driver using it. This chip is a very common USB-C controller -chip with PD support, which can be found in the Radxa Rock 5B -among many other boards. Apart from Power Delivery, it also -handles detection of the cable orientation. That can be used -to control a mux for connecting the right USB3 lane pair to -the USB3 controller. - -The driver is originally from the Linux kernel, but has been -adapted to the requirements of U-Boot and its TCPM framework. - -Co-developed-by: Wang Jie -Signed-off-by: Wang Jie -Tested-by: Soeren Moch -Signed-off-by: Sebastian Reichel ---- - drivers/usb/tcpm/Kconfig | 8 + - drivers/usb/tcpm/Makefile | 1 + - drivers/usb/tcpm/fusb302.c | 1323 ++++++++++++++++++++++++++++++++ - drivers/usb/tcpm/fusb302_reg.h | 177 +++++ - 4 files changed, 1509 insertions(+) - create mode 100644 drivers/usb/tcpm/fusb302.c - create mode 100644 drivers/usb/tcpm/fusb302_reg.h - -diff --git a/drivers/usb/tcpm/Kconfig b/drivers/usb/tcpm/Kconfig -index 55bf8e202b90..9be4b496e82f 100644 ---- a/drivers/usb/tcpm/Kconfig -+++ b/drivers/usb/tcpm/Kconfig -@@ -6,3 +6,11 @@ config TYPEC_TCPM - help - The Type-C Port Controller Manager provides a USB PD and USB Type-C - state machine for use with Type-C Port Controllers. -+ -+config TYPEC_FUSB302 -+ tristate "Fairchild FUSB302 Type-C chip driver" -+ depends on DM && DM_I2C && TYPEC_TCPM -+ help -+ The Fairchild FUSB302 Type-C chip driver that works with -+ Type-C Port Controller Manager to provide USB PD and USB -+ Type-C functionalities. -diff --git a/drivers/usb/tcpm/Makefile b/drivers/usb/tcpm/Makefile -index a0f76436f3fd..668d33155bf1 100644 ---- a/drivers/usb/tcpm/Makefile -+++ b/drivers/usb/tcpm/Makefile -@@ -1,3 +1,4 @@ - # SPDX-License-Identifier: GPL-2.0 - - obj-$(CONFIG_TYPEC_TCPM) += tcpm.o tcpm-uclass.o -+obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o -diff --git a/drivers/usb/tcpm/fusb302.c b/drivers/usb/tcpm/fusb302.c -new file mode 100644 -index 000000000000..fe93ff3d3397 ---- /dev/null -+++ b/drivers/usb/tcpm/fusb302.c -@@ -0,0 +1,1323 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2016-2017 Google, Inc -+ * -+ * Fairchild FUSB302 Type-C Chip Driver -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "fusb302_reg.h" -+ -+#define FUSB302_MAX_MSG_LEN 0x1F -+ -+enum toggling_mode { -+ TOGGLING_MODE_OFF, -+ TOGGLING_MODE_DRP, -+ TOGGLING_MODE_SNK, -+ TOGGLING_MODE_SRC, -+}; -+ -+enum src_current_status { -+ SRC_CURRENT_DEFAULT, -+ SRC_CURRENT_MEDIUM, -+ SRC_CURRENT_HIGH, -+}; -+ -+static const u8 ra_mda_value[] = { -+ [SRC_CURRENT_DEFAULT] = 4, /* 210mV */ -+ [SRC_CURRENT_MEDIUM] = 9, /* 420mV */ -+ [SRC_CURRENT_HIGH] = 18, /* 798mV */ -+}; -+ -+static const u8 rd_mda_value[] = { -+ [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */ -+ [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */ -+ [SRC_CURRENT_HIGH] = 61, /* 2604mV */ -+}; -+ -+struct fusb302_chip { -+ enum toggling_mode toggling_mode; -+ enum src_current_status src_current_status; -+ bool intr_togdone; -+ bool intr_bc_lvl; -+ bool intr_comp_chng; -+ -+ /* port status */ -+ bool vconn_on; -+ bool vbus_present; -+ enum typec_cc_polarity cc_polarity; -+ enum typec_cc_status cc1; -+ enum typec_cc_status cc2; -+}; -+ -+static int fusb302_i2c_write(struct udevice *dev, u8 address, u8 data) -+{ -+ int ret; -+ -+ ret = dm_i2c_write(dev, address, &data, 1); -+ if (ret) -+ dev_err(dev, "cannot write 0x%02x to 0x%02x, ret=%d\n", -+ data, address, ret); -+ -+ return ret; -+} -+ -+static int fusb302_i2c_block_write(struct udevice *dev, u8 address, -+ u8 length, const u8 *data) -+{ -+ int ret; -+ -+ if (!length) -+ return 0; -+ -+ ret = dm_i2c_write(dev, address, data, length); -+ if (ret) -+ dev_err(dev, "cannot block write 0x%02x, len=%d, ret=%d\n", -+ address, length, ret); -+ -+ return ret; -+} -+ -+static int fusb302_i2c_read(struct udevice *dev, u8 address, u8 *data) -+{ -+ int ret, retries; -+ -+ for (retries = 0; retries < 3; retries++) { -+ ret = dm_i2c_read(dev, address, data, 1); -+ if (ret == 0) -+ return ret; -+ dev_err(dev, "cannot read %02x, ret=%d\n", address, ret); -+ } -+ -+ return ret; -+} -+ -+static int fusb302_i2c_block_read(struct udevice *dev, u8 address, -+ u8 length, u8 *data) -+{ -+ int ret; -+ -+ if (!length) -+ return 0; -+ -+ ret = dm_i2c_read(dev, address, data, length); -+ if (ret) -+ dev_err(dev, "cannot block read 0x%02x, len=%d, ret=%d\n", -+ address, length, ret); -+ return ret; -+} -+ -+static int fusb302_i2c_mask_write(struct udevice *dev, u8 address, -+ u8 mask, u8 value) -+{ -+ int ret; -+ u8 data; -+ -+ ret = fusb302_i2c_read(dev, address, &data); -+ if (ret) -+ return ret; -+ data &= ~mask; -+ data |= value; -+ ret = fusb302_i2c_write(dev, address, data); -+ if (ret) -+ return ret; -+ -+ return ret; -+} -+ -+static int fusb302_i2c_set_bits(struct udevice *dev, u8 address, u8 set_bits) -+{ -+ return fusb302_i2c_mask_write(dev, address, 0x00, set_bits); -+} -+ -+static int fusb302_i2c_clear_bits(struct udevice *dev, u8 address, u8 clear_bits) -+{ -+ return fusb302_i2c_mask_write(dev, address, clear_bits, 0x00); -+} -+ -+static int fusb302_sw_reset(struct udevice *dev) -+{ -+ int ret = fusb302_i2c_write(dev, FUSB_REG_RESET, FUSB_REG_RESET_SW_RESET); -+ -+ if (ret) -+ dev_err(dev, "cannot sw reset the fusb302: %d\n", ret); -+ -+ return ret; -+} -+ -+static int fusb302_enable_tx_auto_retries(struct udevice *dev, u8 retry_count) -+{ -+ int ret; -+ -+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, retry_count | -+ FUSB_REG_CONTROL3_AUTO_RETRY); -+ -+ return ret; -+} -+ -+/* -+ * mask all interrupt on the chip -+ */ -+static int fusb302_mask_interrupt(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASK, 0xFF); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_INT_MASK); -+ return ret; -+} -+ -+/* -+ * initialize interrupt on the chip -+ * - unmasked interrupt: VBUS_OK -+ */ -+static int fusb302_init_interrupt(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASK, -+ 0xFF & ~FUSB_REG_MASK_VBUSOK); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_INT_MASK); -+ return ret; -+} -+ -+static int fusb302_set_power_mode(struct udevice *dev, u8 power_mode) -+{ -+ int ret; -+ -+ ret = fusb302_i2c_write(dev, FUSB_REG_POWER, power_mode); -+ -+ return ret; -+} -+ -+static int fusb302_init(struct udevice *dev) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ u8 data; -+ -+ ret = fusb302_sw_reset(dev); -+ if (ret) -+ return ret; -+ ret = fusb302_enable_tx_auto_retries(dev, FUSB_REG_CONTROL3_N_RETRIES_3); -+ if (ret) -+ return ret; -+ ret = fusb302_init_interrupt(dev); -+ if (ret) -+ return ret; -+ ret = fusb302_set_power_mode(dev, FUSB_REG_POWER_PWR_ALL); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &data); -+ if (ret) -+ return ret; -+ chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK); -+ ret = fusb302_i2c_read(dev, FUSB_REG_DEVICE_ID, &data); -+ if (ret) -+ return ret; -+ dev_info(dev, "fusb302 device ID: 0x%02x\n", data); -+ -+ return ret; -+} -+ -+static int fusb302_get_vbus(struct udevice *dev) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ -+ return chip->vbus_present ? 1 : 0; -+} -+ -+static int fusb302_set_src_current(struct udevice *dev, -+ enum src_current_status status) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ -+ chip->src_current_status = status; -+ switch (status) { -+ case SRC_CURRENT_DEFAULT: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_HOST_CUR_MASK, -+ FUSB_REG_CONTROL0_HOST_CUR_DEF); -+ break; -+ case SRC_CURRENT_MEDIUM: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_HOST_CUR_MASK, -+ FUSB_REG_CONTROL0_HOST_CUR_MED); -+ break; -+ case SRC_CURRENT_HIGH: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_HOST_CUR_MASK, -+ FUSB_REG_CONTROL0_HOST_CUR_HIGH); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ -+ return ret; -+} -+ -+static int fusb302_set_toggling(struct udevice *dev, -+ enum toggling_mode mode) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ -+ /* first disable toggling */ -+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_TOGGLE); -+ if (ret) -+ return ret; -+ /* mask interrupts for SRC or SNK */ -+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASK, -+ FUSB_REG_MASK_BC_LVL | -+ FUSB_REG_MASK_COMP_CHNG); -+ if (ret) -+ return ret; -+ chip->intr_bc_lvl = false; -+ chip->intr_comp_chng = false; -+ /* configure toggling mode: none/snk/src/drp */ -+ switch (mode) { -+ case TOGGLING_MODE_OFF: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_MODE_MASK, -+ FUSB_REG_CONTROL2_MODE_NONE); -+ break; -+ case TOGGLING_MODE_SNK: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_MODE_MASK, -+ FUSB_REG_CONTROL2_MODE_UFP); -+ break; -+ case TOGGLING_MODE_SRC: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_MODE_MASK, -+ FUSB_REG_CONTROL2_MODE_DFP); -+ break; -+ case TOGGLING_MODE_DRP: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_MODE_MASK, -+ FUSB_REG_CONTROL2_MODE_DRP); -+ break; -+ default: -+ break; -+ } -+ -+ if (ret) -+ return ret; -+ -+ if (mode == TOGGLING_MODE_OFF) { -+ /* mask TOGDONE interrupt */ -+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, -+ FUSB_REG_MASKA_TOGDONE); -+ if (ret) -+ return ret; -+ chip->intr_togdone = false; -+ } else { -+ /* Datasheet says vconn MUST be off when toggling */ -+ if (chip->vconn_on) -+ dev_warn(dev, "Vconn is on during toggle start\n"); -+ /* unmask TOGDONE interrupt */ -+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, -+ FUSB_REG_MASKA_TOGDONE); -+ if (ret) -+ return ret; -+ chip->intr_togdone = true; -+ /* start toggling */ -+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL2, -+ FUSB_REG_CONTROL2_TOGGLE); -+ if (ret) -+ return ret; -+ /* during toggling, consider cc as Open */ -+ chip->cc1 = TYPEC_CC_OPEN; -+ chip->cc2 = TYPEC_CC_OPEN; -+ } -+ chip->toggling_mode = mode; -+ -+ return ret; -+} -+ -+static const enum src_current_status cc_src_current[] = { -+ [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT, -+ [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT, -+ [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT, -+ [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT, -+ [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM, -+ [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH, -+}; -+ -+static int fusb302_set_cc(struct udevice *dev, enum typec_cc_status cc) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ const u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN | -+ FUSB_REG_SWITCHES0_CC2_PU_EN | -+ FUSB_REG_SWITCHES0_CC1_PD_EN | -+ FUSB_REG_SWITCHES0_CC2_PD_EN; -+ u8 rd_mda, switches0_data = 0x00; -+ int ret; -+ -+ switch (cc) { -+ case TYPEC_CC_OPEN: -+ break; -+ case TYPEC_CC_RD: -+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | -+ FUSB_REG_SWITCHES0_CC2_PD_EN; -+ break; -+ case TYPEC_CC_RP_DEF: -+ case TYPEC_CC_RP_1_5: -+ case TYPEC_CC_RP_3_0: -+ switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ? -+ FUSB_REG_SWITCHES0_CC1_PU_EN : -+ FUSB_REG_SWITCHES0_CC2_PU_EN; -+ break; -+ default: -+ dev_err(dev, "unsupported CC value: %s\n", -+ typec_cc_status_name[cc]); -+ ret = -EINVAL; -+ goto done; -+ } -+ -+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); -+ if (ret) { -+ dev_err(dev, "cannot set toggling mode: %d\n", ret); -+ goto done; -+ } -+ -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0, -+ switches0_mask, switches0_data); -+ if (ret) { -+ dev_err(dev, "cannot set pull-up/-down: %d\n", ret); -+ goto done; -+ } -+ /* reset the cc status */ -+ chip->cc1 = TYPEC_CC_OPEN; -+ chip->cc2 = TYPEC_CC_OPEN; -+ -+ /* adjust current for SRC */ -+ ret = fusb302_set_src_current(dev, cc_src_current[cc]); -+ if (ret) { -+ dev_err(dev, "cannot set src current %s: %d\n", -+ typec_cc_status_name[cc], ret); -+ goto done; -+ } -+ -+ /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */ -+ switch (cc) { -+ case TYPEC_CC_RP_DEF: -+ case TYPEC_CC_RP_1_5: -+ case TYPEC_CC_RP_3_0: -+ rd_mda = rd_mda_value[cc_src_current[cc]]; -+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); -+ if (ret) { -+ dev_err(dev, "cannot set SRC measure value: %d\n", ret); -+ goto done; -+ } -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK, -+ FUSB_REG_MASK_BC_LVL | -+ FUSB_REG_MASK_COMP_CHNG, -+ FUSB_REG_MASK_BC_LVL); -+ if (ret) { -+ dev_err(dev, "cannot set SRC irq: %d\n", ret); -+ goto done; -+ } -+ chip->intr_comp_chng = true; -+ break; -+ case TYPEC_CC_RD: -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK, -+ FUSB_REG_MASK_BC_LVL | -+ FUSB_REG_MASK_COMP_CHNG, -+ FUSB_REG_MASK_COMP_CHNG); -+ if (ret) { -+ dev_err(dev, "cannot set SRC irq: %d\n", ret); -+ goto done; -+ } -+ chip->intr_bc_lvl = true; -+ break; -+ default: -+ break; -+ } -+done: -+ return ret; -+} -+ -+static int fusb302_get_cc(struct udevice *dev, enum typec_cc_status *cc1, -+ enum typec_cc_status *cc2) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ -+ *cc1 = chip->cc1; -+ *cc2 = chip->cc2; -+ dev_dbg(dev, "get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1], -+ typec_cc_status_name[*cc2]); -+ -+ return 0; -+} -+ -+static int fusb302_set_vconn(struct udevice *dev, bool on) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ u8 switches0_data = 0x00; -+ u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 | -+ FUSB_REG_SWITCHES0_VCONN_CC2; -+ -+ if (chip->vconn_on == on) { -+ ret = 0; -+ dev_dbg(dev, "vconn is already %s\n", on ? "on" : "off"); -+ goto done; -+ } -+ if (on) { -+ switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ? -+ FUSB_REG_SWITCHES0_VCONN_CC2 : -+ FUSB_REG_SWITCHES0_VCONN_CC1; -+ } -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0, -+ switches0_mask, switches0_data); -+ if (ret) -+ goto done; -+ dev_dbg(dev, "set vconn = %s\n", on ? "on" : "off"); -+done: -+ return ret; -+} -+ -+static int fusb302_set_vbus(struct udevice *dev, bool on, bool charge) -+{ -+ return 0; -+} -+ -+static int fusb302_pd_tx_flush(struct udevice *dev) -+{ -+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0, -+ FUSB_REG_CONTROL0_TX_FLUSH); -+} -+ -+static int fusb302_pd_rx_flush(struct udevice *dev) -+{ -+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL1, -+ FUSB_REG_CONTROL1_RX_FLUSH); -+} -+ -+static int fusb302_pd_set_auto_goodcrc(struct udevice *dev, bool on) -+{ -+ if (on) -+ return fusb302_i2c_set_bits(dev, FUSB_REG_SWITCHES1, -+ FUSB_REG_SWITCHES1_AUTO_GCRC); -+ return fusb302_i2c_clear_bits(dev, FUSB_REG_SWITCHES1, -+ FUSB_REG_SWITCHES1_AUTO_GCRC); -+} -+ -+static int fusb302_pd_set_interrupts(struct udevice *dev, bool on) -+{ -+ int ret; -+ u8 mask_interrupts = FUSB_REG_MASK_COLLISION; -+ u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL | -+ FUSB_REG_MASKA_HARDSENT | -+ FUSB_REG_MASKA_TX_SUCCESS | -+ FUSB_REG_MASKA_HARDRESET; -+ u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT; -+ -+ ret = on ? -+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, mask_interrupts) : -+ fusb302_i2c_set_bits(dev, FUSB_REG_MASK, mask_interrupts); -+ if (ret) -+ return ret; -+ ret = on ? -+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, maska_interrupts) : -+ fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, maska_interrupts); -+ if (ret) -+ return ret; -+ ret = on ? -+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKB, maskb_interrupts) : -+ fusb302_i2c_set_bits(dev, FUSB_REG_MASKB, maskb_interrupts); -+ return ret; -+} -+ -+static int fusb302_set_pd_rx(struct udevice *dev, bool on) -+{ -+ int ret; -+ -+ ret = fusb302_pd_rx_flush(dev); -+ if (ret) { -+ dev_err(dev, "cannot flush pd rx buffer: %d\n", ret); -+ goto done; -+ } -+ ret = fusb302_pd_tx_flush(dev); -+ if (ret) { -+ dev_err(dev, "cannot flush pd tx buffer: %d\n", ret); -+ goto done; -+ } -+ ret = fusb302_pd_set_auto_goodcrc(dev, on); -+ if (ret) { -+ dev_err(dev, "cannot turn %s auto GoodCRC: %d\n", -+ on ? "on" : "off", ret); -+ goto done; -+ } -+ ret = fusb302_pd_set_interrupts(dev, on); -+ if (ret) { -+ dev_err(dev, "cannot turn %s pd interrupts: %d\n", -+ on ? "on" : "off", ret); -+ goto done; -+ } -+ dev_dbg(dev, "set pd RX %s\n", on ? "on" : "off"); -+done: -+ return ret; -+} -+ -+static int fusb302_set_roles(struct udevice *dev, bool attached, -+ enum typec_role pwr, enum typec_data_role data) -+{ -+ int ret; -+ u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE | -+ FUSB_REG_SWITCHES1_DATAROLE; -+ u8 switches1_data = 0x00; -+ -+ if (pwr == TYPEC_SOURCE) -+ switches1_data |= FUSB_REG_SWITCHES1_POWERROLE; -+ if (data == TYPEC_HOST) -+ switches1_data |= FUSB_REG_SWITCHES1_DATAROLE; -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1, -+ switches1_mask, switches1_data); -+ if (ret) { -+ dev_err(dev, "unable to set pd header %s, %s, ret=%d\n", -+ typec_role_name[pwr], typec_data_role_name[data], ret); -+ goto done; -+ } -+ dev_dbg(dev, "pd header : %s, %s\n", typec_role_name[pwr], -+ typec_data_role_name[data]); -+done: -+ -+ return ret; -+} -+ -+static int fusb302_start_toggling(struct udevice *dev, -+ enum typec_port_type port_type, -+ enum typec_cc_status cc) -+{ -+ enum toggling_mode mode = TOGGLING_MODE_OFF; -+ int ret; -+ -+ switch (port_type) { -+ case TYPEC_PORT_SRC: -+ mode = TOGGLING_MODE_SRC; -+ break; -+ case TYPEC_PORT_SNK: -+ mode = TOGGLING_MODE_SNK; -+ break; -+ case TYPEC_PORT_DRP: -+ mode = TOGGLING_MODE_DRP; -+ break; -+ } -+ -+ ret = fusb302_set_src_current(dev, cc_src_current[cc]); -+ if (ret) { -+ dev_err(dev, "unable to set src current %s, ret=%d", -+ typec_cc_status_name[cc], ret); -+ goto done; -+ } -+ ret = fusb302_set_toggling(dev, mode); -+ if (ret) { -+ dev_err(dev, "unable to start drp toggling: %d\n", ret); -+ goto done; -+ } -+ dev_info(dev, "fusb302 start drp toggling\n"); -+done: -+ -+ return ret; -+} -+ -+static int fusb302_pd_send_message(struct udevice *dev, -+ const struct pd_message *msg) -+{ -+ int ret; -+ /* SOP tokens */ -+ u8 buf[40] = {FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, -+ FUSB302_TKN_SYNC2}; -+ u8 pos = 4; -+ int len; -+ -+ len = pd_header_cnt_le(msg->header) * 4; -+ /* plug 2 for header */ -+ len += 2; -+ if (len > FUSB302_MAX_MSG_LEN) { -+ dev_err(dev, "PD message too long %d (incl. header)", len); -+ return -EINVAL; -+ } -+ /* packsym tells the FUSB302 chip that the next X bytes are payload */ -+ buf[pos++] = FUSB302_TKN_PACKSYM | (len & FUSB302_MAX_MSG_LEN); -+ memcpy(&buf[pos], &msg->header, sizeof(msg->header)); -+ pos += sizeof(msg->header); -+ -+ len -= 2; -+ memcpy(&buf[pos], msg->payload, len); -+ pos += len; -+ -+ /* CRC */ -+ buf[pos++] = FUSB302_TKN_JAMCRC; -+ /* EOP */ -+ buf[pos++] = FUSB302_TKN_EOP; -+ /* turn tx off after sending message */ -+ buf[pos++] = FUSB302_TKN_TXOFF; -+ /* start transmission */ -+ buf[pos++] = FUSB302_TKN_TXON; -+ -+ ret = fusb302_i2c_block_write(dev, FUSB_REG_FIFOS, pos, buf); -+ if (ret) -+ return ret; -+ dev_dbg(dev, "Send PD message (header=0x%x len=%d)\n", msg->header, len); -+ -+ return ret; -+} -+ -+static int fusb302_pd_send_hardreset(struct udevice *dev) -+{ -+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, -+ FUSB_REG_CONTROL3_SEND_HARDRESET); -+} -+ -+static const char * const transmit_type_name[] = { -+ [TCPC_TX_SOP] = "SOP", -+ [TCPC_TX_SOP_PRIME] = "SOP'", -+ [TCPC_TX_SOP_PRIME_PRIME] = "SOP''", -+ [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'", -+ [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''", -+ [TCPC_TX_HARD_RESET] = "HARD_RESET", -+ [TCPC_TX_CABLE_RESET] = "CABLE_RESET", -+ [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2", -+}; -+ -+static int fusb302_pd_transmit(struct udevice *dev, enum tcpm_transmit_type type, -+ const struct pd_message *msg, unsigned int negotiated_rev) -+{ -+ int ret; -+ -+ switch (type) { -+ case TCPC_TX_SOP: -+ /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */ -+ ret = fusb302_enable_tx_auto_retries(dev, negotiated_rev > PD_REV20 ? -+ FUSB_REG_CONTROL3_N_RETRIES_2 : -+ FUSB_REG_CONTROL3_N_RETRIES_3); -+ if (ret) -+ dev_err(dev, "cannot update retry count: %d\n", ret); -+ -+ ret = fusb302_pd_send_message(dev, msg); -+ if (ret) -+ dev_err(dev, "cannot send PD message: %d\n", ret); -+ break; -+ case TCPC_TX_HARD_RESET: -+ ret = fusb302_pd_send_hardreset(dev); -+ if (ret) -+ dev_err(dev, "cannot send hardreset: %d\n", ret); -+ break; -+ default: -+ dev_err(dev, "type %s not supported", transmit_type_name[type]); -+ ret = -EINVAL; -+ } -+ -+ return ret; -+} -+ -+static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl) -+{ -+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX) -+ return TYPEC_CC_RP_3_0; -+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230) -+ return TYPEC_CC_RP_1_5; -+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600) -+ return TYPEC_CC_RP_DEF; -+ return TYPEC_CC_OPEN; -+} -+ -+static void fusb302_bc_lvl_handler(struct udevice *dev) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ enum typec_cc_status cc_status; -+ u8 status0, bc_lvl; -+ int ret; -+ -+ if (!chip->intr_bc_lvl) { -+ dev_err(dev, "BC_LVL interrupt is turned off, abort\n"); -+ goto done; -+ } -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); -+ if (ret) -+ goto done; -+ -+ dev_dbg(dev, "BC_LVL handler, status0 = 0x%02x\n", status0); -+ if (status0 & FUSB_REG_STATUS0_ACTIVITY) -+ dev_info(dev, "CC activities detected, delay handling\n"); -+ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; -+ cc_status = fusb302_bc_lvl_to_cc(bc_lvl); -+ if (chip->cc_polarity == TYPEC_POLARITY_CC1) { -+ if (chip->cc1 != cc_status) { -+ dev_dbg(dev, "cc1: %s -> %s\n", -+ typec_cc_status_name[chip->cc1], -+ typec_cc_status_name[cc_status]); -+ chip->cc1 = cc_status; -+ tcpm_cc_change(dev); -+ } -+ } else { -+ if (chip->cc2 != cc_status) { -+ dev_dbg(dev, "cc2: %s -> %s\n", -+ typec_cc_status_name[chip->cc2], -+ typec_cc_status_name[cc_status]); -+ chip->cc2 = cc_status; -+ tcpm_cc_change(dev); -+ } -+ } -+ -+done: -+ return; -+} -+ -+static int fusb302_enter_low_power_mode(struct udevice *dev, -+ bool attached, bool pd_capable) -+{ -+ unsigned int reg; -+ int ret; -+ -+ ret = fusb302_mask_interrupt(dev); -+ if (ret) -+ return ret; -+ if (attached && pd_capable) -+ reg = FUSB_REG_POWER_PWR_MEDIUM; -+ else if (attached) -+ reg = FUSB_REG_POWER_PWR_LOW; -+ else -+ reg = 0; -+ -+ return fusb302_set_power_mode(dev, reg); -+} -+ -+static const char * const cc_polarity_name[] = { -+ [TYPEC_POLARITY_CC1] = "Polarity_CC1", -+ [TYPEC_POLARITY_CC2] = "Polarity_CC2", -+}; -+ -+static int fusb302_set_cc_polarity_and_pull(struct udevice *dev, -+ enum typec_cc_polarity cc_polarity, -+ bool pull_up, bool pull_down) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ u8 switches0_data = 0x00; -+ u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN | -+ FUSB_REG_SWITCHES1_TXCC2_EN; -+ u8 switches1_data = 0x00; -+ -+ if (pull_down) -+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | -+ FUSB_REG_SWITCHES0_CC2_PD_EN; -+ -+ if (cc_polarity == TYPEC_POLARITY_CC1) { -+ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1; -+ if (chip->vconn_on) -+ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2; -+ if (pull_up) -+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN; -+ switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN; -+ } else { -+ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2; -+ if (chip->vconn_on) -+ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1; -+ if (pull_up) -+ switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN; -+ switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN; -+ } -+ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1, -+ switches1_mask, switches1_data); -+ if (ret) -+ return ret; -+ chip->cc_polarity = cc_polarity; -+ -+ return ret; -+} -+ -+static int fusb302_handle_togdone_snk(struct udevice *dev, -+ u8 togdone_result) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ int ret; -+ u8 status0; -+ u8 bc_lvl; -+ enum typec_cc_polarity cc_polarity; -+ enum typec_cc_status cc_status_active, cc1, cc2; -+ -+ /* set polarity and pull_up, pull_down */ -+ cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ? -+ TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2; -+ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, false, true); -+ if (ret) { -+ dev_err(dev, "cannot set cc polarity %s, ret = %d\n", -+ cc_polarity_name[cc_polarity], ret); -+ return ret; -+ } -+ /* fusb302_set_cc_polarity() has set the correct measure block */ -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); -+ if (ret < 0) -+ return ret; -+ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; -+ cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl); -+ /* restart toggling if the cc status on the active line is OPEN */ -+ if (cc_status_active == TYPEC_CC_OPEN) { -+ dev_info(dev, "restart toggling as CC_OPEN detected\n"); -+ ret = fusb302_set_toggling(dev, chip->toggling_mode); -+ return ret; -+ } -+ /* update tcpm with the new cc value */ -+ cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ? -+ cc_status_active : TYPEC_CC_OPEN; -+ cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ? -+ cc_status_active : TYPEC_CC_OPEN; -+ if (chip->cc1 != cc1 || chip->cc2 != cc2) { -+ chip->cc1 = cc1; -+ chip->cc2 = cc2; -+ tcpm_cc_change(dev); -+ } -+ /* turn off toggling */ -+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); -+ if (ret) { -+ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret); -+ return ret; -+ } -+ /* unmask bc_lvl interrupt */ -+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL); -+ if (ret) { -+ dev_err(dev, "cannot unmask bc_lcl irq, ret=%d\n", ret); -+ return ret; -+ } -+ chip->intr_bc_lvl = true; -+ dev_dbg(dev, "detected cc1=%s, cc2=%s\n", -+ typec_cc_status_name[cc1], -+ typec_cc_status_name[cc2]); -+ -+ return ret; -+} -+ -+/* On error returns < 0, otherwise a typec_cc_status value */ -+static int fusb302_get_src_cc_status(struct udevice *dev, -+ enum typec_cc_polarity cc_polarity, -+ enum typec_cc_status *cc) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ u8 ra_mda = ra_mda_value[chip->src_current_status]; -+ u8 rd_mda = rd_mda_value[chip->src_current_status]; -+ u8 switches0_data, status0; -+ int ret; -+ -+ /* Step 1: Set switches so that we measure the right CC pin */ -+ switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ? -+ FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 : -+ FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2; -+ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data); -+ if (ret < 0) -+ return ret; -+ -+ fusb302_i2c_read(dev, FUSB_REG_SWITCHES0, &status0); -+ dev_dbg(dev, "get_src_cc_status switches: 0x%0x", status0); -+ -+ /* Step 2: Set compararator volt to differentiate between Open and Rd */ -+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); -+ if (ret) -+ return ret; -+ -+ udelay(100); -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); -+ if (ret) -+ return ret; -+ -+ dev_dbg(dev, "get_src_cc_status rd_mda status0: 0x%0x", status0); -+ if (status0 & FUSB_REG_STATUS0_COMP) { -+ *cc = TYPEC_CC_OPEN; -+ return 0; -+ } -+ -+ /* Step 3: Set compararator input to differentiate between Rd and Ra. */ -+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, ra_mda); -+ if (ret) -+ return ret; -+ -+ udelay(100); -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); -+ if (ret) -+ return ret; -+ -+ dev_dbg(dev, "get_src_cc_status ra_mda status0: 0x%0x", status0); -+ if (status0 & FUSB_REG_STATUS0_COMP) -+ *cc = TYPEC_CC_RD; -+ else -+ *cc = TYPEC_CC_RA; -+ -+ return 0; -+} -+ -+static int fusb302_handle_togdone_src(struct udevice *dev, -+ u8 togdone_result) -+{ -+ /* -+ * - set polarity (measure cc, vconn, tx) -+ * - set pull_up, pull_down -+ * - set cc1, cc2, and update to tcpm state machine -+ * - set I_COMP interrupt on -+ */ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ u8 rd_mda = rd_mda_value[chip->src_current_status]; -+ enum toggling_mode toggling_mode = chip->toggling_mode; -+ enum typec_cc_polarity cc_polarity; -+ enum typec_cc_status cc1, cc2; -+ int ret; -+ -+ /* -+ * The toggle-engine will stop in a src state if it sees either Ra or -+ * Rd. Determine the status for both CC pins, starting with the one -+ * where toggling stopped, as that is where the switches point now. -+ */ -+ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) -+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1); -+ else -+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2); -+ if (ret) -+ return ret; -+ /* we must turn off toggling before we can measure the other pin */ -+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF); -+ if (ret) { -+ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret); -+ return ret; -+ } -+ /* get the status of the other pin */ -+ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) -+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2); -+ else -+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1); -+ if (ret) -+ return ret; -+ -+ /* determine polarity based on the status of both pins */ -+ if (cc1 == TYPEC_CC_RD && (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) { -+ cc_polarity = TYPEC_POLARITY_CC1; -+ } else if (cc2 == TYPEC_CC_RD && -+ (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) { -+ cc_polarity = TYPEC_POLARITY_CC2; -+ } else { -+ dev_err(dev, "unexpected CC status cc1=%s, cc2=%s, restarting toggling\n", -+ typec_cc_status_name[cc1], -+ typec_cc_status_name[cc2]); -+ return fusb302_set_toggling(dev, toggling_mode); -+ } -+ /* set polarity and pull_up, pull_down */ -+ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, true, false); -+ if (ret < 0) { -+ dev_err(dev, "cannot set cc polarity %s, ret=%d\n", -+ cc_polarity_name[cc_polarity], ret); -+ return ret; -+ } -+ /* update tcpm with the new cc value */ -+ if (chip->cc1 != cc1 || chip->cc2 != cc2) { -+ chip->cc1 = cc1; -+ chip->cc2 = cc2; -+ tcpm_cc_change(dev); -+ } -+ /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */ -+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda); -+ if (ret) -+ return ret; -+ /* unmask comp_chng interrupt */ -+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, -+ FUSB_REG_MASK_COMP_CHNG); -+ if (ret) { -+ dev_err(dev, "cannot unmask comp_chng irq, ret=%d\n", ret); -+ return ret; -+ } -+ chip->intr_comp_chng = true; -+ dev_dbg(dev, "detected cc1=%s, cc2=%s\n", -+ typec_cc_status_name[cc1], -+ typec_cc_status_name[cc2]); -+ -+ return ret; -+} -+ -+static int fusb302_handle_togdone(struct udevice *dev) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ u8 togdone_result, status1a; -+ int ret; -+ -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS1A, &status1a); -+ if (ret < 0) -+ return ret; -+ togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) & -+ FUSB_REG_STATUS1A_TOGSS_MASK; -+ switch (togdone_result) { -+ case FUSB_REG_STATUS1A_TOGSS_SNK1: -+ case FUSB_REG_STATUS1A_TOGSS_SNK2: -+ return fusb302_handle_togdone_snk(dev, togdone_result); -+ case FUSB_REG_STATUS1A_TOGSS_SRC1: -+ case FUSB_REG_STATUS1A_TOGSS_SRC2: -+ return fusb302_handle_togdone_src(dev, togdone_result); -+ case FUSB_REG_STATUS1A_TOGSS_AA: -+ /* doesn't support */ -+ dev_err(dev, "AudioAccessory not supported\n"); -+ fusb302_set_toggling(dev, chip->toggling_mode); -+ break; -+ default: -+ dev_err(dev, "TOGDONE with an invalid state: %d\n", -+ togdone_result); -+ fusb302_set_toggling(dev, chip->toggling_mode); -+ break; -+ } -+ return ret; -+} -+ -+static int fusb302_pd_reset(struct udevice *dev) -+{ -+ return fusb302_i2c_set_bits(dev, FUSB_REG_RESET, -+ FUSB_REG_RESET_PD_RESET); -+} -+ -+static int fusb302_pd_read_message(struct udevice *dev, -+ struct pd_message *msg) -+{ -+ int len, ret; -+ u8 crc[4]; -+ u8 token; -+ -+ /* first SOP token */ -+ ret = fusb302_i2c_read(dev, FUSB_REG_FIFOS, &token); -+ if (ret) -+ return ret; -+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 2, -+ (u8 *)&msg->header); -+ if (ret) -+ return ret; -+ len = pd_header_cnt_le(msg->header) * 4; -+ /* add 4 to length to include the CRC */ -+ if (len > PD_MAX_PAYLOAD * 4) { -+ dev_err(dev, "PD message too long %d\n", len); -+ return -EINVAL; -+ } -+ if (len > 0) { -+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, len, -+ (u8 *)msg->payload); -+ if (ret) -+ return ret; -+ } -+ /* another 4 bytes to read CRC out */ -+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 4, crc); -+ if (ret) -+ return ret; -+ dev_dbg(dev, "Received PD message (header=0x%x len=%d)\n", msg->header, len); -+ -+ /* -+ * Check if we've read off a GoodCRC message. If so then indicate to -+ * TCPM that the previous transmission has completed. Otherwise we pass -+ * the received message over to TCPM for processing. -+ * -+ * We make this check here instead of basing the reporting decision on -+ * the IRQ event type, as it's possible for the chip to report the -+ * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need -+ * to check the message type to ensure correct reporting to TCPM. -+ */ -+ if (!len && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC)) -+ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS); -+ else -+ tcpm_pd_receive(dev, msg); -+ -+ return ret; -+} -+ -+static void fusb302_interrupt_handle(struct udevice *dev) -+{ -+ struct fusb302_chip *chip = dev_get_priv(dev); -+ u8 interrupt; -+ u8 interrupta; -+ u8 interruptb; -+ u8 status0; -+ bool vbus_present; -+ bool comp_result; -+ bool intr_togdone; -+ bool intr_bc_lvl; -+ bool intr_comp_chng; -+ struct pd_message pd_msg; -+ int ret; -+ -+ /* grab a snapshot of intr flags */ -+ intr_togdone = chip->intr_togdone; -+ intr_bc_lvl = chip->intr_bc_lvl; -+ intr_comp_chng = chip->intr_comp_chng; -+ -+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPT, &interrupt); -+ if (ret) -+ return; -+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTA, &interrupta); -+ if (ret) -+ return; -+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTB, &interruptb); -+ if (ret) -+ return; -+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0); -+ if (ret) -+ return; -+ -+ /* -+ * Since we are polling the IRQs, avoid printing messages when there -+ * no interrupts at all to avoid spamming the log. -+ */ -+ if (interrupt != 0 || interrupta != 0 || interruptb != 0) -+ dev_dbg(dev, "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n", -+ interrupt, interrupta, interruptb, status0); -+ -+ if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) { -+ vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK); -+ dev_dbg(dev, "IRQ: VBUS_OK, vbus=%s\n", -+ vbus_present ? "On" : "Off"); -+ if (vbus_present != chip->vbus_present) { -+ chip->vbus_present = vbus_present; -+ tcpm_vbus_change(dev); -+ } -+ } -+ -+ if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) { -+ dev_dbg(dev, "IRQ: TOGDONE\n"); -+ ret = fusb302_handle_togdone(dev); -+ if (ret) { -+ dev_err(dev, "handle togdone error: %d\n", ret); -+ return; -+ } -+ } -+ -+ if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) { -+ dev_dbg(dev, "IRQ: BC_LVL, handler pending\n"); -+ fusb302_bc_lvl_handler(dev); -+ } -+ -+ if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) { -+ comp_result = !!(status0 & FUSB_REG_STATUS0_COMP); -+ dev_dbg(dev, "IRQ: COMP_CHNG, comp=%s\n", -+ comp_result ? "true" : "false"); -+ if (comp_result) { -+ /* cc level > Rd_threshold, detach */ -+ chip->cc1 = TYPEC_CC_OPEN; -+ chip->cc2 = TYPEC_CC_OPEN; -+ tcpm_cc_change(dev); -+ } -+ } -+ -+ if (interrupt & FUSB_REG_INTERRUPT_COLLISION) { -+ dev_dbg(dev, "IRQ: PD collision\n"); -+ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED); -+ } -+ -+ if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) { -+ dev_dbg(dev, "IRQ: PD retry failed\n"); -+ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED); -+ } -+ -+ if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) { -+ dev_dbg(dev, "IRQ: PD hardreset sent\n"); -+ ret = fusb302_pd_reset(dev); -+ if (ret) { -+ dev_err(dev, "cannot PD reset, ret=%d\n", ret); -+ return; -+ } -+ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS); -+ } -+ -+ if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) { -+ dev_dbg(dev, "IRQ: PD tx success\n"); -+ ret = fusb302_pd_read_message(dev, &pd_msg); -+ if (ret) { -+ dev_err(dev, "cannot read in PD message, ret=%d\n", ret); -+ return; -+ } -+ } -+ -+ if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) { -+ dev_dbg(dev, "IRQ: PD received hardreset\n"); -+ ret = fusb302_pd_reset(dev); -+ if (ret) { -+ dev_err(dev, "cannot PD reset, ret=%d\n", ret); -+ return; -+ } -+ tcpm_pd_hard_reset(dev); -+ } -+ -+ if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) { -+ dev_dbg(dev, "IRQ: PD sent good CRC\n"); -+ ret = fusb302_pd_read_message(dev, &pd_msg); -+ if (ret) { -+ dev_err(dev, "cannot read in PD message, ret=%d\n", ret); -+ return; -+ } -+ } -+} -+ -+static void fusb302_poll_event(struct udevice *dev) -+{ -+ fusb302_interrupt_handle(dev); -+} -+ -+static int fusb302_get_connector_node(struct udevice *dev, ofnode *connector_node) -+{ -+ *connector_node = dev_read_subnode(dev, "connector"); -+ if (!ofnode_valid(*connector_node)) { -+ dev_err(dev, "'connector' node is not found\n"); -+ return -ENODEV; -+ } -+ -+ return 0; -+} -+ -+static struct dm_tcpm_ops fusb302_ops = { -+ .get_connector_node = fusb302_get_connector_node, -+ .init = fusb302_init, -+ .get_vbus = fusb302_get_vbus, -+ .set_cc = fusb302_set_cc, -+ .get_cc = fusb302_get_cc, -+ .set_vconn = fusb302_set_vconn, -+ .set_vbus = fusb302_set_vbus, -+ .set_pd_rx = fusb302_set_pd_rx, -+ .set_roles = fusb302_set_roles, -+ .start_toggling = fusb302_start_toggling, -+ .pd_transmit = fusb302_pd_transmit, -+ .poll_event = fusb302_poll_event, -+ .enter_low_power_mode = fusb302_enter_low_power_mode, -+}; -+ -+static const struct udevice_id fusb302_ids[] = { -+ { .compatible = "fcs,fusb302" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(fusb302) = { -+ .name = "fusb302", -+ .id = UCLASS_TCPM, -+ .of_match = fusb302_ids, -+ .ops = &fusb302_ops, -+ .priv_auto = sizeof(struct fusb302_chip), -+}; -diff --git a/drivers/usb/tcpm/fusb302_reg.h b/drivers/usb/tcpm/fusb302_reg.h -new file mode 100644 -index 000000000000..edc0e4b0f1e6 ---- /dev/null -+++ b/drivers/usb/tcpm/fusb302_reg.h -@@ -0,0 +1,177 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright 2016-2017 Google, Inc -+ * -+ * Fairchild FUSB302 Type-C Chip Driver -+ */ -+ -+#ifndef FUSB302_REG_H -+#define FUSB302_REG_H -+ -+#define FUSB_REG_DEVICE_ID 0x01 -+#define FUSB_REG_SWITCHES0 0x02 -+#define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7) -+#define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6) -+#define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5) -+#define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4) -+#define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3) -+#define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2) -+#define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1) -+#define FUSB_REG_SWITCHES0_CC1_PD_EN BIT(0) -+#define FUSB_REG_SWITCHES1 0x03 -+#define FUSB_REG_SWITCHES1_POWERROLE BIT(7) -+#define FUSB_REG_SWITCHES1_SPECREV1 BIT(6) -+#define FUSB_REG_SWITCHES1_SPECREV0 BIT(5) -+#define FUSB_REG_SWITCHES1_DATAROLE BIT(4) -+#define FUSB_REG_SWITCHES1_AUTO_GCRC BIT(2) -+#define FUSB_REG_SWITCHES1_TXCC2_EN BIT(1) -+#define FUSB_REG_SWITCHES1_TXCC1_EN BIT(0) -+#define FUSB_REG_MEASURE 0x04 -+#define FUSB_REG_MEASURE_MDAC5 BIT(7) -+#define FUSB_REG_MEASURE_MDAC4 BIT(6) -+#define FUSB_REG_MEASURE_MDAC3 BIT(5) -+#define FUSB_REG_MEASURE_MDAC2 BIT(4) -+#define FUSB_REG_MEASURE_MDAC1 BIT(3) -+#define FUSB_REG_MEASURE_MDAC0 BIT(2) -+#define FUSB_REG_MEASURE_VBUS BIT(1) -+#define FUSB_REG_MEASURE_XXXX5 BIT(0) -+#define FUSB_REG_CONTROL0 0x06 -+#define FUSB_REG_CONTROL0_TX_FLUSH BIT(6) -+#define FUSB_REG_CONTROL0_INT_MASK BIT(5) -+#define FUSB_REG_CONTROL0_HOST_CUR_MASK (0xC) -+#define FUSB_REG_CONTROL0_HOST_CUR_HIGH (0xC) -+#define FUSB_REG_CONTROL0_HOST_CUR_MED (0x8) -+#define FUSB_REG_CONTROL0_HOST_CUR_DEF (0x4) -+#define FUSB_REG_CONTROL0_TX_START BIT(0) -+#define FUSB_REG_CONTROL1 0x07 -+#define FUSB_REG_CONTROL1_ENSOP2DB BIT(6) -+#define FUSB_REG_CONTROL1_ENSOP1DB BIT(5) -+#define FUSB_REG_CONTROL1_BIST_MODE2 BIT(4) -+#define FUSB_REG_CONTROL1_RX_FLUSH BIT(2) -+#define FUSB_REG_CONTROL1_ENSOP2 BIT(1) -+#define FUSB_REG_CONTROL1_ENSOP1 BIT(0) -+#define FUSB_REG_CONTROL2 0x08 -+#define FUSB_REG_CONTROL2_MODE BIT(1) -+#define FUSB_REG_CONTROL2_MODE_MASK (0x6) -+#define FUSB_REG_CONTROL2_MODE_DFP (0x6) -+#define FUSB_REG_CONTROL2_MODE_UFP (0x4) -+#define FUSB_REG_CONTROL2_MODE_DRP (0x2) -+#define FUSB_REG_CONTROL2_MODE_NONE (0x0) -+#define FUSB_REG_CONTROL2_TOGGLE BIT(0) -+#define FUSB_REG_CONTROL3 0x09 -+#define FUSB_REG_CONTROL3_SEND_HARDRESET BIT(6) -+#define FUSB_REG_CONTROL3_BIST_TMODE BIT(5) /* 302B Only */ -+#define FUSB_REG_CONTROL3_AUTO_HARDRESET BIT(4) -+#define FUSB_REG_CONTROL3_AUTO_SOFTRESET BIT(3) -+#define FUSB_REG_CONTROL3_N_RETRIES BIT(1) -+#define FUSB_REG_CONTROL3_N_RETRIES_MASK (0x6) -+#define FUSB_REG_CONTROL3_N_RETRIES_3 (0x6) -+#define FUSB_REG_CONTROL3_N_RETRIES_2 (0x4) -+#define FUSB_REG_CONTROL3_N_RETRIES_1 (0x2) -+#define FUSB_REG_CONTROL3_AUTO_RETRY BIT(0) -+#define FUSB_REG_MASK 0x0A -+#define FUSB_REG_MASK_VBUSOK BIT(7) -+#define FUSB_REG_MASK_ACTIVITY BIT(6) -+#define FUSB_REG_MASK_COMP_CHNG BIT(5) -+#define FUSB_REG_MASK_CRC_CHK BIT(4) -+#define FUSB_REG_MASK_ALERT BIT(3) -+#define FUSB_REG_MASK_WAKE BIT(2) -+#define FUSB_REG_MASK_COLLISION BIT(1) -+#define FUSB_REG_MASK_BC_LVL BIT(0) -+#define FUSB_REG_POWER 0x0B -+#define FUSB_REG_POWER_PWR BIT(0) -+#define FUSB_REG_POWER_PWR_LOW 0x1 -+#define FUSB_REG_POWER_PWR_MEDIUM 0x3 -+#define FUSB_REG_POWER_PWR_HIGH 0x7 -+#define FUSB_REG_POWER_PWR_ALL 0xF -+#define FUSB_REG_RESET 0x0C -+#define FUSB_REG_RESET_PD_RESET BIT(1) -+#define FUSB_REG_RESET_SW_RESET BIT(0) -+#define FUSB_REG_MASKA 0x0E -+#define FUSB_REG_MASKA_OCP_TEMP BIT(7) -+#define FUSB_REG_MASKA_TOGDONE BIT(6) -+#define FUSB_REG_MASKA_SOFTFAIL BIT(5) -+#define FUSB_REG_MASKA_RETRYFAIL BIT(4) -+#define FUSB_REG_MASKA_HARDSENT BIT(3) -+#define FUSB_REG_MASKA_TX_SUCCESS BIT(2) -+#define FUSB_REG_MASKA_SOFTRESET BIT(1) -+#define FUSB_REG_MASKA_HARDRESET BIT(0) -+#define FUSB_REG_MASKB 0x0F -+#define FUSB_REG_MASKB_GCRCSENT BIT(0) -+#define FUSB_REG_STATUS0A 0x3C -+#define FUSB_REG_STATUS0A_SOFTFAIL BIT(5) -+#define FUSB_REG_STATUS0A_RETRYFAIL BIT(4) -+#define FUSB_REG_STATUS0A_POWER BIT(2) -+#define FUSB_REG_STATUS0A_RX_SOFT_RESET BIT(1) -+#define FUSB_REG_STATUS0A_RX_HARD_RESET BIT(0) -+#define FUSB_REG_STATUS1A 0x3D -+#define FUSB_REG_STATUS1A_TOGSS BIT(3) -+#define FUSB_REG_STATUS1A_TOGSS_RUNNING 0x0 -+#define FUSB_REG_STATUS1A_TOGSS_SRC1 0x1 -+#define FUSB_REG_STATUS1A_TOGSS_SRC2 0x2 -+#define FUSB_REG_STATUS1A_TOGSS_SNK1 0x5 -+#define FUSB_REG_STATUS1A_TOGSS_SNK2 0x6 -+#define FUSB_REG_STATUS1A_TOGSS_AA 0x7 -+#define FUSB_REG_STATUS1A_TOGSS_POS (3) -+#define FUSB_REG_STATUS1A_TOGSS_MASK (0x7) -+#define FUSB_REG_STATUS1A_RXSOP2DB BIT(2) -+#define FUSB_REG_STATUS1A_RXSOP1DB BIT(1) -+#define FUSB_REG_STATUS1A_RXSOP BIT(0) -+#define FUSB_REG_INTERRUPTA 0x3E -+#define FUSB_REG_INTERRUPTA_OCP_TEMP BIT(7) -+#define FUSB_REG_INTERRUPTA_TOGDONE BIT(6) -+#define FUSB_REG_INTERRUPTA_SOFTFAIL BIT(5) -+#define FUSB_REG_INTERRUPTA_RETRYFAIL BIT(4) -+#define FUSB_REG_INTERRUPTA_HARDSENT BIT(3) -+#define FUSB_REG_INTERRUPTA_TX_SUCCESS BIT(2) -+#define FUSB_REG_INTERRUPTA_SOFTRESET BIT(1) -+#define FUSB_REG_INTERRUPTA_HARDRESET BIT(0) -+#define FUSB_REG_INTERRUPTB 0x3F -+#define FUSB_REG_INTERRUPTB_GCRCSENT BIT(0) -+#define FUSB_REG_STATUS0 0x40 -+#define FUSB_REG_STATUS0_VBUSOK BIT(7) -+#define FUSB_REG_STATUS0_ACTIVITY BIT(6) -+#define FUSB_REG_STATUS0_COMP BIT(5) -+#define FUSB_REG_STATUS0_CRC_CHK BIT(4) -+#define FUSB_REG_STATUS0_ALERT BIT(3) -+#define FUSB_REG_STATUS0_WAKE BIT(2) -+#define FUSB_REG_STATUS0_BC_LVL_MASK 0x03 -+#define FUSB_REG_STATUS0_BC_LVL_0_200 0x0 -+#define FUSB_REG_STATUS0_BC_LVL_200_600 0x1 -+#define FUSB_REG_STATUS0_BC_LVL_600_1230 0x2 -+#define FUSB_REG_STATUS0_BC_LVL_1230_MAX 0x3 -+#define FUSB_REG_STATUS0_BC_LVL1 BIT(1) -+#define FUSB_REG_STATUS0_BC_LVL0 BIT(0) -+#define FUSB_REG_STATUS1 0x41 -+#define FUSB_REG_STATUS1_RXSOP2 BIT(7) -+#define FUSB_REG_STATUS1_RXSOP1 BIT(6) -+#define FUSB_REG_STATUS1_RX_EMPTY BIT(5) -+#define FUSB_REG_STATUS1_RX_FULL BIT(4) -+#define FUSB_REG_STATUS1_TX_EMPTY BIT(3) -+#define FUSB_REG_STATUS1_TX_FULL BIT(2) -+#define FUSB_REG_INTERRUPT 0x42 -+#define FUSB_REG_INTERRUPT_VBUSOK BIT(7) -+#define FUSB_REG_INTERRUPT_ACTIVITY BIT(6) -+#define FUSB_REG_INTERRUPT_COMP_CHNG BIT(5) -+#define FUSB_REG_INTERRUPT_CRC_CHK BIT(4) -+#define FUSB_REG_INTERRUPT_ALERT BIT(3) -+#define FUSB_REG_INTERRUPT_WAKE BIT(2) -+#define FUSB_REG_INTERRUPT_COLLISION BIT(1) -+#define FUSB_REG_INTERRUPT_BC_LVL BIT(0) -+#define FUSB_REG_FIFOS 0x43 -+ -+/* Tokens defined for the FUSB302 TX FIFO */ -+enum fusb302_txfifo_tokens { -+ FUSB302_TKN_TXON = 0xA1, -+ FUSB302_TKN_SYNC1 = 0x12, -+ FUSB302_TKN_SYNC2 = 0x13, -+ FUSB302_TKN_SYNC3 = 0x1B, -+ FUSB302_TKN_RST1 = 0x15, -+ FUSB302_TKN_RST2 = 0x16, -+ FUSB302_TKN_PACKSYM = 0x80, -+ FUSB302_TKN_JAMCRC = 0xFF, -+ FUSB302_TKN_EOP = 0x14, -+ FUSB302_TKN_TXOFF = 0xFE, -+}; -+ -+#endif - -From patchwork Thu Sep 5 15:08:39 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sebastian Reichel -X-Patchwork-Id: 1981310 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=collabora.com header.i=@collabora.com - header.a=rsa-sha256 header.s=mail header.b=OlVGM1CY; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) 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rock5b-rk3588: enable USB-C in operating system -Date: Thu, 5 Sep 2024 17:08:39 +0200 -Message-ID: <20240905151707.59101-4-sebastian.reichel@collabora.com> -X-Mailer: git-send-email 2.45.2 -In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> -References: <20240905151707.59101-1-sebastian.reichel@collabora.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Since older U-Boot releases do not negotiate USB PD, the kernel -DT may not enable the USB-C controller by default to avoid a -regression. The plan is to upstream it with 'status = "fail";' -instead. U-Boot should then mark it as 'status = "okay";' if -it negotiated USB PD. Currently existing upstream kernel DTs do -not yet have the USB-C controller at all, so we ignore any -failures. - -Reviewed-by: Kever Yang -Tested-by: Soeren Moch -Signed-off-by: Sebastian Reichel ---- - board/radxa/rock5b-rk3588/Makefile | 6 ++++++ - board/radxa/rock5b-rk3588/rock5b-rk3588.c | 16 ++++++++++++++++ - 2 files changed, 22 insertions(+) - create mode 100644 board/radxa/rock5b-rk3588/Makefile - create mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c - -diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile -new file mode 100644 -index 000000000000..95d813596da4 ---- /dev/null -+++ b/board/radxa/rock5b-rk3588/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# Copyright (c) 2022 Collabora Ltd. -+# -+ -+obj-y += rock5b-rk3588.o -diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c -new file mode 100644 -index 000000000000..fc2f69db2241 ---- /dev/null -+++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c -@@ -0,0 +1,16 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2023-2024 Collabora Ltd. -+ */ -+ -+#include -+#include -+ -+#ifdef CONFIG_OF_BOARD_SETUP -+int ft_board_setup(void *blob, struct bd_info *bd) -+{ -+ if (IS_ENABLED(CONFIG_TYPEC_FUSB302)) -+ fdt_status_okay_by_compatible(blob, "fcs,fusb302"); -+ return 0; -+} -+#endif - -From patchwork Thu Sep 5 15:08:40 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sebastian Reichel -X-Patchwork-Id: 1981311 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=collabora.com header.i=@collabora.com - header.a=rsa-sha256 header.s=mail header.b=Hn8Z4MVu; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) - (No client certificate requested) - by legolas.ozlabs.org (Postfix) with ESMTPS id 4X02z82c6zz1yXY - for ; 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- Thu, 5 Sep 2024 17:17:07 +0200 (CEST) -Received: by jupiter.universe (Postfix, from userid 1000) - id A518D4800F8; Thu, 05 Sep 2024 17:17:07 +0200 (CEST) -From: Sebastian Reichel -To: Marek Vasut , u-boot@lists.denx.de, - Jonas Karlman , Soeren Moch -Cc: Eugen Hristev , - Tim Harvey , Kever Yang , - Philipp Tomsich , Simon Glass , - Sebastian Reichel -Subject: [PATCH v6 4/6] rockchip: rk3588-rock-5b: Add USB-C controller to - u-boot.dtsi -Date: Thu, 5 Sep 2024 17:08:40 +0200 -Message-ID: <20240905151707.59101-5-sebastian.reichel@collabora.com> -X-Mailer: git-send-email 2.45.2 -In-Reply-To: <20240905151707.59101-1-sebastian.reichel@collabora.com> -References: <20240905151707.59101-1-sebastian.reichel@collabora.com> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Add USB-C controller (fusb302), which will be used by U-Boot to -initialize USB-PD. This is needed, because USB-PD communication -must happen within 5 seconds after the USB-C connector got plugged. -On my Rock 5B it often takes 5 seconds to jump to the Linux binary, -so it must happen before Linux is initialized. - -This adds the DT node to the U-Boot specific file, since the Linux -kernel DT currently does not describe it to avoid a system reset. -The plan is to add it to the Linux DT with status = 'fail' and then -let U-Boot mark it as status = 'okay' if it properly dealt with -early USB-PD initialization. Until the Kernel DT has the node, let's -add it in U-Boot to get things going. - -Reviewed-by: Kever Yang -Tested-by: Soeren Moch -Signed-off-by: Sebastian Reichel ---- - arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 28 +++++++++++++++++++++++++ - 1 file changed, 28 insertions(+) - -diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -index 4dd17ff408cb..b0ad1158854c 100644 ---- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -@@ -3,6 +3,7 @@ - * Copyright (c) 2023 Collabora Ltd. - */ - -+#include - #include "rk3588-u-boot.dtsi" - - &fspim2_pins { -@@ -10,6 +11,33 @@ - bootph-some-ram; - }; - -+&i2c4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c4m1_xfer>; -+ status = "okay"; -+ -+ usbc0: usb-typec@22 { -+ compatible = "fcs,fusb302"; -+ reg = <0x22>; -+ interrupt-parent = <&gpio3>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ usb_con: connector { -+ compatible = "usb-c-connector"; -+ label = "USB-C"; -+ data-role = "dual"; -+ power-role = "sink"; -+ try-power-role = "sink"; -+ op-sink-microwatt = <1000000>; -+ sink-pdos = -+ , -+ ; -+ }; -+ }; -+}; -+ - &sdhci { - cap-mmc-highspeed; - mmc-hs200-1_8v; - -From patchwork Thu Sep 5 15:08:41 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Sebastian Reichel -X-Patchwork-Id: 1981313 -X-Patchwork-Delegate: ykai007@gmail.com -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=collabora.com header.i=@collabora.com - header.a=rsa-sha256 header.s=mail header.b=q3YksfJp; - dkim-atps=neutral -Authentication-Results: legolas.ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; 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a=openpgp; - fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -We don't actually need any clocks to get UFS up and running, resets are -useful though. - -Reviewed-by: Neil Armstrong -Signed-off-by: Caleb Connolly ---- - drivers/clk/qcom/Kconfig | 8 +++ - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/clock-qcom.h | 1 + - drivers/clk/qcom/clock-sc7280.c | 132 ++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 142 insertions(+) - -diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig -index 45d63c6d6dbf..0d2c0ac225c5 100644 ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -85,7 +85,15 @@ config CLK_QCOM_SM8650 - Say Y here to enable support for the Global Clock Controller - on the Snapdragon SM8650 SoC. This driver supports the clocks - and resets exposed by the GCC hardware block. - -+config CLK_QCOM_SC7280 -+ bool "Qualcomm SC7280 GCC" -+ select CLK_QCOM -+ help -+ Say Y here to enable support for the Global Clock Controller -+ on the Snapdragon SC7280 SoC. This driver supports the clocks -+ and resets exposed by the GCC hardware block. -+ - endmenu - - endif -diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile -index dec20e4b5943..e223c131ee4d 100644 ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -8,8 +8,9 @@ obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o - obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o - obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o - obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o - obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o -+obj-$(CONFIG_CLK_QCOM_SC7280) += clock-sc7280.o - obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o - obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o - obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o - obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o -diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h -index f6445c8f566f..7aa6ca59aad5 100644 ---- a/drivers/clk/qcom/clock-qcom.h -+++ b/drivers/clk/qcom/clock-qcom.h -@@ -10,8 +10,9 @@ - #define CFG_CLK_SRC_CXO (0 << 8) - #define CFG_CLK_SRC_GPLL0 (1 << 8) - #define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8) - #define CFG_CLK_SRC_GPLL9 (2 << 8) -+#define CFG_CLK_SRC_GPLL0_ODD (3 << 8) - #define CFG_CLK_SRC_GPLL6 (4 << 8) - #define CFG_CLK_SRC_GPLL7 (3 << 8) - #define CFG_CLK_SRC_GPLL4 (5 << 8) - #define CFG_CLK_SRC_GPLL0_EVEN (6 << 8) -diff --git a/drivers/clk/qcom/clock-sc7280.c b/drivers/clk/qcom/clock-sc7280.c -new file mode 100644 -index 000000000000..5d343f120519 ---- /dev/null -+++ b/drivers/clk/qcom/clock-sc7280.c -@@ -0,0 +1,132 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Clock drivers for Qualcomm sc7280 -+ * -+ * (C) Copyright 2024 Linaro Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "clock-qcom.h" -+ -+#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038 -+#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020 -+ -+static ulong sc7280_set_rate(struct clk *clk, ulong rate) -+{ -+ struct msm_clk_priv *priv = dev_get_priv(clk->dev); -+ -+ if (clk->id < priv->data->num_clks) -+ debug("%s: %s, requested rate=%ld\n", __func__, priv->data->clks[clk->id].name, rate); -+ -+ switch (clk->id) { -+ case GCC_USB30_PRIM_MOCK_UTMI_CLK: -+ WARN(rate != 19200000, "Unexpected rate for USB30_PRIM_MOCK_UTMI_CLK: %lu\n", rate); -+ clk_rcg_set_rate(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, 0, CFG_CLK_SRC_CXO); -+ return rate; -+ case GCC_USB30_PRIM_MASTER_CLK: -+ WARN(rate != 200000000, "Unexpected rate for USB30_PRIM_MASTER_CLK: %lu\n", rate); -+ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, -+ 1, 0, 0, CFG_CLK_SRC_GPLL0_ODD, 8); -+ clk_rcg_set_rate(priv->base, 0xf064, 0, 0); -+ return rate; -+ default: -+ return 0; -+ } -+} -+ -+static const struct gate_clk sc7280_clks[] = { -+ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0xf07c, 1), -+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0xf010, 1), -+ GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0xf080, 1), -+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0xf018, 1), -+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0xf01c, 1), -+ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0xf054, 1), -+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0xf058, 1), -+}; -+ -+static int sc7280_enable(struct clk *clk) -+{ -+ struct msm_clk_priv *priv = dev_get_priv(clk->dev); -+ -+ if (priv->data->num_clks < clk->id) { -+ debug("%s: unknown clk id %lu\n", __func__, clk->id); -+ return 0; -+ } -+ -+ debug("%s: clk %ld: %s\n", __func__, clk->id, sc7280_clks[clk->id].name); -+ -+ switch (clk->id) { -+ case GCC_AGGRE_USB3_PRIM_AXI_CLK: -+ qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); -+ fallthrough; -+ case GCC_USB30_PRIM_MASTER_CLK: -+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); -+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); -+ break; -+ } -+ -+ qcom_gate_clk_en(priv, clk->id); -+ -+ return 0; -+} -+ -+static const struct qcom_reset_map sc7280_gcc_resets[] = { -+ [GCC_PCIE_0_BCR] = { 0x6b000 }, -+ [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, -+ [GCC_PCIE_1_BCR] = { 0x8d000 }, -+ [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, -+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, -+ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, -+ [GCC_SDCC1_BCR] = { 0x75000 }, -+ [GCC_SDCC2_BCR] = { 0x14000 }, -+ [GCC_SDCC4_BCR] = { 0x16000 }, -+ [GCC_UFS_PHY_BCR] = { 0x77000 }, -+ [GCC_USB30_PRIM_BCR] = { 0xf000 }, -+ [GCC_USB30_SEC_BCR] = { 0x9e000 }, -+ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, -+ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, -+ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, -+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, -+}; -+ -+static const struct qcom_power_map sc7280_gdscs[] = { -+ [GCC_UFS_PHY_GDSC] = { 0x77004 }, -+ [GCC_USB30_PRIM_GDSC] = { 0xf004 }, -+}; -+ -+static struct msm_clk_data qcs404_gcc_data = { -+ .resets = sc7280_gcc_resets, -+ .num_resets = ARRAY_SIZE(sc7280_gcc_resets), -+ .clks = sc7280_clks, -+ .num_clks = ARRAY_SIZE(sc7280_clks), -+ -+ .power_domains = sc7280_gdscs, -+ .num_power_domains = ARRAY_SIZE(sc7280_gdscs), -+ -+ .enable = sc7280_enable, -+ .set_rate = sc7280_set_rate, -+}; -+ -+static const struct udevice_id gcc_sc7280_of_match[] = { -+ { -+ .compatible = "qcom,gcc-sc7280", -+ .data = (ulong)&qcs404_gcc_data, -+ }, -+ { } -+}; -+ -+U_BOOT_DRIVER(gcc_sc7280) = { -+ .name = "gcc_sc7280", -+ .id = UCLASS_NOP, -+ .of_match = gcc_sc7280_of_match, -+ .bind = qcom_cc_bind, -+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, -+}; - -From patchwork Wed Aug 21 13:41:47 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Caleb Connolly -X-Patchwork-Id: 1974971 -X-Patchwork-Delegate: caleb.connolly@linaro.org -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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- Wed, 21 Aug 2024 06:41:55 -0700 (PDT) -From: Caleb Connolly -Date: Wed, 21 Aug 2024 15:41:47 +0200 -Subject: [PATCH v2 2/7] dts: qcs6490-rb3gen2-u-boot: add override dtsi -MIME-Version: 1.0 -Message-Id: <20240821-b4-rb3gen2-v2-2-49b07633f3a8@linaro.org> -References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -To: Tom Rini , Lukasz Majewski , - Sean Anderson , - Caleb Connolly , - Neil Armstrong , - Sumit Garg -Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io -X-Mailer: b4 0.14-dev -X-Developer-Signature: v=1; a=openpgp-sha256; l=1273; - i=caleb.connolly@linaro.org; h=from:subject:message-id; - bh=WycUvGIX1Vb2Dt9TSRhlFTIc8lgmewYYBQWg2kxs6NI=; - b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6djNLXRIVPQZZW1FVYvOn/tPtr3vGLbnTcN - EIiqQUfY2uJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k - tnN7D/0d90bQBLWvZQ8d0lHinZ/3zwe3FEdaLK31OGRD7VJd7Q8ckuOxOF/eO8TLmksQovgvrTY - 68llyxkNZe/nnmY9UX+DJ+i5pzqINuLlGRqANukMePwwJxJZilb6dRXB9sR+hSBHC+YTyfY67xk - 78ILyZhMmZqmi/ya6lBqxLieP+CnHq1V9n07s3jljhE1oSp4NucQzFXpv48MGEpOt/sIyjtzQ5w - aw7r1Wsay9w+xmNly+kBT+05q5dp/CTnqMp1koKGG/fWWkSZUgo5yODYeRAiieb7ZQ5JaVmxJkf - G3K0BPkFJ+kaPyU6Mbe0d573tY+oZsWDWEBFP/diduz8lw27tIDOmpTIyT8lMsu1vL7dcj38NsS - 50a7smXimMWcKwJsEQV32Tw0QYv4kfJyqjxXVj6kJ+DWL1bm15LZ6fZpXy3tbTHzJvWRr2Lx/AZ - mWXbylc+uUx4tQkb+7+OhSN376NPfWUNlGHMdHSfQHgzcFuGbMmf9v58sPXa7ZKb3UFkKk2MAzA - 8kiDEMgp/6k55lHxdc4ndxK/vXTKxiU59H2k+okeAQ2iMnA39r/M7yOe6a8vyXDyeuCmJHncNAX - /Uy4yr757EQpUKygo3DjdfRcZQ/h5hQ2TFiWm3BlU87k8MlQl5JEGwxqpkM+9JXFjRwiGcR2ZSO - fOkmL+X6FXNHw3A== -X-Developer-Key: i=caleb.connolly@linaro.org; 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We *should* -+ * have two nodes here, but ABL does NOT like that. -+ * sooo we're stuck with this. -+ */ -+ memory@80000000 { -+ device_type = "memory"; -+ reg = <0 0x80000000 0 0x3A800000>, -+ <0 0xC0000000 0 0x01800000>, -+ <0 0xC3400000 0 0x3CC00000>, -+ <1 0x00000000 1 0x00000000>; -+ }; -+}; -+ -+// RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 -+// RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 -+// RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 -+// RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 - -From patchwork Wed Aug 21 13:41:48 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Caleb Connolly -X-Patchwork-Id: 1974972 -X-Patchwork-Delegate: caleb.connolly@linaro.org -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; - dkim=pass (2048-bit key; - unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 - header.s=google header.b=W/enKPtj; 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- Wed, 21 Aug 2024 06:41:56 -0700 (PDT) -From: Caleb Connolly -Date: Wed, 21 Aug 2024 15:41:48 +0200 -Subject: [PATCH v2 3/7] dts: qcs6490-rb3gen2-u-boot: USB host mode -MIME-Version: 1.0 -Message-Id: <20240821-b4-rb3gen2-v2-3-49b07633f3a8@linaro.org> -References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -To: Tom Rini , Lukasz Majewski , - Sean Anderson , - Caleb Connolly , - Neil Armstrong , - Sumit Garg -Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io -X-Mailer: b4 0.14-dev -X-Developer-Signature: v=1; a=openpgp-sha256; l=955; - i=caleb.connolly@linaro.org; h=from:subject:message-id; - bh=HTbXxsrMd17GClJdrUxqmv1t42K8cKHfbuWdCzpCB0M=; - b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6djkazDSIeIn+UGkfv2WCzgyN2+Nv9IFp8u - /7f/kVTNzKJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k - tt0qEACLN54DQLVEpmwhpZIBzCPjtaeMTHKNrVejy201O3Ts9I8BmKyuCQmcJReF8E1oTvhVE2p - RRdEnopYd86hGyIc6pZZ1tNwmwCxeADAERIygNKEAGK6f6v29CJZt0OMSVRx7emdUn6wDP0/6FQ - W7zfmxJKZMNp1gEMS80FJSa+PkI148T6WzfmKEfNbENYTwwIwC/e8yqlKXp+joiPv269f/nYbtY - ZR6mW3re0fvIoCbUjHcIRmu5ZWB92qqfwAiSCLLlajpzIF8iDrDyOYOdb7/TxM5eWZloPwDYHaK - 0eJde2EIysMA1TJFP8ynVnUe1c4sZxDLB+ZnVUpbvGTvHjguamxfazEZlUmd1kV6m+ilTqAIlUP - 2v5eY2KUjx+MD8qm5FLgpj6JHDE9jszg3LSETAPwJDk0MICXQoY9HMu03kO8KE62j2HrRwVn7/G - i1agSOBRJyNDHqTiUh2vYQnwwBPANZPjipnQgPkZ6Ebd98KbzzHr9Dh+kR7eC/caSf0V82YK4G8 - mPCaznXAPS+VNfT+JZQxQz7Axm1O7bWfIuSdLGqVGBRj4+4W3k1PzFWI7S46Vj4qWbpJXuWKl6I - UlE67yw71FwYzQt6B7xLMSCr2O8bFmlv42AVl6bNjG53CZ8HmBo5AuKrhbdhpLv5HfjWK1j58tW - Ci+WPJUvj2lPPfg== -X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; - fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Adjust DTS so USB runs in host mode. The type-c port is the only -supported port (since the others need PCIe). Booting from USB is -possible with a powered type-c dock. - -Signed-off-by: Caleb Connolly ---- - arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi -index c3ec4a317f7c..fbe72595f5ac 100644 ---- a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi -+++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi -@@ -16,8 +16,13 @@ - <1 0x00000000 1 0x00000000>; - }; - }; - -+&usb_1_dwc3 { -+ dr_mode = "host"; -+ /delete-property/ usb-role-switch; -+}; -+ - // RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 - // RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 - // RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 - // RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 - -From patchwork Wed Aug 21 13:41:49 2024 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Caleb Connolly -X-Patchwork-Id: 1974973 -X-Patchwork-Delegate: caleb.connolly@linaro.org -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@legolas.ozlabs.org -Authentication-Results: legolas.ozlabs.org; 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- Wed, 21 Aug 2024 06:41:57 -0700 (PDT) -From: Caleb Connolly -Date: Wed, 21 Aug 2024 15:41:49 +0200 -Subject: [PATCH v2 4/7] iommu: qcom-smmu: add sc7280-smmu-500 compatible -MIME-Version: 1.0 -Message-Id: <20240821-b4-rb3gen2-v2-4-49b07633f3a8@linaro.org> -References: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -In-Reply-To: <20240821-b4-rb3gen2-v2-0-49b07633f3a8@linaro.org> -To: Tom Rini , Lukasz Majewski , - Sean Anderson , - Caleb Connolly , - Neil Armstrong , - Sumit Garg -Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io -X-Mailer: b4 0.14-dev -X-Developer-Signature: v=1; a=openpgp-sha256; l=735; - i=caleb.connolly@linaro.org; h=from:subject:message-id; - bh=kxKBScKaYeuETfEZtkdyvgk1CIJk9dkzDtE1GYwaPOI=; - b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmxe6dVYUKBuKYzxniyjNVxYEoPmLImzpJJVKSN - fZ8OGllgq+JAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZsXunQAKCRAFgzErGV9k - thhHD/sEX0G2aVw1Y8dD02U8Fg111EK/PNvDyUlifhchP/sTDJHxyzWJc0zxsb1FtSosTWlnv1i - tgFSLVCLklzMwrcUCZb5Fe/9bWGRL6Uz0dEbDXZohGWagR4SC9MoM/shyb6R7Xm2ywwaR1dBkHM - alh2af0YAoJi0TljeQz70GlUCBAyLiLhLD9/V7JDfkdAgUj1R7tGibGbz7plVk1ySD/JUbXLyRD - Oj3l66FUGleJAA+KrvbPR5sVcA8Zt+Mak0xp5xyjQ0T8TUNfwJF0VUgWEpiVHWZGPgOgw2OnE5U - Iv4mBGteHGHC0WjCdjt/thyn2+QCx/LjPwrBDrsyw6FFyg43yWEmDkEgfCiTDSHMtTMSPLvYbXM - b00Egv5OZrrhIGahpHxdd2Ui/6zicLanexZopGSaMu4DnMnhfm7GGdRxNphtP9VMWwgy+vePa+a - ghVuG+oIgtIOoEwE/SN2zBpMIxLNuzTi3c80xsxh6uA+5VH9X937eNFlB0fouXJjG27Jo4NSbKL - oeSE2rLXYtJ2bCV0ee7E5InyvUsdzHynjewLM0usEvnFHn433yCibXdQ1VjAZJVOJlFwxt85evc - Y/3ckT+iau+N7Z8un7Vhsp2FKf/IR5/QGd1NrfOyZuZ4V3ojqtD71Hymz1874HoW492BdpUytut - 5WHbOvM4jWAm5dQ== -X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; - fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -This soc doesn't have the generic compatible. - -Reviewed-by: Neil Armstrong -Signed-off-by: Caleb Connolly -Reviewed-by: Simon Glass ---- - drivers/iommu/qcom-hyp-smmu.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c -index 7b646d840dd4..1b5a09bb7b39 100644 ---- a/drivers/iommu/qcom-hyp-smmu.c -+++ b/drivers/iommu/qcom-hyp-smmu.c -@@ -380,8 +380,9 @@ static struct iommu_ops qcom_smmu_ops = { - }; - - static const struct udevice_id qcom_smmu500_ids[] = { - { .compatible = "qcom,sdm845-smmu-500" }, -+ { .compatible = "qcom,sc7280-smmu-500" }, - { .compatible = "qcom,smmu-500", }, - { /* sentinel */ } - }; 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a=openpgp; - fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de -X-Virus-Status: Clean - -Introduce a defconfig for the RB3 Gen 2 and other QCM6490 boards with a -dedicated uefi partition. These can replace EDK2 entirely with U-Boot. - -Signed-off-by: Caleb Connolly -Reviewed-by: Simon Glass ---- - MAINTAINERS | 1 + - configs/qcm6490_defconfig | 18 ++++++++++++++++++ - 2 files changed, 19 insertions(+) - -diff --git a/MAINTAINERS b/MAINTAINERS -index daaf0345d0e8..7ab39d91a553 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -616,8 +616,9 @@ M: Neil Armstrong - R: Sumit Garg - L: u-boot-qcom@groups.io - S: Maintained - T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git -+F: configs/qcm6490_defconfig - F: drivers/*/*/pm8???-* - F: drivers/gpio/msm_gpio.c - F: drivers/mmc/msm_sdhci.c - F: drivers/phy/msm8916-usbh-phy.c -diff --git a/configs/qcm6490_defconfig b/configs/qcm6490_defconfig -new file mode 100644 -index 000000000000..25413ac9ed5a ---- /dev/null -+++ b/configs/qcm6490_defconfig -@@ -0,0 +1,18 @@ -+# Configuration for building U-Boot to be flashed -+# to the uefi partition of QCM6490 dev boards with -+# the "Linux Embedded" partition layout (which have -+# a dedicated "uefi" partition for edk2/U-Boot) -+ -+#include "qcom_defconfig" -+ -+CONFIG_DEBUG_UART=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_BASE=0x994000 -+CONFIG_DEBUG_UART_MSM_GENI=y -+CONFIG_DEBUG_UART_CLOCK=14745600 -+ -+# Address where U-Boot will be loaded -+CONFIG_TEXT_BASE=0x9fc00000 -+CONFIG_REMAKE_ELF=y -+ -+CONFIG_DEFAULT_DEVICE_TREE="qcom/qcs6490-rb3gen2" - -From patchwork Wed Aug 21 13:41:52 2024 -Content-Type: text/plain; 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SPDX-License-Identifier: GPL-2.0+ -+.. sectionauthor:: Caleb Connolly -+ -+Qualcomm Robotics RB3 Gen 2 -+=========================== -+ -+The RB3 Gen 2 is a development board based on the Qualcomm QCM6490 SoC (a derivative -+of SC7280). More information can be found on `Qualcomm's product page`_. -+ -+U-Boot can be used as a replacement for Qualcomm's original EDK2 bootloader by -+flashing it directly to the uefi_a (or _b) partition. -+ -+.. _Qualcomm's product page: https://www.qualcomm.com/developer/hardware/rb3-gen-2-development-kit -+ -+Installation -+------------ -+First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``qcm6490``:: -+ -+ $ export CROSS_COMPILE= -+ $ make qcm6490_defconfig -+ $ make -j8 -+ -+This will build ``u-boot.elf`` in the configured output directory. -+ -+Although the RB3 Gen 2 does not have secure boot set up by default, -+the firmware still expects firmware ELF images to be "signed". The signature -+does not provide any security in this case, but it provides the firmware with -+some required metadata. -+ -+To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: -+ -+ $ qtestsign -v6 aboot -o u-boot.mbn u-boot.elf -+ -+Then install the resulting ``u-boot.mbn`` to the ``uefi_a`` partition -+on your device with ``fastboot flash uefi_a u-boot.mbn``. -+ -+U-Boot should be running after a reboot (``fastboot reboot``). -+ -+Note that fastboot is not yet supported in U-Boot on this board, as a result, -+to flash back the original firmware, or new versoins of the U-Boot, EDL mode -+must be used. This can be accessed by pressing the EDL mode button as described -+in the Qualcomm Linux documentation. A tool like bkerler's `edl`_ can be used -+for flashing with the firehose loader binary appropriate for the board. -+ -+.. _qtestsign: https://github.com/msm8916-mainline/qtestsign -+.. _edl: https://github.com/bkerler/edl -+ -+Usage -+----- -+ -+The USB Type-A ports are connected via a PCIe USB hub, which is not supported yet. -+However, the Type-C port can be used with a powered USB dock to connect peripherals -+like a USB stick. diff --git a/aarch64-boards b/aarch64-boards index 0530e42..b66a8a6 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -44,6 +44,7 @@ nanopi_neo_plus2 nanopi_r1s_h5 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 +nanopi-r2s-plus-rk3328 nanopi-r2s-rk3328 nanopi-r4s-rk3399 oceanic_5205_5inmfd @@ -79,6 +80,7 @@ puma-rk3399 qcm6490 qcom qemu_arm64 +qemu_arm64_lwip roc-cc-rk3328 rock-4c-plus-rk3399 rock-4se-rk3399 diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch index 0542ab0..64e6883 100644 --- a/rockchip-Enable-preboot-start-for-pci-usb.patch +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -1,177 +1,10 @@ -From 3665ff79304fcb47427651125ccc2cfac01cb9f1 Mon Sep 17 00:00:00 2001 +From 020f67a37342b091c74dab93a133253401d4d899 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Sat, 25 May 2024 12:23:42 +0100 +Date: Tue, 31 Dec 2024 14:15:41 +0000 Subject: [PATCH] rockchip: Enable preboot start for pci/usb Enable the preboot so nvme works OOTB -Signed-off-by: Peter Robinson ---- - configs/firefly-rk3399_defconfig | 2 ++ - configs/nanopc-t4-rk3399_defconfig | 2 ++ - configs/pinebook-pro-rk3399_defconfig | 1 + - configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ - configs/rock-4c-plus-rk3399_defconfig | 2 ++ - configs/rock-4se-rk3399_defconfig | 2 ++ - configs/rock-pi-4-rk3399_defconfig | 2 ++ - configs/rock-pi-4c-rk3399_defconfig | 2 ++ - configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ - configs/rock960-rk3399_defconfig | 2 ++ - configs/rockpro64-rk3399_defconfig | 2 ++ - 11 files changed, 21 insertions(+) - -diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig -index edacef29edf..71db7b7834e 100644 ---- a/configs/firefly-rk3399_defconfig -+++ b/configs/firefly-rk3399_defconfig -@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_MAX_SIZE=0x40000 -diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig -index c63f4c076d5..7174b82cfa4 100644 ---- a/configs/nanopc-t4-rk3399_defconfig -+++ b/configs/nanopc-t4-rk3399_defconfig -@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_MAX_SIZE=0x40000 -diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig -index 5d3e32f9108..c9b3615f2ff 100644 ---- a/configs/pinebook-pro-rk3399_defconfig -+++ b/configs/pinebook-pro-rk3399_defconfig -@@ -21,6 +21,7 @@ CONFIG_PCI=y - CONFIG_DEBUG_UART=y - CONFIG_BOOTDELAY=3 - CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_SPL_MAX_SIZE=0x40000 -diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig -index a57899bfdfa..bd7030b237c 100644 ---- a/configs/roc-pc-mezzanine-rk3399_defconfig -+++ b/configs/roc-pc-mezzanine-rk3399_defconfig -@@ -20,6 +20,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y -diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig -index 80dc44986e7..0ff8afe8e1e 100644 ---- a/configs/rock-4c-plus-rk3399_defconfig -+++ b/configs/rock-4c-plus-rk3399_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y - CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb" - CONFIG_DISPLAY_BOARDINFO_LATE=y -diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig -index f52d4bf9913..72ff304cff7 100644 ---- a/configs/rock-4se-rk3399_defconfig -+++ b/configs/rock-4se-rk3399_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4se.dtb" -diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig -index e71c4588b94..387dbf83be3 100644 ---- a/configs/rock-pi-4-rk3399_defconfig -+++ b/configs/rock-pi-4-rk3399_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb" -diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig -index 14373933a34..34e09eeccd2 100644 ---- a/configs/rock-pi-4c-rk3399_defconfig -+++ b/configs/rock-pi-4c-rk3399_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_AHCI=y - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" -diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig -index ec995a54a0e..1a973ea2c97 100644 ---- a/configs/rock-pi-n10-rk3399pro_defconfig -+++ b/configs/rock-pi-n10-rk3399pro_defconfig -@@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - # CONFIG_ANDROID_BOOT_IMAGE is not set - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" - # CONFIG_CONSOLE_MUX is not set -diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig -index 8fff3ed17c2..ea6d6d4a319 100644 ---- a/configs/rock960-rk3399_defconfig -+++ b/configs/rock960-rk3399_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" - CONFIG_SYS_PBSIZE=1052 - CONFIG_DISPLAY_BOARDINFO_LATE=y -diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig -index fc0804a0b80..9a94d96b148 100644 ---- a/configs/rockpro64-rk3399_defconfig -+++ b/configs/rockpro64-rk3399_defconfig -@@ -19,6 +19,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0x800800 - CONFIG_PCI=y - CONFIG_DEBUG_UART=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_BOOTSTAGE=y - CONFIG_BOOTSTAGE_REPORT=y - CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" --- -2.45.1 - -From 5116720be74a92417c69229fc45a97502869ff9b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 23 Sep 2024 19:51:00 +0100 -Subject: [PATCH] rockchip: rk35xx: Enable preboot start for pci/usb - -Enable the preboot so nvme works OOTB - Signed-off-by: Peter Robinson --- configs/anbernic-rgxx3-rk3566_defconfig | 2 ++ @@ -181,10 +14,12 @@ Signed-off-by: Peter Robinson configs/coolpi-cm5-evb-rk3588_defconfig | 2 ++ configs/evb-rk3568_defconfig | 2 ++ configs/evb-rk3588_defconfig | 2 ++ + configs/firefly-rk3399_defconfig | 2 ++ configs/generic-rk3568_defconfig | 2 ++ configs/generic-rk3588_defconfig | 2 ++ configs/jaguar-rk3588_defconfig | 2 ++ configs/lubancat-2-rk3568_defconfig | 2 ++ + configs/nanopc-t4-rk3399_defconfig | 2 ++ configs/nanopc-t6-rk3588_defconfig | 2 ++ configs/nanopi-r5c-rk3568_defconfig | 2 ++ configs/nanopi-r5s-rk3568_defconfig | 2 ++ @@ -197,6 +32,7 @@ Signed-off-by: Peter Robinson configs/orangepi-3b-rk3566_defconfig | 2 ++ configs/orangepi-5-plus-rk3588_defconfig | 2 ++ configs/orangepi-5-rk3588s_defconfig | 2 ++ + configs/pinebook-pro-rk3399_defconfig | 1 + configs/pinetab2-rk3566_defconfig | 2 ++ configs/powkiddy-x55-rk3566_defconfig | 2 ++ configs/quartz64-a-rk3566_defconfig | 2 ++ @@ -205,12 +41,20 @@ Signed-off-by: Peter Robinson configs/radxa-cm3-io-rk3566_defconfig | 2 ++ configs/radxa-e25-rk3568_defconfig | 2 ++ configs/radxa-zero-3-rk3566_defconfig | 2 ++ + configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ configs/rock-3a-rk3568_defconfig | 2 ++ configs/rock-3b-rk3568_defconfig | 2 ++ configs/rock-3c-rk3566_defconfig | 2 ++ + configs/rock-4c-plus-rk3399_defconfig | 2 ++ + configs/rock-4se-rk3399_defconfig | 2 ++ configs/rock-5-itx-rk3588_defconfig | 2 ++ + configs/rock-pi-4-rk3399_defconfig | 2 ++ + configs/rock-pi-4c-rk3399_defconfig | 2 ++ + configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ configs/rock5a-rk3588s_defconfig | 2 ++ configs/rock5b-rk3588_defconfig | 2 ++ + configs/rock960-rk3399_defconfig | 2 ++ + configs/rockpro64-rk3399_defconfig | 2 ++ configs/sige7-rk3588_defconfig | 2 ++ configs/soquartz-blade-rk3566_defconfig | 2 ++ configs/soquartz-cm4-rk3566_defconfig | 2 ++ @@ -218,28 +62,28 @@ Signed-off-by: Peter Robinson configs/tiger-rk3588_defconfig | 2 ++ configs/toybrick-rk3588_defconfig | 2 ++ configs/turing-rk1-rk3588_defconfig | 2 ++ - 44 files changed, 88 insertions(+) + 55 files changed, 109 insertions(+) diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig -index a03509bf467..45cfaf5deb7 100644 +index 14c97b4c5bf..de92e1b4141 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -12,6 +12,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_EFI_LOADER is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y - CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig -index eccc15a0ae5..57d4fafbef4 100644 +index d84ea2f955f..de777817c37 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig -@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -247,11 +91,11 @@ index eccc15a0ae5..57d4fafbef4 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/cm3588-nas-rk3588_defconfig b/configs/cm3588-nas-rk3588_defconfig -index d6d82757a2d..7ef75dfedeb 100644 +index fd0a32d6d79..e561be511d4 100644 --- a/configs/cm3588-nas-rk3588_defconfig +++ b/configs/cm3588-nas-rk3588_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -260,11 +104,11 @@ index d6d82757a2d..7ef75dfedeb 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig -index 3d45d939abb..6005d0b556b 100644 +index ea985b81670..96d7cffb075 100644 --- a/configs/coolpi-4b-rk3588s_defconfig +++ b/configs/coolpi-4b-rk3588s_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -273,11 +117,11 @@ index 3d45d939abb..6005d0b556b 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig -index 5190d69c1c5..30f1690fe4d 100644 +index 58ffe7baf5f..5eadc091242 100644 --- a/configs/coolpi-cm5-evb-rk3588_defconfig +++ b/configs/coolpi-cm5-evb-rk3588_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -286,12 +130,12 @@ index 5190d69c1c5..30f1690fe4d 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig -index 2076f55122b..543c1a7d6ba 100644 +index a068bc6846c..8c94f7b21bc 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig -@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -299,25 +143,38 @@ index 2076f55122b..543c1a7d6ba 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig -index 1d5585677a4..44ef0fd0f54 100644 +index 3d4d2747145..051015fd811 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig +index 3871627318b..b96aadc78eb 100644 +--- a/configs/firefly-rk3399_defconfig ++++ b/configs/firefly-rk3399_defconfig +@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig -index 66a33afbbaf..b1bfb831aa5 100644 +index f79f0e84400..ba5339a004f 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig -@@ -13,6 +13,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y +@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -325,12 +182,12 @@ index 66a33afbbaf..b1bfb831aa5 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig -index 42bc2c9a765..6c713094bf0 100644 +index 51e31dce3a9..1c767caa06a 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -338,11 +195,11 @@ index 42bc2c9a765..6c713094bf0 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig -index 18006467dde..a5d7612d9a5 100644 +index 6e853991d1d..a5a56a33d09 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig -@@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -351,24 +208,37 @@ index 18006467dde..a5d7612d9a5 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig -index 88593bfa705..870d8f72317 100644 +index 46cc3c03fff..8915d5bfba9 100644 --- a/configs/lubancat-2-rk3568_defconfig +++ b/configs/lubancat-2-rk3568_defconfig -@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_EFI_VAR_BUF_SIZE=16384 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y - CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig +index 26c12c51078..33f7e838c2c 100644 +--- a/configs/nanopc-t4-rk3399_defconfig ++++ b/configs/nanopc-t4-rk3399_defconfig +@@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig -index 926267f93ad..7b0ac43d8c1 100644 +index 772b7df1555..ba6cf48308c 100644 --- a/configs/nanopc-t6-rk3588_defconfig +++ b/configs/nanopc-t6-rk3588_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -377,11 +247,11 @@ index 926267f93ad..7b0ac43d8c1 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig -index 8e30093ed9d..2c1d7b7435b 100644 +index 4a43b17ccb1..91c95b491d5 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -390,11 +260,11 @@ index 8e30093ed9d..2c1d7b7435b 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig -index e1865b2e171..1afce812b22 100644 +index a60d229fbbf..355d8114a9b 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -403,11 +273,11 @@ index e1865b2e171..1afce812b22 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r6c-rk3588s_defconfig b/configs/nanopi-r6c-rk3588s_defconfig -index f8d2d67bd35..e6e9cf1101a 100644 +index c4de5518a72..92697c536d9 100644 --- a/configs/nanopi-r6c-rk3588s_defconfig +++ b/configs/nanopi-r6c-rk3588s_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -416,11 +286,11 @@ index f8d2d67bd35..e6e9cf1101a 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nanopi-r6s-rk3588s_defconfig b/configs/nanopi-r6s-rk3588s_defconfig -index f7b364655ff..fd28485db93 100644 +index 2726729b9ac..63a3690db8e 100644 --- a/configs/nanopi-r6s-rk3588s_defconfig +++ b/configs/nanopi-r6s-rk3588s_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -429,12 +299,12 @@ index f7b364655ff..fd28485db93 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig -index ac281e65392..3338f0a3160 100644 +index 291e0d26d42..e385aba7bc4 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -442,12 +312,12 @@ index ac281e65392..3338f0a3160 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig -index c01e5fb0d04..73cc8e6d0ff 100644 +index 4e22852f23c..79f4e66cb9b 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -455,11 +325,11 @@ index c01e5fb0d04..73cc8e6d0ff 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/nova-rk3588s_defconfig b/configs/nova-rk3588s_defconfig -index a2e2440359c..45862f403fb 100644 +index fb30dfd1db8..e99898355e1 100644 --- a/configs/nova-rk3588s_defconfig +++ b/configs/nova-rk3588s_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -468,11 +338,11 @@ index a2e2440359c..45862f403fb 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig -index b5263caff6d..a2217b530d1 100644 +index a8e8a8781e1..a3ea2e592b9 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -481,11 +351,11 @@ index b5263caff6d..a2217b530d1 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/orangepi-3b-rk3566_defconfig b/configs/orangepi-3b-rk3566_defconfig -index 575dc4340d3..817de7b69e6 100644 +index 2181c9caf58..fee0c719f25 100644 --- a/configs/orangepi-3b-rk3566_defconfig +++ b/configs/orangepi-3b-rk3566_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -494,11 +364,11 @@ index 575dc4340d3..817de7b69e6 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig -index 138a633f320..e0aaa8dfb15 100644 +index 9050fceda45..2e1fe2c6dc5 100644 --- a/configs/orangepi-5-plus-rk3588_defconfig +++ b/configs/orangepi-5-plus-rk3588_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -507,11 +377,11 @@ index 138a633f320..e0aaa8dfb15 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig -index 33529d4cac3..09d8475d051 100644 +index 6e2ff7d338a..7ec7d13e1f9 100644 --- a/configs/orangepi-5-rk3588s_defconfig +++ b/configs/orangepi-5-rk3588s_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -519,13 +389,25 @@ index 33529d4cac3..09d8475d051 100644 CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index dfa927ccb17..acc2a0a9fcd 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -22,6 +22,7 @@ CONFIG_PCI=y + CONFIG_DEBUG_UART=y + CONFIG_BOOTDELAY=3 + CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig -index 2d075d12174..fcb3c474044 100644 +index 45e63b42d19..3ef0ddbbe31 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y +@@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -533,12 +415,12 @@ index 2d075d12174..fcb3c474044 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/powkiddy-x55-rk3566_defconfig b/configs/powkiddy-x55-rk3566_defconfig -index 2360bdbe84b..afb7f3ffafb 100644 +index 85280839889..f93a463087b 100644 --- a/configs/powkiddy-x55-rk3566_defconfig +++ b/configs/powkiddy-x55-rk3566_defconfig -@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -546,11 +428,11 @@ index 2360bdbe84b..afb7f3ffafb 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig -index 1ea8e0f40cc..a4211afb6a9 100644 +index fe3fa37611a..60b1f8f1784 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -559,11 +441,11 @@ index 1ea8e0f40cc..a4211afb6a9 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig -index f61b2c181a1..408b63dbb08 100644 +index 929736f76af..c3155d9b835 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig -@@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -572,11 +454,11 @@ index f61b2c181a1..408b63dbb08 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig -index 06c5cff3ca5..dccc550d4ef 100644 +index ade7be27e92..263d21bee8b 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -585,12 +467,12 @@ index 06c5cff3ca5..dccc550d4ef 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig -index 48c8fcf5a66..65198e4a507 100644 +index 2655fdc3170..c1a27f6e310 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig -@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -598,11 +480,11 @@ index 48c8fcf5a66..65198e4a507 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig -index 496fee0e0a4..b726e47c3e0 100644 +index 4df594ddc01..3830d27b264 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -611,24 +493,37 @@ index 496fee0e0a4..b726e47c3e0 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/radxa-zero-3-rk3566_defconfig b/configs/radxa-zero-3-rk3566_defconfig -index 7606edf393e..d1611a638ae 100644 +index 5989b07ad79..1b571ec3847 100644 --- a/configs/radxa-zero-3-rk3566_defconfig +++ b/configs/radxa-zero-3-rk3566_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 +@@ -11,6 +11,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y +diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig +index 3ab5fd69c62..ba254d8f6c0 100644 +--- a/configs/roc-pc-mezzanine-rk3399_defconfig ++++ b/configs/roc-pc-mezzanine-rk3399_defconfig +@@ -21,6 +21,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig -index 66ac2f6d7aa..1500691419d 100644 +index 733ce631457..3387796a0c5 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig -@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -637,11 +532,11 @@ index 66ac2f6d7aa..1500691419d 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/rock-3b-rk3568_defconfig b/configs/rock-3b-rk3568_defconfig -index 937796811a9..38d048439ed 100644 +index 2023feb36c2..84c6aab6b33 100644 --- a/configs/rock-3b-rk3568_defconfig +++ b/configs/rock-3b-rk3568_defconfig -@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -650,11 +545,11 @@ index 937796811a9..38d048439ed 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/rock-3c-rk3566_defconfig b/configs/rock-3c-rk3566_defconfig -index f44b202c8c3..488b1c4e0c3 100644 +index 2528c7c639c..0a0010b1268 100644 --- a/configs/rock-3c-rk3566_defconfig +++ b/configs/rock-3c-rk3566_defconfig -@@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -16,6 +16,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -662,12 +557,38 @@ index f44b202c8c3..488b1c4e0c3 100644 CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig +index 0c73a212ea1..2ae2eff39e2 100644 +--- a/configs/rock-4c-plus-rk3399_defconfig ++++ b/configs/rock-4c-plus-rk3399_defconfig +@@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_EFI_CAPSULE_ON_DISK=y + CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y + # CONFIG_ANDROID_BOOT_IMAGE is not set +diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig +index 3ae19692155..12621b8a41b 100644 +--- a/configs/rock-4se-rk3399_defconfig ++++ b/configs/rock-4se-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_EFI_CAPSULE_ON_DISK=y + CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rock-5-itx-rk3588_defconfig b/configs/rock-5-itx-rk3588_defconfig -index bb9f148692a..1d6a9e9465b 100644 +index d0dd1c20ece..b3a778907c8 100644 --- a/configs/rock-5-itx-rk3588_defconfig +++ b/configs/rock-5-itx-rk3588_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -675,13 +596,52 @@ index bb9f148692a..1d6a9e9465b 100644 CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig +index f3a5c2c45f3..d95576e804a 100644 +--- a/configs/rock-pi-4-rk3399_defconfig ++++ b/configs/rock-pi-4-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_EFI_CAPSULE_ON_DISK=y + CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig +index 9bda50c8c77..d26eb3dcb44 100644 +--- a/configs/rock-pi-4c-rk3399_defconfig ++++ b/configs/rock-pi-4c-rk3399_defconfig +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_AHCI=y + CONFIG_EFI_CAPSULE_ON_DISK=y + CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig +index a9c6d8a907a..1cde3859eef 100644 +--- a/configs/rock-pi-n10-rk3399pro_defconfig ++++ b/configs/rock-pi-n10-rk3399pro_defconfig +@@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + # CONFIG_ANDROID_BOOT_IMAGE is not set + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" + # CONFIG_CONSOLE_MUX is not set diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig -index c09e6655f02..39602d86845 100644 +index 9618d590009..9608f7e7e4c 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -689,11 +649,11 @@ index c09e6655f02..39602d86845 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig -index 80a2f2fed58..d3cc8a19cfd 100644 +index 47ee2109f8e..e1c6961a3ab 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig -@@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -701,12 +661,38 @@ index 80a2f2fed58..d3cc8a19cfd 100644 CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index aebfa73459c..8b60ad3bf00 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" + CONFIG_SYS_PBSIZE=1052 + CONFIG_DISPLAY_BOARDINFO_LATE=y +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +index 08b7e2784e9..d80e120c66f 100644 +--- a/configs/rockpro64-rk3399_defconfig ++++ b/configs/rockpro64-rk3399_defconfig +@@ -20,6 +20,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI=y + CONFIG_PCI=y + CONFIG_DEBUG_UART=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="pci enum; usb start; nvme scan;" + CONFIG_BOOTSTAGE=y + CONFIG_BOOTSTAGE_REPORT=y + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" diff --git a/configs/sige7-rk3588_defconfig b/configs/sige7-rk3588_defconfig -index d15fc09fc8d..c77919cac79 100644 +index 8b033e22b84..978df10442c 100644 --- a/configs/sige7-rk3588_defconfig +++ b/configs/sige7-rk3588_defconfig -@@ -13,6 +13,8 @@ CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -715,11 +701,11 @@ index d15fc09fc8d..c77919cac79 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig -index 82910daf7cc..09fc6b6b6e5 100644 +index a1a51b2c657..4083f217c0b 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -728,11 +714,11 @@ index 82910daf7cc..09fc6b6b6e5 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig -index 5744f1baa81..e5a9ee1938b 100644 +index a8bca0eaccc..c3dd48d9dc1 100644 --- a/configs/soquartz-cm4-rk3566_defconfig +++ b/configs/soquartz-cm4-rk3566_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -741,11 +727,11 @@ index 5744f1baa81..e5a9ee1938b 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig -index 920df9b622d..efcd3f5bc77 100644 +index f080d2e36d2..f6f2f67b0a6 100644 --- a/configs/soquartz-model-a-rk3566_defconfig +++ b/configs/soquartz-model-a-rk3566_defconfig -@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -754,11 +740,11 @@ index 920df9b622d..efcd3f5bc77 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig -index 8eb1027e449..39e4946b0bf 100644 +index f962ac416f3..1fc7301f6ae 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig -@@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 + # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -767,12 +753,12 @@ index 8eb1027e449..39e4946b0bf 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig -index 12a076aeeae..c70210c0dee 100644 +index 5e70341c987..fd7e842f9e5 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig -@@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0xFEB50000 +@@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 + CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" @@ -780,11 +766,11 @@ index 12a076aeeae..c70210c0dee 100644 CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig -index e6e1bda7ec1..e1bf365edc8 100644 +index 0eddf15833c..1a9aacc7b5d 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig -@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_SYS_LOAD_ADDR=0xc00800 +@@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFEBC0000 + CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y @@ -793,5 +779,5 @@ index e6e1bda7ec1..e1bf365edc8 100644 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -- -2.46.1 +2.47.1 diff --git a/rpi-Add-identifiers-for-the-new-RPi-5-series.patch b/rpi-Add-identifiers-for-the-new-RPi-5-series.patch new file mode 100644 index 0000000..66db2ca --- /dev/null +++ b/rpi-Add-identifiers-for-the-new-RPi-5-series.patch @@ -0,0 +1,43 @@ +From 49423505898eef1baefa2823408dad8321571353 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 29 Dec 2024 14:43:33 +0000 +Subject: [PATCH] rpi: Add identifiers for the new RPi 5 series + +The Raspberry Pi foundation have released the Raspberry +Pi 500, CM5 an CM5 lite devices so add the assoicated +revision identifers so we can detect them. + +Signed-off-by: Peter Robinson +--- + board/raspberrypi/rpi/rpi.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 18be244aa79..1e43c631898 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -193,6 +193,21 @@ static const struct rpi_model rpi_models_new_scheme[] = { + DTB_DIR "bcm2712-rpi-5-b.dtb", + true, + }, ++ [0x18] = { ++ "Compute Module 5", ++ DTB_DIR "bcm2712-rpi-cm5-cm5io.dtb", ++ true, ++ }, ++ [0x19] = { ++ "500", ++ DTB_DIR "bcm2712-rpi-500.dtb", ++ true, ++ }, ++ [0x1A] = { ++ "Compute Module 5 Lite", ++ DTB_DIR "bcm2712-rpi-cm5l-cm5io.dtb", ++ true, ++ }, + }; + + static const struct rpi_model rpi_models_old_scheme[] = { +-- +2.47.1 + diff --git a/rpi-Pass-CMA-through-from-firmware-DT.patch b/rpi-Pass-CMA-through-from-firmware-DT.patch deleted file mode 100644 index 1185095..0000000 --- a/rpi-Pass-CMA-through-from-firmware-DT.patch +++ /dev/null @@ -1,40 +0,0 @@ -From c449955f6aece3148ccf67890df1083fb3a41884 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 11 Oct 2024 12:04:10 +0100 -Subject: [PATCH] board: rpi: Pass CMA through from firmware DT - -For a lot of usecases, such as display, camera, media -the Raspberry Pi needs a lot more CMA than distros -configure as default so we should pass this parameter -through so things work as expected. Fix a spelling -mistake while we're at it. - -Signed-off-by: Peter Robinson ---- - board/raspberrypi/rpi/rpi.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index ab5ea85cf9f..dd5a318d239 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -540,12 +540,15 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) - if (fdt == fw_fdt) - return; - -- /* The firmware provides a more precie model; so copy that */ -+ /* The firmware provides a more precise model; so copy that */ - copy_property(fdt, fw_fdt, "/", "model"); - - /* memory reserve as suggested by the firmware */ - copy_property(fdt, fw_fdt, "/", "memreserve"); - -+ /* copy the CMA memory setting from the firmware DT to linux */ -+ copy_property(fdt, fw_fdt, "/reserved-memory/linux,cma", "size"); -+ - /* Adjust dma-ranges for the SD card and PCI bus as they can depend on - * the SoC revision - */ --- -2.47.0 - diff --git a/sources b/sources index 82c8edc..467430d 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2024.10.tar.bz2) = ef817c9b5ae8dc6cd9e3f57811e90acc6a4d4394f0356aa5923e3e3c8559168f977bd5bf82824cd3650aa8e5e3c3d1b00e20818d21368151748682f1fc51152c +SHA512 (u-boot-2025.01-rc4.tar.bz2) = d088cee1947ede1f1db6eb1dc5e5e583aa44e9c8508eae4420a91b2f83826767e1978c8e85e9c76aaf84921a64c69248386d7ab117b82563ae0daad1443d7ad4 diff --git a/uboot-tools.spec b/uboot-tools.spec index 3ebc11a..a4b1e4e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc6 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2024.10 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Version: 2025.01 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -29,14 +29,12 @@ Patch5: enable-bootmenu-by-default.patch # Should be upstream but it's taking time #Patch6: Add-video-damage-tracking.patch -# Rockchips improvements -Patch10: rockchip-Enable-preboot-start-for-pci-usb.patch -Patch11: FUSB302-USB-C-controller-support.patch -Patch12: rockchip-Modernise-Geekbox-config.patch -# QCom -Patch15: Qualcomm-add-support-for-SC7280-and-the-RB3-Gen-2.patch +# Device improvments # RPi -Patch20: rpi-Pass-CMA-through-from-firmware-DT.patch +Patch10: rpi-Add-identifiers-for-the-new-RPi-5-series.patch +# Rockchips improvements +Patch11: rockchip-Enable-preboot-start-for-pci-usb.patch +#Patch12: rockchip-Modernise-Geekbox-config.patch BuildRequires: bc BuildRequires: bison @@ -122,7 +120,7 @@ do echo "Board: $board using sun50i_h616" cp /usr/share/arm-trusted-firmware/sun50i_h616/bl31.bin builds/$(echo $board)/atf-bl31 fi - rk3328=(evb-rk3328 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 nanopi-r2s-rk3328 orangepi-r1-plus-lts-rk3328 orangepi-r1-plus-rk3328 roc-cc-rk3328 rock64-rk3328 rock-pi-e-rk3328 rock-pi-e-v3-rk3328) + rk3328=(evb-rk3328 nanopi-r2c-plus-rk3328 nanopi-r2c-rk3328 nanopi-r2s-rk3328 nanopi-r2s-plus-rk3328 orangepi-r1-plus-lts-rk3328 orangepi-r1-plus-rk3328 roc-cc-rk3328 rock64-rk3328 rock-pi-e-rk3328 rock-pi-e-v3-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/bl31.elf builds/$(echo $board)/atf-bl31 @@ -220,6 +218,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Dec 31 2024 Peter Robinson - 1:2025.01-0.1.rc6 +- Update to 2025.01 RC6 + * Fri Oct 11 2024 Peter Robinson - 1:2024.10-1 - Update to 2024.10 GA - Fix passing RPi firmware CMA setting to kernel DT diff --git a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch index 232e121..c45924d 100644 --- a/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch +++ b/uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch @@ -1,6 +1,6 @@ -From 8abb44f89aefd25cda27c54c08b68b3a60bea7c3 Mon Sep 17 00:00:00 2001 +From 121fd475757e183428ca78f43420c42b9973aa33 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Thu, 21 Mar 2024 13:43:24 +0000 +Date: Tue, 31 Dec 2024 14:11:12 +0000 Subject: [PATCH] initial find_fdt_location for finding the DT on disk The old distro boot looked for a DT on the first boot partition @@ -23,10 +23,10 @@ Signed-off-by: Peter Robinson 4 files changed, 112 insertions(+), 1 deletion(-) diff --git a/cmd/bootefi.c b/cmd/bootefi.c -index 9cf9027bf40..8b6194a8702 100644 +index c1454ffb948..ec869047f05 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c -@@ -144,6 +144,7 @@ static int do_bootefi(struct cmd_tbl *cmdtp, int flag, int argc, +@@ -143,6 +143,7 @@ static int do_bootefi(struct cmd_tbl *cmdtp, int flag, int argc, if (argc > 2) { uintptr_t fdt_addr; @@ -35,10 +35,10 @@ index 9cf9027bf40..8b6194a8702 100644 fdt = map_sysmem(fdt_addr, 0); } else { diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c -index 78184fccab2..48368c8d42e 100644 +index b633aedf011..96a71a96820 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c -@@ -448,6 +448,11 @@ static void handle_uefi_bootnext(void) +@@ -461,6 +461,11 @@ static void handle_uefi_bootnext(void) u16 bootnext; efi_status_t ret; efi_uintn_t size; @@ -51,10 +51,10 @@ index 78184fccab2..48368c8d42e 100644 /* Initialize EFI drivers */ ret = efi_init_obj_list(); diff --git a/include/efi_loader.h b/include/efi_loader.h -index 7daca0afba2..a969378ff2f 100644 +index 39809eac1bc..511eba655e7 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h -@@ -524,6 +524,8 @@ struct efi_register_notify_event { +@@ -514,6 +514,8 @@ struct efi_register_notify_event { struct list_head handles; }; @@ -64,7 +64,7 @@ index 7daca0afba2..a969378ff2f 100644 int efi_init_early(void); /* Initialize efi execution environment */ diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c -index 5dd9cc876e4..a33ec39ff74 100644 +index bf96f61d3d0..3f496cc0dfb 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c @@ -12,6 +12,7 @@ @@ -72,12 +72,12 @@ index 5dd9cc876e4..a33ec39ff74 100644 #include #include +#include + #include #include #include - #include -@@ -24,6 +25,99 @@ - const efi_guid_t efi_lf2_initrd_guid = EFI_INITRD_MEDIA_GUID; - #endif +@@ -95,6 +96,99 @@ int efi_get_pxe_arch(void) + return -EINVAL; + } +/* We need to pass a blk device in and return a location, or a loaded DT */ +char *find_fdt_location(void) @@ -175,7 +175,7 @@ index 5dd9cc876e4..a33ec39ff74 100644 /** * efi_create_current_boot_var() - Return Boot#### name were #### is replaced by * the value of BootCurrent -@@ -432,11 +526,20 @@ efi_status_t efi_install_fdt(void *fdt) +@@ -548,11 +642,20 @@ efi_status_t efi_install_fdt(void *fdt) /* Look for device tree that is already installed */ if (efi_get_configuration_table(&efi_guid_fdt)) return EFI_SUCCESS; @@ -195,8 +195,8 @@ index 5dd9cc876e4..a33ec39ff74 100644 fdt_opt = env_get("fdtcontroladdr"); + log_debug("Using DT from U-Boot\n"); if (!fdt_opt) { - log_err("ERROR: need device tree\n"); + log_err("need device tree\n"); return EFI_NOT_FOUND; -- -2.44.0 +2.47.1 From f7a78315e4c2c70e8ba1990fedf4f9e0be27ac19 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 2 Jan 2025 10:08:31 +0000 Subject: [PATCH 282/351] Upload RC6 source --- sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources b/sources index 467430d..ed581bf 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2025.01-rc4.tar.bz2) = d088cee1947ede1f1db6eb1dc5e5e583aa44e9c8508eae4420a91b2f83826767e1978c8e85e9c76aaf84921a64c69248386d7ab117b82563ae0daad1443d7ad4 +SHA512 (u-boot-2025.01-rc6.tar.bz2) = 17860d15410b2d8c88611b3040082869a9a21596c705f0137d46a28a107c3cad3f482e992fd9a5fb101488e8691ce9dd16ca8ef38d8a74b0514c26d32afca700 From eb2323f190918283f861e718f7b1ca7f26625ecf Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 6 Jan 2025 15:25:03 +0000 Subject: [PATCH 283/351] Rebuild for TF-A 2.12 --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index a4b1e4e..1d5efa6 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2025.01 -Release: 0.1%{?candidate:.%{candidate}}%{?dist} +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -218,6 +218,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Mon Jan 06 2025 Peter Robinson - 1:2025.01-0.2.rc6 +- Rebuild for TF-A 2.12 + * Tue Dec 31 2024 Peter Robinson - 1:2025.01-0.1.rc6 - Update to 2025.01 RC6 From d3e7f7d440edf713d7a54e9a0759a08b866de930 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 7 Jan 2025 09:49:48 +0000 Subject: [PATCH 284/351] 2025.01 GA --- sources | 2 +- uboot-tools.spec | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sources b/sources index ed581bf..da1e0e7 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2025.01-rc6.tar.bz2) = 17860d15410b2d8c88611b3040082869a9a21596c705f0137d46a28a107c3cad3f482e992fd9a5fb101488e8691ce9dd16ca8ef38d8a74b0514c26d32afca700 +SHA512 (u-boot-2025.01.tar.bz2) = e22202b568f90de15e4e20317e13d68ce106256eadeeae5017241cdd4a1d133cdfd14297b403c7391bf65d022061ad4e1cbe862c480fddbd13f97b756305f188 diff --git a/uboot-tools.spec b/uboot-tools.spec index 1d5efa6..06ba9bf 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc6 +#global candidate rc0 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2025.01 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -218,6 +218,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Jan 07 2025 Peter Robinson - 1:2025.01-1 +- Update to 2025.01 GA + * Mon Jan 06 2025 Peter Robinson - 1:2025.01-0.2.rc6 - Rebuild for TF-A 2.12 From 3cc9ea7c96406873fe8a37a959fe0b1a30503677 Mon Sep 17 00:00:00 2001 From: Fedora Release Engineering Date: Sun, 19 Jan 2025 13:33:58 +0000 Subject: [PATCH 285/351] Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 06ba9bf..657db17 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2025.01 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -218,6 +218,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Sun Jan 19 2025 Fedora Release Engineering - 1:2025.01-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild + * Tue Jan 07 2025 Peter Robinson - 1:2025.01-1 - Update to 2025.01 GA From 8c6f3ce53a5cd2785e05b126ce17dafff11e3408 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 28 Jan 2025 06:22:57 +0000 Subject: [PATCH 286/351] Add new fdt_add_pubkey tool --- uboot-tools.spec | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 657db17..cd060f9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2025.01 -Release: 2%{?candidate:.%{candidate}}%{?dist} +Release: 3%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -186,7 +186,7 @@ done %endif %endif -for tool in dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder +for tool in dumpimage env/fw_printenv fdt_add_pubkey fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder do install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir} done @@ -218,6 +218,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Jan 28 2025 Peter Robinson - 1:2025.01-3 +- Add new fdt_add_pubkey tool + * Sun Jan 19 2025 Fedora Release Engineering - 1:2025.01-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild From f713a0fe6af55f09f7c302fc5a684bf19930da66 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 11 Feb 2025 09:34:06 +0000 Subject: [PATCH 287/351] 2025.05 RC1 --- aarch64-boards | 3 +- ...hip-Enable-preboot-start-for-pci-usb.patch | 4 +-- sources | 2 +- uboot-tools.spec | 34 ++++++++++++------- 4 files changed, 27 insertions(+), 16 deletions(-) diff --git a/aarch64-boards b/aarch64-boards index b66a8a6..bb4c9fd 100644 --- a/aarch64-boards +++ b/aarch64-boards @@ -1,6 +1,7 @@ a64-olinuxino a64-olinuxino-emmc amarula_a64_relic +anbernic_rg35xx_h700 apple_m1 bananapi_m2_plus_h5 bananapi_m64 @@ -78,6 +79,7 @@ pinetab poplar puma-rk3399 qcm6490 +qcs9100 qcom qemu_arm64 qemu_arm64_lwip @@ -102,4 +104,3 @@ transpeed-8k618-t turris_mox vexpress_aemv8a_juno x96_mate -xilinx_zynqmp_virt diff --git a/rockchip-Enable-preboot-start-for-pci-usb.patch b/rockchip-Enable-preboot-start-for-pci-usb.patch index 64e6883..177b44c 100644 --- a/rockchip-Enable-preboot-start-for-pci-usb.patch +++ b/rockchip-Enable-preboot-start-for-pci-usb.patch @@ -684,9 +684,9 @@ index 08b7e2784e9..d80e120c66f 100644 CONFIG_DEBUG_UART=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="pci enum; usb start; nvme scan;" - CONFIG_BOOTSTAGE=y - CONFIG_BOOTSTAGE_REPORT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_SPL_MAX_SIZE=0x40000 diff --git a/configs/sige7-rk3588_defconfig b/configs/sige7-rk3588_defconfig index 8b033e22b84..978df10442c 100644 --- a/configs/sige7-rk3588_defconfig diff --git a/sources b/sources index da1e0e7..180c13e 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2025.01.tar.bz2) = e22202b568f90de15e4e20317e13d68ce106256eadeeae5017241cdd4a1d133cdfd14297b403c7391bf65d022061ad4e1cbe862c480fddbd13f97b756305f188 +SHA512 (u-boot-2025.04-rc1.tar.bz2) = b973b39c2665d30ab1a9b96fb1eaae70bbdd29dabb68e4cdcf84a11174482e8861ccd8984ca17f594ca6af15bf0517c5263574385836676413e16f911b5bbb4e diff --git a/uboot-tools.spec b/uboot-tools.spec index cd060f9..5c55822 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -#global candidate rc0 +%global candidate rc1 %if 0%{?rhel} %bcond_with toolsonly %else @@ -6,8 +6,8 @@ %endif Name: uboot-tools -Version: 2025.01 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2025.04 +Release: 0.2%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -115,7 +115,7 @@ do cp /usr/share/arm-trusted-firmware/sun50i_h6/bl31.bin builds/$(echo $board)/atf-bl31 cp /usr/share/crust-firmware/h6/scp.bin builds/$(echo $board)/ fi - sun50i_h616=(orangepi_zero2 orangepi_zero2w orangepi_zero3 transpeed-8k618-t x96_mate) + sun50i_h616=(anbernic_rg35xx_h700 orangepi_zero2 orangepi_zero2w orangepi_zero3 transpeed-8k618-t x96_mate) if [[ " ${sun50i_h616[*]} " == *" $board "* ]]; then echo "Board: $board using sun50i_h616" cp /usr/share/arm-trusted-firmware/sun50i_h616/bl31.bin builds/$(echo $board)/atf-bl31 @@ -136,6 +136,11 @@ do cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ cp builds/$(echo $board)/bl31.elf builds/$(echo $board)/atf-bl31 fi + zynqmp=(xilinx_zynqmp_kria xilinx_zynqmp_virt) + if [[ " ${zynqmp[*]} " == *" $board "* ]]; then + echo "Board: $board using zynqmp" + cp /usr/share/arm-trusted-firmware/zynqmp/bl31.bin builds/$(echo $board)/atf-bl31 + fi # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ @@ -163,9 +168,16 @@ do done done -# Just for xilinx_zynqmp_virt -install -pD -m 0644 builds/xilinx_zynqmp_virt/u-boot.itb %{buildroot}%{_datadir}/uboot/xilinx_zynqmp_virt/u-boot.itb -install -pD -m 0644 builds/xilinx_zynqmp_virt/spl/boot.bin %{buildroot}%{_datadir}/uboot/xilinx_zynqmp_virt/boot.bin +# Just for xilinx_zynqmp +for board in "xilinx_zynqmp_kria xilinx_zynqmp_virt" +do + for file in u-boot.itb spl/boot.bin + do + if [ -f builds/$(echo $board)/$(echo $file) ]; then + install -pD -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/$(echo $file) + fi + done +done # For Apple M-series we also need the nodtb variant install -pD -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin @@ -176,11 +188,6 @@ do rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.dtb if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.* - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/sunxi-spl.bin - fi - if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/idbloader.img ]; then - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin - rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.img fi done %endif @@ -218,6 +225,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Feb 11 2025 Peter Robinson - 1:2025.04-0.2.rc1 +- Update to 2025.05 RC1 + * Tue Jan 28 2025 Peter Robinson - 1:2025.01-3 - Add new fdt_add_pubkey tool From 630e77de009a1286f9559467581543f4fcd6bfa6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 18 Feb 2025 22:28:52 +0000 Subject: [PATCH 288/351] 2025.05 RC2 --- Add-video-damage-tracking.patch | 439 +++++++++++++++----------------- sources | 2 +- uboot-tools.spec | 9 +- 3 files changed, 218 insertions(+), 232 deletions(-) diff --git a/Add-video-damage-tracking.patch b/Add-video-damage-tracking.patch index 1aea71e..72475de 100644 --- a/Add-video-damage-tracking.patch +++ b/Add-video-damage-tracking.patch @@ -1,4 +1,4 @@ -From 26fad18312fe9cb0ed97ed8550b1c704d0985ebe Mon Sep 17 00:00:00 2001 +From a05aeec18576ddce60c2fbd797245b5eeaddee25 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:50:58 +0300 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a @@ -18,10 +18,10 @@ Reviewed-by: Simon Glass 1 file changed, 58 insertions(+), 11 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index d907f681600..641a6250100 100644 +index e347c1403fd..01fa9e1b241 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -55,9 +55,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT); * size of the compressed data. This provides a pretty good level of * certainty and the resulting tests need only check a single value. * @@ -31,7 +31,7 @@ index d907f681600..641a6250100 100644 * @uts: Test state * @dev: Video device * Return: compressed size of the frame buffer, or -ve on error -@@ -66,7 +63,6 @@ static int compress_frame_buffer(struct unit_test_state *uts, +@@ -65,7 +62,6 @@ static int compress_frame_buffer(struct unit_test_state *uts, struct udevice *dev) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -39,7 +39,7 @@ index d907f681600..641a6250100 100644 uint destlen; void *dest; int ret; -@@ -82,16 +78,34 @@ static int compress_frame_buffer(struct unit_test_state *uts, +@@ -81,16 +77,34 @@ static int compress_frame_buffer(struct unit_test_state *uts, if (ret) return ret; @@ -81,7 +81,7 @@ index d907f681600..641a6250100 100644 /* * Call this function at any point to halt and show the current display. Be * sure to run the test with the -l flag. -@@ -155,24 +169,30 @@ static int dm_test_video_text(struct unit_test_state *uts) +@@ -154,24 +168,30 @@ static int dm_test_video_text(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "8x16", 0)); ut_asserteq(46, compress_frame_buffer(uts, dev)); @@ -112,7 +112,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -191,24 +211,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) +@@ -190,24 +210,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "12x22", 0)); ut_asserteq(46, compress_frame_buffer(uts, dev)); @@ -143,7 +143,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -226,6 +252,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) +@@ -225,6 +251,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) ut_assertok(vidconsole_select_font(con, "8x16", 0)); vidconsole_put_string(con, test_string); ut_asserteq(466, compress_frame_buffer(uts, dev)); @@ -151,7 +151,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -247,19 +274,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) +@@ -246,19 +273,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) video_clear(con->parent); video_sync(con->parent, false); ut_asserteq(46, compress_frame_buffer(uts, dev)); @@ -175,7 +175,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -292,11 +323,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, +@@ -291,11 +322,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "8x16", 0)); ut_asserteq(46, compress_frame_buffer(uts, dev)); @@ -189,7 +189,7 @@ index d907f681600..641a6250100 100644 /* Check display scrolling */ for (i = 0; i < SCROLL_LINES; i++) { -@@ -304,11 +337,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, +@@ -303,11 +336,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, vidconsole_put_char(con, '\n'); } ut_asserteq(scroll_size, compress_frame_buffer(uts, dev)); @@ -203,7 +203,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -383,6 +418,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) +@@ -382,6 +417,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(1368, compress_frame_buffer(uts, dev)); @@ -211,7 +211,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -402,6 +438,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) +@@ -401,6 +437,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(1247, compress_frame_buffer(uts, dev)); @@ -219,7 +219,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -425,6 +462,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) +@@ -424,6 +461,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); ut_asserteq(3700, compress_frame_buffer(uts, dev)); @@ -227,7 +227,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -448,6 +486,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) +@@ -447,6 +485,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); ut_asserteq(3656, compress_frame_buffer(uts, dev)); @@ -235,7 +235,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -471,6 +510,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) +@@ -470,6 +509,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); ut_asserteq(6827, compress_frame_buffer(uts, dev)); @@ -243,7 +243,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -489,6 +529,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) +@@ -488,6 +528,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(2024, compress_frame_buffer(uts, dev)); @@ -251,7 +251,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -505,6 +546,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) +@@ -504,6 +545,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(1368, compress_frame_buffer(uts, dev)); @@ -259,7 +259,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -524,6 +566,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) +@@ -523,6 +565,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(2024, compress_frame_buffer(uts, dev)); @@ -267,7 +267,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -543,6 +586,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) +@@ -542,6 +585,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); ut_asserteq(1247, compress_frame_buffer(uts, dev)); @@ -275,7 +275,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -558,6 +602,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) +@@ -557,6 +601,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(12174, compress_frame_buffer(uts, dev)); @@ -283,7 +283,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -579,6 +624,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) +@@ -578,6 +623,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(34287, compress_frame_buffer(uts, dev)); @@ -291,7 +291,7 @@ index d907f681600..641a6250100 100644 return 0; } -@@ -600,6 +646,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) +@@ -599,6 +645,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(29471, compress_frame_buffer(uts, dev)); @@ -300,9 +300,9 @@ index d907f681600..641a6250100 100644 return 0; } -- -2.45.1 +2.48.1 -From 6c7cff43f374242ed4d585f7359fa5c334332a0a Mon Sep 17 00:00:00 2001 +From 37f92f0ac721bc300659d166d8a19f6b18b2bbcb Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:50:59 +0300 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer @@ -325,10 +325,10 @@ Reviewed-by: Simon Glass 1 file changed, 41 insertions(+), 35 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index 641a6250100..b9ff3da10c1 100644 +index 01fa9e1b241..edb1b4ede8c 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -57,22 +57,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT); * * @uts: Test state * @dev: Video device @@ -359,7 +359,7 @@ index 641a6250100..b9ff3da10c1 100644 3, 0, 0); free(dest); if (ret) -@@ -168,30 +174,30 @@ static int dm_test_video_text(struct unit_test_state *uts) +@@ -167,30 +173,30 @@ static int dm_test_video_text(struct unit_test_state *uts) ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "8x16", 0)); @@ -396,7 +396,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -210,30 +216,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) +@@ -209,30 +215,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts) ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "12x22", 0)); @@ -433,7 +433,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -251,7 +257,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) +@@ -250,7 +256,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "8x16", 0)); vidconsole_put_string(con, test_string); @@ -442,7 +442,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -273,23 +279,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) +@@ -272,23 +278,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts) /* reference clear: */ video_clear(con->parent); video_sync(con->parent, false); @@ -470,7 +470,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -322,13 +328,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, +@@ -321,13 +327,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_assertok(vidconsole_select_font(con, "8x16", 0)); @@ -486,7 +486,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); /* Check display scrolling */ -@@ -336,13 +342,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, +@@ -335,13 +341,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, vidconsole_put_char(con, 'A' + i % 50); vidconsole_put_char(con, '\n'); } @@ -502,7 +502,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -417,7 +423,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) +@@ -416,7 +422,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -511,7 +511,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -437,7 +443,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) +@@ -436,7 +442,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -520,7 +520,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -461,7 +467,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) +@@ -460,7 +466,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts) &src_len)); ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); @@ -529,7 +529,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -485,7 +491,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) +@@ -484,7 +490,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts) &src_len)); ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); @@ -538,7 +538,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -509,7 +515,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) +@@ -508,7 +514,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts) &src_len)); ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); @@ -547,7 +547,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -528,7 +534,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) +@@ -527,7 +533,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -556,7 +556,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -545,7 +551,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) +@@ -544,7 +550,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx-comp.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -565,7 +565,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -565,7 +571,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) +@@ -564,7 +570,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -574,7 +574,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -585,7 +591,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) +@@ -584,7 +590,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts) ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -583,7 +583,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -601,7 +607,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) +@@ -600,7 +606,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts) ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); @@ -592,7 +592,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -623,7 +629,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) +@@ -622,7 +628,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); @@ -601,7 +601,7 @@ index 641a6250100..b9ff3da10c1 100644 ut_assertok(check_copy_frame_buffer(uts, dev)); return 0; -@@ -645,7 +651,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) +@@ -644,7 +650,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); @@ -611,11 +611,11 @@ index 641a6250100..b9ff3da10c1 100644 return 0; -- -2.45.1 +2.48.1 -From 1020e92b30457fa042a78395dabce0f50d07de8e Mon Sep 17 00:00:00 2001 -From: Alper Nebi Yasak -Date: Mon, 21 Aug 2023 16:51:00 +0300 +From eb739214f97a59e2d902b965f9990eab9b243658 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 18 Feb 2025 21:42:26 +0000 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame buffer @@ -627,18 +627,19 @@ sync. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass +Signed-off-by: Peter Robinson --- test/dm/video.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/test/dm/video.c b/test/dm/video.c -index b9ff3da10c1..e4bd27a6b76 100644 +index edb1b4ede8c..d520938d1b2 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -657,3 +657,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) +@@ -656,3 +656,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) return 0; } - DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + DM_TEST(dm_test_video_truetype_bs, UTF_SCAN_PDATA | UTF_SCAN_FDT); + +/* Test partial rendering onto hardware frame buffer */ +static int dm_test_video_copy(struct unit_test_state *uts) @@ -694,11 +695,11 @@ index b9ff3da10c1..e4bd27a6b76 100644 +} +DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- -2.45.1 +2.48.1 -From 57b3429b596c7ed89c1858663c87865e11d965e2 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 21 Aug 2023 16:51:01 +0300 +From 60e428bb54f2f7ee922f53ec3d3e0976a37bd47d Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 18 Feb 2025 21:51:29 +0000 Subject: [PATCH 04/13] dm: video: Add damage tracking API We are going to introduce image damage tracking to fasten up screen @@ -714,17 +715,18 @@ Reported-by: Da Xue Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass +Signed-off-by: Peter Robinson --- - drivers/video/Kconfig | 13 ++++++++++++ - drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++++--- - include/video.h | 32 ++++++++++++++++++++++++++-- - 3 files changed, 81 insertions(+), 5 deletions(-) + drivers/video/Kconfig | 13 +++++++++++++ + drivers/video/video-uclass.c | 37 ++++++++++++++++++++++++++++++++++++ + include/video.h | 32 +++++++++++++++++++++++++++++-- + 3 files changed, 80 insertions(+), 2 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 7808ae7919e..7815b590481 100644 +index 3c3cebaacd0..5d67067891b 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -92,6 +92,19 @@ config VIDEO_COPY +@@ -98,6 +98,19 @@ config VIDEO_COPY To use this, your video driver must set @copy_base in struct video_uc_plat. @@ -745,10 +747,10 @@ index 7808ae7919e..7815b590481 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 7b5d1dfbb3b..99a8458199a 100644 +index ff4f2199585..ad20af760b8 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -347,9 +347,39 @@ void video_set_default_colors(struct udevice *dev, bool invert) +@@ -367,6 +367,35 @@ void video_set_default_colors(struct udevice *dev, bool invert) priv->colour_bg = video_index_to_colour(priv, back); } @@ -784,31 +786,13 @@ index 7b5d1dfbb3b..99a8458199a 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -+ struct video_priv *priv = dev_get_uclass_priv(vid); - struct video_ops *ops = video_get_ops(vid); - int ret; - -@@ -365,15 +395,12 @@ int video_sync(struct udevice *vid, bool force) - * out whether it exists? For now, ARM is safe. - */ - #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -- struct video_priv *priv = dev_get_uclass_priv(vid); -- - if (priv->flush_dcache) { - flush_dcache_range((ulong)priv->fb, - ALIGN((ulong)priv->fb + priv->fb_size, - CONFIG_SYS_CACHELINE_SIZE)); - } +@@ -398,8 +427,16 @@ int video_sync(struct udevice *vid, bool force) #elif defined(CONFIG_VIDEO_SANDBOX_SDL) -- struct video_priv *priv = dev_get_uclass_priv(vid); - static ulong last_sync; - - if (force || get_timer(last_sync) > 100) { -@@ -381,6 +408,14 @@ int video_sync(struct udevice *vid, bool force) - last_sync = get_timer(0); - } + sandbox_sdl_sync(priv->fb); #endif + + priv->last_sync = get_timer(0); + + if (IS_ENABLED(CONFIG_VIDEO_DAMAGE)) { + priv->damage.xstart = priv->xsize; + priv->damage.ystart = priv->ysize; @@ -820,10 +804,10 @@ index 7b5d1dfbb3b..99a8458199a 100644 } diff --git a/include/video.h b/include/video.h -index 4d8df9baaad..1310195f307 100644 +index a1f7fd7e839..92aa5da4ff3 100644 --- a/include/video.h +++ b/include/video.h -@@ -88,6 +88,11 @@ enum video_format { +@@ -85,6 +85,11 @@ enum video_format { * @fb_size: Frame buffer size * @copy_fb: Copy of the frame buffer to keep up to date; see struct * video_uc_plat @@ -835,7 +819,7 @@ index 4d8df9baaad..1310195f307 100644 * @line_length: Length of each frame buffer line, in bytes. This can be * set by the driver, but if not, the uclass will set it after * probing -@@ -115,6 +120,12 @@ struct video_priv { +@@ -113,6 +118,12 @@ struct video_priv { void *fb; int fb_size; void *copy_fb; @@ -848,7 +832,7 @@ index 4d8df9baaad..1310195f307 100644 int line_length; u32 colour_fg; u32 colour_bg; -@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -259,8 +270,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, * @return: 0 on success, error code otherwise * * Some frame buffers are cached or have a secondary frame buffer. This @@ -860,7 +844,7 @@ index 4d8df9baaad..1310195f307 100644 */ int video_sync(struct udevice *vid, bool force); -@@ -378,6 +390,22 @@ static inline int video_sync_copy_all(struct udevice *dev) +@@ -380,6 +392,22 @@ static inline int video_sync_copy_all(struct udevice *dev) #endif @@ -884,9 +868,9 @@ index 4d8df9baaad..1310195f307 100644 * video_is_active() - Test if one video device it active * -- -2.45.1 +2.48.1 -From 6677746b0fc8b653af608513bdef54b379b4ee7d Mon Sep 17 00:00:00 2001 +From 8c180ab43a35b355a4f1612d813ec2e655bc7b37 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:02 +0300 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills @@ -904,10 +888,10 @@ Reviewed-by: Simon Glass 1 file changed, 4 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 99a8458199a..96b8962b8de 100644 +index ad20af760b8..43b714085a7 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -196,6 +196,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -214,6 +214,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, if (ret) return ret; @@ -916,7 +900,7 @@ index 99a8458199a..96b8962b8de 100644 return 0; } -@@ -245,6 +247,8 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -262,6 +264,8 @@ int video_fill(struct udevice *dev, u32 colour) if (ret) return ret; @@ -926,9 +910,9 @@ index 99a8458199a..96b8962b8de 100644 } -- -2.45.1 +2.48.1 -From 96ee787a7966c0357e5f028317b85a8593757883 Mon Sep 17 00:00:00 2001 +From 8047ae54ddde0b5ac6aa7503710e7c3d9c56bc67 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:03 +0300 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole @@ -953,10 +937,10 @@ Reviewed-by: Simon Glass 4 files changed, 94 insertions(+) diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index 34ef5a52294..6634d3f27da 100644 +index 6f4194a1814..51ac8cc78e9 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c -@@ -40,6 +40,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) +@@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -969,7 +953,7 @@ index 34ef5a52294..6634d3f27da 100644 return 0; } -@@ -61,6 +67,12 @@ static int console_move_rows(struct udevice *dev, uint rowdst, +@@ -60,6 +66,12 @@ static int console_move_rows(struct udevice *dev, uint rowdst, if (ret) return ret; @@ -982,7 +966,7 @@ index 34ef5a52294..6634d3f27da 100644 return 0; } -@@ -92,6 +104,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -91,6 +103,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -996,10 +980,10 @@ index 34ef5a52294..6634d3f27da 100644 if (ret) return ret; diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index e4303dfb364..8129c7b2aa7 100644 +index a3f8c6352f8..f11dc3a0b07 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c -@@ -37,6 +37,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1012,7 +996,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -65,6 +71,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -64,6 +70,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } @@ -1025,7 +1009,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -98,6 +110,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -97,6 +109,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1038,7 +1022,7 @@ index e4303dfb364..8129c7b2aa7 100644 return VID_TO_POS(fontdata->width); } -@@ -123,6 +141,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1051,7 +1035,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -144,6 +168,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vidconsole_memmove(dev, dst, src, fontdata->height * vid_priv->line_length * count); @@ -1064,7 +1048,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -177,6 +207,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -175,6 +205,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1077,7 +1061,7 @@ index e4303dfb364..8129c7b2aa7 100644 return VID_TO_POS(fontdata->width); } -@@ -201,6 +237,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -199,6 +235,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1090,7 +1074,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -227,6 +269,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -225,6 +267,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } @@ -1103,7 +1087,7 @@ index e4303dfb364..8129c7b2aa7 100644 return 0; } -@@ -259,6 +307,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -257,6 +305,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1117,10 +1101,10 @@ index e4303dfb364..8129c7b2aa7 100644 } diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 28665a32757..ed6c9cbb4f4 100644 +index 17a29817664..073ddcfb695 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -191,6 +191,7 @@ struct console_tt_store { +@@ -190,6 +190,7 @@ struct console_tt_store { static int console_truetype_set_row(struct udevice *dev, uint row, int clr) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1128,7 +1112,7 @@ index 28665a32757..ed6c9cbb4f4 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; -@@ -234,6 +235,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -233,6 +234,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1141,7 +1125,7 @@ index 28665a32757..ed6c9cbb4f4 100644 return 0; } -@@ -241,6 +248,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -240,6 +247,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, uint rowsrc, uint count) { struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); @@ -1149,7 +1133,7 @@ index 28665a32757..ed6c9cbb4f4 100644 struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *dst; -@@ -259,6 +267,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -258,6 +266,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, for (i = 0; i < priv->pos_ptr; i++) priv->pos[i].ypos -= diff; @@ -1162,7 +1146,7 @@ index 28665a32757..ed6c9cbb4f4 100644 return 0; } -@@ -419,6 +433,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -418,6 +432,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, line += vid_priv->line_length; } @@ -1177,10 +1161,10 @@ index 28665a32757..ed6c9cbb4f4 100644 if (ret) return ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 96b8962b8de..cbdda274f2d 100644 +index 43b714085a7..d175ed61ac8 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -192,6 +192,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -210,6 +210,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, } line += priv->line_length; } @@ -1189,9 +1173,9 @@ index 96b8962b8de..cbdda274f2d 100644 if (ret) return ret; -- -2.45.1 +2.48.1 -From 077a499a8fc2ccad28114264c8792d342bf8536c Mon Sep 17 00:00:00 2001 +From f701195fca932fda3b08ddfe6317fb2ca01f0fcf Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Mon, 21 Aug 2023 16:51:04 +0300 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole @@ -1209,10 +1193,10 @@ Reviewed-by: Simon Glass 2 files changed, 57 insertions(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 93b52f2de5c..2051f0a3d7a 100644 +index 7b35ad8a88f..d9e5ac6af48 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y +@@ -328,6 +328,7 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1221,10 +1205,10 @@ index 93b52f2de5c..2051f0a3d7a 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/test/dm/video.c b/test/dm/video.c -index e4bd27a6b76..8c7d9800a42 100644 +index d520938d1b2..9da00be5479 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -711,3 +711,59 @@ static int dm_test_video_copy(struct unit_test_state *uts) +@@ -710,3 +710,59 @@ static int dm_test_video_copy(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); @@ -1285,9 +1269,9 @@ index e4bd27a6b76..8c7d9800a42 100644 +} +DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- -2.45.1 +2.48.1 -From e5b927255d0375408a5ff14403a978aca09fa68f Mon Sep 17 00:00:00 2001 +From 88bc7e2c640a504bbd7de27b28a3ad2b05d43163 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:05 +0300 Subject: [PATCH 08/13] video: Add damage notification on bmp display @@ -1304,10 +1288,10 @@ Signed-off-by: Alper Nebi Yasak 1 file changed, 2 insertions(+) diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c -index 45f003c8251..10943b9ca19 100644 +index ad512d99a1b..78de9560792 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c -@@ -460,6 +460,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, +@@ -459,6 +459,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, break; }; @@ -1317,9 +1301,9 @@ index 45f003c8251..10943b9ca19 100644 fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); ret = video_sync_copy(dev, start, fb); -- -2.45.1 +2.48.1 -From d31ef2b17c98d0b7b1040e5abda99bb1720eb8c0 Mon Sep 17 00:00:00 2001 +From a3680479d62d38637fc26750756a8cddac380aaf Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:06 +0300 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT @@ -1338,10 +1322,10 @@ Reviewed-by: Simon Glass 1 file changed, 7 insertions(+) diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c -index 41e12fa7246..1694e23dcc6 100644 +index 4593975be5a..3abb47d610e 100644 --- a/lib/efi_loader/efi_gop.c +++ b/lib/efi_loader/efi_gop.c -@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; +@@ -26,6 +26,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; * @ops: graphical output protocol interface * @info: graphical output mode information * @mode: graphical output mode @@ -1349,7 +1333,7 @@ index 41e12fa7246..1694e23dcc6 100644 * @bpix: bits per pixel * @fb: frame buffer */ -@@ -32,6 +33,7 @@ struct efi_gop_obj { +@@ -34,6 +35,7 @@ struct efi_gop_obj { struct efi_gop ops; struct efi_gop_mode_info info; struct efi_gop_mode mode; @@ -1357,7 +1341,7 @@ index 41e12fa7246..1694e23dcc6 100644 /* Fields we only have access to during init */ u32 bpix; void *fb; -@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -122,6 +124,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, u32 *fb32 = gopobj->fb; u16 *fb16 = gopobj->fb; struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4); @@ -1365,7 +1349,7 @@ index 41e12fa7246..1694e23dcc6 100644 if (delta) { /* Check for 4 byte alignment */ -@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -245,6 +248,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, dlineoff += dwidth; } @@ -1375,7 +1359,7 @@ index 41e12fa7246..1694e23dcc6 100644 return EFI_SUCCESS; } -@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void) +@@ -551,6 +557,7 @@ efi_status_t efi_gop_register(void) gopobj->info.pixels_per_scanline = col; gopobj->bpix = bpix; gopobj->fb = map_sysmem(fb_base, fb_size); @@ -1384,11 +1368,11 @@ index 41e12fa7246..1694e23dcc6 100644 return EFI_SUCCESS; } -- -2.45.1 +2.48.1 -From 63e4c90e38c476d89148f4328778af0adcbe7adf Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 21 Aug 2023 16:51:07 +0300 +From cbbd24764c84943078d07728e3c0f4b55268b0dc Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 18 Feb 2025 21:53:28 +0000 Subject: [PATCH 10/13] video: Only dcache flush damaged lines Now that we have a damage area tells us which parts of the frame buffer @@ -1401,15 +1385,16 @@ Reported-by: Da Xue [Alper: Use damage.xstart/yend, IS_ENABLED()] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak +Signed-off-by: Peter Robinson --- drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index cbdda274f2d..e009be4f55d 100644 +index d175ed61ac8..6452ff5039e 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -381,6 +381,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -401,6 +401,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) priv->damage.yend = max(yend, priv->damage.yend); } @@ -1451,7 +1436,7 @@ index cbdda274f2d..e009be4f55d 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -400,11 +435,7 @@ int video_sync(struct udevice *vid, bool force) +@@ -424,11 +459,7 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -1462,18 +1447,15 @@ index cbdda274f2d..e009be4f55d 100644 - } + video_flush_dcache(vid); #elif defined(CONFIG_VIDEO_SANDBOX_SDL) - static ulong last_sync; - + sandbox_sdl_sync(priv->fb); + #endif -- -2.45.1 +2.48.1 -From 09e504af253b3f3062891d59ad17c4fb8193dcc7 Mon Sep 17 00:00:00 2001 +From d0c47756db0fbd0c50d4cbc377a35af7133493f3 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 25 May 2024 12:18:41 +0100 -Subject: [PATCH 11/13] From e9d51b4dcbfa43aa0e4d2b4f285bf94c295603e4 Mon Sep - 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug - 2023 16:51:08 +0300 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for - VIDEO_COPY +Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we print a single character, it will always copy the full range of bytes @@ -1513,10 +1495,10 @@ Signed-off-by: Peter Robinson 11 files changed, 43 insertions(+), 248 deletions(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 2051f0a3d7a..93b52f2de5c 100644 +index d9e5ac6af48..7b35ad8a88f 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y +@@ -328,7 +328,6 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1525,10 +1507,10 @@ index 2051f0a3d7a..93b52f2de5c 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 7815b590481..88c6f8e6897 100644 +index 5d67067891b..964174b01ac 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE +@@ -89,11 +89,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE config VIDEO_COPY bool "Enable copying the frame buffer to a hardware copy" @@ -1543,7 +1525,7 @@ index 7815b590481..88c6f8e6897 100644 To use this, your video driver must set @copy_base in struct video_uc_plat. -@@ -105,6 +108,8 @@ config VIDEO_DAMAGE +@@ -111,6 +114,8 @@ config VIDEO_DAMAGE regions of the frame buffer that were modified before, speeding up screen refreshes significantly. @@ -1553,10 +1535,10 @@ index 7815b590481..88c6f8e6897 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index 6634d3f27da..fbfd2caabc6 100644 +index 51ac8cc78e9..07db613ac53 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c -@@ -36,10 +36,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) +@@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); end = dst; @@ -1567,7 +1549,7 @@ index 6634d3f27da..fbfd2caabc6 100644 video_damage(dev->parent, 0, fontdata->height * row, -@@ -58,14 +54,11 @@ static int console_move_rows(struct udevice *dev, uint rowdst, +@@ -57,14 +53,11 @@ static int console_move_rows(struct udevice *dev, uint rowdst, void *dst; void *src; int size; @@ -1583,7 +1565,7 @@ index 6634d3f27da..fbfd2caabc6 100644 video_damage(dev->parent, 0, -@@ -110,10 +103,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -109,10 +102,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp) fontdata->width, fontdata->height); @@ -1595,10 +1577,10 @@ index 6634d3f27da..fbfd2caabc6 100644 } diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 8129c7b2aa7..fa0b4faf63b 100644 +index f11dc3a0b07..886b25dcfaf 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c -@@ -22,7 +22,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) int pbytes = VNBYTES(vid_priv->bpix); void *start, *dst, *line; int i, j; @@ -1606,7 +1588,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 start = vid_priv->fb + vid_priv->line_length - (row + 1) * fontdata->height * pbytes; -@@ -33,9 +32,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) +@@ -32,9 +31,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); line += vid_priv->line_length; } @@ -1616,7 +1598,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, vid_priv->xsize - ((row + 1) * fontdata->height), -@@ -55,7 +51,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -54,7 +50,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, int pbytes = VNBYTES(vid_priv->bpix); void *dst; void *src; @@ -1625,7 +1607,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 dst = vid_priv->fb + vid_priv->line_length - (rowdst + count) * fontdata->height * pbytes; -@@ -63,10 +59,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -62,10 +58,7 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, (rowsrc + count) * fontdata->height * pbytes; for (j = 0; j < vid_priv->ysize; j++) { @@ -1637,7 +1619,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 src += vid_priv->line_length; dst += vid_priv->line_length; } -@@ -106,10 +99,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -105,10 +98,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp) return ret; /* We draw backwards from 'start, so account for the first line */ @@ -1648,7 +1630,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, vid_priv->xsize - y - fontdata->height, linenum - 1, -@@ -127,7 +116,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; void *start, *line, *dst, *end; int pixels = fontdata->height * vid_priv->xsize; @@ -1657,7 +1639,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 int pbytes = VNBYTES(vid_priv->bpix); start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length - -@@ -137,9 +126,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) for (i = 0; i < pixels; i++) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); end = dst; @@ -1667,7 +1649,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, 0, -@@ -165,8 +151,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vid_priv->line_length; src = end - (rowsrc + count) * fontdata->height * vid_priv->line_length; @@ -1677,7 +1659,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, 0, -@@ -202,11 +187,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -200,11 +185,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1689,7 +1671,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, x - fontdata->width + 1, linenum - fontdata->height + 1, -@@ -223,7 +203,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -221,7 +201,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; int pbytes = VNBYTES(vid_priv->bpix); void *start, *dst, *line; @@ -1698,7 +1680,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 start = vid_priv->fb + row * fontdata->height * pbytes; line = start; -@@ -233,9 +213,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -231,9 +211,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); line += vid_priv->line_length; } @@ -1708,7 +1690,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 video_damage(dev->parent, row * fontdata->height, -@@ -255,16 +232,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -253,16 +230,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, int pbytes = VNBYTES(vid_priv->bpix); void *dst; void *src; @@ -1727,7 +1709,7 @@ index 8129c7b2aa7..fa0b4faf63b 100644 src += vid_priv->line_length; dst += vid_priv->line_length; } -@@ -300,10 +274,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -298,10 +272,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) line = start; ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); @@ -1739,10 +1721,10 @@ index 8129c7b2aa7..fa0b4faf63b 100644 return ret; diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index ed6c9cbb4f4..4cf9b013293 100644 +index 073ddcfb695..0dfd7914dc1 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c -@@ -195,7 +195,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) struct console_tt_priv *priv = dev_get_priv(dev); struct console_tt_metrics *met = priv->cur_met; void *end, *line; @@ -1750,7 +1732,7 @@ index ed6c9cbb4f4..4cf9b013293 100644 line = vid_priv->fb + row * met->font_size * vid_priv->line_length; end = line + met->font_size * vid_priv->line_length; -@@ -231,9 +230,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) +@@ -230,9 +229,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) default: return -ENOSYS; } @@ -1760,7 +1742,7 @@ index ed6c9cbb4f4..4cf9b013293 100644 video_damage(dev->parent, 0, -@@ -253,14 +249,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, +@@ -252,14 +248,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst, struct console_tt_metrics *met = priv->cur_met; void *dst; void *src; @@ -1777,7 +1759,7 @@ index ed6c9cbb4f4..4cf9b013293 100644 /* Scroll up our position history */ diff = (rowsrc - rowdst) * met->font_size; -@@ -293,7 +286,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -292,7 +285,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, u8 *bits, *data; int advance; void *start, *end, *line; @@ -1786,7 +1768,7 @@ index ed6c9cbb4f4..4cf9b013293 100644 /* First get some basic metrics about this character */ stbtt_GetCodepointHMetrics(font, cp, &advance, &lsb); -@@ -440,9 +433,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, +@@ -439,9 +432,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, width, height); @@ -1797,10 +1779,10 @@ index ed6c9cbb4f4..4cf9b013293 100644 return width_frac; diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 5d06e51ff23..5f1dd0aaa41 100644 +index ebe96bf0c2f..a1dfd35b7b8 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c -@@ -760,22 +760,6 @@ UCLASS_DRIVER(vidconsole) = { +@@ -761,22 +761,6 @@ UCLASS_DRIVER(vidconsole) = { .per_device_auto = sizeof(struct vidconsole_priv), }; @@ -1824,10 +1806,10 @@ index 5d06e51ff23..5f1dd0aaa41 100644 { int ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index e009be4f55d..b3eeccb996d 100644 +index 6452ff5039e..a828e67341b 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -153,7 +153,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -171,7 +171,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, struct video_priv *priv = dev_get_uclass_priv(dev); void *start, *line; int pixels = xend - xstart; @@ -1836,7 +1818,7 @@ index e009be4f55d..b3eeccb996d 100644 start = priv->fb + ystart * priv->line_length; start += xstart * VNBYTES(priv->bpix); -@@ -193,10 +193,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -211,10 +211,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, line += priv->line_length; } @@ -1847,7 +1829,7 @@ index e009be4f55d..b3eeccb996d 100644 video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); return 0; -@@ -219,7 +215,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) +@@ -236,7 +232,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) int video_fill(struct udevice *dev, u32 colour) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -1855,7 +1837,7 @@ index e009be4f55d..b3eeccb996d 100644 switch (priv->bpix) { case VIDEO_BPP16: -@@ -244,9 +239,6 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -261,9 +256,6 @@ int video_fill(struct udevice *dev, u32 colour) memset(priv->fb, colour, priv->fb_size); break; } @@ -1865,7 +1847,7 @@ index e009be4f55d..b3eeccb996d 100644 video_damage(dev, 0, 0, priv->xsize, priv->ysize); -@@ -416,6 +408,27 @@ static void video_flush_dcache(struct udevice *vid) +@@ -436,6 +428,27 @@ static void video_flush_dcache(struct udevice *vid) } #endif @@ -1893,7 +1875,7 @@ index e009be4f55d..b3eeccb996d 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -423,6 +436,9 @@ int video_sync(struct udevice *vid, bool force) +@@ -443,6 +456,9 @@ int video_sync(struct udevice *vid, bool force) struct video_ops *ops = video_get_ops(vid); int ret; @@ -1903,7 +1885,7 @@ index e009be4f55d..b3eeccb996d 100644 if (ops && ops->video_sync) { ret = ops->video_sync(vid); if (ret) -@@ -503,69 +519,6 @@ int video_get_ysize(struct udevice *dev) +@@ -524,69 +540,6 @@ int video_get_ysize(struct udevice *dev) return priv->ysize; } @@ -1974,10 +1956,10 @@ index e009be4f55d..b3eeccb996d 100644 extern u8 __splash_ ## _name ## _begin[]; \ extern u8 __splash_ ## _name ## _end[] diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c -index 10943b9ca19..da2bbe864a0 100644 +index 78de9560792..1f267d45812 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c -@@ -268,7 +268,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, +@@ -267,7 +267,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, enum video_format eformat; struct bmp_color_table_entry *palette; int hdr_size; @@ -1985,7 +1967,7 @@ index 10943b9ca19..da2bbe864a0 100644 if (!bmp || !(bmp->header.signature[0] == 'B' && bmp->header.signature[1] == 'M')) { -@@ -462,11 +461,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, +@@ -461,11 +460,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, video_damage(dev, x, y, width, height); @@ -1998,10 +1980,10 @@ index 10943b9ca19..da2bbe864a0 100644 return video_sync(dev, false); } diff --git a/include/video.h b/include/video.h -index 1310195f307..29eff3c0900 100644 +index 92aa5da4ff3..26327473738 100644 --- a/include/video.h +++ b/include/video.h -@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); +@@ -355,43 +355,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); */ int video_default_font_height(struct udevice *dev); @@ -2046,10 +2028,10 @@ index 1310195f307..29eff3c0900 100644 * video_damage() - Notify the video subsystem about screen updates. * diff --git a/include/video_console.h b/include/video_console.h -index 8b5928dc5eb..8806d10f946 100644 +index 723d2315606..13197fa4518 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev); +@@ -537,56 +537,4 @@ void vidconsole_list_fonts(struct udevice *dev); */ int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); @@ -2107,10 +2089,10 @@ index 8b5928dc5eb..8806d10f946 100644 - #endif diff --git a/test/dm/video.c b/test/dm/video.c -index 8c7d9800a42..4c3bcd26e94 100644 +index 9da00be5479..eda1195d3b9 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -106,6 +106,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts, +@@ -105,6 +105,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts, if (!IS_ENABLED(CONFIG_VIDEO_COPY)) return 0; @@ -2118,7 +2100,7 @@ index 8c7d9800a42..4c3bcd26e94 100644 ut_assertf(!memcmp(priv->fb, priv->copy_fb, priv->fb_size), "Copy framebuffer does not match fb"); -@@ -706,7 +707,7 @@ static int dm_test_video_copy(struct unit_test_state *uts) +@@ -705,7 +706,7 @@ static int dm_test_video_copy(struct unit_test_state *uts) vidconsole_put_string(con, test_string); vidconsole_put_string(con, test_string); ut_asserteq(7589, compress_frame_buffer(uts, dev, false)); @@ -2128,11 +2110,11 @@ index 8c7d9800a42..4c3bcd26e94 100644 return 0; } -- -2.45.1 +2.48.1 -From 6b90fed4745a705c1ca660a346a3563f0da8def5 Mon Sep 17 00:00:00 2001 -From: Alexander Graf -Date: Mon, 21 Aug 2023 16:51:09 +0300 +From 3fb044255ec50a026195586ced9e53499d701254 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 18 Feb 2025 21:57:38 +0000 Subject: [PATCH 12/13] video: Always compile cache flushing code The dcache flushing code path was conditional on ARM && !DCACHE config @@ -2150,15 +2132,16 @@ Reported-by: Heinrich Schuchardt Signed-off-by: Alexander Graf Reviewed-by: Simon Glass Signed-off-by: Alper Nebi Yasak +Signed-off-by: Peter Robinson --- drivers/video/video-uclass.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index b3eeccb996d..33ad9ff3fab 100644 +index a828e67341b..c566931a050 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -373,11 +373,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -393,11 +393,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) priv->damage.yend = max(yend, priv->damage.yend); } @@ -2173,7 +2156,7 @@ index b3eeccb996d..33ad9ff3fab 100644 if (!priv->flush_dcache) return; -@@ -406,7 +408,6 @@ static void video_flush_dcache(struct udevice *vid) +@@ -426,7 +428,6 @@ static void video_flush_dcache(struct udevice *vid) } } } @@ -2181,9 +2164,9 @@ index b3eeccb996d..33ad9ff3fab 100644 static void video_flush_copy(struct udevice *vid) { -@@ -445,14 +446,9 @@ int video_sync(struct udevice *vid, bool force) - return ret; - } +@@ -469,14 +470,9 @@ int video_sync(struct udevice *vid, bool force) + get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS) + return 0; - /* - * flush_dcache_range() is declared in common.h but it seems that some @@ -2195,13 +2178,13 @@ index b3eeccb996d..33ad9ff3fab 100644 -#elif defined(CONFIG_VIDEO_SANDBOX_SDL) + +#if defined(CONFIG_VIDEO_SANDBOX_SDL) - static ulong last_sync; + sandbox_sdl_sync(priv->fb); + #endif - if (force || get_timer(last_sync) > 100) { -- -2.45.1 +2.48.1 -From 7cfa667a11f245596e4b31842b0d646929be24e9 Mon Sep 17 00:00:00 2001 +From 7d1ef5a8dafc5e95d5db753010f53880f49e979e Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 21 Aug 2023 16:51:10 +0300 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it @@ -2232,10 +2215,10 @@ Reviewed-by: Simon Glass 9 files changed, 16 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index ddf9414b08e..3c9745065ba 100644 +index ba1b1541437..bb1ea961704 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -863,6 +863,7 @@ config VIDEO_SUNXI +@@ -882,6 +882,7 @@ config VIDEO_SUNXI depends on !SUNXI_GEN_NCAT2 select VIDEO select DISPLAY @@ -2244,10 +2227,10 @@ index ddf9414b08e..3c9745065ba 100644 default y ---help--- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 88c6f8e6897..06d3ed8a736 100644 +index 964174b01ac..6e1577ae687 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804 +@@ -534,6 +534,7 @@ config VIDEO_LCD_ANX9804 config ATMEL_LCD bool "Atmel LCD panel support" @@ -2255,7 +2238,7 @@ index 88c6f8e6897..06d3ed8a736 100644 depends on ARCH_AT91 config ATMEL_LCD_BGR555 -@@ -508,6 +509,7 @@ config ATMEL_LCD_BGR555 +@@ -543,6 +544,7 @@ config ATMEL_LCD_BGR555 config VIDEO_BCM2835 bool "Display support for BCM2835" @@ -2263,7 +2246,7 @@ index 88c6f8e6897..06d3ed8a736 100644 help The graphics processor already sets up the display so this driver simply checks the resolution and then sets up the frame buffer with -@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig" +@@ -715,6 +717,7 @@ source "drivers/video/meson/Kconfig" config VIDEO_MVEBU bool "Armada XP LCD controller" @@ -2271,7 +2254,7 @@ index 88c6f8e6897..06d3ed8a736 100644 ---help--- Support for the LCD controller integrated in the Marvell Armada XP SoC. -@@ -705,6 +708,7 @@ config NXP_TDA19988 +@@ -749,6 +752,7 @@ config NXP_TDA19988 config ATMEL_HLCD bool "Enable ATMEL video support using HLCDC" @@ -2279,7 +2262,7 @@ index 88c6f8e6897..06d3ed8a736 100644 help HLCDC supports video output to an attached LCD panel. -@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig" +@@ -825,6 +829,7 @@ source "drivers/video/tidss/Kconfig" config VIDEO_TEGRA124 bool "Enable video support on Tegra124" @@ -2287,7 +2270,7 @@ index 88c6f8e6897..06d3ed8a736 100644 help Tegra124 supports many video output options including eDP and HDMI. At present only eDP is supported by U-Boot. This option -@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig" +@@ -839,6 +844,7 @@ source "drivers/video/imx/Kconfig" config VIDEO_MXS bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs" @@ -2295,7 +2278,7 @@ index 88c6f8e6897..06d3ed8a736 100644 help Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors -@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI +@@ -901,6 +907,7 @@ config VIDEO_DW_MIPI_DSI config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" @@ -2303,7 +2286,7 @@ index 88c6f8e6897..06d3ed8a736 100644 help Enables a simple generic display driver which utilizes the simple-framebuffer devicetree bindings. -@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB +@@ -919,6 +926,7 @@ config VIDEO_DT_SIMPLEFB config VIDEO_MCDE_SIMPLE bool "Simple driver for ST-Ericsson MCDE with preconfigured display" @@ -2395,5 +2378,5 @@ index 95086f3a5d6..3291b3ceb8d 100644 TIDSS supports video output options LVDS and DPI . This option enables these supports which can be used on -- -2.45.1 +2.48.1 diff --git a/sources b/sources index 180c13e..f13eabc 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2025.04-rc1.tar.bz2) = b973b39c2665d30ab1a9b96fb1eaae70bbdd29dabb68e4cdcf84a11174482e8861ccd8984ca17f594ca6af15bf0517c5263574385836676413e16f911b5bbb4e +SHA512 (u-boot-2025.04-rc2.tar.bz2) = 1f86359009f69899c9310bf2cde21cede48541a5985f4d7dc4d4e4eddfb247ea6e778ca648e21df3d79231eb6b0d9f45646f09e972d5fb60a6fbfca013cecd57 diff --git a/uboot-tools.spec b/uboot-tools.spec index 5c55822..b655b95 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,4 +1,4 @@ -%global candidate rc1 +%global candidate rc2 %if 0%{?rhel} %bcond_with toolsonly %else @@ -7,7 +7,7 @@ Name: uboot-tools Version: 2025.04 -Release: 0.2%{?candidate:.%{candidate}}%{?dist} +Release: 0.3%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -27,7 +27,7 @@ Patch3: uefi-initial-find_fdt_location-for-finding-the-DT-on-disk.patch Patch4: disable-VBE-by-default.patch Patch5: enable-bootmenu-by-default.patch # Should be upstream but it's taking time -#Patch6: Add-video-damage-tracking.patch +Patch6: Add-video-damage-tracking.patch # Device improvments # RPi @@ -225,6 +225,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %endif %changelog +* Tue Feb 11 2025 Peter Robinson - 1:2025.04-0.3.rc2 +- Update to 2025.05 RC2 + * Tue Feb 11 2025 Peter Robinson - 1:2025.04-0.2.rc1 - Update to 2025.05 RC1 From df50b5d41bf91308089c9548d2955963ee4d7eba Mon Sep 17 00:00:00 2001 From: David Abdurachmanov Date: Tue, 20 Aug 2024 11:16:49 +0300 Subject: [PATCH 289/351] Add support for riscv64 Signed-off-by: David Abdurachmanov --- riscv64-boards | 4 ++++ uboot-tools.spec | 51 ++++++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 51 insertions(+), 4 deletions(-) create mode 100644 riscv64-boards diff --git a/riscv64-boards b/riscv64-boards new file mode 100644 index 0000000..f96e775 --- /dev/null +++ b/riscv64-boards @@ -0,0 +1,4 @@ +qemu-riscv64_spl +sifive_unleashed +sifive_unmatched +starfive_visionfive2 diff --git a/uboot-tools.spec b/uboot-tools.spec index b655b95..90aae1f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -5,9 +5,12 @@ %bcond_without toolsonly %endif +# Set it to "opensbi" (stable) or "opensbi-unstable" (unstable, git) +%global opensbi opensbi + Name: uboot-tools Version: 2025.04 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Epoch: 1 Summary: U-Boot utilities # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended. @@ -16,6 +19,7 @@ URL: http://www.denx.de/wiki/U-Boot ExcludeArch: s390x Source0: https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2 Source1: aarch64-boards +Source2: riscv64-boards # This is now legacy, most devices use bootflow, we keep this for the laggards Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch @@ -62,6 +66,9 @@ BuildRequires: xxd %endif %endif Requires: dtc +%ifarch riscv64 +BuildRequires: %{opensbi} +%endif %description This package contains a few U-Boot utilities - mkimage for creating boot images @@ -76,12 +83,21 @@ BuildArch: noarch %description -n uboot-images-armv8 U-Boot firmware binaries for aarch64 boards %endif + +%ifarch riscv64 +%package -n uboot-images-riscv64 +Summary: U-Boot firmware images for riscv64 boards +BuildArch: noarch + +%description -n uboot-images-riscv64 +U-Boot firmware binaries for riscv64 boards +%endif %endif %prep %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}} -cp %SOURCE1 . +cp %SOURCE1 %SOURCE2 . %build mkdir builds @@ -90,7 +106,12 @@ mkdir builds %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ %if %{with toolsonly} -%ifarch aarch64 +# OpenSBI firmware is distributed in U-Boot SPL images +%ifarch riscv64 +export OPENSBI=%{_datadir}/%{opensbi}/generic/firmware/fw_dynamic.bin +%endif + +%ifarch aarch64 riscv64 for board in $(cat %{_arch}-boards) do echo "Building board: $board" @@ -181,6 +202,19 @@ done # For Apple M-series we also need the nodtb variant install -pD -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin +%endif + +%ifarch riscv64 +for board in $(ls builds) +do + for file in u-boot.itb spl/u-boot-spl.bin spl/u-boot-spl.bin.normal.out + do + if [ -f builds/$(echo $board)/$(echo $file) ]; then + install -pD -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/$(echo $file) + fi + done +done +%endif # Bit of a hack to remove binaries we don't use as they're large for board in $(ls builds) @@ -191,7 +225,6 @@ do fi done %endif -%endif for tool in dumpimage env/fw_printenv fdt_add_pubkey fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc ifwitool img2srec kwboot mkeficapsule mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder do @@ -222,9 +255,19 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir} %dir %{_datadir}/uboot/ %{_datadir}/uboot/* %endif + +%ifarch riscv64 +%files -n uboot-images-riscv64 +%license Licenses/* +%dir %{_datadir}/uboot/ +%{_datadir}/uboot/* +%endif %endif %changelog +* Tue Feb 18 2025 David Abdurachmanov - 1:2025.04-0.4.rc2 +- Add support for riscv64 + * Tue Feb 11 2025 Peter Robinson - 1:2025.04-0.3.rc2 - Update to 2025.05 RC2 From 4aaac8b6b212340fc9b92daacbcd33c9d09c930f Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 7 Mar 2025 12:45:32 +0000 Subject: [PATCH 290/351] 2025.04 RC3 --- ...mem-node-for-preserving-distro-ISO-s.patch | 1288 +++++++++++++++++ USB-PD-TCPM-improvements.patch | 717 +++++++++ sources | 2 +- uboot-tools.spec | 11 +- 4 files changed, 2015 insertions(+), 3 deletions(-) create mode 100644 Add-pmem-node-for-preserving-distro-ISO-s.patch create mode 100644 USB-PD-TCPM-improvements.patch diff --git a/Add-pmem-node-for-preserving-distro-ISO-s.patch b/Add-pmem-node-for-preserving-distro-ISO-s.patch new file mode 100644 index 0000000..bc8620b --- /dev/null +++ b/Add-pmem-node-for-preserving-distro-ISO-s.patch @@ -0,0 +1,1288 @@ +From patchwork Fri Feb 28 08:45:24 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sughosh Ganu +X-Patchwork-Id: 2053441 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Z41yQ5Fkdz1yKH + for ; Fri, 28 Feb 2025 19:46:06 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 2504E81100; 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+ Fri, 28 Feb 2025 00:46:12 -0800 (PST) +Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2C1F13F673; + Fri, 28 Feb 2025 00:45:53 -0800 (PST) +From: Sughosh Ganu +To: u-boot@lists.denx.de +Cc: Ilias Apalodimas , + Simon Glass , Tom Rini , + Heinrich Schuchardt , + Anton Antonov , + Tobias Waldekranz , Bin Meng , + Masahisa Kojima , + Sughosh Ganu +Subject: [PATCH v6 1/6] fdt: add support for adding pmem nodes +Date: Fri, 28 Feb 2025 14:15:24 +0530 +Message-Id: <20250228084529.127823-2-sughosh.ganu@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20250228084529.127823-1-sughosh.ganu@linaro.org> +References: <20250228084529.127823-1-sughosh.ganu@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Masahisa Kojima + +One of the problems OS installers face, when running in EFI, is that +the mounted ISO after calling ExitBootServices goes away. For some +distros this is a problem since they rely on finding some core packages +before continuing the installation. Distros have works around this -- +e.g Fedora has a special kernel command line parameter called +inst.stage2 [0]. + +ACPI has NFIT and NVDIMM support to provide ramdisks to the OS, but we +don't have anything in place for DTs. Linux and device trees have support +for persistent memory devices. So add a function that can inject a pmem +node in a DT, so we can use it when launhing OS installers with EFI. + +[0] +https://docs.redhat.com/en/documentation/red_hat_enterprise_linux/7/html/installation_guide/chap-anaconda-boot-options#sect-boot-options-installer + +Signed-off-by: Masahisa Kojima +Signed-off-by: Sughosh Ganu +--- +Changes since V5: None + + boot/fdt_support.c | 41 ++++++++++++++++++++++++++++++++++++++++- + include/fdt_support.h | 14 ++++++++++++++ + 2 files changed, 54 insertions(+), 1 deletion(-) + +diff --git a/boot/fdt_support.c b/boot/fdt_support.c +index 49efeec3681..e20b9759138 100644 +--- a/boot/fdt_support.c ++++ b/boot/fdt_support.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -464,7 +465,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat, + do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); + } + +-#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY + /* + * fdt_pack_reg - pack address and size array into the "reg"-suitable stream + */ +@@ -493,6 +493,7 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, + return p - (char *)buf; + } + ++#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY + #if CONFIG_NR_DRAM_BANKS > 4 + #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS + #else +@@ -2222,3 +2223,41 @@ int fdt_valid(struct fdt_header **blobp) + } + return 1; + } ++ ++int fdt_fixup_pmem_region(void *blob, ulong addr, u32 size) ++{ ++ u64 pmem_start[2] = { 0 }; ++ u64 pmem_size[2] = { 0 }; ++ char pmem_node[32] = {0}; ++ int nodeoffset, len; ++ int err; ++ u8 tmp[4 * 16]; /* Up to 64-bit address + 64-bit size */ ++ ++ if (!IS_ALIGNED(addr, SZ_2M) || !IS_ALIGNED(addr + size, SZ_2M)) { ++ printf("Start and end address must be 2MiB aligned\n"); ++ return -1; ++ } ++ ++ snprintf(pmem_node, sizeof(pmem_node), "pmem@%lx", addr); ++ nodeoffset = fdt_find_or_add_subnode(blob, 0, pmem_node); ++ if (nodeoffset < 0) ++ return nodeoffset; ++ ++ err = fdt_setprop_string(blob, nodeoffset, "compatible", "pmem-region"); ++ if (err) ++ return err; ++ err = fdt_setprop_empty(blob, nodeoffset, "volatile"); ++ if (err) ++ return err; ++ pmem_start[0] = addr; ++ pmem_size[0] = size; ++ len = fdt_pack_reg(blob, tmp, pmem_start, pmem_size, 1); ++ err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); ++ if (err < 0) { ++ printf("WARNING: could not set pmem %s %s.\n", "reg", ++ fdt_strerror(err)); ++ return err; ++ } ++ ++ return 0; ++} +diff --git a/include/fdt_support.h b/include/fdt_support.h +index f0ad2e6b365..b72cd2920de 100644 +--- a/include/fdt_support.h ++++ b/include/fdt_support.h +@@ -507,4 +507,18 @@ void fdt_fixup_pstore(void *blob); + */ + int fdt_kaslrseed(void *blob, bool overwrite); + ++/** ++ * fdt_fixup_pmem_region() - add a pmem node on the device tree ++ * ++ * This functions adds/updates a pmem node to the device tree. ++ * Usually used with EFI installers to preserve installer ++ * images ++ * ++ * @blob: device tree provided by caller ++ * @addr: start address of the pmem node ++ * @size: size of the memory of the pmem node ++ * Return: 0 on success or < 0 on failure ++ */ ++int fdt_fixup_pmem_region(void *blob, ulong addr, u32 size); ++ + #endif /* ifndef __FDT_SUPPORT_H */ + +From patchwork Fri Feb 28 08:45:25 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sughosh Ganu +X-Patchwork-Id: 2053442 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Z41yc0t0Hz1yKH + for ; Fri, 28 Feb 2025 19:46:16 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 70EA880BA4; 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+ Fri, 28 Feb 2025 00:46:16 -0800 (PST) +Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E0A503F673; + Fri, 28 Feb 2025 00:45:57 -0800 (PST) +From: Sughosh Ganu +To: u-boot@lists.denx.de +Cc: Ilias Apalodimas , + Simon Glass , Tom Rini , + Heinrich Schuchardt , + Anton Antonov , + Tobias Waldekranz , Bin Meng , + Sughosh Ganu , + Heinrich Schuchardt +Subject: [PATCH v6 2/6] efi_loader: add a function to remove memory from the + EFI map +Date: Fri, 28 Feb 2025 14:15:25 +0530 +Message-Id: <20250228084529.127823-3-sughosh.ganu@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20250228084529.127823-1-sughosh.ganu@linaro.org> +References: <20250228084529.127823-1-sughosh.ganu@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Ilias Apalodimas + +With upcoming changes supporting pmem nodes, we need to remove the +pmem area from the EFI memory map. Add a function to do that. + +Signed-off-by: Ilias Apalodimas +Signed-off-by: Sughosh Ganu +Reviewed-by: Heinrich Schuchardt +--- +Changes since V5: None + + include/efi_loader.h | 18 ++++++++++++ + lib/efi_loader/efi_memory.c | 56 ++++++++++++++++++++++++++----------- + 2 files changed, 58 insertions(+), 16 deletions(-) + +diff --git a/include/efi_loader.h b/include/efi_loader.h +index 1d75d97ebbc..0ac00911598 100644 +--- a/include/efi_loader.h ++++ b/include/efi_loader.h +@@ -852,6 +852,24 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, + /* Adds a range into the EFI memory map */ + efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type); + ++/** ++ * efi_update_memory_map() - update the memory map by adding/removing pages ++ * ++ * @start: start address, must be a multiple of ++ * EFI_PAGE_SIZE ++ * @pages: number of pages to add ++ * @memory_type: type of memory added ++ * @overlap_conventional: region may only overlap free(conventional) ++ * memory ++ * @remove: remove memory map ++ * Return: status code ++ */ ++efi_status_t efi_update_memory_map(u64 start, u64 pages, int memory_type, ++ bool overlap_conventional, bool remove); ++ ++/* Remove memory from the EFI memory map */ ++efi_status_t efi_remove_memory_map(u64 start, u64 size, int memory_type); ++ + /* Called by board init to initialize the EFI drivers */ + efi_status_t efi_driver_init(void); + /* Called when a block device is added */ +diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c +index 6d00b186250..3fec40b6de5 100644 +--- a/lib/efi_loader/efi_memory.c ++++ b/lib/efi_loader/efi_memory.c +@@ -258,7 +258,7 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map, + } + + /** +- * efi_add_memory_map_pg() - add pages to the memory map ++ * efi_update_memory_map() - update the memory map by adding/removing pages + * + * @start: start address, must be a multiple of + * EFI_PAGE_SIZE +@@ -266,12 +266,11 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map, + * @memory_type: type of memory added + * @overlap_conventional: region may only overlap free(conventional) + * memory ++ * @remove: remove memory map + * Return: status code + */ +-static +-efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, +- int memory_type, +- bool overlap_conventional) ++efi_status_t efi_update_memory_map(u64 start, u64 pages, int memory_type, ++ bool overlap_conventional, bool remove) + { + struct efi_mem_list *lmem; + struct efi_mem_list *newlist; +@@ -279,9 +278,9 @@ efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, + uint64_t carved_pages = 0; + struct efi_event *evt; + +- EFI_PRINT("%s: 0x%llx 0x%llx %d %s\n", __func__, ++ EFI_PRINT("%s: 0x%llx 0x%llx %d %s %s\n", __func__, + start, pages, memory_type, overlap_conventional ? +- "yes" : "no"); ++ "yes" : "no", remove ? "remove" : "add"); + + if (memory_type >= EFI_MAX_MEMORY_TYPE) + return EFI_INVALID_PARAMETER; +@@ -364,7 +363,10 @@ efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, + } + + /* Add our new map */ +- list_add_tail(&newlist->link, &efi_mem); ++ if (!remove) ++ list_add_tail(&newlist->link, &efi_mem); ++ else ++ free(newlist); + + /* And make sure memory is listed in descending order */ + efi_mem_sort(); +@@ -401,7 +403,29 @@ efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type) + pages = efi_size_in_pages(size + (start & EFI_PAGE_MASK)); + start &= ~EFI_PAGE_MASK; + +- return efi_add_memory_map_pg(start, pages, memory_type, false); ++ return efi_update_memory_map(start, pages, memory_type, false, false); ++} ++ ++/** ++ * efi_remove_memory_map() - remove memory area to the memory map ++ * ++ * @start: start address of the memory area ++ * @size: length in bytes of the memory area ++ * @memory_type: type of memory removed ++ * ++ * Return: status code ++ * ++ * This function automatically aligns the start and size of the memory area ++ * to EFI_PAGE_SIZE. ++ */ ++efi_status_t efi_remove_memory_map(u64 start, u64 size, int memory_type) ++{ ++ u64 pages; ++ ++ pages = efi_size_in_pages(size + (start & EFI_PAGE_MASK)); ++ start &= ~EFI_PAGE_MASK; ++ ++ return efi_update_memory_map(start, pages, memory_type, false, true); + } + + /** +@@ -502,7 +526,7 @@ efi_status_t efi_allocate_pages(enum efi_allocate_type type, + + efi_addr = (u64)(uintptr_t)map_sysmem(addr, 0); + /* Reserve that map in our memory maps */ +- ret = efi_add_memory_map_pg(efi_addr, pages, memory_type, true); ++ ret = efi_update_memory_map(efi_addr, pages, memory_type, true, false); + if (ret != EFI_SUCCESS) { + /* Map would overlap, bail out */ + lmb_free_flags(addr, (u64)pages << EFI_PAGE_SHIFT, flags); +@@ -823,8 +847,8 @@ static void add_u_boot_and_runtime(void) + uboot_stack_size) & ~EFI_PAGE_MASK; + uboot_pages = ((uintptr_t)map_sysmem(gd->ram_top - 1, 0) - + uboot_start + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; +- efi_add_memory_map_pg(uboot_start, uboot_pages, EFI_BOOT_SERVICES_CODE, +- false); ++ efi_update_memory_map(uboot_start, uboot_pages, EFI_BOOT_SERVICES_CODE, ++ false, false); + #if defined(__aarch64__) + /* + * Runtime Services must be 64KiB aligned according to the +@@ -842,8 +866,8 @@ static void add_u_boot_and_runtime(void) + runtime_end = (uintptr_t)__efi_runtime_stop; + runtime_end = (runtime_end + runtime_mask) & ~runtime_mask; + runtime_pages = (runtime_end - runtime_start) >> EFI_PAGE_SHIFT; +- efi_add_memory_map_pg(runtime_start, runtime_pages, +- EFI_RUNTIME_SERVICES_CODE, false); ++ efi_update_memory_map(runtime_start, runtime_pages, ++ EFI_RUNTIME_SERVICES_CODE, false, false); + } + + int efi_memory_init(void) +@@ -878,11 +902,11 @@ int efi_map_update_notify(phys_addr_t addr, phys_size_t size, + pages = efi_size_in_pages(size + (efi_addr & EFI_PAGE_MASK)); + efi_addr &= ~EFI_PAGE_MASK; + +- status = efi_add_memory_map_pg(efi_addr, pages, ++ status = efi_update_memory_map(efi_addr, pages, + op == LMB_MAP_OP_RESERVE ? + EFI_BOOT_SERVICES_DATA : + EFI_CONVENTIONAL_MEMORY, +- false); ++ false, false); + if (status != EFI_SUCCESS) { + log_err("LMB Map notify failure %lu\n", + status & ~EFI_ERROR_MASK); + +From patchwork Fri Feb 28 08:45:26 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sughosh Ganu +X-Patchwork-Id: 2053443 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Z41ym1cNCz1yKH + for ; Fri, 28 Feb 2025 19:46:24 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id BD37E810F1; + Fri, 28 Feb 2025 09:46:08 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 4D257810F1; Fri, 28 Feb 2025 09:46:07 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, + RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED, + RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_NONE,SPF_SOFTFAIL autolearn=no + autolearn_force=no version=3.4.2 +Received: from foss.arm.com (foss.arm.com [217.140.110.172]) + by phobos.denx.de (Postfix) with ESMTP id 23B3B80FE1 + for ; Fri, 28 Feb 2025 09:46:05 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=sughosh.ganu@linaro.org +Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CB084113E; + Fri, 28 Feb 2025 00:46:19 -0800 (PST) +Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A01053F673; + Fri, 28 Feb 2025 00:46:01 -0800 (PST) +From: Sughosh Ganu +To: u-boot@lists.denx.de +Cc: Ilias Apalodimas , + Simon Glass , Tom Rini , + Heinrich Schuchardt , + Anton Antonov , + Tobias Waldekranz , Bin Meng , + Sughosh Ganu +Subject: [PATCH v6 3/6] efi_loader: preserve installer images in pmem +Date: Fri, 28 Feb 2025 14:15:26 +0530 +Message-Id: <20250228084529.127823-4-sughosh.ganu@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20250228084529.127823-1-sughosh.ganu@linaro.org> +References: <20250228084529.127823-1-sughosh.ganu@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +From: Ilias Apalodimas + +One of the problems OS installers face, when running in EFI, is that +the mounted ISO after calling ExitBootServices goes away. For some +distros this is a problem since they rely on finding some core packages +before continuing the installation. Distros have works around this -- +e.g Fedora has a special kernel command line parameter called +inst.stage2 [0]. + +ACPI has NFIT and NVDIMM support to provide ramdisks to the OS, but we +don't have anything in place for DTs. Linux and device trees have support +for persistent memory devices. + +It's worth noting that for linux to instantiate the /dev/pmemX device, +the memory described in the pmem node has to be omitted from the EFI +memory map we hand over to the OS if ZONE_DEVICES and SPARSEMEM is +enabled. With those enabled the pmem driver ends up calling +devm_memremap_pages() instead of devm_memremap(). The latter works +whether the memory is omitted or marked as reserved, but mapping pages +only works if the memory is omitted. + +On top of that, depending on how the kernel is configured, that memory +area must be page aligned or 2MB aligned. PowerPC is an exception here +and requires 16MB alignment, but since we don't have EFI support for +it, limit the alignment to 2MB. + +Ensure that the ISO image is 2MB aligned and remove the region +occupied by the image from the EFI memory map. + +Signed-off-by: Ilias Apalodimas +Signed-off-by: Sughosh Ganu +--- +Changes since V5: None + + lib/efi_loader/efi_bootmgr.c | 22 +++++++++++++++++----- + 1 file changed, 17 insertions(+), 5 deletions(-) + +diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c +index c6124c590d9..081eff057f4 100644 +--- a/lib/efi_loader/efi_bootmgr.c ++++ b/lib/efi_loader/efi_bootmgr.c +@@ -18,6 +18,8 @@ + #include + #include + #include ++#include ++#include + + static const struct efi_boot_services *bs; + static const struct efi_runtime_services *rs; +@@ -362,13 +364,16 @@ static efi_status_t prepare_loaded_image(u16 *label, ulong addr, ulong size, + } + + /* +- * TODO: expose the ramdisk to OS. +- * Need to pass the ramdisk information by the architecture-specific +- * methods such as 'pmem' device-tree node. ++ * Linux supports 'pmem' which allows OS installers to find, reclaim ++ * the mounted images and continue the installation since the contents ++ * of the pmem region are treated as local media. ++ * ++ * The memory regions used for it needs to be carved out of the EFI ++ * memory map. + */ +- ret = efi_add_memory_map(addr, size, EFI_RESERVED_MEMORY_TYPE); ++ ret = efi_remove_memory_map(addr, size, EFI_CONVENTIONAL_MEMORY); + if (ret != EFI_SUCCESS) { +- log_err("Memory reservation failed\n"); ++ log_err("Failed to reserve memory\n"); + goto err; + } + +@@ -490,6 +495,13 @@ static efi_status_t try_load_from_uri_path(struct efi_device_path_uri *uridp, + ret = EFI_INVALID_PARAMETER; + goto err; + } ++ /* ++ * Depending on the kernel configuration, pmem memory area must be page ++ * aligned or 2MB aligned. PowerPC is an exception here and requires ++ * 16MB alignment, but since we don't have EFI support for it, limit ++ * the alignment to 2MB. ++ */ ++ image_size = ALIGN(image_size, SZ_2M); + + /* + * If the file extension is ".iso" or ".img", mount it and try to load + +From patchwork Fri Feb 28 08:45:27 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sughosh Ganu +X-Patchwork-Id: 2053444 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1)) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Z41z21cqkz1yKH + for ; Fri, 28 Feb 2025 19:46:38 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id B7A2B810FE; + Fri, 28 Feb 2025 09:46:11 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 9A8D9811C5; Fri, 28 Feb 2025 09:46:10 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, + RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED, + RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_NONE,SPF_SOFTFAIL autolearn=no + autolearn_force=no version=3.4.2 +Received: from foss.arm.com (foss.arm.com [217.140.110.172]) + by phobos.denx.de (Postfix) with ESMTP id A52C180FE1 + for ; Fri, 28 Feb 2025 09:46:08 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=sughosh.ganu@linaro.org +Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 48F081688; + Fri, 28 Feb 2025 00:46:23 -0800 (PST) +Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1E23D3F673; + Fri, 28 Feb 2025 00:46:04 -0800 (PST) +From: Sughosh Ganu +To: u-boot@lists.denx.de +Cc: Ilias Apalodimas , + Simon Glass , Tom Rini , + Heinrich Schuchardt , + Anton Antonov , + Tobias Waldekranz , Bin Meng , + Sughosh Ganu +Subject: [PATCH v6 4/6] blkmap: store type of blkmap slice in corresponding + structure +Date: Fri, 28 Feb 2025 14:15:27 +0530 +Message-Id: <20250228084529.127823-5-sughosh.ganu@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20250228084529.127823-1-sughosh.ganu@linaro.org> +References: <20250228084529.127823-1-sughosh.ganu@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Add information about the type of blkmap slice as an attribute in the +corresponding slice structure. Put information in the blkmap slice +structure to identify if it is associated with a memory or linear +mapped device. Which can then be used to take specific action based on +the type of the blkmap slice. + +Signed-off-by: Sughosh Ganu +Reviewed-by: Tobias Waldekranz +Reviewed-by: Ilias Apalodimas +--- +Changes since V5: None + + drivers/block/blkmap.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c +index 34eed1380dc..453510cca62 100644 +--- a/drivers/block/blkmap.c ++++ b/drivers/block/blkmap.c +@@ -16,6 +16,10 @@ + + struct blkmap; + ++/* Attributes of blkmap slice */ ++#define BLKMAP_SLICE_LINEAR BIT(0) ++#define BLKMAP_SLICE_MEM BIT(1) ++ + /** + * struct blkmap_slice - Region mapped to a blkmap + * +@@ -25,12 +29,14 @@ struct blkmap; + * @node: List node used to associate this slice with a blkmap + * @blknr: Start block number of the mapping + * @blkcnt: Number of blocks covered by this mapping ++ * @attr: Attributes of blkmap slice + */ + struct blkmap_slice { + struct list_head node; + + lbaint_t blknr; + lbaint_t blkcnt; ++ uint attr; + + /** + * @read: - Read from slice +@@ -169,6 +175,7 @@ int blkmap_map_linear(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + .slice = { + .blknr = blknr, + .blkcnt = blkcnt, ++ .attr = BLKMAP_SLICE_LINEAR, + + .read = blkmap_linear_read, + .write = blkmap_linear_write, +@@ -248,6 +255,7 @@ int __blkmap_map_mem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + .slice = { + .blknr = blknr, + .blkcnt = blkcnt, ++ .attr = BLKMAP_SLICE_MEM, + + .read = blkmap_mem_read, + .write = blkmap_mem_write, + +From patchwork Fri Feb 28 08:45:28 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Sughosh Ganu +X-Patchwork-Id: 2053445 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@legolas.ozlabs.org +Authentication-Results: legolas.ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) + (No client certificate requested) + by legolas.ozlabs.org (Postfix) with ESMTPS id 4Z41zB6lfpz1yKH + for ; Fri, 28 Feb 2025 19:46:46 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 1822281111; + Fri, 28 Feb 2025 09:46:15 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id A6651807D7; Fri, 28 Feb 2025 09:46:14 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, + RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED, + RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_NONE,SPF_SOFTFAIL autolearn=no + autolearn_force=no version=3.4.2 +Received: from foss.arm.com (foss.arm.com [217.140.110.172]) + by phobos.denx.de (Postfix) with ESMTP id 7B487811C5 + for ; Fri, 28 Feb 2025 09:46:12 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=fail (p=none dis=none) header.from=linaro.org +Authentication-Results: phobos.denx.de; + spf=fail smtp.mailfrom=sughosh.ganu@linaro.org +Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) + by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3B092113E; + Fri, 28 Feb 2025 00:46:27 -0800 (PST) +Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) + by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 103233F673; + Fri, 28 Feb 2025 00:46:08 -0800 (PST) +From: Sughosh Ganu +To: u-boot@lists.denx.de +Cc: Ilias Apalodimas , + Simon Glass , Tom Rini , + Heinrich Schuchardt , + Anton Antonov , + Tobias Waldekranz , Bin Meng , + Sughosh Ganu +Subject: [PATCH v6 5/6] blkmap: add an attribute to preserve the mem mapping +Date: Fri, 28 Feb 2025 14:15:28 +0530 +Message-Id: <20250228084529.127823-6-sughosh.ganu@linaro.org> +X-Mailer: git-send-email 2.34.1 +In-Reply-To: <20250228084529.127823-1-sughosh.ganu@linaro.org> +References: <20250228084529.127823-1-sughosh.ganu@linaro.org> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.39 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de +X-Virus-Status: Clean + +Some blkmap memory mapped devices might have to be be relevant even +after U-Boot passes control to the next image as part of the platform +boot. An example of such a mapping would be an OS installer ISO image, +information for which has to be provided to the OS kernel. Use the +'preserve' attribute for such mappings. The code for adding a pmem +node to the device-tree then checks if this attribute is set, and adds +a node only for mappings which have this attribute. + +Signed-off-by: Sughosh Ganu +Reviewed-by: Tobias Waldekranz +Reviewed-by: Ilias Apalodimas +--- +Changes since V5: None + + cmd/blkmap.c | 9 +++++++-- + drivers/block/blkmap.c | 12 ++++++++---- + drivers/block/blkmap_helper.c | 2 +- + include/blkmap.h | 4 +++- + 4 files changed, 19 insertions(+), 8 deletions(-) + +diff --git a/cmd/blkmap.c b/cmd/blkmap.c +index 164f80f1387..86a123b1cd3 100644 +--- a/cmd/blkmap.c ++++ b/cmd/blkmap.c +@@ -62,13 +62,18 @@ static int do_blkmap_map_mem(struct map_ctx *ctx, int argc, char *const argv[]) + { + phys_addr_t addr; + int err; ++ bool preserve = false; + + if (argc < 2) + return CMD_RET_USAGE; + + addr = hextoul(argv[1], NULL); + +- err = blkmap_map_pmem(ctx->dev, ctx->blknr, ctx->blkcnt, addr); ++ if (argc == 3 && !strcmp(argv[2], "preserve")) ++ preserve = true; ++ ++ err = blkmap_map_pmem(ctx->dev, ctx->blknr, ctx->blkcnt, addr, ++ preserve); + if (err) { + printf("Unable to map %#llx at block 0x" LBAF ": %d\n", + (unsigned long long)addr, ctx->blknr, err); +@@ -221,7 +226,7 @@ U_BOOT_CMD_WITH_SUBCMDS( + "blkmap create