From 51c20a4daebab03d3f03d8081c02e4f644c845e6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 15 Sep 2021 07:59:14 +0100 Subject: [PATCH 1/3] 2021.10 RC4, RPi MMC clk fix --- ...cm2835_sdhost-firmware-managed-clock.patch | 228 ++++++++++++++++++ rpi-fallback-to-max-clock-for-mmc.patch | 77 ++++++ sources | 2 +- uboot-tools.spec | 13 +- 4 files changed, 315 insertions(+), 5 deletions(-) create mode 100644 rpi-bcm2835_sdhost-firmware-managed-clock.patch create mode 100644 rpi-fallback-to-max-clock-for-mmc.patch diff --git a/rpi-bcm2835_sdhost-firmware-managed-clock.patch b/rpi-bcm2835_sdhost-firmware-managed-clock.patch new file mode 100644 index 0000000..d1c60e8 --- /dev/null +++ b/rpi-bcm2835_sdhost-firmware-managed-clock.patch @@ -0,0 +1,228 @@ +From f3a870bfa075fb880f5e018a0a5ae6f27ca8be49 Mon Sep 17 00:00:00 2001 +From: Vincent Fazio +Date: Mon, 13 Sep 2021 13:34:45 -0500 +Subject: [PATCH] mmc: bcm2835-host: let firmware manage the clock + +Newer firmware supports managing the sdhost clock divisor, so leverage +this feature if it is available. + +SET_SDHOST_CLOCK is largely undocumented except for its usage within the +Linux kernel, which this change is based on. + +https://github.com/raspberrypi/linux/commit/3cd16c39c718e2dda7885c4ed7a20118aed12524 + +Signed-off-by: Vincent Fazio +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 18 ++++++++ + arch/arm/mach-bcm283x/include/mach/msg.h | 10 +++++ + arch/arm/mach-bcm283x/msg.c | 30 +++++++++++++ + drivers/mmc/bcm2835_sdhost.c | 53 ++++++++++++++--------- + 4 files changed, 90 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 7dcac583cc4..9b1943fcfc4 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -252,6 +252,24 @@ struct bcm2835_mbox_tag_get_clock_rate { + } body; + }; + ++#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK 0x00038042 ++ ++struct bcm2835_mbox_tag_set_sdhost_clock { ++ struct bcm2835_mbox_tag_hdr tag_hdr; ++ union { ++ struct { ++ u32 rate_hz; ++ u32 rate_1; ++ u32 rate_2; ++ } req; ++ struct { ++ u32 rate_hz; ++ u32 rate_1; ++ u32 rate_2; ++ } resp; ++ } body; ++}; ++ + #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 + + struct bcm2835_mbox_tag_allocate_buffer { +diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h +index e45c1bf010f..ab37abdb6c6 100644 +--- a/arch/arm/mach-bcm283x/include/mach/msg.h ++++ b/arch/arm/mach-bcm283x/include/mach/msg.h +@@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module); + */ + int bcm2835_get_mmc_clock(u32 clock_id); + ++/** ++ * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv ++ * ++ * @rate_hz: Input clock frequency ++ * @rate_1: Returns a clock frequency ++ * @rate_2: Returns a clock frequency ++ * @return 0 of OK, -EIO on error ++ */ ++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2); ++ + /** + * bcm2835_get_video_size() - get the current display size + * +diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c +index e2badfecb09..8c1c36a5f15 100644 +--- a/arch/arm/mach-bcm283x/msg.c ++++ b/arch/arm/mach-bcm283x/msg.c +@@ -21,6 +21,12 @@ struct msg_get_clock_rate { + u32 end_tag; + }; + ++struct msg_set_sdhost_clock { ++ struct bcm2835_mbox_hdr hdr; ++ struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock; ++ u32 end_tag; ++}; ++ + struct msg_query { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_physical_w_h physical_w_h; +@@ -111,6 +117,30 @@ int bcm2835_get_mmc_clock(u32 clock_id) + return clock_rate; + } + ++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2) ++{ ++ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1); ++ int ret; ++ ++ BCM2835_MBOX_INIT_HDR(msg_sdhost_clk); ++ BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK); ++ ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz; ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_1 = *rate_1; ++ msg_sdhost_clk->set_sdhost_clock.body.req.rate_2 = *rate_2; ++ ++ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr); ++ if (ret) { ++ printf("bcm2835: Could not query sdhost clock rate\n"); ++ return -EIO; ++ } ++ ++ *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1; ++ *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2; ++ ++ return 0; ++} ++ + int bcm2835_get_video_size(int *widthp, int *heightp) + { + ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1); +diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c +index 894dbdd6861..3a9cd6f1eb2 100644 +--- a/drivers/mmc/bcm2835_sdhost.c ++++ b/drivers/mmc/bcm2835_sdhost.c +@@ -181,6 +181,7 @@ struct bcm2835_host { + struct udevice *dev; + struct mmc *mmc; + struct bcm2835_plat *plat; ++ unsigned int firmware_sets_cdiv:1; + }; + + static void bcm2835_dumpregs(struct bcm2835_host *host) +@@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host) + msleep(20); + host->clock = 0; + writel(host->hcfg, host->ioaddr + SDHCFG); +- writel(host->cdiv, host->ioaddr + SDCDIV); ++ writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV); + } + + static int bcm2835_wait_transfer_complete(struct bcm2835_host *host) +@@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host) + static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + { + int div; ++ u32 clock_rate[2] = { 0 }; + + /* The SDCDIV register has 11 bits, and holds (div - 2). But + * in data mode the max is 50MHz wihout a minimum, and only +@@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + * clock divisor at all times. + */ + +- if (clock < 100000) { +- /* Can't stop the clock, but make it as slow as possible +- * to show willing +- */ +- host->cdiv = SDCDIV_MAX_CDIV; +- writel(host->cdiv, host->ioaddr + SDCDIV); +- return; +- } ++ if (host->firmware_sets_cdiv) { ++ bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]); ++ clock = max(clock_rate[0], clock_rate[1]); ++ } else { ++ if (clock < 100000) { ++ /* Can't stop the clock, but make it as slow as possible ++ * to show willing ++ */ ++ host->cdiv = SDCDIV_MAX_CDIV; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ return; ++ } + +- div = host->max_clk / clock; +- if (div < 2) +- div = 2; +- if ((host->max_clk / div) > clock) +- div++; +- div -= 2; ++ div = host->max_clk / clock; ++ if (div < 2) ++ div = 2; ++ if ((host->max_clk / div) > clock) ++ div++; ++ div -= 2; + +- if (div > SDCDIV_MAX_CDIV) +- div = SDCDIV_MAX_CDIV; ++ if (div > SDCDIV_MAX_CDIV) ++ div = SDCDIV_MAX_CDIV; ++ ++ clock = host->max_clk / (div + 2); ++ host->cdiv = div; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ } + +- clock = host->max_clk / (div + 2); + host->mmc->clock = clock; + + /* Calibrate some delays */ +@@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) + host->ns_per_fifo_word = (1000000000 / clock) * + ((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32); + +- host->cdiv = div; +- writel(host->cdiv, host->ioaddr + SDCDIV); +- + /* Set the timeout to 500ms */ + writel(host->mmc->clock / 2, host->ioaddr + SDTOUT); + } +@@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev) + struct bcm2835_host *host = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); ++ u32 clock_rate[2] = { ~0 }; + + host->dev = dev; + host->mmc = mmc; +@@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev) + + host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE); + ++ bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]); ++ host->firmware_sets_cdiv = (clock_rate[0] != ~0); ++ + bcm2835_add_host(host); + + dev_dbg(dev, "%s -> OK\n", __func__); diff --git a/rpi-fallback-to-max-clock-for-mmc.patch b/rpi-fallback-to-max-clock-for-mmc.patch new file mode 100644 index 0000000..81ee372 --- /dev/null +++ b/rpi-fallback-to-max-clock-for-mmc.patch @@ -0,0 +1,77 @@ +From 71ba043e5c5575f3d86536acade70dab6599489b Mon Sep 17 00:00:00 2001 +From: Vincent Fazio +Date: Mon, 13 Sep 2021 11:22:30 -0500 +Subject: [PATCH] arm: rpi: fallback to max clock rate for MMC clock + +In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1 and later, +the GET_CLOCK_RATE mailbox property was changed to return the last +value set by SET_CLOCK_RATE. + +https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502 + +U-Boot does not call SET_CLOCK_RATE so bcm2835_get_mmc_clock will +return zero and can cause degraded MMC performance. + +Calling SET_CLOCK_RATE fixes the frequency of the clock to a specific +value and disables the firmware's clock scaling so is not an option. + +Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if +GET_CLOCK_RATE returns zero. + +Signed-off-by: Vincent Fazio +--- + arch/arm/mach-bcm283x/include/mach/mbox.h | 2 ++ + arch/arm/mach-bcm283x/msg.c | 20 +++++++++++++++++++- + 2 files changed, 21 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h +index 2ae2d3d97c3..7dcac583cc4 100644 +--- a/arch/arm/mach-bcm283x/include/mach/mbox.h ++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h +@@ -224,6 +224,8 @@ struct bcm2835_mbox_tag_set_power_state { + }; + + #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 ++#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004 ++#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007 + + #define BCM2835_MBOX_CLOCK_ID_EMMC 1 + #define BCM2835_MBOX_CLOCK_ID_UART 2 +diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c +index 347aece3cd8..e2badfecb09 100644 +--- a/arch/arm/mach-bcm283x/msg.c ++++ b/arch/arm/mach-bcm283x/msg.c +@@ -75,6 +75,7 @@ int bcm2835_get_mmc_clock(u32 clock_id) + { + ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1); + int ret; ++ u32 clock_rate = 0; + + ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI); + if (ret) +@@ -90,7 +91,24 @@ int bcm2835_get_mmc_clock(u32 clock_id) + return -EIO; + } + +- return msg_clk->get_clock_rate.body.resp.rate_hz; ++ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; ++ ++ if (clock_rate == 0) ++ { ++ BCM2835_MBOX_INIT_HDR(msg_clk); ++ BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE); ++ msg_clk->get_clock_rate.body.req.clock_id = clock_id; ++ ++ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr); ++ if (ret) { ++ printf("bcm2835: Could not query max eMMC clock rate\n"); ++ return -EIO; ++ } ++ ++ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz; ++ } ++ ++ return clock_rate; + } + + int bcm2835_get_video_size(int *widthp, int *heightp) diff --git a/sources b/sources index f1a966e..384045b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.10-rc3.tar.bz2) = 8ea85c1d466d7b85e1405bd3c78aefe2b171e5bf443518e0ed78c1fb080a83fd4afda97dd5a0367d4cb2ddb6614f4f41a2c7be7181c99b959c7c0abcdaa3ae18 +SHA512 (u-boot-2021.10-rc4.tar.bz2) = c7b64d3da6407615226820bc217f0d8db6392629c22c966817a6d292f6741ebc5da3e3550e24420e16018931da6b8ab926daf180e94ff3827543285f354b1ea6 diff --git a/uboot-tools.spec b/uboot-tools.spec index 0435ff9..5c2fd1e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc3 +%global candidate rc4 Name: uboot-tools Version: 2021.10 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -17,11 +17,12 @@ Source4: aarch64-chromebooks # Fedoraisms patches # Needed to find DT on boot partition that's not the first partition Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +# Board fixes and enablement # RPi - uses RPI firmware device tree for HAT support Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch3: rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch - -# Board fixes and enablement +Patch4: rpi-fallback-to-max-clock-for-mmc.patch +Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes @@ -257,6 +258,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Wed Sep 15 2021 Peter Robinson - 2021.10-0.6.rc4 +- Update to 2021.10 RC4 +- Proposed fix for RPi MMC clock issue + * Mon Aug 30 2021 Peter Robinson - 2021.10-0.5.rc3 - Update to 2021.10 RC3 From 677db9a5f753d2c5a3fc1790f678dd6b8e63e27a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 15 Sep 2021 15:30:06 +0100 Subject: [PATCH 2/3] U-Boot device firmwares don't currently support LTO --- uboot-tools.spec | 3 +++ 1 file changed, 3 insertions(+) diff --git a/uboot-tools.spec b/uboot-tools.spec index 5c2fd1e..34a869f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -100,6 +100,9 @@ mkdir builds %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/ %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/ +# U-Boot device firmwares don't currently support LTO +%define _lto_cflags %{nil} + %ifarch aarch64 %{arm} for board in $(cat %{_arch}-boards) do From 346fc7533f0505d10de0b8e6b27299c26302b346 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 15 Sep 2021 15:34:17 +0100 Subject: [PATCH 3/3] rpi4 USB fix for some devices --- ...-address-of-the-XHCI-PCI-device-base.patch | 203 ++++++++++++++++++ uboot-tools.spec | 1 + 2 files changed, 204 insertions(+) create mode 100644 ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch diff --git a/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch b/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch new file mode 100644 index 0000000..f4d7d54 --- /dev/null +++ b/ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch @@ -0,0 +1,203 @@ +From patchwork Thu Jun 17 09:22:03 2021 +Content-Type: text/plain; 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+ Thu, 17 Jun 2021 09:22:06 +0000 (GMT) +From: Marek Szyprowski +To: u-boot@lists.denx.de +Cc: Marek Szyprowski , Matthias Brugger + , Sylwester Nawrocki , Nicolas + Saenz Julienne , Jaehoon Chung + , Bartlomiej Zolnierkiewicz + +Subject: [PATCH] ARM: bcm283x: change the virtual address of the XHCI PCI + device base +Date: Thu, 17 Jun 2021 11:22:03 +0200 +Message-Id: <20210617092203.19825-1-m.szyprowski@samsung.com> +X-Mailer: git-send-email 2.17.1 +X-Brightmail-Tracker: + H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsWy7djPc7r2IqcTDB40GFtsnLGe1eLGrzZW + i7VH7rJbLJj8hNVi26zlbBaH37SzWrzd28nuwO5x9s4ORo++LasYPdZvucrisfl0dQBLFJdN + SmpOZllqkb5dAlfG+eermQqO8lT09y5naWC8xtXFyMkhIWAi0X/mMEsXIxeHkMAKRol9356w + dzFyADlfGCVuhkHEPzNKNNycywLT8G/nNkaIxHJGiaWdm1ghHKCGffe+sYNUsQkYSnS97WID + sUUEJCR+9V8F62AWmMkk0dw5kRUkISwQLvH7/2xGEJtFQFWib/cHsAZeAVuJl+e62SDWyUus + 3nCAGaRZQuAnu8Si7/sYIRIuEo+6V0LZwhKvjm9hh7BlJE5P7mGBaGhmlHh4bi07hNPDKHG5 + aQZUh7XEnXO/2EA+ZRbQlFi/Sx/ElBBwlJg7gR/C5JO48VYQpJgZyJy0bTozRJhXoqNNCGKG + msSs4+vgth68cIkZwvaQuPd4Pdj5QgKxEkcOfWScwCg3C2HVAkbGVYziqaXFuempxcZ5qeV6 + xYm5xaV56XrJ+bmbGIEJ4PS/4193MK549VHvECMTB+MhRgkOZiURXt3iEwlCvCmJlVWpRfnx + RaU5qcWHGKU5WJTEeXdtXRMvJJCeWJKanZpakFoEk2Xi4JRqYBJge2bX53WWz1Lf4MPq4pKd + L2Z7TUp3VDv2fwfHf6Y2rg5e979vjNICyxdMeW+qc0OHOVT8Q+3kj7qOC66fOsy4xb61uH4h + 951lnRF8exoM9TeGJ715tqduV6XnjaXVPyYtMn03k3MLb92nXs2vNxpuFebsiS62yarPnZ9d + ZPBOU0yvpoR307TFV/niSsVfeYrt4A/k1bB+WKXxd382MxdrGIvDrJUsCSsW7NglYTjXcVbO + 1bzaJ8lfWv7511UuqNvpJJ+093bvgWOlqbeVfjW2v3j+fP79PKeNgUle3dO622YUq2S4Cyh/ + DZbd7mC8SedY8eZZfxdGrozhnGFmGj9nwTKzJQWb562Rl/9prMRSnJFoqMVcVJwIAFvDw65v + AwAA +X-Brightmail-Tracker: + H4sIAAAAAAAAA+NgFtrCLMWRmVeSWpSXmKPExsVy+t/xe7r2IqcTDNb0CFlsnLGe1eLGrzZW + i7VH7rJbLJj8hNVi26zlbBaH37SzWrzd28nuwO5x9s4ORo++LasYPdZvucrisfl0dQBLlJ5N + UX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5dgl7G+eermQqO + 8lT09y5naWC8xtXFyMkhIWAi8W/nNsYuRi4OIYGljBJP/q5gh0jISJyc1sAKYQtL/LnWxQZR + 9IlRYs/8y2AJNgFDia63IAlODhEBCYlf/VfBJjELzGaSeL7iLhNIQlggVOL5jHVgDSwCqhJ9 + uz+ANfAK2Eq8PNfNBrFBXmL1hgPMExh5FjAyrGIUSS0tzk3PLTbUK07MLS7NS9dLzs/dxAgM + vm3Hfm7ewTjv1Ue9Q4xMHIyHGCU4mJVEeHWLTyQI8aYkVlalFuXHF5XmpBYfYjQF2jeRWUo0 + OR8Y/nkl8YZmBqaGJmaWBqaWZsZK4rxb566JFxJITyxJzU5NLUgtgulj4uCUamAyvS18MHIp + 7+EpilHuXy7d3MPzPnfRlSWnFr5+m5lzNSx03owzNw51LmK5Hv4vJ6nPlaHi3Ma1ZubH/23N + uHX0nlWi8bL9jxzLqptsE0+y961tVtRKuvD/QGJR1+3NeoUWKW7rH9pz89YdcnimPGWf7Jb/ + fVnJZ6tdbPuu3nv29sWhteIKixdUX1rlHzUtVfyN0ILXawqfTJU7/SR/jtrSjMpvufKfZKb+ + 3b1sW2hkU2aN9VuDk+52mbFrb3P/1LzhsN309FfG24tY3TjtzFaLf35WI6rUZiAa8lNEtFJE + 1a9l8zLRs3wbm574XwmsP111UPfxm4q0yHKuE6GbZm1T/LfpzOkcP6Yg1r+3Vmy8osRSnJFo + qMVcVJwIAKDUsMjHAgAA +X-CMS-MailID: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 +X-Msg-Generator: CA +X-RootMTR: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 +X-EPHeader: CA +CMS-TYPE: 201P +X-CMS-RootMailID: 20210617092207eucas1p2fba39144e5d4890a23ba70f794a25b79 +References: + +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de +X-Virus-Status: Clean + +Move the XHCI PCI device base up in the virtual address space. This fixes +initialization failure observed with newer Raspberry Pi firmware, later +than 63b1922311 ("firmware: arm_loader: Update armstubs with those from +PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base +conflicts with the updated ARM/VideoCore firmware. + +This also requires to reduce the size of the mapped PCI device region +from 8MiB to 4MiB to fit into 32bit address space. This is still enough +for the XHCI PCI device. + +Signed-off-by: Marek Szyprowski +Reviewed-by: Jaehoon Chung +Reviewed-by: Nicolas Saenz Julienne +Tested-by: Stefan Agner +--- +This fixes the issue observed on ARM 32bit after upgrading the RPi4 +firmware files, described some time ago here: +https://lists.denx.de/pipermail/u-boot/2021-February/442317.html +--- + arch/arm/mach-bcm283x/init.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c +index 49027ce0a2..9803499985 100644 +--- a/arch/arm/mach-bcm283x/init.c ++++ b/arch/arm/mach-bcm283x/init.c +@@ -14,7 +14,7 @@ + #include + + #define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL +-#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x400000UL + + #ifdef CONFIG_ARM64 + #include +@@ -148,7 +148,7 @@ int mach_cpu_init(void) + + #ifdef CONFIG_ARMV7_LPAE + #ifdef CONFIG_TARGET_RPI_4_32B +-#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL ++#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xffc00000UL + #include + #include + diff --git a/uboot-tools.spec b/uboot-tools.spec index 34a869f..253dbc9 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -23,6 +23,7 @@ Patch2: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch3: rpi-Copy-properties-from-firmware-dtb-to-the-loaded-dtb.patch Patch4: rpi-fallback-to-max-clock-for-mmc.patch Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch +Patch6: ARM-bcm283x-change-the-virtual-address-of-the-XHCI-PCI-device-base.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes