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abc/README.md
Jerry James 55247e191c Update to latest git snapshot. 
Drop upstreamed -strict-aliasing patch.
2022-01-17 09:01:35 -07:00

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abc

ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.

ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a toolbox rather than a complete tool.